Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
I. INTRODUCTION
(7)
AGAH et al.: ACTIVE MILLIMETER-WAVE PHASE-SHIFT DOHERTY POWER AMPLIFIER IN 45-nm SOI CMOS 2341
Fig. 5. Analysis and circuit simulation of and vs. to achieve Fig. 6. and using (10) and circuit simulation, when
at 45 GHz, when , , and .
and .
(11)
(12)
also shows the agreement between the circuit simulation and
analytical results.
and must be selected to establish the desired phase. As was mentioned in Section II-A, the auxiliary amplifier has
Fig. 5 plots the relation between and using (12) when twice the transconductance of the main amplifier as shown in
and . Fig. 6. The active phase-shift preamplifier increases the gain of
By substituting in (11) using (12), the auxiliary amplifier, which assists in achieving this goal.
As shown in Fig. 6, the frequency at which
is lower than the peak gain resonance frequency ) where
is maximum. The resonance occurs approximately at
(13) (16)
Fig. 5 shows the simulated and calculated at 45 GHz
when . There is an optimum
value for and that maximizes the gain, while achieving
90 phase shift. To determine the optimum value of , The result is that the phase-shifting preamplifier sacrifices
less than one dB gain to achieve the required phase shift.
Simulations show that the transmission line length required
(14) for is much smaller than , and the use of the phase-
shifting preamplifier reduces the overall area by approximately
Solving (14) shows that the value of that achieves the 20%.
highest gain is Fig. 7 plots the phase of as a function of frequency and
compares it to the phase shift of a quarter-wavelength transmis-
sion line. This simulation shows that the phase-shifting ampli-
(15) fier can be utilized at the input of the auxiliary amplifier in the
Doherty PA to create the required phase shift with little band-
width penalty. In fact, this technique increases the gain of the
and the value of that maximizes the gain is calcu- auxiliary amplifier as shown in Fig. 6. To take best advantage of
lated from (12), and is shown graphically in Fig. 5. this increased gain, the power consumption of the phase-shifting
By using the extracted parameters from circuit simulation, preamplifier should be minimized. Therefore, the preamplifier is
when , and implemented as a common-source amplifier with a 1.2 V power
into (11), and are plotted in Fig. 6. This graph supply.
2342 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 10, OCTOBER 2013
(17)
(18)
Fig. 13. Schematic of the Doherty amplifiers with ground-shielded CPW and slow-wave CPW.
Fig. 15. Simulated gain, DE and PAE of the Doherty PA with ground-shielded
CPW as a function of output power.
Fig. 14. Impedance seen by main and auxiliary amplifiers at back-off power.
Simulation results at 42 GHz for the DE, PAE and gain of the
Since and is transformed to 25 , this Doherty PA with and without the slow-wave CPW are shown in
transmission line ideally provides a 100 load for the main Fig. 15 and Fig. 16. Both of these PAs achieve approximately
amplifier. However, the parasitic capacitance at the output of 18-dBm saturated output power. Comparison of these figures
the main amplifier introduces an undesirable susceptance to this indicates that the Doherty PA with the slow-wave CPW achieves
resistive load reducing the efficiency of the main amplifier. To approximately 5% and 6% more DE and PAE at 6-dB back-off
provide a purely 100 resistive load for the main amplifier, the power when compared to the PA with ground shielded CPW, a
length of this transmission line is reduced by 200 to 600 significant improvement.
and the parasitic capacitance is included in the impedance As was mentioned in Section II-B, the auxiliary amplifier
transforming network. Fig. 14 shows the network of the series should be totally off at back-off to achieve the best efficiency.
600- transmission line and the shunt parasitic capacitance One possible way to achieve this goal is to bias the auxiliary
at the output of the main amplifier transferring a 25 load to amplifier in deep class C, which reduces the gain at high output
100 . Using this technique, the loss of the transmission line is power. To address the problem of the auxiliary amplifier turning
reduced by approximately 0.1 dB. on prematurely, adaptive biasing is evaluated. Adaptive biasing
AGAH et al.: ACTIVE MILLIMETER-WAVE PHASE-SHIFT DOHERTY POWER AMPLIFIER IN 45-nm SOI CMOS 2345
Fig. 22. Gain as a function of output power of the Doherty PA with ground-
shielded CPW. Fig. 25. PAE and DE of the Doherty PA with slow-wave CPW.
Fig. 23. PAE and DE of the Doherty PA with ground-shielded CPW. Fig. 26. Gain as a function of output power of the active phase-shift Doherty
PA.
Fig. 24. Gain as a function of output power of the Doherty PA with slow-wave
CPW.
Fig. 27. PAE and DE of the active phase-shift Doherty PA.
PA. The DE and PAE of this PA at peak output power are 31%
and 21% respectively.
The measured and simulated gain, PAE and drain efficiency
of the Doherty PA with slow-wave CPWs are plotted in Figs. 24
and Fig. 25. It achieves 24% DE and 17% PAE at back-off,
which is 4% and 5% higher than the ground-shielded CPW Do-
herty PA, demonstrating the benefit of the lower loss of the slow-
wave transmission lines. The DE and PAE of the slow-wave
CPW Doherty PA are 33% and 23% at peak output power, which
is also 2% higher than the Doherty PA with ground-shielded
CPW.
The measured and simulated gain, PAE, and DE of the third Fig. 28. Comparison of the measured PAE of the three Doherty PAs.
design—the active phase-shift Doherty PA—are plotted in
Figs. 26 and 27. It exhibits roughly 7.7 dB small-signal gain
and it achieves 28% DE and 21% PAE at back-off. However, Fig. 28 and Fig. 29 compares the measured PAE and gain of
the peak PAE of the active phase-shift Doherty only reaches all the three Doherty PAs, which demonstrates the advantage of
20%, which is 3% lower than the slow-wave Doherty and 1% the active phase-shift Doherty PA over the traditional designs.
lower than Doherty PA with ground-shielded CPW. This is To ensure the reliable operation of the implemented PAs, each
explained by the higher power consumption of this design, of them has been measured at 1-dB compression point with 2.5
because of the additional phase-shifting amplifier. V power supply for more than 3 hours and Fig. 30 plots the
2348 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 10, OCTOBER 2013
TABLE I
COMPARISON TO PREVIOUS RESULTS
ACKNOWLEDGMENT
The authors are grateful to the DARPA LEAP program for
access to the IBM 45-nm SOI technology and to the DARPA
ELASTx program (Dr. S. Raman), and the US Army Research
Office (Dr. D. Palmer) for support. Additionally, the authors
thank the members of the High-Speed Devices Group at UCSD
and Don Kimball for important discussions on the design and
testing of this work.
REFERENCES
[1] A. Siligaris, Y. Hamada, C. Mounet, C. Raynaud, B. Martineau, N. De-
Fig. 30. Measured gain at 1-dB compression point as a function of time for the paris, N. Rolland, M. Fukaishi, and P. Vincent, “A 60 GHz power am-
three Doherty PAs. plifier with 14.5 dBm saturation power and 25% peak PAE in CMOS 65
nm SOI,” IEEE J. Solid-State Circuits, vol. 45, no. 7, pp. 1286–1294,
Jul. 2010.
[2] J. Kim, H. Dabag, P. Asbeck, and J. F. Buckwalter, “Q-band and
measured gain as a function of time. No degradation is observed W-band power amplifiers in 45-nm CMOS SOI,” IEEE Trans. Microw.
during this laboratory testing of the amplifiers. Theory Tech., vol. 60, no. 6, pp. 1870–1877, Jun. 2012.
Table I is a comparison of the three fabricated Doherty PAs [3] A. Agah, H. Dabag, B. Hanafi, P. Asbeck, L. Larson, and J. Buckwalter,
“A 34%, 18.6 dBm 42–45 GHz stacked power amplifier in 45 nm SOI
in this work with other published results in the mm-wave fre- CMOS,” in Proc. IEEE RFIC, Jun. 2012, pp. 57–60.
quency range. This work demonstrates the highest output power [4] A. Agah, B. Hanafi, H. Dabag, P. Asbeck, L. Larson, and J. Buckwalter,
compared to all previous CMOS work as well as the highest “A 45 GHz Doherty power amplifier with 23% PAE and 18 dBm, in 45
nm SOI CMOS,” in Proc. IEEE IMS, Jun. 2012, pp. 1–3.
efficiency for an amplifier operating under 6-dB back-off [5] S. C. Cripps, RF Power Amplifiers for Wireless Communications, 2nd
conditions. ed. Norwood, MA, USA: Artech House, 2006.
[6] K. Jangheon, B. Fehri, S. Boumaiza, and J. Wood, “Power efficiency
VII. CONCLUSION and linearity enhancement using optimized asymmetrical Doherty
power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2,
In this paper, a traditional 45 GHz Doherty PA is designed pp. 425–434, Feb. 2011.
with shielded CPWs in 45-nm SOI CMOS technology. To im- [7] M. Iwamoto, A. Williams, C. Pin-Fan, A. G. Metzger, L. E. Larson, and
P. M. Asbeck, “An extended Doherty amplifier with high efficiency
prove the performance and reduce the area, shielded CPWs are over a wide power range,” IEEE Trans. Microw. Theory Tech., vol. 49,
substituted with slow-wave CPW in a second PA, resulting in no. 12, pp. 2472–2479, Dec. 2001.
AGAH et al.: ACTIVE MILLIMETER-WAVE PHASE-SHIFT DOHERTY POWER AMPLIFIER IN 45-nm SOI CMOS 2349
[8] G. Jae-Gon, C. Kyoung-Joon, K. Jong-Heon, and S. P. Stapleton, “A Amir Agah (S’11) received the B.Sc. degree in
high gain Doherty amplifier using embedded drivers,” in IEEE Mi- electrical engineering from the University of Tehran,
crowave Symp. Dig., Jun. 2006, pp. 1838–1841. Tehran, Iran, in 2007, the M.S. degree in electrical
[9] C. Kyoung-Joon, K. Jong-Heon, and S. P. Stapleton, “A highly efficient engineering from the Delft University of Technology,
Doherty feedforward linear power amplifier for W-CDMA base-station Delft, The Netherlands, in 2009, and is currently
applications,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 1, pp. working toward the Ph.D. degree at the University
292–300, Jan. 2005. of California at San Diego, La Jolla, CA, USA.
[10] Y. Zhao, M. Iwamoto, L. E. Larson, and P. M. Asbeck, “Doherty am- He has previously held internship positions
plifier with DSP control to improve performance in CDMA operation,” at Qualcomm Inc., San Diego, CA, USA, and
in Proc. IEEE IMS, Jun. 2003, vol. 2, pp. 687–690. Broadcom Corporation, Utrecht, The Netherlands.
[11] R. N. Braithwaite and S. Carichner, “An improved Doherty ampli- His research interests include cellular and mil-
fier using cascaded digital predistortion and digital gate voltage en- limeter-wave PA and transceiver design in advance CMOS technologies.
hancement,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp.
3118–3126, Dec. 2009.
[12] J. Kim, J. Cha, I. Kim, and B. Kim, “Optimum operation of asym-
metrical-cells-based linear Doherty power amplifiers—Uneven pow-
erdrive and power matching,” IEEE Trans. Microw. Theory Tech., vol. Hayg-Taniel Dabag (S’10) received the Dipl.-Ing.
53, no. 5, pp. 1802–1809, May 2005. degree in electrical engineering from Ruhr University
[13] A. Ezzeddine and H. Huang, “The high voltage/high power FET,” in Bochum, Bochum, Germany, in 2008, the M.S. de-
Proc. IEEE RFIC, 2003, pp. 215–218. gree in electrical engineering from the University of
[14] S. Pornpromlikit, J. Jeong, C. D. Presti, A. Scuderi, and P. M. Asbeck, California at San Diego, La Jolla, CA, USA, in 2011,
“A 33-dBm 1.9-GHz silicon-on-insulator CMOS stacked-FET power and is currently working toward the Ph.D. degree in
amplifier,” in Proc. IEEE IMS, Jun. 2009, pp. 533–536. electrical and computer engineering at the University
[15] P. Habas, “Hot-carrier NMOST degradation at periodic drain signal,” of California at San Diego.
in 23rd Int. Conf. Microelectronics, MIEL 2002, May 2002, vol. 2, pp. He attended Purdue, West Lafayette, IN, USA, as
731–734. an exchange student during his undergraduate study
[16] C. D. Presti, F. Carrara, A. Scuderi, S. Lombardo, and G. Palmisano, and held two internships with Qualcomm Inc., where
“Degradation mechanisms in CMOS power amplifiers subject to he was involved with high-voltage tolerant analog circuits, mixed-signal inte-
radio-frequency stress and comparison to the DC case,” in Proc. grated circuit (IC) design, and DAC behavioral modeling. His research inter-
45th Annual IEEE Int. Reliability Physics Symp. 2007, Apr. 15–19, ests include RF and millimeter-wave amplifier design and digital predistortion
2007, pp. 86–92. of PAs.
[17] S. Pornpromlikit, H. Dabag, B. Hanafi, J. Kim, L. E. Larson, J.
F. Buckwalter, and P. M. Asbeck, “A Q-band amplifier imple-
mented with stacked 45-nm CMOS FETs,” in Proc. IEEE Com-
pound Semiconductor Integrated Circuit Symp. (CSICS), Oct. 2011,
pp. 1–4. Bassel Hanafi received the B.Sc. degree in elec-
[18] G. T. Sasse, F. G. Kuper, and J. Schmitz, “MOSFET degradation tronics and communications and M.Sc. degree in
under RF stress,” IEEE Trans. Electron Devices, vol. 55, no. 11, pp. electronic engineering from Ain Shams University,
3167–3174, Nov. 2008. Cairo, Egypt, in 2005 and 2009, respectively, and
[19] Z. Xu, Q. June Gu, and M. Cheng, “A W-band current combined is currently working toward the Ph.D. degree at the
power amplifier with 14.8 dBm Psat and 9.4% maximum PAE in 65 University of California at San Diego, La Jolla, CA,
nm CMOS,” in Proc. IEEE RFIC, Jun. 2011, pp. 137–140. USA.
[20] S. Seki and H. Hasegawa, “Cross-tie slow-wave coplanar waveguide From 2005 to 2009, he was a Teaching and Re-
on semi-insulating GaAs substrates,” Electron. Lett., vol. 17, no. 25, search Assistant with the Electronics and Communi-
pp. 940–941, Dec. 1981. cations Engineering Department, Ain Shams Univer-
[21] C. Hsien-Chin and K. Bo-Yu, “High performance V-band GaAs power sity. From 2006 to 2009, he was an Analog/MS De-
amplifier and low noise amplifier using low-loss transmission line tech- sign Engineer with Si-Ware Systems, Cairo, Egypt. During the summer of 2010,
nology,” in Proc. Int. High Speed Intelligent Communication Forum he was an Intern with the Audio Group, Broadcom Corporation, Irvine, CA,
(HSIC), May 2012, pp. 1–4. USA. His research interests include RF/millimeter-wave transceiver design and
[22] T. Shun Dickson Cheung and J. R. Long, “Shielded passive devices for analog/MS circuits.
silicon-based monolithic microwave and millimeter-wave integrated
circuits,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183–1200,
May 2006.
[23] B. Wicks, E. Skafidas, and R. Evans, “A 60-GHz fully-integrated Do-
herty power amplifier based on 0.13- m CMOS process,” in Proc. Peter M. Asbeck (M’75–SM’97–F’00) received the
IEEE RFIC, Jul. 2008, pp. 69–72. B.S. and Ph.D. degrees from the Massachusetts Insti-
[24] J.-H. Tsai and T.-W. Huang, “A 38–46 GHz, MMIC Doherty power tute of Technology, Cambridge, MA, USA, in 1969
amplifier using post-distortion linearization,” IEEE Microw. Wireless and in 1975, respectively.
Compon. Lett., vol. 17, no. 5, pp. 388–390, May 2007. He was with the Sarnoff Research Center,
[25] U. R. Pfeiffer and D. Goren, “A 23-dBm 60-GHz distributed active Princeton, NJ, USA, and with Philips Labora-
transformer in a silicon process technology,” IEEE Trans. Microw. tory, Briarcliff Manor, NY, USA, where he was
Theory Tech., vol. 55, no. 5, pp. 857–865, May 2007. involved in the areas of quantum electronics and
[26] B. Martineau, V. Knopik, A. Siligaris, F. Gianesello, and D. Belot, GaAlAs/GaAs laser physics. In 1978, he joined
“A 53-to-68 GHz 18 dBm power amplifier with an 8-way combiner the Rockwell International Science Center, where
in standard 65 nm CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. he was involved in the development of high-speed
2010, pp. 428–429. devices and circuits using III-V compounds and heterojunctions. He pioneered
[27] J.-W. Lai and A. Valdes-Garcia, “A 1 V 17.9 dBm 60 GHz power am- efforts to develop heterojunction bipolar transistors based on GaAlAs/GaAs
plifier in standard 65 nm CMOS,” in IEEE ISSCC Dig. Tech. Papers, and InAlAs/InGaAs materials. In 1991, he joined the University of California
Feb. 2010, pp. 424–425. at San Diego, La Jolla, CA, USA, where he is the Skyworks Chair Professor of
[28] Y. Zhao and J. R. Long, “A wideband, dual-path, millimeter-wave the Department of Electrical and Computer Engineering. He has authored or
power amplifier with 20 dBm output power and PAE above 15% in coauthored over 350 publications. His research interests are in development of
130 nm SiGe-BiCMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 9, high-performance transistor technologies and their circuit applications.
pp. 1981–1997, Sep. 2012. Dr. Asbeck is a member of the National Academy of Engineering. He has
[29] Y.-N. Jen, J.-H. Tsai, T.-W. Huang, and H. Wang, “Design and anal- been a Distinguished Lecturer of the IEEE Electron Device Society and the
ysis of a 55–71-GHz compact and broadband distributed active trans- IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He was the
former power amplifier in 90-nm CMOS process,” IEEE Trans. Mi- recipient of the 2003 IEEE David Sarnoff Award for his work on heterojunction
crow. Theory Tech., vol. 57, no. 7, pp. 1637–1646, Jul. 2009. bipolar transistors and the 2012 IEEE MTT-S Distinguished Educator Award.
2350 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 10, OCTOBER 2013
James F. Buckwalter (S’01–M’06) received the Lawrence E. Larson (F’00) received the B.S.
Ph.D. degree in electrical engineering from the degree in electrical engineering from Cornell Uni-
California Institute of Technology, Pasadena, CA, versity, Ithaca, NY, USA, and the Ph.D. degree from
USA, in 2006. the University of California, Los Angeles, CA, USA
He is currently an Associate Professor of electrical (UCLA).
and computer engineering with the University of From 1980 to 1996 he was at Hughes Research
California at San Diego (UCSD), La Jolla, CA, USA. Laboratories, Malibu, CA, USA, where he directed
From 1999 to 2000, he was a Research Scientist the development of high-frequency microelectronics
with Telcordia Technologies. During Summer 2004, in GaAs, InP and Si/SiGe and MEMS technologies.
he was with the IBM T. J. Watson Research Center, He joined the faculty at the University of California
Yorktown Heights, NY, USA. In 2006, he joined at San Diego, La Jolla, CA, USA (UCSD), in 1996,
Luxtera, Carlsbad, CA, USA. In July 2006, he joined the faculty of UCSD as where he was the inaugural holder of the Communications Industry Chair. He
an Assistant Professor. was Director of the UCSD Center for Wireless Communications from 2001 to
Dr. Buckwalter was the recipient of a 2004 IBM Ph.D. Fellowship, the 2007 2006 and was Chair of the Department of Electrical and Computer Engineering
Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, from 2007 to 2011. He moved to Brown University, Providence, RI, USA, in
and the 2011 National Science Foundation (NSF) CAREER Award. 2011, where he is Founding Dean of the School of Engineering.
Dr. Larson was a recipient of the Hughes Sector Patent Award in 1994 for his
work on RF MEMS, co-recipient of the 1996 Lawrence A. Hyland Patent Award
of Hughes Electronics, for his work on low-noise millimeter-wave HEMTs,
co-recipient of the 1999 IBM Microelectronics Excellence Award for his work
in Si/SiGe HBT technology and co-recipient of the CICC Best Invited Paper
Award in 2005. He is on the Boards of Aethercomm, Tahoe RF and Black Sands
Technologies. He has published over 300 papers, co-authored three books, and
received over 40 U.S. patents.