N-CHANNEL POWER MOSFET SSH10N80A

FEATURES
BVDSS = 800V
• Avalanche Rugged Technology
RDS(ON) = 0.95Ω
• Rugged Gate Oxide Technology
• Lower Input Capacitance ID = 10A

• Improved Gate Charge

• Extended Safe Operating Area TO-3P
• Lower Leakage Current: 25µA (Max.) @ VDS = 800V
• Lower RDS(ON): 0.746Ω (Typ.)
1
2
3

1. Gate 2. Drain 3. Source

ABSOLUTE MAXIMUM RATINGS

Symbol Characteristics Value Units

VDSS Drain-to-Source Voltage 800 V
Continuous Drain Current (TC = 25°C) 10
ID A
Continuous Drain Current (TC = 100°C) 6.3
IDM Drain Current-Pulsed ① 40 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy ② 533 mJ
IAR Avalanche Current ① 10 A
EAR Repetitive Avalanche Energy ① 28 mJ
dv/dt Peak Diode Recovery dv/dt ③ 2.0 V/ns
Total Power Dissipation (TC = 25°C) 280 W
PD
Linear Derating Factor 2.22 W/°C
Operating Junction and Storage
TJ, TSTG −55 to +150
Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

THERMAL RESISTANCE

Symbol Characteristics Typ. Max. Units

RθJC Junction-to-Case − 0.45
RθCS Case-to-Sink 0.24 − °C/W
RθJA Junction-to-Ambient − 40

REV. B
1

 1999 Fairchild Semiconductor Corporation

SSH10N80A N-CHANNEL POWER MOSFET

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)

Symbol Characteristics Min. Typ. Max. Units Test Conditions

BVDSS Drain-Source Breakdown Voltage 800 − − V VGS=0V, ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. − 1.02 − V/°C ID=250µA, See Fig 7
VGS(th) Gate Threshold Voltage 2.0 − 3.5 V VDS=5V, ID=250µA
Gate-Source Leakage, Forward − − 100 VGS=30V
IGSS nA
Gate-Source Leakage, Reverse − − −100 VGS= −30V
− − 25 VDS=800V
IDSS Drain-to-Source Leakage Current µA
− − 250 VDS=640V, TC=125°C
Static Drain-Source
RDS(on) − − 0.95 Ω VGS=10V, ID=5A ④
On-State Resistance
gfs Forward Transconductance − 8.43 − S VDS=50V, ID=5A ④
Ciss Input Capacitance − 2700 3500 VGS=0V, VDS=25V
Coss Output Capacitance − 260 300 pF f=1MHz
Crss Reverse Transfer Capacitance − 110 130 See Fig 5

td(on) Turn-On Delay Time − 29 70

VDD=400V, ID=10A
tr Rise Time − 58 315
ns RG=9.6Ω
td(off) Turn-Off Delay Time − 152 235
See Fig 13 ④⑤
tf Fall Time − 48 105
Qg Total Gate Charge − 125 165 VDS=640V, VGS=10V
Qgs Gate-Source Charge − 19.2 − nC ID=10A
Qgd Gate-Drain (Miller) Charge − 45.4 − See Fig 6 & Fig 12 ④ ⑤

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS

Symbol Characteristics Min. Typ. Max. Units Test Conditions

IS Continuous Source Current − − 10 Integral reverse pn-diode
A
ISM Pulsed-Source Current ① − − 40 in the MOSFET

VSD Diode Forward Voltage ④ − − 1.4 V TJ=25°C, IS=10A, VGS=0V

trr Reverse Recovery Time − 620 − ns TJ=25°C, IF=10A
Qrr Reverse Recovery Charge − 10.17 − µC diF/dt=100A/µs ④

Notes:
① Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
② L=10mH, IAS=10A, VDD=50V, RG=27Ω, Starting TJ =25°C
③ ISD ≤ 10A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ =25°C
④ Pulse Test: Pulse Width ≤ 250µs, Duty Cycle ≤ 2%
⑤ Essentially Independent of Operating Temperature

2
N-CHANNEL POWER MOSFET SSH10N80A

Fig 1. Output Characteristics Fig 2. Transfer Characteristics

VGS
Top : 15 V
10 V
8.0 V
101 101

ID , Drain Current [A]

7.0 V
ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0
IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

1.5 101
RDS(on) , [ Ω ]

1.0
VGS = 20 V 100

0.5
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0.0 -1
10
0 10 20 30 40 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 160 V
Crss= Cgd 10
C iss VDS = 400 V
VGS , Gate-Source Voltage [V]

3000
VDS = 640 V
Capacitance [pF]

2000
5

@ Notes :
1000 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss
@ Notes : ID = 10.0 A
00 0
10 101 0 20 40 60 80 100 120 140
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]

3
SSH10N80A N-CHANNEL POWER MOSFET

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12

Operation in This Area

102 is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

9
10 µs
100 µs
101 1 ms
10 ms 6
DC

100 @ Notes : 3
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-1 0
101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

10- 1 0.2 @ Notes :

1. Zθ J C (t)=0.45 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 2 0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]

4
N-CHANNEL POWER MOSFET SSH10N80A

Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50K as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

1 BVDSS
LL EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time

5
SSH10N80A N-CHANNEL POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by
G

• IS controlled by Duty Factor ?

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop

6
TO-3P Package Dimensions

TO-3P (FS PKG CODE AF)

15.60 ±0.20
4.80 ±0.20
13.60 ±0.20

3.80 ±0.20
ø3.20 ±0.10 +0.15
9.60 ±0.20 1.50 –0.05

18.70 ±0.20
12.76 ±0.20

19.90 ±0.20

23.40 ±0.20
13.90 ±0.20

2.00 ±0.20
3.50 ±0.20

3.00 ±0.20
16.50 ±0.30

1.00 ±0.20 1.40 ±0.20

+0.15
0.60 –0.05
5.45TYP 5.45TYP
[5.45 ±0.30] [5.45 ±0.30]

Dimensions in Millimeters
August 1999, Rev B
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Definition of Terms

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In Design product development. Specifications may change in
any manner without notice.

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supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

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any time without notice in order to improve design.

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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.