LCD 17MB15

37” TFT TV
(17MB15)
SERVICE MANUAL
TABLE OF CONTENTS
1. INTRODUCTION ...................................................................................................................................... 1
2. TUNER...................................................................................................................................................... 1
3. IF PART (TDA9886) ................................................................................................................................. 1
4. MULTI STANDARD SOUND PROCESSOR ............................................................................................ 2
5. VIDEO SWITCH TEA6415 ....................................................................................................................... 2
6. AUDIO AMPLIFIER STAGE WITH TPA3002D2 ...................................................................................... 2
7. MICROCONTROLLER ............................................................................................................................. 3
8. EEPROM 24C32....................................................................................................................................... 3
9. CLASS AB STEREO HEADPHONE DRIVER TDA1308 ......................................................................... 3
10. SAW FILTERS.......................................................................................................................................... 3
11. IC DESCRIPTIONS .................................................................................................................................. 4
11.1. TEA6415C ......................................................................................................................................... 5
11.1.1. General Description ................................................................................................................. 5
11.1.2. Features .................................................................................................................................... 5
11.1.3. Pinning ...................................................................................................................................... 5
11.2. 24LC02 .............................................................................................................................................. 6
11.2.1. Description................................................................................................................................ 6
11.2.2. Features .................................................................................................................................... 6
11.2.3. Pinning ...................................................................................................................................... 6
11.3. TCET1102G Optocoupler.................................................................................................................. 7
11.3.2. General Features...................................................................................................................... 7
11.3.3. Applications.............................................................................................................................. 8
11.4. SVP-EX 52 ........................................................................................................................................ 8
11.5. TL431 ................................................................................................................................................ 8
11.5.2. Features..................................................................................................................................... 8
11.6. 24C32 ................................................................................................................................................ 8
11.6.2. Features .................................................................................................................................... 8
11.6.3. Pinning ...................................................................................................................................... 9
11.7. 74LVC14A ....................................................................................................................................... 10
11.7.1. Description.............................................................................................................................. 10
11.7.2. Features .................................................................................................................................. 10
11.7.3. Pinning .................................................................................................................................... 10
11.8. TEA6420.......................................................................................................................................... 11
11.8.1. Features .................................................................................................................................. 11
11.8.2. Description.............................................................................................................................. 11
11.8.3. Pin Connections ..................................................................................................................... 11
11.9. CS4334............................................................................................................................................ 11
11.9.1. Features .................................................................................................................................. 11
11.9.2. General Description ............................................................................................................... 11
11.9.3. Pin Descriptions ..................................................................................................................... 12
11.10. GAL16LV8 ....................................................................................................................................... 12
11.10.1. Description.............................................................................................................................. 12
11.10.2. Features .................................................................................................................................. 12
11.10.3. Pin connections...................................................................................................................... 13
11.11. K6R4008V1D................................................................................................................................... 13
11.11.1. Description.............................................................................................................................. 13
11.11.2. Features .................................................................................................................................. 13
11.11.3. Pin Description ....................................................................................................................... 14
11.12. L6562............................................................................................................................................... 14
11.12.1. Features .................................................................................................................................. 14
11.12.2. Description.............................................................................................................................. 14
11.12.3. Pin Connections and Descriptions ...................................................................................... 15
11.13. LM1117............................................................................................................................................ 15
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TFT TV Service Manual 11/04/2006
11.13.2. Features .................................................................................................................................. 15
11.13.3. Applications............................................................................................................................ 15
11.13.4. Connection Diagrams ............................................................................................................ 16
11.14. LM317.............................................................................................................................................. 16
11.14.2. Features .................................................................................................................................. 16
11.14.3. Pin Description ....................................................................................................................... 16
11.15. LM809.............................................................................................................................................. 16
11.15.2. Features .................................................................................................................................. 16
11.15.3. Pinning .................................................................................................................................... 17
11.16. MSP34X1G...................................................................................................................................... 17
11.16.1. Introduction ............................................................................................................................ 17
11.16.2. Features .................................................................................................................................. 18
11.16.3. Pin connections...................................................................................................................... 18
11.17. M29W040B...................................................................................................................................... 20
11.17.1. Description.............................................................................................................................. 20
11.17.2. Features .................................................................................................................................. 20
11.17.3. Pin Descriptions ..................................................................................................................... 21
11.18. MC33202 ......................................................................................................................................... 21
11.18.2. Features .................................................................................................................................. 21
11.18.3. Pin Connections ..................................................................................................................... 21
11.19. PCF8574 ......................................................................................................................................... 22
11.19.2. Features .................................................................................................................................. 22
11.19.3. Pinning .................................................................................................................................... 22
11.20. PI5V330........................................................................................................................................... 23
11.21. SDA55XX (SDA5550)...................................................................................................................... 23
11.21.1. General description ............................................................................................................... 23
11.22. Sil 9993............................................................................................................................................ 23
11.22.2. Features .................................................................................................................................. 24
11.23. NCP1014 ......................................................................................................................................... 24
11.23.2. Features .................................................................................................................................. 24
11.23.3. Pin Connections and Descriptions ...................................................................................... 25
11.24. SN74CB3Q3305.............................................................................................................................. 25
11.24.2. Features .................................................................................................................................. 25
11.24.3. Pin Connections ..................................................................................................................... 26
11.25. ST24LC21 ....................................................................................................................................... 26
11.25.1. Description.............................................................................................................................. 26
11.25.2. Features .................................................................................................................................. 26
11.25.3. Pin connections...................................................................................................................... 26
11.26. LM2576............................................................................................................................................ 27
11.26.2. Features .................................................................................................................................. 27
11.26.3. Pin description ....................................................................................................................... 27
11.27. TDA1308 ......................................................................................................................................... 27
11.27.2. Features .................................................................................................................................. 27
11.27.3. Pinning .................................................................................................................................... 28
11.28. TDA9886 ......................................................................................................................................... 28
11.28.2. Features .................................................................................................................................. 28
11.28.3. Pinning .................................................................................................................................... 28
11.29. TPA3002D2 ..................................................................................................................................... 29
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11.29.2. Features .................................................................................................................................. 29
11.29.3. Pinning .................................................................................................................................... 30
11.30. µPA672T.......................................................................................................................................... 31
11.30.2. Features .................................................................................................................................. 31
11.30.3. Pin Connection ....................................................................................................................... 31
11.31. VPC3230D....................................................................................................................................... 31
11.31.2. Pin Connections and Short Descriptions ............................................................................ 32
12. SERVICE MENU SETTINGS ................................................................................................................. 33
12.1. Picture Adjust .................................................................................................................................. 33
12.2. SOUND1.......................................................................................................................................... 34
12.3. SOUND 2......................................................................................................................................... 34
12.4. Options ............................................................................................................................................ 34
12.5. TV Norm .......................................................................................................................................... 35
12.6. Features .......................................................................................................................................... 35
12.7. Teletext............................................................................................................................................ 35
12.8. Source ............................................................................................................................................. 35
12.9. Menu Languages 1 & 2 ................................................................................................................... 35
13. BLOCK DIAGRAM.................................................................................................................................... 1
14. CIRCUIT DIAGRAM ................................................................................................................................. 1
15. CIRCUIT DIAGRAMS ............................................................................................................................... 3
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1. INTRODUCTION
37” TFT TV is a progressive TV control system with built-in de-interlacer and scaler. It uses a
1366*768 panel with 16:9 aspect ratio. The TV is capable of operation in PAL, SECAM, NTSC
(playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’ including
German and NICAM stereo. Sound system output is supplying 2x8W (10%THD) for stereo 8Ω
speakers. The chassis is equipped with many inputs and outputs allowing it to be used as a center of a
media system.
It supports following peripherals:

2 SCART sockets
1 AV input (CVBS + Stereo Audio)
1 SVHS input
1 Stereo Headphone input
1 Component input (YPbPr + Stereo Audio)
1 D-Sub 15 PC input
1 HDMI input
1 Stereo audio input for PC
Audio line out is taken from the scart with given scart-to-line out connector
2. TUNER
The tuners used in the design are combined VHF, UHF tuners suitable for CCIR systems B/G, H, L, L’,
I/I’, and D/K. The tuning is available through the digitally controlled I2C bus (PLL). Below you will find
info on one of the Tuners in use.
General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of
applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low
IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient
suppression of triple transient.
Features of UV1316:
1. Member of the UV1300 family small sized UHF/VHF tuners
2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K
3. Digitally controlled (PLL) tuning via I2C-bus
4. Off-air channels, S-cable channels and Hyper band
5. World standardised mechanical dimensions and world standard pinning
6. Compact size
7. Complies to “CENELEC EN55020” and “EN55013”
Pinning:
1. Gain control voltage (AGC) : 4.0V, Max: 4.5V
2. Tuning voltage
3. I²C-bus address select : Max: 5.5V
4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V
5. I²C-bus serial data : Min:-0.3V, Max: 5.5V
6. Not connected
7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V
8. ADC input
9. Tuner supply voltage : 33V, Min: 30V, Max: 35V
10. Symmetrical IF output 1
11. Symmetrical IF output 2
3. IF PART (TDA9886)
The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal
PLL. The following figure shows the simplified block diagram of the integrated circuit.
The integrated circuit comprises the following functional blocks:
VIF amplifier, Tuner and VIF-AGC, VIF-AGC detector, Frequency Phase-Locked Loop (FPLL) detector,
VCO and divider, Digital acquisition help and AFC, Video demodulator and amplifier, Sound carrier trap,
SIF amplifier, SIF-AGC detector, Single reference QSS mixer, AM demodulator, FM demodulator and
1
acquisition help, Audio amplifier and mute time constant, I²C-bus transceivers and MAD (module
address), Internal voltage stabilizer.
4. MULTI STANDARD SOUND PROCESSOR

The MSP34x1G family of single-chip Multistandard Sound Processors covers the sound processing of
all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound
processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on
a single chip.
These TV sound processing ICs include versions for processing the multichannel television sound
(MTS) signal conforming to the standard recommended by the Broadcast Television Systems
Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is
performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard
(EIA-J) and the FM Stereo Radio standard.
Current ICs have to perform adjustment procedures in order to achieve good stereo separation for
BTSC and EIA-J. The MSP34x1G has optimum stereo performance without any adjustments.
5. VIDEO SWITCH TEA6415

In case of three or more external sources are used, the video switch IC TEA6415 is used. The main
function of this device is to switch 8 video-input sources on the 6 outputs.
Each output can be switched on only one of each input. On each input an alignment of the lowest level
of the signal is made (bottom of sync. top for CVBS or black level for RGB signals).
Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment
is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used
as a normal input or as a MAC or Chroma input (with external Resistor Bridge). All the switching
possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible
to have the same input connected to several outputs.
6. AUDIO AMPLIFIER STAGE WITH TPA3002D2

The TPA3004D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo
speakers. The TPA3004D2 can drive stereo speakers as low as 8 Ω. The high efficiency of the
TPA3004D2 eliminates the need for external heatsinks when playing music.
Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a
range of gain from –40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are
also dc voltage controlled with a range of gain from –56 dB to 20 dB.
An integrated 5-V regulated supply is provided for powering an external headphone amplifier.
2
7. MICROCONTROLLER
The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and
provides dedicated graphic features designed for modern low class to mid range TV sets. The SDA
55xx provides also an integrated general purposefully 8051-compatible microcontroller with specific
hardware features especially suitable in TV sets. The microcontroller core has been enhanced to
provide powerful features such as memory banking, data pointers and additional interrupts, etc. The
internal XRAM consists of up to 16 kBytes. The microcontroller provides an internal ROM of up to 128
kBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The 8-bit
microcontroller runs at 33.33 MHz internal clock. SDA 55xx is realized in 0.25 micron technology with
2.5 V supply voltage for the core and 3.3 V for the I/O port pins to make them TTL compatible. Based
on the SDA 55xx microcontroller the MINTS software package was developed and provides dedicated
device drivers for many Micronas video & audio products and includes a full blown TV control SW for
the PEPER application chassis. The SDA 55xx is also supported with powerful design tools like
emulators from Hitex, Kleinhenz, iSystems, the Keil C51 Compiler and TEDIpro OSD development SW
by Tara Systems.
8. EEPROM 24C32
The Microchip Technology Inc. 24C32 is a 4Kx8 (32 Kbit) Electrically Erasable PROM. This device has
been developed for advanced, low power applications such as personal communications or data
acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte
pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that
changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K
boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits
address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code
and data applications.
9. CLASS AB STEREO HEADPHONE DRIVER TDA1308
The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package.
The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital
audio applications.
10. SAW FILTERS

K9656M:
Standard:
• B/G
• D/K
•I
• L/L’
Features
• TV IF audio filter with two channels
• Channel 1 (L’) with one pass band for sound carriers at 40.40 MHz (L’) and 39.75 MHz (L’- NICAM)
• Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32.35 MHz and 33.40 MHz
Terminals
• Tinned CuFe alloy
Pin configuration
1 Input
2 Switching input
3 Chip carrier - ground
4 Output
5 Output
K3958M:
Standard:
• B/G
• D/K
•I
• L/L’
3
Features
• TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz
• Constant group delay
Terminals
Tinned CuFe alloy
Pin configuration
1 Input
2 Input - ground
3 Chip carrier - ground
4 Output
5 Output
11. IC DESCRIPTIONS
TEA6415C
24LC02
4MX32 DDR SDRAM (128M)
TCET1102G OPTOCOUPLER
SVP-EX 52
TL431
24C32
74LVC14A
TEA6420D
CS4334
GAL16LV8
K6R4008V1
L6562D
LM1086
LM1117
LM317T
LM809
MSP3410G
M29W040B
MC33202
PCF8574
PI5V330
SDA5550
SG3525
SII9993
NCP1014
SN74CB3Q3305
ST24LC21
LM2576
MC34063
TDA1308
TDA9886T
TPA3002D2
µPA672T
VPC3230D
4
11.1. TEA6415C
11.1.1. General Description

The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be
switched on only one of each input. On each input an alignment of the lowest level of the signal is made
(bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input
and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an
external resistor bridge, 5 VDC on the input. Each input can be used as a normal input or as a MAC or
Chroma input (with external resistor bridge). All the switching possibilities are changed through the
BUS. Driving 75Ω load needs an external transistor. It is possible to have the same input connected to
several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In
this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16
bits is necessary to determine one configuration.
11.1.2. Features
• 20MHz Bandwidth
• Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage)
• 8 Inputs (CVBS, RGB, MAC, CHROMA,...)
• 6 Outputs
• Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor
bridge
• Bus controlled
• 6.5dB gain between any input and output
• 55dB crosstalk at 5mHz
• Fully ESD protected
11.1.3. Pinning
1. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
2. Data : Low level : -0.3V Max: 1.5V,
High level : 3.0V Max : Vcc+0.5V
4. Clock : Low level : -0.3V Max: 1.5V,
High level : 3.0V Max : Vcc+0.5V
7. Prog
8. Input : Max : 2Vpp, Input Current: 1mA, Max: 3mA
9. Vcc : 12V
12. Ground
13. Output : 5.5Vpp, Min : 4.5Vpp
19. Ground
20. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA
5
11.2. 24LC02
11.2.1. Description
The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM.
The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.8V, with standby and active currents of only 1µA and 1mA,
respectively. The 24XX02 also has a page write capability for up to 8 bytes of data.
11.2.2. Features
• Single supply with operation down to 1.8V
• Low-power CMOS technology
-1mA active current typical
-1µA standby current typical (I-temp)
• Organized as 1 block of 256 bytes (1 x 256 x 8)
• 2-wire serial interface bus, I2C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 8 bytes
• 2ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• 5-lead SOT-23 package
• Pb-free finish available
• Available for extended temperature ranges:
-Industrial (I): -40°C to +85°C
-Automotive (E): -40°C to +125°C
11.2.3. Pinning
6
11.3. TCET1102G Optocoupler

The TCET110. / TCET2100/ TCET4100 consist of a phototransistor optically coupled to a gallium
arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package.
The elements are mounted on one lead frame using a coplanar technique, providing a fixed distance
between input and output for highest safety requirements.
11.3.2. General Features

• CTR offered in 9 groups
• Isolation materials according to UL94-VO
• Pollution degree 2
(DIN/VDE 0110 / resp. IEC 664)
• Climatic classification 55/100/21 (IEC 68 part 1)
• Special construction:
• Therefore, extra low coupling capacity of typical 0.2 pF, high Common Mode Rejection
• Low temperature coefficient of CTR
• G=Leadform10.16mm; provides creepage distance > 8 mm,
for TCET2100/ TCET4100 optional;
• suffix letter 'G' is not marked on the optocoupler
• Coupling System U
7
11.3.3. Applications
Circuits for safe protective separation against electrical shock according to safety class II (reinforced
isolation):
For appl. class I – IV at mains voltage ≤300 V
For appl. class I – III at mains voltage ≤600 V
According to VDE 0884, table 2, suitable for: Switch-mode power supplies, line receiver, computer
peripheral interface, microprocessor system interface.
11.4. SVP-EX 52

SVP EX52 supports two CVBS and one Svideo,two HD YPbPr component or PC RGB input and one
24-bit digital input ports.Supports HD YPbPr de-interlacing mode and 3D-comb video mode.
LVDS "single" port is built-in, supporting output resolution up to SXGA, 1280x1024x60P.
11.5. TL431

The TL431/TL431Aare three-terminal adjustable regulator series with a guaranteed thermal stability
over applicable temperature ranges. The output voltage may be set to any value between Vref
(approximately 2.5 volts) and 36 volts with two external resistors These devices have a typical dynamic
output impedance of 0.2W Active output circuitry provides a very sharp turn-on characteristic, making
these devices excel lent replacement for zener diodes in many applications.
11.5.2. Features
• Programmable Output Voltage to 36 Volts
• Low Dynamic Output Impedance 0.20 Typical
• Sink Current Capability of 1.0 to 100mA
• Equivalent Full-Range Temperature Coefficient of
50ppm/°C Typical
• Temperature Compensated For Operation Over Full Rated
Operating Temperature Range
• Low Output Noise Voltage
• Fast Turn-on Response
11.6. 24C32

The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This
device has been developed for advanced, low power applications such as personal communications or
data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte
pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that
changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K
boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits
address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code
and data applications.
11.6.2. Features
• Voltage operating range: 4.5V to 5.5V
- Peak write current 3 mA at 5.5V
- Maximum read current 150µA at 5.5V
- Standby current 1µA typical
• Industry standard two-wire bus protocol, I2C™ compatible
-Including 100 kHz and 400 kHz modes
• Self-timed write cycle (including auto-erase)
• Power on/off data protection circuitry
• Endurance:
8
- 10,000,000 Erase/Write cycles guaranteed for High Endurance Block
- 10,000,000 E/W cycles guaranteed for Standard Endurance Block
• 8 byte page, or byte modes available
• 1 page x 8 line input cache (64 bytes) for fast write
loads
• Schmitt trigger, filtered inputs for noise suppression
• Output slope control to eliminate ground bounce
• 2 ms typical write cycle time, byte or page
• Up to 8 chips may be connected to the same bus for up to 256K bits total memory
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• Temperature ranges:
-Commercial (C): 0°C to +70°C
-Industrial (I): -40°C to +85°C
11.6.3. Pinning
PIN Function Table
PIN DESCRIPTIONS
A0, A1, A2 Chip Address Inputs
The A0...A2 inputs are used by the 24C32 for multiple device operation and conform to the two-wire
bus standard. The levels applied to these pins define the address block occupied by the device in the
address map. A particular device is selected by transmitting the corresponding bits (A2, A1, and A0) in
the control byte.
SDA Serial Address/Data Input/Output
This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an
open drain terminal; therefore the SDA bus requires a pull-up resistor to VCC (typical 10KQ for 100
kHz, 1KQ for 400 kHz).
9
For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are
reserved for indicating the START and STOP conditions.
SCL Serial Clock
This input is used to synchronize the data transfer from and to the device.
11.7. 74LVC14A
11.7.1. Description
The 74LVC14A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5V devices. This
feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. The
74LVC14A provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
11.7.2. Features
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard no.8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V
MM EIA/JESD22-A115-A exceeds 200V.
• Specified from -40 to +85C and -40 to +125C.
11.7.3. Pinning
10
11.8. TEA6420
11.8.1. Features
• 5 Stereo Inputs
• 4 Stereo Outputs
• Gain Control 0/2/4/6dB/Mute for each Output
• Cascadable (2 different addresses)
• Serial Bus Controlled
• Very low Noise
• Very low Distortion
11.8.2. Description
The TEA6420 switches 5 stereo audio inputs on4stereo outputs. All the switching possibilities are
changed through the I2C bus.
11.8.3. Pin Connections
11.9. CS4334
11.9.1. Features
• Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering
• 24-Bit Conversion
• 96 dB Dynamic Range
• -88 dB THD+N
• Low Clock Jitter Sensitivity
• Single +5V Power Supply
• Filtered Line Level Outputs
• On-Chip Digital De-emphasis
• Popgaurd® Technology
• Functionally Compatible with CS4330/31/33

The CS4334 family members are complete, stereo digital-to-analog output systems including
interpolation, 1-bitD/A conversion and output analog filtering in an 8-pinpackage. The CS4334/5/6/7/8/9
support all major audio data interface formats, and the individual devices differ only in the supported
interface format. The CS4334 family is based on delta-sigma modulation, where the modulator output
controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for
infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock
frequency. The CS4334 family contains on-chip digital de-emphasis, operates from a single +5V power
supply, and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players,
SVCD players, and A/V receivers.
11
11.9.3. Pin Descriptions
11.10. GAL16LV8
11.10.1. Description
The GAL16LV8D, at 3.5 ns maximum propagation delay time, provides the highest speed performance
available in the PLD market. The GAL16LV8C can interface with both 3.3V and 5Vsignal levels. The
GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which
combines CMOS with Electrically Erasable (E2) floating gate technology. High speed erase times
(<100ms) allow the devices to be reprogrammed quickly and efficiently.
The 3.3V GAL16LV8 uses the same industry standard 16V8 architecture as its 5V counterpart and
supports all architectural features such as combinatorial or registered macrocell operations.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during
manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality
of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are
specified.
11.10.2. Features
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
- 3.5 ns Maximum Propagation Delay
- Fmax = 250 MHz
- 2.5 ns Maximum from Clock Input to Data Output
- UltraMOS® Advanced CMOS Technology
• 3.3V LOW VOLTAGE 16V8 ARCHITECTURE
- JEDEC-Compatible 3.3V Interface Standard
- 5V Compatible Inputs
- I/O Interfaces with Standard 5V TTL Devices (GAL16LV8C)
• ACTIVE PULL-UPS ON ALL PINS (GAL16LV8D Only)
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
12
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Glue Logic for 3.3V Systems
- DMA Control
- State Machine Control
- High Speed Graphics Processing
- Standard Logic Speed Upgrade
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
• LEAD-FREE PACKAGE OPTIONS
11.10.3. Pin connections
11.11. K6R4008V1D
The K6R4008V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288
words by 8 bits. TheK6R4008V1D uses 8 common input and output lines and has an output enable pin
which operates faster than address access time at read cycle. The device is fabricated using
SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology. It is particularly
well suited for use in high-density high-speed system applications. The K6R4008V1D is packaged in a
400 mil 36-pin plastic SOJ and 44-pin plastic TSOP type II.
11.11.2. Features
• Fast Access Time 8, 10ns(Max.)
• Low Power Dissipation
- Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
- Operating K6R4008V1D-08 : 80mA(Max.)
K6R4008V1D-10 : 65mA(Max.)
• Single 3.3 ±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
K6R4008V1D-J : 36-SOJ-400
K6R4008V1D-K : 36-SOJ-400(Lead-Free)
K6R4008V1D-T : 44-TSOP2-400BF
K6R4008V1D-U : 44-TSOP2-400BF(Lead-Free)
• Operating in Commercial and Industrial Temperature range.
13
11.11.3. Pin Description
11.12. L6562
11.12.1. Features
• TRANSITION-MODE CONTROL OF PFC PRE-REGULATORS
• PROPRIETARY MULTIPLIER DESIGN FOR MINIMUM THD OF AC INPUT CURRENT
• VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION
• ULTRA-LOW (≤70µA) START-UP CURRENT
• LOW (≤4 mA) QUIESCENT CURRENT
• EXTENDED IC SUPPLY VOLTAGE RANGE
• ON-CHIP FILTER ON CURRENT SENSE
• DISABLE FUNCTION
• 1% (@ Tj = 25 °C) INTERNAL REFERENCE VOLTAGE
The L6562 is a current-mode PFC controller operating in Transition Mode (TM). Pin-to-pin compatible
with the predecessor L6561, it offers improved performance. The highly linear multiplier includes a
special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with
an extremely low THD, even over a large load range.
14
11.12.3. Pin Connections and Descriptions
11.13. LM1117

The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load
current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is
available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two
external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is available in SOT-
223, TO-220, and TO-252 D-PAK packages. A minimum of 10µF tantalum capacitor is required at the
output to improve the transient response and stability.
11.13.2. Features
• Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
• Space Saving SOT-223 Package
• Current Limiting and Thermal Protection
• Output Current 800mA
• Line Regulation 0.2% (Max)
• Load Regulation 0.4% (Max)
• Temperature Range
— LM1117 0°C to 125°C
— LM1117I -40°C to 125°C
11.13.3. Applications
• 2.85V Model for SCSI-2 Active Termination
• Post Regulator for Switching DC/DC Converter
• High Efficiency Linear Regulators
• Battery Charger
• Battery Powered Instrumentation
15
11.13.4. Connection Diagrams
11.14. LM317

This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to
supply more than 1.5A of load current with an output voltage adjustable over a 1.2 to 37V. It employs
internal current limiting, thermal shut-down and safe area compensation.
11.14.2. Features
• Output Current In Excess of 1.5A
• Output Adjustable Between 1.2V and 37V
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe Operating Area Compensation
• TO-220 Package
11.14.3. Pin Description
11.15. LM809

The LM809/810 microprocessor supervisory circuits can be used to monitor the power supplies in
microprocessor and digital systems. They provide a reset to the microprocessor during power-up,
power-down and brown-out conditions. The function of the LM809/810 is to monitor the VCC supply
voltage, and assert a reset signal whenever this voltage declines below the factory-programmed reset
threshold. The reset signal remains asserted for 240 ms after VCC rises above the threshold. The
LM809 has an active-low RESET output, while the LM810 has an active-high RESET output. Seven
standard reset voltage options are available, suitable for monitoring 5V, 3.3V, and 3V supply voltages.
With a low supply current of only 15µA, the LM809/810 are ideal for use in portable equipment.
11.15.2. Features
• Precise monitoring of 3V, 3.3V, and 5V supply voltages
• Superior upgrade to MAX809/810
• Fully specified overtemperature
• 140 ms min. Power-On Reset pulse width, 240 ms typical
Active-low RESET Output(LM809)
Active-high RESET Output(LM810)
16
• Guaranteed RESET Output valid for VCC≥1V
• Low Supply Current, 15µAtyp
• Power supply transient immunity
11.15.3. Pinning
11.16. MSP34X1G
Multistandard Sound Processor Family
11.16.1. Introduction
The MSP 34x1G family of single-chip Multistandard Sound Processors covers the sound processing of
all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound
processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on
a single chip. Figure shows a simplified functional block diagram of the MSP 34x1G.
The MSP 34x1G has all functions of the MSP 34x0G with the addition of a virtual surround sound
feature.
Surround sound can be reproduced to a certain extent with two loudspeakers. The MSP 34x1G
includes the Micronas virtualizer algorithm “3D-PANORAMA” which has been approved by the Dolby 1)
Laboratories for with the "Virtual Dolby Surround" technology. In addition, the MSP 34x1G includes the
“PAN-ORAMA” algorithm.
These TV sound processing ICs include versions for processing the multichannel television sound
(MTS) signal conforming to the standard recommended by the Broadcast Television Systems
Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is
performed alignment free.
Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo
Radio standard.
Current ICs have to perform adjustment procedures in order to achieve good stereo separation for
BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments.
The MSP 34x1G has built-in automatic functions: The IC is able to detect the actual sound standard
automat-ically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can
be evaluated internally with subsequent switching between mono/stereo/bilingual; no I 2 C interaction is
necessary (Automatic Sound Selection).
17
Source Select
I2S bus interface consists of five pins:
1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling
cycle (32 kHz) are transmitted.
2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32 kHz) are transmitted.
3. I2S_CL: Gives the timing for the transmission of I2S serial data (1.024 MHz).
4. I2S_WS: The I2S_WS word strobe line defines the left and right sample.
11.16.2. Features
• Standard Selection with single I2C transmission
• Automatic Standard Detection of terrestrial TV standards
• Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS
• Two selectable sound IF (SIF) inputs
• Automatic Carrier Mute function
• Interrupt output programmable (indicating status change)
• Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness
• AVC: Automatic Volume Correction
• Subwoofer output with programmable low-pass and complementary high-pass filter
• 5-band graphic equalizer for loudspeaker channel
• Spatial effect for loudspeaker channel
• Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs
• Complete SCART in/out switching matrix
• Two I2S inputs; one I2S output
• Dolby Pro Logic with DPL 351xA coprocessor
• All analog FM-Stereo A2 and satellite standards; AM-SECAM L standard
• Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM
• Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification)
• ASTRA Digital Radio (ADR) together with DRP 3510A
• All NICAM standards
• Korean FM-Stereo A2 standard

NC = not connected; leave vacant
LV = if not used, leave vacant
OBL = obligatory; connect as described in circuit diagram
DVSS: if not used, connect to DVSS
AHVSS: connect to AHVSS
18
Connection
Pin No. Pin Name Type Short Description
(if not used)
PLCC PSDIP PSDIP PQFP PLQFP
68-pin 64-pin 52-pin 80-pin 64-pin
1 16 14 9 8 ADR_WS OUT LV ADR word strobe
2 - - - - NC LV Not connected
3 15 13 8 7 ADR_DA OUT LV ADR Data Output
2
4 14 12 7 6 I2S_DA_IN1 IN LV I S1 data input
2
5 13 11 6 5 I2S_DA_OUT OUT LV I S data output
2
6 12 10 5 4 I2S_WS IN/OUT LV I S word strobe
2
7 11 9 4 3 I2S_CL IN/OUT LV I S clock
2
8 10 8 3 2 I2C_DA IN/OUT OBL I C data
2
9 9 7 2 1 I2C_CL IN/OUT OBL I C clock
10 8 - 1 64 NC LV Not connected
11 7 6 80 63 STANDBYQ IN OBL Stand-by (low-active)
2
12 6 5 79 62 ADR_SEL IN OBL I C bus address select
13 5 4 78 61 D_CTR_I/O_0 IN/OUT LV D_CTR_I/O_0
14 4 3 77 60 D_CTR_I/O_1 IN/OUT LV D_CTR_I/O_1
17 - - - - NC LV Not connected
Audio clock output
18 1 2 74 57 AUD_CL_OUT OUT LV
(18.432 MHz)
19 64 1 73 56 TP LV Test pin
20 63 52 72 55 XTAL_OUT OUT OBL Crystal oscillator
21 62 51 71 54 XTAL_IN IN OBL Crystal oscillator
22 61 50 70 53 TESTEN IN OBL Test pin
IF Input 2 (can be left
AVSS via
23 60 49 69 52 ANA_IN2+ IN vacant, only if IF input 1 is
56 pF/LV
also not in use)
IF common (can be left
AVSS via
24 59 48 68 51 ANA_IN- IN vacant, only if IF input 1 is
56 pF/LV
also not in use)
25 58 47 67 50 ANA_IN1+ IN LV IF input 1
26 57 46 66 49 AVSUP OBL Analog power supply 5V
- - - 65 - AVSUP OBL Analog power supply 5V
- - - 64 - NC LV Not connected
27 56 45 62 48 AVSS OBL Analog ground
- - - 61 - AVSS OBL Analog ground
28 55 44 60 47 MONO_IN IN LV Mono input
Reference voltage IF A/D
29 54 43 58 46 VREFTOP OBL
converter
30 53 42 57 45 SC1_IN_R IN LV SCART 1 input, right
31 52 41 56 44 SC1_IN_L IN LV SCART 1 input, left
32 51 - 55 43 ASG1 AHVSS Analog Shield Ground 1
39 44 - 48 36 SC4_IN_R IN LV SCART 4 input, right
40 43 - 47 35 SC4_IN_L IN LV SCART 4 input, left
41 - - 46 - NC LV or AHVSS Not connected
42 42 36 45 34 AGNDC OBL Analog reference voltage
43 41 35 44 33 AHVSS OBL Analog ground
- - - 43 - AHVSS OBL Analog ground
44 40 34 40 32 CAPL_M OBL Volume capacitor MAIN
45 39 33 39 31 AHVSUP OBL Analog power supply 8V
46 38 32 38 30 CAPL_A OBL Volume capacitor AUX
47 37 31 37 29 SC1_OUT_L OUT LV SCART output 1, left
48 36 30 36 28 SC1_OUT_R OUT LV SCART output 1, right
49 35 29 35 27 VREF1 OBL Reference ground 1
50 34 28 34 26 SC2_OUT_L OUT LV SCART output 2, left
51 33 27 33 25 SC2_OUT_R OUT LV SCART output 2, right
52 - - 32 - NC LV Not connected
54 31 26 30 23 DACM_SUB OUT LV Subwoofer output
19
56 29 25 28 21 DACM_L OUT LV Loudspeaker out, left
57 28 24 27 20 DACM_R OUT LV Loudspeaker out, right
58 27 23 26 19 VREF2 OBL Reference ground 2
59 26 22 25 18 DACA_L OUT LV Headphone out, left
60 25 21 24 17 DACA_R OUT LV Headphone out, right
61 24 20 21 16 RESETQ IN OBL Power-on-reset
64 21 19 18 13 NC LV Not connected
2
65 20 18 17 12 I2S_DA_IN2 IN LV I S2-data input
66 19 17 16 11 DVSS OBL Digital ground
- - - 15 - DVSS OBL Digital ground
- - - 14 - DVSS OBL Digital ground
67 18 16 13 10 DVSUP OBL Digital power supply 5V
- - - 12 - DVSUP OBL Digital power supply 5V
- - - 11 - DVSUP OBL Digital power supply 5V
68 17 15 10 9 ADR_CL OUT LV ADR clock
11.17. M29W040B
The M29W040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and
reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or
EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into
blocks that can be erased independently so it is possible to preserve valid data while old data is erased.
Each block can be protected independently to prevent accidental Program or Erase commands from
modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the
memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the
memory by taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error conditions identified. The
command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output
Enable and Write Enable signals control the bus operation of the memory. They allow simple
connection to most microprocessors, often without additional logic.
11.17.2. Features
• SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS
• ACCESS TIME: 55ns
• PROGRAMMING TIME
- 10µs per Byte typical8
• UNIFORM 64 Kbytes MEMORY BLOCKS
• PROGRAM/ERASE CONTROLLER
- Embedded Byte Program algorithm
- Embedded Multi-Block/Chip Erase algorithm
- Status Register Polling and Toggle Bits
• ERASE SUSPEND and RESUME MODES
- Read and Program another Block during Erase Suspend
• UNLOCK BYPASS PROGRAM COMMAND
- Faster Production/Batch Programming
• LOW POWER CONSUMPTION
- Standby and Automatic Standby
• 100,000 PROGRAM/ERASE CYCLES per BLOCK
• 20 YEARS DATA RETENTION
- Defectivity below 1 ppm/year
• ELECTRONIC SIGNATURE
- Manufacturer Code: 20h
- Device Code: E3h
20
11.17.3. Pin Descriptions
11.18. MC33202

The MC33201/2/4 family of operational amplifiers provide rail−to−rail operation on both the input and
output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on
the outputs, and the output can swing within 50 mV of each rail. This rail−to−rail operation enables the
user to make full use of the supply voltage range available. It is designed to work at very low supply
voltages (±0.9 V) yet can operate with a supply of up to +12V and ground. Output current boosting
techniques provide a high output current capability while keeping the drain current of the amplifier to a
minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability
make this an ideal amplifier for audio applications.
11.18.2. Features
• Low Voltage, Single Supply Operation (+1.8 V and Ground to +12 V and Ground)
• Input Voltage Range Includes both Supply Rails
• Output Voltage Swings within 50 mV of both Rails
• No Phase Reversal on the Output for Over−driven Input Signals
• High Output Current (ISC = 80 mA, Typ)
• Low Supply Current (ID = 0.9 mA, Typ)
• 600 Ω Output Drive Capability
• Extended Operating Temperature Ranges (−40° to +105°C and −55° to +125°C)
• Typical Gain Bandwidth Product = 2.2 MHz
• Pb−Free Packages are Available
21
11.19. PCF8574

The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most
microcontroller families via the two-line bidirectional bus (I2C).The device consists of an 8-bit quasi-
bidirectional port and an I2C-bus interface. The PCF8574 has a low current consumption and includes
latched outputs with high current drive capability for directly driving LEDs. It also possesses an interrupt
line (INT) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt
signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports
without having to communicate via the I2C-bus. This means that the PCF8574 can remain a simple
slave device.
11.19.2. Features
• Operating supply voltage 2.5 to 6V
• Low standby current consumption of 10 µA maximum
• I2C to parallel port expander
• Open-drain interrupt output
• 8-bit remote I/O port for the I2C-bus
• Compatible with most microcontrollers
• Latched outputs with high current drive capability for directly driving LEDs
• Address by 3 hardware address pins for use of up to 8 devices (up to 16 with PCF8574A)
• DIP16, or space-saving SO16 or SSOP20 packages.
11.19.3. Pinning
22
11.20. PI5V330

The PI5V330 is well suited for video applications when switching composite or RGB analogue. A
picture-in-picture application will be described in this brief. The pixel-rate creates video overlays so two
or more pictures can be viewed at the same time. An inexpensive NTSC titler can be implemented by
superimposing the output of a character generator on a standard composite video background.
11.21. SDA55XX (SDA5550)
11.21.1. General description

The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling
(WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption
acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible
Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide
powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip
display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen
displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes.
ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a
wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX
and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5
TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented
characters (DRCS).
The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does
most of the internal TTX acquisition processing, transfers data to/from external memory interface and
receives/ transmits data via I2C-firmware user-interface. The slicer combined with dedicated hardware
stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition
tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field.
Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP
and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized
in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and
hardware development environment (TEAM) is available to simplify and speed up the development of
the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the
TV controller software quality in following aspects:
– Shorter time to market
– Re-usability
– Target independent development
– Verification and validation before targeting
– General test concept
– Graphical interface design requiring minimum programming and controller know how.
– Modular and open tool chain, configurable by customer.
11.22. Sil 9993

The SiI 9993 is the first generation of PanelLink receivers that are designed for the HDMI 1.0 (High
Definition Multimedia Interface) specification. DTVs, plasma displays, LCD TVs and projectors can now
provide the purest level of protected digital audio/video over a simple, low cost cable. Backwards
compatibility with DVI 1.0 allows HDMI systems to connect to any DVI 1.0 host (DVD players, HD set
top boxes, D-VHS players and receivers, PC). The SiI 9993 incorporates a flexible audio and video
interface. The receiver can connect to RGB input and output YCbCr using an integrated color space
converter. This allows full backward compatibility to DVI, and interfaces to all major video processors.
A S/PDIF port can output PCM encoded data as well as Dolby Digital, DTS and all other formats
capable of being sent over S/PDIF. A 2-channel I2S port outputs data converted from S/PDIF. The SiI
9993 comes pre-programmed with HDCP keys, greatly simplifying the manufacturing process, lowering
costs, all the while providing the highest level of HDCP key security. Silicon Image’s PanelLink
23
receivers use the latest generation of PanelLink TMDS core technology. These PanelLink cores pass
all HDMI compliancy tests.
11.22.2. Features
• HDMI 1.0 and DVI 1.0 compliant receiver
• Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i)
• Digital video interface supports video processors:
o 24-bit RGB 4:4:4
o 24-bit YCbCr 4:4:4
o 16/20/24-bit YCbCr 4:2:2
o 8/10/12-bit YCbCr 4:2:2 embedded syncs
• Analog RGB and YPbPr output:
o 10-bit DAC
o Separate or Composite Syncs (Sync on G)
• S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-48kHz Fs) using IEC
60958 and IEC 61937.
• Programmable I2S interface for connection to low-cost audio DACs.
• Integrated HDCP decryption engine for receiving protected audio and video content
• Pre-programmed HDCP keys provide highest level of key security, simplifies manufacturing
• Programmable registers via slave I2C interface
• 3.3V operation in 100-pin TQFP package
• Flexible power management
11.23. NCP1014

The NCP101X series integrates a fixed−frequency current−modecontroller and a 700 V MOSFET.
Housed in a PDIP−7 or SOT−223package, the NCP101X offers everything needed to build a rugged
and low−cost power supply, including soft−start, frequency jittering, short−circuit protection, skip−cycle,
a maximum peak current setpoint and a Dynamic Self−Supply (no need for an auxiliary winding). Unlike
other monolithic solutions, the NCP101X is quiet by nature: during nominal load operation, the part
switches at one of the available frequencies (65−100−130 kHz). When the current setpoint falls below a
given value, e.g. the output power demand diminishes, the IC automatically enters the so−called skip
cycle mode and provides excellent efficiency at light loads. Because this occurs at typically 1/4 of the
maximum peak value, no acoustic noise takes place. As a result, standby power is reduced to the
minimum without acoustic noise generation. Short−circuit detection takes place when the feedback
signal fades away, e.g. in true short−circuit conditions or in broken Optocoupler cases. External
disabling is easily done either simply by pulling the feedback pin down or latching it to ground through
an inexpensive SCR for complete latched−off. Finally soft−start and frequency jittering further ease the
designer task to quickly develop low−cost and robust offline power supplies. For improved standby
performance, the connection of an auxiliary winding stops the DSS operation and helps to consume
less than100 mW at high line. In this mode, a built−in latched overvoltage protection prevents from
lethal voltage runaways in case the Optocoupler would brake.
11.23.2. Features
• Built−in 700 V MOSFET with Typical RDSon of 11 Ω and 22 Ω
• Large Creepage Distance Between High−Voltage Pins
• Current−Mode Fixed Frequency Operation: 65 kHz–100 kHz−130 kHz
• Skip−Cycle Operation at Low Peak Currents Only: No Acoustic Noise!
• Dynamic Self−Supply, No Need for an Auxiliary Winding
• Internal 1.0 ms Soft−Start
• Latched Overvoltage Protection with Auxiliary Winding Operation
• Frequency Jittering for Better EMI Signature
• Auto−Recovery Internal Output Short−Circuit Protection
• Below 100 mW Standby Power if Auxiliary Winding is Used
• Internal Temperature Shutdown
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
24
11.23.3. Pin Connections and Descriptions
11.24. SN74CB3Q3305

The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate
voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-
state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data
input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive
loading and signal distortion on the data bus. Specifically designed to support high-bandwidth
applications, the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband
communications, networking, and data-intensive computing systems.
11.24.2. Features
• High-Bandwidth Data Path (Up To 500 MHz)
• 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
• Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Ω Typical)
• Rail-to-Rail Switching on Data I/O Ports
− 0- to 5-V Switching With 3.3-V VCC
− 0- to 3.3-V Switching With 2.5-V VCC
• Bidirectional Data Flow, With Near-Zero Propagation Delay
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
• Fast Switching Frequency (fOE = 20 MHz Max)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (ICC = 0.25 mA Typical)
• VCC Operating Range From 2.3 V to 3.6 V
• Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
• Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
• ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model (A114-B, Class II)
25
− 1000-V Charged-Device Model (C101)
• Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus
Isolation, Low-Distortion Signal Gating
11.25. ST24LC21
The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits.
This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered,
the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal
applied on VCLK. The device will switch to the I2C bidirectional mode upon the falling edge of the signal
applied on SCL pin. The ST24LC21 can not switch from the I2C bidirectional mode to the Transmit Only
mode (except when the power supply is removed). The device operates with a power supply value as
low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.
11.25.2. Features
• 1 million Erase/Write cycles
• 40 years data retention
• 2.5V to 5.5V single supply voltage
• 400k Hz compatibility over the full range of supply voltage
• Two wire serial interface I2C bus compatible
• Page Write (Up To 8 Bytes)
• Byte, random and sequential read modes
• Self timed programming cycle
• Automatic address incrementing
• Enhanced ESD/Latch up
• Performances
DIP Pin connections CO Pin connections
NC: Not connected
Signal names
SDA Serial data Address Input/Output

SCL Serial Clock (I2C mode)
Vcc Supply voltage
Vss Ground
VCLK Clock transmit only mode
26
11.26. LM2576

The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and
convenient design of a step–down switching regulator (buck converter). All circuits of this series are
capable of driving a 3.0 A load with excellent line and load regulation.
These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable
output version. These regulators were designed to minimize the number of external components to
simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are
offered by several different inductor manufacturers.
Since the LM2576 converter is a switch–mode power supply, its efficiency is significantly higher in
comparison with popular three–terminal linear regulators, especially with higher input voltages. In many
cases, the power dissipated is so low that no heatsink is required or its size could be reduced
dramatically.
A standard series of inductors optimized for use with the LM2576 are available from several different
manufacturers. This feature greatly simplifies the design of switch–mode power supplies.
The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input
voltages and output load conditions, and ±10% on the oscillator frequency (±2% over 0°C to 125°C).
External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes
cycle–by–cycle current limiting, as well as thermal shutdown for full protection under fault conditions.
11.26.2. Features
• 3.3 V, 5.0 V, 12 V, 15 V, and Adjustable Output Versions
• Adjustable Version Output Voltage Range, 1.23 to 37 V ±4% Maximum Over Line and Load
Conditions
• Guaranteed 3.0 A Output Current
• Wide Input Voltage Range
• Requires Only 4 External Components
• 52 kHz Fixed Frequency Internal Oscillator
• TTL Shutdown Capability, Low Power Standby Mode
• High Efficiency
• Uses Readily Available Standard Inductors
• Thermal Shutdown and Current Limit Protection
• Moisture Sensitivity Level (MSL) Equals 1
11.26.3. Pin description
11.27. TDA1308

The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic
package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for
portable digital audio applications.
11.27.2. Features
• Wide temperature range
• No switch ON/OFF clicks
• Excellent power supply ripple rejection
• Low power consumption
27
• Short-circuit resistant
• High performance
• high signal-to-noise ratio
• High slew rate
• Low distortion
• Large output voltage swing.
11.27.3. Pinning
SYMBOL PIN DESCRIPTION PIN VALUE

OUTA 1 Output A (Voltage swing) Min : 0.75V, Max : 4.25V
INA(neg) 2 Inverting input A Vo(clip) : Min : 1400mVrms
INA(pos) 3 Non-inverting input A 2.5V
VSS 4 Negative supply 0V
INB(pos) 5 Non-inverting input B 2.5V
INB(neg) 6 Inverting input B Vo(clip) : Min : 1400mVrms
OUTB 7 Output B (Voltage swing) Min : 0.75V, Max : 4.25V
VDD 8 Positive supply 5V, Min : 3.0V, Max : 7.0V
11.28. TDA9886

The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF
signal PLL.
11.28.2. Features
• 5 V supply voltage
• Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled)
• Multistandard true synchronous demodulation with active carrier regeneration (very linear
demodulation, good intermodulation figures, reduced harmonics, excellent pulse response)
• Gated phase detector for L/L accent standard
• Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all
negative and positive modulated standards via I2C-bus
• Digital acquisition help, VIF frequencies of 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz
• 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating
as crystal oscillator
• VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for
negative modulated signals and as a peak white detector for positive modulated signals
• Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analogue
converter; AFC bits via I2C -bus readable
• TakeOver Point (TOP) adjustable via I2C-bus or alternatively with potentiometer
• Fully integrated sound carrier trap for 4.5, 5.5, 6.0 and 6.5 MHz, controlled by FM-PLL oscillator
• Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled)
• SIF AGC for gain controlled SIF amplifier; single reference QSS mixer able to operate in high
performance single reference QSS mode and in intercarrier mode, switchable via I2C-bus
• AM demodulator without extra reference circuit
• Alignment-free selective FM-PLL demodulator with high linearity and low noise
• I2C-bus control for all functions
• I2C-bus transceiver with pin programmable Module Address (MAD).
11.28.3. Pinning
SYMBOL PIN DESCRIPTION

VIF1 1 VIF differential input 1
VIF2 2 VIF differential input 2
OP1 3 output 1 (open-collector)
FMPLL 4 FM-PLL for loop filter
28
DEEM 5 de-emphasis output for capacitor
AFD 6 AF decoupling input for capacitor
DGND 7 digital ground
AUD 8 audio output
TOP 9 tuner AGC TakeOver Point (TOP)
SDA 10 I2C-bus data input/output
SCL 11 I2C-bus clock input
SIOMA 12 sound intercarrier output and MAD select
n.c. 13 not connected
TAGC 14 tuner AGC output
REF 15 4 MHz crystal or reference input
VAGC 16 VIF-AGC for capacitor; note 1
CVBS 17 video output
AGND 18 analog ground
VPLL 19 VIF-PLL for loop filter
VP 20 supply voltage (+5 V)
AFC 21 AFC output
OP2 22 output 2 (open-collector)
SIF1 23 SIF differential input 1
SIF2 24 SIF differential input 2
11.29. TPA3002D2
The TPA3002D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied
stereo speakers. The TPA3002D2 can drive stereo speakers as low as 8 O. The high efficiency of the
TPA3002D2 eliminates the need for external heatsinks when playing music.
Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal
offering a range of gain from -40 dB to 36 dB. Line outputs, for driving external headphone amplifier
inputs, are also dc voltage controlled with a range of gain from -56 dB to 20 dB.
An integrated 5-V regulated supply is provided for powering an external headphone amplifier.
11.29.2. Features
• 9-W/Ch into an 8-Q Load from 12-V Supply
• Efficient, Class-D Operation Eliminates
Heatsinks and Reduces Power Supply
Requirements
• 32-Step DC Volume Control From -40 dB to
36 dB
• Line Outputs for External Headphone
Amplifier with Volume Control
• Regulated 5-V Supply Output for Powering
TPA6110A2
• Space-Saving, Thermally-Enhanced
PowerPAD™ Packaging
• Thermal and Short-Circuit Protection
Applications
• LCD Monitors and TVs
• Powered Speakers
29
11.29.3. Pinning
Terminal Functions
TERMINAL I/O DESCRIPTION

NO. NAME
AGND 26, 30 - Analog ground for digital/analog cells in core
AVCC 33 - High-voltage analog power supply (8.5 V to 14 V)
AVDD 29 O 5-V Regulated output capable of 100-mA output
AVDDREF 7 O 5-V Reference output—provided for connection to adjacent VREF terminal.
BSLN 13 I/O Bootstrap I/O for left channel, negative high-side FET
BSLP 24 I/O Bootstrap I/O for left channel, positive high-side FET
BSRN 48 I/O Bootstrap I/O for right channel, negative high-side FET
BSRP 37 I/O Bootstrap I/O for right channel, positive high-side FET
COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5
LINN 6 I Negative differential audio input for left channel
LINP 5 I Positive differential audio input for left channel
LOUTN 16, 17 O Class-D 1/2-H-bridge negative output for left channel
LOUTP 20, 21 O Class-D 1/2-H-bridge positive output for left channel
MODE 34 I Input for MODE control. A logic high on this pin places the amplifier in the variable output mode and the Class-D
outputs are disabled. A logic low on this pin places the amplifier in the Class-D mode and Class-D stereo outputs
are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as
line-level outputs for external amplifiers.
MODE_OUT 35 O Output for control of the variable output amplifiers. When the MODE pin (34) is a logic high, the MODE_OUT
pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is driven high. This pin is
intended for MUTE control of an external headphone amplifier. Leave unconnected when not used for
headphone amplifier control.
PGNDL 18, 19 - Power ground for left channel H-bridge
PGNDR 42, 43 - Power ground for right channel H-bridge
PVCCL 14, 15 - Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or AVCC.
PVCCL 22, 23 - Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or AVCC.
PVCCR 38,39 - Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to PVCCL or AVCC.
PVCCR 46, 47 - Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to PVCCL or AVCC.
REFGND 12 — Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the DAC
ground to this terminal.
30
RINP 3 I Positive differential audio input for right channel
RINN 2 I Negative differential audio input for right channel
ROSC 27 I/O Current setting resistor for ramp generator. Nominally equal to 1/8*VCC
ROUTN 44, 45 O Class-D 1/2-H-bridge negative output for right channel
ROUTP 40, 41 O Class-D 1/2-H-bridge positive output for right channel
SD 1 I Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC.
VARDIFF 9 I DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to GND or
AVDDREF if VAROUT outputs are unconnected.
VARMAX 10 I DC voltage that sets the maximum gain for the VAROUT outputs. Connect to GND or AVDDREF if
VAROUT outputs are unconnected.
VAROUTL 31 O Variable output for left channel audio. Line level output for driving external HP amplifier.
VAROUTR 32 O Variable output for right channel audio. Line level output for driving external HP amplifier.
VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors.
VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors.
VOLUME 11 I DC voltage that sets the gain of the Class-D and VAROUT outputs.
VREF 8 I Analog reference for gain control section.
V2P5 4 O 2.5-V Reference for analog cells, as well as reference for unused audio input when using single-ended inputs.
— Thermal - Connect to AGND and PGND—should be center point for both grounds.
Pad
11.30. µPA672T

The µPA672T is a super-mini-mold device provided with two MOS FET elements. It achieves high-
density mounting and saves mounting costs.
11.30.2. Features
• Two MOS FET circuits in package the same size as SC-70
• Automatic mounting supported
11.30.3. Pin Connection
11.31. VPC3230D

The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60-
Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such
as DDP 331x) and/or it can be used with 3rd-party products.
The main features of the VPC 323xD are
• high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking
• multi-standard colour decoder PAL/NTSC/SECAM including all substandards
• four CVBS, one S-VHS input, one CVBS output
• two RGB/YCr Cb component inputs, one Fast Blank (FB) input
• integrated high-quality A/D converters and associated clamp and AGC circuits
31
• multi-standard sync processing
• linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling ‘Panorama-vision’
• PAL+ preprocessing
• line-locked clock, data and sync, or 656-output interface
• peaking, contrast, brightness, color saturation and tint for RGB/ YC r C b and CVBS/ S-VHS
• high-quality soft mixer controlled by Fast Blank
• PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution
• 15 predefined PIP display configurations and expert mode (fully programmable)
• control interface for external field memory
• I2C-bus interface
• one 20.25-MHz crystal, few external components
• 80-pin PQFP package
11.31.2. Pin Connections and Short Descriptions

NC = not connected
LV = if not used, leave vacant
X = obligatory; connect as described in circuit diagram
SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V
Pin No. Pin Name Type Connection Short Description

PQFP (if not used)
80-pin
1 B1/CB1IN IN VREF Blue1/Cb1 Analog Component Input
2 G1/Y1IN IN VREF Green1/Y1 Analog Component Input
3 R1/CR1IN IN VREF Read1/Cr1 Analog Component Input
4 B2/CB2IN IN VREF Blue2/Cb2 Analog Component Input
5 G2/Y2IN IN VREF Green2/Y2 Analog Component Input
6 R2/CR2IN IN VREF Read2/Cr2 Analog Component Input
7 ASGF X Analog Shield GNDF
8 FFRSTWIN IN LV or GNDD FIFO Reset Write Input
9 VSUPCAP OUT X Digital Decoupling Circuitry Supply Voltage
10 VSUPD SUPPLYD X Supply Voltage, Digital Circuitry
11 GNDD SUPPLYD X Ground, Digital Circuitry
12 GNDCAP OUT X Digital Decoupling Circuitry GND
13 SCL IN/OUT X I2C Bus Clock
14 SDA IN/OUT X I2C Bus Data
15 RESQ IN X Reset Input, Active Low
16 TEST IN GNDD Test Pin, connect to GNDD
17 VGAV IN GNDD VGAV Input
18 YCOEQ IN GNDD Y/C Output Enable Input, Active Low
19 FFIE OUT LV FIFO Input Enable
20 FFWE OUT LV FIFO Write Enable
21 FFRSTW OUT LV FIFO Reset Write/Read
22 FFRE OUT LV FIFO Read Enable
23 FFOE OUT LV FIFO Output Enable
24 CLK20 IN/OUT LV Main Clock output 20.25 MHz
25 GNDPA OUT X Pad Decoupling Circuitry GND
26 VSUPPA OUT X Pad Decoupling Circuitry Supply Voltage
27 LLC2 OUT LV Double Clock Output
28 LLC1 IN/OUT LV Clock Output
29 VSUPLLC SUPPLYD X Supply Voltage, LLC Circuitry
30 GNDLLC SUPPLYD X Ground, LLC Circuitry
31 Y7 OUT GNDY Picture Bus Luma (MSB)
32 Y6 OUT GNDY Picture Bus Luma
35 GNDY SUPPLYD X Ground, Luma Output Circuitry
36 VSUPY SUPPLYD X Supply Voltage, Luma Output Circuitry
40 Y0 OUT GNDY Picture Bus Luma (LSB)
41 C7 OUT GNDC Picture Bus Chroma (MSB)
32
42 C6 OUT GNDC Picture Bus Chroma
45 VSUPC SUPPLYD X Supply Voltage, Chroma Output Circuitry
46 GNDC SUPPLYD X Ground, Chroma Output Circuitry
50 C0 OUT GNDC Picture Bus Chroma (LSB)
51 GNDSY SUPPLYD X Ground Sync Pad Circuitry
52 VSUPSY SUPPLYD X Supply Voltage, Sync Pad Circuitry
53 INTLC OUT LV Interlace Output
54 AVO OUT LV Active Video Output
55 FSY/HC/HSYA OUT LV Front Sync/ Horizontal Clamp Pulse/Front-End
Horizontal Sync Output
56 MSY/HS IN/OUT LV Main Sync/Horizontal Sync Pulse
57 VS OUT LV Vertical Sync Pulse
58 FPDAT/VSYA IN/OUT LV Front End/Back-End Data/Front-End Vertical Sync
Output
59 VSTBYY SUPPLYA X Standby Supply Voltage
60 CLK5 OUT LV CCU 5 MHz Clock Output
61 NC - LV or GNDD Not Connected
62 XTAL1 IN X Analog Crystal Input
63 XTAL2 OUT X Analog Crystal Output
64 ASGF X Analog Shield GNDF
65 GNDF SUPPLYA X Ground, Analog Front-End
66 VRT OUTPUT X Reference Voltage Top, Analog
67 I2CSEL IN X I2C Bus Address Select
68 ISGND SUPPLYA X Signal Ground for Analog Input, connect to GNDF
69 VSUPF SUPPLYA X Supply Voltage, Analog Front-End
70 VOUT OUT LV Analog Video Output
71 CIN IN LV Chroma/Analog Video 5 Input
72 VIN1 IN VRT Video 1 Analog Input
76 VSUPAI SUPPLYA X Supply Voltage, Analog Component Inputs Front-End
77 GNDAI SUPPLYA X Ground, Analog Component Inputs Front-End
78 VREF OUTPUT X Reference Voltage Top, Analog Component Inputs
Front-End
79 FB1IN IN VREF Fast Blank Input
80 AISGND SUPPLYA X Signal Ground for Analog Component Inputs, connect
to GNDAI
12. SERVICE MENU SETTINGS

To enter the service menu, first enter the MENU by pressing “MENU” button and then press the digits 4, 7, 2
and 5 respectively.
12.1. Picture Adjust

• Source => All possible sources given with the chasis as a list.
• Mode => Three items as a list; NATURAL, DYNAMIC, CINEMA
• Colour Temp => Three items as a list; COOL, NORMAL, WARM
• Contrast => Slider Bar. Changing value between 0 to 63.
• Brightness => Slider Bar. Changing value between 0 to 63.
33
• Sharpness => Slider Bar. Changing value between 0 to 31.
• Colour => Slider Bar. Changing value between 0 to 99.
• R => Slider Bar. Changing value between 0 to 31.
• G => Slider Bar. Changing value between 0 to 31.
• B => Slider Bar. Changing value between 0 to 31.
• Backlight => Slider Bar. Changing value between 0 to 255.
In this menu preset values for each Mode (Contrast, Brightness, Sharpness, Colour values for each
Mode-NATURAL, DYNAMIC, CINEMA) and for each Colour Temp. (R, G, B values for each Colour
Temp- COOL, NORMAL, WARM) are determined for each source.
12.2. SOUND1
• Menu Subwoofe => If ON, Subwoofer option is available in TV set, and the item is
visible in sound menu, else Subwoofer is not available.
• Subwoofer Level (dB) => This value is gain value of Subwoofer output in dB. -30...12
• Subwoofer Corner Freq. (x10Hz) => Last low frequency value that is amplified. 5...40
• Menu Equalizer => If ON, visible in sound menu, else invisible.
• Menu Headphone => If ON, visible in sound menu, else invisible.
• Menu Effect => If ON, visible in sound menu, else invisible.
• Menu Wide Sound => If ON, visible in sound menu, else invisible.
• Menu Dynamic Bass => If ON, visible in sound menu, else invisible.
• Menu Virtual Dolby => If ON, visible in sound menu, else invisible.
• Carrier Mute => If ON, in the absence of an FM carrier the output is muted,
else not.
• Virtual Dolby Text => Active if VIRTUAL DOLBY is ON. According to the selection;
seen in sound menu as 3D PANORAMA or VIRTUAL DOLBY.
12.3. SOUND 2
• AVL => AVL is controlled from this menu by service user. ON/OFF
• Menu AVL => If ON, AVL item is visible in sound menu, and AVL can be controlled
from sound menu by normal user, else AVL is invisible to normal user.
• FM PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale
value for the related standard. 0...127
• NICAM PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale
• SCART PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale
value for scart outputs. 0...127
• SCART VOLUME AVL ON => If AVL ON, set value in this item is used as volume
value for scart1 and scart2. 0...127
• FM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale
• NICAM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale
• SCART PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale
value for scart outputs. 0...127
• SCART VOLUME AVL OFF => If AVL OFF, set value in this item is used as volume
value for scart1 and scart2. 0...127
12.4. Options
• Burn-In Mode => If ON, When TV is powered ON Green, Blue, Red is displayed in
sequence until Menu button is pressed.
• FIRST APS => If ON, “First APS” menu is displayed when the TV is switched on
with the factory default settings.
• APS Volume => After First APS function finishes, the volume of the TV is that
value.
• AGC (dB) => Tuner AGC value.
• Power-Up Mode => Mode defines the TV set power on state.
Stand-by : When TV is ON set is in stand-by mode
Normal : When TV is ON set is in normal mode
Last State: When TV is ON set is in Last State mode
34
• Factory Reset => OK to activate. When OK is pressed on this item, factory defaults
loaded.
• Enter Flash Mode => Before uploading SW this mode must be selected.
• Reset Eeprom => Initialize default settings
12.5. TV Norm
• BG => If ON, supported, else not supported
• DK => If ON, supported, else not supported.
• I => If ON, supported, else not supported.
• L => If ON, supported, else not supported.
• LP => If ON, supported, else not supported.
• M => If ON, supported, else not supported.
12.6. Features
• PIP/PAP => If ON, PIP/PAP available else not.
• Blue Background => If ON, Blue Background is visible in Feature Menu else not.
• Menu Transparency => If ON, Menu Transparency is visible in Feature Menu else not.
• Menu Timeout => If ON, Menu Timeout is visible in Feature Menu else not.
• Backlight => If ON, Backlight is visible in Feature Menu else not.
• Single Tuner => If TV set has one tuner Single Tuner must be ON.
If TV set has double tuner Single Tuner must be OFF.
• Dynamic WB => Dynamic White Balance
12.7. Teletext
• TOP TXT => If ON, Top Text feature is available else not.
• Fast TXT => If ON, Fast Text feature is available else not.
• Teletext Language => Teletext Language may be controlled from this menu by service
user.
• Menu Teletext Language => If ON, Teletext Language item is visible in Feature Menu, and
Teletext Language can be controlled from Feature Menu by normal user, else Teletext Language is
invisible to normal user.
12.8. Source
• TV
• SC1
• SC2
• SC2 SVHS
• SC3
• SC3 SVHS
• YPBPR
• FAV
• SVHS
• HDMI
• PC
This menu is related with the options of the chassis. These items may be ON or OFF. If ON, the source is available
in TV set, and the item is visible in source menu, else the source may be available but invisible to user.
12.9. Menu Languages 1 & 2

The language options for the Language item in Feature menu can be set ON or OFF from this menu.
35
GENERAL BLOCK DIAGRAM
13. BLOCK DIAGRAM
MAIN BOARD
AUDIO AMPL. BOARD
AUDIO MAIN_L, MAIN_R,

AUDIO
DECODING AUDIO
DECODING AUDIO
MSP3411G AMPLIFIER
MSP3411G AMPLIFIER
MICRONAS D-CLASS
MICRONAS
AUDIO/VIDEO/GRAPHICS IN/OUT
D-CLASS
IDTV,SVHS,MMC (RGB),PC IN
SVP-EX
SVP-EX59
59
LVDS OUT
8-BIT YUV
VPC3230D
VPC3230D
VIDEO
VIDEOPROCESSOR
PROCESSOR
PIP
PIPPICTURE
PICTURE
MICRONAS
MICRONAS SDA5550
SDA5550
MCU
MCU
MICRONAS
MICRONAS
24 BIT RGB
HDMI
HDMIDECODER
DECODER
SIL9993
SIL9993
PSU
PSU
2
QSS_TUN2
L1003 50V 22u SC1_AUDIO_L_OUT
26R_100MHZ_1.5A
Q2001 C2005
C1014
50V
47u
R1013 BC848B
1N4148
100R 12SIOMAD NC 13 50V 22u
R1036
IC204
12k
MAIN BOARD(17MB15E) C2006SC3_AUDIO_L_OUT
R2006
1k
R2009
SCL R1004 R1029
1k
QSS_TUN2
100R 11 SCL TAGC 14
C1020
AGC 1
25V
33p
QSS_TUN1
SDA
100R TUN2_CVBS R2004
100R
R1032
R1037
R1043
C1034 X1000 Q2003
10k
47k
75R
R1008 AUDIO_L_OUT BC848B
100R 10 SDA REF 15
C1021
TU 2
25V
33p
22p 4MHz 50V 22uSC1_AUDIO_R_OUT
FB_CONTROL
25V
VCCA_3V3
VCC_5V
R2005
C1036 C1128 Q2004
100R BC848B C2007
VCC_5V 56p AUDIO_R_OUT
AS 3 9 TOP VAGC16 R1042 50V 22u
50V
C1123
50V
C1120
470n 56p
C1122
63V 220R C2008 SC3_AUDIO_R_OUT
R2007
1k
R2008
1k
8 AUD CVBS 17 R1025
SCL 4
1p8
47R BC848B
X10021p8
C1130
CTF5543_HOR
C1007
Q1003
25V
C1113
33p
C1125
R104
50V 56p
4k7
100n
18.432MHz
47u
25V
56p
R1078
7 DGND AGND18
C1013
SDA 5 100R
N.C
25V
L1018
33p
C1042
C2200 VCC_5V
R2200
50V
1n5
47R
TDA9885T 22u
TU1000
C1028 C1037
R1038
1n5
16V
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
6 AFD VPLL 19 R1070
C1144
C1152
NC 6 100n
10u
C1137 560p
SCL
330R C1195
C1002
C1011
C1045
470n 100n
100n
25V
50V
50V
10u
10n
100R
63V 25V
C1029
C1084
TP
NC6
NC5
NC4
50V
VCC_5V
39p
AVSUP
VCC5V_FILTERED 100n
STANDBYQ
TESTEN
5 DEEM VP 20
ADR_SEL
XTAL_OUT
VS 7
XTAL_IN
ANA_IN-
AUD_CL_OUT
ANA_IN2+
ANA_IN1+
R1022
C1048
10n N.C
22k
16V
10u
R1071
D_CTR_I/O_1
C_CTR_I/O_0
C1166
VCC_33V
SDA
50V 10u
C1024 C1035 R1128 100R
R1011 1 12C_CL AVSS 48
4R7 33V_FILTERED
C1085
NC/ADC 8 4 FMPLL AFC 21
C1006
39p
C1169
50V
10u
5k6 VCC5V_FILTERED 2 12C_DA MONO_IN 47

10n 100n L1019
R1104
50V 25V
1k SC1_AUDIO_R_IN
C1201
C1202
C1203
C1204
C1025
100n
100n
100n
50V
50V
50V
50V
I2S_CL 3 12S_CL VREFTOP 46
10u
C1156
R1031
R1000 33V_FILTERED 22k
6k8
VST 9 2k2 3 OP1 OP2 22 1n
R1028
390p I2S_WS 4 12S_WS SC1_IN_R 45
50V C1138 330n L1022
R1068
S1008 C1174 R1105
1k
C1005 SAW_SW2
3
Q1007
I2S_DA_OUT 5 12S_DA_OUT SC1_IN_L 44 1k SC1_AUDIO_L_IN
1n
IF2 10 GND 2 VIF2 SIF1 23 BC858B
330n
2 IN2 OUT2 5 C1177
I2S_DA_IN1 6 12S_DA_IN1 ASG1 43
L1002
1n R1069
MSP3452G
SF_63962 C1157 R1106 L1020
1u
50V
A IC206 K
470R
BZT55C3V6
2
Z1000 VCC_5V R1127 1k AV_AUDIO_R_IN
C1057 7 ADR_DA SC2_IN_R 42 1n
1 IN1 OUT1 4 4R7 VCC5V_FILTERED 330n
IC208
IF1 11 1 VIF1 SIF2 24 C1148 C1176
R1107 L1023
8 ADR_WS SC2_IN_L 41
1n 1k AV_AUDIO_L_IN
1n
1
50V IC207
C1197
C1198
C1199
C1200
C1205
C1206
100n
100n
100n
100n
100n
330n
IC200
50V
50V
50V
50V
50V
50V
9 ADR_CL ASG2 40 C1170
10u
IF1
470R R1108 L1021

S1009 C1158
R1067 1N4148 1k AUDIO_R
270p 470p
10 DVSUP SC3_IN_R 39 1n S2011
C1080 C1171 AUDIO_R2
3 100u 50V 50V C1140 330n R1110 L1024
C1081 C1086
11 DVSS SC3_IN_L 38
GND 1k AUDIO_L S2008
100R 2 IN2 OUT2 5 1n
L1008 330n C1153 SC3_AUDIO_R_IN
VCC5V_FILTERED R1124 12 12S_DA_IN2 ASG3 37
C1192
C1194
K9356M
100n
16V
16V
VCC_5V R1111 L1025

1u
S1003 22u C1164 S2007

R1125
R1126
Z1003 1n 1k IDTV/MMC/DVD_R_IN
10k
1k
1 IN1 OUT1 4 13 NC1 SC4_IN_R 36

C1079
50V C1078 1n5 330n C1147 R1109 L1026 S2005
10n VCC5V_FILTERED 10u C1175
50V 14 NC2 SC4_IN_L 35 1k IDTV/MMC/DVD_L_IN
50V
1n
330n S2006
BA782
BA591
IF1 15 NC3 AGNDC 34

D1003
D1007
C1193 SC3_AUDIO_L_IN
R1048
R1050
C1163
15k
2k4
L1032
ESD
16 RESETQ AHVSS 33
S2013 RESETQ_MSP
26 SC2_OUT_L
29 SC1_OUT_L
25 SC2_OUT_R
28 SC1_OUT_R
C1055 C1145 C1149 S2010
QSS_TUN1
DACM_SUB
C1087 AUDIO_L2
30 CAPL_A
18DACA_L
32CAPL_M
470p
17DACA_R
31AHVSUP
24DACM_S
21DACM_L
20DACM_R
22DACM_C
100n
19 VREF2
27 VREF1
Q1015 3u3
S1010
R1123 C1052 1kV

BC848B 47k Q1005 22n
50V
C1191
BC848B
100n
Q1016
16V
BC848B 10p
23
25V
SAW_SW2
R1049
4k7
R1121 R1122
R1051
HP_R
75R
10k 10k
C1118
1n
C1116
1n
HP_L
PL1002
VCC_8V
C1112
R1052
1
560R
1n 50V
L1001 1n 4R7 8V_FILTERED
50V
5 MUTE_AMP C1114 R1130
50V
HEADPHONE
C1054
R1089
C1134
C1154
100R
4
C1010
50V
R1093
22n
C2202
100R
50V
PL1001
C300
C295
47u
100u
100n
R1010
50V
16V
10u
A D1000 K K D1001 A
1N4148
100R 12SIOMAD NC 13
R1039
IC205
3 10u 50V 1 2 2 1
12k
R1114 MAIN_R
10u
2k2
50V
R2202
C1097
220R
R1005 R1030
2 1n
SCL 50V C1182 C1185
100R 11 SCL TAGC 14 1n5 2n2
C1022
AGC 1 TUN1_CVBS 2n2

25V
33p
C1119
PL1003 50V
SDA
50V
C1121
100R
50V
50V
50V
L1030
MAIN_L C1126
L1029
1n
1n
1n
50V
R1034
R1040
C1133
50V
SUBW
1 C1106 C1150
10k
47k
1n
C1038 X1001 IDTV/MMC/DVD_L_IN 1u
R1009 R1103
100R 10 SDA REF 15
C1023
TU 2 16V 4k7
25V
2
33p
R1095
R1098
R1044
HP_R
100R
100R
100u
75R
22p 4MHz C1165

25V
VCC_5V
50V
C1039 3 IDTV/MMC/DVD_R_IN 1n C1178 22u
C1167
S1000 50V C1151
100u
C1117
AS 3 9 TOP VAGC16 R1035 470p L1028
AUDIO_L_OUT
1n
AUDIO_R_OUT
470n 63V 2k2
R1090
R1094
R1129
100R
100R
L1027
4R7
C1136
BC848B C1196 VCC5V_FILTERED 22u
8 AUD CVBS 17 47R 100u
SCL 4 Q1002 100n
C1008
R1026 C1172
C1180
CTF5543_HOR
C1183
25V
IC209
33p
100u
IC2000
1n
50V
SDA 5 7 DGND AGND18 47u R2017 C1162 8 VDD OUTA 1
C1184
C1043
R1112
1 GND SDA 28 100R 100n
C1015
C1179
50V
1n5
47k
25V
33p
TDA9885T
2n2
220p
8V_FILTERED
SDA
C1030 C1040 C2201 47p
R1041
R2201
47R
C2025
R1102
6 AFD VPLL 19 C2009
R1101
NC 6 7 OUTB INA- 2
47k
R2018
10k
150R R1092 R1096
C1181
C1047
470n 220n 2 CAPACITANCE SCL 27 100R 22u

50V
10n
1k 1k
C1003
C1012
220p C1173
10u
63V 16V
100n
SCL TDA1308
10u
C1031 22u C2026 L1017 50V

BC848B BC848B
VCC_5V 50V
47p Q1009 Q1011
VS 7 5 DEEM VP 20 VCC5V_FILTERED C2010 8V_FILTERED 4k7 6 INB- INA+ 3
S2000
C1049
R1023
R1100
16V
3 VS ADDR 26
10u
10n
22k
50V
2n2
C1168
C1026 C1041 100n
C1159
R1012
50V
16V
50V
1n
1u
50V
C2027
1n
4 FMPLL AFC 21 C2012 C2028

C1009
NC/ADC 8 R2010 C2011 R2019 5 INB+ VSS 4

50V
10u
5k6 VCC_5V
10n 100n SC2_AUDIO_L_IN 1k 4 L1 R1 25 1k SC2_AUDIO_R_IN
50V 25V
C1027 330n 330n IDTV/MMC/DVD_R_IN
R1027 S2002 S2009
R1024
R1001 33V_FILTERED 10k
HP_L
6k8
50V
50V
50V
50V
IDTV/MMC/DVD_L_IN C2029
1n
1n
VST 9 3 OP1 OP2 22 22k C2013 C2014 C2030 R1113
C1124
C1132
S2001 R2011 R2020 S2003
2k2 390p SC3_AUDIO_L_IN 1k 5 L2 R2 24 1k SC3_AUDIO_R_IN
S1007 50V
C1004 SAW_SW1 330n 330n
3 C2015 C2032
22u
22u
50V
50V
SC2_AUDIO_R_OUT
1n
1n
GND 2 VIF2 SIF1 23 C2016 C2031
SC2_AUDIO_L_OUT
IF2 10 2 IN2 OUT2 5 R2012 R2021
1n
L1000
PC_AUDIO_L_IN 1k 6 L3 R3 23 1k PC_AUDIO_R_IN
1u
50V K3953M
Z1001 330n 330n
C1056 16V
S1006
1 IN1 OUT1 4
IF1 11 1 VIF1 SIF2 24
R1097
100R
R1091
100R
1n 7 NC1 NC4 22
50V
3
IC201 GND TEA6420
2 IN2 OUT2 5 C1001 C1000
IF
K9356M 8 NC2 NC3 21

STBY_3V3
Z1002 1n 1n
1 IN1 OUT1 4 C2033 50V 50V
1n
C2017 C2018 C2034

1n
R2013 R2022
SAW_SW1
YPBPR_AUDIO_L_IN 1k 9 L4 R4 20 1k YPBPR_AUDIO_R_IN
AUDIO_L_LINE_OUT
AUDIO_R_LINE_OUT
SW01=H L’ 10k 10k 330n 330n
SW01=L BG,DK,I,L R1120 R1119
C2036
1n
C2020 C2037
R2014 R2023
BC848B
R100
R101
DAC_AOL 1k 10 L5 R5 19 1k DAC_AOR
4k7
4k7
C1189
100n
16V
Q1014
C2019
S1005
1n
330n 330n
47k BC848B S107
L2001 C2022 MUTE_AMP
R1118 R2015
Q1013
100R 11 L0UT1 ROUT4 18
BLM21B201S
BZT55C5V1
R102
AUDIO_L Q100
1n
S2012 C2021 22u 4k7 HEADPHONE
D1005
C255
BC848B
50V
4n7
L1031
BA591
BA782
D1006
D1002
L2002 C2024
R2016
S108
100R 12 ROUT1 LOUT4 17
BLM21B201S L216 PC_AUDIO_R_IN MUTE_AMP
AUDIO_R S2010 & R2208 are for mute option
1n
C1187 IF C2023 22u

50V
Mute is active high
R103
JACK-AK16
4k7
L2018 22u
2
R2203
PC_AUDIO_L_IN
JK200
10n 100R 13 LOUT2 ROUT3 16
1 3
50V L219
AUDIO_L2
R1117
R1116
C247
C254
50V
10k
C1186
1k
1n
C257
16V
50V
50V
BZT55C5V1
D10044n7
C1188
1u
100n
16V
L2019 22u
R2204
VCC5V_FILTERED L218 VESTEL ELECTRONICS
R1115 100R 14 ROUT2 LOUT3 15
BLM21B201S TV R&D GROUP
100R AUDIO_R2
C249
C251
50V
1n
TFT TV 17MB15E-5 TFT TV Tuner/IF/Audio

M.KURSAT
VER. E0 DATE SARIARSLAN
21/4/2004 VESTEL R&D Sheet 01
VCCA_3V3
SC3_AUDIO_R_OUT
SC3_AUDIO_L_OUT
VCC_8V
LG_1/IRQPDP
SC3_AUDIO_R_IN
SC3_AUDIO_L_IN
SVHSfromSC2_C
VIDEO SWITCH TEA6415C
PANEL_VCC
39p 4R7 V8 VCCA_3V3 VCCA_3V3
VCCA_3V3
VCC_12V
C304 R229
SC3_V_OUT
5V
SC3_V_IN
PIN8_SC3
K D2101 A
1
C298
C294
BZT55C10
100n
16V
10u
75R IDTV/MMC/DVD_CVBS
R251
R250
4k7
4k7
V8
SDA_PANEL
SCL_PANEL
R264
C301
C270
S111
150p
50V
50V
1n
IC210 A D221 K
S113
S112
1 2
2
SC1_V_IN C274 C282 BZT55C10 330R
S648
Q200
1 INPUT1 INPUT8 20 BC848B MAIN PICTURE DISP_EN/PDWN PL203 L203 R249
S109
N.C TO SVP C284
220n 220n R235
16V 16V 75R CVBS_SVP PANEL_VCC SC2_AUDIO_R_OUT
R203
C285
S638
S639
50V
75R
39p
R206 PDP_GO/BL_ON_OFF CPU_GO K D2003 A 4n7
S643
S642
V8
2 1
1
100R 2 DATA GND2 19 1k L207 50V
C303
S641
25V
47p
SDA 10k R239 VCC_12V K D2004 A BZT55C10 BZT55C10 BZT55C10 SC2_AUDIO_R_IN
2 1
2
R220 N.C L209 R253
2 1 2 1
SC2_V_IN C260 K D2105 A K D2104 A
R226
Q203 S640 A D2000 K BZT55C10 330R SC2_AUDIO_L_OUT
1 2
3
3 INPUT2 OUTPUT6 18 100R 150p
R2024
R2025
BC848B
330R
330R
4n7
N.C C264 C277
K D2002 A
BZT55C10 50V C2045 BZT55C10
L2006
1
R240
R204
C292
220n
BZT55C10
50V
75R
39p
1n
11
13
15
17
19
21
23
25
27
29
L2114
16V 10k 75R VxtoVPC BZT55C10
PL103
L2005
1
9
4n7 2 1
R221 C2044 C2040 K D2103 A
R207 R227
C287
1n 2 1
25V
47p
K A
L2125
A
100R 4 CLOCK OUTPUT5 17 100R 1k GOES TO VPC3230 50V D223
L2003
1
C2042
FOR PIP PICTURE
C2038
2
D2001
SCL 10k R241 SC2_AUDIO_L_IN
50V
C2039
150p
10
150p
12
14
16
18
20
22
24
26
28
30
1n
S636
2
6
TUN1_CVBS R222 L2008 L214
L2004
C265
4n7 C266
K
2
7
5 INPUT3 OUTPUT4 16 L2007 D203
R200
C259
S646
S647
1 2
50V
75R
39p
N.C A K
220n A K PIN8_SC2
V8
1 2
TXCLKOUT+
TXCLKOUT-
8
16V
TEA6415C D205
TXOUT3+
TXOUT2+
TXOUT1+
TXOUT0+
TXOUT3-
TXOUT2-
TXOUT1-
TXOUT0-
C279 SC2_B
R230
9
6 INPUT4 OUTPUT3 15 100R 23 25 27 29 31 33 35 37 39 41 75R R288 BZT55C5V1 D2100
N.C
AV1_V_IN
R205
C280
220n A K
50V
75R
Q202
39p
1 2 D207
10
16V 10k BC848B 22 24 26 28 30 32 34 36 38 40 42 TV_LINK
PARITY
N.C R223
A
1
S201 R237
PL205
BZT55C10
11
7 PROG OUTPUT2 14 75R SC2_V_OUT R289 75R
D222
C258
L213
50V
4n7
V8
S200 75R R290 SC2_G
SELECTABLE VIDEO OUT
12
VCC_8V 10k 1k
CONNECT C288
FOR SCART 2
LVDS OUTPUT 2
K
1
A
2
K
SVHS_Y_IN R224 R1033 Q1004 R242 2 4 6 8 10 12 14 16 18 20 D208
13
8 INPUT5 OUTPUT1 13 100R R1046 L204 SC2_R
C297
BC848B S204
50V
39p
N.C
R201 220n 75R SC1_V_OUT 1 3 5 7 9 11 13 15 17 19 21 C2049
14
75R 16V 10k R1045 S205 SVHSfromSC2_C
L206
V8
L200 R225 1k C293 100n
C252
150p
50V
15
9 VCC GND1 12 150p 16V
VCC_8V 75R SC2_FB
2
K
R2001
C283
C299
C273
100u
220n
16V
50V
16V
Q2000
22u
16
100R 150p L208 R275
2
A D204 K
D212
BC848B
I2C BUFFER FOR PANEL
C267
S220 BZT55C10
150p
C248
50V
1n
C275 C250 75R
2
K
K
2
R286
330R
R252
L210
2 1
75R
K A R276
17
10 INPUT6 INPUT7 11 TUN2_CVBS R2002 D209 D218
D202
R287
S221
75R
A
1
1n
220n 75R SC3_V_OUT IC215 BZT55C10 SC2_V_OUT
C276
R260
L205
75R
39p
1
C291
18
16V K D2102 A
K
2
2
K
R2003
R231
1 2
75R
A
VCC_5V
A K 2 1
1
N.C
SC3_V_IN 1k D214
C268
C296 2 1
50V
39p
K A
19
R202 220n 1 NC1 VCC 8 BZT55C10 D211
R254
330R
75R 16V SDA2 50V SC2_V_IN
R285
S645
75R
A
A
D210
1
4n7 C286
20
2 NC2 VCLK 7
1
K D220 A
ST24LC21 SCL2 BZT55C10
A D213 K
2
S644
BZT55C10
21
A
IDTV/MMC/DVD_CVBS 3 NC3 SCL 6
N.C
N.C
S212 C269 2 1 150p

MMC_CVBS SDA_PANEL SCL_PANEL D206 K D2500 A 50V
D219
2
R261 150p
4 VSS SDA 5 BZT55C10 50V
1
75R 1 2 C253
A D224 K
K
2
C278 150p
C261
150p
50V
SCSCL
SC1_AUDIO_R_OUT
SC1_AUDIO_L_OUT
SCSDA
SC1_FB
SC1_AUDIO_R_IN
SC1_AUDIO_L_IN
SC1_V_OUT
SC1_G
SC1_R
SC1_B
SC1_V_IN
PIN8_SC1
AV1_V_IN
BZT55C5V1
PL201 A D215 K
1 2
CHROMA SWITCH
1 V8
VCC_5V
VCCA_3V3
2 C263 SVHS_Y_IN S635
39p
1 2
A K
DIMMING SELECTION
3 D217
220n CIN
4
R267
10k
R232 C262
R266
1 2
18k
A K
5 D216 75R
R271
S652
MMC/DVD
4k7
6 C245
R270
Q204 C246
L202 100R
7 AV_AUDIO_R_IN VIDEO INPUTS CIN 220n
BC848C Q205
BC848C
DVD_12V_SENSE 16V
C271
220n
1n
8 16V
MMC_CVBS
R268
R273
47k
10k
SEL
R274
MMC_G
1k
MMC_B
MMC_R
AV_AUDIO_L_IN
S213
S651
L201
C272
50V
1n
SVHSfromSC2_C S633
CHROMA_SW
PL1
R269
Q206
C_SELECTED
IC214
1
47k
C2050
BC848C
100n
STBY_5V
16V
EXTERNAL INPUT 1 Q1 VCC 16
C2051
C2052
C2053
S634
100n
100n
100n
2 Q2 Q0 15
R280
C281
150k
100n
R279
VCCA_3V3 3 Q3 DSERIAL 14 10k
STBY_3V3
C290 VCC_5V
VGA_VSIN
gnd
IC213 100n 4 Q4 OE 13
16V
S650
S637
STBY_3V3
74HC595D
VGA_HSIN
gnd
1 A0 VDD 16
R211
R212
2k
2k
5 Q5 STOP 12
DDC_CLK_PC IC211
STBY_3V3
SDA2 VCCA_3V3 15
VCCA_3V3
2 A1 SDA 15 330R R215
DDC_5VVCC_5V
R255 22R 1 1A VCC 14 1N4148 6 Q6 SHCP 11
14
C289
100n
16V
SCL2 D200 VCCA_3V3
13
R277
R265
R246
R248
S223
S649
4k7
4k7
4k7
4k7
3 A2 SCL 14 330R DDC_DATA_PC 1N4148

R256 2 1Y 6A 13 7 Q7 MR 10
12
C302
100n
16V
D201
A D2501 K
2
A D2502 K
2
R281
R283
BZT55C12
BZT55C12
10k
10k
11
CHROMA_SW 4 P0 INT 13 R213
R257
R216
R217
4k7
10k
10k
10 22R 3 2A 6Y 12 8 GND Q7OUT 9 PC_STBY
R258
R259
4k7
4k7
DDC_5V
PCF8574
R282
10k
9 74LVC14A IC212
DISP_EN/PDWN 5 P1 P7 12 LG_1/IRQPDP
Q207
8 4 2Y 5A 11 BC848C
PGAGND
8 VCC NC1 1
7 Q208
RGB_SW2 6 P2 P6 11 RGB_SW3 VGA_VSIN 7 VCLK NC2 2 BC848C
6 5 3A 5Y 10 ST24LC21
R284
47k
R214 VGA_VSIN DDC_CLK_PC 100R 6 SCL NC3 3
VGA_HSIN 22R 22R R218
5
RGB_SW1 7 P3 P5 10 SW_ENABLE R238 DDC_DATA_PC 100R 5 SDA VSS 4
6 3Y 4A 9 R219
4
3 75R
gnd
8 VSS P4 9 R208
PANEL_VCC_ON/OFF
2 75R
R209
7 GND 4Y 8
PC STAND-BY
75R
1 PGAGND
R210
PL200
PORT EXPANDER
VGA_GIN
VGA_RIN
VGA_BIN
D-SUB 15 PC INPUT & DDC CIRDUIT
VESTEL ELECTRONICS
TV R&D GROUP
TFT TV 17MB15E-5 TFT TV IN/OUT

M.KURSAT
VER. E0 DATE SARIARSLAN
21/4/2004 VESTEL R&D Sheet 02
VCC_5V
I2S_DA_OUT
S303
I2S_DA_IN1
VCCD2_3V3 VCCD_3V3
BLM21B201S
I2S_WS
I2S_CL
DHS_2EX
DVS_2EX IC316
L2009
44
43
42
41
VCCD2_3V3
RESETQ_MSP
RGB_SW3 R2030 C362
C331
C333
50V
25V
10u
2n2
1k 1 A R 16 VCC_5V
100n
C4
C5
C6
C7
L2010
S302
C2046
BLM21B201S
SCL SDA STBY_5V R2032 SC1_R 2 B O 15
YPBPR_AUDIO_R_IN
YPBPR_AUDIO_L_IN
R1 8
R2 7
R3 6
R4 5
BLM21B201S
VCC_5V 33R
R2028
AUDIO_R_LINE_OUT
AUDIO_L_LINE_OUT
L313
10R
10u L308 R2031 SC2_R 3 C N 14 SC1_FB
50V VCC_5V 16V 33R
1
4
BLM21B201S 220n RGB_R_VPC 4 D M 13
R2026
R2027
100R
100R
C330
C332
50V
50V
3p3
3p3
C2047 C2048
PI5V330_SOIC SC2_FB
R316
R317
22R
22R
BLM21B201S
C318 25V VCCD2_3V3 SC1_G 5 E L 12 FB_VPC
47n
48
47
46
45
10n 100n
L311
20.25MHz
50V 25V 50V SC2_G 6 F K 11 SC1_B
1n5
BLM21B201S
C340
C2
C3
44
43
42
41
40
39
38
37
36
35
34
GNDC
VSUPC
X300 RGB_G_VPC 7 G J 10 SC2_B
L314
C319 50V
1n5 50V 8 H I 9 RGB_B_VPC
S331
S330
S323
S324
SCL
SDA
TEST
DVSS1
68n
DVSUP1
RESETQ
50V
ADR_SEL
R315
I2S_DEL_CL
I2S_DEL_WS
I2S_DEL_IN1
10k
I2S_DEL_OUT1
390p
C341
C343
C320
1 NC1 NC25 33
RGB SWITCHING FOR VPC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
C317
A D225 K
2
BZT55C10
BLM21A601S
BLM21A601S
2 NC2 NC24 32
A D226 K
2
BZT55C10
10u
C0
C1
L316
L317
VS
NC2
AVO
CLK5
INTLC
ASGF2
XTAL2
XTAL1
FPDAT
VSTBY
GNDSY
FSY/HC
MSY/HS
VSUPSY
3 NC3 NC23 31 50V
1
25V
1
47n
4 NC4 NC22 30 R322
DIN[0]
33R
C359
C360
470p
470p
1 8
50V
50V
5 NC5 NC21 29 65 GNDF Y0 40 R1
SVHSfromSC2_C
C323
DIN[1]
6 NC6
IC2001 NC20 28 66 VRT Y1 39 2 R2 7
VxtoVPC
DIN[2]
7 NC7
MAD4868A NC19 27 2 3 1 2 3 1 67 I2CSEL Y2 38
3
R3
6
BACK RIGHT
CIN
DIN[3]
BACK LEFT
Sheet 03
4 5
8 NC8 NC18 26 A A 68 ISGND Y3 37 R4
L2011
DIN[0-23]
C344
9 NC9 NC17 25 JK303 JK304 69 VSUPF VSUPY 36 VCCD2_3V3
BLM21B201S SVP ENTEGRESINE
17MB15E-5 TFT TV VPC3230

L AUDIO FAV R AUDIO FAV
10 NC10 NC16 24 70 VOUT GNDY 35 100n R323
I2S_DEL_OUT2
I2S_DEL_OUT3
I2S_DEL_OUT4
DIN[4]
SARIARSLAN
C321 16V 33R
VESTEL R&D
I2S_DEL_IN2
I2S_DEL_IN3
I2S_DEL_IN4
1 8
M.KURSAT
11 NC11 NC15 23 75R 71 CIN Y4 34 R1
R304 C361 1n DIN[5]
2 7
DVSUP2
75R 72 VINI IC216 Y5 33 R2

DVSS2
R305 C322 DIN[6]

NC12
NC13
NC14
1n 3 6
75R
R306
680n
73 VIN2 VPC323XD Y6 32 R3
DIN[7]
4 5
75R 74 VIN3 Y7 31 R4
12
13
14
15
16
17
18
19
20
21
22
21/4/2004
R307
DATE
75R 75 VIN4 GNDLLC 30
C346
100n
16V
FFRSTW
L300 R300
CLK20
VCC_5V 76 VSUPAI VSUPLLC 29 L315
FFOE
FFRE
VESTEL ELECTRONICS
VCCD2_3V3
C350
C348
C349
C305
100u
220n
390p
16V
16V
50V
BLM21B201S
1n8
VCC_5V
77 GNDAI LLC1 28
R321
C306
C316
25V
50V
47n
10u
21
22
23
24
N.C
78 VREF LLC2 27 22R CLK_2EX
TV R&D GROUP
PL301
79 FB1IN VSUPPA 26
R2029
10k
1 AUDIO_R_LINE_OUT
C345
C347
50V
25V
1n5
47n
S325
80 AISGND GNDPA 25
TFT TV
VER. E0
R312
4k
VSUPCAP
FB_VPC
B1/CB1IN
R1/CR1IN
B2/CB2IN
R2/CR2IN
GNDCAP
G1/Y1IN
G2/Y2IN
S316
YCOEQ
VSUPD
ASGF1
GNDD
VGAV
3
FFWE
RESQ
AUDIO_L_LINE_OUT
TEST
FFIE
SDA
NC1
SCL
S326 220n C363
RCA_Y
4 SUBW
RCA_PB
220n C364
10
11
12
13
14
15
16
17
18
19
20
C356
9
220p
1P_RED_FAV WHITE_FAV WHITE_FAV
R331
30032233
75R
2
C365 IC317
50V
JK300
220n 50V
N.C
1 3
330p 16V
Y
S301
RCA_PR
C311 220n RGB_SW1 R325

RGB_B_VPC 1k 1 A R 16 VCC_5V
SCART RGB
C352
100n
16V
R313
C327
100R
R318
100R
R319
100R
R320
30032234
1k
SC1_R 2 B O 15
JK301
1 3
Pb
C357
220p
50V 50V
A
R332
50V
75R
330p
N.C 16V 270p 390p C342 SC2_R 3 C N 14 SC1_FB
50V
C312 220n SC2_FB
bu caplerin yerine tek 100nf takabilirsin.
S340
VCC_5V
RGB_G_VPC 4 D M 13
Pr
C334 C337 220n

2
S310
16V PI5V330_SOIC
JK302
C328
1 3
N.C
25V SC1_G 5 E L 12
A
C358
220p
560p 50V
50V
1n5
50V SC2_G 6 F K 11 SC1_B
330p
N.C 16V C335
C313 220n
7 G J 10 SC2_B
R333
C338
75R
RGB_R_VPC 16V S311
SDA3
SCL3
D102 D104 D106
RX1_RST#
100n
BAV99 BAV99 BAV99 C329 16V 8 H I 9
220n RGB_GIN S312
N.C
C308
C336
330p
50V
C339
C324
BLM21B201S
R309
MMC_B 75R
MMC RGB INPUTS
L312
220n RGB_RIN
16V
N.C
IC318
C309
330p
50V
RGB_SW2 C353 C325

R326 R310
VCCD2_3V3
1k 1 A R 16 VCC_5V MMC_G 75R RGB_BIN
100n
220n
RCA_PR 2 B O 15 16V
S309
VGA_RIN 3 C N 14 N.C FB
C310
330p
50V
S314 C326
RIN2 4 D M 13 R311
PI5V330_SOIC MMC_R 75R
RCA_Y 5 E L 12 220n
S308
VGA_GIN 6 F K 11 RCA_PB
16V
RGB SWITCHING FOR SVP
GIN2
S307 7 G J 10 VGA_BIN
8 H I 9
S336
S337
BIN2
VGA&YPbPr SWITCHING
CLK_2EX
ODD_PINK
DHS_2EX
C434
C435
100n
100n
PAVDD1 R435 VL1_8
VDDMQ_2V5
VDDMQ_2V5
22R
IC107
VD1_8
R2210
CAS#
RAS#
CS0#
WE#
10k
C2206
C2203
C2204
C2205
C440
C444
100n
100n
100n
100n
100n
16V
16V
16V
16V
16V
16V
10u
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
VD1_8
74LX1G86STR
R430 R431
STBY_3V3
22R
MLF1 C438
R2214
22R
CLKE
1 8
R1
BA1
BA0
2n7
R429
GND
22R
VCC
50V
S110
2 7
1A
1Y
1B
PAVDD2 R436 R2
VD1_8
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
22R
3 6
5
R3
C2207
C2208
C2209
C2210
C2211
R432
C443
100n
100n
100n
100n
100n
16V
16V
16V
16V
16V
16V
10u
10k ODD_PINK
VDDMQ_2V5
C439 C425 C428 4 5 C470 C471
PLF2 R433 R4 R434 DVS_2EX
10k 16V 1k
VD1_8
R2216
2n7 100n 100n 100n 33R 100n 100n
R1 8
R2 7
R3 6
R4 5
50V C424 16V 16V 16V
R2213
PL104
C418
10
11
12
1
VCCA_3V3
S437
4
100n
MCLK0#
MCLK0
16V
26R_100MHZ_1.5A
DIGITAL IDTV INPUTS [ITU 601]
DQM[3]
DQM[2]
MVREF
L407
MD[31]
MD[30]
MD[29]
MD[28]
MD[27]
MD[26]
MD[25]
MD[24]
MD[23]
MD[22]
MD[21]
MD[20]
MD[19]
MD[18]
MD[17]
MD[16]
DQS[3]
DQS[2]
MPUGPIO4
PDVDD MD[0]
MD[1]
R2215
VL1_8 MD[2]
33R
C437
C2216
C2217
C2218
C2219
C455
C459
MD[3]
100n
100n
100n
100n
100n
16V
16V
16V
16V
16V
16V
10u
MD[4]
100n MD[5]
MCA[14] 16V
S413 MD[6]
MCA[15]
MD[7]
MD[8]
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
S411 MD[9]
R236
MCAD[0] 100R MD[10]
NC
MPUGPIO1
MPUGPIO2
MPUGPIO3
MPUGPIO4
VSSH4
VDDH4
VSSC10
VDDC10
MD31
VSSC9
MD30
MD29
VDDM16
MD28
DQM3
VSSM16
VDDM15
DQS3
VSSM15
MD27
VDDM14
MD26
VSSM14
MD25
VDDC9
MD24
MD23
VSSC8
MD22
MD21
VDDM13
MD20
DQM2
VSSM13
VDDM12
DQS2
VSSM12
MD19
VDDM11
MD18
VSSM11
MD17
VDDC8
MD16
BA1
VSSC7
BA0
CLKE
VDDC7
WE
VSSR
MVREF
VDDR
CAS
RAS
VDDM10
CS1
VDDM9
CS0_
VSSM10
MCK0_
MCK0
VSSM9
1 R1 8
MD[11]
MCAD[1]
MD[12]
2 R2 7
MD[13]
MCAD[2]
3 MD[14]
C403 6
GIN2 R3 VDDMQ_2V5 MD[15]
MCAD[0-7]
MCAD[3] 193 128
Y_G2 MPUGPIO0 VDDL VDDL MD[16]
4 5 194 127
100n R4 A_D0 VSSL MD[17]
195 126 MA[0]
16V VD1_8 A_D1 MA0
R406
R234 MD[18]
75R
MCAD[4] 196 125 MA[1]

100R A_D2 MA1
C413
MD[19]
100n
16V
197 124
MCA[0-19]
1 8
R1 A_D3 VDDM8 MD[20]
MCAD[5] 198 123 MA[2]
R233 VDDC12 MA2 MD[21]
MCA[0] 2 7 199 122 MA[3]
100R R2 VSSC12 MA3 MD[22]
1 8 MCAD[6] 200 121
R1
3
A_D4 VSSM8 MD[23]
C404 MCA[1] 6 201 120 C447 MA[4]
BIN2 R3 A_D5 MA4 MD[24]
2 7 MCAD[7] 202 119
PB_B2 R2 A_D6 VDDM7 100n 16V MD[25]
203 118
MA[0-11]
MCA[2] 4 5 MA[5]
100n 3
R4 A_D7 MA5 MD[26]
6 204 117 C446 MA[6]
16V R3 STBY_3V3 VDDH5 MA6
R407
MD[27]
75R
MCA[3] 205 116

VSSH5 VSSM7 MD[28]
4 5 206 115 MA[7]
R4 ADDR0 MA7
PC&YPbPr INPUT R228
207
ADDR1 MA8
114 100n 16V MA[8]
MD[29]
MD[30]
MCA[4] 208 113
100R ADDR2 VDDC6 VD1_8 MD[31]
1 8 209 112 MA[9]
R1 ADDR3 MA9
C405 MCA[5] 210 111 MA[10]
RIN2 ADDR4 MA10
2 7 211 110
PR_R2 R2 ADDR5 VSSC6 DQM[0]
212 109
DQM[0-3]
MCA[6] MA[11]
100n 3
ADDR6 MA11 DQM[1]
6 213 108
16V R3 ADDR7 MD15 MD[15] VD1_8
R408
R243 DQM[2]
75R
MCA[7] 214 107

100R VDDC11 VDDC5 DQM[3]
4 5 1 8 100n 215 106 C448
R4 RD_EMU R1 VD1_8 VSSC11 MD14 MD[14]
216 105
RD VSSM6
2 7 217 104
WR_EMU R2 C411 WR MD13 MD[13] 100n DQS[0]
DQS[0-3]
218 103
3
ALE VDDM6 16V 16V DQS[1]
6 219 102 100n
ALE_EMU R3 MPUCSON MD12 MD[12] DQS[2]
220 101
INT# 100R INT VSSM5 DQS[3]
4 5 221 100
C401 MPUCSON R4 R244 AVDD_ADC3 AVDD_ADC3 DQS1 DQS[1] C456
222 99
C_SELECTED S430 AVSS_ADC3 VDDM5 VDDMQ_2V5 DIN[0]
223 98
C VREFN_3
VREFP_3
224
225
VREFN_3
VREFP_3 IC224 VSSM4
DQM1
97
96
DQM[1]
DIN[1]
DIN[2]
100n PR_R1 PR_R1 MD11 MD[11]
R401
DIN[3]
75R
226 95
PR_R2 PR_R2 VDDM4 DIN[4]
MAIN PICTURE 227 94
C400
AVDD_ADC2
228
229
AVDD_ADC2
AVSS_ADC2 SVP_EX_51 MD10
MD9
93
92
MD[10]
MD[9] C449
DIN[5]
DIN[6]
CVBS_SVP CVBS2 VREFN_2 VREFN_2 VSSC5 DIN[7]
230 91
100n VREFP_2 VREFP_2 MD8 MD[8] 100n DIN[8]
231 90
16V C C MD7 MD[7] 16V VD1_8
R400
DIN[9]
75R
C402 232 89
S431 PB_B1 PB_B1 VDDC4 DIN[10]
233 88
DIN[0-23]
CVBS3 PB_B2 PB_B2 MD6 MD[6] DIN[11]
234 87
CVBS_SVP 100n AVDD3_AVSP2 AVDD3_AVSP2 VSSM3 DIN[12]
235 86
16V AVSS3_BG_ASS MD5 MD[5] DIN[13]
R402
R427 236 85
75R
75R CVBS_OUTP VDDM3 DIN[14]

237 84
CVBS_OUTN MD4 MD[4] DIN[15]
S441 238 83
AVDD_ADC1 AVDD_ADC1 VSSM2 DIN[16]
239 82
AVSS_ADC1 DQS0 DQS[0] DIN[17]
240 81
VREFN_1 VREFN_1 VDDM2 DIN[18]
241 80
VREFP_1
S439
VREFP_1 VSSM1 DIN[19]
242 79
CVBS1 DQM0 DQM[0] DIN[20]
243 78
CVBS2 CVBS2 MD3 MD[3] DIN[21]
S438 244 77
CVBS3 CVBS3 VDDM1 VDDMQ_2V5 DIN[22]
C406 245 76
S425 AIN_N1 MD2 MD[2]
C451
DIN[23]
100n
16V
246 75
Y_G1 Y_G1 Y_G1 MD1 MD[1]
247 74
RGB_GIN 100n AIN_N2 VSSC4
248 73
16V Y_G2 Y_G2 MD0 MD[0]
249 72
R403
AIN_N3 DIN20 DIN[20]

75R
100n 250 71
VSSC13 DIN21 DIN[21]
C452
100n
251 70
C409 VDDC13 DIN22 DIN[22]
252 69
VD1_8 PDVDD PDVDD DIN23 DIN[23]
253 68
PDVSS VSSC3 VD1_8
254 67
S426 PAVDD PAVDD VDDC3
255 66
PR_R1 PAVSS VSSH3
256 65
RGB_RIN 100n XTALI VDDH3 VDDH
TESTMODE
LVDSVDDP
R404
LVDSGND
LVDSVCC
16V C407
75R
VREFP_1
VREFN_1
VREFP_2
VREFN_2
VREFP_3
VREFN_3
PLL_GND
PLL_VCC
PAVDD1
PAVDD2
50V
PAVSS1
PAVSS2
AIN_HS
AIN_VS
FLD_IO
XTALO
VDDH1
VDDH2
VDDC1
VDDC2
TCLK+
RESET
VSSH1
VSSH2
VSSC1
VSSC2
TCLK-
20p
DIN19
DIN18
DIN17
DIN16
DIN15
DIN14
DIN13
DIN12
DIN11
DIN10
MLF1
TD1+
TA1+
PWM
TC1+
TB1+
V5SF
DIN9
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
DIN0
PLF2
TD1-
TA1-
TC1-
TB1-
SDA
GPO
CLK
SCL
DE
14.31818MHz
H
V
C414
X400
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1
2
3
4
5
6
7
8
9
S427
PB_B1 50V
20p
R418
R419
RGB_BIN 100n
R405
16V C408
75R
R422
10k
C415
C450
C457
C460
C462
C463
C467
100n
100n
100n
100n
100n
100n
16V
16V
16V
16V
16V
16V
22R
22R
DIN[19]
DIN[18]
DIN[17]
DIN[16]
DIN[15]
DIN[14]
DIN[13]
DIN[12]
DIN[11]
DIN[10]
DIN[9]
R2217 DIN[8]
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
VDDH
PAVDD1
MLF1
PAVDD2
PLF2
MAIN RGB INPUT
TXCLKOUT+
TXCLKOUT-
SDA_EX
SCL_EX
RST_H
TXOUT3+
TXOUT2+
TXOUT1+
TXOUT0+
VGA_HSIN
VGA_VSIN
TXOUT3-
TXOUT2-
TXOUT1-
TXOUT0-
33R
VCCA_3V3
PARITY
R2218 2u2
33R AVDD_ADC3 L404
4k7
R420
LVDS OUT
VCCA_3V3
VCCA_3V3
26R_100MHZ_1.5A VA1_8
DHS_2EX
DVS_2EX
VDDL L401 VD1_8 C436

C426
C2234
C2231
C2232
C442
C445
C2233
S440
100n
100n
100n
16V
16V
16V
16V
100n
10u
100n
16V
PWM2
16V
100n
C2404
C429
16V
C2401
C2402
C2403
16V
10u
C2212
C2213
C2214
C2215
C2400
CLK_2EX
C431
C433
C420
100n
100n
100n
100n
S415
100n
100n
100n
100n
100n
100n
100n
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
10u
C422
100n
16V
C427
DIGITAL SINC
100n
16V
R423
R425
10k
10k
100n
VD1_8
VD1_8
26R_100MHZ_1.5A
VDDH
SC2_FB_SVP
1N4148
MPUCSON MPUGPIO4 VCCA_3V3 AVDD_ADC1 L406

D101
DE_2EX
VA1_8
TXCLKOUT+
TXCLKOUT-
R424
R426
10k
1k
C2239
C2242
C2241
C2240
100n
C454
C458
100n
100n
16V
100n
16V
16V
100n
16V
10u
16V
26R_100MHZ_1.5A
STBY_3V3 FB_CONTROL AVDD_ADC2 L409
VA1_8
R2211
R2212
10k
10k
STBY_5V
C2230
C2229
C2228
100n
C465
C468
100n
100n
16V
100n
16V
16V
16V
16V
10u
C2227
R428
100n
TXCLKOUT+
16V
TXCLKOUT-
1k
R413
SDA_EX 68R SDA3
R439
C472
100n
1k
VCCA_3V3
R414
SCL_EX 68R SCL3 150R 600mA lik ferit R440 26R_100MHZ_1.5A
L400 1R SC2_FB_SVP 150R 600mA lik ferit PAVDD L408
VDDH VCCA_3V3 L402 VL1_8
Q402
BC848B
C410
C412
68p
68p
S442 VCCA_3V3
C473
Q401
10p
FB
C2220
C2221
C2254
C2222
C2235
C2236
C2238
AVDD3_AVSP2
C421
C423
BC848B
C466
100n
100n
100n
100n
100n
100n
100n
100n
100n
C2237
16V
16V
16V
16V
16V
16V
10u
100n
C469
C2226
C2224
C2225
10u
C430
100n
C432
100n
C2223
16V
100n
100n
16V
16V
16V
16V
10u
100n
VESTEL ELECTRONICS
16V
S445
TV R&D GROUP
TFT TV 17MB15E-5 TFT VIDEO DECODER
VER E0 DATE M.KURSAT SHEET4
21/4/2004 SARIARSLAN
VESTEL ELEKTRONICS
TV R&D GROUP
TFT TV 17MB15E-5 TV DDR RAM
VDDMQ_2V5_FLT
DATE MUHAMMET KURSAT
VDDMQ_2V5_FLT
VER E0 SHEET 5
21/4/2004 SARIARSLAN
VDDMQ_2V5_FLT
MVREF
MD[28]
MD[29]
MD[30]
MD[31]
VCCA_2V5_FLT
R500
MD[27] 10R
1 R1 8 100n
R510
C517
4
1
MD[26] C505
R508
R4
R3
R2
R1
10R
2 R2 7
VCCA_2V5_FLT
C518
MD[25] R512
C501
100u
7
3 6
1u
1k
R3 1k 16V
8
MD[24] 50V
100n
4 R4 5 C502 4n7
R501
DQM[2]
DQM[3]
MD[23] 10R
DDQS2
DDQS3
1u C525
1 R1 8
MD[0-31]
50V 50V
MD[22] 4n7
2 7 C516
R2
MD[21]
3 C524
R3 6 50V 100u
107
108
144
106
24
35
36
48
59
60
71
72
95
96
11
83
12
84
14
16
18
19
21
23
38
47
51
63
87
99
58
70
94
31
30
46
MD[20] 4n7 16V
4 5
R4 16V
DQ27_B12
DQ26_C11
DQ25_C12
DQ24_D12
DQ15_E11
DQ14_E12
DQ13_F11
DQ12_F12
DQ11_H11
DQ10_H12
DQ9_J11
DQ8_J12
DM3_A11
DM1_G11
DQS3_A12
DQS1_G12
VREF_M12
VDDQ_B2
VDDQ_B4
VDDQ_B6
VDDQ_B7
VDDQ_B9
VDDQ_B11
VDDQ_D2
VDDQ_D11
VDDQ_E3
VDDQ_F3
VDDQ_H3
VDDQ_J3
VDDQ_E10
VDDQ_F10
VDDQ_H10
VDDQ_J10
VDD_C7
VDD_C6
VDD_D10
100n
R502 C523
MD[19] 10R 50V
1 R1 8 4n7
C532
MD[18] 16V
2 7 100n
R2 C522
MD[17] 9 39
3
DQ28_A9 VDD_D3 50V
8 118
R3 6 DQ29_A8 VDD_K10 4n7
C531
MD[16] 20 115
DQ30_B8 VDD_K7 16V
4 5 7 114 100n
R4 DQ31_A7 VDD_K6 C521
22 111
NC_B10 VDD_K3 50V
82 92 4n7
NC_G10 VSS_H8 C530
DQS[0] 120 91
R513 NC_K12 VSS_H7 16V
119 90 100n
15R DDQS0 NC_K11 VSS_H6 C506
DQS[1] 123 89
R514 NC_L3 VSS_H5 50V
134 80 4n7
15R DDQS1MCLK01# NC_M2 VSS_G8 C529
DQS[0-3]
DQS[2] 122 79
R515 NC_L2 VSS_G7 16V
75 78 100n
15R DDQS2 NC_G3 VSS_G6 C507
DQS[3] 15 77
R516 MCLK01 NC_B3 VSS_G5 25V
116 68 10n
15R DDQS3 NC_K8 VSS_F8 C528
129 67
NC_L9 VSS_F7 16V
131 66 100n
R503 CK-_L11 VSS_F6 C508
130 65
WE# 1 R1 8 CLKE
R517
33R
143
110
CK_L10
CKE_M11 EM6A9320 VSS_F5
VSS_E8
56
55
25V
10n
C527
CAS#
2 R2 7 109
121
WE-_K2
CAS-_K1 IC1 VSS_E7
VSS_E6
54
53 C509
16V
100n
3
RAS-_L1 VSS_E5
6 133 45
RAS# R3
BA0
CS-_M1 VSS_D9 25V C515
R518 135 43 10n
33R BA0_M3 VSS_D7 16V
4 5 124 42 100n
CS0# R4 BA1_L4 VSS_D6
MA[11] 126 40
A11_L6 VSS_D4 C510
MA[10] 113 104
BA1 R519 A10_K5 VSS_J8 25V C504
MA[9] 127 103 10n
33R A9_L7 VSS_J7 16V
MA[8] 142 102 100n
A8/AP_M10 VSS_J6
MA[7] 141 101
A7_M9 VSS_J5
R520
R521
C511
33R
33R
MA[6] 140 117

MA[0-11]
A6_M8 VSS_K9 C503

MA[5] 128 112
A5_L8 VSS_K4 25V 16V
MA[4] 139 105 10n 100n
A4_M7 VSQ_J9
MA[3] 138 93
A3_M6 VSSQ_H9
MA[2] 125 100
A2_L5 VSSQ_J4 C512 C2253
MA[1] 137 88
A1_M5 VSSQ_H4 25V 16V
MA[0] 136 81 10n 100n
A0_M4 VSSQ_G9
VSSQ_A10
VSSQ_C10
VSSQ_A3
VSSQ_D5
VSSQ_D8
VSSQ_G4
DQS0_A1
DQS2_G1
VSSQ_C3
VSSQ_C4
VSSQ_C5
VSSQ_C8
VSSQ_C9
DQ20_H2
DQ21_H1
VSSQ_E4
VSSQ_E9
VSSQ_F4
VSSQ_F9
DQ16_E2
DQ17_E1
DQ18_F2
DQ19_F1
DQ22_J1
DQ23_J2
DM0_A2
DM2_G2
DQ0_A6
DQ2_A5
DQ3_A4
DQ7_D1
DQ1_B5
DQ4_B1
DQ5_C2
DQ6_C1
NC_L12
C513 C2252
DQM[0] 25V
DQM[0-3]
DQM[1] 10n 16V

DQM[2] 100n
DQM[3] C514
132
17
13
26
25
37
50
49
62
61
86
85
97
98
74
73
10
27
28
29
32
33
34
41
44
52
57
64
69
76
6
5
4
25V C2251
10n 16V
100n
C519
DQM[1]
DQM[0]
DDQS1
DDQS0
MCLK0 R2209 MCLK01 25V C2250

10R 10n 16V
R1 8
R2 7
R3 6
R4 5
100n
R506
10R
R504
C520
47R
C526
1
BLM21B201S
BLM21B201S
R1 8
R2 7
R3 6
R4 5
C500
R507
L501
L500
10R
10n
1
R1 8
R2 7
R3 6
R4 5
R1 8
R2 7
R3 6
R4 5
25V
VCCA_2V5
R509
R511
R505
VDDMQ_2V5
10R
10R
47R
1
4
MD[15]
MD[14]
MD[13]
MD[12]
MD[11]
MD[10]
MD[9]
MD[8]
MD[7]
MD[6]
MD[5]
MD[4]
MD[3]
MD[2]
MD[1]
MD[0]
R2208
10R
MCLK0# MCLK01#
IC217
PWM
PWM2
RD_EMU
WR_EMU
1 NC1 NC10 44
GAL_IAP
PSEN_UP
MCA[19]
MCA[18]
MCA[17]
S412
S414
2 NC2 NC9 43
R415
1k2
S621
S620
S622
MCA[0]
VCCA_2V5
22R
R412
MCA[0] 3 A0 NC8 42
50V
10u
8
7
6
5
4
MCA[1] MCA[19]
I6
I5
I4
I3
I2
C416 MCA[1] MCA[19]
4 A1 A18 41
R416
4k7
MCA[2] MCA[18]
VCC_5V
MCA[2] 5 A2 A17 40 MCA[18]
Q400
BC337
22R
MCA[16]
R417
16V
100u 9 I7 I1 3 MCA[16] MCA[17]
MCA[3]
MCA[15]
MCA[3] 6 A3 A16 39 MCA[17]
10 GND I0 2 MCA[15]
C417 MCA[14]
C419 11 OE CLK 1 MCA[14] MCA[16]

MCA[4]
MCA[4] 7 A4 A15 38 MCA[16]
IC622
12 Q0 VCC 20
100n
16V
13 Q1 Q7 19 MCA[15]
GAL16LV8
S623
MCA[15] 8 CS OE 37 SRAM_OE
MCAD[0] MCAD[7]
MCAD[0] 9 I/O1 I/O8 36 MCAD[7]
FL_A14
FL_A15
BRT_CNTL
IR
MCAD[1] MCAD[6]
BRIGHTNESS CONTROL
Q2 14
Q3 15
Q4 16
Q5 17
Q6 18
MCAD[1] 10 I/O2 I/O7 35 MCAD[6]
STBY_3V3
11 VCC VSS1 34
4k7
R604
STBY_3V3
FL_OE
FL_WE
16V
16V
FL_A16
FL_A17
100n
100n
C600
C601
LED1 R6018
BC848B
SRAM_OE
SRAM_WE
22k
STBY_5V
Q6006 5 12 VSS VCC1 33
STBY_3V3
4 K6R4008V1C-I/C-P
MCAD[2] MCAD[5]
R6019
22k BC848B 3 MCAD[2] MCAD[5]
S6300 13 I/O3 I/O6 32
Q6007
LED2
2
MCAD[3] MCAD[4]
S6310 1 MCAD[3] MCAD[4]
14 I/O4 I/O5 31
PL600
MCA[14]
220R
R6015
S624
15 WE A14 30 MCA[14]
220R
SRAM_WE
R6016
MCA[5] MCA[13]
MCA[5] 16 A5 A13 29 MCA[13]

S6312 S6311
STBY_5V STBY_3V3
MCA[6] MCA[12]
MCA[6] 17 A6 A12 28 MCA[12]
PL607
MCA[19] MCA[7] MCA[11]
1 2 MCA[19] MCA[7] 18 A7 A11 27 MCA[11]
CIRCUIT OF SW UPDATE FROM SCART2 MCA[18]
3 4 MCA[18]
MCA[17] MCA[8] MCA[10]
5 6 MCA[17] MCA[8] 19 A8 A10 26 MCA[10]
S605 S6315 MCA[16]
7 8 MCA[16]
MCA[0] MCAD[0] MCA[9]
SCSCL 100R MCA[0] 9 10 MCAD[0] MCA[9] 20 A9 NC7 25
SCL3
R6006 MCA[1] MCAD[1]
MCA[1] 11 12 MCAD[1]
MCA[2] MCAD[2]
4k7
R600
Q600
10k
Q604
MCA[2] MCAD[2]
R6007
13 14 21 NC3 NC6 24
MCA[3] MCAD[3]
MCA[3] 15 16 MCAD[3]
R6005 MCA[4] MCAD[4]
STBY_5V
47k MCA[4] 17 18 MCAD[4] 22 NC4 NC5 23
MCA[5] MCAD[5]
SW_ENABLE
MCA[5] 19 20 MCAD[5]
MCA[6] MCAD[6]
Q605
10k
4k7
Q601
R601
MCA[6] MCAD[6]
R6010
21 22
MCA[7] MCAD[7]
MCA[7] 23 24 MCAD[7]
SCSDA 100R
MCA[8]
SDA3
R6011
S606 S6316 MCA[8]
25 26
MCA[9]
STBY_3V3 27 28 MCA[9]
MCA[10]
MCAD[0]
MCA[0]
MCA[1]
MCA[2]
MCA[3]
MCA[4]
MCA[5]
MCA[6]
MCA[7]
29 30 MCA[10]
MCA[11]
31 32 MCA[11]
MCA[12]
33 34 MCA[12]
MCA[13]
35 36 MCA[13]
MCA[7]
MCA[1]
MCA[2]
MCA[3]
MCA[5]
MCA[6]
MCA[0]
MCA[14]
37 38 MCA[14]
MCA[15]
Q602
MCA[4]
BSN20
39 40 MCA[15]
100R
SCL
SCL3
R606 41 42 FL_OE
S6320
MCAD[0]
43 44 PSEN_UP
10k
R607
SRAM_OE
9
8
7
6
5
45 46
VCCA_3V3 S6319
FL_A16
FL_A15
STBY_5V 47 48 RD_EMU
12 A0
11 A1
10 A2
A3
A4
A5
A6
A7
13 DQ0
49 50 SRAM_WE
S6318
10k
R610
51 52 WR_EMU MCAD[1] MCA[12]
MCAD[1] 14 DQ1 A12 4
53 54 STBY_3V3 MCAD[2] MCA[12]
100R S6317
MCAD[2]
SDA
15 DQ2 A15 3
SDA3
R611 RST#
LEVEL SHIFTER
55 56
16 VSS A16 2
Q603
BSN20
57 58 ALE_EMU MCAD[3]
ST M29F040 Flash
MCA[18]
MCAD[3] 17 DQ3 A18 1

CORRESPONDS TO
59 60 MCAD[4] MCA[18]
MCAD[4] STBY_3V3
IC219
18 DQ4 VCC 32
MCAD[5]
25V
MCAD[5]
100n
19 DQ5 W 31
Winbound W27E040 EPROM &
M29W040B
MCAD[6]
C605
MCAD[6] 20 DQ6 A17 30

S604
SDA2 5 SDA VSS 4
E2
DQ7 21
E 22
A10 23
G 24
A11 25
A9 26
A8 27
A13 28
A14 29
SCL2 6 SCL A2 3
FL_A17
FL_WE
24LC32A
7 WP A1 2
MCAD[7]
NVM_WP
FL_A14
FL_OE
MCA[10]
MCA[11]
MCA[9]
MCA[8]
MCA[13]
STBY_3V3
S603
8 VCC A0 1
C603
S602 100u
16V
100n
C604
16V IC218
MCAD[7]
VCCD3.3V_FLT
MCA[0]
MCA[1]
MCA[2]
MCA[10]
MCA[9]
MCA[8]
MCA[10]
MCA[11]
MCA[13]
VCCA_3V3
MCAD[5]
MCAD[0]
MCAD[6]
MCAD[7]
MCA[3]
MCA[5]
MCA[11]
MCA[4]
MCA[9]
MCA[6]
MCA[8]
MCA[7]
MCA[0]
MCA[1]
MCA[2]
MCA[10]
MCAD[5]
MCAD[0]
MCAD[6]
MCAD[7]
PSEN_UP
ALE_EMU
8
7
6
5
25V
MCA[3]
MCA[5]
MCA[4]
MCA[9]
MCA[6]
MCA[8]
MCA[7]
MCA[11]
100n
1k
SCL2
SDA2
R1
R2
R3
R4
10R
4
3
2
1
R625
R6037
PDP_GO1/BL_ON_OFF
1
2
3
4
5
6
7
8
5
6
7
8
R4
R3
R2
R1
10R
C606
R624
R3
R2
R1
R4
R3
R2
R1
10R
10R
5
6
7
8
R626
R627
R4 4
3
2
1
4
3
2
1
S600
Q6009
STBY_3V3
S608
S607
BC848B
4k7
R6035
R629
10R MCA[13]
1 R1 8
MCA[13]
SCL3
SDA3
MCA[12]
2 R2 7
MCA[12]
100 D5
99 D0
98 D6
97 A0
96 D7
94 A1
93 A2
89 A3
86 A4
84 A5
83 A9
82 A6
81 A8
MCA[14]
90 A10
85 A11
LOC_KEY
87 ALE
3
91 VSS3
R3 6
88 PSEN
MCA[14]
95 FL_CE
CPU_GO1/STBY
1k
10R MCA[15]
D600
R6038
MCAD[1] R628 4 R4 5
MCA[15]
92 VDD3_3_3
PDP_GO/BL_ON_OFF
BZT55C5V1
MCAD[1] R4
5 4 1 D1 FL_RST 80
STBY_3V3 MCAD[4]
R6036 R3
MCAD[4] 6
4k7 MCAD[2] 3 2 D4 A7 79
1
2
MCAD[2] R2
PL606
7 2 3 D2 A13 78
MCAD[3]
Q6008
BC848B
R1
MCAD[3] 8 1 4 D3 A12 77
STBY_3V3
L600
STBY_2V5
5 XROM A14 76
CPU_GO
L601
3
2
1
VCCD3.3V_FLT
PL604
BLM21B201S
6 VDD2_5 VDD3_3_2 75
100n
C613
100n
22u
C610
50V
25V
16V
100n
C607
C608
7 VSS VSS2 74
25V
100n
C609
22u
STBY_3V3
R688
25V
C611
100n
C612
8 VDD3_3 VDD2_5_1 73
STBY_3V3 4k7
STBY_2V5
4k7
SDA2
R632
9 P0_0 FL_PGM 72
SDA SCL
R689 4k7
SCL2 10 P0_1 A15 71 R639
10R MCA[17]
R6030 4k7 1 R1 8
R6013 MCA[17]
AC_INFO 47R 11 P0_2 A17 70 MCA[16]
R6031 R690 4k7 2 R2 7
MCA[16]
MUTE_AMP 47R 12 P0_3 A16 69 MCA[18]
R694 4k7 3 R3 6
MCA[18]
WR_EMU
RX1_RST# 13 P0_4 A18 68 MCA[19]

R695 4k7 4 R4 5
MCA[19]
RX1_INT 14 P0_5 A19 67
R696 4k7
RD_EMU R640 STBY_3V3
CPU_GO1/STBY 15 P0_6 NC5 66
4k7
UP_IRQ
15k
UP_TXD
C615
UP_RXD
R698 16 P0_7 RD 65
DVD_12V_SENSE 100n
S610
IC220
3k9
R697
17 ENE WR 64
S615 18 STOP NC4 63

SDA5550M
STBY_3V3
R648
S627
S628
S629
19 OCF P1_7 62 4k7
20 EXTIF NC3 61
4
3
2
1
21 CVBS BLANK_COR
R6042 60S601
PL308
UART SOCKET FOR IDTV
R684 1k
STBY_2V5
22 VDDA2_5 75R B 59
L603
25V
100n
R685
C621
22u
50V
C620
R6043
23 VSSA 75R G 58
4k7
R686
STBY_3V3
PIN8_SC1 15k 24 P2_0 75R R 57

R654 L604
Q6011
STBY_2V5
BC848B
25 P2_1 VDDA2_5_1 56
3k9
25V
100n
R653
C622
25V
100n
C623
26 P2_2 VSSA1 55
PIN8_SC2 15k
2
1
15k 27 P2_3 NC2 54 50V

R655
R656 33p
PL605
25V
100n
RST_H
C625
3k9 28 NC XTAL1 53
3k9
25V
100n
R660
C626
R657
C624
29 HS_SSC XTAL2 52
LOC_KEY
X600
6MHz
R2305 C627
STBY_2V5 1k
10k 30 VS NC1 51
R661
BC848B 50V
Q2299 33p
MMC_IR GIRISI
25V
100n
C628
100R
PIN8_SC3
R2306
P3_0 31
P3_1 32
P3_2 33
P3_3 34
P3_4 35
P3_5 36
P3_6 37
P3_7 38
VSS1 39
VDD3_3_1 40
P1_0 41
P1_1 42
P1_2 43
P1_3 44
P1_4 45
P1_5 46
P1_6 47
P4_2 48
P4_3 49
RST 50
STBY_3V3
25V
S6313
IR
VCC_8V
100n
100n
C633
25V
BC848B
Q6010
4k7
100n
R6014
R6040
4k7
R692
4k7
4k7
R691
C630
4k7
VCCD3.3V_FLT
R693
C631
VCCD3.3V_FLT
RST#
VER. E0
TFT TV
3
PC_STBY
R679
1
100R
4k7
IC221
R6039
LM809
TV R&D GROUP
L609
4k7
R680
BLM21B201S
STBY_3V3
VCCA_2V5
4k7
VESTEL ELECTRONICS
S614
STBY_5V
R681 100k 4k7

STBY_3V3
VCCD_3V3
4k7 R687 R676

SC2_FB
R682
R2301
R6017
DATE
47k
21/4/2004
Q2300 S613 4k7

FB
BC848B
10k
TV-LINK
R2303
R6041
RST#
4k7
SDA_TVLINK
R2304
100R S6314
VCCD_3V3
TV_LINK HDMI_CEC R6044

4k7
M.KURSAT
Q2301 R2302
2k7
R2300
SARIARSLAN
BC848B 47k
IR
STBY_3V3
INT#
SCL3
Sheet 06
SDA3
PWM
LED2
PORT
UP_RXD
LED1
UP_TXD
UP_IRQ
17MB15E-5 TFT TV MCU INTERFACE

NVM_WP
GAL_IAP
PROTECT
STBY_3V3
PDP_GO1/BL_ON_OFF
SDA_TVLINK
P1_5V IC3000
LM1117
HDMI_3V3
R2070
1k
IC2013 VCC_5V 3 IN OUT 2 HDMI_3V3_PLL
GND VOUT
P1_EVCC5
R2066
R2067
C3000 C3001 C3002 1
470k
470k
4
100n 100u 100n C3003 C3004
16V 16V 16V
1 S1 D1 6 P1_HPD 100n 100u
DSDA 16V 16V
REGULATORLAR COK IYI
IC2012 UPA672T
R2069
10k
SOGUTULMALI
VCC_5V 4k7 2 G1 G2 5 RX1_RST#

24LC02 R2068
1 S1 D1 6
C2072
R2062
100n
25V
4k7
MUMKUN OLDUGUNCA 9993 E YAKIN OLMALILAR IC3001
LM1117
UPA672T
R2063
47k
3 IN OUT 2
55
54
53
52
IC2003 3 D2 S2 4 VCC_5V
GND VOUT
HDMI_3V3
2 G1 G2 5 DSCL C3005 C3006 C3007 1 4
R2098 100n 100u 100n C3008 C3009
Q9
Q2
Q10
Q11
Q12
16V 16V 16V
1 A0 VCC 8 BC848B 100R SW_ENABLE 100n 100u
16V 16V
3 D2 S2 4
2 A1 WP 7
AUDIO_AGND
AUDIO_AGND
24LC02 DIN[0-23]
3 A2 SCL 6
AMP_PIN7
DIN[8]
DIN[9]
DIN[10]
DIN[11]
DIN[12]
DIN[13]
DIN[14]
DIN[15]
DIN[0]
DIN[1]
DIN[2]
DIN[3]
DIN[4]
DIN[5]
DIN[6]
DIN[7]
DIN[16]
DIN[17]
DIN[18]
DIN[19]
DIN[20]
DIN[21]
DIN[22]
DIN[23]
HDMI_3V3_PLL
R2064
P1_DDC_SCL 56R
4 VSS SDA 5
59
58
57
56
C2100
R2088
100k
R1 8
R2 7
R3 6
R4 5
R1 8
R2 7
R3 6
R4 5
50V
2n7
R2052
R2050
R2065
33R
33R
Q7
Q8
P1_DDC_SDA 56R
OVCC3
OGND3
SDA3
SCL3
C2101
4
DAC_AOR 560R
R1 8
R2 7
R3 6
R4 5
R1 8
R2 7
R3 6
R4 5
R2087
R2051
R2049
10u R2091
33R
33R
25V 50V 20k AUDIO_AGND
RX1_INT
100n
OGND_SII
OGND_SII
0VCC_SII
0VCC_SII
RX1_RST#
4
GND_SII
VCC_SII
AMP_PIN6
AUDIO_AVCC5
S818
S819
C2103
60R_100MHZ_3A
C2068
AUDIO_AGND
R2053
Place close to pins 79&80
4k7
L2014
10u
50V
C2104
25V AUDIO_AGND
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
51
C2069 100n C2102
100n R2089
AUDIO_AGND 25V 47k
5
10u C2099 270p R2090 AUDIO_AVCC5
Q0
Q1
Q2
Q3
Q4
Q5
Q6
INT
Q13
CSCL
VCC3
CSDA
GND3
RESET
OVCC4
OGND4
RSVDL2
50V 50V 47k
C2070
E
F
H
G
100n CLK_2EX
AMP_PIN3
25V DSDA 76 DSDA Q14 50
TP100
C2071
MC33202
R2094
IC2008
DSCL 77 DSCL Q15 49 33R
MC33202
1n
50V OGND_SII 78 OGND5 Q16 48
19 P1_HPD 79 PGND1 OVCC2 47 0VCC_SII

R2048
18 P1_CBL5V 80 PVCC1 ODCK 46 33R
R2047
33R
D
B
C
1 8
17 RX1_AVCC3 81 EXT_RES OGND2 45 OGND_SII R1
4
2 7
16 P1_DDC_SDA AVCC_SII 82 AVCC Q17 44 R2
50V
3 6 10u C2093
15 P1_DDC_SCL 83 RXC- Q18 43 R3 R2081 AUDIO_AGND
AMP_PIN3
S817 DAC_AOL 560R
4 5
AMP_PIN6
AMP_PIN7
14 84 RXC+ Q19 42 R4 C2092 270p
50V
C2091
R2080
S816
100k
50V
2n7
13 CEC 85 AGND1 GND2 41 GND_SII
S815 AGND_SII
12 86 RX0- VCC2 40 VCC_SII

R2046
NC3
S814 33R
1 8
11 87 RX0+ Q20 39 R1
AUDIO_AGND
AUDIO_AGND
IC2002
R2085
R2086
1k2
5k6
25
2 7
10 AGND_SII 88 AGND2 Q21 38 R2
SII9993
R2078
R2079
3
5k6
1k2
6 C2098
9 AVCC_SII 89 AVCC1 Q22 37 R3
AUDIO_AGND
4 5 C2090
8 AGND_SII 90 AGND3 Q23 36 R4 2n7
AUDIO_AGND 50V
R2084
S813 R2045
4k7
7 91 RX1- DE 35 33R DE_2EX 2n7
50V
AUDIO_AVCC5
R2077
S812 R2044
AUDIO_AGND
4k7
C2097
6 92 RX1+ VSYNC 34 33R DVS_2EX
S811 R2043 AUDIO_AGND
C2089
5 AVCC_SII 93 AVCC2 HSYNC 33 R2042
33R DHS_2EX 2n7
PGND2
PVCC2
S810 33R AUDIO_AGND 50V
PLLIN
OVCC
1 8
AGND_SII 94 AGND4 SCK 32 R1 DAC_SCK
R2082
R2083
4 2n7
2k32
2k32
50V
2 7
AVCC_SII 95 AVCC3 WS 31 R2 DAC_WS
R2075
R2076
3
2k32
2k32
C2095
21
22
23
24
3 6
96 RX2- SDO 30 R3 DAC_SD0
C2096
2
50V
3u3
10u
4 5
97 RX2+ SPDIF 29 R4 50V
C2088
1 R2074
50V
3u3
25V 270k AUDIO_AGND
PL2001 100n
AGND_SII 98 AGND5 OGND1 28 OGND_SII R2073
5
R2040 R2041 AUDIO_AGND 270k
GND_SII 99 GND4 MCLKIN 27 33R 33R DAC_MCLK C2094
AOUTR
VCC_SII 100 VCC4 MCLKOUT 26
DACGNDR
DACGNDG
DACGNDB
DACVCCR
DACVCCG
DACVCCB
VA
DACGND
DACVCC
AGND
RSVDO1
RSVDO2
AOUTL
RSVDL1
ANRPR
ANBPB
COMP
ANGY
GND1
VCC1
RSET
CS4334
NC1
NC2
IC2006
HDMI_3V3
10
11
12
13
14
15
16
17
18
19
20
DEM/SCLK
1
SDATA
MCLK
LRCK
R2035
RX1_AVCC3
100R
60R_100MHZ_3A Place PLL circuit as

TOCOMP
HDMI_3V3
R2038
4k7
VCC_SII
0VCC_SII
compact and as close to

L2012 50V
C2054
C2055
C2056
C2057
C2058
C2059
100n
100n
100n
25V
10u
chip as possible
HDMI_3V3
1n
1n
1n 25V
VCC_5V
4
10u
GND_SII
C2062 3k9
Close to pin9 25V R2039
C2067
DAC_MCLK
100n
DAC_WS
25V
DAC_SCK
DAC_SD0
47n
IC2014
S805
C2063
C2060
Place close to pins 22&23
50V C2066
S809
S808
10u
1 1OE A8 8
60R_100MHZ_3A
HDMI_3V3 AVCC_SII L2016
R2095
10n
10k
L2015 VCC_5V AUDIO_AVCC5 25V TOCOMP
C2073
C2074
C2075
C2076
C2077
60R_100MHZ_3A
C2064
100n
100n
100n
25V
16V
25V
25V
50V
330R_100MHZ_3A
10u
1n
C2061
2 1A 2OE 7
R2097
R2096
L2013
S800
330k
27k
AGND_SII L2017 10u
330R_100MHZ_3A
AUDIO_AGND 16V SN74CB3Q3305
VCC_5V
Place cap.s
S807
close to C2065
S801 HDMI_CEC 3 1B 2B 6
pin8
Q1
2N7002
HDMI_3V3 VCC_SII
C2078
C2079
C2080
C2081
C2082
100n
100n
100n
P1_5V
16V
25V
25V
50V
50V
10u
1n
1n
25V
S802 4 A4 2A 5
1N5817
GND_SII
D2022
HDMI_3V3_PLL
R2071 D2021
P1_CBL5V 10R P1_EVCC5
HDMI_3V3
S803
0VCC_SII 1N5817
S806
CEC
VESTEL ELECTRONICS
BZT55C5V6
17MB15E-5
A D2020 K
2
BZT55C5V6
C2083
C2084
C2085
C2086
C2087
TV R&D GROUP
100n
100n
16V
25V
25V
50V
50V
10u
1n
1n
D2023
S804
PART AUTHOR DATE Sheet
1
OGND_SII
HDMI/DAC METEHAN30.10.2004 8 of 9
ALTUNLU
PL904
L918 PL903
1
VCC_5V
VCC_12V VESTEL ELECTRONICS
1
S908 TV R&D GROUP
PANEL_VCC1 VCCA_3V3
L917 2 S909
PL902
VCCA_3V3 STBY_3V3 TFT TV 17MB15E-5 TFT TV POWER SUPPLY
7
3 S910
LG_1/IRQPDP STBY_5V VER. E0 DATE M.KURSAT
PDP_GO1/BL_ON_OFF 21/4/2004 Sheet 09
SARIARSLAN
L906 4 MMC
5V AC_INFO
SUPPLY
VCC_12V
C900
100u
16V
5V
L909 STBY_5V
PL900 N.C
STBY_3V3
1 STBY_5V
S903
S904
D905
FAN1616AS-3.3 SOT 223
L905 L923
L913
2 +12V IC902 1N4007
3 2 STBY_2V5 10u
L920 D906
1000u
C906
C908
C914
C916 1
C920
3
100n
220u
220u
16V
50V
16V
16V
100n
L900 16V 1N4007 IC904
4
L907
L901 R918
5 1 SW.COLL. DRI.COL. 8
L902 LM317
IC900
6 STBY_3V3 2 EMITTER SENSE 7
R916
100R
R917
100R
C942
L903 3 IN OUT 2
MC34063A
R922
ADJ
3k3
7 1 3 CAP. VCC 6
C901
L904 50V C904 VCC_8V

47u
R914
100n 56p
10k
8 16V 4 GND COMP. 5
C944
100p
R902 C910
9 1k 100n
R907
10k
C909
16V
50V
VCC_12V
47u
10 R912 D907
1N4148
D912
R903
BC858B 10k VCC_5V
5k6
PROTECT Q901
11 1N4148 56k
R908 R921
Q900 D908
12 BC848B 10k C945
VCCA_3V3
1.8V_ON/OFF
R910
R920
R919
1N4148
10k
6k8
2k2
L919
VCC_5V D909 22u
22u
C903 100n VCCD_3V3
1000u
C912
C932
C933
C934
C935
100n
100n
100n
100n
16V
N.C 56p
1N4148
R900
CS52015-3
STBY_3V3 470R IC901 D910
C943
PANEL_VCC
VCC_8V
PANEL_VCC1
47u
L924
3 VIN VOUT2
22u
R901 GND 1N4148
470R 1 C919
C931
C915
100u
16V
C902 L912 100u
R909
120R
100n 16V
16V VDDMQ_2V5
D900 C922
N.C
22u C917
100n
16V
100n
16V R915 STBY_2V5 10u
PL901
STBY_2V5
1N4007 470R C946
C918
50V
PDP_GO/BL_ON_OFF 120R 1R N.C
1 D901 R911 R913 S907
A_DIM_PWM 2 1N4007
VCC_33V
L921
SOT 223
6
4
DIG_DIM_PWM 3 D902
BLM21B201S
IC223 IC903
FDC642P
3 2 VCCA_2V5
SEL 4 1N4007 LD1117 L922
Q902
1
R925
10k
C921
C923
1N4148
LM2576
50V
D903 BLM21B201S
47u
D913
PROTECT 5 100n
FEEDBACK
16V
1N4007
OUTPUT
CPU_GO1/STBY 6
ON/OFF
1
VCCA_3V3
SAP 30030067 ADJ TYPE

D914
GND
C947
VIN
VCC_33V 7 L915
S905 1_8VMAIN
22u
C925
C936
C939
8
100n
100n
100u
16V
16V
16V
VCC_12V 1.8V_ON/OFF
C927
10u
330R
R923
100u
16V
VL1_8
1
S911 16V
S913
9
VCCD_3V3
R905 S902 Q903

VCC_12V L908
S912
PORT 160R 1_8VMAIN
D915
10
22u R904 L914 VD1_8
L911
330R 1_8VMAIN
22u
C905
C924
C937
C940
100u
100n
100n
100u
16V
16V
16V
16V
22uH_3.9A_SMD
C928
100u
16V
L910
R924
S900
10k
A_DIM_PWM BRT_CNTL 22u
STPS745
VA1_8
D911
SS33
L916
1000u
D904
S901
C911
C913
100n
16V
16V
DIG_DIM_PWM 1_8VMAIN
22u
C926
C929
C930
C938
C941
100n
100u
100n
100u
16V
16V
16V
22u
PANEL_VCC_ON/OFF
R6018" R259" IC213"
R248" Q6006" 251005"
R924" PL600"
A"
R246" S6300"
Q903"
0C$
VER
R277" R6015" S907"
PL903"
PL200"
R265" S6312" 17MB15E-5" IC901"
A"
S637" R6016" R258"
S908" PL902" C945"
S6311" S6310"
Q902"
S650" Q6007" S909" R257"
R6019" S910" C914"
C942"
C944"
C2052"
C2051"
R922"
R208"
R925"
R923"
R209" R256"
R210" D201" L909"
FD15"
IC900"
S608"
C947"
R284" R280" L913" S607"
R255"
L924"
IC904"
R281"
R282"
C916" C290"
Q208"
R916"
D200"
S223"
D906"
D905"
IC214"
L923"
R913"
R283" C917" C931"
R918"
R902"
R903"
C904"
PL904"
R917" S649"
IC902"
Q207" R279"
IC212"
R920"
R919"
C915"
R911"
C910"
L907"
R211" R213"
D903"
C946"
D902"
D901"
D900"
C909"
L912"
R910"
R2084"
R2082"
R219"
R212" R215" R218"
R216"
Q901" R908" C918"
C281"
C920"
C2053"
C901"
R217" R2073"
L917"
L904"
L903"
L902"
C932"
C353"
C2094" S337" R909" C902"
R2090"
R2089"
R2083" R2074"
C2099"
C933"
R214"
C302" C906" R915"
R912"
R914"
R907"
JK300" S336" C935" C919" C922"
R2085" C912"
R238"
C934"
IC211"
R331" R2086" C2096"
C289"
D106" Q900"
C2088" C2098" C2101"
IC318"
D907" C900"
C2097"
C2103" D910" C502"
D908"
L905"
C505"
L919"
L901"
C2102"
R326"
C2095"
D909"
R312" R313"
JK301" R2076" S314" S307"
R516"
R501" R500" R508"
C356" R2075" S309" S308" C908"
S6319"
S6318"
L501"
R2077" S6320"
C2089"
C363"
R515"
R2088"
R2087"
C364" C2090" PL607"
S6317"
R332" C2104" C514"
2" 60"
D104"
C357"
L900"
IC2008" R512"
L918"
R2091"
L906"
C518"
LF"
R510" L920"
C2100"
IC2006"
C2404"
PL900"
C517"
R2078"
C2093"
C3009"
C2091"
D102"
L2017"
R2079" R2080"
IC1"
JK302" R333"
R2081" 1" 59" R502"
IC903"
C3008" C2092" R506"

C501"
C365"
C433"
C3007" IC219"
IC3001"
C358"
S623"
C601"
C3005" R2214"
K"
R509"
R503"
C3006"
C516"
R2213"
IC107"
S622"
R507"
R513"
R511"
C921"
C3004"
R514"
S614"
R6039" S613"
R6040" R692"
JK304" L400"
R604" C471"
IC217"
D2022" C3003" R2306"
L2016" C3000"
R2305" C423"
IC224"
PL104"
D2020"
IC3000"
R2217"
S110"
IC622"
C3002"
R103"
R607"
R606"
R610"
R611"
C436"
S108" C2235" PL103"

30"
29"
C406"
R423"
R244"
C2236"
D2021" Q100" C2237"
S604"
C605"
R2070" C2238"
C407" R404"
C405" R408"
JK303" R2066" Q603" C466"
C3001"
Q602"
C410"
R6005"
C426" R422"
R100"
X"
R2069"
S640"
R413"
S641"
C401" R401" S430"

C408" R405" S427"
C402" R402" S431"
C403" R406" S425"
S439" C404" R407"

S438" C400" R400"
R403"
R101"
R102" S107"
S426"
R424" C472" C473"
R414"
C2083"
R691"
R680"
R681"
R682"
Q604"
R419"
E"
Q605"
S6315"
R6041"
S818"
S819"
IC2013"
1" 1"
IC2012"
Q2"
S6316" C631" C428" S109"
R628"
R625"
R626"
C413" R439" R440" R627"
C419"
S605"
C412"
R2068"
R412" R415"
R676" IC221"
R600"
R2098"
S6314" IC220"
R624" L601"
L600"
R417"
Q601"
S643"
R679" S412" S414"
1"
C424"
2"
C2069" R2052" R2051"
R2063"
C607" S437" R418"
Q600"
S642"
PL2001" R2071" C443"
R2050"
IC2003" R2062"
R426"
X4
R6007"
R2065"
00
R6006"
"
C2072"
C611" R425"
S606"
R601"
R6010"
R6011"
R688"
R629" R639"
C444"
R2064" R689" S413"

R640"
S817" R2048" R690" S411"
R632"
R2067"
R694"
C411"
S816" R2094" C615"S442"

S815" R695"
R2029" R696" C610" R2303"
S814"
R2210" R698"
PCB KENARI"
S813" R648"
X"
S812" R660" L604" C469"

R2045" R655"
IC2002"
S811" IC215"
S810" R2044" R2304"
R2302"
Q401"
R2043"
Q2301"
Q6010" C445"
R2049" R2047" R2046" R2042"

K"
C620" Q2300"
S639"
S638"
X600" R2300" C929"

R2040" R2301"
C2058"
C2059"
R2038"
C2063"
C2066"
R2039"
C2081"
C2056"
C2057"
R2035"
R2041"
C939"
S644"
E"
R250"
S645" R251"
R2097" S807"
S603"
S602"
C459"
C2060" S809" S806" S445"
C2078"
C432"
C458"
C468"
L2015"
C2067"
S802"
Q2299"
S801"
C930"
C2062"
IC2014"
C603"
Q402"
Q1"
D2023"
C927"
L916"
C416"
L915"
C2061"
L206" R252" R428"
C2064"
LF"
IC218"
R2096"
C911"
L910"
C "B "E "
L204" C258"
D600"
C941"
S628"
S627"
S629"
L210" R254" D2102" R2095" Q400" L911"

L2004" C278" D222"
D913"
D2500"
C2055"
C2074"
L2006" R2025" R225" A" K" D911"
L2003" R2024" D2104"
C928"
R224"
S808" PL606"
L2005" C269" D2003"

D2105" R223"
C417" PL301"
L205" D224" R222" D904"

PL605" PL308" C298"
L914"
R221"
R220" R237" C275" IC210" C905"
C282" R242" L908"
C940"
S200"
S212" C299"
R2001" Q202" C1080"
IC207" R1067"
R231"
C276" R207" IC206"
R1033"
IC2001"
Q1004" R230"
R241" C283"
R1045" R227"
5" 1"
PL1001"
L1008"
C1132"
R204"
PL604"
C1087"
R1069"
Q2000" R2003"
R239" L2009"
Q1011"
R1046"
R2002" C272"
C292"
R226"
R2028"
PL205"
Q203" Q200"
Z"
Q1007"
C271" Q1009"
C1085"
C331"
C304"
R264"
C330"
C332"
C333"
R315"
R316"
R317"
C291" R1068" C2046"

L2000"
X300" C273"
R2027" R1071"
R260"
R261"
C2004" C1078"
D210" C288" C1124" C1136" IC223"
R2005"
X1
C2039" L2010" S201"

R2031"
R2032"
00
C279"
2"
R2026" R1070" IC208"
C2202"
D"
D2001" L313" C265"

L311"
C287" C1097"
Q2002" Q2003"
R2004" C1106"
C1164"
C1158"
C1148"
C1157"
C1138"
C1156"
C260" C1116"
L314"
R206" R1089"
20
C274"
L1018"
"
R1098"
Q
C1174"
C1175"
C1171"
R1108"
C1176"
R1106"
C317" C1154"
D914"
01 004
"
R1095"
C1133"
C1126"
L1020"
R2007"
R1104"
L1021"
L201"
R1111"
C2038" C1123"
1"
C2005" L202"
D2000" C1134"
R322"
C362" PL201" C2007" C262"

D2101"
C1152"
C2006" R232" C1145"

C263" C300"
C2008" R1130"
C321" C322"
D216" L1017"
L203" S901"
S636"
R323"
L207" D217" C1149"

C1166"
D215" S900"
IC316"
L209"
L211" C261"
S303"
PL901"
R2030"
L315"
D"
S316"
C270"
L212"
PL203"
C352" S340" C295" C1169" C1201"

IC216"
L214"
S312" R321" L1025"
Z"
1"
C1151"
L1002"
B"
S2011" C1028"
C316"
R3 S3 S2007"
20 01
" " C1193" C1194"
S2008"
R
R1125" C1192" R1011"

10
B"
C1005" S1008"
IC317"
04
R1008"
R249" C1200"
C301" R1126"
C325"
C324"
R2014"
C2019"
C284"
C328"
C329"
C327"
R318"
S311" C337"
C1206"
R319"
D221" S310" C342"

C1025"
C1021"
C1029"
R1013"
" C1020"
C2024" C338"
C350" C2009"
C326"
C277"
C339"
R253" C251" R1124"
S2013"
R309"
R310"
R311"
D2103" C1185" S1009"

L1019" Z1000" C1024" IC200"
D205"
R325"
D223"
S213"
PL1"
C2020"
D1001"
C266"
C2017"
D2100"
R1036"
R1029"
C2018"
R1121"
R1122"
C254"
Q1015"
R2203" C1191"
D207" PL1002" R1123"
C2015" C2016"
C2013" C2014"
C2011" C2012"
C2010"
L1030"
IC204"
L2018" Q1016"
X1000"
L1003"
C2049" L1027" C1167" S1010"

S205" S204" C247" C2022" L1032"
D208" R2015"
IC2000"
C1034"
C293" D1007"
R1037"
R1032"
R276" L2001" L1028"

C1011"
C1162"
PL1003"
R275" C2021" C1180" C1202"

C1195"
C1014"
IC209"
R2200"
R1127"
C2037"
C248"
R1025"
C1037"
C"R1031"
C1198"
C1197"
S2000"
C2034"
C2031"
C2030"
C2028"
C2026"
D1003"
C2025"
C"
C253" R1129"
Z1003"
C1036"
Q1003"
C1179"
R2017"
R1112"
R1042"
C1199"
R1022" C1042"
C1045" R1038"
C2033"
C2032"
C2029"
C2027"
C1048"
R2018"
R1100"
C1168"
C1010" C1172" C1205" C2200" R1043" C1006"

C2036"
R1103"
C1039" C1178"
C1173"
R1102"
C1165"
TU1001"
C1181" C1159"
C1043"
R1041" R1119" Q1014" S1006"
C1041" S2012" C1056"
R1027"
R1044"
R1118"
C1187"
S1005"
C1189"
Q1013"
R1120"
R Q
"
35 02
"
E"
X1001"
IC201"
10 10 R1026"
C1038"
C1030"
C1196"
C1040"
R1023"
3"
JK200"
C2201"
1"
C1049"
2"
Z1001"
R2201"
E"
FD20"
Z1002"
C1009"
L1000"
TU1000"
C1012"
OES"
L1031"
FD3"
D912"
R921"
C943"
D2502"
C903"
D2501"
R901"
C530"
C515" C521" C2250"
C504" C507" C526"
C510" C503" C532"
C509" C506" C529"
S903"
S904"
C523" C508" C531"

C527"
C513" C511" C528"

C512" C522" C2251"
R900"
R505" C519"
R504" L401"
C500"
R517"
C525"
L500"
R518" C431"
L921" C2403" C2215"
C2402"
L922" C2401" C2214"
C923"
C2252" C2400" C2213"
C2253" C2212"
C524"
C520"
R521"
R520"
R519"
S600" R6035"
R6036"
D226"
C470"
Q6008"
C1001"
R434"
C360"
R2209"
R2208"
R430" S620"
R433"
C451"
C449"
C456"
C448"
C446"
C452"
C447"
R6038"
Q6009"
S621" C600"
R6037" R2218" S624"
S323" L317"
R429" S330"
R432"
R431" C437"
R2215"
D225"
S112" S646" C435"

C2087"
C2086"
C2085"
C2084"
S111" C434" R2216"

Q6011"
C2211" C429"
S113"
C2210" S647"
C2209"
C425"
R6042"
C2208" C427"
C2207" C608"
R6043"
C613" C359"
S803"
C2220"
R697" L316"
C418"
S601"
C2221" R2212" S440"

S610" R6013" S324"
C462"
C450" R228" C463"
S441"
C2254" C422"
S615" R6030"
L609"
C2222" R233"
S331"
C606"
S415"
C621" C622"
C625" R653"
C1000"
C420"
S648"
C421" R2211" C609" C628" R654"

C2205" D101" R656"
R436"
C457"
R427"
C460"
C626"
R6031"
C2204" R234"
R236"
C2203" R657"
C440"
C467" C2216" C2239" C2223" C612"
R420"
C438"
C409"
R243"
R2053"
C630"
C439"
C2206"
R435" C2217" C2240" C2224" C2070"
R684"
C415"
C2218"
L2014"
C2241" C2225" C2071"

C2068"
C2219" C2242" C2226" R686" R685" S804"

C627"
C455" C454" C430"

C624"
C633"
S805"
C414"
C2227" C2231" C2075"

C2228" C2232" C623" C2076"
C2229" C2233"
C2230" C2234" C2077"
R687" C2073"
C465" C442"
S800"
L408"
S6313" C2080"
R6014"
L404"
R661"
3"
C2079"
6"9
D915"
1R3
R6044"
S9
L407"
L406"
L603"
L2013"
C925"
C2065"
R6017"
L2012"
S912" C926" C604"
L402"
C2082"
L409"
C938"
C936"
R416"
C924"
C294" C286" C2054"

C267"
C937"
Q206" C268"
R274"
S635"
S633"
L2007"
L213"
C297" R202"
S325"
R273"
R229" C296"
R269" C2042"
L208"
R201"
R267" C246" S326"

C2045"
C2050"
R205"
L200"
Q204"
Q205"
R266"
R200"
D220"
C2040"
S905"
S911"
D2004"
R287"
D204"
R1091"
R1097"
C259"
C303" C2044"
C1150"
R270"
S634"
R904"
D202"
R240"
"
C280"
C245"
08
S220"
R268"
20
C2047"
C2048"
R905" R235"
L
R1096"
S902"
C285"
R203"
R104"
C913"
D2002"
D206"
R1092" S221"
S652"
C1079"
C1081"
C1086"
C1084"
R1078"
R286"
R2202"
R2009"
C1120"
D219"
C1112" C1121"
D209"
R1094" R2008"
S651"
R271"
R285"
C1204"
C1203"
C1114"
C1117"
C1113"
D214"
C1125"
R1090" R2006"
C1128"
D212"
R1093" L308" C323"
C1119" R304"
C340"
S302"
C1118" C1130"
C343"
C341"
R1128"
C1122"
C250"
C1137"
C252"
C1147"
C1144" C319"
C1140"
C344"
C320" R306"
L2011"
C318"
C348" C361" R305"
C346" C305"
C347" R300" R307"
L1026"
L1022"
L1023"
L1024"
C345" C349"
C306"
C334"
L300"
C336"
C335"
L312"
C1057"
C264"
S2005"
S2006"
S2010"
R288"
C310"
C309"
C308"
C313"
C312"
C311"
C1177"
R1105"
C1170"
R1107"
R1110"
C1153"
C1163"
R1109"
C2023"
L2002"
R2010" R2204"
C249"
R2016" L2019" D203"
S2001"
R1028"
C1035"
R289"
R2011"
S2002"
R2012"
R2013"
R290"
S2003"
D1000" C1183"
R2019" S2009"
C1182" D218"
L1029"
D211"
C1184"
R2021"
R2020"
R2022"
R2023"
D213"
R1101"
R1113"
R1034" R1040"
R1050"
R1052"
C1054" R1051" R1039"
C1055" Q1005"
S1003" R1048" IC205"
C1052" R1049"
R1010" R1114" R1005"
R1009"
R1030"
D1005"
C1022"
C1023" C255"
L216"
C1047"
C1031" L218"
FD6"
C1027"
L219"
R1012"
C1026"
L1001"
R1000"
C1002"
C1004"
S1007"
S1000"
C1013"
C1007"
C1008"
C1015"
R1024"
C1188"R1115" C257"
R1001"
C1003"
D1006"
D1004"
C1186"
`E$
R1117"
R1116" D1002"
4P
JK100
1 2
33p
50V
C100
D100
L101 L100
SVHS_Y 3 4
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
D101
33p
50V
L103 L102
C101
SVHS_C
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
S100
PL103
S101
1
D102
33p
50V
L105 L104
C102
2
FRONT_VIDEO
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
A
3 1
JK101
YELLOW_FAV
PL100
PL104
D103
50V
1 FRONT_VIDEO R100 L107 L106

100p
C103
2
1 FRONT_AUDIO_R
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
R109 2
A
3 1
SVHS_C 2 R107
JK102
R110 3 SVHS_C
SVHS_Y 3 R108
4 SVHS_Y
1P_RED_FAV
4
5
FRONT_VIDEO 5
D104
50V
6 FRONT_AUDIO_R R101 L109 L108

100p
C104
2
6 FRONT_AUDIO_L
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
A
7
3 1
FRONT_AUDIO_R 7
JK103
8 FRONT_AUDIO_L
FRONT_AUDIO_L 8
WHITE_FAV
9 PL102
L110
LINE_OUT_R 10 1 LINE_OUT_R HEADPHONE
600R_100MHZ_200mA
9 6
LINE_OUT_L 11 2
50V
100p
C105
8 5
LINE_OUT_SUB 12 3 LINE_OUT_L
R102 L112 L111
7 4
4 LINE_OUT_SUB HP_R
D105
600R_100MHZ_200mA 600R_100MHZ_200mA
3
4n7
50V
BZT55C10
C106
2
PL105 PL101 1
4n7
50V
HP_R 1 1 HP_R R103 L114 L113

C107
HP_L
600R_100MHZ_200mA 600R_100MHZ_200mA
JK104
2 2
PHJACK
HP_L 3 3 HP_L
D106
HEADPHONE 4 4 HEADPHONE
BZT55C10
D107
50V
R104 L116 L115

100p
C108
2
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
A
3 1
JK105
WHITE_FAV
LINE_OUT_SUB
D108
50V
R105 L118 L117

100p
C109
2
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
A
3 1
VESTEL
Author
JK106
20/05/2005
LINE_OUT_L
WHITE_FAV
FPD TV DESIGN GROUP

D109
50V
R106 L120 L119

100p
C110
17FAV15-1
2
BZT55C10
600R_100MHZ_200mA
600R_100MHZ_200mA
Sheet 01 of 01
A
3 1
JK107
ILHAN TAYGURT
LINE_OUT_R
1P_RED_FAV
IC708
LM2576
4 FEEDBACK
2 OUTPUT
5 ON/OFF
3 GND
1 VIN
PL701
5
BU TERMINALLERE GROUND MSP DEN GELECEK
BU TERMINALLERE GROUND MSP DEN GELECEK

L109 R770
1k MUTE_3V3
22uH_3.9A_SMD
MAIN_OUT_L
MAIN_OUT_R
S724
L904 FEED BACK CAPASITORDEN SONRA ALINACAK
R771
1k
R755
22u
22k
STPS745
S723
D901
D904
SS33
loop mumkun oldugu

1000u
C822
kadar kisa olacak++
25V
R754
1k8
15V_AUD
R745
R746
C789
C788
R765
33k
18k
12k
1u
1u
opsiyonel
Q715
BC848B
C790
C791
C787
S739
1u
1u
1u
C823
100n
25V
S730 L727 15V_AUD
22u HIGH=ON
REFGND 12
VOLUME 11
VARMAX10
C821
R773
470u
LOW=OFF
35V
VARDIFF 9
AVDDREF 7
SD_NOT 1
3k3
PL700
C826
100n
25V
VREF
1000u
RINN
LINN
V2P5
RINP
C820
LINP
25V
3 L729
13 BSLN BSRN 48
C793
C780
22uN.C
50V
50V
4
10n
10n
14 PVCCL1 PVCCR4 47
15V_AUD 15 PVCCL2 PVCCR3 46 15V_AUD

L725 L721 L723
C807
50R_100MHZ_3A
470n
63V
16 LOUTN1 ROUTN2 45
C803
C801
C782
C784
50R_100MHZ_3A 40uH
220u
100n
100n
220u
25V
50V
50V
25V
40uH L718
PL703
C816
C795
C813
C785
C805
100n
100n
470n
25V
50V
25V
50V
63V
17 LOUTN2 ROUTN1 44
1n
1n
18 PGNDL1
TPA3004D2 PGNDR2 43 1
2
IC702
C815
C796
C786
C806
100n
470n
25V
50V
50V
63V
1 19 PGNDL2 PGNDR1 42 2
1n
1n
C808
C802
C783
C814
470n
100n
100n
100n
63V
50V
50V
25V
PL702 20 LOUTP1 ROUTP2 41
L726 L719 L724
50R_100MHZ_3A
21 LOUTP2 ROUTP1 40
40uH 50R_100MHZ_3A 40uH
L722
MODE_OUT
15V_AUD 22 PVCCL3 PVCCR2 39 15V_AUD
C794
C781
50V
50V
10n
10n
VAROUTR
VCLAMPR
VCLAMPL
VAROUTL
23 PVCCL4 PVCCR1 38
AGND1
AGND2
24 BSLP BSRP 37
MODE
AVDD
AVCC
ROSC
COSC
IC nin PCB ye temas ettigi yer ,isinin transferi icin
25
26
27
28
29
30
31
32
33
34
35
36
vialarla alt layerdaki ground a birlestirilecek ve stencil
C776
16V
bilgisinde lehim yeri olarak belirtilecek.
1u
C792
50V 100n C779

50V 220p
16V
1u
R742
C778
120k 15V_AUD
C777
C775
100n
220u
50V
25V
MUTE
C811
100u
15V_AUD
25V
15V supply voltage ait 100n decoupling capasiteler

pinlere mumkun oldugunca yakin olacak
PL707
S733
2
R772
9k1 4k
R768 25V
S738
vcc 5v 100n
R767
VESTEL ELECTRONICS
3k3
S732 Q710 C825

TV R&D GROUP
BC848B
MUTE
18AMP05-1 D-CLASS AMPLIFIER
S734
VER. E1 DATE RASIT GOKALAN

26-05-2005 VESTEL R&D Sheet 1/1 Q709
BC848B
1 RESET OUT Q603
S735 BSN20
2 LM8093
IC703
S737
C818
50V
22n
R766
C817
R756
100k
50V
12k
22n
Q604
S736 BSN20
MUTE_3V3
C824
100n
25V

LCD 17MB15

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LCD 17MB15

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Formati disponibili

37” TFT TV

It supports following peripherals:

General description of UV1316:

4. MULTI STANDARD SOUND PROCESSOR

5. VIDEO SWITCH TEA6415

6. AUDIO AMPLIFIER STAGE WITH TPA3002D2

10. SAW FILTERS

11.1.1. General Description

11.3.1. General Description

11.3.2. General Features

11.4.1. General Description

11.5.1. General Description

11.6.1. General Description

PIN Function Table

11.8.3. Pin Connections

11.9.2. General Description

11.10.3. Pin connections

11.13.1. General Description

11.14.1. General Description

11.14.3. Pin Description

11.15.1. General Description

11.16.3. Pin connections

11.18.1. General Description

11.18.3. Pin Connections

11.19.1. General Description

11.20.1. General Description

11.21. SDA55XX (SDA5550)

11.21.1. General description

11.22. Sil 9993

11.22.1. General Description

11.23.1. General Description

11.24.1. General Description

11.24.3. Pin Connections

11.25.3. Pin connections

DIP Pin connections CO Pin connections

NC: Not connected

SDA Serial data Address Input/Output

11.26.1. General Description

11.26.3. Pin description

11.27.1. General Description

SYMBOL PIN DESCRIPTION PIN VALUE

11.28.1. General Description

SYMBOL PIN DESCRIPTION

11.29.1. General Description

TERMINAL I/O DESCRIPTION

11.30.1. General Description

11.30.3. Pin Connection

11.31.1. General Description

11.31.2. Pin Connections and Short Descriptions

Pin No. Pin Name Type Connection Short Description

12. SERVICE MENU SETTINGS

12.1. Picture Adjust

12.9. Menu Languages 1 & 2

AUDIO MAIN_L, MAIN_R,

5k6 VCC5V_FILTERED 2 12C_DA MONO_IN 47

470R R1108 L1021

VCC_5V R1111 L1025

S1003 22u C1164 S2007

1 IN1 OUT1 4 13 NC1 SC4_IN_R 36

IF1 15 NC3 AGNDC 34

R1123 C1052 1kV

AGC 1 TUN1_CVBS 2n2