FCPF400N80Z — N-Channel SuperFET® II MOSFET

August 2015

FCPF400N80Z
N-Channel SuperFET® II MOSFET
800 V, 14 A, 400 mΩ
Features Description
• Typ. RDS(on) = 340 mΩ SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new
• Ultra Low Gate Charge (Typ. Qg = 43 nC) high voltage super-junction (SJ) MOSFET family that is utilizing
charge balance technology for outstanding low on-resistance
• Low Eoss (Typ. 4.1 uJ @ 400 V)
and lower gate charge performance. This technology is tailored
• Low Effective Output Capacitance (Typ. Coss(eff.) = 138 pF)
to minimize conduction loss, provide superior switching perfor-
• 100% Avalanche Tested mance, dv/dt rate and higher avalanche energy. In addition,
• RoHS Compliant internal gate-source ESD diode allows to withstand over 2kV
• ESD Improved Capability HBM surge stress. Consequently, SuperFET II MOSFET is very
suitable for the switching power applications such as Audio,
Applications Laptop adapter, Lighting, ATX power and industrial power appli-
cations.
• AC-DC Power Supply
• LED Lighting

G
G
D
S
TO-220F
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Symbol Parameter FCPF400N80Z Unit
VDSS Drain to Source Voltage 800 V
- DC ±20
VGSS Gate to Source Voltage V
- AC (f >1 Hz) ±30
o
- Continuous (TC = 25 C) 14*
ID Drain Current A
- Continuous (TC = 100oC) 8.9*
IDM Drain Current - Pulsed (Note 1) 33* A
EAS Single Pulsed Avalanche Energy (Note 2) 339 mJ
IAR Avalanche Current (Note 1) 2.2 A
EAR Repetitive Avalanche Energy (Note 1) 0.36 mJ
MOSFET dv/dt 100
dv/dt V/ns
Peak Diode Recovery dv/dt (Note 3) 20
o
(TC = 25 C) 35.7 W
PD Power Dissipation
- Derate Above 25oC 0.29 W/oC
o
TJ, TSTG Operating and Storage Temperature Range -55 to +150 C
Maximum Lead Temperature for Soldering, o
TL 300 C
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature, with heatsink.

Thermal Characteristics
Symbol Parameter FCPF400N80Z Unit
RθJC Thermal Resistance, Junction to Case, Max. 3.5 o
C/W
RθJA Thermal Resistance, Junction to Ambient, Max. 62.5

©2013 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FCPF400N80Z FCPF400N80Z TO-220F Tube N/A N/A 50 units

Electrical Characteristics TC = 25oC unless otherwise noted.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Off Characteristics
BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25°C 800 - - V
ΔBVDSS Breakdown Voltage Temperature o
ID = 1 mA, Referenced to 25 C - 0.8 - V/oC
/ ΔTJ Coefficient
VDS = 800 V, VGS = 0 V - - 25
IDSS Zero Gate Voltage Drain Current μA
VDS = 640 V, TC = 125oC - - 250
IGSS Gate to Body Leakage Current VGS = ±20 V, VDS = 0 V - - ±10 μA

On Characteristics
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 1.1 mA 2.5 - 4.5 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 5.5 A - 0.34 0.4 Ω
gFS Forward Transconductance VDS = 20 V, ID = 5.5 A - 12 - S

Dynamic Characteristics
Ciss Input Capacitance - 1770 2350 pF
VDS = 100 V, VGS = 0 V,
Coss Output Capacitance - 51 70 pF
f = 1 MHz
Crss Reverse Transfer Capacitance - 0.5 - pF
Coss Output Capacitance VDS = 480 V, VGS = 0 V, f = 1 MHz - 28 - pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V - 138 - pF
Qg(tot) Total Gate Charge at 10V VDS = 640 V, ID = 11 A, - 43 56 nC
Qgs Gate to Source Gate Charge VGS = 10 V - 8.6 - nC
Qgd Gate to Drain “Miller” Charge (Note 4) - 17 - nC
ESR Equivalent Series Resistance f = 1 MHz - 2.3 - Ω

Switching Characteristics
td(on) Turn-On Delay Time - 20 50 ns
tr Turn-On Rise Time VDD = 400 V, ID = 11 A, - 12 34 ns
td(off) Turn-Off Delay Time VGS = 10 V, Rg = 4.7 Ω - 51 112 ns
tf Turn-Off Fall Time (Note 4) - 2.6 15 ns

Drain-Source Diode Characteristics

IS Maximum Continuous Drain to Source Diode Forward Current - - 14 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 33 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 11 A - - 1.2 V
trr Reverse Recovery Time VGS = 0 V, ISD = 11 A, - 395 - ns
Qrr Reverse Recovery Charge dIF/dt = 100 A/μs - 7.4 - μC
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. IAS = 2.2 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 14 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.

©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

50 50
VGS = 10.0V *Notes:
8.0V 1. VDS = 20V
7.0V 2. 250μs Pulse Test
6.5V
6.0V

ID, Drain Current[A]

ID, Drain Current[A]

5.5V
10
10
o
150 C

o
25 C

*Notes:
o
1. 250μs Pulse Test -55 C
o
2. TC = 25 C
2 1
1 10 20 3 4 5 6 7
VDS, Drain to Source Voltage[V] VGS, Gate toSource Voltage[V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
0.7 50
o
*Note: TC = 25 C *Notes:
1. VGS = 0V
Drain to Source On-Resistance

0.6 2. 250μs Pulse Test

IS, Reverse Drain Current [A]

10

0.5 o
150 C
RDS(ON) [Ω],

VGS = 10V o
25 C
0.4 1

VGS = 20V
0.3

0.2 0.1
0 6 12 18 24 30 35 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

10000 10
*Note: ID = 11A
VGS, Gate to Source Voltage [V]

VDS = 160V
1000 Ciss 8
VDS = 400V
Capacitances [pF]

VDS = 640V
100 6

Coss
10 *Note: 4
1. VGS = 0V
2. f = 1MHz
1 Ciss = Cgs + Cgd (Cds = shorted) 2
Coss = Cds + Cgd
Crss
Crss = Cgd
0.1 0
0.1 1 10 100 1000 0 15 30 45
VDS, Drain to Source Voltage [V] Qg, Total Gate Charge [nC]

©2013 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature
1.2 3.0
*Notes: *Notes:
Drain to Source Breakdown Voltage

1. VGS = 0V 1. VGS = 10V

Drain to Source On-Resistance

2. ID = 1mA 2.5 2. ID = 5.5A
1.1
BVDSS, [Normalized]

RDS(on), [Normalized]
2.0

1.0 1.5

1.0
0.9
0.5

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
100 14
10μs
12
100μs
ID, Drain Current [A]

10
10
ID, Drain Current [A]

1ms
8
10ms
1
Operation in This Area 6
DC
is Limited by RDS(on)

*Notes: 4
0.1
o
1. TC = 25 C
o 2
2. TJ = 150 C
3. Single Pulse
0.01 0
0.1 1 10 100 1000 25 50 75 100 125 150
o
VDS, Drain to Source Voltage [V] TC, Case Temperature [ C]

Figure 11. Eoss vs. Drain to Source Voltage

12

10

8
EOSS, [μJ]

0
0 200 400 600 800
VDS, Drain to Source Voltage [V]

©2013 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
Typical Performance Characteristics (Continued)

Figure 12. Transient Thermal Response Curve

5
ZθJC(t), Thermal Response [oC/W]
0.5
1
0.2

0.1
PDM
0.05

0.1 t1
0.02 t2
0.01 *Notes:
o
1. ZθJC(t) = 3.5 C/W Max.
Single pulse 2. Duty Factor, D= t1/t2
0.01 3. TJM - TC = PDM * ZθJC(t)
0.005
-5 -4 -3 -2 -1 0 1 2
10 10 10 10 10 10 10 10
t1, Rectangular Pulse Duration [sec]

©2013 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
IG = const.

Figure 13. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 14. Resistive Switching Test Circuit & Waveforms

VGS

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms

©2013 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
 FCPF400N80Z — N-Channel SuperFET® II MOSFET
DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2013 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

FCPF400N80Z Rev. 1.4
0.50 A
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Rev. I77

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