1985 Mitsubishi Bipolar Digital IC LSTTL Integrados

MITSUBISHI s1Io1(o)~
SEMICONDUCTORS UQUUJQU
BIPOLAR DIGITAL Ie
LSTTL
ael ~g~~~~~ENT
INCORPORATED
2680 No. First St., Suite 204
San Jose, CA 95134
Phone (408) / 9~42-1 070
Lt< 2 I : 0
• MITSUBISHI
.... ELECTRIC
BIPOLAR DIGITAL Ie
LSTTL
'. MITSUBISHI •
.... ELECTRIC .
All values shown in this catalogue are subject to change for
product improvement.
The information, diagrams and all other data included
herein are believed to be correct and reliable. However, no
responsibility is assumed by Mitsubishi Electric Corporation
for their use, nor for any infringements of patents or other
rights belonging to third parties which may result from
their use ..
GUIDANCE
TYPE DESIGNATION TABLE
INDEX BY FUNCTION
SYMBOLOGY
PACKAGE OUTLINES
DATA SHEETS
SCHEMATICS OF INPUTS AND OUTPUTS

INDIVIDUAL DATA
• MITSUBISHI
.... ELECTRIC
MITSUBISHI LSTTLs
CONTENTS
D GUIDANCE Page
Type Designation Table ................ ···.· .. · .. · .. · .. · .. · .. · .. ···· .. ······· .. ·· .... · .. · .. · .. ···· .. ··•···· .. · .. · .. · .. ···· .. · .. ·· .... ····1-1
Index by Function ........................ , ................................................................................................ 1-2
Symbology .................................................................................. , ............................................... 1-9
Package Outlines ....... · ....... ·· ........ ·· .... · .. · .... ·· .. ···· .. ···· .. · .. · .... ·· .. · .. · .. ···· .. · .. · .. ······· .. · .. · .... ·· .. · .. ···· .. · .. · .. · 1-11
EJ DATA SHEETS
Schematics of Inputs and Outputs ................................................................................................... 2-1
Individual Data
M74LSOOP Quadruple 2-lnput Positive NAND Gate ...................................................................................................... 2-9

M74LS02P Quadruple 2-lnput Positive NOR Gate ......................................................................................................... 2-11
M74LS03P Quadruple 2-lnput Positive NAND Gate with Open Collector Output ...................................................... 2-13
M74LS04P Hex Inverter ................................................................................................................................................ 2 -15
M74LS05P Hex Inverter with Open Collector Output ................................................................................................ 2-17
M74LS08P Quadruple 2-lnput Positive AND Gate .................................................................................................... 2-19
M74LS09P Quadruple 2-lnput Positive AND Gate with Open Collector Output ........ ,.............................................. 2-21
M74LS10P Triple 3-lnput Positive NAND Gate ...........................................................................................·...... ·· ....... · .. ·2-23
M74LSllP Triple 3-lnput Positive AND Gate ...................................................... ;.......................................................... ·2-25
M74LS12P Triple 3·lnput Positive NAND Gate w(th Open Cellector Output. .............................................................. 2-27
M74LS13P Dual4-lnput NAND Schmitt Trigger ..........................................................................,................................. 2'29
M74LS14P Hex Schmitt Trigger Inverter ....................................................................................................................... 2-31
M74LS15P Triple 3·lnput Positive AND Gate with Open Collector Output.. ................................................................ 2-33
M74LS18P. Dual 4-lnput Positive NAND Schmitt Trigger ............................................................................................ ·2-35
M74LS19P Hex Schmitt Trigger Inverter ........................................................................................ ,.............................. 2-37
M74LS20P Dual 4-lnput Positive NAND Gate ..................................................................................... :......................... 2-39
M74LS21P Dual 4:lnput Positive AND Gate .............................................................................................................. 2-41
M74LS22P Dual 4-lnput Positive NAND Gate with Open Collector Output ............................................................. 2-43
M74LS24P Quadruple 2-lnput Positive NAND Schmitt Trigger ............................................................................ ,...... 2-45
M74LS27P Triple 3-lnput Positive NOR Gate ................................................................................................................ 2-47
M74LS30P Single 8-lnput Positive NAND Gate ...............................................................................................:............. 2-49
M74LS32P Quadruple 2-lnput Positive OR Gate ..................................... ;.................................................................... 2-51
M74LS37P Quadruple 2-lnput POSitive NAND Buffer .................................................................................................... 2-53
M74LS38P Quadruple 2-lnput Positive NAND Buffer with Open Collector Output.. ................................................... 2-55
M74LS40P Dual 4-lnput Positive NAND Buffer .............................................................................................................. 2-57
M74LS42P BCD-to-Decimal Decoder .......................................................................................................,..................... 2-59
M74LS47P BCD-to'7-Segment Decoder/Driver (Active Low Output) ........................ :................................................. 2-62
M74LS48P BCD-to-7 -Segment Decoder/Driver (Active Hight Output) ......................................................................... 2-66
M74LS51P Dual 2-Wide 2-lnput/3-lnput AND-OR-Invert Gate .................................................................................... 2-69
M74LS73AP Dual J-K Negative Edge· Triggered Flip Flop with Reset. ............................................................................ 2-71
M74LS74AP Dual D·Type POSitive Edge-Triggered Flip Flop with Set and Reset.. ........................................... :............ 2-74
M74LS75P 4-Bit Bistable Latch ....................................................................................................................................... 2-77
M74LS76AP Dual J-K Negative Edge-Triggered Flip Flop with Set and Reset... ............................................................ 2-80
M74LS83AP 4-Bit Binary Full Adder with Fast Carry .................................................................,...................................... 2-83
M74LS85P 4-Bit Magnitude Comparator ....................................................................................................................... 2-86
M74LS86P Quadruple 2-lnput Exclusive OR Gate ......................................................................................................... 2-90
M74LS90P Decade Counter ....................................................................:........................................................................ 2-92
M74LS91P 8-Bit Shift Register ...............................................................................................,....................................... 2-g5
M74LS92P Divide-by-Twelve Counter ............................................................................................................................. 2-98
M74LS93P 4-Bit Binary Counte; ................................................................................................................,..................... 2-101
M74LS95BP 4-Bit Parallel Access Shift Register ............................................................................................................... 2-105
M74LS96P 5-Bil Shift Register ......................................................................................................................:...... ;.......... 2-108
• MITSUBISHI
2 "ELECTRIC
MITSUBISHI LSTTLs
CONTENTS
Page
M74~S107AP Dual J-K Negative Edge-Triggered Flip Flop with Reset .............................................................................. 2-11.2
M74LS109AP . Dual J-K Positive Edge-Triggered Flip Flop with Set and Reset.. ................................................................ 2-115
M74LS112AP Dual J-K Negative Edge-Triggered Flip Flop with Set and Reset ............................................................... 2-118
M74LS113AP Dual J-K Negative Edge-Triggered Flip Flop with Set ................................................................................ 2-121
M74LS114AP Dual J-K Negative Edge-Triggered Flip Flop with Set. Common Reset. and Common Clock.................. 2-124
M74LS122P Retriggerable Monostable Multivibrator with Reset .................................................................................... 2-127
M74LS123P Dual Retriggerable Monostable Multivibrator with Reset. ............................................................................ 2-132
M74LS125AP Quadruple Bus Buffer Gate with 3-State Output .................................................................._...................... 2-137
M74LS126AP Quadruple Bus Buffer Gate with 3-State Output. ........................................................................................ 2-139
M74LS132P Quadruple 2-lnput Positive NAND Schmitt Trigger ...................................................................................... 2-141
M74LS133P Single 13-lnput Positive NAND Gate ............................................................................................................ 2-143
M74LS136P Quadruple 2-lnput Exclusive OR Gate with Open Collector Output. ........................................................... 2-145
M74LS137P 3-Une to 8-Line Decoder/Demultiplexer with Address Latch ............................................. 2-147
M74LS138P 3-Line to 8-Line Decoder/Demultiplexer .....................................................................................·...... ·.. ·.. · .. ·2-151
M74LS139P Dual 2-Line to 4-Line Decoder/Demultiplexer ............................................................................................·2-154
M74LS145P BCD-to-Decimal Decoder /Driver .................................................................................................................. 2-156
M74LS147P 1 O-Line to 4-LinH Priority Encoder............................................................................................................... 2-159
M74LS148P B-Line to 3-Line Priority Encoder ................................................................................................................. 2-162
M74LS151 P B-Line to I-Line Data Selector/Multiplexer with Strobe ............................................................................. 2-165
M74LS153P Dual 4-Line to 1-Line Data Selector/Multiplexer with Strobe..................................................................... 2-168
M74LS155P Dual 2-Bit Binary to 4-Line Decoder/Demultiplexer with Strobe ............................................................... 2-170
M74LS156P Dual 2-Bit Binary to A-Line Decoder/Demultiplexer with Open Collector Output.. ................................... 2-173
M74LS157P Quadruple 2-Line to 1-Line Data Selector/Multiplexer ................................................................................. 2-176
M74LS158P Quadruple 2-Line to 1-Line Data Selector/Multiplexer (Inverted) ............................................................... 2-178
M74LS160AP Synchronous Presettable Decade Counter with Direct Reset... ................................................................... 2-180
M74LS161AP Synchronous Presettable 4-Bit Binary Counter with Direct Reset ............................................................... 2-184
M74LS162AP Fully Synchronous Presettable Decade Counter .......................................................................................... 2-188
M74LS163AP Fully Synchronous Presettable 4-Bit Binary Counter ....................... ;.......................................................... 2-192
M74LS164P B-Bit Serial-In Parallel-Out Shift Register .................................................................................................... 2-196
M74LS165AP 8-Bit Parallel-Load Shift Register ..........................................................................,' ...... 2-199
M74LS166AP B-Bit Shifl Register ................................................................... -............................... 2-203
M74LS170P 4-By-4 Register File with Open Collector Output.. ...................................................................................... 2-207
M74LS173AP 4-Bit D-Type Regisler with 3-State Output ................................................................................................ 2-210
M74LS174P Hex D-Type Flip Flop with Reset .................................................................................................................. 2-214
M74LS175P Quadruple D-Type Flip Flop with Reset.. .................................................................................................... 2-217
M74LS190P Synchronous Presettable Up/Down Decade Counter with Mode Control ................................................ 2-220
M74LS191P Synchronous Presettable Up/Down 4-Bit Binary Counter with Mode Control ......................................... 2-224
M74LS192P Synchronous Presettable Up/Down Decade Counter ................................................................................ 2-228
M74LS193P Synchronous Presettable Up/Down 4-Bit Binary Counter ............................................................................. 2-232
M74LS194AP 4-Bit Bidirectional Universal Shift Register with Reset. ................................................................................. 2-236
M74LS195AP 4-Bit Parallel Access Shift Register with Reset ....................... ;..................................................................... 2-239
M74LS196P Presettable Decade Counter /Latch ............................................................................................................... 2-242
M74LS197P Presettable 4-Bit Binary Counter /Latch ........................................................................................................ 2-246
M74LS221P Dual Monostable Multivibrator ...................................................................................................................... 2-250
M74LS240P Octal Buffer/Line Driver with 3-State Output (Inverted) ...................................: ................... :..................... 2-256
M74LS241P Octal Buffer/Line Driver with 3-State Output (Non Inverted) ..................................................................... 2-259
M74LS242P Quadruple Bus Transceiver with 3-State Output (Inverted) ........................................................................ 2-263
M74LS243P Quadruple Bus Transceiver with 3-State Output (Non Inverted) ................................................................ 2-266
M74LS244P Octal Buffer/Line Driver with 3-State Output (Non Inverted) ..................................................................... 2-269
M74LS245P Octal Bus Transceiver with 3-State Output (Non Inverted) ......................................................................... 2-272
M74LS247P BCD-to-7-Segment Decoder/Driver (Active Low Outrut) ......................................................................... 2-275
• MITSUBISHI
...... ELECTRIC 3
MITSUBISHI LSTTLs
CONTENTS
Page
M74LS248P BCD-to- 7 -Segment Decoder/Driver (Active Hight Output)........................................................................ 2-278
M74LS251P 8-Line to l-Line Data Selector/Multiplexer with 3-State Outpu\................................................................ 2-281
M74LS253P . Dual 4-Line to l-Line Data Selector/Multiplexer with 3-State Outpu\.. ...................................................... 2-285
M74LS256P Dual 4-Bit Addressable Latch ........... ;..................................................................................................... 2-288
M74LS257AP Quadruple 2-Line to l-Line Data Selector/Multiplexer with 3-State Outpu\.. ............................................ 2-292
M74LS258AP Quadruple 2-Line to l-Line Data Selector/Multiplexer with 3-State Output (Inverted) .............................. 2-295
M74LS259P 8-Bit Addressable Latch ................................................................................................................................ ~ 2-298
M74LS266P Quadruple 2-lnput Exclusive NOR Gate ................................................................................................ 2-302
M74LS273P Octal POSItive Edge-Triggered D- Type Flip Flop with Rese\.. ....................................................................... 2-304
M74LS279P Quadruple R-S Latch ..................................................................................................................................... 2-307
M74LS280P 9-Bit Odd/Even Parity Generator /Checker ................................................................................................... 2-310
M74LS283P 4-B'it Binary Full Adder with Fast Carry ................................................................................................ 2-313
M74LS290P Decade Counter ............................................................................................................................................. 2-316
M74LS293P 4-Bit Binary Counter .................................................................................................................................... 2-319
M74LS295BP 4-Bit Shift Register with 3-State Outpu\.. ........................ :............................................................................ 2-322
M74LS298P Quadruple 2-lnput Multiplexer with Storage .....................................................................................,........... 2-325
M74LS299P 8-Blt Universal Shift/Storage Register .......................................................................................................... 2-328
M74LS323P 8-Bit Universal Shift/Storage Register .......................................................................................................... 2-332
M74LS352P Dual 4-Line to l-Line Data Selector/Multiplexer with Strobe (Inverted) ...................................................... 2-336
M74LS353P Dual 4-Line to I-Line Data Selector/Multiplexer with 3-State Output (Inverted) .... " .................................. 2-338
M74LS365AP Hex Bus Driver with 3-State Output............................................................................................................. 2-341
M74LS366AP Hex Bus Driver with 3-State Output (Inverted) .............; ................................. " ........................................... 2-344
M74LS367AP Hex Bus Driver with 3-State OutpUI.. ........................................................ :: ................................................. 2-347
M74LS368AP Hex Bus Driver with 3-State Output (Inverted) ............................................................................................ 2-350
M74LS373P Octal D-Type Transparent Latch with 3-State Output ................................... ,............................................. 2-353
M74LS374P Octal Positive-Edge-Triggered D-Type Flip Flop with 3-State Output .......................................................... 2'356
M74LS375P 4-Bit Bistable Latch ........................................................................................................................................ 2-360
M74LS377P Octal Positive Edge-Triggered D-Type Flip Flop with Enable ....................................................................... 2-363
M74LS386P Quadruple 2-lnput Exclusive OR Gate with Open Collector Output ............................................................ 2-366
M74LS390P Dual Decade Counter............................... :.......................... ..... .................................................... ................. 2-368
M74LS393P Dual 4-Bit Binary Counter............................................................................................................................. 2-371
M74LS395AP 4-Bit Cascadable Shift Register with 3-State Outpul.. ................................................................................. 2-374
Dual Retriggerable Monostable Multivibrator with Reset .................................................................... 2-377
* M74LS423P
M74LS490P Dual 4-Blt Decade Counter ...................................................................................................................... 2-382
M74LS540P Octal Buffer/Line Driver with 3-State Output (Inverted) ...................................................................... 2-385
M74LS541 P Octal Buffer/Line Driver with 3-State Output (Non Inverted) ............................................................ 2-388
M74LS595P 8-Bit Shift Register/Latch with 3-State Output .................................................................................... 2-391
M74LS596P 8-Bit Shift Register/Latch with Open Collector Output ....................................................................... 2-395
M74LS620P Octal Bus Transceiver with 3-State Output (Inverted) ................................................................................ 2-399
M74LS640P Octal Bus Transceiver with 3-State Output (Inverted) ....................................... ,....................................... 2-402
M74LS640-1P Octal Bus Transceiver with 3-State Output (Inverted) ............................................................................... 2-405
M74LS641P Octal Bus Transceiver with Open Collector Output (Non Inverted) .......................................................... 2-408
M74LS641-1P Octal Bus Transceiver with Open Collector Output (Non Inverted) .......................................................... 2-411
M74LS642P Octal Bus Transceiver with Open Collector Output (Inverted) ....................................................... ;.......... 2-414
M74LS642-1P Octal Bus Transceiver with Open Collector Output (Inverted) ................................................................. ; 2-417
M74LS643P Octal Bus Transceiver with 3-State Output .................................................................... .'........................... 2-420
M74LS643-1P Octal Bus Transceiver with 3-State Output ................................................................................................ 2-423
M74LS644P Octal Bus Transceiver with Open Collector Outpu\.. .............................................................. :.................. 2-426
\
M 74LS644-1 P Octal Bus Transceiver with Open Collector Outpu\.. ................................................................................. 2-429
M74LS645P Octal Bus Transceiver with 3-State Output (Non Inverted) ....................................................................... 2-432
M74LS645-1P Octal Bus Transceiver with 3-State Output (Non Inverted) ................................................................. ;..... 2-435
M74LS668P Synchronous Presettable Up/Down Decade Counter ........ _........................................................................ 2-438
• MITSUBISHI
4 ..... ELECTRIC
MITSUBISHI LSTTLs
CONTENTS
Page
M74LS669P Synchronous Presettable Up/DolMl 4-Bit Binary Counter"""" ................................................................... 2-444
M74LS670P 4-by-4 Register File with 3'State Output..................................................................................................... 2-449
*M74LS682P 8-Bit Magnitude Comparator ....................................................................................................................... 2-452
*M74LS683P 8-Bit Magnitude Comparator with Open Collector Output ........................................................................ 2-456
* M74LS684P 8-Blt Magnitude Comparator ....................................................................................................................... 2-459
*M74LS685P 8-Bit Magnitude Comparator with Open Collector Output ........................................................................ 2-462
*M74LS688P 8-Bit Magnitude Comparator with Enable Input ............. ,.......................................................................... 2-465
*M74LS689P 8-Blt Magnitude Comparator With Enable Input and Open Collector Output .......................................... 2-468
*: New product
• MITSUBISHI
.... ELECTRIC 5
GUIDANCE
INDEX BY FUNCTION
SYMBOLOGY
PACKAGE OUTLINES
MITSUBISHI LSTTLs
Type designation Page Type designation Page Type designation Page Type designation Page
M74LSOOP 2-9 M74LS93P 2-101 M74LS191P 2-224 M74LS373P 2-353

M74LS02P 2-11 M74LS95BP 2-105 M74LS192P 2-228 M74LS374P 2-356
M74LS03P 2-13 M74LS96P 2-108 M74LS193P 2-232 M74LS375P 2-360
M74LS04P 2-15 M74LS107AP 2-112 M74LS194AP 2-236 M74LS377P 2-363
M74LS05P 2-17 M74LS109AP 2-115 M74LS195AP 2-239 M74LS386P 2-366
M74LS08P 2-19 M74LS112AP 2-118 M74LS196P 2-242 M74LS390P 2-368
M74LS10P 2-23 M74LS114AP 2-124 M74LS221 P 2-250 M74LS395AP 2-374
M74LSllP 2-25 M74LS122P 2-127 M74LS240P 2-256 M74LS423P 2-377
M74LS18P 2-35 M74LS133P 2-143 M74LS245P 2-272 M74LS596P 2c395
M74LS21P 2-41 M74LS138P 2-151 M74LS251 P 2-281 M74LS640-1P 2-405
M74LS24P 2-45 M74LS145P 2-156 M74LS256P 2-288 M74LS641-1P 2-411
M74LS27P 2-47 M74LS147P 2-159 M74LS257AP 2-292 M74LS642P 2-414
M74LS3OP 2-49 M74LS148P 2-162 M74LS258AP 2-295 M74LS642-1P 2-417
M74LS37P 2-53 M74LS153P 2-168 M74LS266P 2-302 M74LS643-1 P 2-423
M74LS73AP 2-71 M74LS162AP 2-188 M74LS295BP 2-322 M74LS670P 2-449
M74LS74AP 2-74 M74LS163AP 2-192 M74LS298P 2-325 M74LS682P 2-452
M74LS75P 2-77 ivi74LS 164P 2-196 M74LS299P 2-328 M74LS683P 2-456
M74LS86P 2-90 M74LS173AP 2-210 M74LS365AP .2-341 M74LS689P 2-468
M74LS90P 2-92 M74LS174P 2-214 M74LS366AP 2-344
M74LS91P 2-95 M74LS175P 2-217 M74LS367AP 2-347
M74LS92P 2-98 M74LS190P 2-220 M74LS368AP 2-350
• MITSUBISHI
.... ELECTRIC 1-1
MITSUBISHI LSTTLs
INDEX BY FUNCTION
INDEX BY FUNCTION (Recommended operating. conditions Vee = sv ± S%, Topr= - 20-+ 7S"C)
INVERTERS, NAND GATES
Type of output Typical electrical characteristics

on
.9u Propa- P.owe r I) Low-level High·level '"
OJ CO '" Interc hangeable
Circuit function '" 0.
.~ =? c
",2!
Type gatlon dlssipa- output output 'u"
::L:...=
- products
Page
time tion current current
~~
0.- '" OJ
0.0
08 (ns) (mW) (mA) (mA)
Hex Inverter
0 - M74LS04P 6 12 8 0.4 14P4 74LS04 2-15
- 0 M74LS05P 10 12 8 - 14P4 74LSOS 2-17
0 - M74LSOOP 6 8 8 0.4 14P4 74LSOO 2-9
Quadruple 2 c l nput Positive NAN D Gate
- 0 M74LS03P 10 8 8 - 14P4 74LS03 2-13
0 - M74LS10P 8 6 8 0.4 14P4 74LS 10 2-23
Triple 3-lnput Positive NAND Gate
- 0 M74LS12P 13 6.3 8 - '14P4 74LS 12 2-27
0 - M74LS20P 10 4 8 0.4 14P4 74LS20 2-39
Dual 4-lnput Positive NAND Gate
- 0 M74LS22P 18 4 8 - 14P4 74LS22 2-43
Srngle 8-1 nput Positive NAN D Gote 0 - M74LS30P 11 2 4 8 0.4 14P4 74LS30 2-49
Single 13-lnput Positive NAND Gate 0 - M74LS133P 11 2.4 8 0.4 16P4 74LS 133 2-143
AND GATES
Quadruple 2-lnput Positive AND Gote

0 - M74LS08P 10 17 8 0.4 14P4 74LS08 2-19
- 0 M74LS09P 13 17 8 - 14P4 74LS09 2-21
0 - M74LSllP 10 12.8 8 0.4 14P4 74LSll 2-25
Triple 3·lnput Positive AND Gate
- 0 M74LS15P 13 12.8 8 - 14P4 74LS 15 2-33
Dual 4·lnput Positive AND Gate 0 - M74LS21P 10 8.S 8 0.4 14P4 74LS21 2-41
NOR GATES
Quadruple 2-lnput Positive NOR Gate

Trrple 3·lnput Positive NOR Gate
OR GATE
Quadruple 2-lnput Positive OR Gate
EXCLUSIVE OR GATES
0 M74LS86P 10 30.5 8 0.4 14P4 74LS86 2-90

Quadruple 2-lnput Exclusive OR Gate - 0 M74LS136P 13 30.5 8 - 14P4 74LS 136 2-145
0 - M74LS386P 10 30.S 8 0.4 14P4 74LS386 2-366
EXCLUSIVE NOR GATE
I Quadruple 2-lnput Exclusive NOR Gate o M74LS266P 15 40 I 14P4 74LS266 I 2-3021
AND-OR-INVERT GATE
Dual 2-Wlde 2-lnput AND·OR INVERT

Gate
• MITSUBISHI
1-2 "'ELECTRIC
MITSUBISHI LSTTLs
INDEX BY FUNCTION
BUFFERS/LINE DRIVERS
~I
0) "'
Prapa- Power Low- Hlgh- OJ 0)
0 0) level level
ru r
'" e
Interchangeable
Circuit function Page
"
2: ~
0. e U Type galIOn dlssipa-
~~r ..::.t.:.=
~
u~
output output ~ products
u~ " 0)
0.- time lion current current » '" :J
0-0
<1:0. 08 M ens) (mW) {mAl (mAl (v)
I M74LS240P 8 120 24 15 0.4 20P4 74LS240 2-256
- - N M74LS241P 9 126.7 24 15 0.4 20P4 74LS241 2-259
Octal Buffer/line Driver N M74LS244P 9 126.7 24 t5 0.4 20P4 74LS244 2-269
- - I M74LS540P to 111.7 24 15 0.4 20P4 74LS540 2-385
- - N M74LS541 P 10 133.3 24 15 0.4 20P4 74LS541 2-388
- - N M74LS245P 10 290 24 15 0.4 20P4 74LS245 2-272
- - I M74LS620P 10 290 24 15 0.4 20P4 74LS620 2-399
- - I M74LS640P 10 290 24 15 0.4 20P4 74LS640 2-402
- - I M74LS640-1 P 10 290 48 15 0.4 20P4 74LS640- 1 2-405
- N - M74LS641P 18 290 24 - 0.4 20P4 74LS641 2-408
- N - M74LS641-1P 18 290 48 - 0.4 20P4 74LS641-1 2-411
- I - M74LS642P 15 290 24 - 0.4 20P4 74LS642 2-414
Octal Bus Transceiver
- I - M74LS642-1 P 15 290 48 - 0.4 20P4 74LS642-1 2-417
- - I·N M74LS643P 10 290 24 15 0.4 20P4 74LS643 2-420
- - I·N M74LS643-IP 10 290 48 15 0.4 20P4 74LS643- 1 2·423
- I·N - M74LS644P 16 290 24 - 0.4 20P4 74LS644 2-426
- I·N - M74LS644-1 P 16 290 48 - 0.4 20P4 74LS644· 1 2-429
- - N M74LS645P 12 290 24 15 0.4 20P4 74LS645 2·432
- - N M74LS645-IP 12 290 48 15 0.4 20P4 74LS645·1 2-435
- - N M74LS365AP 9 67 5 24 2 .6 - 16P4 74LS365A 2-341
- - I M74LS366AP 7 59 24 2.6 - 16P4 74LS366A 2-344
Hex Bus,Drlver
- - N M74LS367AP 9 67 .5 24 2 6 - 16P4 74LS367A 2-347
- - I M74LS368AP 7 59 24 2.6 - 16P4 74LS368A 2-350
Ouadruple 2·lnput I - - M74LS37P 10 17 3 24 1.2 - 14P4 74LS37 2-53
Positive NAND Buffer - I - M74LS38P 14 17 .3 24 - - 14P4 74LS38 2-55
- - N M74LSI25AP 9 51 .8 24 2.6 - 14P4 74LS 125A 2-137
Quadruple Bus Buffer Gate
- - N M74LS126AP 9 59 24 2.6 - 14P4 74LS 126A 2-139
- - I M74LS242P 8 133.3 24 15 0.4 14P4 74LS242 2-263
Quadruple Bus Transceiver
- N M74LS243P 9 138.3 24 15 0 4 14P4 74LS243 2-266
Dual 4-lnput Positive NAND Buffer I - - M74LS40P 14 8.6 24 1.2 - 14P4 74LS40 2-57
I. With inverted output N With non Inverted output I· N : With both inverted and non inverted output
SCHMITT TRIGGER NAND GATES/INVERTERS

Propaga- Posltlve- 0) "'
Power Negatlve-
Circuit function "a. 8
e u Type lion dlssipa- gOing gomg
OJ"
me
.::L.:.=
Interchangeable
Page
2: 7 threshold threshold u- products
t)~ time tlon ro :J
<1:00 gg
0) "
ens) (mW)
voltage
(V)
voltage
(V)
0-0
I - M74LS14P 12 51.5 1.6 0.8 14P4 74LS 14 2-31

Hex Schm Itt Trigger Inverter
I - M74LSI9P 13 67 1.9 1.0 14P4 74L!? 19 2-37
Quadruple 2-lnput Positive NAND I - M71LS132P 13 35.3 1.. 6 0.8 14P4 74LS 132 2-H1
Schmitt Trigger I M74LS24P 19 44 1.9 1.0 14P4 74LS24 2-45
Dual 4-1 nput Positive NAND Schmitt I M74LSI3P 16 17.5 1.6 0.8 14P4 74LS13 2-29
Trigger I - M74LSIBP 25 22.5 1.9 1.0 14P4 74LS 18 2-35
I . With Inverted output
• MITSUBISHI
..... ELECTRIC 1-3
MITSUBISHI LSTTLs
INDEX BY FUNCTION
J-K FLIP-FLOPS
Typical electrical characterIStics
Circuit function Type

Operating Setup Hold Power Q;
time dissipation! ,~
J ~ Q)on
'" on
OJ",
" c:
~:..=
u~
Interchangeable
products
Page
0:'" a:'"
frequency tIme
" ::J
f- "-0
(MHz) (ns) (ns) (mW)
Dual J-K Negative Edge-Triggered Fllp-
Flop with Reset M74LS73AP 0-45 20 0 20 L - If 14P4 74LS 73A 2-71
Dual J-K Negative Edge-Triggered Flip-

Flop with Set and Reset
M74LS76AP 0-45 20 0 20
L lJ 1J 16P4 74LS 76A 2-80
Dual J-K Negative Edge-Triggered Flip-

Flop with Reset M74LSI07AP 0-45 20 0 20 L - If 14P4 74LS 107A 2-112
Dual J-K Positive Edge- Triggered Fllp-

Flop with Set and .Reset
M74LSI09AP 0-45 20 5 20 J 1J lJ 16P4 74LS 109A 2-115

Flop with Set and Reset
M74LSI12AP 0-45 20 0 20 1 1f lJ 16P4 74LS112A 2-118

Flop with Set
M74LS 113AP 0-45 20 a 20
1 lJ - 14P4 7.ILSl13A 2-121
Dual J-K Negative Edge-Triggered Flip-Flop

with Set Common Reset and Common Clock M74LSl14AP
0-45 20 0 20 L If lJ 14P4 74LSl14A 2-124
I: Positive-going edge L: Negative-going edge lJ: Active low-level
D-Type FLIP FLOPS

Typical electrical characteristics
Operating Setup Hold Power '" on
OJ",
Q; Interchangeable
Circuit function Type frequency tIme tIme dissipa- OJ
~
~ ~ " c:
.::.:::..=
u~ products
Page
0:'" a:'"
lion " ::J
(MHz) (ns) (ns) (mW) ~ "-0
Dual D-Type Edge-Triggered Flip-Flop with

Set and Reset M74LS74AP 0-50 20 5 20
S 1J lJ 14P4 74LS 74A 2-74
Hex D-Type Flip Flop with Reset M74LS174P 0 47 20 5 80 J - lJ 16P4 74LS 174 2-214
Quadruple D-Type Flip-Flop with Reset M74LS175P 0-50 20 5 55 S 1f 16P4 74LS 175 2-217
Octal Positive Edge-Triggered D-Type Fllp-
Flop with Reset M74LS273P 0-40 20 5 85 S -
1J 20P4 74LS273 2-304
Octal Positive Edge-Triggered D- Type Fllp-
Flop with 3-State Outputs M74LS374P 0-40 20 4 135 I - - 20P4 74LS374 2-356
Octal Positive Edge-Triggered D- Type Fllp-
Flop with Enable M74LS377P 0-40 25 5 85
I - - 20P4 74LS377 2-363
S : Positive-going edge
lJ : Active low-level
LATCHES, REGISTERS
Typical electrical characteristics
Power Power '" on
OJ'"
Setup Hold ~ Interchangeable
Circuit function Type dlssipa-
time time
disslpa- D
~ " c:
~:...=
u~ products
Page
lion lion "c: a:'"
UJ
ro
,,-0
::J
(ns) (ns) (ns) (mW)
4-BI1 Bistable Latch

M74LS75P 9 20 8 31.5 Jl - 16P4 74LS75 2-77
M74LS375P 9 20 8 31.5 11 - 16P4 74LS375 2-360
Dual 4-Bit Addresable Latch M74LS256P 13 15 5 100 - 1J 1'6P4 74LS256 2-288
8-Blt Addressable Latch M74LS259P 13 15 5 100 - If 16P4 74LS259 2-298
Quadruple R-S Latch M74LS279P 10 - - 19 - - 16P4 74LS279 2-307
Octal D-Type Transparent Latch with 3-State
Outputs
M74LS373P 12 5 20 120 n - 20P4 74LS373 2-353
4-Blt D-Type Register with 3-State Outputs M74LS173AP 23 17 6 85 S Jl 16P4 74LS 173A 2-210
11 : Active high-level
1J : Active low-level
S : Positive-going edge
• MITSUBISHI
1-4 ' " ELECTRIC
MITSUBISHI LSTTLs
INDEX BY FUNCTION
SHIFT REGISTERS
yplca ~Tectr,ca
characteristics Mode
<l> Ul
"0 OJ<l>
Operating Power '"c ~,~ Interchangeable
~<l>
0
Circuit function Type Page
frequency ISSlpatlo ~ -
-;;; "0'"
u'"::J products
~
(MHz) (mW)
a: ~~ ro
0-0
a:'" ~
w ro
D-
o
M74LS299P 0-28 165 A 0 0 0 0 20P4 74LS299 2-328
8-Blt Universal Shift/Storage Register
M74LS323P 0-28 165 S 0 0 0 0 20P4 74LS323 2-332
4-BI1 Bidirectional Universal Shift Register M74LSI94AP 0-45 75 A 0 0 0 0 16P4 74LS194A 2-236
5-Blt Shift Register M74LS96P 0-45 60 A 0 - 0 - 16P4 74LS96 2-108
4-81t Cascadable Shift Register with 3-State
M74LS395AP 0-40 83.8 A 0 - 0 - 16P4 74LS395 2-374
Outputs
4-Blt Parallel Access Shift Register M74LSI95AP 0-60 70 A 0 - 0 - 16P4 74LS 195A 2-239
4-Blt Parallel Access Shift Register M74LS95BP 0-50 65 - 0 - 0 - 14P4 74LS95B 2-105
4-BI1 Shift Register with 3·State Outputs M74LS295BP 0-40 72.5 - 0 - 0 - 14P4 74LS295B 2-322
8-Blt Serial-In Parallel-Out Shift Register M74LS164P 0-50 80 A 0 - - -, 14P4 74LS 164 2-196
8-BI1 Shift Register M74LS91P 0-60 60 - 0 - - - 14P4 74LS91 2-95
8-Blt Parallel-Load Shift Register M74LSI65AP 0-38 105 - 0 - - - 16P4 74LS165A 2-199
8-BI1 Shift Register M74LS166AP 0-38 100 A 0 - - - 16P4 74LS 166A 2-203
8-Bit Shift Register/Latch with 3-State Output M74LS595P A 0 - - 0 16P4 74LS595 2-391
8-Blt Shift Register/Latch with Open Collector -
M74LS596P A 0 - 0 16P4 74LS596 2- 395
Output
A : Asynchronous
S : Synchronous
ASYNCHRONOUS COUNTERS
c TYPical electrical
0 <l> Ul
characteristics
~
Q; OJ<l>
Circuit function
N
Type Clock I-'ower I OJ
Parallel
~<l>
ro c
-,",-
Interchangeable
Page
~ frequency diSSipation g> load u-
ro OJ products
a (MHz) (mW) ~ a: 0-0
Decade Counter
2X5 M74LS90P
0-75
0-30
45 L
"9 •.
set n 14P4 74LS90 2-92
2X5 M74LS290P
0-75
0-30
45 L
"9"
set n 14P4 74LS290 2-316
0-80
Presettable Decade Counter/ Latch 2X5 M74LS196P
0-25
80
~ A 1r 14P4 74LS 196 2- 242
0-60
2X8 M74LS93P
0-35
45 ~ -
Jl 14P4 74LS93 2-101
4-81t Bmary Counter
~
0-60
2X8 M74LS293P
0-35
45 -
Jl 14P4 74LS293 2-319
0-80
Presettable 4- Bit Binary Counter/ LatCh 2X8 M74LSI97P
0-35
80 ~ A lJ 14P4 74LS 197 2-246
0-80
Dlvlde-by-Twelve Counter 2X6 M74LS92P
0-30
45 ~ -
Jl 14P4 74LS92 2-98
0-80
Dual Decade Counter 2X5 M74LS390P
0-35
100 ~ -
Jl 16P4 74LS390 2-368
Dual 4-Blt Decade Counter 2X5 M74LS490P 0-35 75

1 -
Jl 16P4 74LS490 2-382
Dual 4-Blt Binary Counter 16 M74LS393P 0-75 100 ~ -

n 14P4 74LS393 2-371
~: Negative-going edge
A : Asynchronous
"g" set: Output OAand Oocan be set to high directly. and output Osand Octo low,
• MITSUBISHI
..... ELECTRIC 1-5
MITSUBISHI LSTTLs
INDEX BY FUNCTION
SYNCHRONOUS COUNTERS
TYPical electrical
characteristics ClJ
0> '"
;;; ]l OJ
Interchangeable
di:s~;:~;onl
Type Clock '" c Page
Circuit function "iii" OJ
0> .'!JL.:.:
0> ,,~
products
frequency
(MHz) (mW) ~
~'"
OJ
"'0 0:
0.._
'" '" :J
a;O
Synchronous Presettable Decade Counter with Direct
Reset
M74LS160AP 0-55 92.5 S 5 A 16P4 74LS160A 2-180
Fully Synchronous Presettable Decade Counter M74LS162AP 0-55 92.5 I 5 5 16P4 74LS162A 2-188
Synchronous Presettable Up/Dow~ Decade Counter
with Mode Control
M74LS190P 0-38 100 S A - 16P4 74LS190 2-220
Synchronous Presettable Up/Down Decade Counter M74LS192P 0-38 95 ..f A A 16P4 74LS192 2-228
Synchronous Presettable 4·Blt B,nary.Counter with
Direct Reset
M74LS161AP 0-55 92.5 S 5 A 16P4 74LS 161A 2-184
Fully Synchronous Presettable 4·Blt Binary Counter M74LS163AP 0-55 92.5 j. 5 5 16P4 74LS 163A 2-192
Synchronous P resettable Up/ Down 4-Blt Binary
Counter with Mode Control
M74LS191P 0-40 100 I A - 16P4 74LS191 2-224
Synchronous Presettable Up/Down 4·Blt Binary Counter M74LS193P 0-38 95 S A A 16P4 74LS193 2-232
Synchronous Up/Down Decade Counter M74LS668P 0-45 100 S 5 - 16P4 74LS668 2-438
Synchronous Up/Down 4·Bit Binar.,. Counter M74LS669P 0-30 100 S 5 - 16P4 74LS669 2-444
1" : Positive-going edge
A : Asynchronous
5 : Synchronous
MONOSTABLE MUL TIVIBRATORS

Typical electrical characteristics OJ '"
0> OJ
Output "'c
Power JExternal timing resistor ~:.: Interchangeable
Circuit func)ion Type ,,~
Page
pulse dissipation /capacitor for setting products
'" :J I
width (mW) output pulse width' 0..0
Retriggerable Monostable Multivibrator with

M74LS122P 70n8- oo 30 5-250k Q/No limit 14P4 74LS122 2-127
Reset
Dual Retrlggerable Monostable Multlvlbrator
M74LS123P 70ns- 00 60 5-260kQ/ No limit 16P4 74LS123 2-132
with Reset
Dual Retriggerable Monostable M ultivibrator
with"Reset M74LS423P 70ns- 00 50 5-260k Q / No limit 16P4 74LS423 2-377
Dual Monostable Multivibrator M74LS221P 33ns-00 62.5 1.4-100kQ/0- 1OOO.uF 16P4 74LS221 2-250
DATA SELECTORS/MULTIPLEXERS
TYPical Typical propagation time (ns)
power OJ '"
O>ClJ
dlssipa- From strobe From data From data '" c Interchangeable
Circuit function Type mput to ..':iI!:':: Page
tlon (enable) Input to
,,~
products
mverted '" :J
(mW) mput to output output output 0..0
8-Line to I-Line Data Selector/Multiplexer

With Strobe M74LS151P 30 15 15 8 16P4 74LS151 2-165
I
8-Line to I-Line Data Selector/Multiplexer ,
with 3-State Output M74LS251P 33 13 15 7 16P4 74LS251 2-281
Dual 4·Line to I·Llne Data Selector/

Multiplexer With Strobe M74LSI53P 31 12 10 - 16P4 74LSI53 2-168
Dual 4-Line to I-Line Data Selector/

Multiplexer With 3·Stat~ Output M74LS253P 38.8 12 10 - 16P4 74LS253 2-285
Dual 4-Line to I-Line Data SeleCtor/

Multiplexer with Stro'be(lnverted) M74LS352P 31 II - I 7
16P4 74LS352 2-336
Dual 4-Llne to I-Line Data Selector/

Multiplexer wlth3-State Output (Inverted)
M74LS353P 38.8 13 - 8 16P4 74LS353 2-338
Quadruple 2-Llne to I-Line Data Selector/
Multi plexer M74LSI57P 48.5 12 8 - 16P4 74LS157 2-176
Quadruple 2-Llne to I-Line Data Selector/
Multiplexer (Inverted) M74LS158P 24 8 - 5 16P4 74LS158 2-178
Quadruple 2-Line to I-Line Data,Selector/

Multiplexer with 3· State Output M74LS257AP 47 9 7 - 16P4 74LS257A 2-292
Quadruple 2·Line to I-Line Data Selector/

Multiplexer With 3-State Output (Inverted)
M74LS258AP 42.2 10 - 7 16P4 74LS258A 2-295
12 From
Quadruple 2-lnput Multiplexer with Storage M74LS298P 65 clock input
- - 16P4 74LS298 2-325
• MITSUBISHI
1-6 ..... ELECTRIC
MITSUBISHI LSTTLs
INDEX BY FUNCTION
DISPLA Y DECODERS/DRIVERS
Output Typical electrical characteristics " "'

'""'''
Power Low-level Output
ro c Interchangeable
Circuit function active Type ~ Page
diSSipation current break-down uro -OJ products
level (mW) output(mA) voltage (V) [LO
BCD-to- Decimal Decoder / Dflver "L" M74L5145P 35 24 15 16P4 74LS 145 2-156
BCD-to-7- Segment Decoder/Driver "L" M74L547P 35 24 15 16P4 74LS47 2-62
BCD-to-7- Segment Decoder / Dflve r "H" M74L548P 125 6 Vec 16P4 74LS48 2-66
BC D-to- 7- Segment Decoder /0 fiver "L" M74L5247P 35 24 15 16P4 74LS247 2-275
BCD-to-7- Segment Decoder/Dflver "H" M74L5248P 125 6 Vcc 16P4 74LS248 2-278
Segment Identification of M74LS47P, M74LS48P
Decimal 0 1 2 3 4 5 6 7 8 9 10 14
number 11 12 13 15
n uI
8 q
Segment
u
Identification
U
I
I 2 3 5 b I
I C :J
C
- C
Segment Identification of M7 4LS24 7P, M74LS248P
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
number
n '-I I-
u c
2 3 5
Segment
Identification
U
I
I 0
I
I 8 9 C :J - C
DECODERS !DEMUL TIPLEXERS
TYPical Typical propagation time (ns)

power From strobe From data
'roOJ" "'c
OJ
Interchangeable
Circuit function Type (enable) ::,t.:..= Page
dissipation Input to u- products
Input to ro OJ
(mW) output output [LO
BCD-to-Declmal Decoder M74L542P 35 - 12 16P4 74LS42 2-59

3-Line to 8-Line Decoder/Demultiplexer with
M74L5137P 55 10 12 16P<\. 74L5137 2-147
Address Latch
3-Llne to 8-Llne Decoder/Demultiplexer M74L5138P 31.5 12 14 16P4 74LS 138 2-151
Dual 2-Llne to 4-Llne Decoder/Demultiplexer M74L5139P 34 10 13 16P4 74LS139 2-154
Dual 2-Blt Binary to 4-Llne Decoder/
M74L5155P 30 5 16 13 16P4 74LS 155 2-170
Demultiplexer with Strobe
Dual 2-Blt Binary to 4-LIn·e Decoder/
M74L5156P 30.5 23 19 16P4 74LS 156 2-173
Demultiplexer with Open Collector Outputs
ENCODER
Typical electrical characteristics OJ "'

OJ OJ
Propagation Power Low-level High-level ro c Interchangeable Page
Typa output output .::L.:..=
Circuit function u-OJ products
t1me dissipation current current ro
(ns) (mW) (rnA) (mA) 0.0
1 O-Line to 4-Line Priority Encoder M74L5147P 16 55 8 0.4 16P4 74LS 147 2-159
8-Llne to 3-Lme PrIOrity Encoder M74L5148P 15 55 8 0:4 16P4 74LS 148 2-162
• MITSUBISHI
.... ELECTRIC 1-7
MITSUBISHI LSTTLs
INDEX BY FUNCTION
COMPARATOR
TYPical electrical characteristics

Power Low-level High-level
"OJ"'" Interchangeable
CirCUit function Type Propagation
output output '" c
~:.=: Page
time diSSipation current current u- products
'" :J
(ns) (mW) (rnA) (rnA) 0.0
4-Blt Magnitude Comparator M74LS85P 13 55 8 0.4 16P4 74LS85 2-86
M74LS682P 20 210 24 0.4 20P4 74LS682 2-452
M74LS683P 24 210 24 - 20P4 74LS683 2-456
M74LS684P 20 200 24 0.4 20P4 74LS684 2-459
8-Blt Magnitude Comparator ,
M74LS685P 24 200 24 - 20P4 74LS685 2-462
M74LS688P 14 200 24 0.4 20P4 74LS688 2-465
M74LS689P 22 200 24 - 20P4 74LS689 2-468
PARITY GENERATOR/CHECKER
9-Blt Odd/Even parity Generator/Checker M74LS2BOP 18 80 0.4 114P41 74LS280 I 2-310 I
ADDER

Typical
power
dissipation
Typical propagation time (ns) ."'.
roc
u-
" Interchangeable
Page
Carry time Add time roO products
(mW) 0.0
4-BI1 Binary Full Adder with Fast Carry M74LS83AP 102.5 8 12 16P4 74LS83A 2-83
4-Bit Binary Full Adder with Fast Carry M74LS283P 102.5 8 12 16P4 74LS283 2-313
REGISTER FILES

1P"J'.),ce"r'
dissipation
Typical propagation time (ns) ."'.
u-
"
ro c Interchangeable
products
Page
(mW) Write time Read time ro 0
0.0
4-By-4 ReQlster File with Open Collector
M74LS170P 125 15 16 16P4 74LS 170 2-207
Outputs
4-By-4 Register File with 3-State Output M74LS670P 150 12 13 16P4 74LS670 2-449
4-Blt D-Type Register with 3-State Output M74LS173AP 85 - - 16P4 74LS173A 2-210
Refer to LATCH and REGISTER sections for M74LS173AP specifications.
• MITSUBISHI
1-8 ..... ELECTRIC
MITSUBISHI LSTTLs
SYMBOLOGY
SYMBOLOGY
Symbol Descriptions
CL Load capacitance Extenally connected load capacitance

f max Maximum clock frequency Maximum input repetition frequency for normal Ie operation.
FI Fan-in Number of similar inputs
Fo Fan-out Number of similar les which can be driven by an output
H Indicates the high logic level Used in voltage and current suffixes to indicate the high potential level
I Indicates current or input Currents flowing into les are taken to be positive and those flowing out as negative
Icc Supply current The current flowing into the Vee supply terminal of a circuit
leeL Low-level supply current Vee current when the inputs are such that the output is low.
leeH High-level supply current Vee current when the inputs are such that the output is high.
leez High-impedance supply current Vee current when the inputs are such that the output is in the high-impedance state.
IF Forward current Forward diode current
II Input current Input current flowing into the IC pin when a voltage is applied.
IIH High-level input current The current flowing into an input when a specified high voltage is applied.
IlL Low-Irvel input current The current flowing out of an input when a specified low voltage is applied.
IOH High-level output current Current flowing in the load when the output is high or current flowing when a high level is applied
IOL LOW-level output current The current flowing into an output which is in the low state
loS Short-circuit output current The current flowing out of an output which is in the high state when that output is short circuit to ground.
IOZH - Off-state high ·Ievel output current The current flowing into a disabled 3-state output with a specified high output voltage applied
IOZL Off-state low-level output current The current flowing out·of a disabled 3-state output with a specified low output voltage applied
IT Threshold current Current which flows when the threshold voltage is applied to the input
IT+ Positive threshold current Current which flows when the positive threshold voltage is applied to the input
IT- Negative threshold current Current which flows when the negative threshold voltage is applied to the input
L Indicates the low logic level Used in voltage and current suffixes to indicate the low potential level
0 Indicates output
Pd Power dissipation Product of.the supply voltage and the supply current
PRR Pulse repetition rate The rate of repetition of an applied pulse train
Ta Operating free-air temperature The temperature of the environment surrounding an IC
tf Falltime Time required to fall from the high to the low logic level
th Hold time The required hold time for a specified input after an input has changed
tl atch Latch time The time from the latching action of input data until the data appears in the output
Topr Operating temperature The ambient temperature range for normal IC operation
tpd Propagation delay time Amount of time required from a change of input signal until the corresponding change in output,
expressed as the average propagation time.
tpHL Propagation delay time, high-to-Iow-Ievel Amount of time required from a change of input signal until the output changes from high to low.
output
tpHz Output disable time from High level Amount of time required from a change of input signal until the output changes from high to
high-impedance.
tpLH Propagation delay time, low-to-high·level Amount of time required from a change of input signal until the output changes from low to high.
output
tpLZ Output disable time from Low level Amount of time required from a change of input signal until the output changes from row to
high-impedance.
tw Pulse width The time required for a pulse to change from one specified level to another.
two Output pulse width The width of the pulse appearing in the output of a monostable multivibrator
tPZH Output enable time to a High level Amount of time required from a change of input signal until the output changes from high-impedance
to high.
tPZL Output enable time to a Low level Amount of time required from a change of input signal until the output changes from high·impedance
to low.
tr Risetime- Time required to rise from the low to the high logic level
tree Recovery time Time from the point at which the input states are cancelled until the next dock pulse may be applied.
Tstg Storage temperature The range of surrounding storage temperature for an IC.
tsu Setup time The required hold time for other inputs before a particular input may be changed.
Vee Supply voltage The voltage of power supply voltage over which the device is guaranteed to operate within the
specified limits.
• MITSUBISHI
;"ELECTRIC
MITSUBISHI LSTTLs
SYMBOLOGY
Symbol Descriptions
VSE Base-emitter voltage

VF Forward voltage Forward voltage applied to a diode
VI Input voltage Voltage applied to an input
VIC Input damp diode voltage The forward voltage applied to an input clamping diode.
VIE Input emitter-oemitter voltage The emitter-to-emitter voltage for a multi-emitter transistor input.
VIH High-level input voltage The range of input voltages that represents a logic high in the system.
VIL Low-level input voltage The range, of input voltages that represents a logic low in the system.
Vo Output voltage Voltage applied to or appearing at an output

VOH High-level output voltage Voltage at an output in the high state
VOL Low-level1output voltage Voltage at an output in the low state
Vp Pulse amplitude The difference between the low level and high level of a pulse.
Thr'eshold voltage The input voltage beyond at which the output changes
VT ,
Positive-going threshold voltage The threshold voltage at which the output changes when the input is changing from low to high.
VT+
VT- Negative-going threshold voltage The threshold voltage at which the output changes when the input is changing from high to low.
Z Indicates the off-state Indicates that the output is in the high-impedance state.
Zo Output impedance The load impedance which should be connected to such devices as pulse generators.
• MITSUBISHI
1-10 "'ELECTRIC
MITSUBISHI LSTTLs
PACKAGE OUTLINES
TYPE 14P4 14-PIN MOLDED PLASTIC DIL Dimension in mm
~:::::~~] --a=;l4SMAX
/
i \ ..
7 62 + 0 3
,----, \
Ii
::g3MIN
2.S4±0.2S O.S±O.1 7.6.-10
1.5 ~g 1
7 62 ± 0.3
I "
"\'-----'/
2.S4±0.2S O.S±O.1 7.6-10

I.S ::g~
I 24::U.. I
e::::: :::0)] 4.SMAX

7 62 ± 0.3
O.S±O.1
2.S4±0.2S 7.6 - 10
• MITSUBISHI
~ELECTRIC 1-11
DATA SHEETS
INDIVIDUAL DATA
MITSUBISHI LSTTLs
Schematics of inputs and outputs of the M74LSOOP series ual data. Reference should be made whencircuitry is being
are shown in 1-1 ~ 1-11 and in 0-1 ~0-17, respe~tively, for designed.
devices whose circuit diagrams are not given in the individ-

Schematics of inputs Schematics of outputs
Type designation
Fig, R (Q) Pin Fig. R (equivalent resistance) n
M74LS42P 1 -1 17k All inputs 0-1 120
1 -1 25k OA-OO
0-2 -
M74LS47P 1 -1 20k LT, RBI
1 -2 RIN=10k BI/RBO 1-2 Rour=20k BI/RBO
1 -1 25k OA-OO
0-3 2k
M74LS4BP 1 -1 20k LT, RBI
1 -2 RIN=10k BI/RBO 1-2 Rour=20k BI/RBO
1 -1 26k J, K
M74LS73AP 1 -1 9k T 0-14 120

1 -3 9k Ro
I -3 Sk SD, Ro
M74LS74AP 1 -4 18k T 0-14 120
1 -5 31k 0
1 -1 lSk 0
M74LS75P 0-15 120
1 -1 4.5k E
I -1 26k J, K
M74LS76AP I -1 9k T 0-14 120

I -3 9k So, Ro
I -1 lSk Co
M74LS83AP 0-1 12q
I -1 9k A,-A4, B,-B4
1-6 17k IA<B, IA>B
M74LS85P 1-7 R,=15k, R2=S.5k IA~B 0-1 120
1-7 R,=S.5k, R2=17k AO-A3, Bo-B3
I -1 17k SO(9)', SO(9)2, Ro" R02 R=120, R,=17k
0-13 QB
M74LS90P I -S R,=S.5k, R2=S.5k, R3=S.5k T, R2=17k, R3=9k
1-8 R, =5.Sk, R2=5.8k, R3=4 .4k T2 0-15 120 QA, Qc, Qo
1-1 26k OS" OS2
M74LS91P 0-15 ,120
I -1 19k T
I -1 17k Ro" R02 R=120, R,=17k
0-13 Qc
M74LS92P I -S R,=S.5k, R2=S.5k, R3=S.5k T, R2=17k, R3=9k
I -S R,=5.Sk, R2=5.Sk, R3=4.4k T2 0-15 120 QA, QB, Qo
I -1 17k ROb R02 0-15 120 QA,QO
R,=S.5k, R2=S.5k R=120, R,=17k
M74LS93P
I -S
R3=S.5k
11 R2=17k, R3=9k
QB
0-13
R,=13k, R2=13k R.=120, R,=10k
I -S T2 Qc
R3=9k R2=1 Ok, R3=9k
I -1 17k TR, TL
M74LS95BP 1-1 9k M/C 0-15 120
1 -1 20k Os, 00-03
Note: All resistances given are typical values.
• MITSUBISHI
.... ELECTRIC 2-1
MITSUBISHI LSTTLs

Type designation
Fig. R (Q) Pin Fig. R (equivalent resistance) .n
1-1 26k Os
M74LS96P 1-1 18k Ro, T, 500-504 0-15 120
1-1 3.4k LOAO
1-1 26k J, K
M74LS107AP 1-1 9k T 0-14 120

1-3 9k Ro
1-3 Bk SO, RO
M74LS109AP 1-4 lBk T 0-14. 120
1-5 31k J, K
1-1 24k J, K
M74LSl12AP 1-1 9k T 0-14 120

1-3 9k So, Ro
1-1 24k J,K
M74LSl13AP 1-1 9k T 0-14 120

1-3 9k So
1-1 24k J,K
1-1 4.Bk T
M74LSl14AP 0-14 120
I -3 I 9k So
1-3 4.5k Ro
M74LS122P 1-1 17k All inputs 0-1 120
M74LS123P 1-1 17k All inputs 0-1 120
1-9 15k 00-.03
M74LS137P 0-5 120
1-1 20k E" E2. EL.
1-9 10k 00-03 0-5 120
M74LS138P
1-1 20k EIo E2, E3 0-5 120
M74LS139P 1-1 17k All inputs 0-1 120
M74LS145P 1-1 17k All inputs 0-6 -

M74LS147P 1-' 17k All inputs 0-5 120
1-1 17k 00, E

M74LS148P 0-5 120
I -1 9k 01- 0 7
M74LS151P 1-1 17k All inputs , 0-1 120
M74LS153P 1-1 17k All inputs 0-1 120
M74LS155P 1-1 17k All inputs 0-1 120
1\I174LS156P 1-1 17k All inputs 0-7 -

1-1 17k 100-400,101-401
M74LS157P 0-1 120
1-1 8.5k SA, G
1-1 17k 100-400, 101- 40 1
M74LS158P 0-1 120
1-1 8.5k 'SA, G
1-1 20k OA-OO, T, Ep, Ro
M74LS160AP 0-15 120
1-1 9k ET, LOAO
1-1 20k OA-OO, T, Ep, Ro
M74LS161AP 0-15 120
1-1 9k ET, LOAO
1-1 20k OA-OO, T, Ep
M74LS162AP 0-15 120
I -1 9k ET, R, LOAO
I -1 20 k OA-OO, T, Ep
M74LS163AP 0-15 120
1-1 9k ET, R, LOAO
.• MITSUBISHI
2-2 .... ELECTRIC
MITSUBISHI LSTTLs

Type designation
Fig. R (Q) Pin Fig. R (equivalent resistance) n.
M74LS164P 1 -1 20k All inputs 0-15 120
1 -9 9k T, T'NH, LOAD
M74LS165AP 1 -1 18k 00- 0 7 0-8 120
1 -1 22k Os
1 -9 9k Ro, LOAD, T, T'NH
0-8 120
1 -1 18k 00- 0 7
M74LS166AP
1-9 12k LOAD
0-8 120
I -1 22k Os
1 -1 8.5k ER, Ew
M74LS170P 0-2 -
1 -1 17k 00-03, RA, Rs, WA, Ws
M74LS173AP 1 -1 19k All inputs 0-9 100
1 -1 17k T, RO
M74LSl74P 0-15 120
1 -1 30k Do-Os
1 -1 17k T, Ro
M74LS175P 0-15 120
1 -1 30k 00- 0 3
1 -1 5.7k E
M74LS190P 0-15 120
1 -1 17k All inputs except E
1 -1 5.7k E
M74LS191P 0-15 120
1 -1 17k All inputs except E
1 -1 23k OA-OO
M74LS192P 0-15 120
1 -1 17k Tu, To, Ro, LOAD
1 -1 23k OA-OO
M74LS193P 0-15 120
1 -1 17k Tu, To, Ro, LOAD
1 -1 25k OSR, OSL, 00-03
M74LS194AP 0-15 120
1 -1 17k T, Ro, MIG" M/G2
1 -1 20k J, K, 00-03, MIG
M74LS195AP 0-15 120
1 -1 17k T, Ro
1 -1 17k OA-OO, LOAD
1 -1 8.5k Ro
M74LS196P 0-15 120
1 -8 R, =5. 7k, R2=6.5k, R3=7k T,
1 -8 R,=5.7k, R2=5.7k, R3=5.7k T2
1 -1 17k OA-DO, LOAD
1 -1 8.5k Ro
M74LS197P 0-15 120
1 -8 R,=5.7k, R2=6.5k, R3=7k T,
1 -8 R, = 14k, R2=13k, R3= 13k T2
1 -1' 24k A
R,=45k, R2=24k, R3=9.5k

1 -11 B
M74LS221P R4=14k,Rs=1.7k 0-1 120
R,=12k, R2=9.5k
1 -10 Ro
- R3=14k, R4=1.7k
1 -1 25k DA-DO
0-2 -
M74LS247P 1 -1 20k LT, RBI'
1 -2 R'N=10k BI/RBO l.
1 -2 ROUT=20k. I BI/RBO
1 -1 25k DA-DO
0-3 2k
M74LS248P 1 -1 20 k LT, RBI
1 -2 R'N=10k BIjRBO 1-2 ROUT=20k I BI/RBO
• MITSUBISHI
.... ELECTRIC 2-3
MITSUBISHI LSTTLs

Type designation
Fig. R (Q) Pin Fig. R (equivalent resistance) n
M74LS251P I -1 17k All inputs 0-11 100
I -1 19k SA, Ss, 1OC, 20C 0-4 100

M74LS253P
I -1 17k 100-lOJ, 2Oo-20J 0-12 100
I -1 17k SA, Ss, 10,20, R

M74LS256P 0-16 120
1-9 9.5k M/C
I -1 8.5k SA
M74LS257AP 0-9 100
I -1 17k ~C, 100-400, 10,-40,
I -1 8.5k SA
M74LS258AP 0-9 100
1-1 17k ~C, 100-400, 10,-40,
I -1 17k SA-SO, 0, R
M74LS259P 0-16 120
1'9 9.5k M/C
I -1 17k T, Ro
M74LS273P 0-15 120
1-5 28k 10-80
M74LS280P 1-1 20 k All inputs 0-1 120

I -1 18k Co
M74LS283P 0-1 120
I -1 9k A,-A., 8,-8.
1-1 17k 50(9)', SO(9)Z Ro" Roz R=120, R,=17k
0-13 Qs
M74LS290P 1-8 R, =8.5k, Rz=8.5k, RJ=8.5k T, Rz=17k, RJ=9k
1-8 R, =5.8k, Rz=5.8k, RJ=4.4k Tz 0-15 120 QA,QO, Qo
1-1 17k Ro" Roz 0-15 120 QA, Qo
R,=8.5k, Rz=8.5k R=120, R,=17k
I -8 11 Qs
M74LS293P RJ=8.5k Rz= 17k, RJ= 9k
0-13
R,=13k, Rz=13k R=120, R,=10k
I -8 T2 Qo
RJ=9k Rz=10k, RJ=9k
I -1 18k T
I '1 20k ~C, M/C
M74LS2958P 0-9 100
1-5 30k Os
1-5 20k ~O-OJ ,
I -1 17k T
M74LS298P 0-15 120
1-1 20 k SA, 100-400,10,-40,
t
I -1 10k M/C" M/Cz
0-9 100 QO-Q7
M74LS299P 1-1 20k OC" OCz, Ro, T
1-5 20k OSR, OSL, 00- 07 0-1 120 Qo, Q7
I -1 10k M/C" M/Cz
0-9 100 QO-Q7
M74LS323P 1-1 20 k OC" OCz, Ro, T
1-5 20k OSR, OSL, 00- 07 0-1 120 Qo, Q7

r -1 19k SA, SS, lG, 2G
M74LS352P 0-1 120
I -1 17k 100-10J, 2Oo-20J
I -1 19k SA, Ss, 10C, 20C
M74LS353P 0-12 100
1-1 17k 100-lOJ, 2Oo-20J
I -1 17k 10-80
M74LS373P 0-9 100
I -9 9 k. E,OC
I -1 30k 10-80
M74LS374P 0-9 100
1-9 9k T,OC
• MITSUBISHI
2-4 .... ELECTRIC
MITSUBISHI LSTTLs

Type designation
Fig. R ( Q) Pin Fig. R (equivalent resistance) n
1 -1 18k 10-40
M74LS375P 0-15 120
1 -1 4.5k 1-2E, 3-4E
1 -1 17k T,E
M74LS377P 0-15 120
1 -5 28k 10-80
1 -1 17k Ro
M74LS390 1 -8 R, =14k, R2=14k, R3=14k T, 0-1 ( 120
1 -8 R,=8.5k, R2=8.5k, R3=8k T2
1 -1 17k Ro
M74LS393P 0-17 120
1 -8 R,=14k,R2=14k,R3=14k T
I -1 18k T
I -1 20k OG,MfG,Ro 0-9 100 QO-Q3
M74LS395AP
1 -5 30k Os
1-5 20k 00- 0 3 0-17 120 Q3
M74LS423P 1 -1 17k All inputs 0-1 120
I -1 17k 50(9), RO
M74LS490P 0-17 120
I -8 Rl=14k, R2=14k, R3=14k T
1-1 19k Os 0-9 QO-Q7
M74LS595P
1 -9 13k 'to)1t!l 0-8 Q7'
1-1 19k Os 0-2 QO-Q7

M74LS596P
I -9 13k 'to)1t!l 0-8 Q7'
I -1 8.5k LOAD
0-15 120 QA,QB Qc,Qo
M74LS668P 1 -1 17k UfO, T, Ep, ET
1-5 20k OA-OO 0-1 120 RGO
I -1 8.5k LOAD
0-15 120 QA,QB,QC,QO
M74LS669P I -1 17k UfO, T, Ep, ET
I -5 20k OA-OO 0-1 120 RGO
1 -1 8.5k Ew
M74LS670P I -7 R,=8.5k, Rz= 17k OG 0-10 120

I -1 17k RA, RB, WA, WB, 00-03
1 ·9 14k PO-P7
M74LS6B2P 0-5 100
1 - 12 R,= 14k, Rz=24k QO-Q7
1 -9 14k PO-P7
M74LS6B3P 0-7 --
1 - 12 R,= 14k. Rz=24k QO-Q7
M74LS6B4P I -9 14k ~A.:t:J 0-5 100
M74LS6B5P I -9 14k ~A.:t:J 0-7 --
M74LS68BP 1 -9 14k ~A.:t:J 0-5 100
M74LS689P 1·-9 14k ~A.:t:J 0-7 -
• MITSUBISHI
...... ELECTRIC 2-5
MITSUBISHI LSTTLs
SCHEMATICS OF INPUTS AND OUTPUTS·
Schematics of inputs
1-1 1-2 1-3
Vee0-~----~----~ Vee
INPUT 0--<H4I-+-T-
INPUT C>-1--:!<11H-
INPUT
Bi / RBO 0 - - - - - - '
OUTPUT
1-4 1 -5 1-6
Vee0--1r--
Vee 0-----+-
I NPUT Q-r-:14t--+~
INPUT
1 -7 1 -8 1-9
Vee 0--<--_---
I NPUTQ-I-T*-+-
INPUT
1 -10 1 -II
Vee0-~--~---r-- Vcc0-_----------------~~----~
I NPUT ~--rlf4--~-
INPUTO-t-l<.-.>--l
• MITSUBISHI
2-6 .... ELECTRIC
MITSUBISHI LSTTLs
Schematics of outputs
0-1 0-2 0-3
Vee
~---oVee -"---t--OVee
OUTPUT
'--M~--o OUTPUT OUTPUT
0-4 0-5 0-6

_ - - 0 Vee
~--oVee
R -,..---QVee
H~r---o OUTPUT
L.IIJ\\-I~~----O OUTPUT
'--M1r-<I~-o 0 UTP UT
0-8 0-9
Vee ~~--~--oVee
-.-----0 vee
OUTPUT OUTPUT
0-10 0-11 0-12

---,-,..-----?---Q Vee 4r~---~-OVee
~-~---~r----oVcc
OUTPUT
OUTPUT OUTPUT
• MITSUBISHI
.... ELECTRIC 2-7
MITSUBISHI LSTTLs
0-13 0-14
--~----~---OVcc
FEEDBACK OF
SLAVE FLIP-FLOP
FEEDBACK OF
SLAVE RIP-FLOP
OUTPUT
0-15 0-16 0-17
--~--~~---OVcc ~------~~--OVcc
R
FEEDBACK OF FEEDBACK
SLAVE FLIP-FLOP OF SLAVE·
FLIP-FLOP
OUTPUT OUTPUT
FEEDBACK
OF SLAVE
FLIP-FLOP
.• MITSUBISHI
2-8 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSOOP
QUADRUPLE 2-INPUT POSITIVE NAND GATES
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M74LSOOP is semiconductor integrated circuit contain-
ing four dual-input positive-logic NAND gates, usable as
negative-logic NOR gates.
FEATURES 1A -+ 1 Vee
INPUTS {
• High breakdown input voltage (VI ~ 15V) 1B -+ 2 <- 4A }
• Low power dissipation (Pd = BmW typical) INPUTS
OUTPUT 1 Y <- <- 4B
• High speed (tpd = 6ns typical)
• Low output impedance 2A OUTPUT
INPUTS {
• Wide operating temperature range (Ta = -20 ~ +75°C) 2B <- 3A} INPUTS
<- 3B
APPLICATIONS OUTPUT 2Y
General purpose, for use in industrial and consumer GND OUTPUT

equipment.
FUNCTIONAL DESCRIPTION
The use of Schottky TTL technology enables the achieve- Outline 14P4
ment of input high breakdown voltage, high speed, and low
power consumption as well as high fan-out. CI RCU I T SCH EMAr-T'--'I---"Cr---_ _--,-_-oVee
When both A and B inputs are high the output Y is low. (EACH GATE)
20k 7.6k 120
When either A or B input is low the output Y is high.
FUNCTION TABLE LJv'v'r--+--QY OUTPUT

INPUTS { : O--+-rl4--'
A B Y
L L H
r----H L H
L H H
H H L
L-~----_~_-+ _ _DGND
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C, unlessotherwisenoted)
Symbol Parameter Conditions Limits Unit
Vee Su pply, voltage -0.5- +7 V

VI Input voltage -0.5-+15 V
Vo Output voltage High-level state -0.5- Vee V
Topr Operating free-air ambient temperature range -20- +75 'C
Tstg Storage temperature range -65- + 150 'C
• MITSUBISHI
"'ELECTRIC 2-9
MITSUBISHI LSTTLs
M74LSOOP
QUADRUPLE 2·INPUT POSITIVE NAND GATES
RECOMMENDED OPE'RATING CONDITIONS(Ta= -20- +7S·C •• unles.otherwisenoted)

Limits
Symbol Parameter Unit
Min Typ Max
Vee Supply voltage 4.75 5 5.25 V
IOH High-level output current VOH"'2.7V 0 -400 /-lA
VOL:;;0.4V 0 4 rnA
IOL Low-level output current
VOL:;; 0 .sv 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7s'C, unlessothe";"isenoted)
Limits
Symbol Parameter Test conditions Unit
Min Typ* Max
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
Vie I nput clamp voltage Vee=4.7sV,lle=-18mA 1.5 V
VOH High·level output voltage Veo-4.7sV, VI=O.BV, IOH=.-400"A '2.7 3.4 V
VOL Low-level output voltage

VOO=4.7sV I IOL=4rnA 0.25 0.4 V
VI=2V I IOL=8rnA 0.35 0.5 V
Voo=s.2sV, VI=2.7V 20 /-lA
IIH High·level input current
VOO=s.2sV, VI=10V 0.1 rnA
IlL Low-level Input current VOO=s.2sV, VI=0.4V -0.4 rnA
los Short·circuitoutput current (Note 1) VOO=s.2sV, VO=OV -20 -100 rnA
IOOH Supply current, all outputs high VOO=s .2sy. VI=OV 0.8 1.6 rnA
*
IOOL Supply current, all outputs low
: All tYPical value. are at Vee = 5V, Ta = 25 C.

. Veo=s.2sV. VI=4.5V 2.4 4.4 rnA
Note 1: All measurements should be done quickly. and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (VOo=sv, Ta=2s'C, unles.otherwisenotedi
Limits
Min Typ Max
tpLH Law-to-high·level output propagation time CL=lspF 6 15 ns
t pHL High-tol--Iow-Ievel output propagation time (Note 2) 6 15 ns
Note 2: Measurement ~ircuit TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee OUTPUT
A, B
PG OUT
y
sOQ
(1) The pulse generator (PG) has the following characteristics:

PRR = lMHz, tr = 6n., tf = 6n., tw =SOOn.,
Vp = 3Vp.p, Zo = son
(2) CL includes probe and jig capacitance.
• MITSUBISHI
2-10 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS02P
QUADRUPLE 2-INPUT POSITIVE NOR GATES
DESCRIPTION PIN CONFIGURATION (TOP VIEW)

The M74LS02P is a semiconductor integrated circuit
containing 4 dual-input positive NOR and negative NAND
gates.
OUTPUT 1Y- 1 Vee

FEATURES
• High breakdown input voltage (VI ~ 15V) 11A -+ 2 OUTPUT
• Low power dissipation (Pd = 10mW typical)

It:JPUTS I 1B -+ - 4A I INPUTS
• Low output impedance
OUTPUT 11 - 4B I
• Wide operating temperature range (Ta = -20 ~ +75°C) { 2A -+ 5
OUTPUT
INPUTS
2B -+
9 - 3A }
APPLICATION INPUTS
GND -3B
General purpose, for use in industrial and consumer
equipment.
The use of Schottky TTL technology, enables the achieve- Outline 14P4
ment of high input voltage, high speed, low power dissipa-
tion, and high fan-out. CI RCUIT SCHEMrA~T~IC4---'-_'---'---o
(EACH GATE) Vee
When at least input A or input B is high, output Y is low, 20k
and when both A and B are low, Y is high.
FUNCTION TABLE
UVVV-+---n Y
A B Y INPUTS{ : 0---+-rl<Il----+-' OUTPUT
L L H '-----+---.---j
H L L
L H L
H H L
~~--------------k-~---oGND
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C, unless otherwise noted)
Vee Supply voltage -0.5- +7 V
VI Input voltage -0.5- +15 V
Tstg Storage temperature range -65-+ 150 'C
• MITSUBISHI
;"ELECTRIC 2-11
MITSUBISHI LSTTLs
M74LS02P
QUADRUPLE 2-INPUT POSITIVE NOR GATES
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75'C. unlessotherwisenoted)
Limits
Min Typ Max
VCC Supply vo~tage 4 75 5 5.25 V
10H High·level output current VOH~2.7V 0 -400 f./ A

VOL";0.4V .0 4 mA
10L Low-level output current
VOL"; 0 .5V 0 B mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'C. unless otherwise noted)
Limits
Min Typ* Max
VIL Low-level input voltage O. B V
VIC Input clamp voltage Vcc=4.75V. IIC= -lBmA -1.5 V
VOH High-level output voltage Vcc=4.75V. VI=O.BV. IOH=-400f./A 2.7 3.4 V

VCC=4.75V I 10L= 4mA 0.25 0.4 V
VI=2V I I OL= BmA 0.35 0.5 V
VoC=5.25V. VI=2.7V 20 f./ A
IIH High-level input current,
VCO=5.25V. VI=10V 0.1 mA
IlL Low-level input current VCC=5.25V. VI=0.4V .,-0.4 mA
los Short-circuit output current (Note 1) Voc=5.25V. Vo=OV -20 -100 mA
lOCH Supply current, all outputs high VcC=5.25V. VI=OV 1.6 3.2 rnA
ICCL Supply current, all outputs low Vco-5.25V. VI- 4.5V 2.B 5.4 rnA
* : All typical values are at Vee = 5V, Ta = 25 C, Q
Note 1: All measurements should be done quickly, and not mare than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25'C. unless otherwise noted)
Limits
Typ
Min I Max
tpLH Low-to-high-Ievel output propagation' time CL=15pF 6 I 15 ns
tpHL High-to-Iow-Ievel output propagation time (Note 2) 6 I 15 ns
Note 2: Measurement ~ircuit TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee OUTPUT
A. B
PG OUT
son y

PRR = 1MHz, tr = 6ns, tf = 6ns, tw = 500n5,
Vp "3Vp.p. Zo "50n
• MITSUBISHI
2-12 ~ELECTRIC
MITSUBISHI LSTTLs
M74LS03P
QUADRUPLE 2·INPUT POSITIVE NAND GATE
WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
containing four dual-input positive-logic NAND gates with
open collector outputs, usable as negative-logic NOR gates_
FEATURES 11A --+ 1 Vee

INPUTS I
• Usable in AND-Tie connection 18--+ 13 +- 4A)
• High breakdown input voltage (VI ~ 15V) INPUTS
OUTPUT 1 Y +- 3 +- 48
• High breakdown output voltage (Va ~ 7V)
•
•
Low power dissipation (Pd = BmW typical)
High speed (tpd = 10ns typical)
INPUTS j 2A--+ 4
28--+
• Wide operating temperature range (Ta = -20 ~ +75°C)
APPLICATION GND
equipment.
* : OPEN COLLECTOR OUTPUT
FUNCTIONAL DESCRIPTION Outline 14P4

With use of open collector outputs and SBD inputs
featuring a high breakdown voltage, the high-level output CIRCUIT SCHEMATIC (EACH GATE)
impedance can be selected freely by use of an external load
,---~------{)vee
resistor. This permits wire-AND connection which has been
impossible with conventional gates.
When inputs A and B are high, output Y is low and when
one or both inputs are low, the output Y is high.
FUNCTION TABLE
A B Y
L L H
H L H
~-------~-~--oGND
L H H
H H L UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C. unless otherwise noted)
Symbol Parameter Conditions limits Unit

Va Output voltage High-level state -0.5- +7 V
Topr Operating free-air ambient temperature range -20-+75 'C
TSIg Storage temperature range -65- + 150 'C
• MITSUBISHI
;"ELECTRIC 2-13
MITSUBISHI LSTTLs
M74LS03P
QUADRUPLE 2-INPUT POSITIVE NAND GATE
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75'C. unless otherwise noted)
Limits
Min Typ Max
VCC Supply voltage 4.75 5 5.25 V
iOH High-level output current Vo =5.5V 0 100 f.1A
VOL';; 0 .4V 0 4 mA
iOL Low-level output current
VOL';; 0 .5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75'C. unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage Vco-4.75V. ilc=-18mA -1.5 V
VCO=4. 75V • VI=O :8V
iOH High-level output current 100 f.1A
Vo=5.5V

Vcc=4.75V I IOL=4mA 0.25 0.4 V
VI=2V I IOL=8mA 0.35 0.5 V
Vec=5.25V, VI=2.7V 20 f.1A
ilH High-lev~1 input current
Vce-5.25V. VI-l0V 0.1 mA
ilL Low-level input current Vec-5 ,25V. VI-O ,4V -0,4 mA
ICCH Supply current, all inputs high Vec-5.25V. VI=OV 0.8 1.6 mA
ICOL Supply current, all outputs low Voe=5 ,25V, VI=4 ,5V . 2,4 4.4 mA
* : All typical values are at VCC=5V. Ta=25~C
SWITCHING CHARACTERISTICS (Voc=5V, Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-level/high-to-low-leveJ RL - 2 kQ 10 32 ns
output propagation time
tPHL CL=15pF INote 1) 10 28 ns
Note 1: Measurement circuit

TIMING DIAGRAM (Reference level = 1.3V)
I INPUT Veo Vee OUTPUT
A. B
OUT

PRR = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp =3Vp_p, Zo =50n
• MITSUBISHI
2-14 "ELECTRIC
MITSUBISHI LSTTLs
M74LS04P
HEX INVERTERS
DESCRIPTION
containing 6 inverter circuits.
FEATURES
• High breakdown input voltage (V I :;;; 15V) INPUT 1A Vee
• Low power dissipation (Pd = 12mW typical) OUTPUT 1Y - 6A INPUT

INPUT 2A -> 6Y OUTPUT
• Wide operating temperature range (Ta = -20 - +75°C) OUTPUT 2Y· INPUT
INPUT 3A -> 5Y OUTPUT

APPLICATION
OUTPUT 3Y INPUT
equipment. GND -> 4 Y OUTPUT
The use of Schottky TTL technology enables the achieve-
ment of high input voltage, high speed, low power dissipa. Outline 14P4
tion and high fan·out.
When input A is high, output Y is low, and when A is low, CIRCU IT SCH EMA'-'CT--=--IC=,-_ _---.-_-o
(EACH'--- Vee
Y is high. INVERTER) 20k 7.6k 120
FUNCTION TABLE
INPUT A0----,---:t<It-------,
A y
'--'VIrv--t--UY OUTPUT
L H
H L
L------~--~-DGND
UNIT: Q
ABSOLUTE MAXIMUM RATINGS(Ta=~20-+75·c, unless otherwise noted)

Vee Supply voltage ~0.5-+7 V

VI Input voltage ~0.5-+15 V
Vo Output voltage High-level state ~0.5-VOO V
Topr Operating free-air ambient temperature range ~20-+75 ·C
TSlg Storage temperature range -65- +150 ·C
• MITSUBISHI
"ELECTRIC 2-15
MITSUBISHI LSTTLs
M74LS04P
HEX INVERTERS
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +7S·C. unlessotherwi,enoted)
Limits
Min Typ Max
Voe Supply voltage 4.75 5 5.25 V

10H High-level o~tput current VOH~2. 7V -400
VOL"'0.4V
°
'0 4
"A
rnA
8 rnA
VOL"'O.SV
°
ELECTRICAL CHARACTERISTICS (Ta= -20- +7S·C. unless otherwise noted)
Limits
Symbol Parameter Test con~itions Unit
Min Typ* Max
-

Vie Input clamp voltage VOO=4.7SV. 110= -18rnA -1.5 V
VOH High·level output voltage VOO=4.7SV. VI=0.8V. IOH=-400"A 2.7 3.4 V

Voe=4.7SV I IOL=4rnA 0.25 0.4 .V
Veo-S.25V. VI-2.7V 20 "A
IIH High-level input current
VOO=S.2SV. VI=10V 0.1 rnA
IlL Low-level input current Voo=S.2SV. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 1) VOO-S.2SV. VO-OV -20 100 rnA
100H Supply current, all outputs high VOO-S.2SV. VI-OV 1.2 2.4 rnA
100L Supply current, all outputs low Veo-S.2SV. VI-4.SV 3.6 6.6 rnA
* • All typical values are at Vee -- 5V, Ta = 250 C.
SWITCHING CHARACTERISTICS (VOo=SV. Ta=2S·C. unless otherwise noted)
Limits
Min Typ Max
tpLH High-to-!ow-Ievel output propagation time CL=lSpF 6 15 ns
tpHL LOW-lo-high-ievei output propagation time (Note 21 6 15 ns

INPUT Vee OUTPUT
PG DUT
A
son
y

PRR = 1MHz, tr = 6n,. tf = 6ns, tw =500n"
Vp = 3Vp_p, Za = 50n
• MITSUBISHI
2-16 "'ELECTRIC
MITSUBISHI LSTTLs
M74LSOSP
HEX INVERTERS WITH OPEN COLLECTOR OUTPUTS
DESCRIPTION
containing 6 open collector output inverter circuits.
FEATURES
INPUT Vee
• Usable in AND-Tie connection.
• High breakdown input voltage (VI;;; 15V) OUTPUT +- 6A INPUT

INPUT 2 A --+ 6 Y OUTPUT
• Wide operating temperature range (T a = -20 ~ +75°C) OUTPUT 2Y 5A INPUT
INPUT 3A 5 Y OUTPUT
APPLICATION
OUTPUT 3Y <- INPUT
equipment. GND OUTPUT
*: OPEN COLLECTOR OUTPUT
With the use of Schottky barrier diodes for the inputs and
open-collector outputs, the high-level output impedance Outline 14P4
can be selected freely by use of an external load resistor.
This permits wire-AND connection, which has been impos- CIRCUIT SCHEMATIC (EACH INVERTER)
sible with conventional gates.
r - - - - - . - - - - - - - O Vee
When input A is high, output Y is low, and when A is low,
Y is high. 20 k
FUNCTION TABLE
An--~~~~~~ ~--nY
A y
INPUT OUTPUT
L H
H L
L-------~-~~--oGND
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75·C. unless otherwise noted)

Vo Output voltage High~level state -0.5- +7 V
Topr Operating free-air ambient temperature range -20- +75 ·C
Tstg Storage iemperature range -65- + 150 ·C
• MITSUBISHI
..... ELECTRIC 2-17
MITSUBISHI LSTTLs
M74LSOSP
HEX INVERTERS WITH OPEN COLLECTOR OUTPUTS
RECOMMENDED OPE~ATING CONDITIONS (Ta =-20-+75'C. unless otherwise noted)
limits
Min Typ Max
IOH High-level output current Vo =5.SV 0 100 pA
VOL";0.4V 0 4 mA
VOL";0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +7S'C. unless otherwise noted)
Limits
Min Typ* Max
VIH High-level input voltage 2 V.
VIC Input clamp voltage Vee=4. 75V. I re= -18rnA -1.5 V
IOH High-level output current Voe=4.75V. Vr=0.8V. Vo=5.5V 100 pA

Vee=4.75V I IOL=4rnA 0.25 0.4 V
Vr=2V I IOL=8mA 0.35 0.5 V
Veo=5.25V. Vr=2.7V 20 pA
IrH High-level input current
Vee=5.25V. Vr=10V 0.1 rnA
IrL Low-level input current Vec=5.25V. Vr=0.4V -0.4 mA
leeH Supply current, all outputs high Vee=5.25V, VI=OV 1.2 2.4 rnA
leeL Supply current, all outputs low Vee=5.25V, Vr= open 3.6 6.6 mA
* : All typical value. are at Vee = SV, Ta = 2SoC.
SWITCHING CHARACTERISTICS (Vee=SV, Ta=2S'C, unlessotherwi.enoted)
Limits
Min Typ Max
tpLH low-to-high-Ievel output propagation time RL= 2 kQ 10. 32 ns
tPHL High-to-Iow-Ievel output propagation time CL= 15pF (Note 1) 10 28 ns
Note 1: 'Measurement circuit TIMING DIAGRAM (Reference level = 1,3V)
INP.UT Vee Vee OUTPUT
A
PG DUT
500 y
(11 The pulse generator {PGl has the following characteristics:

PRR = lMHz, tr = 6ns, tf = 6n., tw = SOOn.,
Vp = 3Vp.p, Zo =son
{2l CL includes probe and jig capacitance.
• MITSUBISHI
2-18 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS08P
QUADRUPLE 2-INPUT POSITIVE AND GATES
DESCRIPTION
containing 4 dual input-positive AND and negative OR
gates.
IA Vee
FEATURES INPUTS {
IB 4A
• High breakdown input voltage (V I ~ 15V) ) INPUTS
• Low power dissipation (Pd = 17mW typical) OUTPUT IY 4B
INPUTS
OUTPUT
r A
2B
2Y
4Y
3A )
3B
OUTPUT
INPUTS
APPLICATION
GND 3Y OUTPUT
equipment.
The use of Schottky TTL technology, enables the ach ieve- Outline 14P4
ment of high input voltage, high speed, low power dissipa-
tion, and high fan-out. CIRCUIT SCHEMATIC
When both inputs A and B are high, output Y is high, and (EACH GATE) r---~---r-------T---oVee
when either or both of the inputs are low, Y is low. 20k
FUNCTION TABLE
LAlVv-+---OY
A B Y OUTPUT
L L L
H L L
L H L
H H H
~~----~-------+----~--oGND
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, unless otherwise noted)
Vee Supply voltage -0.5-+7 V

Vo Output voltage High·level state -0.5- + Vee V
Tstg Storage temperature range -65- +150 'C
• MITSUBISHI
..... ELECTRIC 2-19
MIT SUB ISH I LSTTLs
M74LS08P
QUADRUPLE 2-INPUT POSITIVE AND GATES
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75"C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply volt'age 4.75 5 5.25 V
10H High·level output current VOH«2.7V 0 -400 J,LA
VOL"'0.4V 0 4 rnA
VOL'" 0 .5V 0 8 rnA
E LECTR I CAL CHARACTER ISTICS (T a = - 20- + 7S"C, unless otherwise noted)
Limits
Min Typ* Max
VIC Input clamp voltage Vee-4.7SV,lle--18mA 1.5 V
VOH High·level output voltage Vee-4.7SV, VI-2V, 10H= -400J,LA 2.7 3.4 V

Vee- 4 .75V I IOL·-4rnA 0.25 0.4 V
VI=0.8V I IOL=8rnA 0.35 0.5 V
VCC=S.2SV, VI=2.7V 20 J,LA
VCC=S.2SV, VI=10V 0.1 rnA
IlL Low-level input current VcC=S.25V, VI=0.4V -0.4 rnA
los Short-circuit output current (Note 1 J Vcc=S.2SV, Vo=OV -20 -100 rnA
ICCH Supply current, all outputs high Vce-S.2SV, VI-4.5V 2.4 4.8 rnA
leeL Supply current, all outputs low Vee-S.2SV. VI-OV 4.4 8.8 rnA
*. All tYPical values are at Vee = 5V, Ta = 25°C,
Note 1: All measurement should be done quickly. and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Vee=5V, Ta=2S"C, unless otherwise noted)
limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time CL-15pF 9 15 ns
tpHL High-to-Iow-Ievel output propagation time (Note 2) 10 20 ns
Note 2: Measurement circuit TIMING DIAGRAM (Reference level = 1.3V)
INPUT Vee· OUTPUT
A, B
PG DUT
50Q y

PRR = 1 MHz, tr = 6ns, tf '= 6ns, tw::: 500ns,
Vp ~ 3Vp.p. Zo ~ 50n
• MITSUBISHI
2-20 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS09P
QUADRUPLE 2-INPUT POSITIVE AND GATES WITH OPEN COLLECTOR OUTPUTS
DESCRIPTION
containing 4 dual-input positive AND and negative OR
gates with open collector output.
FEATURES INPUTS j 1A vee
16
• Usable in wire-AND connection 4A }
INPUTS
• High breakdown input voltage (V I ~ 15V) OUTPUT 1Y 46
• High breakdown output voltage (Vo ~ 7V)
2A 4Y OUTPUT
• Low power consumption (P d = 17mW typical) INPUTS {
• High speed (tpd = 13ns typical) 26
3A }
INPUTS
• Wide operating temperature range (T a = -20 ~ +75° C) OUTPUT 2Y 36
APPLICATION GND 3Y OUTPUT

equipment.
*: OPEN COLLECTOR OUTPUT

With the use of open collector output, the high-level output
impedance can be freely selected by means of an external CIRCUIT SCHEMATIC
load resistor. This enables use in wire-AND, which has been (EACH GATE) ~--T---~-----------DV~
impossible with conventional gates. 20k 11k 7.6k
When both inputs A and B are high, output Y is high and
when either or both of them are low, Y is low.
FUNCTION TABLE Y
y OUTPUT
A B
L L L
H L L
L H L
~------~~------~--~---OGND
H H H
UNIT: Q
Vee Supply voltage -0.5-+7" V

VI In put vo Itage -0.5-+15 V
Vo Output voltage High·level state -0.5 +7 V
Topr Operating free.air ambient temperature range -20-+75 ·C
Tstg Storage temperature range -"65- + 150 ·C
.MITSUBISHI
..... ELECTRIC 2-21
MITSUBISHI LSTTLs
M74LS09P
QUADRUPLE 2·INPUT POSITIVE AND GATES WITH OPEN COLLECTOR OUTPUTS
RECOMMENDED OPERATING CONDITIONS (Ta =-20- +75'C, unless otherwise noted)
Limits
Min Typ Max
VOO Supply voltage 4.75 5 5.25 V
IOH High-level output current Vo =5.5V 0 100 J-IA
VOL"'0.4V 0 4 rnA
VOL'" 0 .5V 0 8 rnA
Limits
Min Typ* Max

VIO Input clamp voltage Voo=4.75V.IIO=-18rnA -1.5 V
IOH High-level output current VOO=4.75V. VI=2V. VO=5.SV 100 J-IA

VCC=4.7SV I IOL =4rnA 0.25 0.4 V
VI=0.8V I IOL=8mA 0.35 0.5 V
VcC=S.25V. VI=2.7V 20 J-IA
Vcc=S.2SV. VI=10V 0.1 rnA
IlL Low-level input current VOO=S.2SV. VI=0.4V -0.4 rnA
IOOH Supply current, all outputs high ~ VOO=S.2SV. VI=OV 2.4 4.8 rnA
IOOL Supply current, all outputs low Voo=S.25V. VI=4.5V 4.4 8.8 rnA
* : All typical values are at Vee = 5V, Ta = 25 C. Q
SWITCHING CHARACTERISTICS (Voc=5V. Ta=2S'C. unlessotherwisenoted)
Limits
Min Typ Max
tpLH High-to-Iow-Ievel output propagation time RL = 2 kQ 15 35 ns
tpHL Low-to-high-Ievel output propagation time CL =ISpF (Note 1) 10 35 ns
Note 1: Measurement circuit TIMING DIAGRAM (Reference level = 1,3V)
INPUT Vee Vee OUTPUT
A. B
PG DUT
SOQ y

Vp = 3Vp.p. Zo = son
• MITSUBISHI
2-22 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS10P
TRIPLE 3-INPUT POSITIVE NAND GATES
DESCRIPTION
containing three triple-input positive NAND and negative
NOR gates_
FEATURES Vee
INPUTS {
• High breakdown input voltage (VI ~ 15V! -- lA INPUT
• Low power dissipation (Pd = BmW typical!
2A ~ lY OUTPUT
• High speed (tpd = 6ns typical!
•
•
Low output impedance
Wide operating temperature range (Ta = -20 - +75°C!
APPLICATION
' '"'" 1
OUTPUT
28
2C -"j
__ 38
+- 3C
INPUTS
equipment_
The use Schottky TTL technology has enabled the Outline 14P4
achievement of high input voltage, high speed, low power
dissipation and high fan-out_ CI RCUIT SCH EMAT.;..~IC'--,--_ _~---o
(EACH GATE) , Vee
When all inputs A, Band C are high, output Y is low, and
when one or more of the inputs is low, Y is high_
A o-.---liJIH
INPUTS 8o-+-~----j;~---j
FUNCTION TABLE '--'V'.fv--+---{) Y OUTPUT
A N y
L L H
H L H
L H H
H H L
~~~-----~-~--0GND
N=B-C
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=~20-+75·C. unless otherwise noted)
Vee Supply voltage ~O.5-+7 V

VI Input voltage ~O.5-+15 V
Va Output voltage High-level state ~O.5- +Vce V
Topr Operating free-air ambient temperature range ~20- +75 ·C
Tstg $torage temperature range ~65-+150 ·C
• MITSUBISHI
.... ELECTRIC 2-23
MITSUBISHI LSTTLs
M74LS10P
TRIPLE 3·INPUT POSITIVE NAND GATES
RECOMMENDED OPERATING CONDITIONS (Ta=~20~+75"C, unleSSOlherwisenoled)
Limits
Min Typ Max
IOH High·level output current VOH;;:'2.7V 0 ~400 J.lA
VOL";0.4V 0 4 mA
VOL"; 0 .5V 0 8 mA
-
ELECTRICAL CHARACTERISTICS (Ta = ~ 20~ + 75'C, unless olherwise noled)
Limits
Min Typ* Max
VIC Input clamp voltage Vee~4.75V, Ile~~18mA 1.5 V
VOH High-level output voltage Vee~4.75V, VI~0.8V, IOH~~400J.lA 2.7 3.4 V

Vee=4.75V I IOL~4mA 0.25 0.4 V
VI=2V I 10L= SmA 0.35 0.5 V
Vee~5.25V, VI-c-2.7V 20 J.lA
Veo=5.25V, VI=10V 0.1 mA
IlL Low-level input current VOO=5.25V, VI=0.4V ~0,4 mA
los Short-circuit output current (N'ote 1) VOO=5.25V, VO=OV ~20 ~100 mA
IOOH Supply current, all outputs high Voo~5.25V, VI~OV 0.6 1.2 mA
IOOL Supply current, all outputs low Voo=5.25V, VI~4.5V 1.8 3.3 mA
* : All tYPical values are at Vee = 5V, Ta::: 25°C.
SWITCHING CHARACTERISTICS (Voo=5V, Ta=25"C, unlessolherwisenoled)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time CL=15pF 6 15 ns
tpHL High-to-Iow-Ievel output propagation time (Nole 21 9 15 ns

INPUT Vee OUTPUT
PG DUT
50Q
y
(1) The pulse generator (PGl has the foJlowing characteristics:

PRR = lMHz, Ir = 6ns, If = 6ns, Iw = 500ns,
Vp =3Vp.p, Zo =50n
• MITSUBISHI
2-24 I.. ELECTRIC
MITSUBISHI LSTTLs
M74LS11P
TRIPLE 3·INPUT POSITIVE AND GATE
. DESCRIPTION
containing three triple-input positive AND and negative OR
gates.
FEATURES Vee
INPUTS {
• High breakdown input voltage (VI ~ 15V) ~ 1A INPUT
''""~{
-> 1Y OUTPUT
• Wide operating temperature range (Ta = -20 - +75°C) "._"j ~ 3B INPUTS
OUTPUT 9 ~ 30
APPLICATION
equipment.
The use of Schottky TTL technology and active output Outline 14P4
pullups enables the achievement of input high breakdown
voltage, high speed, lower power dissipation and high fan- CIRCUIT SCHEMATIC (EACH GATE)
out. r--r---r----,---oVee
When inputs A, Band C are high, output Y is high and 20k 11k 7.6k 120
when one or more of the inputs is low, Y is low.
FUNCTION TABLE
IN-{:~
PUTS
o o--l--I--t-I4l-'
A N Y
L L L
H L L
L H L
H H ~~---~----+-~--OGND
H
N=B'C UNIT: Q

Vo Output voltage High-level state -O.S-Vee V
Topr Operating free-air ambient temperature range -20-+75 ·C
Tstg Storage temperature range -65- + 150 ·C
• MITSUBISHI
..... ELECTRIC 2-25
MITsUBlsHI LsTTLs
M74LS11P
TRIPLE 3-INPUT POSITIVE AND GATE
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75'C, unless otherwise noted)
Limits
Min Typ Max
Voo Supply voltage 4.75 5 5.25 V
10H High-level output current VOH~2. 7V 0 -400 J1A

VOL»0.4V 0 4 rnA
VOL»O .5V 0 8 rnA
limits
Min Typ * Max
VIO Input clamp voltage VOo=4.75V. 110= -18mA -1.5 V
VOH High-level output voltage VOO=4.75V. VI=2V. IOH=-400J1A 2.7 3.4 V

VoO=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V I IOL=8rnA 0.35 0.5 V
VOO=5.25V. VI=2.7V 20 J1A
Voo=5.25V. VI=10V 0.1 rnA
IlL Low-level input current VOO=5.25V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 1) Voo=5.25V. VO=OV -20 -100 rnA
100H Supply current, all outputs high Voo-5.25V. VI-4.5V 1.8 3.6 rnA
100L Supply current, all outputs low Voo=5.25V. VI= OV 3.3 6.6 rnA
*: Alltyplcalvaluesareat Voo=5V. Ta=25'C.
Note 1: All measurements should be done quickly and not more than ~ne output should be shorted at a time.
SWITCHING CHARACTERISTICS (Voo=5V. Ta=25'C. unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-ta-high output level propagation time OL-15pF 9 15 ns
tpHL High-to-Iow output revel propagation time INote 21 10 20 ns

INPUT Vee OUTPUT
PG DUT
A-O
50n
(1) The purse generator (PG) has the forlowing characteristics:

PRR = lMHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp "3Vp.p. Zo" 5011.
(2) CL indudes probe and jig capacitance.
• MITsUBlsHI
2-26 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS12P
TRIPLE 3-INPUT POSITIVE NAND GATE WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
containing three triple-input positive-logic NAND gates
with open collector outputs, usable as negative-logic NOR
gates_
18 Vee
. INPUTS {
FEATURES 1C .... 1A INPUT
• Usable in wire-AND connection 2A -> 1Y OUTPUT

• High breakdown input voltage (VI £ 15V)
•
•
Low power dissipation (Pd = 6mW typical)
' '"' 1 28
2C
" .- " 1
.... 38 INPUTS
• Wide operating temperature range (T a = -20 - +75°C)
OUTPUT 2Y .... 9 +- 3C

equipment_

With the use of Schottky barrier diodes for the inputs and
open-collector outputs, the high-level output impedance CIRCUIT SCHEMATIC (EACH GATE)
can be selected freely by use of an external load resistor_
This permits wire-AND connection which has been impos-
r-------~---------oVeo
sible with conventional gates_
When inputs A, Band C are high, output Y is low and
when one or more of the inputs is low, the output Y is
high.
r....... ~ y
OUTPUT
FUNCTION TABLE
5k
A N Y
~~-----------------P--+---~GND
L L H
H L H
UNIT: Q
L H H
H H L
N=B-C
ABSOLUTE MAXIMUM RATINGS (Ta=~20~+75·C, unless otherwise noted)
Vee Supply voltage ~0.5~ +7 V

VI I nput voltage -0.5~+15 V
Vo Output voltage High-level state -0.5- +7 V
Topr Operating free-air ambient temperature range ~20~+75 ·C
T5tg Storage temperature range ~65~ +150 ·C
• MITSUBISHI
;"ELECTRIC 2-27
MITSUBISHI LSTTLs
M74LS12P
TRIPLE 3-INPUT POSITIVE NAND GATE WITH OPEN COLLECTOR OUTPUT
RECOMMENDED OPERATING CONDITIONS< Ta =-20- +75'C, unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current Vo =5.5V 0 100 /"A

VOL~0.4V 0 4 mA
VOL~0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS < Ta= -20- + 75'C , unless otherwise noted)
Limits
Min Typ * Max
V,L Low-level input voltage 0.8 V
V'c Input 'Clamp voltage VCC=4.75V,I,o=-18rnA -1.5 V
IOH High-level output current Voo=4.75V, V,=0.8V, VO=5.5V 100 /"A

VOO=4.75V I IOL=4rnA 0.25 0.4 V
V,=2V I IOL=8rnA 0.35 0.5 V
High-level input current

Voo=5.25V, V,=2.7V 20 /"A
I'H
Voo=5.25V, V,=10V 0.1 rnA
I,L Low-level input current Voo=5.25V, V,=0.4V -0.4 rnA
IOOH Supply current, all inputs high VoO=5 .25V. V,=OV 1.4 rnA
0.7
IOOL Supply current, all inputs low VOO-5.25V. V,-4.5V 1.8 3.3 rnA
* . All typical vlaues are at Vee - SV. T a - 25 C
SWITCHING CHARACTERISTICS <Voo=5V, Ta=25'C, unlessotherwisenoted)
Limits
Symbol , Parameter Test conditions
Min Typ Max
Unit
tpLH Low-to-high-levellhigh-to-low level RL=2kQ 10 32 ns

t pHL output propagation time CL=15pF INote) 15 ns
28
Note: Measurement circuit

TIMING DIAGRAM (Reference level = 1,3V)
RL
A-C
OUT
(1) The pulse generator (PGl has the following characteristics:

PRR = lMHz, tr = 6ns. tf = 6ns. tw = 500ns,
Vp = 3Vp.p, Zo = 50n.
12) CL includes probe and jig capacitance.
'MITSUBISHI
2-28 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS13P
DUAL 4-INPUT NAND SCHMITT TRIGGER
DESCRIPTION
containing two 4-input positive-logic NAND gates having a
Schmitt trigger function and negative-logic NOR gates_
lA ~ 1 Vee
FEATURES INPUTS {
1B~
• Suitable for waveform shaping applications
• Wide hysteresis width (O.8V typical) and high noise NC
margin
{
lC~ 4 NC
• High breakdown input voltage (VI £ 15V) INPUTS
(VI ~ 15V, Va ~ 7V) 1D~
+- 2C} INPUTS
• Low power dissipation (P d = 17.5mW typical) +- 20
GND ~ 2Y OUTPUT
• Wide operating temperature range (Ta = -20~+75°C)
APPLICATION
Outline 14P4 NC: NO CONNECTION
equipment.
FUNCTIONAL DESCRIPTION CIRCUIT SCHEMATIC

The use of Schottky TTL technology has enabled the
(EACH SCHMITT TRIGGER)
achievement of input high breakdown voltage, high speed,
low power dissipation and high fan-out. With positive feed-
back applied in the circuit, the hysteresis width is O.8V
CAo---,~--J4-t
(typical)_ Accordingly, the noise margin is high. Even slow
Bo---,h---J4-t
changing input signals result in a shaped waveform output INPUTS Y
without causing oscillation. Co--jH-,--J4-tH OUTPUT
D'o-t--++;~
When inputs A, B, C and D are high, output Y is low,
and when one or more of the inputs are low, Y is high.
Refer to M7 4LS14P for the typical characteristics.
UNIT: Q
FUNCTION TABLE
A I N Y
L L H
H L H
L H H
H H L
N=B'C-D
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75·c. unlessotherwisenoted)

VI I nput voltage -0.5- +15 V
Vo Output voltage High-level state -0.5- Vec V

T51g Storage temperature range -65-+150 ·C
• MITSUBISHI
..... ELECTRIC 2-29
MITSUBISHI LSTTLs
M74LS13P
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75"C. unless otherwise noted)
Limits
Min Typ Max
VOO SuPP,Iv voltage 4.75 5 5.25 V
10H High-level output current VOH;;;'2.7V 0 -400 ,.,A

VOL;;;;0.4V 0 4 mA
VOL;;;;0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75"C. unless otherwise noted)
Limits
Min Typ * Max
VT+ Positive-going threshold voltage VOO=SV '. 1.4 1.6 1.9 V
VT- Negative-going threshold voltage VOO=SV 0.5 0.8 1 V
VT+-VT- Hysteresis width VOO=SV 0.4 0.8 V
VIO I nput clamp voltage Voo=4.75V.llo=-18rnA -1.5 V
VOO=4. 75V , VI=.O .5V
VOH High-level output voltage 2.7 3.4 V
IOH=-400,.,A

VOO=4.75V I IOL=4mA 0.25 0.4 V
VI=1.9V I IOL=8mA 0.35 0.5 V
IT+ I nput current at positive-going threshold VOO=SV. VI=VT+ -0.14 mA
IT- I nput current at negative-going threshold VOO=SV. VI=VT- -0.18 mA
Vcc=5 .25V • VI=2. 7V 20 ,.,A
VOO=5 .25V. VI= 10V 0.1 rnA
IlL Low-level input current" Voo-S.25V, VI-0.4V -0.4 mA
los Short-circuit output current (Note 1) Voo-5.25V, VO-OV -20 -100 mA
lOCH Supply current, all outputs high VOO-,5 .25V, VI-OV 2.9 6. mA
ICCL Supply current, all outputs low VOO=5 .25V, VI=4 .5V 4.1 7 mA
* : Alltypicalvaluesareat VOC=5V. Ta=25"C
Note 1: All measurements should be done quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Voo=5V. Ta=25"C. unlessotherwisenoted)
limits
Min Typ Max
tPLH Low-to-high-Ievel output propagation time 12 22 ns
CL=15pF (Note2)
tpHL High-to-Iow-Ievel output propagation time 20 27 ns

TIMING DIAGRAM
INPUT Veo OUTPUT
PG OUT
y
1.3V
50Q
(1) The pulse generator IPG) has the following characteristics:

PR R = 1MHz, tr = 6ns, tf = 6ns, tw = 5ooris.
Vp =3Vp_p. Zo =50n.
(2) CL includes probe and jig capacitance
• MITSUBISHI
2-30 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS14P
HEX SCHMITT TRIGGER INVERTERS

containing 6 Schmitt trigger inverter circuits.
FEATURES INPUT Vee

• Suitable for waveform shaping applications INPUT
OUTPUT 1 Y <-
• Wide hysterisis width (0.8V typical) and high noise
INPUT 2A-> OUTPUT
margin
• High breakdown input voltage (VI ~ 15V) OUTPUT 2 Y <- INPUT
• Low power dissipation (Pd = 51 mW typical)
INPUT 3A-> OUTPUT
• Wide operating temperature range (Ta = -20 ~ +75°C) OUTPUT 3 Y <- <- 4A INPUT
GND -> 4 Y OUTPUT

. APPLICATION
equipment.

The use Schottly TTL technology has enabled the achieve-
ment of high input voltage, high speed, low power dissipa- CIRCUIT SCHEMATIC (EACH CIRCUIT)
tion, and high fan-out. With positive feedback applied in
the circuit, the hysterisis width is 0.8V (typical). Accord-
ingly, noise margin is high. Even slow changing input signals 17k 11k 6.5k 4k 6.6k 120
result in a shaped waveform output without casing oscilla-
tion.
When input A is high, output Y is low, and when A is low,
YOUTPUT
Y is high. IN PUT A 0--,---;I4-Y
FUNCTION TABLE
A y ~----~----------L----J--~L-oGND
L H
H L UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C. unless otherwise noted)

--- ---.---~---

RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C. unlessotherwisenoted)
Limits
Min Nom Max

High-level output current -400
IOH VOH<::2.7V
° J1A
rnA
VOL"'0.4V
° ° 4
VOL'" .5V
° 8 rnA
• MITSUBISHI
.... ELECTRIC 2-31
MITSUBISHI LSTTLs
M74LS14P
HEX SCHMITT TRIGGER INVERTERS
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C, unless otherwise noted)
Limits
Min Typ* Max
VTt- Positive-going threshold voltage Vcc=5V 1.4 1.6 1.9 V
VT- Negative-going threshold voltage VCC=5V 0.5 O.B 1 V
VT+-VT- Hysteresis VCC=5V 0.4 O.B V
VIC Input clamp voltage VCC=4.75V,I,c=-1BmA -1.5 V
Vcc=4.75V, V,=0.5V
VOH High·level output voltage 2.7 3.4 V
IOH=-400,uA

VCC=4.75V I IOL=4mA 0.25 0.4 V
V,=1.9V I 10L=BmA 0.35 0.5 V
ITI Input current at positive-going threshold Vcc=5V. V,=VT+ -0.14 mA
IT' Input current at negative-going threshold VCC=5V, V,=VT- -0.1B mA
VCC=5.25V, V,=2.7V 20 ,uA
hH High-level inpu't current
VCC=5 .25V , V,= 10V 0.1 mA
I'L Low-level input current Vcc-5.25V, V,-0.4V -0.4 mA
los Short-circuit output current (Note 1) VCC=5 .25V .'Vo=OV -20 -100 mA
ICCH Supply current, all outputs high VCC- 5. 25V , V,- OV B.6 16 mA
ICCL Supply current, all outRuts low VCC=5.25V, V,-4.5V 12 21 mA
* : All typical values are at Vee = 5V, Ta =25'C.

Note 1: All measurements should be done quickly, and not more than one output should be shorted at a time.
SWITCHING. CHARACTERISTICS (Vcc=5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tpLH Law-to-high-Ievel output propagation time 12 22 ns
CL=15pF (Note21
tPHL High-to-Iow-Ievel output propagation time 12 22 ns

INPUT Vee OUTPUT TIMING DIAGRAM
PG OUT 'A 1.6V O.BV
50~1.
y 1.3V
PR R = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns,
(2) CL includes probe and jig capacitance ..
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE VS INPUT VOLTAGE OUTPUT VOLTAGE \Is INPUT VOLTAGE

VOC- 5V Ta=25"C
IOH=-400,uA IOH=-400,uA
10L= BmA, 10L= BmA
4 4
2- 2-
>
o
3 ~ 3
Ta= UJ Voe
UJ
;'" V 75 "C t--. '"

«r-
..J
,.....5',25V
2 2 5V
o V 25 "C r.... 0
> v
> r-
r- ::> f,.---4.75V
::>
:=::> 1
V- 2O "C" 0..
r-
::>
0
o
o o
o 0.5 1.0 1.5 2.0 o 0.5 1.0 1.5 2.0
INPUT VOLTAGE V, (V) INPUT VOLTAGE V, (V)
• MITSUBISHI
2-32 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS1SP
TRIPLE 3-INPUT POSITIVE AND GATE WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
containing 3 triple·input positive AND and negative OR
gates with open collector outputs.
FEATURES INPUTS 11B ~ Vee
• Usable in wire·AND .connection 10 ~

-- 1A INPUT
• High breakdown inpLitvoltage (VI615V) ~ 1Y OUTPUT

• High breakdown output voltage (Vo 67V)
INPUTS
• High speed (tpd = 13ns typical) -- 3B INPUTS
• Wide operating temperature range (T a = -20 - +75°C) OUTPUT
APPLICATION GND OUTPUT

equipment.
With the use of Schottky TTL Technology and open col·
lector outputs with a high breakdown voltage, the high· CIRCUIT SCHEMATIC (EACH GATE)
level output impedance can be selected freely by use of an
external load resistor. This permits wire·AND connection r - - r - - - - T - - - - - O Vee
which has been impossible with conventional gates.

When inputs A, Band C are high, output Y is high and
when one or more of the inputs is low, Y is low.
FUNCTION TABLE
INPUTS I~ o---l-.---Jf-+-l
Y OUTPUT
A N Y
L L L
H L L
~~---L--L---~--oGND
L H L
H H H
UNIT: Q
-
N-B'C
ABSOLUTE MAXIMUM RATINGS (Ta= -20~ +75"C. unless otherwise noted)

V, Input voltage -0.5-+15 V
Vo Output voltage High-level state -0.5-+7 V
Topr Operating free-air ambient temperature range -20- +75 'c
Tstg Storage temperature range - 65- + 150 ·C
.• MITSUBISHI
;"ELECTRIC 2-33
MITSUBISHI LSTTLs
M74LS1SP
TRIPLE 3-INPUT POSITIVE AND GATE WITH OPEN COLLECTOR OUTPUT
RECOMMENDED OPERATING CONDITIONS '<Ta = -20- + 75'C. unless otherwise noted)
Limits
Min Typ Max
Vee Supply volta~ 4.75 5 5.25 V
IOH High-level output current VO=S.5V 0 100 "A

VOL~0.4V 0 4 mA
VOL~O.SV 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7S'C. unless otherwise noted)
Limits
Symbol Parameter . Conditions Unit
Min Typ * Max
Vie Input clamp voltage Vee;",4.75V.lle--18mA -1.5 V
IOH High-level output current Vee=4.75V.VI=2V. VO=S.SV 100 "A
VOL LOW-level output voltage

Vee=4.7SV I IOL= 4mA 0.25 0.4 V
VI=0.8V I IOL= 8mA 0.35 0.5 V
Vee=5.25V.VI=2.7V 20 "A
IIH Hig~-Ievel input current
Vee- 5 . 25V .VI-l0V 0.1 mA
IlL Low-level input current Vee=5.25V.VI=0.4V -0.4 mA
leeH Supply current. all outputs high Vee=5.25V.VI= 4.5V 1.8 3.6 mA
leeL Supply current, all outputs low Vee=5.25V.VI= 0 3.3 6.6 mA
* : All typical values are at Vee = 5 V. Ta = 25'C.

SWITCHING CHARACTERISTICS (Vee=5V. Ta=25'C.unlessotherwisenoted)
Limits
Symbol Parameter Test conditions !Jnit
Min Typ Max
t pLH Low-to-high-Ievel output propagation time RL=2KQ 15 35 ns
tpHL High-to-Iow-Ievel output propagation time C L = 15pF (Note) 10 35 ns
Note: Measurement circuit

A.S.C _ _ _....I
I
. PG OUT y
SOQ
(1) The pulse generator IPG) has the following characteristics:

PAR = lMHz. tr = 6ns. tf= 6ns. tw= 500ns.
Vp = 3Vp.p. Zo = 50n.
(2) CL inc:udes probe and jig capacitance.
• MITSUBISHI
2-34 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS18P
DUAL 4·INPUT NAND SCHMITT TRIGGER
DESCRIPTION
The M74LS18P is a semiconductor integrated circuit PIN CONFIGURATION (TOP VIEW)
containing two 4-input positive-logic NAND gates having
a schmitt trigger function and negative-logic NOR gates_
FEATURES lA ---> 1 Vee

INPUTS {
• Suitable for waveform shaping applications 1B~
• Wide hysteresis width (O_9V typical) and high noise
margin NC
• Reduce low-level input current (PNPTr input)

lC ---> 4 NC
• High breakdown input voltage (V 1 ~ 15V) INPUTS {
• Low power dissipation (Pd = 22mW typical) 1 D--->
+-- 2C} INPUTS
+-- 2D
• Wide operating temperature range (T a = -20 ~ +75°C)
GND
APPLICATION
General purpose, for use in industrial and consumer equip-
ment_
It is an Ie with PNPTr inputs, active pull-up in the outputs,
input high breakdown voltage, high speed, low power dis- CIRCUIT SCHEMATIC (Each schmitt trigger)
sipation and high fan-out_ With positive feedback applied
in the circuit, the hysteresis width is 0_9V (typical) _ Ac-
cordingly, the noise margin is high_ Even slow changing
Vee
input signals result in shaped waveform output without
causing oscillation_
A
When A, B, C and D inputs are high, output Y is low, Y
OUTPUT
B
and when more than one is low, Y is high. INPUTS
M74LS13P can be replaced with M74LS18P without C
any changes as pin connections, functions, are interchange- D
able_ Depending on PNPTr input usage, loading on the GND

transmission can be reduced. Depending on the high level
of the threshold voltage setting, low level noise margin can
be improved_ UNIT: n
For typical characteristics see M74LS19P.
FUNCTION TABLE
A N Y
L L H
H L H
L H H
H H L
N=B-C-D
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75"C.unless otherwise noted)


Tstg Storage temperature range -65-+150 ·C
.• MITSUBISHI
.... ELECTRIC 2-35
MITSUBISHI LSTTLs
M74LS18P
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C,unless otherwise noted)
Limits
Min Typ Max
Vcc Supply voltage 4 .75 5 5.25 V
VOH",2,7V -400 ,.,A

10H High-level output current
VOL,",,0.4V
° 4 rnA
10L Law-level output cu rrent
VOL,",,0,5V
° 8 mA
°
ELECTRICAL CHARACTERISTICS (Ta= -20- +75'C, unless otherwise noted)
Limits
Min Typ * Max
VT+ Positive-going threshold voltage Voc=5V 1. 65 1.9 2,15 V
VT- Negative-going threshold voltage Vcc=5V 0,75 1.0 1. 25 V
Vn-VT- Hysteresis width VCC=5V 0.4 0,9 V
V'C Input clamp voltage Voc=4.75V,I,c=-18mA -1.5 V
Vcc=4,75V. V,=0.5V
VO H High-level output voltage 2.7 3,4 V
10H= -400,.,A
VoO=4.75V I IOL=4mA 0.25 .4 V
V,=1.9V I IOL=8mA 0,35 °
0.5 V
IT+ Input current at positive-going threshold Vcc=5V. V,=VT+ -2 ,.,A
I T- Input current at negative-going threshold Vcc=5V. V,=VT- -5 ,.,A
Vcc=5.25V. V,=2.7V 20 ,.,A
IrH High-level input current
VOC=5.25V, V,=cl0V 0.1 mA
"L Low-level input current Vcc=5.25V. V,=0.4V -0.05 mA
los Short-circuit output current (Note 1) VOC= 5 .25V. Vo=OV -20 -100 mA
ICCH Supply current, all outputs high VCC=5 .25V. V,=OV 3.3 6 mA
ICCL Supply current, all outputs low Vec=5,25V. V,=4.5V 5.7 10 mA
*: All tYPical values are at VCC = 5V, Ta = 25°C.
Notel: All measurements should be done Quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25'C. unlessotherwisenoted)
Limits
Min Typ Max
tPLH Low·to·high·level output propagation time 12 20 ns
OL=15pF INote 2)
tpHL High·to·low·level output propagation time 37 55 ns
Note 2: Measurement circuit TIMING DIAGRAM

INPUT, Vee OUTPUT
A,B,C,D 1.9V
1.0V
PG DUT
y
.3V
50Q
(1) The pulse generator (PGJ has the following characteristics:

PR R = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns, Vp = 3Vp_p.
Zo = 50n
• MITSUBISHI
2-36 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS19P
HEX SCHMITT TRIGGER INVERTER
DESCRIPTION
The M74LS19P is a semiconductor integrated circuit con-
taining 6 schmitt trigger inverter circuits.
FEATURES INPUT IA ~ I Vee

OUTPUT I Y <- INPUT
• Wide hysteresis width (0.9V typical) and high noise 2
margin INPUT 2A~ 3 OUTPUT

• Reduce low-level input current (PNPTr input)
OUTPUT 2Y <- 4
• High breakdown input voltage (V 1 ~15V) INPUT
• Low power dissipation (Pd = 67mW typical) INPUT 3A ~ OUTPUT

• Wide operating temperature range (Ta = -20 - +75°C) OUTPUT 3 Y <- INPUT
GND OUTPUT
APPLICATION
ment.
Outline 14P4
It is an Ie with PNPTr inputs, active pull-up in the outputs,
input high breakdown voltage, high speed, low power dis-
CIRCUIT SCHEMATIC
sipation and high fan-out. With positive feedback applied
in the circuit, the hysteresis width is 0.9V (typical). Ac-
cordingly, the noise margin is high. Even slow changing
input signals result in shaped waveform output without
causing oscillation.
When input A is high, output Y is low, and when A is
low, Y is high.
,*.,-;lirl-~Y
M74LS14P can be replaced with M74LS19P without INPUT A~ OUTPUT
any changes as pin connections, functions, are interchange-
able. Depending on PNPTr input usage, loading on the
of the threshold voltage setting, low level noise margin can
be improved.
UNIT: n
FUNCTION TABLE
A Y
ABSOLUTE MAXIMUM RATINGS L H
(Ta= - 20- + 7St, unless otherwise noted) H L

Vo Output voltage High-level state -0.5- Vee V'
Tstg Storage temperature range -65-+150 'C
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75'C,unlessotherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH'ii;Z.7V 0 -400 I,A
VOL~0.4V 0 4 mA
VOL~0.5V 0 B mA
'. MITSUBISHI
..... ELECTRIC 2-37
MITSUBISHI LSTTLs
M74LS19P
HEX SCHMITT TRIGGER INVERTER
ELECTRICAL CHARACTERISTICS (Ta= -20- +75"C, unless otherwise noted)
limits
Min Typ * Max
VT+ Positive-going threshold voltage VOO=5V 1.65 1.9 2.15 V
VT- Negative-going threshold voltage Voo=5V 0.75 1.0 1.25 V
VT+-VT- Hysteresis width VOO=5V 0.4 0.9 V
VIO Input clamp v.oltage Voo=4.75V.llo=-18rnA -1.5 V
Voo=4. 75V, VI=O .5V
10H= -400,uA

Voo=4.75V I IOL=4mA 0.25 0.4 V
VI= 1.9V I IOL=8rnA 0.35 0.5 V
IT+ Input current at positive-going threshold Voo=5V. VI=VT+ -2 pA
IT- Input current at negative-going threshold VOO=5V, VI=VT- -5 pA
VoO=5.25V, VI=2.7V 20 ,uA
Voo=5.25V, VI=lOV 0.1 mA
IlL Low-level input current VOO=5.25V, VI=O .4V 0.05 mA
los Short-circuit output current (Note 1) Voo=5 .25V, VO=OV -20 -100 rnA
IOOH Supply current, all outputs high VOO=5 .25V, VI=OV 9.9 18 rnA
IOOL Supply current. all outputs low Voo=5.25V, VI=4.5V 17 30 mA
*: All typical values are at Vee = 5V, T a::: 25°C.
SWITCHING CHARACTERISTICS (Voo=5V, Ta=25"C,unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to·high-Ievel output propagation time 11 20 ns
CL=15pF (Note 21
tpHL High-to·low·level output propagation time 15 30 ns
INPUT Vee OUTPUT TIMING DIAGRAM
PG DUT A
50U
y 1.3V

PR R = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns, Vp = 3Vp.p,
Zo =50n
OUTPUT VOLTAGE VS.INPUT VOLTAGE OUTPUT VOLTAGE VS.INPUT VOLTAGE

VOO=5V Ta =25"C
IOH =-400pA IOH=-400pA
IOL =BmA IOL =8mA
>
o o
> >
w w
"«
f-
-' Ta=
"«
f-
o 75"C o-' VCo=
> I
> 5.25V
f- f-
::0
Cl.
f,--"25"C,> ::0 f,..--5V'----
V-20"~
Cl.
f-
::0
f-
::0
~.75V...,.
o o
0.5 1.0 1.5 2.0 2.5 0.5 1.0 1.5 2.0 2.5
INPUT VOLTAGE VI (V) INPUT VOLTAGE VI (V)
• MITSUBISHI.
2-38 ~ELECTRIC
MITSUBISHI LSTTLs
M74LS20P
DUAL 4-INPUT POSITIVE NAND GATE
DESCRIPTION
containing two 4-input positive NAND gates, usable as
negative-logic NOR gates.
FEATURES 1 Vee
INPUTS f A - +
• High breakdown input voltage (VI ~ 15V) lB -+
~2A }
• Low power dissipation (Pd = 4mW typical) INPUTS
NC ~2B
• Low output impedance NC
f C -+ 4
INPUTS
• Wide operating temperature range (T a = -20 ~ +75°C) 10 -+
~ 2C} INPUTS
APPLICATION ~ 20
General purpose, for use in industrial and consumer GNO OUTPUT

equipment.
The use of Schottky TTL technolgoy enables the achieve- Outline 14P4 NC: NO CONNECTION
ment of input high breakdown voltage, high speed, low

power dissipation and high fan-out. CIRCUIT SCHEMATIC (EACH GATE)
Vee
When inputs A, Band C are high, output Y is low, and
when one or more of the inputs is low, output Y is high.
FUNCTION TABLE '-'VV'r--t---c Y

OUTPUT
A N Y
L L H
H L H
L H' H
H H L
L-~~~----~--~-oGNO
N=B-C-O
UNIT: Q
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75·c. unless otherwise noted)

VI I nput voltage -0.5-+15 V
Vo Output voltage High-level state -0.5 Vee V
• MITSUBISHI
.... ELECTRIC 2-39
MITSUBISHI LSTTLs
M74LS20P
DUAL 4-INPUT POSITIVE NAND GATE
Limits
Min Typ Max
Veo Supply voltage 4 75 5 5.25 V
10H High-level output current VOH~2.7V a -400 J1A
VOL";0.4V a 4 rnA
VOL"; 0 .5V 0 8 rnA
ELECTRICAL CHARACTERISTICS CTa= -20- +75"C. unless otherwise noted)
Limits
Min Typ * Max
VIO I nput clamp vortage Voo-4.75V.llo--18rnA 1.5 V
VOH High-level output voltage Veo-4.75V. VI=0.8V. IOH=-400J1A 2.7 3.4 V
VOO=4.75V I IOL=4rnA 0.25 0.4 V
VOO=5.25V. VI=2.7V 20 J1A
Voo=5.25V. VI=10V 0.1 rnA
IlL Low-level input current Voo=5.25V. VI=0.4V -0.4 rnA
lOS Short-circuit output current (Note 1) Voo=5.25V. VO=OV -20 -100 rnA
IOOH Supply current. all inputs high VOO=5 .25V. VI=OV 0.4 0.8 rnA
IOOL Supply current, all inputs low VOO-5.25V, VI=4.5V 1.2 2.2 rnA
* : All typical values are at VCC=5V. Ta =25"C
SWITCHING CHARACTERISTICS (Voo=5V, Ta=25·C. unless otherwise noted)
Limits
Min Typ Max
tPLH Low-to-high-Ievel/high-to-Iow-Ievel CL=15pF 6 15 ns

output propagation time INote 21 13 15 ns
tpHL

INPUT VOO OUTPUT
A-D
PG DUT
50Q y

PR R = 1 MHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp.p, Zo = 50(l.
121 CL includes probe and jig capacitance.
• MITSUBISHI
2-40 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS21P
DUAL 4-INPUT POSITIVE AND GATE
DESCRIPTION
containing two 4-input positive AND and negative OR
gates.
FEATURES
•
•
•
High breakdown input voltage (VI ~ 15V)
Low power dissipation (pd = 8.5mW typical)
INPUTS
r A
lS_
NO
-
1 Vee
+- 2A}
+- 2S
INPUTS
• Low output 'impedance { 10 _ 4 NO

INPUTS
1D- +- 20 }
INPUTS
APPLICATION OUTPUT lY +- +- 2D

equipment.
The use of Schottky TTL technology and active output Outline 14P4 NO: NO CONNECTION
voltage, high speed, lowpower dissipation and high fan-out. CIRCUIT SCHEMATIC (EACH GATE)
When inputs A, B, C and D are high, output Y is high, vee
20k 11k 7.6k 120
and when one or more of the inputs is low, Y is low.
FUNCTION TABLE
A N Y
L L L
H L L
L H L
~~~----~--------~~---oGND
H H H
N=S·O·D UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta= -20- +75"C. 'unless otherwise noted)
Veo Supply voltage -0.5-+7 V

Vo Output voltage High·level state -0.5- Vee V
Top, Operating free-air ambient temperature range -20- +75 "0
Tstg Storage temperature range -65- +150 "C
• MITSUBISHI
.... ELECTRIC 2-41
MITSUBISHI LSTTLs
M74LS21P
DUAL 4-INPUT POSITIVE AND GATE
RECOMMEND-ED OPERATING CONDITIONS (Ta~ -20- +75·C. unless otherwise noted)
limits
Min Typ Max

.,
10H High-level output current VOH~2. 7V 0 -400 fJ. A
VOL~0.4V 0 4 rnA
VOL'" 0 .5V 0 B rnA
ELECTRICAL CHARACTERISTICS eTa~ -20- +75'C, unless otherwise noted)
limits
Min Typ * Max
V,H High-level input voltage 2 V
V,L Low-level input voltage O.B V
V'C Input clamp voltage Vcc~4_75V. I'C~-lBmA -1.5 V
VOH High-level output voltage VCC~4.75V. V,~2V. IOH~-400fJ.A 2.7 3.4 V

Vcc~4. 75V L 10L~ 4 rnA 0.25 0.4 V
V,=O .BV 10L~ BmA
I 0.35 0.5 V
Vcc~5.25V. VI=2.7V 20 fJ. A
I'H High-level input current
VCC~5.25V. V,~10V 0.1 rnA
I,L Low-level input current VCC~ 5. 25V. V,~ O. 4V -0.4 rnA
los Short-circuit output current (Note 1) VCC=5.25V. VO~OV ~20 -100 mA
ICCH Supply current, all outputs high Vcc~5.25V. V,~4.5V 1.2 2 .4 rnA
ICCL Supply current, all outputs low Vcc~5.25V. V,-OV 2.2 4.4 rnA
* : All typical values are at Vee = 5V, T a = 25°C.
Note 1: All measurements must be done quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS eVcc=5V. Ta~25·C. unless otherwise noted)
limits
Min Typ Max
tPLH Low-to-high-output level propagation time CL~15pF 9 15 ns
, tpHL High-to-Iow-output level propagation time (Note 2) 10 20 ns

TIMING DIAGRAM (Reference level 1.3V)
INPUT Vee OUTPUT
PG OUT
A-O
50Q

PRR == 1 MHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp_p . Zo = 50n.
• MITSUBISHI
2-42 "ELECTRIC
MITSUBISHI LSTTLs
M74LS22P
DUAL 4·INPUT POSITIVE NAND GATE WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
containing two 4-input positive-logic NAN D gates with
open collector outputs, usable as negative-logic NOR gates.
1A -> 1 Vee
FEATURES INPUTS {
• Usable in wire-AND connection 1B ->
2A} INPUTS
• High breakdown input voltage (VI £ 15V) NC 2B
• High breakdown output voltage (Va £ 7V)
1C-> 4 NC
• Low power dissipation (Pd = 4mW typical) INPUTS {
• High speed (tpd = 18ns typical) 10 ->
.-- 2C}
• Wide operating temperature range (T a = -20 ~ +75°C) INPUTS
.-- 20
APPLICATION GNO
equipment. *: OPEN COLLECTOR OUTPUT
NC: NO CONNECTION

With the use of open collector outputs and SBD inputs
featuring a high breakdown voltage, the high-level output CIRCUIT SCHEMATIC (EACH GATE)
impedance can be selected freely by use of an external load Vee
resistor. This permits wire-AND connection which has been 20k 7.6k
impossible with conventional gates.
When inputs A, B, C and D are high, output Y is low and
r
,~
when one or more of the inputs is low, output Y is high. Y OUTPUT
-~
....
,
FUNCTION TABLE
5k
A N Y
L L H <~<
~~ :~
H L H GNO
L H H
UNIT: Q
H H L
N=B-C'D
ABSOLUTE MAXIMUM RATINGS CTa=-,20-+75'C. unlessotherwisenoted)
Veo Supply voltage -0.5- +-7 V

VI Input voltage -0.5-+-15 V
Va Output voltage High-level state -0.5-+-7 V
• MITSUBISHI
"ELECTRIC 2-43
MITSUBISHI LSTTLs
M74LS22P
DUAL 4·INPUT POSITIVE NAND GATE WITH OPEN COLLECTOR OUTPUT
RECOMMENDED OPERATING OCNDITIONS(Ta =-20-+7S·C. unless otherwise noted)
Limits
Min Typ Max
VCC Supply voltage 4 .7S S S .25 V
IOH High-level output current Vo =5.5V a 100 IJA
VOL";;O .4V a 4 rnA

VOL";; a .SV a 8 rnA
ELECTRICAL CHARACTERISTICS (Ta = -20- +75·C. unless otherwise noted)
Limits
Min Typ * Max
VIC I nput clamp voltage VCC=4.75V.IIC=-18rnA -1.5 V
Vcc=4.75V. VI=0.8V
IOH High-level output current 100 IJA
Vo=5.5V
VOL Low·level output voltage

VCC=4.75V I IOL=4rnA 0.25 0.4 V
VCC=5.25V. VI=2.7V 20 IJA
ftH High-level input current
VCC=5.25V. VI=10V 0.1 rnA
IlL Low-level input current VcC=5.25V. VI=0.4V -0.4 rnA
ICCH Supply current, all inputs high Vco=5.25V. VI=OV 0.4 0.8 rnA
ICOL Supply current, all inputs low Vco=5.25V. VI=4.SV 1.2 2.2 rnA
* . All tYPical values are at Vcc=5V I T a =25°C
SWITCHING CHARACTERISTICS (Vco=5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
tPLH Low-to-high·level/high-to-Iow-Ievel RL= 2kQ 10 32 ns
tpHL otJtrJut propagation time CL=15pF INote 1) 25 28 ns
Note 1: Measure'ment circuit TIMING DIAGRAM (Reference level = 1.3V)

RL A. B. C. D
PG DUT
r
y
50Q
CL

PRR = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns;
Vp =3Vp.p,Zo = 50n
(2) CL includes pr.obe and jig capacitance.
• MITSUBISHI
2-44 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS24P
QUADRUPLE 2·INPUT POSITIVE NAND SCHMITT TRIGGER
DESCRIPTION
The M74LS24P is a semiconductor integrated circuit con- PIN CONFIGURATION (TOP VIEW)
taining four 2-input positive-logic NAND gates having a
schmitt trigger function and negative-logic NOR gates_
1A .... 1 Vee
FEATURES INPUTS {
• Suitable for waveform shaping applications 18 .... +- 4A} INPUTS
• Wide hysteresis width (O.9V typical) and high noise
OUTPUT 1Y'" 3 +- 48
margin
• Reduce low-level input current (PNPTr input) 2A.... 4 11 --+ 4Y OUTPUT
• High breakdown input voltage (VI ~ 15V) INPUTS {

28 .... +- 3A} INPUTS
• High speed (tpd = 18ns typical) OUTPUT 2Y'" 6 ... 38
GND
APPLICATION
General purpose, for use in indus~rial and consumer equip-
ment.
Outline 14P4
It is an IC with PNPTr inputs, active pull-up in the outputs, of the threshold voltage setting, low level noise margin can
input high breakdown voltage, high speed, low power dis- be improved.
sipation and high fan-out. With positive feedback applied For typical characteristics see M74LS19P.
in the circuit, the hysteresis width is 0.9V (typical). Ac-
cordingly, the noise margin is high. Even slow changing
input signals result in shaped waveform output without FUNCTION TABLE
causing oscillation. A 8 Y
When A and B inputs are high, output Y is low, and L L H
when more than one is low, output Y is high. H L H
M74LS132P can be replaced with M74LS24P without L H H
any changes as pin connections, functions, are interchange-
H H L
able. Depending on PNPTr input usage, loading on the
CI RCUIT SCHEMATIC lEach schmitt trigger)
r---~-------'------~--~----------~----CVcc
24k
41---_~~---o Y OUTPUT
L-+-----~------~--------~~----_+------~~--_oGND
UNIT: n
• MITSUBISHI
"ELECTRIC 2-45
MITSUBISHI LSTTLs
M74LS24P
QUADRUPLE 2·INPUT POSITIVE NAND SCHMITT TRIGGER
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C. unless otherwise noted)

V, Input voltage -0.5-+ 15 V
Va Output voltage High-level state -0.5- Vee V
Topr Operating free-air ambient temperature range -20- +75 "C
Tstg Storage temperature range -65- + 150 "C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C. un lessotherwisenoted)
Limits
Min Typ Max
10H High-level output cl!rrent VOH;;::;2.7V 0 -400 t LA

VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75"C.unlessotherwise noted)

Limits
Min Typ Max
*
VT+ Positive-going threshold voltage Vee=5V 1. 65 1.9 2.15 V
VT- Negative-going threshold voltage Vee=5V 0.75 1.0 1.25 V
VT+-VT- Hysteresis width Vee=5V 0.4 0.9 V
V,e Input clamp voltage Vee=4.75V.I,e=-18rnA - 1.5 V
Vee=4.75V. V,=0.5V
10H= -400"A

Vee=4.75V I IOL=4rnA 0.25 0.4 V
V,=1.9V I IOL=8mA 0.35 0.5 V
IT+ Input current at positive-going threshold Vee=5V. V,=VT+ -2 "A
IT- Input current at negative-going threshold Vee=5V. V,=VT- -5 pA
Vee=5.25V
20 "A
V,=2.7V
"H High-level input current
Vee=5.25V
0.1 rnA
V,=10V
"L Low-level input current Vee=5.25V. V,=0.4V -0.05 rnA
loS Short-circuit output current (Note 1) VCO=5.25V. VO=OV -20 -100 mA
leeH Supply current, all outputs high Vce=5.25V. V,=OV 6.6 12 rnA
leeL Supply current, all outputs low Vee=5.25V. V,=4.5V 11 20 rnA
*: All tYpical v,alues are at Vee = 5V, Ta = 25°C,
Note 1: All measurements should be done quickly and not more than one output should be shorted at a time,
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
t pLH Low-to-high-Ievel output propagation time 13 20 ns
CL=15pF INote 21
t pHL High-to-Iow-Ievel output propagation time 24 40 ns

TIMING DIAGRAM
INPUT Vee OUTPUT
1.9V
A.B 1.0V
(1) The pulse generator (PG) has the following
characteristics: PRR = 1 MHz, tr = 6ns, tf =
6ns. tw = 500ns. Vp = 3Vp.p. Zo = 50!'! y
1.3V
CL includes probe <lnd jig capacitance.
• MITSUBISHI
2-46 ~ELECTRIC
MITSUBISHI LSTTLs
M74LS27P
TRIPlE 3·INPUT POSITIVE NOR GATE
DESCRIPTION
containing three triple·input positive NOR and negative
NAND gates.
FEATURES 16 Vee
INPUTS{
• High breakdown input voltage (VI ~ 15V) 1C 1A INPUT
• Low power dissipation (Pd = 13.5mW typical)
2A 1Y OUTPUT
• Low output impedance "em,{ 26 3A
APPLICATION OUTPUT
2C
2Y
36
3C
}'"'""'
General purpose, for use in industrial and consumer GND 3Y OUTPUT
equipment.
The use of Schottky TTL technology and active output Outline 14P4
voltage, high speed, low power dissipation and high fan·out. CIRCUIT SCHEMATIC (EACH GATE)
When one or more of the A, Band C inputs are high,
, - - - r - - , - - . - - - - r - - - { J Vee
output Y is low and when all inputs are low, Y is high.
20k 20k 20k 7.6k 120
FUNCTION TABLE
A N Y
j
INPUTS :
A
o-h-14--:"~_"'-t_---t-_-;-
W\A;Y-t--{J Y ~~;-
L L H
H L L
L H L ~~---------~~--{JGND
H H L
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, unlessotherwisenoted)

Va Output voltage High-level state -0.5- +Veo V
T5\g Storage temperature range - 65- + 150 'C
• MITSUBISHI
;"ELECTRIC 2-47
MITSUBISHI LSTTLs
M74LS27P
TRIPLE 3-INPUT POSITIVE NOR GATE
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwi,enoted)
limits
Min Typ Max
10H High-level output current VOH<;;2.7V 0 -400 J.<A

VOL~0.4V 0 4 mA
VOL~0.5V 0 B mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +7S'C, unlessotherwi,enoted)
Limits
Min Typ* Max
VIL Low-level input voltage O.B V
VIO Input clamp voltage VOO-4.75V, 110- -lBmA -1.5 V
VOH High-level output voltage VOO-4.75V, VI-O.BV, IOH--400J.<A 2.7 3.4 V

VOO-4.7SV I IOL-4mA 0.25 0.4 V
VI=2V I 10L-BmA 0.35 0.5 V
VOO=5.25V, VI=2. 7V 20 J.<A
hH ~igh-Ievel input current
VOO-5.25V, VI-l0V 0.1 mA
IlL Low-level input current Voo-5.25V, VI=0.4V -0.4 mA
los Short-circuit output current (Note 1) Voo=5.25V, VO=OV -20 -100 mA
100H Supply current. all outputs high Voo=5.25V, VI=OV 2 4 mA
100L S~pply current, all outputs low .Voo=5.25V, VI=4.5V 3.4 6.B inA
-
* . Alltyp,calvalue,areat Voo-SV, -
Ta-25C.
Note 1: All measurements must be done quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Voo=5V, Ta=25'C, unless otherwise noted)
Limits
Symbol Parameter Test conditions U.nit
Min Typ Max
tpLH Low-to-high-Ievel output propagation time OL=15pF 6 15 ns
tpHL High-to-Iow-Ievel output propagation time (Note 21 6 15- ns

INPUT Voo OUTPUT
A-C
PG OUT
SOQ
y

PRR = lMHz, tr =6n" tf =6n" tw =SOOn"
Vp = 3Vp.p, Zo = 50n.
• MITSUBISHI
2-48 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS30P
SINGLE 8-INPUT POSITIVE NAND GATE
DESCRIPTION
taining one 8-input positive-logic NAN D gate, usable as a
negative-logic NOR gate.
FEATURES Vee
• High breakdown input voltage (VI ~ 15Vl NC

• Low power dissipation (Pd = 2.4mW typical!
• High speed (tpd = 11 ns typical! INPUTS
: } INPUTS
• Wide operating temperature range (Ta = -20 ~ +75°CI NC
NC
APPLICATION
General purpose, for use in industrial and consumer GND -+ Y OUTPUT
equipment.
The use of Schottky TTL technology enables the achieve- Outline 14P4 NC: NO CONNECTION
ment of input high breakdown voltage, high speed, low

power dissipation and high fan·out. CIRCUIT ,--r-----r-----<..; Veq
When inputs A, B, C,.o, E, F and G are high, output Y is
SCHEMATIC
low and when one or more of the inputs is low, output Y is
high.
FUNCTION TABLE
A N Y
INPUTS
(8)
1: :
,,
LJ\/Vv-+----c Y
OUTPUT
H o----t-+-~rl<IIl-
L L H
H L H
L H H
H H L
L-~-4-----+--~~--OGND
N=B'C'O'E'F'G'H
UNIT: Q

Vo Output voltage High-level state· -0.5-+Vee V
Topr Operating free-air ambinet temperature range . -20- +75 'C
Tstg -Storage temperature range -65- +150 'C
• MITSUBISHI
.... ELECTRIC 2-49
MITSUBISHI LSTTLs
M74LS30P
SINGLE a-INPUT POSITIVE NAND GATE
RECOMMENDED OPERATING CONDITIONS CTa=-20- +7S'C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage 4,7S S S .2S V
10H High·level output current VOH<';2.7V a -400 I1A
VOL"0.4V a 4 rnA
VOL"O .SV a 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7S'C, unless otherwise noted)
Limits
Min Typ * Max
VIL Low·level input voltage 0.8 V
VIC I nput clamp voltage VCC=4.7SV,llc=-18rnA -l.S V
VOH High-level output voltage VCC=4.7SV, VI=0.8V, IOH=-400I1A 2.7 3.4 V

Vcc=4.7SV I IOL=4mA 0.25 0.4 V
VI=2V I IOL=8mA 0.35 0.5 V
Vcc=5.2SV, VI=2.7V 20 I1A
Vcc=5.25V, VI=10V 0.1 mA
IlL Low-level input current VCC=5.2SV, VI=0.4V -0.4 mA
loS Short-circuit output circuit (Note 1) VCC-5.2SV, Vo-OV -20 -100 mA
ICCH Supply current, all inputs high VCC=5 .25V. VI= OV 0.35 0.5 mA
ICCL Supply current, all "inputs low VCC-S.25V. VI-4.SV 0.6 1.1 mA
* : All typIcal values are at Vee = 5V. T a = 25 C
Note 1: All measurements should be done quickly.
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high.Jevel/high-to-low-level CL-15pF 6 15 ns
output propagation time (Note 21
tpHL 16 20 flS
Note2 Measurement circuit TIMING DIAGRAM (Reference level = 1,3V)

INPUT Vce OUTPUT
PG OUT A- H _ _---I
50Q
y
(1) The pulse generator (PG) has the following characterisitcs;

PRR "" 1MHz, tr "" 6ns, tf "" 6ns, tw '" 500ns;
Vp " 3Vp.p. Zo "50n.
PRECAUTION FOR USE

Connect pins not being used to the Vee supply voltage,
• MITSUBISHI
2-50 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS32P
QUADRUPLE 2-INPUT POSITIVE OR GATES
DESCRIPTION
containing 4 dual-input positive OR and negative AND
gates.
lA--> 1 vee
INPUTS {
FEATURES
• High breakdown input voltage (VI ~ 15V)
16-->
+- 4A} INPUTS
OUTPUT 1 Y +- 3 +- 46
• High speed (tpd = 7ns typical) 2A--> 4
• Low output impedance INPUTS {
• Wide operating temperature range (T a = -20 - +75 0 C)

26-->
+- 3A} INPUTS
+- 36
APPLICATION GND
equipment.

achievement of input high breakdown voltage, high speed, CIRCUIT SCHEMATIC (EACH GATE)
low power dissipation, and high fan-out.
When either or both of the inputs A and B is/are high, r-___;_~--r-~___;_~~~-r----D Vee
output Y is high, and when both A and B are low, Y is low. 20k 20k 11 k 7.6k 120
FUNCTION TABLE
'-'M--+--o Y OUTPUT
A 8 y
L L L
H L H
L H H
~~~~~~~~~~~~--oGND
H H H
UNIT: Q

Va Output voltage High·level state -0.5- Vee V
Tstg Storage temperature range -65- +150 OC
• MITSUBISHI
.... ELECTRIC 2-51
MITSUBISHI LSTTLs
M74LS32P
QUADRUPLE 2-INPUT POSITIVE OR GATES
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75'C, unless otherwise noted)
limits
Min Typ Max
Vee Supply voltage 4 75 5 5.25 V
10H High-level output current VOH~2. 7V 0 -400 f/ A

VOLo£0.4V 0 4 rnA
VOLo£0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20- +75'C, unlessotherwisenoted)
limits
Min Typ* Max
VIO Input clamp voltage Voo=4.75V.lle=-18rnA -1.5 V
VOO=4.75V. VI=2V
IOH= -400f/A

Voo=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V I IOL=8mA 0.35 0.5 V
Voo=5.25V. VI=2. 7V 20 f/A
iJH High-level input current
VCO=5.25V. VI= 10V 0.1 rnA
IlL Low-level input current VOO=5.25V. VI=0.4V -0.4 mA
los Short-circuit output current (Note') Voo=5.25V. VO=OV -20 -100 mA
IOOH Supply current, all outputs high Voo=5.25V. VI= 4.5V ·3.1 6.2 mA
ICOL Supply current, all outputs low Voo=5.25V. VI-OV 4.9 9.8 mA
* : All typical values are at Vee = 5V, Ta = 25°C.

SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25'C, unlessotherwisenoted)
Limits
Min I Typ
J Max
tPLH Low-to-high-Ievel output propagation time
CL=15pF INote 2) I 7 I 22 ns
tPHL High-to-Iow-Ievel output propagation time
J 7 J 22 ns

INPUT Vee OUTPUT
A, B
PG DUT
50£1 y
(1) The pulse generator (PG) has the following characterstics:

PRR = lMHz, tr = 6ns. tf = 6ns. tw = 50pns,
Vp = 3Vp·.p. Zo = 50n
(2) Cl includes probe and jig capacitance.
• MITSUBISHI
2-52 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS37P
QUADRUPLE 2·INPUT POSITIVE NAND BUFFER
DESCRIPTION
containing four 2-input positive NAND and negative NOR
buffer gates.
1 Vee
FEATURES INPUTS CA-+
• High fan·out (lOL = 24mA, IOH = -1.2mA) 18 -+ 2 ~ 4A }
INPUTS
• High breakdown input voltabe(V I ~ 15V) OUTPUT ~ 48
4 OUTPUT
• High speed (tpd = 1Ons typical) { 2A -+
INPUTS
• Low output impedance 28 -+
~ 3A }
INPUTS
OUTPUT ~ 38

equipment.

achievement of input high breakdown voltage, high speed, CIRCUIT r-~-~-----r---oVee
low power dissipation, and high fan-out. SCHEMATIC 19k

(EACH
When inputs A and B are high, output Y is low, and
BUFFER)
when one or both inputs are low, Y is high.
FUNCTION TABLE
I NPUTS{ : 0--j---r-I4-'
A B Y
L L H
H L H
L H H
H H L
L--4-------~--4-__OGND
UNIT: Q
MAXIMUM ABSOLUTE RATINGS (Ta=-20- +75"C. unless otherwise noted)

V, I nput voltage -0.5-+15 V
Topr Operating free-air ambient temperature range -20-+75 "C
• MITSUBISHI
..... ELECTRIC 2-53
MITSUBISHI LSTTLs
M74LS37P
QUADRUPLE 2·INPUT POSITIVE NAND BUFFER
RECOMMENDED OPERATING CONDITIONS (Ta =-20- + 75'C , unless otherwise noted)
Limits
Min Typ Max
10H High-level outpU! current VOH~2 .7V 0 -1.2 mA
VOL"; 0 .4V 0 12 mA
VOL";0.5V 0 24 mA
ElECTR ICAl CHARACTERISTICS (Ta= -20- +75'C, unless otherwise noted)
Limits
Min Typ * Max
VIC I nput clamp voltage Vcc-4.75V, Ilc- -lBmA 1.5 V
VOH High-level output voltage Vcc-4.75V, VI-O BV,loH--l.2mA 2.7 3.4 V

Vcc-4.75V I 10L -12mA 0.25 0.4 V
VI=2V I IOL=24rnA 0.35 0.5 V
Vcc=5.25V, VI=2.7V 20 /-<A
Vcc=5.25V, VI=10V 0.1 rnA
IlL Low-level input current Vcc=5.25V, VI=0.4V -0.4 rnA
los Short-circuit output current (Note 1) Vcc=5.25V, VO=OV - 30 -130 rnA
ICCH Supply current. all outputs high Vcc=5.25V, VI=OV 0.9 2 rnA
ICCL Supply current, all outputs low Vcc=5.25V, VI=4.5V 6 12 rnA
* : All tYPical values are at Vcc= SV. Ta = 2SoC.
Note 1: All measurement should be done quickly. and not more t~an one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time CL=45pF 7 24 ns
t pHL High-to-Iow-Ievel output propagation time INote 21 12 24 ns

INPUT Vee OUTPUT
PG DUT A, B
--~
50Q
y

PR R = 1M Hz, tr = 6ns, tf := 6ns, tw' = 500n5,
Vp = 3Vp.p, Zo = 50n.
• MITSUBISHI
2-54 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS38P
QUADRUPLE 2-INPUT POSITIVE NAND BUFFER
DESCRIPTION
containing four 2-input positive NAND and negative NOR
buffer gates with open collector outputs_
1A --+ vee
FEATURES INPUTS {
• Usable in wire-AND connection 18 --+
+- 4A }
INPUTS
•
•
•
•
•
High fan-out (lOL = 24mA max)
High breakdown input voltage (VI ~ 1SV)
High breakdown output voltage (Vo ~ 7V)
Low power dissipation (Pd = 17_SmW typical)
OUTPUT
INPUTS
OUTPUT
r1Y ....
A
--+
28 -+
4
+-
-+ 4Y
+-
+-
48
3A}
38
OUTPUT
INPUTS
• Wide operating temperature range (T a = ~20 ~ +7SoC)

GND --+ 3Y OUTPUT
APPLICATION
equipment. *: OPEN COLLECTOR OUTPUT
Outline 14P4
With the use of open collector outputs and SBD inputs CIRCUIT r-....,.-~-------ovee
having a high breakdown voltage, ttie high-level output SCHEMATIC 19k 2.7k
impedance can be selected freely by use of an external load (EACH
resistor. This permits wire-AND connection, which has been
BUFFER)
impossible with conventional gates. The maximum low-level
output current (10 L) of 24mA makes this device suitable as
a buffer gate. When inputs A and B are high, output Y is
low and when one or both inputs are low, Y is high. INPUTS{: o-+-"T"":!<f---J y OUT-
PUT
FUNCTION TABLE
A B Y
L L H
~~-------~-~--oGND
H L H UNIT: Q
L H H
H H L
ABSOqJTE MAXIMUM RATINGS (Ta=-20-+75'C, unlessotherwisenoted)

VI Input voltage -0.5-+15 V·
Vo Output voltage High·level state -0.5-+7 V
Tstg Storage temperature range -65-+150 "C
• MITSUBISHI
;"ELECTRIC 2-55
MITSUBISHI LSTTLs
M74LS38P
QUADRUPLE 2-INPUT POSITIVE NAND BUFFER
RECOMMENDED OPERATING CONDITIONS(Ta=-20-+75'c, unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage

, 4.75 5 5.25 V
IOH High-level output current Vo =5.5V 0 250' ,.,A
VOL";O .4V 0 12 rnA

VOL";0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C, unlessotherwisenoted)
limits
Min Typ.* Max
VIC Input clamp voltage Vee=4.75V,lle=-18rnA ~1.5 V
IOH High-level output current Vee=4.75V, VI=0.8V, Vo=5.5V 250 ,.,A

Vee=4.75V I IOL=12rnA 0.25 0.4 V
VI=2V I IOL=24rnA 0.35 0.5 V
Vee=5.25V, VI=2.7V 20 ,.,A
IIH High-level input curren~
Vee=5.25V, VI=10V 0.1 rnA
IlL Low-level input current Vee=5.25V, VI=0,4V -0.4 rnA
leeH . Supply current, all outputs high Vee=5.25V, VI=OV 0.9 2 rnA
leeL Supply current, all outputs low Vee=5.25V, VI=Open 6 12 mA
* , All tYPical values are at Vee = 5V, T a = 25 C.
SWITCHING CHARACTERISTICS (Vec=5V, Ta= 25'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time RL=667Q 13 32 ns
tpHL High-to-Iow-Ievel output propagation time CL=45pF (Note 1) 14 28 ns
Note 1; Measurement circuit

ilMING DIAGRAM (Reference level = 1.3V)
A, B
PG OUT
50Q
y
(1) The" pulse generator (PG) has the following characteristics:

PR R = 1MHz, tr = 6n5, tf = 6n5. tw = 500n5,
Vp = 3Vp.p, 20 =50!),.
.• MITSUBISHI
2-56 ;"'ELECTRIC
MITSUBISHI LSTTLs
M74LS40P
DUAL 4·INPUT POSITIVE NAND BUFFER
DESCRIPTION
containing 2 built-in quadruple-input positive NAND and
negative NOR buffer gates.
lA Vee
FEATURES INPUTS {
18
<--2A} INPUTS
• High fan-out (10 L = 24mA, 10 H = -1.2mA) <-- 28
NC
• High breakdown input voltage (V, ~ 15V)
lC NC
• Low power dissipation (Pd =9mW typical) INPUTS {
• High speed (tpd = 14ns typical) 10 2C} INPUTS
• Low output impedance 20
OUTPUT lY
• Wide operating temperature range (Ta = -20-+75°C)
GND OUTPUT
APPLICATION
General purpose, for use in industria I and consumer
NC: NO CONNECTION
equipment.
Outline 14P4
The use of Schottky TTL technology has enabled the CI RCUIT SCHEMATIC
achievement of input high breakdown voltage, high speed, (EACH BUFFER) r---r---r-----r----D Vee
low power dissipation, and high fan-out. 19k 2.7k 100
When all inputs A, B, C and D are high, output Y is low
and when one or more of the inputs is low, Y is high.
'--"/'/\;--t----{; Y
FUNCTION TABLE OUTPUT
A N Y
L L H
H L H
L H H
~~~------4--4---CGND
H H L
UNIT: Q
N=S'C'O
ABSOLUTE MAXIMUM RATINGS<Ta=-20-+75°c. unless otherwise noted)


VI Input voltage -·0.5 - + 15 V
• MITSUBISHI
.... ELECTRIC 2-57
MITSUBISHILSTTLs
M74LS40P
DUAL 4-INPUT POSITIVE .NAND BUFFER
RECOMMENDED OPERATING CONDITIONS<Ta=-20-+7s·c. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH<i:;2.7V 0 -1.2 rnA
VOL-:;;0.4V 0 12 rnA
IOL ILow-lev~1 output curre/"t
VOL-:;;O.SV 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +7S·C. unless otherwise noted)
Limits
Symbol! Parameter Test conditions Unit
Min Typ* Max
VIC Input clamp voltage. VCC=4.7SV.IIC-- 18rnA -1.5 V
VOH High-level output voltage Vee-4.7SV. VI-0.8V. 10H- -1.2rnA 2.7 3.4 V

Vee=4.7SV I IOL-12rnA 0.25 0.4 V
VI=2V I I OL=24 rnA 0.35 0.5 V
Vee=S.2SV. VI=2.7V 20 J.lA
Vee=S.2SV; VI=10V 0.1 rnA
IlL Low-level input current Vee-S.2SV. VI-0.4V -0.4 rnA
los Short-circuit output current (Note 1) Vee-S.2SV. VO-OV -30 -130 rnA
leeH Supply current. all outputs high Vee-S.2SV. VI-OV 0.45 1 rnA
leeL Supply current, all outputs low Vee-S.2SV. VI-Open 3 6 rnA
* : All typical values are at Vee = SV. T a = 2S'C
SWITCHING CHARACTERISTICS <Vee=SV. Ta=2S·C. unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time CL=4SpF 7 24 ns
tpHL High-to-Iow-Ievel output propagation time (Note 21 20 24 ns

INPUT Vee OUTPUT
PG OUT
A-O
SOQ
y
(1) The pulse generator (PG) has the following ~haracteristics:
PRA = lMHz. tr = 6ns l tf = 6ns, tw = 500ns,

Vp =3Vp.p. Zo =5011.
.• MITSUBISHI
2-58 ;'ELECTRIC
MITSUBISHI LSTTLs
M74LS42P
BCD· TO·DECIMAL DECODER
DESCRIPTION
provided with a BCD-to-decimal decoder function_
Vee
FEATURES
• All outputs set high with reactive input
• Usable as a 3-bit binary/octal decoder
.... DB
• Wide operating temperature range (Ta=-20~+75°C) INPUTS
OUTPUTS .... De
APPLICATION Do
equipment_ --+ Y,j
--+ ~ OUTPUTS
GND -+ Y1 .
When inputs DA , DB, Dc and DD are specified in BCD
code, the output corresponding to the number among
YO~Y9 is set low and all the other 9 outputs are set high.
When a binary number of 10 or more is applied to DA ~DD' Outline 16P4
all the outputs ~re set high.
BLOCK DIAGRAM
OUTPUTS
I
I
DB De Do GND
INPUTS
• MITSUBISHI
.... ELECTRIC 2-59
MITSUBISHI LSTTLs
M74LS42P
BCD· TO-DECIMAL DECODER
FUNCTION TABLE
Decimal Do Yg
number De Os DA Yo YI Yz Y3 Y4 Ys Y6 Y7 Ya
0 L L L L L H H H H H H H H H
1 L L L H H L H H H H H H H H
2 L L H L H H L H H H H H H H
3 L L H H H H H L H H H H H H
4 L H L L H H H H L H H H H H
5 L H L H H H H H H L H H H H
6 L H H L H H H H H H L H H H
7 L H H H H H H t-l H H H L H H
S H L L L H H H H H H H H L H
9 H L L H H H H H H H H H H L
10 H L H L H H H H H H H H H H
11 H L H H H H H H H H H H H H
12 H H L L H H H H H H H H H H
13 H H L H H H H H H H H H H H
14 H H H L H H H H H H H H H H
15 H H H H H H H H H H H H H H
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C, unlessotherwisenoted)

VI Input voltage -0.5- + 15 V
Topr Operating free-air ambient temperature range ~20-+75 'C
Tst9 Storage temperature range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH"62.7V 0 -400 J-IA
VOL~0.4V 0 4 mA
VOL~0.5V 0 S mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75"C. unless otherwise noted)
Limits
Min Typ Max
*
VIL Low-level input voltage O.S V
Vie Input ciamp voltage Veo=4. 75V, 110= -ISmA -1.5 V
Vee-4.75V, VI=O.SV
VI=2V , IOH= -400J-lA

VoO=4.75V I IOL =4mA 0.25 0.4 V
VI=O.SV. VI=2V I IOL=SmA 0.35 0.5 V
VoO=5.25V, VI=2.7V 20 J-IA
Voo=5.25V, VI-IOV O. I mA
IlL Low-level input current Voo=5.25V, VI=0.4V -0.4 mA
loS Short-circuit output current (Note 1) Voo=5.25V, Vo=OV -20 -100 rnA
Ice Supply current VOO=5.25V (Note 2) 7 13 rnA
*: All typical values are at Vee = 5 V. Ta = 25°C

Note 2: Icc is measured with all inputs at av.
• MITSUBISHI
2-60 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS42P
BCD-TO-DECIMAL DECODER
SWITCHING CHARACTERISTICS (Vcc=SV. Ta=2S·C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-low-Ievel output 8 25 ns
tPHL propagation time, gate 2 14 25 ns
CL= ISpF (Note 3)
tPLH Low-to-high·[evel, high-to-low-Ievel output 12 30 ns
tpHL propagation time, gate 3 12 30 ns

INPUT Vee OUTPUT
INPUT
OUTPUT
(GATE 31
(1) The pulse generator (PG) has the following characteristics: OUTPUT
PRR;=;lMHz, t r=6ns, tf=6ns, t w =500ns. Vp=3Vp.p, ZO=50n (GATE 21
APPLICATION EXAMPLES
(1) 4-bit binary/hexadecimal decoder (2) 3-bit binary/octal decoder with enable input
DA DA
Yo
DB DB DA Y, Y,
INPUTS M74LS42P Y, Yz
De Dc INPUTS DB ....- - - 1 08 Y3
OUTPUTS
Y,
Do Do Dc .;...----1 DC Ys
Y6
ENABLE INPUT E __- - - I Do Y7
OUTPUTS
Yo
Y,
DB
M74LS42P Y,
'----JOe
YsM74LS04P
Outputs marked with * are provided from both decoders.
• MITSUBISHI
.... ELECTRIC 2-61
MITSUBISHI LSTTLs
M74LS47P
BCD.TO· 7.SEGMENT DECODER/DRIVER (ACT I VE·LOW OUTPUT)

provided with BCD-to-7-segment decoder/driver function
and open collector outputs_
(
Vee
FEATURES BCD INPUTS {
--+T
• Suitable for 7-segment display element lighting
LAMP TEST
• RBi input and Bi/RBO outputs for zero suppression. INPUT
• LT input for lamp testing BLANKING _ _

INPUT/RIPPLE BI!RBO_ 4
• BI/RBO input for extinguishing all segments BLANKING SEGMENT
OUTPUT OUTPUTS
• Open co11ector outputs RIPPLE
BLANKING
• Wide operating temperature range (Ta=-20~+75°C) INPUT { 00--+
BCD INPUTS
APPLICATION
General" purpose, for use in industrial and consumer
GNO
equipment.
FUNCTIONAL DESCRIPTION *: OPEN COLLECTOR OUTPUTS

When a number is designed in BCD code for BCD inputs Outline 16P4
DA , Ds , Dc and DD, segment outputsa~gare set low in
accordance with that number. By connecting the 7-segment of the status of the other inputs. The luminous intensity
display element to each of the outputs, the. character can be controlled by applying pulses.
indicated on the display character can be displayed. a~g are Since Sf/ RBO serves as both an input and output pin,
open collector outputs with a breakdown voltage of not less only ICs with open collector outputs can be connected to
than 15V and a low-level output current of 24m A, thereby this pin.
making it possible to directly drive a 7-segment LED for the By setting lamp test input LT low, a~g are set low
display of anode-common numbers. irrespective of the status of BI/RBO, DA , D s , Dc and DD,
Suppression of the high-order unnecessary zeroes is all the segments in the display element are lighted and each
possible by setting the highest order RBI ripple blanking segment can be tested.
input low and connecting ripple blanking output BJ/RBO Except for that pins 6 and 9 differ in character from the
to the next-order RBi for each of the digits. (Refer to the M74LS47P has exactly the same functions, pin connections
application example.) '-
and characteristics as the M75LS247P.
By setting blanking input BI/RBO low, outputs a~g are
set high and the display element is extinguished irrespective
BLOCK DIAGRAM .: OPEN COLLECTOR OUTPUTS
SEGMENT OUTPUTS
BCD INPUTS INPUT/RIPPLE

BLANKING OUTPUT
• MITSUBISHI
2-62 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS47P
BCD-TO-7-SEGMENT DECODER/DRIVER (ACTiVE-LOW OUTPUT)
FUNCTION TABLE (Notel)
Decimal number Of function LT RBI Do De DB DA BI/RBO a b c d e , 9 Note
0 H H L L L L H L L L L L L H
1 H X L L L H H H L L H H H H
2 H X L L H L H L L H L L H L
3 H X L L H H H L L L L H H L
4 H X L H L L H H L L H H L L
5 H X L H L H H L H L L H L L
6 H X L H H L H H H L L L L L
7 H X L H H H H L L L H H H H
(1)
8 H X H L L L H L L L L L L L
9 H X H L L H H L L L H H L L
10 H X H L H L H H H H L L H L
11 H X H L H H H H H L L H H L
12 H X H H L L H H L H H H L L
13 H X H H L H H L H H L H L L
14 H X H H H L H H H H L I- L L
15 H X H H H H H H H H H H H H
Blanking X X X X X X L H H H H H H H (2)
Ripple blanking H L L L L L L H H H H H H H (3)
Lamp test L X X X X X H L L L L L L L (4)
Note 1. (1) IT is normally kept in high DEFINITION OF SEGMENTS

RBI is kept open or in high with a decimal 0 output.
(2) When BI/RBO is low, all the segment outputs are high irrespective of the status of the other inputs.
(3) All the segment outputs are set high and 81m 80 is set low when IT is'high and RBI, DA. DB, Dc and Do are low.
(4) When IT is low, all the segment outputs are low.
X; Irrelevant
CHARACTERS DISPLAYED
Oe.cim~,IJmhpr 0
.-, ,,
1 2
_I
3
-,
4
1_',
,- ,
5 6
-,
7
I II
8 9
0I
10 11 12
,_I
13
1-
14
,-
15
Character
'-' 1- :1 :' 0 0 C :1
- '-
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C, unlesSOlherwisenoled)

Input BI/RBO -0.5-Vee V
V, Input voltage
Other inputs -0.5-+15 V
Output BI/RBO -O.5-Vee V
Vo Output voltage High-level state
Other outputs -0.5-+15 V
IO(peak) Output current tw~lms, dUlyoyole ~ 10% 200 mA
10 Output current High-level state 1 mA
• MITSUBISHI
"ELECTRIC 2-63
MITSUBISHI LSTTLs
M74LS47P
BCD-TO-7-SEGMENT DECODER/DRIVER (ACTIVE-LOW OUTPUT)
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C,unressotherwisenoted)
Limits
Symbor Parameter Unit
Min Typ Max
VCC Supply voltage 4 75 5 5.25 V

High-level output current,
10H outputs a-9 VOH= 15V 0 250 /LA
High-Ie~ output current,
10H output BI/RBO VOH:;;'2.4V 0 -50 /LA
Low-level output current, VOL"'0.4V 0 12 mA

10L outputs a-g VOL"'0.5V 0 24 mA
Low-level output current, VOL"'0.4V 0 1.6 mA

10L output BI/RBO
VOL"'0.5V 0 3.2 mA
Limits
Symbor Parameter Test conditions Unit
Min Typ* Max
V'H High-level input voltage 2 V

V'L Low-level input voltage 0.8 V
V,C Input clamp voltage VCC=4.75V, I,c= -18mA -1.5 V
VOH High-level output voltage, output BI/RBO VCC=4.75V 10H= -50/LA 2.4 4.2 V
10H High-level output current, outputs a - 9 Vr=0.8V, V,=2V VO=15V 250 /LA
10L= 12mA 0.25 0.4
OutPutsa-g
Vcc=4.75V 10L =24mA 0.35 0.5
VOL Low-level output voltage V
V,=0.8V, Vr=2V 10L = 1. 6mA 0.25 0.4.
Outputs BI/RBO
IOL=3.2mA 0.35 0.5
Vcc=5.25V, Vr=2.7V 20 /LA
I'H High-level input voltage, except input Bl/RBO
Vcc=5.25V, V, = 10V 0.1 mA
rnput BI/RBO -1.2 mA
IrL Low-level input current VCC=5.25V, Vr=0.4V
Other inputs -0.4 mA
los Short-circuit output current. output B IfR 80 VCC=5.25V, VO=OV -0.3 -2 mA
IcC· Supply current Vcc=5.25V (Note 2) 7 13 mA
* All typical values are at Vcc= 5V, Ta= 25°C,
Note 2: Icc is measured with all inputs at 4.5V,
SWITCHING CHARACTERISTICS (Ta= -20-- +75"C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low·to·high-level, high·to-Iow-Ievel output propagation 35 100 ns

RL=665Q
tPHL time, from input OA to outputs a-"9 30 100 ns
CL = 15pF
tpLH Low-to-high-level, high-to-Iow-level output propagation 50 100 ns
t pHL time. from input RBI to outputs a- f (Note 31
45 100, ns

RL
PG DUT
500
(1) The p~lse generator (PG) has the following characteristics:

PRR == lMHz, tr = 6ns. tf = 6ns, tw = 500ns,
Vp = 3Vp.p. Zo = 50".
(2) CL includes probe and jig capacitance,
• MITSUBISHI
2-64 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS47P
BCD-TO-7-SEGMENT DECODER/DRIVER (ACT I VE-LOW OUTPUT)
DA _ _-'I RBI _ _ _J
LEVELS OF
DELAY 2 a-I
LEVELS OF
DELAY 3
(1) Counter using M74LS47P
SUPPLY VOLTAGE
LED
,,
r - - - - - -- -------,
,, ,,i
_ _ _ _J
l
HOLD---r---l h-------- HOLD LATCH
"0" RESET
"0" RESET
I
CARRY DECADE COUNTER
OUTPUT
COUNT INPUT --+------' Connection to

next-stage
M74LS90P,
M74LS290P
1l
count input (f
(2) Zero suppression and light control
103 10' 10' 100
IDIGIT 41 (DIGIT 31 (DIGIT·21 "H" (DIGIT 11
-.,
I
4/6 M74LS05P I
DISPLAY TUBE,
,
I
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ .J
LIGHT CONTROL
PIN
• MITSUBISHI
IIh;.ELECTRIC 2-65
MITSUBISHI LSTTLs
M74LS48P
BCD-TO-7-SEGMENT DECODER/DRIVER (ACTIVE-HIGH OUTPUT)

provided with BCD-to-7-segment decoder/driver function_
FEATURES Vee
BCD INPUTS {
• Suitable for 7-segment display element lighting
• RBI input and Bi/RBO output for zero suppression LAMP TEST
INPUT
• LT input for lamp testing BLANKING
• Bi/RBO input for extinguishing all segments INP~~t~lg~~ BT/RBO_
OUTPUT SEGMENT
• NPN transistor can be externally mounted for High- RIPPLE OUTPUTS
BLANKING
current drive. INPUT
• Wide operating temperature range (Ta=-20~+75°C)
BCD INPUTS {
APPLICATION
GND
equipment.
Outline 16P4
This device resembles the M74LS47P without the output
transistors and when a number is specified in BCD code for
BCD inputs DA , DB, Dc and DD, segment outputs a~g are
set high in accordance with that number. Outputs a~g con-
tain 2n pull-up resistors which are suitable for driving
common-cathode LEOs. By connecting an NPN transistor
to these outputs, it is possible to drive high current display
elements.
The ripple blanking, blanking and lamp test functions
are the same as those f,or the M74LS47P.
Refer to the M74LS47P for the application example.
Except for that pins 6 and 9 differ in character form the
M74LS48P has exactly the same functions, pin connections and characteristics as the M74LS248P.
BLOCK DIAGRAM SEGMENT OUTPUTS

__ ------------------------~A~ __________________________ ~\
i ,
DB De DD ) GND
BLANKING INPUT/RIPPLE LAMP TEST RIPPLE BLANKING
BCD INPUTS BLANKING OUTPUT INPUT INPUT
• MITSUBISHI
2-66 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS48P
BCD-TO-7 -SEGMENT DECODER/DRIVER (ACTIVE-HIGH OUTPUT)
FUNCTION TABLE (Note 11
Decimal number or function LT RBI Do De DB DA BI/RBO a b c d e f g Note

0 H H L L L L H H H H H H H L
1 H X L L L H H L H H L L L L
2 H X L L H L H H H L H H L H
3 H X L L H H H H H H H L L H
4 H X L H L L H L H H L L H H
5 H X L H L H H H L H H L H H
6 H X L H H L H L L H H H H H
7 H X L H H H H H H H L L L L
(1)
8 H X H L L L H H H H H H H H
9 .H X H L L H H H H H L L H H
10 H X H L H L H L L L H H L H
11 H X H L H H H L L H H L L H
12 . H X H H L L H L H L L L H H
13 H X H H L H H H L L H L H H
14 H X H H H L H L L L H H H H
15 H X H H H H H L L L L L L L
Blanking X X X X X X L L L L L L L L (2 )
Ripple blanking H L L L L L L L L L L L L L (3)
Lamp test L X X X X X H H H H H H H H (4)
Note 1. (1) LT is normally kept in high.
RBI is kept open or in high with a decimal 0 output.
DEFINITION OF SEGMENTS
(2) When Bl/RBO is low, all the segment outputs are low irrespective of the status of the other inputs.
(3) All the segment outputs are set high andBi/RBO is set low when IT is high and RBI, 0A. Os. DC and Do are low.
(4) When IT is low, all the segment outputs are high.
X: Irrelevant
Decirgt1mber 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Character
n
u
I
I c l
3 U
I 5 b 'I
I 8 g C :J
u c
- I:
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C, unless otherwise noted)

Input B I/ RBO -0.5 -Vee V
VI Input voltage
Other inputs -0.5- +15 V
Output BI/RBO - 0.5 -Vee V
qther outputs -0.5-Vee V
Tstg Storage temperature range -65- + 150 'c
RECOMMENDED OPERATiNG COi'liu.iTiOi'liS (Ta=-20- +75'C, unlessolherwisenoted)
Limits
Min Typ Max

High-level output current,
IOH VOH~2.4V 0 ~ 100 pA
outputs a- 9
High-lev~outPut current;
IOH VOH""2.4V 0 -50 pA
output BI/RBO
.Low-Ievel output current, VOL"; 0 .4V 0 2 mA
IOL outputs a-g
VOL"; 0 .5V 0 6 mA
VOL";0.4V 0 1 .6 mA
Low-level outout current,
IOL output BiIRBO VOL";0.5V .0 3 .2 mA
•. MITSUBISHI
"'ELECTRIC 2-67
MITSUBISHI LSTTLs
M74LS48P
ELECTRICAL CHARACTERISTICS (Ta= -20- +70'0. unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage VcC=4.75V.llc=-18mA -1.5 V'
Outputs a -- 9 Vcc=4.75V IOH=-100/lA 2.4 4.2 V
VOH High-level output voltage
Output BI/RBO VI=0.8V. VI=2V 10H= -50/lA 2.4 4.2 V
IOH High-level output current Outputs a - 9 VcC=4.75V. VI=0.8V. VI=2V. Vo=0.85V -1.3 -2 mA
IOL=2mA 0.25 0.4 V
Outputs a-g
VCC=4.75V IOL=6mA 0.35 0.5 V
VI=O .8V. VI=2V IOL=1.6mA 0.25 0.4 V
Output Bi/R BO
IOL=3.2mA 0.35 0.5 V
Vcc=5.25V. VI=2.7V 20 /lA
IIH High-level input current ~~~~;Sthan Bi/RBO
Vcc=5.25V. VI=10V 0.1 mA
Input BI/RBO -1.2 mA
IlL Low-level input current VCC=5 25V. VI=O .4V
Other inputs ~0.4 mA
los ,Short-circuit output current . Output BI/RBO VCC=5 25V. Vo=OV -0.3 -2 .mA
Icc Supply current VcC=5.25V INote 21 25 38 mA
* . All typical values are at Vee= 5V, Ta= 25°C.
Note 2: Icc is measured with all inputs at 4.5V.
SWITCHING CHARACTERISTICS (VCC=5V. Ta=25'O. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation RL=4kQ 30 100 ns
tPHL time. from input DA to outputs a - g CL=15pF INote 31 30 100 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation RL=6kQ 40 100 ns
tpHL time, from input RBI to outputs a - f CL=15pF INote31 45 100 ns
R)
PO DUT
PRR= 1MHz. t,=6ns, tf=6ns. tw= 500ns. Vp=3Vp.p. ZO= 5012.
5011 (2) C L includes probe and jig capacitanc~
LEVELS OF
DELAY 2
LEVELS OF
DELAY 3
• MITSUBISHI
2-68 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSS1P
DUAL 2-WIDE 2-INPUT/3-INPUT AND-OR-INVERT GATE
DESCRIPTION
The M74LS51 P is a semiconductor integrated circuit PIN CONFIGURATION (TOP VIEW)
containing dual 2-wide 2-input/3-input AND-DR-INVERT
gates.
FEATURES Vee
• High breakdown input voltage (VI ~ 15V) 1C
• Low power dissipation (Pd =5.5mW typical) INPUTS 1B
• High speed (t p d=7ns typical)
• Low output impedance 1F INPUTS
• Wide operating temperature range (Ta=-20~+75°C) 1E
APPLICATION 10
General purpose, for use in industrial and consumer 1Y OUTPUT

equipment.
Schottky TTL technology enables input high breakdown Outline 14P4
voltage, high speed, low power dissipation and high fan-out.
This device consists of a NOR gate with two 2-input CIRCUIT SCHEMATIC
AND gates as the inputs and a NOR gate with two 3-input ,---,------;----r--oVee
AND gates as the inputs, and the following logical 20k 20k 7.6 k 120
expressions are yielded:

2A.1A
lY -IA ·18 ·IC + 1D·1E ·IF 2B,1B

2Y, 1Y
2Y =2A ·28 +2C '2D 1C
'"f- OUTPUT
it
z
2C,1O
20,1E
FUNCTION TABLE
1F
M N Y
L4~4-~------~-~__oGNO
L L H
H L L UNIT: Q
L H L
H H L
M=1A·1B·1C
N=1D·1E·1F
AND-DR
M=2A'2B
N=2C'2D

VI Input voltage -0_5-+15 V
Tstg Storage temperature range- -65-+150 'c
• MITSUBISHI
""'ELECTRIC 2-69
MITSUBISHI LSTTLs
M74LSS1P
DUAL 2·WIDE 2.INPUT/3.INPUT AND·OR·INVERT GATE.
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S"C. unless otherwise noted)
limits
Min Typ Max
10H High-level output current VOH;:2.7V 0 -400 !J.A

VOL';;0.4V 0 4 rnA
tOL Low-level output current
VOL';; 0 .SV 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta = -20- +7S·C. unless otherwise noted)
Limits
Min Typ * Max
VIO Input clamp voltage VcC=4.75V.llc=-18rnA -1.5 V
VCC=4.75V. VI=0.8V
IOH= - 400!J.A

VcC=4.7SV I IOL=4mA 0.25 0.4 V
VI=2V I IOL=8mA 0.35 0.5 V
VCO=S.2SV. VI=2. 7V 20 !J.A
VCO=S.2SV. V,=10V 0.1 rnA
I,L Low-level input current VcC=S.2SV. VI=0.4V -0.4 rnA
los Sho~t-cjrcujt output current (Note 1) Vcc=S .2SV. VO=OV -20 -100 rnA
IOOH Supply current, all outputs high VOo-S .2SV. VI-OV 0.8 1.6 rnA
IOOL Supply current, all outputs low Voo=S.25V. V,=4.SV 1.4 2.8 mA
* All typical values are at Vcc= 5V, To= 25"'C),
Note.1: All measurements must be done quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS <VOo=SV. Ta=2S'C, unless otherwise noted)
Limits
Min Typ Max
tPLH Low-to-high-Ievel output propagation ti me CL=lSpF 6 20 ns
tPHL High·to-Iow·level output propagation time INote 2) 8 20 ns

INPUT Vee OUTPUT
A-F
DUT
y
SOQ

PR R=1 MHz, t r=6ns, tf=6ns, t w =500ns, Vp ",' 3Vp.p, Zo = 50n.
(2) C l includes probe and jig capacitance.
• MITSUBISHI
2-70 .... ELECTRIC
MITSUBISHI LS.TTLs
M74LS73AP
DUAL J·K NEGATIVE EDGE·TRIGGERED FLIP FLOP WITH RESET

The M74LS73AP is a semiconductor integrated circuit
containing 2 J-K negative edge-triggered flip-flop circuits
with discrete terminals for clock input T, inputs J and K
and direct reset input RD.
CLOCK INPUT ..... 1J. INPUT
FEATURES DIRECT ~~~G::: lAO ..... ..... 10 } OUTPUTS

• Negative edge-triggering INPUT lK ..... ..... lQ
• Each flip-flop can be used independently
Vee GND
• Direct reset input
• a and Q outputs CLOCK INPUT 2T ..... ..... 2K INPUT
• Wide operating temperature range (Ta = -20~+75°C) 01 RECT ~~~G::: 2RO .....
..... 20 }
_ OUTPUTS
INPUT 2J ..... ..... 2Q
APPLICATION
equipment.

While T is high, signals J and K are put in the read-in state,
FUNCTIONAL TABLE (Note 11
and when T changes from high to low, the J and K signals
immediately before the change emerge in outputs a and Q T RD J K Q Q
X L X X L H
in accordance with the function table. By setting RD low,
a and Q are set low and high respectively irrespective of the t H H H Toggle
status of the other input signals. For use as a J-K flip-flop, t H L H L H

t H H L H L
RD must be kept high.
t H L L QO QO
Also available is M74LS107AP with the same functions
and electrical characteristics. This offers easy mounting
H H X X QO on
with Vee positioned at pin 14 and GND at pin 7. Note 1 !: Transition from high to low-level (negative edge trigger)
X : Irrelevant
QO: level of Q before the indicated steady-state input conditions were established.
Q 0 : level of 0. before the indicated steady-state input conditions were established.
Togg Ie : complement of previous state with ~ transition of outputs
BLOCK DIAGRAM (EACH FLIP-FLOP)
OUTPUT QQ----;--<l{ b--+----DQ OUTPUT
DIRECT _
RESETRDQ---t-------~_r~----~-_r---__,
INPUT
INPUT K Q - - - - - - - - ' - - j \ - - - - - - O J INPUT
T
CLOCK INPUT
.• MITSUBISHI
.... ELECTRIC 2-71
MITSUBISHI LSTTLs
M74LS73AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH RESET
V, I nput voltage -0.5-+ 15 V
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C, unlessotherwisenoted)
limits
Min Typ Max

High-level output current VOH;;'2.7V -400 I-'A
10H
VOL"'0.4V
°0 4 rnA
10L LOW-level output current
VOL"'0.5V 0 B rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C, unless otherwise noted)
Limits
Min Typ Max
*
V,L LOW-level input voltage O.B V
Vie Input clamp voltage Vee=4.75V,I,e=-lBrnA -1.5 V
Vee=4. 75V, V1 =O.BV
VOH High-level output voltage 2.7' 304 V
VI=2V . 10H= -4001-'A

Vee=4.75V I IOL=4rnA 0.25 0.4 V
V,~O.BV, V,=2V I 10L=BrnA 0.35 0.5 V
J, K 20 I-'A
Vee=5.25V
AD 60 I-'A
V,=2.7V
T BO I-'A
J, K 0.1 rnA
Vee=5.25V
AD 0.3 rnA
V,=10V
T 0.4 rnA
J, K Veo=5.25V -0.4 rnA
LOW-level input current
I,L AD T V,=0.4V -O.B rnA
los Short-circuit output current (Note 2) Veo=5.25V, VO=OV -20 -100 rnA
100 Supply current Voo=5.25V (Note 3) 4 6 rnA
* : ,All typical values are at Vee =5 V, Ta = 25~C
Note 3: Supply curr-ent measurements shoul,d be done with Q and Q set alternately high and T should be set 'low during actual measurement.
Limits
Min Typ Max
fmax Maximum clock frequency 30 45 MHz
tpLH Low·to-high-Ievel, high-to·low-Ievel output propagation a 20 ns
tpHL time, from T to Q. Q CL= 15pF (Note4) 6 20 ns
tpLH Low-to-high·level, high-to· low-level output pro,pagation 10 20 ns
tpHL time, from AD to Q, Q 7 20 ns
•. MITSUBISHI
2-72 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS73AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH RESET
INPUT Vee OUTPUT

PRR = 1 MHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp_p, Zo = 50n_
TIMING REQUIREMENTS (Vec=5V, Ta=25·C.unlessotherwisenoted)
Limits
Min Typ Max
tw(TH) Clock input T high pulse width 20 12 ns
IW(RO) Direct reset input pulse width 25 4 ns
Ir Clock rise time 650 100 ns
If Clock fall time 900 100 ns

ISU(H) Setup time high T to J. K 20 9 ns
tsu(L) Setup time low T to J. K 20 10 ns
th(H) Hold time high T,to J, K 0 -8 ns
Ih(L) Hold time low T to J, K 0 - 5 ns
TIMING DIAGRAM (Reference l.!lvel = 1.3V)
tSU(L) Ih(L) Isu (H) Ih (H) tW(R~)
Note: The shaded areas indicate when the input is permitted to change for
predictable output performance.
APPLICATION EXAMPLE
High-speed 1/3 divider
QA
T
JLJ"UL
-J 1 J 1 Qs
-CT -CT
QA
~
"H"
'1 K
Ro
I
0 - -K
Ro oil Qs
-IL
YzM74L573AP YzM74L573AP
T
Ro
• MITSUBISHI
.... ELECTRIC 2-73
MITSUBISHI LSTTLs
M74LS74AP
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOPS WITH SET AND RESET
DESCRIPTION
The M74LS74AP is a semiconductorintergrated circuit
containing 2 D-type positive edge-triggered flip-flop circuits
with discrete terminals for clock input T, data input D and
direct set and reset inputs So and Ro.
vee
DIRECT
FEATURES DATA INPUT RESET INPUT
• Each flip-flop can be used independently. CLOCK INPUT DATA INPUT

• Direct set and reset inputs
DIRECT CLOCK INPUT
• Positive edge-triggering SET INPUT
• Q and IT outputs I Q +--5 DIRECT

SET INPUT
• Wide operating temperature range (Ta = -20 ~ +75°C) OUTPUTS { _
lQ +-- 6
9 - 2Q }
APPLICATION GND
~===W
, 8 -
-
2Q
OUTPUTS

equipment.
FUNCTIONAL DESCRIPTliON Outline 14P4

When T changes from low to high, the D signal immediately
before the change emerges· in outputs Q and IT in LOGIC DIAGRAM
accordance with the function table. By using So and R o , (EACH FLIP-FLOP)
this IC can be made into a direct R·S flip-flop. When both
So and Ro are low, Q = IT = high. However, when both of
.~"
them change to high at the same time, the status of Q and
1W~~1~~~Ql
IT cannot be anticipated. For use as a D-type filip-flop,
~h1,l ' =~
So and Ro must be kept in high.
FUNCTION TAB LE
DIRECT _
So Ro T D Q Q RESET Ro
INPUT
L H X X H L
H L x' X L H
L L X X
H • H •
H H L X QO QO
H H 1 H H L
H H t L L H
Note 1: t : Transition from low to high·level
QO: level of Q before the indicated steady-state input co~ditions were established.
Q5: level of Q before the indicated steady-state input conditions were established.
X : Irrelevant
* : Nonstable; it will not persist when AD, SO inputs return to their in-
active (high) level.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+751:. unlessotherwisenoted)

V, Input voltage -0.5- +5.5 V
Va Qutp ut vo ltage High-level state -0.5- Vee V
Topr Operating free-air ambient temperature range -20-+75 1:
Tstg Storage temperature range -65- +150 1:
• MITSUBISHI
2-74 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS74AP
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOPS WITH SET AND RESET
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75t, unlessotherwisenoted)
Limits
Min Typ Max
Vec Supply voltage 4.75 5 5.25 V

High-level output current VOH;;:'2.7V -400
10H
° 4
"A
mA
VOL"'0.4V
VOL"'0.5V
° 8 mA
°
ELECTRICAL CHARACTERISTICS (Ta=-20-+75t, unless otherwise noted)
Limits
Min Typ* Max
V,c I nput clamp voltage Vee=4.75V, I,c= -18mA -1.5 V
Veo=4.75V, V,=0.8V, V,=2V
10H = - 400,uA

Voo=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8mA 0.35 0.5 V
D, T 20
Veo=5.25V, V,=2.7V
So, RO 40 "A
"H 0.1
D, T
Voo=5.25V, V,=10V
So, Ro O. ~ mA
D, T -0.4
"L Low-level input current Voo=5.25V, V,=0.4V
SO, Ro -0.8 rnA
los Short-circuit output current INote 21 Voo=5.25V, VO=OV -20 -100 rnA
100 Supply current Voo=5,25V, INote31 4 8 mA
* : All typical values are at Vee = 5V, T8 = 25°C.

Note 2; All measurements should be done quickly, and not more than one output should be shorted at a time.
SWITCHI NG CHARACTERISTICS (V'00=5V, Ta =25t, unless otherwise noted)
Limits
Min Typ Max
f max Maximum clock frequency 25 50 MHz
tpLH Low-to-high·level, high-to-Iow-Ievel output propagation 11 25 ns
tpHL time, from T to Q. Q CL=15pF 11 40 ns
tpLH Low-to-high-Ievel, high-to·low-Ievel output propagation (Note 41 8 25 ns
tpHL time, from SO. RO to Q, Q 11 40 ns

INPUT Vee OUTPUT

PRR = 1MHz, tr "" 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp.p, Zo = 5011
• MITSUBISHI
...... ELECTRIC 2-75
MITSUBISHI LSTTLs
M74LS74AP
DUAL D- TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOPS WITH SET AND RESET
TIMING REQUIREMENTS (Vcc=5V, Ta=25"C, unlessotherwisenoted)
Limits
Min Typ Max
tw(TH) Clock input T high pulse width 25 4 ns
tw (so, Ro) Direct set and reset inputs So, RD pulse width 25 4 ns
tSU(OH) Setup time high 0 to T 20 10 ns
tSU(oL) Setup time low 0 to T 20 8 ns
th(DH) Hold time high 0 to T 5 -5 ns
th(DL) Hold time low 0 to T 5 -5 ns

tSU(OL) lh(oL) Isu(oH) lh(OH)
lw (So)
Q Q
Note' 4: The shaded areas indicate when the input is permitted to change for
APPLICATION EXAMPLE
%divider
r----------------- QA
"H"-----_~---+-------.
1 -f----<
L ~~-f---
o So 1 Qs
T----IT '--------I T
Qs _ _ _~
L
Ro 0 - - Ro 0 -
~ ________~T__________~I
• MITSUBISHI
2-76 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS75P
4-BIT BISTABLE LATCH
DESCRIPTION
taining 4 bistable latch circuits and is provided with outputs
QandQ.
OUTPUT
FEATURES
• Enable inputs common to two circuits each DATA {1O --+ 2
INPUTS
20--+
• Q and Q outputs
• Wide operating temperature range (Ta = -20 ~ +75°C) E~~~G~ HE --+ 4
Vee
APPLICATION
General purpose, for use in industrial and consumer 30--+ 6
DATA {
equipment. INPUTS 40--+
FUNCTIONAL DESCRIPTION OUTPUT 40-

This device contains 4 D-type latch circuits and is provided
with enable inputs E common to 2 circuits each. When E is
Outline 16P4
high, the information from the data input D appears in the
outputs Q and Q. When the D signal changes, the signal that
appears in outputs Q and Q also changes. When E changes BLOCK DIAGRAM (EACH LATCH)
from high to low, the status of D immediately before the
change is latched_ While E is low, the status of Q and Q
does not change even if D is changed.
Also provided is the M74LS375P with the same func-
DATA -\
tions and electrical characteristics. With the Vee positioned ""C, '~. Q jPUTS
OUT
at pin 16 and GND at pin 8, this device makes for easy ENABLE E Q
INPUT
mounting.
THE OTHER LATCHES
FUNCTION TABLE INote 11
·I~-----:--~-+-----:----~~---:_Q----~-----:----~
L X QO QO
Note 1 QO, QO: Level of Q and Q before the indicated steady-state input conditions
were established.
X : Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C. unlessotherwisenoted)

V, I nput voltage -0.5-+15 V
Vo Output voltage High-level state -0.5-+Vec V
T81g Storage temperature range -65- + 150 "C
• MITSUBISHI
.... El:.ECTRIC 2-77
MITSUBISHI LSTTLs
M74LS75P
4·BIT BISTABLE LATCH
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +751:. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH;;;2.7V 0 - 400 I,A
VOL":0.4V 0 4 mA
10L Low·level output current
VOL":0.5V 0 8 mA
,
ELECTRICAL CHARACTERISTICS (Ta= -20- +751:. unlessothe,wise noted)
Limits
Min Typ * Max
V,L Low·level input voltage O.S V
V'c Input clamp voltage Vcc=4. 75V. l,c=-18mA - 1.5 V

VCC=4.75V. V, =O.SV
V, =2V. IOH= - 4001' A

VCC=4.75V I 10L.=4mA 0.25· 0.4 V
V, =O.SV. V, =2V I IOL=SmA 0.35 0.5 V
0 VCC=5.25V 20
J1A
E V, =2.7V SO
I'H High·level input current
0 Vcc=5.25V 0.1
mA
E V, = 10V 0.4
0 VCC=5.25V -0.4
I,L Low-level input current mA
E V, =0.4V -1.6
los Short-circuit output current (Note 2) Vcc=5.25V. VO= 0 V ~20 -100 mA
ICC Supply current VCC= 5.25V {Note3) 6.3 12 mA
* : All typical values are atVcc=5V, Ta='2SQC
'SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C. unlessotherwisenoted)
Limits
Min Typ Max
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 12 27 ns
t PHL time, from input 0 to output Q 8 17 ns
tPHL time, from input 0 to output Q 6 15 ns
CL=15pF INote 4)
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 13 ~7 ns
tPHL time, from input E to ou'tput Q 12 25 ns
tPLH Low-to-high-Ievel, high-to-Iow-Ievet output propagation 12 30 ns
tPHL time, from input E to output Q 6 ns
15
INPUT Vee OUTPUT

PRR" lMHz. t," 6ns. tf" 6ns.lw" 500ns.
Vp "3Vp.p. Zo" 50n.
(2) C L includes probe and jig capacitance.
• MITSUBISHI
2-78 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS7SP
4·BIT BISTABLE LATCH
TIMING REQUIREMENTS (Vcc=5V, Ta=25·C, unlessotherwisenoted)
Limits
Min Typ Max
tW(EH) Enable input E high pulse width , 20 7 ns
tsu(O) Setup time 10 - 40 to E 20 12 ns
th (0) Hold time 10 - 40 to E 8 5 ns

tW(EH)
1-2E
10-40
3-4E
10-40 1Q-4Q
1Q-4Q
High-level 3-4E, 1-2E
' . MITSUBISHI
.... ELECTRIC 2-79
MITSUBISHI LSTTLs
M74LS76AP
DUALJ·K NEGATIVE EDGE·TRIGGERED FLIP FLOP WITH SET AND RESET
DESCRIPTION
and direct set and reset inputs So and Ro. CLOCK INPUT +-- lK INPUT
OIREC~~Gi lSQ --+ 2 --+ lQ }

FEATURES _ OUTPUTS
• Negative edge-triggering DIRECT ~~~Gi lRo --+ --+ lQ
• Each fli-flop can be used independently INPUT lJ GND

Vee +-- 2K INPUT
• Q and IT outputs
• Wide operating temperature range (Ta = -20-+75°C) CLOCK INPUT 21' --+ 2Q }
_ OUTPUTS
DIRE7N~Gi 280 --+ --+ 2Q
APPLICATION
DIRECT ~~~Gi 2Ao :-
equipment.
FUNCTIONAL DE.SCRIPTION Outline 16P4

While T is high, signals J and K are put in the read-in state, FUNCTION TABLE INotell
and when T changes from high to low, the J and K signals T SD RD J K Q Q
immmediately before the change emerge in outputs Q and x L H X X H L
Q in accordance with the function table. By using So and X H L X X L H
Ro this IC can be made into a direct R-S flip-flop. When X L L X X H* H*
both So and Ro are low, Q = Q = high. However, when ~ H H H H Toggle
both of them change to high at the same time, the status of ~ H H L H L H
Q and Q cannot be. anticipated. For use as a J-K flip-flop, ~ H H H L H L
So and Ro must be kept in high. ~ H H L L QO QO
Also available is M74LS112AP with the same functions H H H X X QO QO
and electrical characteristics. This offers easy mounting Note 1 ! : Transition from high to low·level (negative edge trigger)
with Vee positioned at pin 16 and GND at pin 8. X : Irrelevant
* : Q = Q = high when'S[) = R'[) = low and so when both So and RO are
set high, the status of Q and Q cannot be anticipated.
on: level of Q before the indicated steady-state input conditions were established.
Toggle: Complement of previous state with'!' transition of outputs
OUTPUT Q 0-----.-0<. b-+---DQ OUTPUT
D~~m Ro()----t-------t-"4-r-t--" /~-++....+_------+----oSO ~~~ECT

INPUT INPUT
INPUT KQ--------I I-------QJ .INPUT
T
CLOCK INPUT
• MITSUBISHI
2-80 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS76AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH SET AND RESET

V, Input voltage -0.5- + 15 V
Limits
Min Typ Max
10H High-level output current VOH"'2.7V 0 -400 "A

VOL;i;0.4V 0 4 rnA
VOL;i;0.5V 0 S mA
Limits
Min Typ * Max
V'L Low-level input voltage O.S V
V,e Input clamp voltage Vee=4.75V, I,C= -ISmA -1.5 V
Vce=4. 75V. V,=O.SV
V,=2V, 10H= -400"A
VOL High-level input current

Vcc=4.75V I 10L =4mA 0.25 0.4 V
V,=O.SV, V,=2V I 10L =SrnA 0.35 0.5 V
J, K 20
Vcc=5.35V
SO, RO 60 "A
V,=2.7V
T SO
"H Low-level input current
J, K 0.1
V~e=5.25V
SO,R O 0.3 mA
V,=IOV
T 0.4
J, K Vce =5.25V -0.4
"L Low-level output voltage
So,R o , T V,=0.4V (Note 21 -O.S rnA
los Short-circuit output current (note 3) Vcc=5.25V, VO=OV -20 -100 rnA
IcC Supply current Vee=5.25V (Note 41 4 6 rnA
* : All typical values are at VCC=5V, Ta=2S"C

Note 2: So and RD should not both be set to DAV simultaneously.
Note 4: Supply current measurements should be done with Q and Q set alternately high and f should be set low during actual measurement.
SWITCHING CHARACTERISTICS (Voo=5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 6 20 ns
tpHL time, from T to Q. Q C L = 15pF (Note 51 7 20 ns
tpHL time, from Sci, RO to Q, Q 7 20 ns
• MITSUBISHI
..... ELECTRIC 2-81
MITSUBISHI LSTTLs
M74LS76AP
DUAL J·K NEGATIVE EDGE·TRIGGERED FLIP FLOP WITH SET AND RESET
TIMING REQUIREMENTS (Vcc= 5V, Ta=25t, unless otherwise noted)
Limits
Min Typ Max
tW(TH) Clock input T high pulse width 20 12 ns
tW(So.Ro) Direct S8t. reset pulse width 25 4 ns
t r Clock rise time 650 100 ns

ISU(H) Setup time high J, K to T 20 12 ns
ISU(L) Setup time low J. K to T 20 12 ns
Ih (H) Hold time high J. K to T a -10 ns
t h (l) Hold time low J. K to T a -6 ns
INPUT Vee OUTPUT

PRR = lMHz, tr = 6ns. tf = 6ns. tw = 500ns,
Vp = 3Vp.p, Zo = 50n.
J,K
Note: The shaded areas indicate when the input is permitted to change for predict-
able output performance.
• MITSUBISHI
2-82 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS83AP
4-BIT BINARY FULL ADDER WITH FAST CARRY
DESCRIPTION
The M74LSB3AP is a semiconductor integrated circuit
containing a 4-bit binary look ahead carry type full adder_
INPUT A4 +- B4 INPUT
FEATURES
• High speed with look-ahead carry addition OUTPUT 2:3 -i' 2:4 OUTPUT
• Possible configuration of systems with partial look-ahead CARRY
I A3 -+ C4
OUTPUT
carry INPUTS CARRY
• Wide operating temperature range (Ta=-20~+75°C) +- Co INPUT
Vee GND
APPLICATION . B,
OUTPUT 2:2
General purpose, for use in industrial and consumer ) INPUTS
equipment.
INPUTS i A2 -+
<- A,
2:, OUTPUT
This device performs the addition of two 4-bit binary
numbers. When a 4-bit binary number is applied to inputs
Al ~A4 and Bl ~B4 and the carry signal from the previous Outline 16 P4
digit is appl ied to input Co, the respective bit sum output
and carry outputs for the next upper digit appear in
outputs Ll ~L4 and C4 .
This adder features full internal look ahead across all
four bits generating the carry term in Bns typically. There-
for, the carry output can be obtained in a delay time of
BNns when N-stages are connected and a 4N-bit parallel
adder is configured. (Refer to application example.)
Also available is the M74LS2B3P with the same func-
tions and electrical characteristics and with a pin 16 Vee
and B GND configuration.
BLOCK DIAGRAM OUTPUTS CARRY OUTPUT

----------------~ ~--------------~
Co A, B, A2 B2 A3
~~--~--------------~v~------~----------~--~
CARRY INPUT INPUTS
B3 A4
;>------:1
B4-, GND
• MITSUBISHI
"ELECTRIC 2-83
MITSUBISHI LSTTLs
M74LS83AP
4·BIT BINARY FULL ADDER WITH FAST CARRY
Ok-l Ak 8k Zk Ok
L L L L L
L H L H L Note 1 C k and L; k are the carry output and sum output obtained by
adding Ak, Bk andCk-1 (carry input), and they are expressed
L L H H L
in the following logical expression.
L H H L H Zk= A kEB 8kEBO k-l
H L L H L Ok=Ak' 8k+ (Ak+8k) ·Ok-l
H H L L H Where k= 1-4
EB=Exclusive OR
H L H L H
+=OR
H H H H H • =AND
ABSOLUTE MAXIMUM RATINGS (Ta=~20- +75'C, unlessolherwisenoted)
Vee Supply voltage ~0.5-+7 V

VI Input voltage ~0.5-+15 V
Vo Output voltage High-level state ~0.5- Vee V
limits
Min Typ Max
10H High-level output current VOH"'2.7V 0 -400 J-lA

VOL;o;O.4V 0 4 mA
VOL;o;O .5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C. unlessotherwisenoted)
Limits
Min Typ* Max
V'c Input clamp voltage Vee=4.75V.I,e=-18mA -1.5 V
Vee=4.75V. V;=0.8V
V;=2V.loH=-400,uA
VOL . Low·level output voltage

Vee=4.,75V I IOL=4mA 0.25 0.4 V
V,=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
00 20
Vee=S.25V. V,=2_7V J-lA
A,- A 4. 8,- 8 4 40
High·level input current
I'H
00 0.1
Vee=5.25V. V,=10V mA
A,-_A 4. 8,- 8 4 0.2
00 -0.4
I'L Low·level input current Vee=5 .25V. V,=O .4V mA
A,- A4. 8,- 8 4 -0.8
los Short·circuit output current (Note 2) Vce- 5 . 25V. Vo-OV -20 ~ 100 mA
Vee=5.25V. V,=OV 22 39 mA
leo Supply current Vee-S.25V. V,-OV. V,=4.5V (Note 31 19 34 mA
Vee=5.25V. V,~4.5V 19 34 mA
* All tYPical values are at Vcc-- 5V, T a-- 25" C.
Note 3: Measurement should be conducted with inputs 8 1 -8 4 at OV and the other inputs at 4.5V.
• MITSUBISHI
2-84 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS83AP
SWITCHING CHARACTERISTICS (Voo=SV. Ta=2S"C, unlessotherw;senoted)
Limits
Min Typ Max
tPHL time, from input Co to outputs ~1- 2:4 13 24 ns
time, from inputs A 1- A4. B,- 8a to outputs
tpHL 2::,-2::. 11 24 ns
CL=lSpF (No1e4)
tpHL time, from input Co to output C4 8 22 ns
tpHL time, from inputsA l-A4. B,- 84 to output C4 8 17 ns
Note 4: Measurement circuit INPUT

Vee OUTPUT TIMING DIAGRAM (Reference level = 1.3V)
PG OUT
SOQ LEVELS OF
DELAY 2 _ _+-JI
LEVELS OF
(1) The pulse generator (PG) has the following characteristics: DELAY 3
PRR=lMHz, t r=6ns, tf=6ns, tw= 500ns, Vp=3Vp.p, ZO=50n.
CARRY INPUT
r
M74LS83AP
APPLICATION EXAMPLE A1
Co
2:1 20
Shown on the right is a 4N·bit binary parallel adder using N 2' A2
SUMMAND 22 A3
number of M74LS83AP devices. The typical delay times of 2:2 21
r
23 A.
the carry _output in this circuit are:
B1
N = 1 (4 bits) 10.5ns 2:3 22
21 B2
N = 2 (8 bits) 21ns ADDEND 22
B3
N = 3 (12 bits) 31.5ns 23-
2:4 23
B.
N = 4 (16 bits) 42ns C.
N = 8 (32 bits) 84ns M74LSB3AP

Co
This allows a high-speed ripple carry adder to be configur- 2'
2:1 24
ed. { 25
SUMMAND
26
2:2 25
21
2'
2:3 26
25
{
ADDEND 26
2:. 21 SUM
21 OUTPUTS
INPUTS 04
I
: TO NEXT·STAGE Co
: FROM PREVIOUS-STAGE C4
I
M74LS83AP
Co
A1
r"'
2:1 24N-4
SUM- 24N-3 A2
MAND 24N-2 A3
2:2 24N-3
r'
2'N-1 A4
B1
2:3 2'N-2
ADDEND 24N-3 B2
2'N-2 B3
2:. 24N-l
2'N- 1 B.
C.
CARRY OUTPUT
• MITSUBISHI
.... ELECTRIC 2-85
MITSUBISHI I:.STTLs
M74LS85P
4-BIT MAGNITUDE COMPARATOR

containing a 4-bit digital comparator.
COMPARISON
FEATURES
l
INPUT Vee
• Easy expansion of number of bits 'A<8 -+
• Binary or BCD comparison
CASCADE IA =8 -+
• Wide operating temperature range (Ta=-20-+75°C) INPUTS
IA>8 -+
APPLICATION COMPARI-
.- A, SON
General purpose, for use in industrial and consumer INPUTS
equipment. .-s,
.- Ao
By applying two sets of 4-bit binary numbers A and B to be GND
compared to comparison inputs A o -A 3 and Bo -B 3 and by

setting cascade input IA=B high, high appears in outputs
OA>B, 0A B,
IA< Band IA=B and increasing the number of bits.
(Refer to application example)
BLOCK DIAGRAM
COMPARISON INPUTS
OUTPUTS
CASCADE INPUTS
COMPARISON INPUTS
GND
• MITSUBISHI
2-86 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS85P
FUNCTION TABLE INotel)
A3 • B 3 A2. B2 At. Bt Ao. Bo IA>B IAB OAB3 X X X X X X H L L
A3<B3 X X X X X X L H L
A3=B3 A2>B 2 X X X X X H L L
A3=B3 A2Bt X X X X H L L
A3=B3 A2=B2 A,<B, X X X X L H L
A3=B3 A2=B2 A,=B, AO>Bo X X X H L L
A3=B3 A2=B2 A,=B, Ao<Bo X X X L H L
A3=B3 A2=B2 A,=B, Ao=Bo H L L H L L
A3=B3 A2=B 2 A,=B, Ao=Bo L H L L H L
A3=B3 A2=B2 A,=B, Ao=Bo X X H L L H
A3=B3 A 2=B 2 A,=B, Ao=Bo H H L L L L
A3=B3 A2=B2 A,=B, A o=Bo L L L H H L
Note 1. X : Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C. lJIlless otherw[se noted)

RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C. un'essotherw[senoted)
Limits
Min Typ Max
IOH High-level output current VOH;;:'2.7V 0 -400 J-lA

VOL~0.4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C. unlessotherw[senoted)

Limits
Min Typ * Max

V,e Input clamp voltage Voe=4.75V.I,e=-18mA -1.5 V
Vee=4.75V. V,=0.8V
V,=2V .IOH=-400J-lA
VOL LQ\,v-lcvol output voltage

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V. V,=2V I IOL=8mA 0.35 0.5 V
IA<B.IA>B Vee=5.25V 20
J-lA
Ao-A3. 8 0- 8 3. IA=8 V,=2.7V 60
IA<B.IA>B Vee=5.2SV 0.1
mA
A 0- A3.B 0- B 3.IA=8 V,=10V 0.3
IA<B,IA>B Vee=S.25V -0.4
I'L Low-level input current mA
Ao-A3. BO- B3. IA=8 V,=0.4V -1.2
lOS Short-circuit output current (Note 2) Vee=S.2SV. VO= 0 V -20 -100 mA
Icc Supply current Voe=S.2SV INote 3) 11 20 mA
*: All typical values are at Vee= 5V, Ta"" 25°C.

Note 2: All measurements must be done quickly and not more than output should be shorted at a time.
Note 3: Icc is measured with IA=B at OV and with all other inputs at 4.5V.
• MITSUBISHI
"'ELECTRIC 2-87
MITSUBISHI LSTTLs
M74LS85P
4·BIT MAGNITUDE COMPARATOR
SWITCHING CHARACTERISTICS eVee=5V. Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
tPLH Number of delay 6 ns
tPHL gate steps 1 11 ns
Low-to-high-Ievel. high-to-Iow-Ievel
tPLH output propagation time. from Number of delay 10 I ns
tPHL inputs, Ao-A3. 80-83
to gate steps 2 18 ns
outpuUOA<B,OA=8,OA>B
tPLH Number of delay 12 36 ns
tPHL gate steps 3. 20 30 ns
tPLH Low-to-hi!lh-Ievel. high-to-Iow-Ievel output propagation INote41 16 45 ns
CL=15pF
time, from inputs AO-A3 ,80- 83 to outputs
tPHL OA<S. OA~S.OA>B 20' 45 ns
, tPLH Low-to-high-Ievel, high-to-low-Ievel output propagation 6 22 ns
time, from input IA=B to outputs 0A<B, OA>S
tPHL 12 17 ns
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 7' 20 ns
time, from input IA=Sto output OA=B
tPHL 13 26 ns
tpLH Low-to-high-level. high-to-Iow-Ievel output propagation 22 ns
9
time. from inputs IAB to outputs
tPHL OA<B. OA~a OA>S' 15 17 ns
Note 4: ,Measurement circuit

TIMING DIAGRAM(Reference level = 1.3V)
INPUT Vee OUTPUT
Ao-A3. 8 0- 8 3
IA<S. IA~B. IA>S
LEVELS OF
DELAY 2
LEVELS OF
DELAY 3 _ _ -+_"",,\
PRR'" 1MHz, tr = 6ns, tf '" 6ns, tw = 500ns,
Vp"3Vp.p. Zo ~ 5012,
• MITSUBISHI
2-88 "ELECTRIC
MITSUBISHI LSTTLs
M74LS8SP
(1) Shown below is a 24-bit (digital) comparator using the M74LS85P. Expansion is possible up to n bits using this type of cascade connection.
OUTPUTS
M74LS85P
'"A« '"«II '"V«
000
NC: NO CONNECTION
NC NC
M74LS85P M74LS85P '" '" ",M74LS85P .-_~",;-!;",;-f;",f"'M.:..:7...:.4=L=S8:.;5c..,P
1\ II '"V A 11 V 1\ II V
« « « <l: <.! <.! <l <l <l
000 000 000
L H LAoBoA,B,A,B,A,B, A4 L 84 As 85 A6 86 A) B7 As 88 Ag L BgA10BIOAIIBllAIZBI2A13B13 Au L 814AIs815A16816Al1BllA1SBIB Au L B19A20B2{)AzlBzlAn8uA23B23

LOWEST-LEVEL BIT HIGHEST-LEVEL BIT
(LOWEST DIGIT) (HIGHEST OIGIT)
NC : NO CONNECTION
(2) Shown below is an n-bit comparator using the M74LS85P. The speed is decreases as the number of bits in the configuration below increases. configuration below.
L
H
A<B}
A=B OUTPUTS
L A>B
• MITSUBISHI
"ELECTRIC 2-89
MITSUBISHI LSTTLs
M74LS86P
QUADRUPLE 2·INPUT EXCLUSIVE OR GATES
DESCRIPTION
containing 4 dual-input exclusive-OR gates_
FEATURES
1A -+ Vee
• High breakdown input voltage (VI ~ 15V) INPUTS {
• Low power dissipation (Pd = 30.5mW typical) 18 -+ <-
.
4A} INPUTS
• High speed (tpd =10ns typical)' OUTPUT 1Y 4- .,.. 48
2A -+ 4 -+ 4Y OUTPUT
• Wide operating temperature range ('ta = -20 - +75°C) iNPUTS {
. 28 -+
4- 3A} INPUTS
APPLICATION OUTPUT 2Y 4- 4- 38
General purpose, for use in industrial and consumer'
equipment. GND -+ 3Y OUTPUT
achievement. of input high breakdown voltage, high speed, Outline 14P4
low power dissipation, and higr fan-out.
When both inputs A and B either low or high, output Y is CIRCUIT SCHEMATIC (EACH GATE)
low, and when A and B are high and low or low and high
respectively, Y is high.
.----1r----.---.---<r------.-<l Vee
24k 24k 9k 20k 7.6k 120
FUNCTION TABLE
A 8 Y INPUTSCo-l~lIf-_----1 Y
OUTPUT
L L L
H L H
L H H ~~---~----~-~~GND
H H L
UNIT: 9

Vo Output ~oltage High-level state -0.5- Vee V
• MITSUBISHI
2-90 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS86P
QUADRUPLE 2-INPUT EXCLUSIVE OR GATES
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C. unless otherwise noted)
Limits
Min Typ Max

10H High-level output current VOH<;;2.7V 0 -400 "A
VOL";0.4V 0 4 mA
VOL";0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75°C. unlessotherwisenoted)
Limits
Min Typ* Max
V,C I nput clamp vo1tage VCC=4. 75V,I,c=-18mA -1.5 V
Vec=4. 75V, V,=0.8V
V,=2V. 10H= -400"A

VCC=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8mA 0.35 0.5 V
VcC=5.25V. V,=2.7V 40 "A
Vcc=5 .25V, V,= 1 OV 0.2 mA
I'L Low-level input current VCC=5.25V. V,=0.4V -0.8 mA
los Short-circuit output current (Note 1) VCC=5 25V, VO=OV -20 -100 mA
ICC Supply current Vcc=5.25V (Note 21. 6.1 10 mA
* : All typicalva!ues are at Vee = 5V, Ta = 25°C.

Note 2: IcC is measured with all inputs grounded.
SWITCHI NG CHARACTERISTICS (Vcc=5V, Ta=25°C, unless otherwise noted)
limits
Min Typ Max
tpLH Low-tQ-high·level, high-to-Iow-Ievel output propagation 8 23 ns
time
CL=15pF, Other input low J(Note 3}
t pHL 12 17 ns
tpLH Low·to-high-Ievel, high-to-Iow-Ievel output propagation 8 30 ns
time
CL=15pF, Other input high (Note 3)
tpHL 10 22 ns

INPUT Vee OUTPUT
A

PRR = 1 MHz, tr = 6ns, tf = 6ns, tw = 500ns,
(2J CL includes probe and jig capacitance.
• MITSUBISHI
.... ELECTRIC 2-91
MITSUBISHI LSTTLs
M74LS90P
DECADE COUNTER

The M74L590P is a semiconductor integrated circuit
containing an asynchronous decade counter function with
direct reset inputs and direct 9-set inputs.
FEATURES CLOCK INPUT 12'" 1 4- f1 CLOCK· INPUT
• Direct reset inputs provided NC

DIRECT (R01'" 2
• Direct 9 set inputs provided RESET
• Usable independently as binary and divide-by-fivecount-

INPUTS R02'"
... QA} OUTPUTS
er NC ... Qo
• High-speed counting (f max =75MHz typical) vee GND
• Wide operating temperature range (T a=-20-+75°C)
DIRECT{SO(9)1 ... 6 9 ... QS}
9 SET OUTPUTS·
APPLICATION INPUTS SO(9)2'"
~ _ _----J
... Qe
equipment.
FUNCTIONAL DESCRIPTION Outline 14P4 NC: NO CONNECTION
This device consists of independent binary and divide-by-

five counters. Clock input T 1 and output 0A are employed
for use as a binary counter while clock input T 2 and OB, set to 9 simultaneously by setting direct reset inputs R 0 1
0e and 0 0 are employed for use as a divide-by-five and R02 high or direct 9 set inputs 5 0 (9)1 and 5 0 (9)2
counter. When employed as a decade counter, 0A and T2 high. For use as a counter, R oland/or R 0 2, and 5 0 (9)1
are connected and by making T 1 . the input, the BCD code and/or 5 0 (9)2 , are set low.
°
output appears in outputs 0A, 0B, 0e and 0 . Counting is Also provided is the M74L5290P with the same func-
performed when T 1 and T 2 are changed from high to low. tions and electrical characteristics. Its GND positioning.at
The binary and divide-by-five counters can be reset or pin 7 and Vee at pin 14 makes for easy mounting.
BLOCK DIAGRAM
OUTPUTS
\
Qe Qo
SO(9)1 6
DIRECT 9 SET INPUTS 1

SO(9)2 7
CLOCK INPUT 1114)----<lT

K Ro 0
CLOCK INPUT T2 I }--------~--------------'-' i

------- - - - - - - - ----------@
GND
• MITSUBISHI
2-92 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS90P
DECADE COUNTER
FUNCTION TABLE (Note')
T Ro, Ro 2 50(9)1 50(9)2 QA Qs Qe Qo Count QA Qs Qe Qo

X H H L X L L L L 0 L L L L
X H H X L L L L L 1 H L L L
X X X H H H L L H 2 L H L L
! L X L X Count 3 H H L L
! X L X L Count 4 L L H L
! L X X L Count 5 H L H L
! X L L X Count 6 L H H L
Note 1 ! : Transition from high to low 7 H H H L
X : Irrelevant 8 L L L H
9 H L L H
(1) Output QA is connected to input B for BCD count.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75·C. unless01herwisenoted)

Inputs T,. T2 -0.5-+5.5
V, Input voltage V
Inputs RD1, RDZ. 50(9),.50(9)2 -0.5- +15
Va Output voltage High level state -0.5- Vee V
Tstg Storage temperature range -65- +150 ·C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C, unless otherwise noted)
Limits
Min Typ Max
,
10H High-level output current VOH;;;;2.7V 0 -400 J-I.A

I VOL;:;0.4V 0 4 rnA
VOL;:;0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C, unlessotherwisenoted)
Limits
Min Typ * Max

V'c Input clamp voltage Vee=4.75V, 1,0= -18mA -1. 5 V
Vee=4.75V, V,=0.8V
V,=2V, IOH= -400J-l.A
Vee=4.75V IIOL =4mA (Note 21 0.25 0.4 V
V,=0.8V, V,=2V IIOL =8mA (Note 3) 0.35 0.5 V
R01. R02, 50(9)1, 50(9)2 20
Vee=5.25V
T, 40 J-I.A
V,=2.7V
T2 80
Tt Vee=S.25V 0.2
rnA
T2 V,=5.5V 0.4
R01, R02, 50(9)1. 50(9)2 Veo-5.25V, V,-10V 0.1 rnA
R01, R02, 50(9)1. 50(9)2 -0.4
Vee=5.25V
I,L Low-level input current T, -2.4 rnA
VI=0.4V
T2 -3.2
los Short-circuit output current (Note 3) Vee=5.25V, Vo=OV -20 -100 rnA
Icc Supply current Vee=5.25V (Note 4) 9 15 rnA
*: All typical values are at Vcc = 5V, Ta = 25°C.
Note 2: Testing of output QA should be conducted with input T 2 connected to output GA.
Note 4: IcC is measured with R0 1 , R02 inputs grounded following momentary connection to 4.!?V. and T 1, T 2.50(9)1 and 50(9)2 inputs grounded
• MITSUBISHI
.... ELECTRIC 2-93
MITSUBISHI LSTTLs
M74LS90P
DECADE COUNTER
SWITCHING CHARACTERISTICS (Vcc=sv. Ta=2S"C. unless otherwise noted)
Limits
Min Typ Max
fmax Maximum clock frequency. from input T 1 to output QA 32 75 MHz
fmax Maximum clock frequency, from input T 2 to output 08 16 30 MHz
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 7 16 ns
t pHL time, from input 11 to output QA 8 18 ns
tpLH Low-to-high-Ievel. high-to-Iow-level output propagation 15 48 ns
tpHL time, from input r, to Ol.ltput Qo 16 50 ns
tpLH Low-to-high-Ievel. high-to-Iow-level output propagation 7 16 ns
tpHL time, from input T 2 to output Qe 8 21 ns
tpLH Low-to-high-output, high-to-Iow-Ievel output propagation 15 32 ns
OL= lSpF INote 5)
t pHL time, from input T 2 to output Qc 15 35 ns
t pLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 7 32 ns
tpHL time, from input T 2 to output Qo 8· 35 ns
High-to-Iow-Ievel output propagation time, from inputs
tpHL 17 40 ns
R01. R02 to outputs QA. QB. QC. Qo
Low:to-high-Ievel output propagation time, from inputs
tpLH 10 30 ns
50(9)1.50(9)2 to outputs QA. Qo
tpHL 14 40 ns
50(9)1.50(9)2 tooutputSQB. Qc
Note 5: Measurement circuit Vee
(1) The pulse generator (PG) has the following char:acteristics:

PRR=lMHz. t,=6ns, t,=6ns, t w =500ns, Vp = 3Vp.p. Zo = 500.
TIMING REQUIREMENTS
'" (Vcc=SV. T.=2S"C. unless otherwise noted)
Limits
Min Typ Max
tW(T,H) Clock input T t high pulse width 15 6 ns
tw(T, H) Clock input T-2 high pulse width 30 11 ns
tW(R D) Direct reset R01. Ro 2 pulse width 15 6 ns
tW(SD) Direct 9 set 50(9)1, 50(9) 2 pulse width lS 8 ns
tr Clock pulse rise time 500 100 ns
tf Clock pulse fall time 200 100 ns
treC(R D) Recovery time R01, Ro 2 to T 1. T 2 25 8 ns
tree(SD) Recovery time 50(9) 1, 50(9)2 to T 1. T 2 25 8 ns

twCfi . T,H) tW(Ao)
ree
QA.QB.Qe.Qo
(;iA. Qs. Qc. Qo
tW(SD)
QB.QC
•. MITSUBISHI
2-94 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS91P
8-BIT SHIFT REGISTER

The M74LS91 P is a semiconductor integrated circuit
containing an 8-bit serial input-serial output shift register
function.
FEATURES } OUTPUTS
• Synchronous serial input-serial ouptut
• Positive edge-triggering
• 0 7 and 0 7 outputs provided } DATA INPUTS
• Wide operating temperature range (T a=-20-75°C)
APPLICATION CLOCK INPUT

equipment.
This device contains 8 edge-triggered R-S-T flip-flops and
the serial data input DS1- DS2 and Ds l ' DS2 represents Outline 14P4 NC: NO CONNECTION
the first-stage flip-fLop data input.

When DS1 and DS2 are both high and eight clock pulses FUNCTION TABLE (Note 1)
are applied to clock input T, the high signal appears in 0 7
tn tn +8
and the low signal in 0 7 • When one or more of the inputs is
low and the eight clock pulses are applied to T, the low DS1 DS2 07 07
L L L H
signal appears in 0 7 and the high signal in 0 7 •
L H L H
Data reading and shifting operations are performed when
H L L H
T changes from low to high.
H H H L
Either Ds 1 and DS2 should be set low and eight or more
Note 1 tn: Bit time before clock
clock pulses should be applied to T in order for all the 8
tn +8 : Bit time after 8 clock pulses have been applied
flip:flops to be set low.
BLOCK DIAGRAM
DS1 12
DATA INPUTS { DS2
CLOCK INPUT
------- ---l'NO
• MITSUBISHI
;"ELECTRIC 2-95
MITSUBISHI LSTTLs
M74LS91P
OPERATION TIMING DIAGRAM
1 2 7 8 9 15 16 17 19 23 24 25 26 27
T J1.JL----TU"LJT------rLJULnST---TUl.IUU1
----- I ------ ---- I
I I
Ds!' DS2 ~______ I
,
______ ~ ______ _+:-----
I
I I
--------~------- -----~

Topr Operating free.air ambient temperature range -20-+75 'C
Limits
Min Typ Max
10H High-level output current VOH:;;;2.7V 0 -400 /1 A
VOL"; 0 .4V 0 4 mA
VOL"; 0 .5V 0 B mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +7S'C. unless otherwise noted)
Limits
Min Typ * Max
V,e Input clamp voltage Vee=4. 7SV. I,e= -lBmA -1.5 V
Vee=4.7SV. V,=O.BV
V,= 2V . I OH= - 400/1A

Vec=4.7SV I IOL=4mA 0 25 0.4 V
VI=0.8V. V,=2V I IOL=8mA 0 35 0.5 V
Vee=5 .2SV. V,= 2. 7V 20 ,LA
I'H High-Iovel input current
Vee=S 2SV.V,=10V 0.1 mA
I'L Low-level input current Vce=S.2SV. V,=0.4V - 0.4 mA
los Short-circuit output current Vee=S.2SV. Vo=.OV INote 2) -20 -100 mA
Icc Supply current Vee=S .2SV INote 3) 12 20 mA
* All typical values are at Vee"'- 5V, Ta= 25°C
Note 3: lee is measured with Ds, and DS2 at OV after 8 clock pulses have been applied to T
• MITSUBISHI
2-96 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS91P
SWITCHING CHARACTERISTICS eVcc=5V. Ta=25·C. unless otherwise noted)
Limits
Min Typ Max
fmax Maximum clock frequency 10 60, MHz
tPLH Low-to-high-Ievel, high-to-Iow-Iever output propagation CL=15pF (Note 41 12 40 ns
tPHL time, from input T to outputs Q7, OJ 15 40 ns
TIMING REQUIREMENTS (Vcc=5V. Ta=25·C. unless otherwise noted)
Limits
Min Typ Max
tW(T) Clock input pulse width 25 6 ns
tsu(Os) Setup time DS1. DS2 to T 25 7 ns
th(Ds) Hold time 051, DS2 to T 6 0 ns
INPUT Vee OUTPUT

PRR = lMHz, tr= 6ns, tf=6ns, t w =500ns, Vp=3Vp.p, Zo=50n.
PG DUT
50(2
T T
OSt· O S2
OSt' OS2
• MITSUBISHI
..... ELECTRIC 2-97
MITSUBISHI LSTTLs
M74LS92P
DIVIDE-BY -TWELVE COUNTER
DESCRIPTION
containing an asynchronous divide-by-twelve counter func-
tion with direct rese1; inputs.
CLOCK
CLOCK INPUT 12 -+ INPUT
FEATURES
• Direct reset input provided NO NO
• Usable independently as binary and divide-by-six counter
NO
• High-speed counting (f max =80MHz typical) 12 -+ QA}
OUTPUTS
• Wide operating temperature range (Ta= -20-+75°C) NO -+ Qa
Vee GND
APPLICATION DI RECT RESET{ Ro 1 -+ 6
R02 -+
equip'ment. L--_ _---l
FUNCTiONAL DESCRIPTION
This device is composed <:>f independent binary and
divide-by-6 counters. Clock input TI and output OA are Outline 14P4 NC: NO CONNECTION
employed for use as a binary counter while clock input T2
and OB, Ocand 00 are employed for use as a divide-by-6
counter. When employed as a divide-by-12 counter, OA and
T2 are connected and by making TIthe input, the output
appears in outputs OA, OB, Oc and 00 in accordance with
the function table. The code appearing in the output is not
pure binary code. Counting is performed when T I and T2
are changed from high to low.
The binary and divide-by-6 counters can be reset
simultaneously by setting direct reset inputs Ro 1 and R02
high. For use as a counter, either ROl or R02 or both set
low.
BLOCK DIAGRAM
Qa
.
OUTPUTS
Qe
----{11
CLOCK INPUT 11 }-----dT T T '---'-i----dT

K Ro 0 K Ro 0 K Ro 0
DIRECT RESET{ROI
INPUTS
R02
CLOCK INPUT 1, 1 )-,-_ _ _ _ _ _ _ _ _....._ _ _ _ _ _---l
GND
• MITSUBISHI
2-98 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS92P
DIVIDE-BY - TWELVE COUNTER
FUNCTION TABLE (Notet) Count number OA OB Oe OD

T RDt RD2 OA I OB I Oe I OD 0 L L L L
X H H L I L I L I L 1 H L L L
~ L H Count 2 L H L L
~ H L Count 3 H H L L
~ L L Count 4 L L H L
Note 1 Transition from high to low 5 H L H L
X Irrelevant 6 L L L H
7 H L L H
8 L H L H
9 H H L H
10 L L H H
ABSOLUTE MAXIMUM RATINGS 11 H L H H

(T a= -20- +75°C, unless otherwise noted) (1) Valid when QA and T2 are connected and T, is made the input

Inputs T 1. T 2 -0.5-+5.5 V
VI Input voltage
Inputs R Dt . R D2 -0.5-+15 V
Topr Operating free-air ambient temperature range -20-+75 '0
Tstg Storage tel')1perature range -65- + 150 'C
RECOMMENDED OPERATING CONDTIONS (Ta= -20- +75'0. unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage ~. 75 5 5.25 V
10H High-level output current VOH"'2.7V 0 -400 /-lA

VOL~O .4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'O. unlessotherwisenoted)
Limits
Min Typ' Max
VIC Input clamp voltage Vee=4.75V.lle=-18mA -1.5 V
Vee=4. 75V, VI=O .8V
VI=2V. I OH= -400/-lA
Vee=4.75V II OL =4mA (Note 2) 0.25 0.4 V
VOL Low-lev~1 output voltage
VI=O .8V, VI=2V II OL =8mA INote 21 0.35 0.5 V
RDt, RD2 20
Tl Vee=5.25V. VI=2.7V 40 /-lA
T2 80
Tt 0.2
Vce=5 .25V, VI=5.5V mA
T2 0.4
Rot. R02 Vcc=5 .25V. V,=10V 0.1 mA
Rot. R02 -0.4
IlL Low-level input current Tt Vee=5 .25V, VI=O .4V, -2.4 mA
T2 -3.2
los Short-circuit output current (Note 3) Vee=5.25V, Vo=OV -20 -100 rnA
Icc Supply current Vee=5.25V (Note 4) 9 15 mA
* All typical values are at Vee"" 5V. Ta = 25°C.

Note 2: Testing of output QA should be conducted with input T; connected to output GA,
Note 4: lecis measured with T, and T2 at OV after Rot and R02 have been set to OV from 4.5V.
• MITSUBISHI
.... ELECTRIC 2-99
MITSUBISHI LSTTLs
M74LS92P
DIVIDE·BY· TWELVE COUNTER
SWITCHING CHARACTERISTICS (Vee=5V. T a =25·C. unless otherwise noted)
Limits
Min Typ Max
f max Maximum clock frequency, from input T J to output QA 32 80 MHz
fmax Maximum clock frequency, from input T 2 to output Os 16 30 MHz
tpLH Low-to-high-Ievel, high·to-Iow-Ievel output 7 16 ns
tpHL propagation fime, from inpu't f1 to output QA 8 18 ns
tPLH Low-to-high-Ievel. high-to-Iow-Ievel output 25 48 ns
tpHL propagation time, from input 'f1
to output QO 25 50 ns
tpLH Low-to-high~level,high-to-Iow-Ievel output 7 16 ns
tpHL propagation time, from input 12
to output Os 8 21 ns
tpLH Low-to-high-level, high-to-Iow-Ieve! output CL=15pF INote4) 8 16 ns
tPHL propagation time, from input T2to output Qc
10 21 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output 15 32 ns
tpHL propagation time, from input i2 to output Qo 15 ns
35
High-to-Iow-Ievel output propagation time, from
tpHL 17 40 ns
inputsRol. R021ooutputsQA. QS. QC. Qo
INPUT Vee OUTPUT
PG OUT
(1) The pulse generator (pG) has the foll-owing characteristics:
PRR::o lMNz, tr = 6ns, tf = 6ns, tw = 500ns,
50Q Vp = 3Vp.p, Zo = 50n.
TIMING REOUIREMENTS (Vee=5V. Ta=25'C. unlessotherwisenoled)
Limits
Min Typ Max
tW(T,H) Clock input T 1 high pulse width 15 6 ns
~Y"(T2H) Clock input T 2 high pulse width 30 17 ns
~
tW(Ro) Direct reset R D1 . R 02 pulse width 15 5 ns
trec(RD) Recovery time R 01. R 02 to T 1 , T2 25 8 ns

tW(RO)
Rot. R02
tree
OA. OB. 00, Qo
QA, QB. Qc, QD
• MITSUBISHI
.... ELECTRIC
MITSUBISHI LSTTLs
M74LS93P
4-BIT BINARY COUNTER
DESCRIPTION
containing an asynchronous 4-bit binary (hexadecimal)
counter function with direct reset inputs.
FEATURES CLOCK INPUT T2-- 1 ~T, CLOCK INPUT
• Direct reset inputs provided

DIRECT (A01 -> NC
• Usable independently as binary and octal counter RESET
• High-speed counting (f max = 60MHz typical) INPUT AD 2 .... .... QA }
OUTPUTS
• Wide operating temperature range IT a= -20~+75°C) NC .... Qo
APPLICATION Vee GND

NC 9 .... QB }
equipment_ OUTPUTS
NC .... Qe
This device is composed of independent binary and octal
counters. Clock input T j and output OA are employed for
use as a binary counter while clock input T2 and Os, Oc
and OD are employed for use as an octal counter. When
employed as a hexadecimal counter, the pure binary code
output appears in the OA, Os, Oc and OD outputs by
connecting OA and T2 and making T j the input. Counting
is performed when T j and T2 change from high to low.
The binary and octal counters can be reset simultane-
ously by setting direct reset inputs RD1 or R D2 . high.
For use as a counter, either RD 1 or RD2, or both, is set
low.
Also provided is the M74LS293P with the same func-
tions and electrical characteristics. Its GN D positioning at
pin 7 enables easy mounting_
BLOCK DIAGRAM
OUTPUTS
QB
9l------j
CLOCK INPUT
DIRECT RESET INPUTS {
CLOCK INPUT T 2 1 I
"------ ~------ ------ ---------®
GND
• .MITSUBISHI
.... ELECTRIC 2-101
MITSUBISHI LSTTLs
M74LS93P
4·BIT BINARY COUNTER
FUNCTION TABLE INote 1)
T Rot R02 OA I OB I Oe I OD Count number OA OB Oe 00

X H H L I L
I L
I L 0 L L L L
~ L H Count 1 ·H L L L
~ H L Count 2 L H L L
~ L L Count 3 H H L L
Note 1 Transition from high to low 4 L L H L

X Irrelevant 5 H L H L
6 L H H L
7 H H H L
8 L L L H
9 H L L H
10 L H L H
11 H H L H
12 L L H H
13 H L H H
14 L H H H
15 H H H H
Valid when Q A and T; are connected and T; is made the input

Inputs T 1. T 2 -0.5-+5.5
VI Input voltage V
Inputs Ro,. R02 -0.5-+15
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwiseno'ed)
Limits
Min Typ Max
Vee Supply vol,age 4.75 5 5.25 V
IOH High-level output current VOH~2.7V 0 -400 jJA
VOL".0.4V 0 4 mA
VOL".0.5V 0 8 mA
. • MITSUBISHI
2-102 "ELECTRIC
MITSUBISHI LSTTLs
M74LS93P
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'C, unlessotherwisenotedj
Limits
Min Typ * Max
VIC Input clamp voltage VCO=4.75V,IIO=-18mA -1.5 V
VOO=4. 75V, VI=0.8V
VI=2V,loH=-400pA
VOO=4.75V IIOL =4rnA INote 2) 0.25 0.4 V
VI=0.8V, VI=2V IIOL =8mAINote 2) 0.35 0_5 V
R01,Ro2 VOO=5.25V 20
pA
T" T 2 VI=2.7V 40
T" T2 Voo=5.25V, VI=5.5V 0.2 rnA
R01,Ro2 Voo=5.25V, VI=10V 0.1 rnA
R01, R02 -0.4
Voo=5.25V
IlL Low-level input current -2.4 rnA
T" VI=0.4V
T2 -1.6
lOS Short-circuit output current (Note 3) Voo-5.25V, VO- 0 V -20 -100 rnA
loc Supply current Voo=5.25V INote 4) 9 15 rnA
* All typical values are at Vee = 5V, Ta=25°C.

Note 2: Testing of output QA should be conducted with input T 2 connected to output QA
Note 3: All measurements should be done quickly and not more than one output shoudl be shorted at a time.
Note 4: Icc is measured with 11 andT2 at OV after ROI and R02 have been set to OV from 4.5 V.
Limits
Min typ Max
f max Maximum clock frequency, from input T 1 to output OA 32 60 MHz
fmax Maximum clock frequency, from input T 2 to output Os 16 35 MHz
tpLH Low-to-high·level, high-to-Iow·level output 7 16 ns
t pHL propagation time, from input f1 to output QA 8 18 ns
t pHL propagation time, from input Titooutput 08 28 70 ns
t pLH low-to-high·level, high-to·low-Ievel output 7 16 ns
OL= 15pF INote 51
tpHL propagation time, from input f2to output OC 8 21 ns
t pLH Low-to-high-Ievel, high-to-Iow·level output 15 32 ns
tpHL propagation time, from input 12to output Qo 15 35 ns
t pLH Low-to·high-Ievel. high-to·low-Ievel output 22 51 ns
t pHL propagation time, from input 11to output On 22 51 ns
t pHL High-to-[ow-Ievel output propagation time, from
inputs R01, R02 to outputs QA, QB, Qo, Qo 17 40 ns
Note 5: Measurement circuit'

PRR = lMNz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp.p, Zo = 50n.
• .MITSUBISHI
.... ELECTRIC 2-103
MITSUBISHI LSTTLs
M74LS93P
4·BIT' BINARY COUNTER
TIMING REQUIREMENTS CVcc=SV. Ta=2S"C, unlesso,~herwisenoted)
Limits
Symbol Parameter Test conditions U~jt
Min Typ Max
tw(T, H) Clock input T 1 high pulse width 15 6 ns
tW(T,H) Clock inputT 2 high pulse width 30 15 ns
tW(RD) Direct reset RD1. RD 2 Pulse width 15 5 ns
trec(RD) Recovery time RD1. R02 to T l' T 2 25 8 ns
Rot, R02
QA. Qs.Qc.Qo
QA, Qs. QC. Qo
• MITSUBISHI
2-104 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS95BP
4-BIT PARALLEL-ACCESS SHIFT REGISTER
DESCRIPTION
PIN CONFIGURATION, (TOP VIEW)
The M74LS9SBP is a semiconductor' integrated circuit
containing a 4-bit serial/parallel input-serial/parallel output
shift register function.
SERIAL 1~~0~ os.... 1 vee
FEATURES
• Synchronous serial/parallel input-serial/parallel output 00 .... 2
• Right shift function
•
•
Left shift function available with external connection
Mode control input provided
PARALLEL
DATA INPUTS 1 01 ....
02 ....
OUTPUTS
• Special right and left shift inputs provided

03 ....
• Wide operating temperature range (Ta= -20-+7SoC)
MODE
RIGHT SHIFT
CONTROL M/C.... 6
CLOCK INPUT
APPLICATION INPUT
LEFT SHIFT
General purpose, for use in industrial and consumer GNO CLOCK INPUT
equipment.
This device is usable as a serial input-serial/parallel output Outline 14P4
and parallel input-serial/parallel output shift register with
the mode control input M/C signal. When M/C is kept at
low, the serial data are applied to serial data input Os and switching the M/C signal since the output changes in
the clock pulse is applied to right shift clock input T R, the accordance with the status of T Rand T L. Refer to the
serial data are shifted sequentially into outputs 0 0 -03 in function table.
synchronization with the clock pulse. When M/C is kept at
high, the parallel data are applied to parallel data inputs
0 0 -0 3 . and the l-bit clock pulse is applied to left shift
clock input TL, the signals 0 0 -0 3 appear in outputs
00-03 respectively. When TR and TL change from high to
low, the right shift or parallel data reading operation is
performed. When M/C is kept in high; 0 3 is connected to
O2 , O2 to 0 1 and 0 1 and 0 0 , the serial data are applied to
0 3 and the clock pulse is applied to T L, the device
functions as a left shift register. Care should be taken when
BLOCK DIAGRAM
OUTPUTS
.
LEFT SHIFT fL a}----t-r'

CLOCK INPUT
-J
MODE .
CONTROLM/C 6~,/~~~--++~-----~~------t~~--~-~
INPUT
Os Do D1 GNO
SERIAL DATA '~----------y,-"':"'------'--~
INPUT PARALLEL DATA INPUTS
• MITSUBISHI
19J.ELECTRIC' 2-105
MITSUBISHI LSTTLs
M74LS95BP,
FUNCTION TABLE (Notell
Operational mode M/C- TR TL Os 00- 0 3 Qo Ql Q2 Q3

L ~ X L X L Qoo Q,o Q2 0
Right shift
L ~ X H X H Qoo Q,o Q2 0
Parallel reading H X ~ X 00- 0 3 Do 0, 02 03
~ L L X, X Qoo 0,0 Q2 0 Q3 0
t L L X X Qoo Ql 0 Q2 0 Q3 0
~ H L X X QoO Q,O Q2 0 ·Q3 0
MI C swilching t H L X X * * * *
~ L H X X * * * *
t L H X X Qoo Q,O Q2 0 Q3 0
~ H H X X * * * *
t H H X X Qoo Q,O Q2 0 Q3 0
Note 1. ! : Transition from high to low (negative edge trigger)
f : Transition from low to high (positive edge trigger)
00 : Level of Q before the indicated steady-state input conditions were established
* : Cannot be predicted
X : Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, u~lessotherwisenoted)1
Symbol Parameter Conditions Limits Unh

Vee Supply vollage -0.5-+7 V
V, Inpul voltage -0.5-+15 V
Vo Output voltage High·level state -0.5-Vee V
Topr 9perating free-air ambient temperature range -20-+75 'C
Tstg Storage tempetature range -65-+160 '0
RECOMMENDED OPERATING CONDITIONS (Ta=;-20-+75'C, unless otherwise noted)
Limits
Symbol Parameter. Unit
Min Typ Max
10H High-level output current VOH"'2.7V 0 -400 I'A

VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20-+75'O, unless.otherwisenoted)
Limits
Min Typ* Max
V,H High.leve'- input voltage 2 V
V,e Input clamp voltage Vee=4.75V,I,e=-18mA
Vee=4.7SV, V,=0.8V
-1.5 V •
V,=2V. 10H= -4001'A

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=O .8V, V,=2V I IOL=8mA 0.35 0.5 V
M/C 20
Vee=5.25V. V,=2. 7V I'A
M/C 40
ilH High-level input rufrS"t
M/C 0.1
Vee=5.25V, V,=10V rnA
M/C 0.2
Low-level input rurrent

M/C Vee=5.25V, V,=0.4V
-0.4
mA
ilL
M/C -0.8
los Short-circuit output current (Note 2) Vee=5.25V, VO=OV -20 -100 mA
0
* . All typical values are at VCC=!iV. Ta=25 C.
Note 2: All measurements should be done quickly and "91 more than one output should be shorted at a time.
Nole 3: Icc is measured wilh 0.-03 at OV. Os open and M/C at 4,5V after TR and il have been set from 3V to OV.
• MITSUBISHI
2-106 ..... ELECTRIC
MITSUBISHI LSTTLs
M74LS95BP
SWITCHING CHARACTERISTICS (Vcc=5V, T a =25'C, unless otherwise noted)
limits
Min Typ Max
fmax Maximum dock frequency 25 50 MHz
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation GL=15pF INote4) 14 27 ns
tpHL time, from inputs TR. TL to outputs 00 - 03 14 32 ns
INPUT Vee OUTPUT
PG DUT
PRR = lMHz, tr = 6ns, tf = 6ns, tw = 500n5,
50Q Vp =3Vp.p, Zo =50n.
TIMING REQUIREMENTS (Vcc=5V. Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tWIT) Clock input T high pulse width 25 8 ns
tl Crock input Tfalltime 350 100 ns
tsu (D) Setup time 0 to T 20 0 ns
tSU(M/CLI Setup time M/C low to T 20 14 ns
tSU(M/CH) Setup time MIG high to T 20 0 ns
th (0) o hold time to T 10 2 ns
lh (M/CLI Hold time MIG low to T 10 2 ns
th(M/CHI Hold time MIG high to T 10 ~13 ns
Note 5: The shaded areas indicate when the input is permitted to change for predictable output performance.
The arrows on the shaded areas indicate the direction for when the input is permitted to change.
• MITSUBISHI
.... ELECTRIC 2-107
MITSUBISHI LSTTLs
M74LS96P
S-BIT SHIFT REGISTER

shift register function_
CLOCK INPUT T --+ 1
FEATURES
• Positive edge-triggering soo --+ 2
PARALLEL {
• Right shift function DATA SOI--+
• Asynchronous parallel input provided INPUTS
• Direct reset input provided S02 -+
• Wide operating temperature range (T a =-20-+75°C) Vee GND
APPLICATION PARALLE L .1 S03 --+ 6 11 --+ Q3 1

DATA
I
INPUTS S04 --+ --+ Q4
r OUTPUTS
equipment_
LOAD SERIAL DATA
INPUT INPUT
This 5-bit shift register is composed with 4 R-S-T flip-flops
and it functions as a. serial/parallel inpput-serial/parallel Outline 16P4
output shift register_
For use as a serial input-serial/parallel output shift
register, the load input LOAD or parallel data inputs
SOO-S04 are kept in high and the data are applied to the
serial data input Ds_ When a clock pulse is applied to clock
input T with Ds in high, the high signal is shifted
sequentially to 0 0 , 0) _.. 0 4 • Shifting is performed when T
changes from low to high. When the serial data are applied
to Dso-So4 and LOAD i"s set high, the SOO-S04 signals
appear in 0 0 -04 respectively irrespective of T.
When direct reset input Ro is set low, 0 0 -04 are set
low if LOAD is low irrespective of the other input signals.
When LOAD is high, parallel reading takes precedence,
and the SOO-S04 signals appear in· 0 0 -04 -
BLOCK DIAGRAM OUTPUTS

r~--------------~--~A--------------------~,
Qo Q2 Q3 Q4
LOAD INPUT LOAD 8~--~----~----+---~----+---~----~--~-----+---,
SERIAL DATA INPUT Os 9
DIRECT RESET INPUT RO
CLOCK JNPUT
, Soo SOl S02 503

V
PARALLEL DATA INPUTS
• MITSUBISHI
2-108 "ELECTRIC
MITSUBISHI LSTTLs
M74LS96P
SERIAL INPUT-PARALLEL OUTPUT PARALLEL INPUT-PARALLEL OUTPUT

tn tn + 1 tn +2 tn +3 tn +4 tn +s .tn +6 LOAD SO(N) Ro Q(N)
Ds L H L H L H L L L L L
L H L H L H L L H QO
Qo
* L H L H L L H L L
Ql
* * L H QO
L H L H H
Q2
* * * L H L H L L L
Q3
* * * * L H QO
H L H
Q4
* * * * * H H H
Note 1: For use as a serial input-parallel output, LOAD, Soo. SD1. S02. S03 and L
S04 are all kept at low and R5 is kept at high. H H H H
tn: Bit time prior to clock
Note 2: For use as a parallel input-parallel output, RD is first set low and kept at high.
tn+1: Bit time after application of 1 clock pulse
The parallel input data are input into 500""504.
tn+6: Bit time after application of 6 clock pulses
* : Cannot be predicted The data are read when LOAD is high and they simultaneously appear in the
outputs. AD is usually kept at high and LOAD at low.
The "N" in SOINI refers to O. 1.2.3.4.
0 0 is the level of Q before the indicated steady-state input conditions were
establ ished.
-++-~--------------------~----------~!l~:---------
--~+_---+_---------------------------------~rtH1~.-----------------------
---~---+--------------------~~~'----------------
! L:
, I
! I
-+4--+---------------------~HHi~:, -------------- I
:
,
, L'
i :
~------------~~~-------------
j
~__________~ L----
'---__--+'1:....;;LH· r-:-w H HL
~----------------------------~~~.~~~,~I
PRESET
~ SHIFT
~
• MITSUBISHI
';"ELECTRIC 2-109
MITSUBISHI LSTTLs
M74LS96P

Vo Output voltage High·level output -0.5- Vee V
Tstg Storage temperature -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwisenoted)
Limits
Min Typ Max
10H High-level output current VOH~2.7V 0 -400 ,.,A

VOL~0.4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'C, unlessotherwisenoted)
Limits
Min Typ* Max
VIC Input clamp voltage Vee=4.75V, Ile=-18mA -1.5 V
Vee=4.75V, VI =0.8V
VI=2V,IOH=-400,.,A

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI =0.8V, VI =2V I IOL=8mA 0.35 0.5 V
LOAD Vee=5.25V 100
,.,A
Other inputs VI=2.7V 20
LOAD Vee=5.25V 0.5
mA
Other inputs VI=lDV D.l
'LOAD Vee=5.25V -2.0
IlL Low-level input current mA
Other inputs VI =0.4V -0.4
los Short-circuit output current (Note 3) Vee=5.25V, VO= OV -20 -100 mA
ICC Supply current Vee=5.25V INote 4) 12 20 mA
* All typical values are at Vcc=5V. Ta=25°C.
Note 4: IcC_ is measured with AD at OV and all the other inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tPLH Low-to-high-Ievel. high·to-Iow-Ievel output propagation 12 40 ns
tpHL time, from input T to outputs Qo - Q4 CL=15pF INote 5) 12 40 ns
Low-to-high-Ievel output propagation time, from input
tPLH 11 35 ns
So, LOAD to outputs QO-Q4
High·to-Iow-Ievel output propagation time. from input
tpHL 11 35 ns
RD to outputs Qo - Q4
)
• ' MITSUBISHI
2-110 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS96P
INPUT Vee OUTPUT

PRR = 1MHz, tr = 6ns. tf = 6ns, tw = 500ns,
Vp = 3Vp.p, 20 = son.
TIMING REQUIREMENTS (Vec=5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tW(T) Clock input T pulse width 20 5 ns

tw(So) Parallel data input pulse width 30 5 ns
tW(Ho) Direct reset pulse width 30 5 ns
tSU(Ds) Setup time Os to T 30 3 ns
th(Ds) Hold time Ds to T 5 -1 ns

tSU(DS) th(Ds) tSU(D.) th(Ds)
DS
Note 6: The shaded are,as indicate when the input is permitted to change for
• MITSUBISHI
.... ELECTRIC 2-111
MITSUBISHI LST1:Ls
M74LS107AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS WITH RESET

with discrete terminals for clock input T, J and K inputs
and direct reset input RD. INPUT vee
FEATURES { 10 +- +- IRo~~~~~TINPU'i-
OUTPUTS
• Negative edge-triggering IQ +- +- IT CLOCK INPUT
• Independent input/output terminals. for each flip·flop.
INPUT .... 2K INPUT
• Q and Q outputs . { 2Q +- +- 2 Ro ~~~fTINPUT
• Wide operating temperature range (Ta = -20 ~·+75°C)
·OUTPUTS _
2Q +- +- 2T CLOCK INPUT
APPLICATION GND +- 2J INPUT

equipment.
FUNCTIONAL DESCRIPTION .Outline 14P4

J and K signals are read when Tis "H". When T changes
FUNCTION TABLE (Note 1)
from "H" to "L", Q and Q transit with the J and K
T RD J K Q Q
signals to the states described in the function table. By
setting Ro in "L" state, Q and Q become "L" and "H",
x L X X L H
~ H H H Toggle
respectively, irrespective of the states of the other input
~ H L H L H
signals. For.use as a J-K flio-flop, keep RD in the "H" state.
~ H H L H L
M74LS1 07 AP is the same as M74LS73AP except for pin
~ H L L' QO QO
configuration.
H H X X QO QO
Note 1: ! : transition from high to low-level

X: irrelevant
QO: level of Q before the indicated steady-state input conditions were
established.
"QO: level of Q before the indicated steady-state input conditions were
establ ished.
Toggle: complement of previous state with .J. transition of outputs
OUTPUT 00---+c( ):rp---uQ OUTPUT
DIRECT RESET INPUT RoQ---t------++-H------Hf-+-------,
INPUT K D - - - - - - - f t - - - - - - : - - u J INPUT
T
CLOCK INPUT
• MITSUBISHI
2-112 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS107AP
DUAL J·K NEGATIVE EDGE·TRIGGERED FLIP FLOPS WITH RESET
Vee Supply voltage -0.5- + 7 V

Vo Output voltage High·level state -0.5- Veo V
TSlg Storage temperature range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta = -20- +75'C, unless otherwise noted)
Limits
Min Typ Max
10H High-level output current VOH;;;'2.7V 0 -400 flA

VOL~0.4V 0 4 mA
VOL~0.5V 0 B mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'C, unless otherwise noted)
Limits
Min Typ* Max
V'L Low-level input voltage O. B V
V'O Input clamp voltage Voo=4.75V,I,o=-IBmA - 1. 5 V
VOO=4.75V, V,=O.BV
V,=2V . 10H= -400flA
VOL Low-level output current

Voo=4.75V I 10L =4mA 0.25 0.4 V
V,=O.BV, V,=2V I 10L=BmA 0.35 0.5 V
J, K 20
Vee=5.25V
RD 60 flA
V,=2.7V
T BO
J, K 0.1
Voe=5.25V
RD 0.3 mA
V,=10V
T 0.4
J, K Voo=5.25V -0.4
"L LOW-level input current
RD T V,=0.4V -O.B mA
los Short-circuit output current (Note 2) Voo=5.25V, Vo= OV -20 -toO mA
loe Supply current Voo=5.25V INote31 4 6 mA
* : All typical values are at Vee =: 5V, Ta =25°C.

Note 2: All measurements should be done quickly, and not more than one output should ~ shorted at a time.
Note 2: Icc is measured with Q and Qoutputs high in turn, At the time of measurement, T input is grounded.
SWITCHI NG CHARACTERISTICS (Voo=5V, Ta =25"C, unless otherwise noted)
Limits
Min Typ Max
tPLH Low·to-high-Ievel, high-to-Iow-Ievel output propagation B 20 ns
tpHL time, from input T to output Q. Q CL = 15pF INote41 6 20 ns
t pLH Low·to-high-Ievel, high-to-Iow·level output propagation 10 20 ns
tpHL time, from input AD to output Q. Q 7 20 ns
• MITSUBISHI
..... ELECTRIC 2-1.13
MITSUBISHI LSTTLs
M74LS107AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS WITH RESET
, INPUT Vee OUTPUT

PRR = 1MHz, tr = 6ns, tf = 6ns~ tw = 500n5,
Vp =3Vp_p, Zo =50n
TIMING REQUIREMENTS (Vec=5V,Ta=25°C, unlessotherwisenoted)

..
Limits
Min Typ Max
IW(TH) Clock input T high pulse width 20 12 ns
tW(Ro) Direct reset input RD pulse width 25 4 ns
Ir Clock rise time 650 100 ns
If Clock pulse fall time 900 100 ns
ISU(H) Setup time high J, K to T 20 9 ns
ISU(L) Setup time low J, K to T 20 10 ns
Ih(H) Hold time high J, K to T a -8 ns
Ih (L) Hold time low J, K to T a - 5 ns
TIMING DIAGRAM, (Reference level = 1.3V)

Isu (L) Ih(L)
J,K Ro
T Q
Q
Q
APPLICATION EXAMPLE
2bit shift register
DATA INPUT
r - - - - - - - - - Qo
CLOCK INPUT
OATA INPUT ~-.----t
T QO=~
RD a K Ro a Ql~~
CLOCK INPUT ----4---+------' y,;M74LS107AP
~~~~~T
Note 6: Output switching characteristics may not satisfy the ratings if the
RESET -------y,;-2M4-7-4-L-S-l-0-7-A-P---l clock signal is applied without observing the set-up time.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS109AP
DUAL J-K POSITIVE EDGE-TRIGGERED FLIPFLOP WITH SET AND RESET
DESCRIPTION
containing 2 J-K positive edge-triggered flip-flop circuits
01 RECT
and direct set and reset inputs So and Ro- RESET Vee
INPUT DIRECT
RESET
1J -
FEATURES INPUTS { _ INPUT
• Positive edge-triggering 1K -
INPUTS
• Each flip-flop can be used independently CLOCK INPUT 1T
~ 2T CLOCK INPUT
• J and K inputs
_ DIRECT
• Q and IT outputs 1Q ~ 2SD . SET INPUT
{
• Wide operating temperature range (T a = -20~+75°CI OUTPUTS _
1Q
- 2Q }
_ OUTPUTS
GND - 2Q
APPLICATION
equipment.
Outline 16P4
When T changes from low to high, the J and K signals LOGIC DIAGRAM (EACH FLIP-FLOP)
immediately before the change emerge in outputs Q and Q
in accordance with the function table. By using So and Ro,
this IC can be made into a direct R-S flip-flop. When both
DIRECT SET
So and Ro are low, Q = Q = high. However, whim both of INPUT 5 0 0 ' - - - - - - - - - - -
them change to high at the same time, the status of Q and
INPUT K
IT cannot be anticipated. For use as a J-K fl ip-flop, So and OQ) OUT
CLOCK
Ro must be kept in high. By connecting J and K this IC INPUT PUT
can be used as a D-type flip-flop. INPUT 00
DIRECT
7~~Gi RDO----------~
So Ro T J K Q Q
L H X X X H L
H L X X X L H
L L X X X H* H* Note 1 t ,: Transition from low to high-level (positive edge trigger)
H H L X X QO QO QO : Level of Q before the indicated steady-state input conditions were
established.
H H i L L L H
QO: Level of Q before the indicated steady-state input conditions were established.
"H H i H L Toggle T ogg Ie : complement of previous state with t transition of output
H H i L H QO QO X : Irrelevant
H H i H H H L * : Q =Q = high when SO = AD = low and so when both So and AD are

set high, the status of Q and Q cannot be anticipated.

VI Input voltage -0.5-+5.5 V
Topr Operating free-air ambient temperature range -20-+75 'c
•. MITSUBISHI
;"ELECTRIC 2-115
MITSUBISHI LSTTLs
M74LS109AP
DUAL J-K POSITIVE EDGE-TRIGGERED FLIP FLOP WITH SET AND RESET
Limits
Min Typ Max
IOH High-level output current VOH;;;'2.7V 0 -400 f./A

VOL";0.4V 0 4 rnA
VOL";0.5V 0 8 rnA
ELECTRICAL CHARACTER ISTICS CTa= -20- +75'C, unless otherwise noted)
Limits
Min Typ * Max
VIL LOW-level input voltage 0.8 V
VIC Input clamp voltage Vcc=4.75V. Ile=-18rnA -1.5 V
Vec=4.75V, VI=0.8V
VI= 2V, IOH=-400f./A

Vee=4.75V I IOL= 4 rnA 0.25 0.4 V
VI=0.8V, VI= 2 V I IOL= 8 rnA 0.35 0.5 V
J, K, T 20
Vee=5.25V, VI =2.7V f./A
So, Ro 40
J, K, T 0.1
Vee=5.25V, 'vi =10V rnA
So. Ro 0.2
J, K. T -0.4
IlL Low-level input current Vee=5.25V, 'vi =0.4V rnA
So. Ro -0.8
los Short-circuit output current (Note 2) Vee=5.25V, VO= 0 V -20 -100' rnA
Icc Supply current Vee=5.25V, (Note3) 4 8 rnA
* : All typical values are at Vcc= 5 V, Ta = 25 "C

Note 2: All measurements should be done Quickly and not more than one output should be.shorted at a time.
Note 3: The supply current should be measured with 0 and Q alternately set high and with T set low during actual measurement.
SWITCHING CHARACTERISTICS (Vee= 5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
frnax Maximum clock frequency 25 45 MHz
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation CL = 15pF (Note 41 10 25 ns
tPHL time, from T to Q, Q 12 40 ns
tpHL time. from SO. Ro to Q, 0- 10 40 ns
INPUT Vee OUTPUT

Vp = 3Vp.p. 20 = 50n.
(2) CL includes probe and jig capacitance_
• MITSUBISHI
2-116 ~ELECTRIC .
MITSUBISHI LSTTLs
M74LS109AP
DUAL J-K POSITIVE EDGE-TRIGGERED FLIP FLOP WITH SET AND RESET
TIMING REQUIREMENTS (Vcc= 5V. Ta=25t. unless otherwise noted)
Limits
Min Typ Max
tw (TH) Clock input T high pulse width 25 11 ns
tW(SO.Ro) Direct set, reset pulse width 25 4 ns
tSU(H) Setup time high to T 20 19 ns
tSU(L) Setup time low to T 20 7 ns
th(H) Hold time high to T 5 -2 ns
th(L) Hold time low to T 5 -16 ns
tsu(L)th(L)
J. K
T
Ro
Q Q
Note 4: The shaded areas indicate when the input is permitted to change for pre-
dictable output performance.
APPLICATION EXAMPLE
Typical circuit for converting asynchronous signal into synchronous signal and rise/fall differential circuit
Y,
A
B
/
D l'
Y2
K K
Switching period Switching period
Synchronous signal A
--,
Sycnronous signal B _ _ _ _ _ _ _
(after clock from A)
---II.______ J: I
I
I
Rise differential signal

Y,
CJ_____J I
Fall differential signal

Y2
Note 5: The waveforms indicated by the dotted lines apply when reading with the next clock without observing the set-up time to T.
• MITSUBISHI
..... ELECTRIC 2-117
MITSUBISHI LSTTLs
M74LS112AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS WITH SET AND RESET
DESCRIPTION PIN, CONFIGURATION (TOP VIEW)

with discrete terminals for clock input T, J and K inputs
CLOCK INPUT Vee
and direct set and reset inputs SD and RD.
, {lK--+2 15 +-- 1 RD} DIRECT
RESET
INPUTS
FEATURES 1J' --+ +-- 2 RD INPUTS
• Negative edge-triggering
DIRECT CLOCK INPUT
• Independent input/output terminals for each flip-flop. SET INPUT
• Direct set and reset inputs <- 2K }

INPUTS
• Q and Q outputs <- 2J
OUTPUTS
• Wide operating temperature range (Ta = -20 - +75°C)

equipment.

J and K signals of are read, while T is high. When T FUNCTION TABLE INote 11
changes from high to low, the signals of J and K K
T So RD J Q Q
immediately before the change appear in outputs Q and Q x L H X X H L
in accordance with the functio[1 table. By using SD and R D, X H L X X L H
this IC can be made into an direct R-S flip-flop. When X L L X X H* H*
both SD and RD are low, Q = Q = high. However, when J H H H H Toggle
both of them changed to high at the same time, the status J H H L H L H
of Q and Q cannot be anticipated. For use as a J-K flip-flop, J H H H L H L
keep SD and RD high_ M74LS112AP is the same as J H H L L QO QO
M74LS76AP except for pin configuration. H H H X X QO QO
Note 1: ! : transition from high to low-level
X : irrelevant
*: Q:= Q = high when SO = Ro = low and so when' b,oth So and R[j are
set high, th~ status of Q and Q cannot be anticipated.
on: level ofa before the indicated steady-state input conditions were established.
Toggle: complement of previous state with ~ transition of outputs
BLOCK DIAGRAM (EACH FLIP FLOP)
OUTPUT Q0----+-":>< )O-..------'J Q OU T PUT
..----+_+_~+_--------+--__{)SD ~~~EI~~UT
INPUT K 0-----------1 INPUT
T
CLOCK INPUT
• MITSUBISHI
2-118 "ELECTRIC
MITSUBISHI LSTTLs
M74LSl12AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS WITH SET AND RESET
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+7S"C. unless otherwise noted)

Vo Output voltage High·level state -O.S-Vee V
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+7S"C. unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage 4 .75 5 5.25 V
IOH High·level output current VOH'i;,2.7V 0 -400 JlA

VOL~O .4V 0 4 mA
VOL~O .5V 0 S mA
Limits
Min Typ * Max
VIH "High-level input voltage 2 V
VIL Low-level input volt.age o .S V
Vie I nput clamp voltage Vee=4. 75V. lie = -lSmA -1.5 V
Vee=4.75V. VI=O.SV
VI=2V.loH=-400!IA

Vee=4.75V l IOL =4mA 0 .25 0.4 V
VI=O.SV. VI=2V I IOL =SmA 0 .35 0.5 V
J. K 20
SO. Ro Vee=5.25V. VI=2 .7V 60 I,A
T SO
J. K 0.1
SO. Ro Vee=5. 25V . VI= 10V 0.3 mA
T 0.4
J. K -0.4
IlL Low-level input current SO. Ro T Vee=5.25V. VI=0.4V -O.S mA
loS Short-circuit output current (Note 3) Vee=S.25V. VO=OV -20 -100 mA
lee Supply current Vce=5.25V INote 41 4 6 rnA
* . All typIcal values are at Vee = 5V, Ta - 25 C. 0
Note 2: So and RD should not both be set to O.4V simultaneously.

Note 4: lee is measured with the Q and Q ·outputs high in turn, At the time of measurement, T input is grounded.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25°C. unless otherwise noted)
Limits
Symbol P;:,rameter Te:;t conditions ~~
-~-c----~
Unit
Min Typ Max
tpLH Low-to-high-Ievel, high-to-Jow-Ievel output propagation 6 20 ns
tpHL time from input T to output Q, Q CL=lSpF INote 5) 7 20 ns
tpLH Low-to-high-Ievel, h igh-to-Iow-Iever output propagation 7 20 ns
tPHL time, from input SD. Ro to output Q. Q 7 20 ns
• MITSUBISHI
MITSUBISHI LSTTLs
M74LSl12AP
DUAL J-K NEGATIVE EDGE-TRIGqERED FLIP FLOPS WITH SET AND RESET
INPUT Vee OUTPUT
PG OUT
(1) The, pulse· generator (PG) has the following characteristiCs:
SOQ
Vp=3Vp.p, Zo = 50n
TIMING REQUIREMENTS (Vcc=SV, Ta=2S·C. unlessolherwisenolecl)
Limits
Min Typ Max
tW("fH) Clock input T h'igh pulse width 20 12 ns
tW(So.Ro) Direct set and reset inputs So. Ro pulse width 2S 4 ns
tr Clock rise time 650 100 . ns
tSU(H) Selup lime high J. K 10 T 20 12 ns
tSU(L) Selup lime low J. K 10 T 20 12 ns
th (H) Hold lime high J. K 10 T 0 -10 ns
th(L) Hold lime low J. K 10 T 0 -6 ns
J. K So
Q Q
Q Q
Note 5: The shaded areas indicate when the input is permitted to change for
predictable output ·performance.
• MITSUBISHI
2-120 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSl13AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH SET
DESCRIPTION
The M74LSl13AP is a semiconductor integrated circuit
containing 2 J-K negative edge-trigljered flip-flop circuits
with discrete terminals for clock input T. inputs J and K
and direct set input So- CLOCK Vee
INPUT
FEATURES INPUTS {IK ....

.... 2T f~~~f
• Negative edge-triggering lJ .... 12 .... 2K }
• Each flip-flop can be used independently DIR~~i ISo .... 4 rru~~~~ 11 4- 2J
INPUTS
• Direct set input DIRECT
INPUT{ lQ ....
OUTPUTS _
.... 250 T~~UT
• Wide operating temperature range (Ta = -:20~+75°C) lQ ....
9 .... 2Q }
_ OUTPUTS
GND 8 .... 2Q -
APPLICATION '-------'
equipment_

While T is high, signals J and K are put in the read-in state,
and when T changes from high to low, the J and K signals
immediately before the change emerge in outputs Q and IT
T SD J K 0 0
X L X X H L
in accordance with the function table_ By setting So low, Q
~. H H H Toggle
and Q are set low and high respectively irrespective of the
~ H L H L H
status of the other input signals. For use as a J-K flip-flop,
~ H H L H L
So must be kept high. QO
j H L L 0°
The only difference in functions from M74LS112AP is that X X
H H 0° 0°
this Ie has noRD input.
Note 1 !: Transition from high.to low·level (negative edge trigger)
X : Irrelevant
Toggle: complement of previou$ state with ~ transition of outputs
OUTPUT Q0------l>-OC ) : r t - - - Q 0 OUTPUT
_ DIRECT
~-~~~+--------r----oSD SET
INPUT
INPUT K 0 - - - - - - - - 1 I--------{) J INPUT
T
CLOCK INPUT
• MITSUBISHI
.... ELECTRIC . 2-121
MITSUBISHI LSTTLs
M74LSl13AP
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+7s'c, unless otherwise noted)

Vo Output voltage High-level state -O.s-Vee V
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7s'C, unless otherwise noted)
Limits
Min Typ Max
10H High-level output current VOH~2. 7V 0 -400 /-I A

VOL"; 0 .4V 0 4 mA
VOL"; 0 .SV 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7s'C, unless otherwise noted)
Limits
Min Typ * Max
VIC I nput clamp voltage Vee=4. 7sV. lie = -18mA -1.5 V
Vee=4.75V. VI=0.8V
VI=2V.loH=-400/-lA

Vee=4.7sV I IOL=4mA 0.25 0.4 V
VI=O.SV. VI=2V I 10L =SmA 0.35 0.5 V
J. K 20
So Vee=5.25V. VI=2.7V 60 /-IA
T SO
J. K 0.1
So Vee=s .25V. VI=10V 0.3 mA
T 0.4
J ,K -0.4
IlL Low-level input current Vee=5 .2sV. VI=O .4V mA
So T -O.S
los Short-circuit output current (Note 2) Vee-s.25V. Vo=OV -20 -100 mA
Icc Supply current Vee=5.25V INote31 4 6 mA
*: AlltypicalvaluesareatVcc=5V, Ta=25"C
Note 2: All measurements should be done quickly and -not more than one output should be shorted at a time.
Note 3 Supply current measurements should be done with Q and Q set alternately high and T'should be set low during actual measurement.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=2s'C, unless otherwise noted )
Limits
Min Typ Max
~
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation S 20 ns

CL=15pF
tpHL time, from T to Q. Q 7 20 ns
INote 4)
tpLH Low-to:high-Ievel, high-to-16w-level output propagation S 20 ns
tpHL time, from So to Q. Q 7 20 ns
• MITSUBISHI
2-122 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSl13AP
INPUT Vee
PG DUT
{1} The pulse generator {PGl has the following characteristics:
PRR = 1 MHz, tr = 6ns, If = 6ns, tw = 500ns,
50Q Vp "3Vp_p. Zo" 50n.
TIMING REQUIREMENTS (Vcc=5V, Ta=25'C, unlessotherwisenoted)
Limits
Min TVp Max
tW(SD) Direct set pulse width 25 10 ns
t r Clock rise time 650 100 ns
tsu (H) Setup time high J, K to T 20 9 ns
tSU(L) Setup time low J . K to T 20 12 ns
Ih (H) Hold time high J. K to T a -10 ns
th(L) Hold time low J. K to T a -5 ns
J, K
• MITSUBISHI
MITSUBISHI LSTTLs
M74LSl14AP
DUAL J·K NEGATIVE EDGE·TRIGGERED FLIP FLOP WITH SET,
COMMON RESET, AND COMMON CLOCK

The M74LSl14AP is a semiconductor integrated circuit
containing 2 J·K flip·flop circuits with common terminals
for clock input T and direct reset input Ro and discrete
terminals for inputs J and K and direct set inputs So . 01 RECT
RESET Vee
INPUT
lK-+ +- T
FEATURES CLOCK INPUT
INPUTS {
• Negative edge·triggering 1 J-+
+-2K} INPUTS
• Common clock input and direct reset input
0IRECI~~0i 180-+ 4 +-2J
• Discrete direct set input _ OIRECT
• Q and 0: outputs 1Q+- +-2S0 RESET
INPUT
OUTPUTS { _
• Wide operating temperature range ITa = -20-+75°C)
1Q+- 9 -+ 2Q}
_ OUTPUTS
APPLICATION GND -+ 2Q
'---~----'
equipment.
Outline 14P4
While T is high, signals J and K are put in the read·in state, FUNCTION TABLE INote 11
and when T changes from high to low, the J and K signals T K
So Ro J Q Q
immediately before the change emerge in outputs Q and 5 X L H X X H L
in accordance with the function table. By using So and RD X H L X X L H
this IC can be made into a direct R·S clip·flop. Wren both X L L X X H* H*
So and Ro are low, Q = 5 = high. However, when both of ~ H H H H Toggle
them change to high at the same time, the status of Q and ~ H H L H L H
5 cannot be anticipated. For use as a J·K flip·flop, So and ~ H H H L H L
Ro must be kept in high. ~ H H L L QO QO
Note 1 L : Transition from high to low-level (negative edge trigger)

X : Irrelevant
* :. Q = Q = high when SO = AD : : low and so when both SO and AD are
set high, the status of Q and "0 cannot be anticipated.
QO: Statu's of output before t change.
established.
Toggle: complement of previous state with t transition of outputs
BLOCK DIAGRAM (EACH FLlP·FLOP)
OUTPUT Q o----~l{ P-t---uQ OUTPUT
01 RECT DIRECT
RESETROo-~-~-------~~~-+-~ ~-~~4-+---------T-~~8OSET
INPUT INPUT
THE OTHER FLlP~FLOPS
INPUT K 0 - - - - - - - - - 1 I--------QJ INPUT
T
CLOCK INPUT
• MITSUBISHI
2-124 "'ELECTRIC
MITSUBISHI LSTTLs
M74LSl14AP
DUAL J·K NEGATIVE EDGE·TRIGGERED FLIP FLOP WITH SET,
Supply voltage
- -0.5-+7 V
VCC
Vo Output voltage High.l~vel state -0.5- Vec V
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75"C, unlessotherwisenoted)
Limits
Min Typ Max
Vce Supply voltage 4 .75 5 5.25 V
10H High·level output current VOH"'2.7V 0 -400 ~A
VOL'" 0 .4V 0 4 rnA

VOL"'0.5V 0 B rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C, unlessotherwisenoted)
Limits
Min Typ * Max
VIL Low-level input voltage o .B V
VIC Input clamp voltage Vcc=4.75V.llc=-IBrnA -1.5 V
Vcc~4.75V. VI-O.BV
VI=2V.loH=-400,uA

VCC=4.75V I IOL=4rnA 0.25 0.4 V
VI=0.8V, VI=2V I 10L-BrnA 0.35 0.5 V
J. K 20
So 60
Vcc=5 .25V. VI=2. 7V ~A
RO 120
T 160
J .K 0.1
So 0.3
Vcc=5.25V. VI=10V rnA
Ro 0.6
T 0.8
J .K -0.4
Low-level input current
So ~O .B
IlL VCC=5.25V. VI=O .4V INote 21 rnA
RO T -1.6
los· Short-circuit output current (Note 3) Vcc-5 .25V. Vo- OV ~20 ~ 100 rnA
Icc Supply current Vec- 5 .25V INote 41 4 6 rnA
* . All typical values are at VCC= 5V, T a = 25 C
Note 2: SO and AD should not both be set to O.4V simultaneously.
Note 4: Supply current measurements should be done with Q and 0: set alternately high and f should be set low during actual measurement.
SWITCHING CHARACTERISTICS (Vcc=5V. T a=25"C, unless otherwise noted)
Limits
Min Typ Max
f rnax Maximum clock frequency 30 45 MHz
tpHL time, from T 10 Q, Q CL=15pF INote 41 7 20 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation B 20 ns
tPHL time, from SO. RD to Q. Q 7 20 ns
• MITSUBISHI
~ELECTRIC 2-125
MITSUBISHI LSTTLs
M74LSl14AP
DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH SET,
INPUT Vee OUTPUT
PG DUT (1) The pulse generator (PG) has the following characteristics:
PRR = 1MHz, tr '" 6ns, t1 = 6ns, tw = 500n5,
50Q Vp =3Vp.p, Zo = 50n.
Limits
Min Type Max
tW(So,Ro) Direct set, reset pulse width 25 4 ns
tr Clock rise time 650 100 ns
t f Clock fall time 900 100 ns
tSU(H) Setup time high J K to T
I 20 11 ns
tSU(L) Setup time low J. K to T 20 13 ns
h(H) Hold time high J, K to T 0 -11 ns
th(L) Hold time low J, K to T 0 -6 ns
J, K'
Q Q
tPHL
Note 5: The shaded areas indicate when the input is permitted to change for pre·
dictable output performance.
. .• MITSUBISHI
2-126 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS122P
RETRIGGERA8LE MONOSTA8LE MUL TIVIBRATOR WITH RESET
DESCRIPTION
containing a retriggerable monostable multivibrator circuits
with a direct reset input.
Vee
FEATURES
• Long pulse widths can be generated using the retrigger- RE/CE TIMING PIN
TRIGGER
able function. INPUTS
NC
• Output pulses can be stopped at any time with direct
reset inputs. CE TIMING PIN
• A, B complementary inputs provided. DI RECT
RESET NC
• High breakdown input voltage (V I ~ 15V) INPUT
• Q and 0 outputs provided OUTPUT R, TIMING PIN

GND
• Internal timing resistance provided (R I = 10kS'l)
APPLICATION
RI=10kQ
General purpose, for use in industrial and consumer equip· NC: NO CONNECTION
ment Outline 14P4
FUNCTIONAL DESCRIPTION ing from high to low·level, or by BI or B2 switching from

As shown in Fig. 1, the timing pins RE/C E and C E are lowto high.
connected to the external resistance RT and static capac· The retriggering function is used when a wide output
itance CT , and when a triggering pulse is applied to inputs pulse width is desired. It is obtained by triggering Al or
Al , A2 and BI or B2 , a positive pulse appears at output Q, A2 , or BI or B2 prior to the pulse being fully output, thus
with a negative pulse appearing at Q. When the internal extending its length (See Fig. 2 (b)).
timing resistance is used (Fig. 2 (a)), the static capacitance Dropping the direct reset input RD to low·level im·
CT is connected to the CE and RE/C E pins. Thus, connect· mediately causes Q to go low·level and' 0 to be set high,
ing the RI and Vee pins causes the device to function as a regardless of the present output status. This allows the R D
monostable multivibrator and eliminates the need for an signal to be used to shorten the output pulse width to the
external resistance. The width of the pulse (tw) appearing desired length (See Fig. 2 (c)). A precaution worth noting
at output can be controlled by the values for RT and CT' is that when ~ or A2 is low·level and BI = B2 = high,' and
(When the internal timing resistance is used, the setting is RD is switched from low to high·level, the trigger will be
made with CT ). The trigger is affected by Al or A2 switch· activated changing the status of Q and O.
BLOCK DIAGRAM (Monostable multivibratorl
TIMING PINS
~
RE/CE CE
8 Q}
_ OUTPUTS
Q '
DIRECT
RESET
INPUT
--r GND
• MITSUBISHI
.... ELECTRIC 2-127
MITSUBISHI LSTTLs
M74LS122P
RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET
TIMING PIN EQUIVALENT CIRCUIT 2. Output Pulse Width tw

Output pulse widtl1 tw is set by the values of RT and ~
Vee as shown below. When RI is used, RT should equal 10k!l.
R
2-1. When CT > 1OOOpF, tw = K· T • CT' (1 ±O.1 )(ns).
For· the value for K, also refer to Typical Charac·
1. 7k 14.4k 3.3k teristics, K - ~ characteristics. (The value for RT
does not affect K.)
Units for RT and ~ are k!l and pF respectively.
2·2. When CT -&,; 1000pF, refer to the output pulse width
vs. CT , RT shown in the Typical Characteristics sec-
tion in back of this specification sheet.
3. Controlling Output Pulse Width
The width of the output pulse can be controlled using
th ree methods, based on the presence or absence of the
trigger signal and' R D signal.
3·1. Used as conventional device
\
Figure 2(a) shows the device used in the normal
FUNCTION TABLE (Note 1) monostable multivibrator mode. Here, output pulse
width tw is set using the equations and diagram
AD Al A2 81 82 Q Q
L X X X X L 'H
shown in the above section.
X H H X X L H 3·2. Extending the width of the output pulse by ret rig-
X X X L; X L H gering
X X X X L L H Figure 2(b) shows that the output pulse can be ex·
H L X i H JL U tended to any width desired by triggering again
H L X H i JL "1.J"" , before the pulse is fully output.
H X L i H JL "1.J"" 3·3. Shortening the width of the output pulse by signal
H X L H t JL U RD
H H ! H H JL "1.J"" Figure 2(c) shows that the RD signal can be.used to
H ! ! H. H JL "1.J"" terminate the output pulse initiated by the trigger.
H ! H H H JL U The output pulse can be shortened to any width
t L X H H JL "1.J"" desired.
i
Note 1. i :
X L H H
Transition from low to high (positive edg~ trigger)

JL "1.J""
B
n------...,...------
! : Transition from high to low (negative edge .trigger)
S1..: Positive-going one-shot trigger
1S: Negative-going one-shot trigger
X : Irrelevant
Q J'--< ----....::.....tw- - - - -
..t
, - - - I_ _
(a) Used as conventional device

OPERATIONAL DESCRIPTION
RETRIGGER
1. Using the timing pins B PULSE
Figure 1 shows the timing pins RE/C E and Cli con-
nected to the external resistance RT arid static capacitance
CT respectively. An alternate method to connecting RT is
to connect the RI and Vee Pins together. When a electro-
Q tw
lytic capacitor is used as CT , connect R EICE to the positive
(+) side and CE to th~ negative (-) side. In this case, the
device functions as a TTL IC, and eliminates the require-
n'-----,---__
(b) Total output pulse width using retriggering method
. d
B
ment for a switching diode. Where noise causes operational
problems, connect the CE pin to GND (located near the 7
pin) as shown by the dashed line in the diagram.
RD U
T Vee
-----,
I
I CT. + - AMCUNT OF
f----f- . tw
DECREASE DUE
TO RD PULSE
GND LINE TO CE PIN TO RE/CE PIN -
Ie} Shortening the output pulse width using the RD sIgnal
Fig. 1 Connecting External Resistance RT and Static
Capacitance CT to Timing Pins RE/CE and CE Fig. 2 Output Pulse Width Control
• MITSUBISHI
2-128 ...... ELECTRIC
MITSUBU~HI LSTTLs
M74LS122P
RETRIGGERABLE MONOSTABLE MULTIVIBRATOR.WITH RESET
4. Precautions
4·1. The retriggering pulse should follow the trigger by
0.22CT (ns), where the unit for CT is picofarads.
During this interval, the retriggering pulse will be in·
effective.
4·2. The wiring used to connect the external CT and RT
should be shielded from noise, and be as short as
possible (less than 3cm) to minimize line capacitance
and noise·induced errors.
4·3. Use a capacitor with good high·frequency charac·
teristics and a value of 0.01 to 0.1J.!F to connect
Vcc and GND.
4·4. Note that an output pulse will be produced when the
power to the device is turned on.
ABSOLUTE MAXIMUM RATINGS CTa=-20- +75'C, unlessotherwisenoted)

Tstg Storage temperature range -65-+150 '0
RECOMMENDED OPERATING CONDITIONS CTa=-20-+75"C, unlessotherwisenoted)
Limits
Min Typ Max
10H High-level output current VOH~2. 7V 0 -400 pA
VOL~0.4V 0 4 mA
VOL~0.5V 0 B mA
RT External timing resistance 5 260 kQ
CT External timing capacitance No limits
CR RE ICc. pi n line capacitance I 50 I pF
ELECTRICAL CHARACTERISTICS (T a =-20-+75"C. unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage Vee-4. 75V. he- -lBmA -1.5 V
Vee-4. 75V. VI-O.BV
VI=2V,IOH= -400pA
Vee-4.75V I IOL-4mA 0.25 0.4 V
VI=O. BV. VI=2V I IOL-BmA 0.35 0.5 V
Vee=5.25V, VI=2. 7V 20 pA
II H High-level input current
Vcc-S.25V. VI-l0V 0.1 mA
ilL Low-level input current Vee-5.25V. VI-0.4V -0.4 mA
los Short-circuit output current Vee=5.25V. Vo=OV -,20 -100 mA
ICC Supply current Vee=5.25V (Note 21 6 11 mA
* : All typical values are at Vee =5V, Ta = 25°C.

Note 2. Icc is measured with RE/CE. CE open. 4.5V is applied to RD. ~. A;, BI and 8 2 • with the measurement taken after A; and A; are momentarily
dropped to av, then raised to 4.5V. .
• MITSUBISHI
"'ELECTRIC 2-129
MITSUBISHI LSTTLs
M74LS122P
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C. unlessolherwi.e nOled)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time, from input AI. A'l to output Q 19 33 ns
tpLH Low-to-high-Ievel output propagation time, from input BI , 8, to output Q 20 44 ns
tpHL High-to-Iow-Ievel output propagation time,·from input A.. Az to output Q CT=OpF 21 45 ns
tpHL High-ta-Iow level output propagation time, from input 8 •• B:z to output Q RT=5kQ 23 56 ns
tpHL High·to-Iow-Ievel output propagation time, from input AD to output Q CL= ISpF (Nole 3) 18 27 ns
tpLH Low-to-high-Ievel output propagation time, from input AD to output Q 23 45 ns
tWQ(min) Minimum output pulse width. from inputs Al . A,. Bl and 8 2 to output Q 70 200 ns
CT-l000pF. RT-l0kQ
tWQ Output pulse width, from input A. B to output Q 4 4.55 5 p.s
ci.= 15pF (Nole 3)
Note 3. Measurement Circuit
INPUT Vee OUTPUT
PG OUT
(1) The pulse generator (PG) has the following chartlcteristics:
PRR = lMHz (twa mea.urement: 100kHz), I, = 6n.,
5012 If = 6n.,l w = 500n•• Vp = 3Vp.p, Zo = 50r!
(2) CL Includes probe and jig capacitance.
TIMING REQUIREMENTS(vcc";5~. Ta=25"C. unlessolherwisenoled)
~imits
Min !yp Max
tW(A,.A,) Trigger A pul.e widlh 40 115 ns
tW(B,.B,) Trigger B pulse width 40 10 ns
tW(Fi[i) Direct reset AD pulse width 40 15 ns
Q Q
Q Q
RO
• MITSUBISHI
2-130. .... ELECTRIC
MITSUBISHI LSTTLs
M74LS122P
OUTPUT PULSE WIDTH VS CT. R K VSCT

(C T ;;:::1000pF) I (C> 1000 pF)
I-
~ 1. Or-T""1I""TTII~ 1I"1"1""r"r11I~"1"1""r"r11I~TTITT1I
1111''-'
~ 0.9 ~~bl~ Slll
I- 0.8 - T a = 2S.C ttttll-t-+f-tlliIl-t+HttHl
::J
"- 0.7- tw=KCTRTltw:OUTPUTPULSE
I-
::J
o Wi"1D,"-TrH ittttl
o. 61-f-H1-ltIIft-t+ttttttt-++-t+trii HI
z
::;'
I-
0. sl-f-HI-ltIIft-t+ttttttt-++-t+ttttt--t-tttttttt
m
o 0. 4p...kt-lI-ltIIft-t+ttttttt-++-t+ttttt--t-tttttttt
o
~ 0 . 31---~f#lllt=t:I=:j:j:tj#F=F\:ffi#ll==f:mlllll
z
w 0 . 21-f--HHllIH-++++++fll-+-f-++fftll--++++ttttl
Q
:t O. ll-f-HHtltft-t+ttttttt-++-ttttttt--t-tttttttt
w
~ ~~O~3~~~10~4~~~1~05~~Wl~O~6~~~107
~
EXTERNAL TIMING CAPACITANCE CT IpFI EXTERNAL TIMING CAPACITANCE cTlpF)
CHANGE RATIO OF OUTPUT PULSE CHANGE RATIO OF OUTPUT PULSE

vs POWER SUPPLY VOLTAGE vs AMBIENT TEMPERATURE
~
~
o Tat5~- o Vcc l=5J-
~
RT= 10k Q RT=10kQ
a: CT = 1000pF ~ CT= 1000pF
1"\ a:
-
w w
'" '"
"
Z Z
"
I 1
"
I
1
U
r-- I"'--.
----
I
......... U
I
I-
o I"""'- I- ........
t--
""
o
~ 1
......... ~ - 1
2
......... w _ 2
........ ~
- 3 15: - 3
I- I-
~ - 4 ~ - 4
I- I-
.::J
o - 5 ::J - 5
4 4.5 5.5 6.5
o 25 25 50 75 100
POWER SUPPLY VOLTAGE Vcc(V) AMBIENT TEMPERATURE Tal"C)
.• MITSUBISHI
.... ELECTRIC 2-131
MITSUBISHI LSTTLs
M74LS123P
DUAL RETRIGGERABLE MONOSTABLE MUL TIVIBRATOR WITH RESET
DESCRIPTION PIN CONFIGURATION (TOP ,VIEW) .

containing two retriggerable monostable multivibrator cir-
cuits with direct reset inputs_
vee
TRIGGER {
FEATURES INPUTS
• Long pulse widths can be generated using the retrig-

1 RE ICE I TIMING
DIRECT
RESET WE I PINS
gerable function INPUT
• Output pulses can be stopped at any' time with direct

OUTPUTS { } OUTPUTS
reset inputs 20 <--
• ;6;, B complementary inputs provided DIRECT
RESET
• High breakdown input voltage (VI ~ 15V) INPUT
• Q and Q outputs provided
TRIGGER
• Wide operating temperature range (Ta=-20~+75°C) }
INPUTS
GND
APPLICATION
equipment. Outline 16P4
FUNCTIONAL DESCRIPTION output pulse width can be extended. (Fig. 2(b))

Positive pulses appear in output Q and negative pulses in Q can be reset immediately low and Q high by setting
output Q by connecting external resistor RT and capacitor direct reset input R D low irrespective of the status of the
CT to timing pins RE/C E and C E , as shown in Fig. 1 on the outputs. The output pulse width can there'fore be made as
next page, and by applying a trigger from input A or B. short as preferred by the RD signal. (Fig. 2(c)) When RD
(Fig. 2(a)) The width tw of the pulses appearing in the changes from low to high with A at low and B at high, the
outputs is set by RT and CT' When A changes from high to trigger is applied and the status of Q and Q changes.
low or when B changes from low to high, tHe trigger is
applied.
The retriggerable function is used to obtain long output
pulse widths and when the trigger is applied from A or B
immediately before the output pulse is completed, the
BLOCK DIAGRAM (EACH MONOSTABLE MULTIVIBRATOR)
TIMING PINS
,-------J'-----
RE/CE
r Ii O--------<l"-_~_____
TR IGGE R
INPUTS l B
v-,.---t-..J
Q]OUT-
PUTS
Q
DIRECT
RESET AD
INPUT
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS123P
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET
TIMING PIN EQUIVALENT CIRCUIT brought to K by value of RT .)

RT is measured in kilohms and CT in picofarads
Vee
Depending on .the product, fluctuations in the order of
3/-10o/cmayoccur.
2-2. When CT is equal to or less than 1000pF
Refer to the output pulse width versus-C T , RT given
in the typical characteristics.
3. Output pulse width control
The output pulse width can be controlled in 3 ways by
using, or not using, the trigger signal and R D signal.
3-1." Normal use
1.2Sk
This is the normal method of use as a regular
monostable multivibrator such as that shown in Fig.
Unit: Q 2(a) and the output pulse width tw can be set as for
the formula and figure in section 2 above.
FUNCTION TABLE (Note 11 3-2. Extension. of output pulse width with retrigger func-
Ro A B
tion
Q Q
L X X L H As shown in Fig. 2(b), the output pulse width can be
X H X L H extended as desired by applying a trigger pulse before
X X L L H the output pulse is completed.
H L i SL L.J 3-3. Shortening of the output pulse width with RD signal
H j H JL L.J As shown in Fig. 2(c), the output pulse which has been
i L H JL Ll generated by the trigger signal can be term inated with
Note 1 . i : Transition from low to high. (positive edge triggering)
the R D signal and it is possible to shorten its width as
t : Transition from high t.o low. (negative edge triggering) required.
Sl...: Positive one-shot operation.
LJ: Negative one-shot operation. B
Jl-.-------------------
X : Irrelevant
OPERATION DESCRIPTION
1. How to use the timing pins
Q JI-'--' ----'..!.!....tw~>,---I __
As shown in Fig. 1, external resistor RT and capacitor CT (a) Normal use
--.Jn L---1·~etrigge;I
are connected to timing pins RE/C E and C E. Connect the
positive to the RE/C E side and the negative to the C E side B
pulse L _ _ _ _ _ _ __
when using CT with polarity. In this case, it is not necessary
to connect a switching diode required with the same type
of TTL IC. With malfunctions caused by noise, connect CE
I. tw + tpLH
to the GND line (neighboring on pin 8) as shown by the Q tw

dotted line. in Fig. 1. V
Bn
(b) Extension of output pulse width with retrigger
,----',:f' "1' ~-------------------
GND line, To pin CE
Fig. 1 Connection of external resistor RT and capacitor CT

To pin RE/CE
Ro U
to timing pins RE/CE and CE ..----,------,I
2. Output pulse width tw I
The output pulse width tw is set by RT and CT Decrease with

AD pulse
2-1. When CT is greater than 1000pF
tw=O.4S·R T ·O T (ns) X(1±O.1)
Refer to K-C T characteristics indicated in TYPICAL (c) Shortening of output pulse width with AD signal
CHARACTERISTICS for value of K. (No change is Fig. 2 Output pulse width control
• MITSUBISHI
.... ELECTRIC 2-133
MITSUBISHI LSTTLs
M74LS123P
4. Precautions with use 4-3. Connect an external capacitor of O.01"1).1~F with

4·1. Apply the retrigger pulse after a wait of O.22C T (ns) good high-frequency characteristics between pins Vee
upon application of the trigger pulse. CT is measured in and GND_
picofarads. The retrigger pulse during this period is 4-4. The output pulse is generated when the power is
ineffective. switched on.
4-2. In order to minimize the floating capacitance and to
safeguard against malfunction caused by noise, make
the RT and CT wiring as short as possible and avoid
signal wires which may be conducive to noise.
ABSOLUTE MAXIMUM RATINGS (Ta~-20- +75'C. unless otherwise noted)

Topr Operating free-air ambient temperature range. -20-+75 'C
RECOMMENDED OPERATI NG CONDITIONS (Ta= -20- + 75'C. unless otherwise noted)
Limits
Min Typ Max

10H High-level output current VOH<':;2.7V 0 -400 I1A
I
VOL";0.4V 0 4 mA
VOL";0.5V 0 8 mA
OT External timing capacitance None
OR RE/CE pin wiring capacitance 50 pF
Limits
Min Typ * Max
V,L LOW-level input voltage 0.8 V
V,e Input clamp voltage Vee=4.75V.lle=-18mA -1.5 V
Vee=4. 75V. V,=0.8V
V,=2V. 10H= -40011A

Vee=4.75V I 10L= 4 rnA 0.25 0.4 V
V,=0.8V.V,=2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V. V,=2.7V 20 I1A
"H High·level input current
Vee=5.25V. V,~10V 0.1 mA
"L LOW-level input current Vee=5.25V. V,=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vee=5.25V. VO-OV -20 -100 rnA
* All typical values are at Vcc=5V, Ta~25°C.
Note 3: Icc is measured with RE/CE and CE open, 4.5V applied to AD, A and B and A set from OV momentarily to 4.5V.
• MITSUBISHI
2-134 ~ELECTRIC
MITSUBISHI LSTTLs
M74LS123P
SWITCHING CHARACTERISTICS evcc= 5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time, from input A to output Q 19 33 ns
tpLH Low-to-high-Ievel output propagation time, from input B to output Q 20 44 ns
tpHL High-to-Iow-level output propagation time, f~om input A to output Q CT= 0 pF 21 45 ns
tpHL High-to-Iow-Ievel output propagation time, from input B to output Q RT= 5 kQ 23 56 ns
tPHL High-to-Iow-Ievel output propagation time, from input Ro to output Q CL=15pF INote41 18 27 ns
tpLH Low-to-high-Ievel output propagation time, from input Ro to output Q 23 45 ns
two (min) Minimum output pulse width, from inputs A . B to output Q 66 200 ns
CT= 1000pF. RT= 10kQ
tWQ Output pulse width, from inputs A. 8 to output Q 4 4.55 5 I-'S
CL=15pF INote 41
Note 4; Measurement circuit INPUT Vee OUTPUT

PRR=lMHz (100kHz with two measurement), tr=6ns, tf=6ns, tw~40ns, Vp=3Vp_p, Zo=50.Q.
TIMING REQUIREMENTS evcc~ 5V. Ta~25°C. unless otherwise noted)
Limits
Min Typ Max
tW(A) Trigger input A pulse width 40 15 ns
tW(B) Trigger input 8pulse width 40 10 ns
tW(Ro) Direct reset input pulse width RD 40 15 ns
Q Q
tWQ, tWQ(min) tWQ' tWQ(min)
• MITSUBISHI
"'ELECTRIC 2-135
MITSUBISHI LSTTLs
.M74LS123P
OUTPUT PULSE WIDTH VS CT. RT K VS CT
(CT;;;;IOOOpF) I (C> 1000 pF)
f--
100000
a
:i: 1. 0
RT 260kQ ~ 0.9
IIIIIII IIIIII
I- RT··1S0·ki'iR, ::J lU~~t~ ~~ttlll
a.. 0.8 I-
-;;; 10000 f-- Ta= 25·0
S ~ 0.7 I- tw = KOTRT !tw : OUTPUT PULSE
:0:
b
:i:
w
III
...J
::J
0-
1000
f-
- 1/
RT SOkQ
·RT 40kQ
::J
a
z
~
<D
o
a
0,6
0.5
0.4
. WIDTH)
f--
::>
RT-20kQ ~ 0.3
0- 100 RT'10kO z
f-- w 0.2
::J
o i=VCC -- 5 V RTlfs kQ g
TTTlT tt 0.1
I-Ta ~,~~,·C . tttttil t t
10 ~ 0
1 10 100 1000 10000 ~ 10 3 10' 10 5 10· 10 7
>c:
EXTERNAL CAPACITANCE OT (pF) EXTERNAL TIMING CAPACITANCE CT(pF)
Note 5. Error within ±20% of output width given in the figure above.
OUTPUT PULSE WIDTH VARIATION VS OUTPUT PULSE WIDTH VARIATION VS

SUPPLY VOLTAGE AMBIENT TEMPERATURE
5 5
4
Ta~2
' 1·C "1 _
4
Vcc'=kv ' _
z
o
~
3,,, RT = 10kQ
CT~1000pF-
z
o
~
a:
3
RT=10kQ
OT = 100,opF-
a:<! 2 2
> 1
1"- ~ 1 ...,..
:0:
f'....: ~ i""- t-
-
b o a 0
:i:
........
t-.... :i: r- t-
1 ........ w - 1
w
~ r-..... ~ r-
::>
0-
S
-2
-3
r--. ::>
0-
S
-
-3
2
5~
.0-
S
o
-4 -4
- -1 25
4.5 5 5.5 6 6.5 o 25 50 75 100
SUPPLY VOLTAGE Vee (V) AMBIENT TEMPERATURE Ta (·0)
• MITSUBISHI
2-136 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS12SAP
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUT
DESCRIPTION
containing 4 buffers with 3-state outputs and is provided
with an output control input OC which is independent for
each buffer. OUTP.UT
CONTROL Vee
INPUT OUTPUT
INPUT 1A __ +- 4 00 CONTROL
FEATURES INPUT
• Provided with output control input independent for OUTPUT 1Y +- +- 4A INPUT
each of 4 circuits OUTPUT
CONTROL 200-- OUTPUT
• High breakdown input voltage (YI ~ 15V) INPUT
_ OUTPUT
• Low power dissipation (Pd = 52~W typical) INPUT +- 3 OC CONTROL
INPUT
OUTPUT 2Y +- INPUT
GNO --3 Y OUTPUT
APPLICATION
equipment.
Outline 14P4
When OC is low, high appears in the output Y if input A is CIRCUIT SCHEMATIC (EACH BUFFER)
high and low appears if A is low. When OC is high, Y is put
in the high-impedance state irrespective of the status of A.
For this reason, this device' is most suitable for use as a bus
line driver.
00 A Y
L L INPUT A ~-+-J~--+--+'==i---t----+--Jlf-:-:
L
L H H
H X Z GND
Note 1: X : Irrelevant
Z : high-impedance
UNIT: Q
ABSOLUTE MAXIMUM RATINGS(Ta j -20-+75"c. unless otherwise noted)

I---
Vo Output voltage Off-state -0.5- +5.5 V
Tstg Storage temperature range -65- +150 "C
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75"C. unless otherwise noted)
Limits
. Min Typ Max

IOH High-level output current VOH<;;2.4V 0 -2.6 rnA
VOL";0.4V 0 12 mA
VOL";0.5V 0 24 rnA
• MITSUBISHI
.... ELECTRIC 2-137 .
MITSUBISHI LSTTLs
M74LS125AP
QUADRUPLE BUS BUFFER GATE WITH 3·STATE OUTPUT
ELECTRICAL CHARACTERISTICS (Ta= - 20-+75'C, unless otherwise noted)
Limits
Min Typ* Max
VIL "Low-level input voltage 0.8 V
Vie Input clamp voltage Vee=4.75V.lle=-18mA -1.5 V
VCC-4.75V, VI=0.8V
VI=2V,IOH=-2.6mA

Vec";'4.75V I IOL=12mA 0.25 0.4 V
VI=0.8V, VI=2V I IOL=24mA 0.35 0.5 V
IOZH ·Off-state high-level output current Vec=5.25V, VI (OC)=2V, VO=2.4V 20 /.I. A
IOZL Off-state low-level output current Vee=5.25V, VI (oe)=2V, VO=0.4V -20 ,ItA
Vce=5.25V, VI=2.7V 20 /.I.A

Vec-5.25V, VI-l0V 0.1 mA
IlL Low-level input current Vee=5.25V, 'v 1=0.4V -0.4 mA
los Short-circuit output current (Note 21 Vee=5.25V, Vo=OV -40 -225 mA
leez Supply current, all outputs off Vee=5.25V, VI=OV, VI (OC)=4.5V 11 20 mA
* : All typical values are at Vee = 5V, T a = 25'C.
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, CL=45pF 7 15 ns
high-to-Iow-Ievel output propagation time,
tpHL from input A to output Y INote3) 10 18 ns
tPZH Output enable time"to high·level RL=667Q, CL=45pF (Note 3) 12 20 ns
tPZL Output enable time to low-level RL=667Q, CL=45pF INote3) 15 25 ns
tpHZ Outpu"t disable time from high-level RL=667Q, CL= 5 pF (Note 3) 13 20 ns
tpLZ Output disable time fr"om low-level RL=667Q CL= 5 pF (Note 3) 13 20 ns

. TIMING DIAGRAM (Reference level = 1.3V)
INPUT Vee
5 kQ
SW2
Parameter SWl SW2
tPZH Open Closed
tPZL Closed Open
tPLZ Closed Closed
t PHZ Closed Closed

PRR = 1MHz, tr =6ns, tf =6ns, tw = 500ns,
Vp =3Vp.p, Zo =50n.
(2) All diodes are switching diodes (trr = ~4ns)
O.5V
y
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS126AP
DESCRIPTION
with an output control input OC which is independent for
each buffer. OUTPUT
CONTROL 100 .... 1 Vee
INPUT
OUTPUT
FEATURES INPUT +- 400 CONTROL
INPUT
• Provided with output control input independent for OUTPUT lY +- +- 4A INPUT
each of 4 circuits OUTPUT
CONTROL 200 .... 4 .... 4Y OUTPUT
OUTPUT
• Low power dissipation (Pd = 59mW typical) INPUT 2A .... +-300 CONTROL
• High speed (tpd = 10ns typical) INPUT
OUTPUT +-3A INPUT
• Wide operating temperature range (T a = 20 - +75°C)
GND .... 3Y OUTPUT
APPLICATION
equipment.
Outline 14P4
When OC is high, high appears in the output Y if input A is CIRCUIT SCHEMATIC (EACH BUFFER)
high and low appears if A is low. When OC is low, Y is put
in the high-impedance state irrespective of the status of A. Veo
For this reason, this device is most suitable for use as a bus . 12k
line driver. OUTPUT
OC A y
H L L
H H H
L X Z
Note 1: X : irrelevant
Z : high-impedance UNIT: Q
ABSOLUTE MA,\IMUM RATINGS <ra=-20-+75·C. unlessotherwisenoted)
Vo Output voltage Off-state -0.5-+5.5 V
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75·C. unlessotherwisenoted)
Limits
Min Typ Max
IOH High-level output current VOH""2.4V 0 -2.6 mA
VOL~O .4V 0 12 mA
VOL~O .5V 0 24 mA
•. MITSUBISHI
.... ELECTRIC 2-139
MITSUBISHI LSTTLs
M74LS126AP
ELECTRICAL CHARACTERISTICS (Ta= --;-20-+75'C, unless otherwise noted)
Limits
Min Typ* Max
VIL Lo'w-Ievel input voltage 0.8 V
VIC Input damp voltage Vcc=4.75V,IIC=-18mA -1.5 V
Vcc=4.75V. VI=0.8V
VO H High-level output voltage 2.4 3.1 V
VI=2V, 10H= -2 .6mA

VcC=4.75V I IOL=12mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=24rnA 0.35 0.5 V
10ZH Off-state high-level output current Vcc=5.25V, VI(OG)=0.8V, Vo=2.4V 2.0 f.lA
10ZL Off-state lOW-level output current VcC=5.25V, VI(OC)=0.8V, VO=0.4V -20 f.lA
Vcc=5.25V, VI=2. 7V , 2.0 f.lA
Vcc=5.25V, VI=10V 0.1 rnA
IlL Low-level input current Vcc=5 .25V, VI=O .4V -0.4 mA
los Short-circuit output current (Note 2) Vcc-5.25V. VO-OV -40 -225 mA
IcCZ Supply' current, all outputs off VcC=5 .25V. VI=OV 12 22 rnA
~ : AlltypicalvaluesareatVcc=5V. Ta=25 c C.
SWITCHING CHARACTERISTICS (VCC~ 5V. Ta=25'C, unless otherwise noted)
Limits
Min T.yp Max
tpLH Low-to-high-level, 7 15 ns
high-to-Iow-Ievel output propagation time, CL=45pF (Note 3)
tpHL from input A to output Y 10 18 ns
tPZH Output enable time to high-level RL=667 Q. CL=4SpF (Note 3) 14 25 ns
tPZL Output enable time to low-level RL=667Q. CL=45pF (Note 3) 16 35 ns
tpHZ Output disable time from high-level RL=667Q, CL = 5pF (Note 3) 16 25 ns
tpLZ Output disable time from low-level RL=.667Q, CL= SpF (Note3) 12 25 ns
Note 3: Measurement circuit TIMING DIAGRAM (Reference level 1.3V)
Parameter SWI SW2

c-.
DC
t PZH Open Closed
t PZL Closed Open
t PLZ Closed Closed

Closed Closed
y
t PHZ

PRR = lMHz. tr = 6ns. tf = 6ns, tw = 500ns.
Vp = 3Vp.p, Zo = SOQ.
(2) All diodes are switching diodes (trr;£; 4ns)
DC
• MITSUBISHI
2-140 "ELECTRIC
MITSUBISHI LSTTLs
M74LS132P
QUADRUPLE 2-INPUT POSITIVE NAND SCHMITT TRIGGER

containing four 2-input positive-logic NAND gates having a
Schmitt trigger function and negative-logic NOR gates.
'A - 1 Vee
FEATURES INPUTS {

18 - +- 4A}. INPUTS
• Wide hysteresis width (O.8V typical) and high noise OUTPUT 1Y +- 3 +- 48
margin 2A- 11 -. 4Y OUTPUT

• High breakdown input voltage INPUTS {
(VI ~ 15V)
28 -.
+- 3A} INPUTS
• Low power dissipation (Pd = 35.2mW typical) OUTPUT 2Y +- 6 +- 38

GND
• Wide operating temperature range (T a = -20~+ 75° C)
APPLICATION
General purpose, for use in i(ldustrial and consumer
achievement of input high breakdown voltage, high
FUNCTION TABLE
speed, low power dissipation, and high fan-out. With
positive feedback applied in the circuit, the hysteresis width A 8 Y
L L H
is O.8V (typical). Accordingly, the noise margin is high.
H L H
Even slow changing input signals result in a shaped
L H H
waveform output without causing oscillation.
H H L
When inputs A and B are high, output Y is low, and
when either or both inputs are low, Y is high.
Refer to M7 4LS14P for the typical characteristics.
CIRCUIT SCHEMATIC (EACH SCHMITT TRIGGER)
r---~--~--------~----~----------~--~Vee
'--INIr--+-----1[) Y OUTPUT
INPUTS{ A
_ 8 o--+--.---~I--'
L-~--------~--------------~~------~----4----OGND
UNIT: Q
. • MITSUBISHI
.... ~LECTRIC 2-141
MITSUBISHI LSTTLs
M74LS132P
QUADRUPLE 2-INPUT POSITIVE NAND SCHMITT TRIGGER
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+WC. unlessotherwisenoted)
VCC Supply voltage -0.5-+7 V

V, I nput voltage -0.5-+ 15 V
Vo I Output voltage High-level state -0.5- VCC V
Topr Operating free-air ambient temperature range -20- +75 t
Tstg Storage temperature range -65- + 150 t
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75t. unless otherwise noted)
Limits
Min Typ Max
VCC Su~ply voltage 4.75 5 5.25 V
10H High-level output current VOH<i;2.7V 0 -400 f.'A

VOL";;0.4V 0 4 mA
VOL";;0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75t. unless otherwise noted)
Limits
SYmbol Parameter Test conditions Unit
Min Typ * Max
VT+ Positive-going threshold voltage VCC=5V 1.4 1.6 1.9 V

VT- Negative-going threshold voltage Vcc=5V 0.5 0.8 1 V
VT+-VT- Hysteresis width Vcc=5V 0.4 0.8 V
V'C Input clamp voltage VCC-4. 75V. I,C= - 18mA -1.5 V
VCC=4.75V. V,=0.5V
IOH=-400,uA

VcC=4.75V I IOL=4mA 0.25 0.4 V
V,= 1.9V I IOL=8mA 0.35 0.5 V
IT+ Input current at positive-going threshold VCC=5V, V,=VT+ -0.14 mA
IT- Input current at negative-going threshold VCC=5V. V,=VT- -0.18 mA
VCC=5.25V
20 ,uA
V,c=2.7V
Vcc=5.25V
0.1 mA
V,= lOV
IlL Low-level input current VCC=5.25V, V,=0.4V -0.4 mA
los Short-circuit output current (Note') Vcc=5.25V, Vo=OV -20 -100 mA
ICCH Supply current, all outputs high Vcc=5.25V. V,=OV 5.9 11 mA
ICCL Supply current, all outputs low Vcc=5.25V, V,=4.5V 8.2 14 mA
* : All typical values are at Vcc=5V, Ta=25't
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25t. unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time 12 22 ns
High-to·low·leve[ output propagation time
GL= 15pF (Note 21
t pHL 14 22 ns
Note 2: Measurement circuit TIMING DIAGRAM

INPUT Vee OUTPUT
1.6V 0.8V
A,B

y
characteristics: 1.3V
PRR == lMHz, tr '" 6ns, tf == 6ns, tw '" 500ns.
Vp " 3Vp.p, Zo " 50n.
•. MITSUBISHI
2-142 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS133P
DESCRIPTION
containing one 13-input positive-logic NAND gate, usable as
a negative logic NOR gate.
FEATURES
• High breakdown input voltage (VI ~ 15Vl
• Low power dissipation (Pd = 2.5mW typical! INPUTS
• High speed (tpd = 11 ns typical! INPUTS
• Wide operating temperature range (Ta = -20 ~ +75°CI
APPLICATION
equipment.
Outline 16P4
The use of PNP transistors for the inputs and active pull-up
transistors for the outputs enables input high breakdown
voltage, high speed, low power dissipation and high fan-out. CIRCUIT SCHEMATIC
When inputs A through M are high, output Y is low and
when one or more of the inputs is low, output Y is high. r--'---'---~--o Vee
FUNCTION TABLE
INPUTS{A '-"II1'Y+--oY
A N Y (131 OUTPUT
L L H
M
H L H
L H H
' - -___~-----......- .......--c GND
H H L
N=S'C-D'E-F'G'H-I -J -K'L'M
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta= -20- +75'C, unless otherwise noted)

Va Output voltage High-level state -0.5 Vee V
Topr Operating free-air ambie~t temperature range '-20-+75 'C
• MITSUBISHI
.... ELECTRIC 2-143
MITSUBISHI LSTTLs
M74LS133P
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+WC, unlessotherwisenoted)
Limits
Min Typ Max
10H High·level output current VOH~2.7V 0 -400 pA

VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta = -20- +75·C, unless otherwise noted)

Limits
Min Typ * Max
VIL Low-level input voltage 0.,8 V
VIO Input clamp voltage VOO=4. 75V. 110= -18mA -1.5 V
VOO=4.7SV. VI=0.8V
IOH= -400pA
Low·level output voltage

Voo=4.7SV I IOL=4mA o.2S 0.4 V
VOL
VI=2V I IOL=8mA o.3S O.S V
Voo=S.2SV. VI=2. 7V 20 pA
VOO=S.2SV. VI=10V 0.1 mA
IlL Low-level input current VOO=S.2SV. VI=0.4V -- 0.4 mA
los Short-circuit output current (Note 1) VOO=S.2SV. Vo=OV -20 -100 mA
100H Supply current, all inputs high VOO=S.2SV. VI=OV o.3S 0.5 mA
100L Supply current, all inputs low VOO=S.2SV. VI-Open 0.6 1.1 mA
* : All typical values are at Vcc= 5V, Ta = 25°C
Notel: All measurements should be done quickly.
SWITCHING CHARACTERISTICS(voo=SV. Ta=2S·C, unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high.level/high,to-low~level 6 15 ns
output propagation time CL=lSpF{Note21
tpHL 16 38 ns

INPUT Vee OUTPUT
A-M
PG DUT
y
SOQ
PHL

Vp = 3Vp.p, Zo = 50!'l.
. (2) CL includes probe and jig capacitance.
PRECAUTION FOR USE
Connect pins not being used to the Vee supply voltage,
• MITSUBISHI
'2-144 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS136P
WITH OPEN COLLECTOR OUTPUTS
DESCRIPTION
containing 4 dual-input exclusive-OR gates with open
collector output.
1A -+ 1 Vee
FEATURES INPUTS 1
• Usable in wire-AND connection 18 -+
• High breakdown output voltage (VO ~ 7V)
OUTPUT 1Y +- 3
• High speed Itpd = 13ns typical) 2A-+ 4 OUTPUT
• Wide operating temperature range ITa =-20 - +75° C)

INPUTS 1
28 -+
OUTPUT 2 Y +- 6
APPLICATION
General purpose, for use in industrial and consumer GND
equipment.
FUNCTIONAL DESCRIPTION * : OPEN COLLECTOR OUTPUT
With the use of open collector output, the high-level output Outline 14P4
impedance can be freely selected by means of an external
resistor. This make possible use in the wire-AND, which has CIRCUIT SCHEMATIC (EACH GATE)
been impossible with conventional gates.
r--.-'r---.---~----oVeo
When both inputs A and B are high or both low, output
24k 24k 9k 24k 7k
Y is low, and when A and B are high and low or low and
high respectively, Y is high.
Y OUTPUT
INPUTS { :o-t-r---:I4l-----'
Sk
FUNCTION TABLE
A B Y
L L L
H L H
L-~------~----------~~GND
L H H
UNIT: Q
H H L
ABSOLUTE MAXIMUM RATINGS (T~=-20-+75·C. unlessotherwisenoted)

Vee Supply v~ltage -0.5-+7 V
Topr Operating free-air ambient ~emperature range -20-+75 ·C
• MITSUBISHI
"-ELECTRIC 2-145
MITSUBISHI LSTTLs
M74LS136P
WITH OPEN COLLECTOR OUTPUTS
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwise'noted)
Limits
Min Typ Max
IOH High·level output current Vo =5.5V 0 100 J.<A
VOL~O .4V 0 4 mA
VOL~O .5V 0 8 mA
ELECTRICAL CHARACTERISTICS (T a =-20- +75'C, unless otherwise noted)
Limits
Min Typ* Max
VIC I nput clamp voltage Vcc=4. 75V. IIC= -18mA -1.5 V
Vce=4.75V. VI=0.8V
IOH High-level output current 100 J.<A
VI=2V. VO=5.5V
VOL Low-level output lIoltage

VCC=4.75V I IOL=4mA 0.25 0.4 V
VI=0.BV.VI=2V I IOL=8mA 0.35 0.5 V
Vcc=5.25V. VI=2.7V 40 J.<.A
Vec=5.25V. VI=10V 0.2 mA
IlL Low-level input current VCC=5.25V. VI=0.4V -0.8 mA
Icc Supply current VCC=5.25V (Note 11 I 6.1 10 I mA
* : All typical values are at Vee =5V, Ta = 25°C.
Note 1: Icc is measured with all inputs grounded,
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
\PLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation RL = 2 kQ 14 30 ns
\PHL time, CL = 15pF Other input low (Note 2) 14 30 ns
\PLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation RL - 2 kQ 12 30 ns
\PHL time. CL == 15pF Other input high (Note 2) 12 30 ns
1
R'L
8
PG DUT
50Q
r CL

y
PRR = 1MHz, tr = 6ns;tf = 6ns, tw = 500ns,

Vp = 3Vp"p. Zo = 50n
(2) CL includes probe and jig' capacitance.
• MITSUBISHI
2-146 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS137P
3·LlNE·TO·8·LlNE DECODER/DEMULTIPLEXER WITH ADDRESS LATCH
DESCRIPTION
The M74LS137P is a semiconductor integrated circuit con- PIN CONFIGURATION (TOP VIEW)
taining a 3-line-to-8-line decoder/multiplexer function with
address latch.
FEATURES
• Address latch capability with latch enable input
• Easy cascade connection with two enable inputs
INPUTS
LATCH
IDA ---+
DB---+
De ---+
1 Vee
ENABLE EL ---+ 4
• Wide operating temperature range (Ta: -20 - +75°C) INPUT
Ez ---+ 5 OUTPUT
ENABLE {
APPLICATIONS INPUTS E,---+

OUTPUTS
ment.
GND
FUNCTIONAL DESCRIPTIONS
When latch enable input EL is low, the data applied to
inputs DA -Dc are read into the latch; when it is high, the Outline 16P4
device operates as a decoder/demultiplexer with a function
that retains the data
When the device is used as a decoder and inputs DA -Dc When the device is used as a demultiplexer, it functions
are designated with a 3-bit binary code, one output among as a 1-line'to·8·line demultiplexer by making El and E2 the
outputs Yo- y 7 corresponding to the numerical value is set data inputs and DA -Dc the selection inputs.
low and the other seven outputs are all set high. In this This Ie is the same as the M74LS138P except that it fea-
case, enable input El is set high and enable input E2 is set tures a latch function in inputs DA-D c .
low. When El and E2 are subject to any other conditions,
the outputs are set high regardless of the status of DA-Dc.
(Refer to application examples)
BLOCK DIAGRAM
Vee
YO
Y1
INPUTS Yz
OUTPUTS
Y3
LATCH ENAB LE
INPUT
","cc ',,"n {
• MITSUBISHI
"ELECTRIC 2-147
MITSUBISHI LSTTLs
M74LS137P
3-LlNE-TO-8-LlNE DECODER/DEMULTIPLEXER WITH ADDRESS LATCH
FUNCTION TABLE
EL El E2 Do Ds DA Yo Yl Y2 Y3 Y4 Ys Y6 Y7
X X H X X X H H H H H H H H
X L X X X X H H H H H H H H
L H L L L L L H H H H H H H
L H L L L H H L H H H H H H
L H L L H L H H L H H H H H
L H L L H H H H H L H H H H
L H L H L L H H H H L H H H
L H L H L H H H H H H L H H
L H L H H L H H H H H H L H
L H L H H H H H H H H H H L
Output corresponding to stored
H H L X X X
address, L; all other, H.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'O, unless otherwise noted)
VOO· Supply voltage -0.5-+7 V

V, I nput voltage -0.5~+15 V
Vo Output voltage High-level state -0.5~Voo V
Topr Operating free-air ambient temperature range -20- +75 '0
Tstg Storage temperature range -65':' +150 '0
RECOMMENDED OPERATING CONDITIONS (Ta =-20- +75'0, unless otherWise noted)
Limits
Min Typ Max

10H High-level output current VOH~2.7V 0 -400 J.1A
VOL"'O .4V 0 4 mA
I
VOL"'0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta = -20- +75'0, unless otherwise noted)
Limits
Min Typ* Max

V,O Input clamp voltage Voo=4. 75V, "0= -18mA -1.5 V.
VoO=4.75V, V,=0.8V
V,=2V,IOH=-400J.1A

Voo=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, VI=2V I IOL=8mA 0.35 0.5 V
Voo=S.2SV, V,=2.7V 20 J.1A
VOO=S.2SV, V,=10V 0.1 mA
I EL, Et. E2 - 0.4
I,L Low-level input current Voo=S.2SV, V,=0.4V mA
1 DA. Ds, Do -0.2
los Short-circuit output current (Note 2l VOO=5 .2SV, VO=OV - 20 -100 mA
100 Supply current Voo=S.2SV (Note 31 11 18 mA
* : All typical values are at Vee 5V. Ta "" 25°C.
=
Note 2: All measurements should be done ql,lickly. and not more tha~ one output should be shorted at a time.
Note 3: Supply current should be measured with all inputs grounded.
• MITSUBISHI
2-148 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS137P
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-te-high, high-ta-Iow output 2 8 17

propagation time, from inputs DA. Os. - ns
I PHL Dc to outputs Yo - Y7 4 15 38
!(
-
I PLH Low-ta-high, high-ta-Iow output 3 10 24
propagation time, from inputs DA. Os. ~ - ns
I PHL Dc to outputs va - ?7 3 13 29
IpLH Low-ta-high, high-ta-Iow output
i -
2 9 21
~
propagation time, from input E2 - CL=15pF (Note 41 ns
IpHL to outputs Yo - '?7 "'0
"0
I--
2 10 27
IpLH Low-ta-high, high-ta-Iow output ID 3 10 21
propagation time, from input E1 f-- ns
I PHL to outputs YO -" Y7 ~
z
3
I--
12 27
IpLH Low-ta-high, high-ta-Iow output 3 13 27
propagation time, from input EL f-- ns
I PHL to outputs Yo - Y7 4 18 38
Input Vee Output
PG DUT
PRR '" lMHz, tr = 6ns, tr = 6ns,'tw = 500ns, Vp = 3Vp.p , Zo
50S!. = 50 ohms.
TIMING REQUIREMENTS (Vee=5V, Ta=25'C, unless otherwise noted )
Limits
: Min Typ Max
Iw (Ec) Latch enable E L pulse width 15 4 ns
Isu (0) Setup time DA - Dc to EL 10 3 ns
Ih (0) Hold time DA - Dc to EL 10 0 ns
TIMING DIAGRAMS (Reference level = 1.3V)
IN-PHASE
OUTPUT
IN-PHASE
OUTPUT OUT-OF-PHASE
OUTPUT
OUT-OF-PHASE
OUTPUT
• MITSUBISHI
.... ELECTRIC 2-149
MITSUBISHI LSTTLs
M74LS137P
APPLICATION EXAMPL ES (6-bit 2-line-to-64-line decoder with address latch I
(a) CIRCUIT DIAGRAM
STROBE
DECODER ENABLE
Xs
X.
X3
EL
I
DA DB De
I E2E1
LS137
Yo Y1 Y2 Y3 Y. Ys Ys Y7
,? ? ~ Y 'J',
, ;0-
TO FIVE OTHER)
}(
DECODERS
j j j
A )., I I T
EL DA DB Do E2 Et EL DA DBDe E2 E1 EL DA DB Do E2 E1
LS137 LS137 LS137

Yo Y1 Yi Y3 Y4 Ys Ys Y7 Yo Y1 Y2Y3 Y4 YS Ys Y7 Yo Yt Y2 Y3 Y4 YsYs Y7
'( I I '( I I I I
01234567
TY_~Y!.:cr:c
8 9 10 11 1213 14 15
I I 111111
16 17 18 19 20 21 22 23
(b) FUNCTION WAVEFORM
DECODER
ENABLE
STROBE
Xo
I'
1
1
LJ I
I
I I: I
2 I
1
HI I
1
I 1
3
_____~--~--~I~--+---~--~I----~I--~I
: 1
L--J~--~~---r--~~~-
I I I
• MITSUBISHI
2-150 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS138P
3·LlNE TO 8·LlNE DECODER/DEMULTIPLEXER
DESCRIPTION
The M74LS13BP is a semiconductor integrated circuit
consisting of a 3-bit binary-octal decoder/demultiplexer
with enable inputs.
r~
1 Vcc
FEATURES INPUTS DB-' --+YO

• 3 classes of enable inputs
Dc-' --+ Y 1
• 4 to 16 decorder/demultiplexer functions are provided
r~
without use of external components. --+Y2
• Wide operating temperature range (Ta = -20 - +7SoCI ENABLE -
--+Yj" OUTPUTS
INPUTS E3-'
El - .
APPLICATION
General purpose, for use in industrial and consumer OUTPUT ... Ys
equipment.
GND
For use as a decoder, specify inputs D A , DB, and Dc in
3-bit binary code. In the case of decoding function, the E, is Outline 16P4
kept in high state while E2 and E3 are kept low. If E" E2
and E3 are not in these conditions, all the outputs become
°
high, irrespective of the status of A -Dc' For use as a
demultiplexer, r" E2 and E3 are used as data inputs and
DA , DB, and Dc as selection inputs. This forms a 1-line to
B-line demultiplexer.
BLOCK DIAGRAM
r--- Vcc
INPUTS
Y3 OUTPUTS
ENABLE ,INPUTS { ; r __-q

6
,
------~GND
E3 5)----'
• MITSUBISHI
"ELECTRIC 2-151
MITSUBISHI LSTTLs
M74LS138P
3-LlNE TO 8-LlNE DECODER/DEMULTIPLEXER
E, Ex Dc Os DA Yo Y, Y2 Y3 Y4 Ys Y6 Y,
X H X X X H H H H H H H H
L X X X X H H H H H H H H
H L L L L L H H H H H H H
H L L L H H L H H H H H H
H L L H L H H L H H H H H
H L L H H H H H L H H H H
H L H L L H H H H L H H H
H L .H L H H H H H H L H H
H L H H L H H H H H H L H
H L H H H H H H H H H H L
- -
Note': EX=E2+E3
-
X : irrelevant
Symbol Limits Unit

,
Parameter Conditions

Vo Output voltage High-level state -0:5- Vee V
Tstg Storage temperature range -65- .. 150 'c
Limits
Min Typ Max
10H High-level ou~put current VOH;;;'2.7V 0 -400 "A

VOL";O.4V 0 4 mA
VOL"; 0 .5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (T a =-20- +75'C, unless otherwise noted)
Limits
Min Typ* Max
VIC Input clamp voltage Vee=4.75V.lle=-18rnA -1.5 V
Vee=4.75V. VI=O.8V
VI=2V. 10H= -400"A

Vee=4.75V I IOL=4rnA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V. VI=2.7V 20 "A
Vee=5.25V. VI=10V 0.1 rnA
IlL Low-level input current Vee=5.25V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 2) Vee=5.25V. Vo=OV -20 -100 rnA
IcC Supply current VcO=5.25V INote 3) 6.3 10 rnA
* : All typical values are at Vce =: 5V, Ta =: 25°C.
Note 2: All measurements should be done quickly, and not more than one output should be s·horted at a time.
Note 3: Icc is measured with all output off-state.
• MITSUBISHI
2-152 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS138P
3-LlNE TO a-LINE DECODER/DEMULTIPLEXER
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=2S'C. unless otherwise noted)
Limits
Min Typ Max
tpLH delay gate stages 9 20 ns

Low-ta-high-Ievel, high-to-Iow-Ievel 2 12 41 ns
tpHL
output propagation time, from inputs
DA, Ds, Dc to output YO-Y7
tpHL 3 14 39 ns
CL=15pF (Note 41
tpLH Low-to-high-Ievel, high-to-Iow-Ievel delay gate stages 10 18 ns
'l!:!.tp..!:!!.propagatio'l..!lmhlrom inputs
tpHL E2. E3 to outputs YO-Y7 2 15 32 ns
tpLH Low-to-high-Ievel. high-to-Iow-Ievel delay gate stages 8 26 ns
output, propag'!!!Pn....!Lme. from input
tpHL E1 to outputs YO-V7 3 15 38 ns

INPUT Vee OUTPUT
DA, Ds. De
E,. E2. Ei
----'I
PG DUT
50Q
Yo - Y7 ----f==\'
(1) The pulse generator' IPG) has the following characteristics:

PRR = lMHz, tr = 6n5, If = 6n5, tw =500n5,
APPLICATION EXAMPLE
4-line to 16-line decorder/demultiplexer
OUTPUTS
M74LS138P M74LS138P
DA DB Dc
"H"
DA DB DC DD
'--------v---"
INPUTS
• MITSUBISHI
.... ELECTRIC 2-153
MITSUBISHI LSTTLs
M74LS139P
DUAL 2-LlNE TO 4-LlNE DECODER/DEMULTIPLEXER

containing two 2-bit 2-line-to-4-line decoders/demulti-
plexers with separate enable inputs. ENABLE _
INPUT 1E-+ 1 Vee
FEATURES lOA -+ 2 +- 2E ~~~-i_E

{
INPUTS.
l
• Enable inputs provided 1Ds-+
+- 2DA}.INPUTS
• Two circuits completely separate
lYn+- 4 +- 2Ds
• Wide operating temperature range IT a=-20~+75°C)
lY1 +-
APPLICATION OUTPUTS _
lY2 +-
equipment. lY3+-
GND
FUNCTIONAL DESCR IPTION
For use as a decoder, when inputs DA and DB are specified
in 2-bit binary code, the output corresponding to the
number among YO~Y3 is set low and all the other 3 Outline 16P4
outputs are set high. The enable inputs E are kept low.
When inputs E are high, all the outputs are set high . FUNCTION TABLE (Note 11
irrespective of the status of DA and DB' E DB DA Yo Y, Y2 Y3

a
For use as 1-line-4-line demultiplexer, make inputs E H X X H H H H
the data inputs and DA and DB the selection inputs. L L L L H H H
L L 'H H L H H
L H L H H L H
L H H H H H L
Note 1: X : Irrelevant
BLOCK DIAGRAM (EACH DECODER)
DA Yo
INPUTS
Y1
Ds OUTPUTS
Y2
ENABLE INPUT E
• MITSUBISHI
2-154 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS139P
DUAL 2-LlNE TO 4-LlNE DECODER/DEMULTIPLEXER
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C: unlessotherwisentoed)
Vee Supply vo~tage -0.5- +7 V
V, Input voltage "':0.5-+15 V
Vo Output voltage High-level state -0.5 --Vee V
Tstg Storage temperature range -65- -'-150 "C
Limits
Min Typ Max
10H High-level output current VOH~2.7V 0 -400 pA
VOL";0.4V 0 4 rnA
VOL"; 0 .5V 0 B rnA
ELECTRICAL CHARACTERISTICS (T a = ~20- +75"C, unless otherwise noted)
Limits
Min Typ * Max
V,L Low-level input voltage o.B V
V'C Input clamp voltage Vee=4.75V.I,e=-lBmA -1.5 V
Vee=4.75V. V,=O.BV
V,= 2V , I OH= - 400"A

Vee=4.75V I IOL=4rnA 0.25 0.4 V
V,=0.BV.VI=2V I 10L=BrnA 0.35 0.5 V
Vee=5.25V. VI=2. 7V 20 pA
Vee=5.2SV. V,= 10V 0.1 mA
I,L Low-level input current Vee=S.2SV. VI=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vee=S.2SV. VO=OV -20 -100 mA
Icc Supply current Vee=S.2SV (Note 3) 6.B 11 mA
* All typical values are at Vcc= 5V, T a= 25°C.

Note 3: Icc is measured with the outputs in the enable state.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=2S"C, unless otherw;se noted)
Limits
Min Typ Max
tpLH dealy gate stages B 20 ns
tpHL Low-to-high-Ievel, high-to-Iow-Ievel 2 33 ns
15
tpLH DA. DB to outputs VO-V7 delay gate stages 10 29 ns
3 CL=1SpF (Note 4) 3B
tpHL 15 ns
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation B 24 ns
tpHL time, from input E to outputs Y'Q-Y'7 12 32 ns
Note 4: Measurementcircu;t TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee OUTPUT
LEVELS OF
DELAY 2
---Ir.::,-J.I

LEVELS OF
PRR=TMHz, t r=6ns, tf=6ns, t w =500ns. Vp=3Vp_p. Zo=50n. DELAY 3
• MITSUBISHI
.... ELECTRIC 2-155
MITSUBISHI LSTTLs
M74LS145P
BCD-TO-DECIMAL DECODER/ DRIVER

provided with BCD·to-decimal decoder/driver function and
open collector outputs.
FEATURES
• High output current (lo=80mA with VOL~3V;
10= 24mA with Vo~.5V) INPUTS
• High output breakdown voltage (Vo ~15V) OUTPUTS
• All outputs high with reactive input

• Wide operating temperature range (T a=':""20-+75°C)
APPLICATION
equipment.
* : OPEN COLLECTOR OUTPUTS

When inputs DA , DB, Dc and Do are designated with a
BCD code in this decoder/driver, the Yo-y 9 output
corresponding to the number is set low while the other 9
outputs are set high. When a binary number of 10 or more
is applied to DA -Do., all the outputs are set high.
The outputs are open collector types with a breakdown
voltage of 15V and an IOL of 80m A (with VOL~V) This
device is 'therefore suitable for use as an LSTTLIMOS
interface, display tube ,and relay driver.
BLOCK DIAGRAM r -__________________

OUTPUTS
~A~ __________________ ~
Y9 Vee,
l
I
.~ GND
~--------------~vr----------------~/
INPUTS * : OPEN COLLECTOR,OUTPUTS
• MITSUBISHI
2-156 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS145P
BCD-TO-DECIMAL DECODER/DRIVER
FUNCTION TABLE
Decimal
number DD Do DB DA Yo Y, Y2 Y3 Y4 Ys Y6 Y7 YB Y9
0 L L L L L H H H H H H H H H
1 L L L H H L H H H H H H H H
2 L L H L H H L H H H H H H H
3 L L H H H H H L H H H H H H
4 L H L L H H H H L H H H H H
5 L H L H H H H H H L H H H H
6 L H H L H H H H H H L H H H
7 L H H H H I H H H H H H L H H
8 H L L L H H H H H H H H L H
9 H L L H H H H H H H H H H L
10 H L H L H H H H H H H H H H
11 H L H H H H H H H H H H H H
12 H H L L H H H H H H H H H H
13 H H L H H H. H ·H H H H H H H
14 H H H L H H H H H H H H H H
15 H H H H H H H H H H H H H H
Vcc Supply v9'tage

. -0.5-+7 V
Limits
Min Typ Max
Vcc Supply voltage 4 75 5 5.25 V
IOH High-level output current VOH=15V 0 250 IlA

VOL'" 0 .4V 0 12 mA
VOL'" 0 .5V 0 24 mA
ELECTRICAL CHARACTERISTICS (T a = -20- + 75'C, unless otherwise noted)
Limits
Min Typ* Max
VIH 'High-level input voltage 2 V
VIC Input clamp voltage Vcc=4. 75V. Ilc= -18mA -1.5 V
VCC=4.75V. VI=0.8V
IOH High·level output voltage 250 Il A
VI=2V. Vo=15V
IOL=12mA 0.25 0.4 V
VCC=4.75V
VOL Low-level output voltage IOL=24mA 0.35 0.5 V
VI=O .8V. VI=2V
IOL=80mA 2.3 3 V
Vcc=5.25V. VI=2.7V 20 Il A
Vcc=5.25V. VI=10V 0.1 mA
IlL Low-level input current VCC=5.25V. VI=O .4V -0.4 mA
Icc Supply current VCC=5.25V (Note 1) 7 13 mA
* All typical values are at Vee= 5V, T8= 25°C.
Note1: IcC is measured with DA"'" DO at av.
• MITSUBISHI
;"ELECTRIC 2-157
MITSUBISHI LSTTLs
M74LS14SP
BCD· TO·DECIMAL DECODER/DRIVER
SWITCHING CHARACTERISTICS (VCC=5V. Ta=25'C, unless otherwise noted)
limits
Min Typ Max
tpHL Low-to-h igh-Ievel, high-to-Iow-Ievel 2 17 50 ns
RL=665Q, CL=45pF (Note 21
tpLH output propagation time delay gate stages 27 50 ns
tpHL 3 17 50 ns

PRR= 1M~z, t r =6ns, tf=6ns, t w =500ns, Vp=3Vp.p, ZO=50n.
(2) CL ihcludes probe and jig capacitance
PO OUT
50Q
TIMING DIAGRAM (Reference=1.3V)
INPUT
I[
LEVELS OF \ {
DELAY 3
tPHL
LEVELS OF
------ I}PLH.
DELAY 2 ~
~ tPHL
k--------;>
• MITSUBISHI
2-158 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS147P
10-LlNE DECIMAL TO 4-LlNE BCD PRIORITY ENCODER
DESCRIPTION
taining a 10-line BCD encoder with a priority function.
FEATURES Vee
• Priority decoding of the data inputs NC
• Data inputs and outputs both active·low
• Wide operating temperature range (T a = -20 - +75° C) INPUTS .... Yo OUTPUT
+- 03
APPLICATION
General purpose, for use in industrial and consumer equip- +- 02
INPUTS
ment Ye <-
OUTPUTS { _
FUNCTIONAL DESCRIPTION YB +- +- 09
This device functions to encode a pulse entered through GNO OUTPUT

one of the nine input pins (D, - D9 ) into a BCD code by
producing an inverted signal (based on input) at output
Y A - YD. The encoder handles all inputs in a priority
sequence, so that when two or more are present at input at Outline 16P4 NC: NO CONNECTION
the same time, the signal present at the highest priority pin
will be encoded. Do does not exist as an input, and when
all inputs are at high-level, all outputs will also be high-level,
yielding a 0 output. Ideally suited for use as a keyboard
encoder or range selector.
BLOCK DIAGRAM
BCD OUTPUTS
YB
. Ye Yo ' Vee
-~
0, 0,: D3 D, D5 06 D, D8 D, GND
~----~--~----~~----~----~--~--~
INPUTS
• MITSUBISHI
;"ELECTRIC 2-159
MITSUBISHI LSTTLs
M74LS147P
10·LlNE DECIMAL TO 4·LlNE BCD PRIORITY ENCODER
Ot 02 03 04 05 06 07 08 09 YD Ye YB YA
H H H H H H H H H H H H H
X X X >s X X X X L L H H L
X X X X. X X' X L H L H H H
X X X X X X L H H H L L L
X X X X X L H H H H L L H
X X X X L H H H H H 'L H L
X X X L H H H H H H L H H
X X L H H H H H H H H L L
X L H H H H H H H H H L H
L H H H H H H H H H H H L
ABSOLUTE MAXIMUM RATINGS(Ta=:"'20-+75·C. unless otherwise noted}

Vo Output voltage High-level output -0.5-Vee V
Top, Operating free.ai~ ambient temperature range :-20-+75 'C
Tstg Storage temperature range -65 - + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75'C, unless otherwise noted)
Limits
Min Typ Max
10H High-level output current VOH<?;2.7V 0 -400 /-I A

VOL"'0.4V 0 4 mA
VOL"'0.5V 0 8 mA
J
Limits
Symbol i Parameter . Test Conditions Unit
Min Typ * Max
Vie I nput clamp voltage Vee-4. 75V,lle= -18mA -1.5 V
Vee-4. 7SV~ VI-O.BV
VI'=2V. IOH= -400/-IA
Vee-4.7SV IloL=4mA 0.2S 0.4 V
VI=0.8V. VI=2V II0L-BmA 0.3S O.S V
Vee-S.2SV. VI-2. 7V 20 /-IA
Vee=S.2SV. VI= 10V 0.1 mA
IlL Low-level input current Vee-S.2SV, VI-0.4V -0.4 mA
lOS Short-circuit output current (Note 2) Vee-S.2SV, Vo-OV -20 -100 mA
leel Supply current' Vee-S.2SV (Note 31 12 20 mA
lee2 Supply current Vee=S.2SV (Note 41 10 17 mA
* : AlltypicalvaluesareatVce=5V,Ta=25°C.
Note 2. All measurements should be done quickly. and not more than one output should be sh9rted at a time.
3. leel is measured with D, at av, and all other inputs open.
4. lec2 is measured with all inputs open.
• MITSUBISHI
2-160 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS147P
lO·LlNE DECIMAL TO 4·LlNE BCD PRIORITY ENCODER
SWITCHING CHARACTERISTICS<voo=5v. Ta=25'C. unlessotherwisenoted)
Limits
Symbol Parameter Test Conditions Unit
Min Typ Max
tpLH Low-t9-high.level, high-to-Iow-Ieve! output propagation time, 9 18 ns
tpHL VA ""'"'
from input 0 1 ..... "'D'; to output YO (levels of delay 2) 14 18 ns
CL= 15pF INote 5)
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation time, 25 33 ns
tpHL from input 0; ..... 0; to outputVA . . . YO(levels of delay 3) 15 23 ns
INPUT Vee OUTPUT
PG OUT

50i! PRR = lMHz, tr "" 6ns, tf = 6ns, tw = 500ns, Vp = 3Vp.p,
Zo = 50n.
_ _ LEVELS OF
YA-YD DELAY ...;.....
3 _ _---J
• MITSUBISHI
"'ELECTRIC 2-161
MITSUBISHI LSTTLs
M74LS148P
8·LlNE TO 3·LlNE PRIORITY ENCODER
DESCRIPTION
provided with an B-line to 3-line priority encoder function
and priority sequence function,
vee
FEATURES ENABLE
OUTPUT
INPUTS
• Priority decoding of the data input GROUP SIGNAL
OUTPUT
• Easy expansion of the number of input bit
• Wide operating temperature range (Ta =-20-+75°C)
ENABLE
INPUT
APPLICATION INPUTS
YO +-
General purpose, for use in industrial and consumer OUTPUTS { __
equipment_ YB +-
OND OUTPUT
When signals are applied to one of this encoder's eight
inputs Do-D?, the 3-bit binary number corresponding to
the input pin appears at outputs YA -Y c. Since priority is Outline 16P4
given to each input, the highest-level input pin signal is
encoded when more than one signals are applied simultane-
ously_ The number of input data can easily be increased as
shown in the application example using the enable input E,
enable output EO and group signal output GS. This device
is suitable for use as a keyboard encoder or for range
selection.
BLOCK DIAGRAM GROUP SIGNAL OUTPUTS

ENABLE OUTPUT OUTPUT rr-
__------------A~--------------~
EO OS YA Voo
-~
I
OJ
INPUTS
D4 55 Os
yr--------------------
5) ) E
ENABLE
INPUT
---J
GND
• MITSUBISHI
2-162 "ELECTRIC
MITSUBISHI LSTTLs
M74LS148P
8-LlNE TO 3-LlNE PRIORITY ENCODER
E Do Dl D2 D3 D4 Ds D6 D7 Ye YB YA GS EO
H X X X X X X X X H H H H H
L H H H H H H H H H H H H L
L X X X X X X X L L L L L H
L X X X X X X L H L L H L H
L X X X X X L H H L H L L H
L X X X X L H H H L H H L H
L X X X L H H H H H L L L H
L X X L H H H H H H L H L H
L X L H H H H H H H H L L H
L L H H H H H H H H H H L H
Note 1 X: Irrelevant
ABSO LUTE MAXI MUM RATI NGS (T a = -20- + 75"C. unless otherwise noted)

Topr Operating free-air amtJient temperature range -20- +75 "C
Limits
Min Typ Max
VCC Supply voltage 4 75 5 5.25 V
10H High-level output current VOH"'2.7V 0 -400 !1 A

VOL';;0.4V 0 4 rnA
VOL';;0.5V 0 B rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +7S"C. unlessothenwise noted)
Limits
Min Typ * Max
VII Low-level input voltage o .B V
VIC Input clamp voltage Vcc=4.7SV.I,c=-lBrnA -1.5 V
VCC=4.75V. V,=O.BV
V,=2V.loH=-400!1 A

Vcc=4.75V I 10L 4mA 0.25 0.4 V
V,=O.BV. V,=2V I 10L BmA 0.35 0.5 V
Du. E 20
VcC=5.25V. V,=2.7V !1 A
Dl-o, 40
Do. E 0.1
Vcc=5.25V. V,=10V rnA
D1- D7 0.2
Do. E -0.4
I'L Low-level input current VcC=5.25V. V,=O.4V rnA
D1- D7 -O.B
los Short-circuit output current (Note 2) VCC=5.25V. VO=OV -20 -100 rnA
leCl Supply current Vcc= 5. 25V (Note 3) 12 20 rnA
ICC2 Supply current VCc= 5. 25V (Note 41 10 17 rnA
* All typical values are at Vee= 5V, Ta'" 25 C.
0
Note 2: Ali measurements should be done quickly and not more than one output should be shorted at a time.
Note 3: ICCl is measured with 57 and Eat OV and with all other inputs open.
Note 4: ICC2 is measured with all inputs open.
'.MITSUBISHI
.... ELECTRIC 2-163
MITSUBISHI LSTTLs
M74LS148P
8-LlNE TO 3-LlNE PRIORITY ENCODER
Limits
Min Typ Max
Low-to-high-level,~gh-!£:.!ow-Ievel output propagation 11 18 ns
tpLH
time, from inputsD, -07. to outputs Y A- Yc
t pHL (levels of delay 2) 14 25 ns
Low-to-high-Ievel, !:!l£!h-t£:!,ow-Ievel output propagation 15 36 ns
t PLH
time, from inputs D., - D7 to outputs Y A- Y c
tpHL (levels of delay 3) 18 29 ns
tPLH Low-to·high·level,~h-~ow-Ievel output propagation 7 18 ns
time, fromJnputs 00-07 to output EO
t PHL (levels of delay 3) 24 40 ns
t PLH Low-to-high-level •.,bigh-!2:.!0w-level output propagation 31 55 ns
time, from inputs 00- 07 to output GS CL=15pF (Note 5)
t PLH Low-to-high·level, high-to-Iow-Ievel output propagation 11 25 ns
time, from input E to outputs YA - yc
14 25 ns
t PHL (levels of delay 2)
t PLH Low-to-high-Ievel.!....high-to-Iow-Ievel output propagation 8 17 ns
time, from input E to output as
tpLH Low-to-high-Ievel.!....high-to·low·level output propagation 11 21 ns
time, from inputE to output EO

INPUT Vee OUTPUT
E and
00-D7
PO OUT
50 ~1
(1) The pulse generator (PG) has the following ch.aracteristics: EO, GS
PRR= 1MHz, t,= 6ns, tf= 6ns, t w =500ns, Vp=3Vp_p, Zo=50!1_ YA-YO
APPLICATION EXAMPLE
64·line/4·bit binary encoder
DATA INPUTS
ENABLE
Ot234567 15 32 47 55
lutIlII n HUUn
I~OD1D2D3D(D5D6D7 Eslll DoD1D2D]D~DsD6D7 Esl
llnun
Do01D2D30tDsD6D1 E
HUm!
DoD1D2D3D4D5DsDl E
l11r!11r n nIHU!
D.o, o,o,D,o,o,o, EJ IL,o,o,o;o,o;o'D' E
UIHlll
O,O,O,O,O.O;[)';O,
fl UtlllU }-
63
EJI L'o,o,o;o,o,o,o, EI
INPUT
M74LS148P M74LS148P M74LS148P M74LS148P M74LS148P M74LS148P M74LS148P M74LS148P

EOYA YI! Yc GS EO YA YB Yc GS EOYA YI! Yc GS EOYAYBYC GS EOYA Yll Yc GS EO YA YH Yc GS EO YA YB Yc GS EOYA Yll Yc as
r I I I LLJ fLJ
I
L:J'
I I I I
r
~
M74LS30P ~74LS30P ~4LS30P IIDOD1D2DJD4D506D7 E
M74LSI48P
J
EO YA Yn Yc as
""
Ye M74LS04P
or
Ye M74LS04P
-
YeM74LS04P
Tll.L 2 2
l
6-81T BINARY OUTPUTS
Expansion is possible up to 2n bits in accordance with the above application example.
• MITSUBISHI
2-164 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS151P
8-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE
DESCRIPTION
containing an 8-line to 1-line data selector/multiplexer
function_
vee
FEATURES
• Strobe input provided
• Complementary output provided
DATAl
INPUTS
::=
01 --.
1 15 4-
4-
0,)
05 DATA
• Low output impedance INPUTS
Do --.
• Wide operating temperature range (Ta=-20~+75°C) 4- 06
4- 07
APPLICATION OUTPUTS {

<-SA}
equipment. STROBE S SELECTION
INPUT <- 8 INPUTS
FUNCTIONAL DESCRIPTION GND <-Se
This IC has a data selector function which provides 1-line

selection of 8 input signals and a multiplexer function
which converts the 8-bit parallel data into serial data. When Outline 16P4
8-line signals are applied to the data inputs and 1 data is
specified from among the 8 data from selection inputs SA,
Ss and Sc, the input signal is output at Y and the inverted
signal from output Y. By applying 8-bit parallel data to
Do~D7 and connecting a synchronous octal counter output
to SA, Ss and Sc, the data appear in Y in Do~D7 order
and in Y in Do~D7 order as synchronized with the clock
pulse. When strobe input G is set high, Y is set low and Y
high.
M74LS151 P has the same functions and pin connections
as M74LS251 P but the latter is provided with 3-state out-
puts.
BLOCK DIAGRAM
STROBE
INPUT
01 3
02 2
~~~~)c~-J-----< ~}
03 1
DATA 5 OUTPUTS
INPUTS 0, 15
05 14
06 P
07 12
SELECTION
INPUTS
rS8
.
Se
• MITSUBISHI
.... ELECTRIC 2-165
MITSUBISHI LSTTLs
M74LS151P
8-LlN~ TO I-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE
Se Ss SA G 00 01 02 03 04 05 06 07 Y Y
X X H X X X X X
, X X
X X L H
L L L L L X X X X X X .X L H
L L L L H X X X X X X X H L
L L H L X L X X X X X X L H
L L H L X H X X X X X X H L
L H L L X X L X X X X X L H
L H L L X X H X X X X X H L
L H H L X X X L X X X X L H
L H H L X X X H X X X X H L
H L L L X X X X L X X X L H
H L L L X X X X H X X X H L
H L H L X X' X X X L X X L H
H L H L X X X X X H X X H L
H H L L X X X X X X L X L H
H H L L X X X X X X H X H L
H H H L X X X X X X X L L H
H H H L X X X X X X X H H L

Tslg Storage temperature range ·-65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20.- +75'C, unlessotherwisenoted)
Limits
Min Typ Max

IOH High-level output current VOH~2. 7V -400
VOL.."'0.4V
° 4
Il A
mA
IOL Low-level output 'current
° ° 8 mA
VOL'" .5V
°
• MITSUBISHI
2-166 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS151P
8-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE
ELECTRICAL CHARACTERISTICS (Ta=-20- Q5"C" unless otherwise noted)
limits
Min Typ * Max
V'C Input clamp voltage VCC=4.75V.llc=-18rnA -1.5 V

Vcc=4. 75V. V ,= 0 .8V 2.7 3.4 V
V,=2V.loH=-400"A

VCC=4.75V I IOL=4rnA 0 .25 0.4 V
V,=0.8V.V,=2V I IOL=8rnA 0 .35 0.5 V
"H High-level, input current

Vcc=5.25V. V,=2. 7V
Vcc=5.25V. V,=10V . 20
0.1
"A
rnA
"L Low-level input current VCC=5.25V. V,-0.4V - 0.4 rnA
los Short-circuit output current (Note 2l Vcc=5.25V. VO=OV -20 -100 rnA
Icc Supply current VcC=5.25V INote31 6 10 rnA
*: All typical values are at Vcc=5V, Ta=25°C.
Note 2 All measurements should be done quickly_
Note 3: Icc is measured with all inputs at 4.5V
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tpHL time, from inputs SA. S8. Sc to output Y 15 32 II ~ •
., -_.-
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 22 43 II:;
tpHL time, from inputs SA. SS. So to output Y 16 30 11 ~ i

--- ----
tpHL time, from input G to output Y 14 30 ns
CL=15pF INote41
tpHL time, from input IT to output Y 16 32 ns
tpHL time, from inputs Do - D7 to output Y 8 20 ns
tpLH Low-to-high-Ievel, high-to-Iow-levcl output propagation 17 32 ns
tpHL time, from inputs 00- 0 7 to output Y 12 26 ns

TIMING DIAGRAM (Reference=1.3V)
INPUT Vee OUTPUT
OUT
LEVELS OF
DE LA Y 2 _ _-+,.-.J
LEVELS OF
DELAY 3
characteristics:
PRR == lMHz, tr "" 6ns, tf "" 6ns, tw "" 500ns,
Vp "3Vp.p, Zo" 5012.
• MITSUBISHI
.... ELECTRIC 2-167
MITSUBISHI LSTTLs
M74LS153P
DUAL 4-L1NE TO 1-L1NE DATA SELECTOR/MULTIPLEXER WITH STROBE
DESCR IPTION PIN CONFIGURATION (TOP VIEW)

containing two 4-line to 1-line data selector/multiplexer
circuits_
ST,ROBE
INPUT Vee
FEATURES SELECTION STROBE
INPUT -- 2G INPUT
• Strobe inputs provided independently for each circuit __ SA
103 -> SELECTION
• Selection inputs common to both circuits INPUT
• Low output impedance 10 2 -> 4- 203
• Wide operating temperature. range (T a=-20-+ 750 C) DATA
INPUTS
101-> 4- 202
DATA
APPLICATION 100-> --201
INPUTS

OUTPUT 4-200
equipment_
. GND ..... 2Y OUTPUT
This IC has two data selector circuits which provide 2-line
to 1-line selection of 4 pairs of input signal using two multi-
plexer circuits which convert the 4-bit parallel data into Outline 16P4
serial data with time-sharing_ When 4-line signals are applied
to the data inputs Do, D1 , D2 and D3 and 1 data is FUNCTION TABLE (Notell
specified from among the data by selection inputs SA and
58 SA DO 01 D2 D3 G Y
S8, the input signal is output at Y_ By applying 4-bit
X X X X X X H L
parallel data to Do, D1 , D2 and D3 , and connecting a syn-
L L L X X X L L
chronous divide-by-4 counter output to SA and S8, the
L L H X X X L H
Do, D1 , D2 and D3 data appear in the order of Do, D1 ,
L H X L X X L L
D2 and D3 synchronized with the clock pulse. SA and S8
are common to both circuits while strobe inputs 1G and 2G L H X H X X L H
are independent. When 1G and 2G are set high, 1Y and 2Y H L X X L X L L

are set low irrespective of the status of the input. H L X X H X L H
M74LS153P has the same functions and pin connections H H X X X L L L
as M74LS253P but the latter is provided with 3-state out- H H X X X H L H
puts . Note 1 X: Irrelevant
. BLOCK DIAGRAM
OUTPUTS
r--
,
, .
STROBE DATA DATA STROBE

INPUT INPUTS INPUTS INPUT
• MITSUBISHI
2-168 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS153P
DUAL 4·LlNE TO I·LlNE DATA SELECTOR/MULTIPLEXER WITH STROBE

Vee Supply'voltagp -0.5- +7 V
V, Input voltLlgC -0.5- + 15 V
Topr Operating free-air ambient temperature range -20- + 75 "C
Tstg Storage temperature range - 65 - .1- 150 "C
Limits
Min Typ Max
10H High-level output current VOH;::'2.7V 0 -400 pA

VOL;i;0.4V 0 4 mA
VOL;i;0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta = -20- +75"C. unless otherwise noted)
limits
Min Typ * Max
. ---------,.
V,e I nput clamp voltage Vee=4.75V. l,e=-18mA .. 1.5 V
Vee=4.75V. V,=0.8V
V,= 2V. IOH=-400pA

Vee=4.75V I 10L= 4 mA 0.25 0.4 V
V,=0.8V, V,= 2 V I 10L= 8 mA 0.35 0.5 V
Vee= 5.25V. V, = 2. 7V 20 pA
Vee=5.25V. V,= 10V 0.1 mA
I'L Low-level input current Vee=S.25V. V,=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vce=5.25V. Vo= OV -20 -100 mA
Icc Supply current Vee=5.25V INote 3} 6.2 10 mA
* : All typical values are at Vcc=5V, Ta=25"C.
Note 2: All measurements should be done quickly, and not more th.an one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
tpHL time, from inputs 00- 0 3 to output Y 12 26 ns
tpHL time, from inputs SA, S B to output Y CL=15pF 13 38 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation INote 4} 12 24 ns
-
tpHL time, from input G to output Y 12 32 ns

INPUT Vee OUTPUT

characteristics:
PRR =: lMHz, tr = 6ns, tf = 6ns, tw = 500ns, LEVELS OF
Vp 3Vp.p. Zo DELAY 2
I
~ ~ 50il.
CL includes probe and jig capacitance.
CL 12}
LEVELS OF
DELAY 3
• MITSUBISHI
.... ELECTRIC 2-169
MITSUBISHI LSTTLs
M74LS15SP
DUAL 2-BIT BINARY TO 4-LlNE DECODER/DEMULTIPLEXER WITH STROBE

containing two 2-bit binary to 4-line decoders/demulti-
plexers.
1El-t 1 VeG
ENABLE {
FEATURES INPUTS 1E2->
~ 2E2; ENABLE
• Low output impedance INPUT 4-
-E
2 1 .
INPUTS
• Enable inputs provided

• 8-bit output decoder/demultiplexer functions are pro- ~ DA INPUT
vided without the use of external components

-2~
• Wide operating temperature range (Ta=-20~+75°C) OUTPUTS
11 - . 2:] OUTPUTS
APPLICATION -> 2Y,
GND -2Yo
equipment. '-----'--'
When a 2·bit binary number is decoded in quaternary Outline 16P4
numbers and the 2-bit binary number is applied to inputs
DA and DB, the corresponding YO~Y3 output is set low For use as a 1-line to 4-line demultiplexer, the outputs
and all the other 3 outputs are set high. In this case, enable appear in Y o~Y 3 by making 1 El and 2E;" the data inputs
inputs 1 Eland 2E;' are kept high and low, respectively, and DA and DB the selection inputs. For use as a 1-line to
and enable inputs 1~ and 2E; are kept low. When 1 E2 8-line demultiplexer, 1 El and 2El are connected to make
and 2E;" are set high, all the outputs are set high. When them the third bit selection input and 1 E2 and 2E2 are
decoding a 3·bit binary number in octal numbers, 1 El and connected to make the data inputs so that the outputs
2E2 are connected and by applying the third bit binary appear in 2Yo~2Y3 and1Yo~1Y3'
number, the outputs appear in 2YO~Y3 and 1Yo~1 Y3 , in M74LS155P has the same functions and pin connections
accordance with the function table. as M74LS255P but the latter is provided with open col·
lector outputs.
1E2 lE, DB DA 2E2 2E, GND

~ ~
ENAB LE I N PUTS INPUTS ENABLE INPUTS
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS155P

(2-bit binary to 4-line decoder/1 line (3-bit binary to 8-line decoder/1 line
to 4-line demultiplexer) to 8-line demultiplexer)
DB DA lE, lE, lYo lY, lY, lY3 DB DA 2E, 2E, 2Yo 2Y, 2Y, 2Y3 De DB DA E 2Yo 2Y, 2Y, 2Y3 lYo lY, lY, lY3
X X H X H H H H X X H X H H H H X X X H H H H H H H H H
L L L H L H H H L L L L L H H H L L L L L H H H H H H H
L H L H H L H H L H L L H L H H L L H L H L H H H H H H
H L L H H H L H H L L L H H L H L H L L H H L H H H H H
H H L H H H H L H H L L H H H L L H H L H H H L H H H H
X X X L H H H H X X X H H H H H H L L L H H H H -L H H H
H L H L H H H H H L H H
H H L L H H H H H H L H
H H H L H H H H H H H L
Note 1 X : Irrelevant
Dc: Pin connecting 1Eland 2E,
E Pin connecting lE2 and 2E2

V, I nput voltage -0.5- + 15 V
.-
- -
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75·C. unless otherwise noted)
Limits
Min Typ Max

10H High-level output current VOH"'2.7V 0 -400 /.lA
VOL;;;;0.4V 0 4 mA
VOL;;;;0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C. unlessotherwise~oted)
Limits
Min Typ * Max
Vie I nput clamp v.oltage Vce=4.75V. I,e=~ 18mA ~1.5 V
Vee=4.75V. V,=0.8V
VI=2V. IOH= -400/.lA

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V. V,=2V I IOL =8mA 0.35 0.5 V
Vec=5.25V
20 /.lA
V,=2.7V
Vee=5.25V
0.1 mA
V,=lOV
IlL Low-level input current Vec=5.25V. VI=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vee=5.25V. Vo=OV -20 -100 mA
lee Supply current Vce=5.25V (Note 31 6.1 10 mA
* All typical values are at Vcc= 5V. T a= 25°C.
Note 2: All measurements should be done quickly and not more than one output should be shorted 'at a time
Note 3: Icc is measured with inputs lE";". 2E1 and 2E2 at OV and with DA. DB and lEl at 4.5V
• MITSUBISHI
.... ELECTRIC 2-171
MITSUBISHI LSTTLs
M74LS155P
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25"C, unless otherwise noted)

Limits
Min Typ Max
tpHL Low-to-high-Ievel, high-to-Iow-Ievel 2 15 30 ns
tpLH 10 26 ns
DA, DB to outputs 70- Y3 delay gate stages
tpHL 3 15 30 ns
GL = 15pF (Note41
tpHL time, from inputs lE2. 2E" 2E2 to outputsYQ-YJ 11 30 ns
-
tpHL time, from input 1E1 to outputs lYo-1Y3 15 27 ns

TIMING DIAGRAM (Reference level = 1.3VI
INPUT Vee OUTPUT
DA, DB, lE,

lE., 2E" 2E.:;,2_ _.J1
LEVELS OF
DE LAY 2 _ _....,.-+=~
LEVELS OF
DELAY 3
PRR = 1MHz, t r =6ns. tf=6ns, t w =500ns, Vp=3Vp.p, Zo= 5On.
(2) Cl includes probe and jig capacitance
APPLICATION EXAMPLE
4·phase clock pulse generator
"H" "H"
J-'2M74LS107AP Y,M74LS107AP M74LS155P
T T
K K
RO Ro
CLOCK
INPUT
A 2Yo
2Y,
Yo
Y, l
YsM74LS04P
2E,
2E2
2Y2 Y2 J'"~"'"
2Y3 Y3
CLOCK
Yo
lJ
u
u
• MITSUBISHI
2-172 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS156P
DUAL 2·BIT BINARY TO 4·LlNE DECODER/DEMULTIPLEXER

containing two 2-bit binary to 4-line decoders/demulti-
plexers with open collector outputs
lEl __ 1 vee
ENABLE {
FEATURES INPUTS _
lE2 -- +- 2I2} ENABLE
• Usable in AND Tie connection 2E INPUTS
INPUT +- 1
• Enable inputs provided
• 8-bit output decoder/demultiplexer function is provided +- DA INPUT
without the use of external components

• Wide operating temperature range (T a=-20~+75°C) OUTPUTS
. 'Y1 +-
OUTPUTS
APPLICATION
GND
equipment_
FUNCTIONAL PESCRIPTION * OPEN COLLECTOR OUTPUT
When a 2-bit binary number is decoded as a quaternary Outline 16P4

number and the 2-bit binary number is applied to inputs
DA and DB, the corresponding YO~Y3 output is set low For use as a l-line to 4-line demultiplexer, the outputs
and all the other 3 outputs are set high. In this case, enable appear in YO~Y3 by making lEI and 2~ the data inputs
inputs 1 El and 2E;' are kept high and low, respectively, and DA and DB the selection inputs. For use as a I-line to
and enable inputs lE; and 2E2 are kept low. When lE2 8-line demultiplexer, 1 El and 1EI are connected to to be
and 2E2 are set high, all the outputs are set high. When made the third bit selection input and 1 E2 and 2E2 are
decoding a 3-bit binary number in octal numbers, 1 El and connected to be made the data inputs so that the outputs
2E2 are connected and by applying the third bit binary appear in 2Yo~2Y3 and lYo~lY3'
number to them, the outputs appear in 2Yo~2Y3 and M74LS156P has the same functfons and pin connections
1 Yo ~l Y 3, in accordance with the function table. as M74LS155P but the latter is provided with active pull-up
resistor outputs.
BLOCK DIAGRAM
OUTPUTS
~--~---------------~=-----~~~---
lE2 ~ ~ ~2E2 2E1 GND

ENABLE INPUTS ENABLE
INPUTS INPUTS
* OPEN COLLECTOR OUTPUT
• MITSUBISHI
.... ELECTRIC
MITSUBISHI LSTTLs
M74LS156P
FUNCTION TABLE (Nole1)

(2-bit binary to 4-line decoder/1 line (3-bit binary to B-line decoder/1 line
to 4-line demultiplexer) to 8 line demultiplexer)
DB DA lE2 lEI 1Yo 1Yl 1Y2 1Y3 DB DA 2E2 2El 2Yo 2Yl 2Y2 2Y3 DC DB DA E 2Yo 2Yl 2Y2 2Y3 lYo 1Yl 1Y2 1Y3
'x X H X H H H H X X H X H H H H X X X H H H H H H H H H
L' L L H L H H H L L L L L H H H L L L L L H H H H H H H
L H L H H L H H L H L L H L, H H L L H L H L H H H H H H
H L L H H H L H H L' L L H H L H L H L L H H L H H H H H
H H L H H H H L H H L L H H H L L H H L H H H L H H H H
X X X L H H H H X X X H H H H H H L L L H H H H L H H H
H L H L H H H H H L H H
H H L L H H H H H H L H
H H H L H H H H. H H H L
Note 1 . X : Irrelevant
Dc: Pin connecting 1 El and 2E,
E : Pin connecting 1 E2 and 2E2
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75t, unlessotherwisenoted)

Vo Output voltage High-level. state -0.5-Vee V
Topr Operating free-air ambient temPElrature range -20-+75 t
Tstg Storage temperature range -65- + 150 t
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75t, unlessotherwisenoted)
Limits
Symbol Pa'ramater Unit
Min Typ Max
IOH High-level output current Vo=5.5V 0 100 J.lA
VOL;i;0.4V 0 4 mA
IOL low-level output current
VOL;i;0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75t, unless otherwise noted)
. Limits
Min Typ * Max
V,H High-level input voltage , 2 V
V'c Input clamp voltage Vee=4.75V, ,I,e= -18mA -1.5 V
Vee=4.75V, V,=0.8V
IOH High-level output current 100 J.lA
V,=2V, Vo=5,5V
VOL Low-level output 'voltage

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8mA 6.35 0.5 V
Vee=5.25V, V,=2.7V 20 J.lA
Vee=5.25V, V,=10V 0.1 mA
IlL Low-level input current Vee='5.25V, V,=0.4V -0.4 mA
Icc Supply current Vee=5.25V (Note 21 6.1 19 mA
* : All typical values are at Vee= 5V, T.= 25'C,
Note 2: Icc is measured with inputs lE2. 2E'1 and 2E2 at OV and with DA, DB and 1E, at 4.5V
• MITSUBISHI
2":'174 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS156P
SWITCH ING CHARACTER ISTICS (Vee=5V. Ta=25:C. unless otherwise noted)
Limits
Symbol Parameter" Test conditions Unit
Min Typ Max
t pLH delay gate stages 18 40 ns
Low-to-high-Ievel, high-to-Iow-Ievel
tpHL 2 18 51 ns
output propagation time, from
tpLH inputs OA. DB to outputs To- Y3 delay gate stages
RL=2kQ
20 46 ns
tpHL 3 18 51 ns
CL= 15pF
INote 31
tPHL time, from inputs lE2. 2E,. 2E2 to outputs Yi)- Y3 20 51 ns
tpHL time, from input 1E 1 to outputs 1 Yo -1Y3 25 48 ns

DA.Ds.1E,
1E2.2E,.2E2
RL
LEVELS OF
PG OUT DELAY 2
50Q
LEVELS OF
DELAY 3
(1) The pulse generator (PG) has the following characteristics'

PRR==lMHz, t(=6ns, tf=6ns. t w =500ns, Vp::: 3Vp.p, Zo=50n.
(2) Cl includes probe and jig capacitance
APPLICATION EXAMPLE
4--bit binary/hexadecimal decoder/demultiplexer
OUTPUTS
M74LS156P M74LS156P
(M74LS 15 5P) (M74LSI55P)
1E21E,
YoM74LS04P
DA Os Dc Do E
'---v---------- ENABLE INPUT
INPUTS
• MITSUBISHI
;"ELECTRIC 2-175
=ti'if.I§II~<LSTTL>
M74LS157P
QUADRUPLE 2-LlNE TO I-LINE DATA SELECTORS/MULTIPLEXERS

containing four Hine to 2-line data selector/multiplexer
circuits.
SELECT Vee
INPUT
FEATURES
DATA {1D0 ....
• Common strobe input for all 4 circuits
INPUTS 10, ....
• Common select input for all 4 circuits ..... 40 0} DATA
INPUTS
• Low output impedance OUTPUT 4- 40,
20 0 .... .... 4Y OUTPUT
DATA (
INPUTS 0
APPi.!ICATION 2 , ....
..... 30 0} DATA
INPUTS
General purpose, for use in industrial and consumer OUTPUT 2Y 4- +- 3D,
equipment.
GNO
This IC has 4 circuits, each of which has a data selection
function which selects one-line out of a 2-line signal and a Outline 16P4
multiplexing function to convert 2-bit parallel data into
serial data by time sharing. When 2-line signals are fed to FUNCTION TAB LE (Note 1)
at inputs Do and D, and one of these is specified by the G SA Do D, Y

selection input SA' the specified input signal is selected H X X X L
taken from output Y. The SA and strobe inputs are com- L L L X L
mon to all 4 circuits. When G is high, all the outputs, 1Y, L L H X H
2Y, 3Y, and 4Y are low, regardless of the inputs. L H X L L

L H X H H
M74LS157P has the same functions and pin connections
as M74LS257P but the latter is provided with 3-state Note 1: X : irrelevant
outputs.
BLOCK DIAGRAM
----r
OUTPUTS
4Y Vee
-~ GND
DATA INPUTS STROBE SE LECT
INPUT ·INPUT
. • MITSUBISHI
2-176 "'ELECTRIC
=tiEIlOOII<LsTTL>
M74LS157P
QUADRUPLE 2-LlNE TO i-LINE DATA SELECTORS/MULTIPLEXERS
ABSOLUTE MAXIMUM RATINGS (Ta= -20-+75"C. unlessotherwisenoted)

V, Input voltage -0.5- +15 V
Tstg Storage temperature range - 65 - + 150 "C
RECOMMENDED OPERATING CONDITIONS (Ta = -20- + 75"C. unless otherwise noted)
Limits
Min Typ Max

10H High·level output current VOH;;' 2. 7V 0 -400 /.LA
VOL";0.4V 0 4 mA
VOL";0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C. unless otherwise noted)
Limits
Min Typ* Max

V,e Input clamp voltage Vee=4.75V. l,e=-18mA -1.5 V
Vee=4.75V. V,=0.8V
V,=2V. 10H= -400/.LA

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V. V,=2V I IOL=8mA 0.35 0.5 V
Do. D, Vee=5.25V 20
/.LA
SA. G V,=2.7V 40
Do. D, Vee=5.25V 0.1
mA
SA, G V,=10V 0.2
Do, D, Vee=5.25V -0.4
"L Low-level input current mA
SA, G V,'C'0.4V -0.8
los Short-circuit output current (Note 2) Vee=5.25V, VO- 0 V -20 -100 mA
Icc Supply current Vee=5.25V INote 31 9.7 16 mA

Note 3: Icc is measured with all inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25°C, unless otherwise noted)
Limits
Min Typ Max
tpHL time, from input Do. D1 to output Y
9 14 ns
tPHL time. from input SA to output Y
1. 27 oS
CL=15pF INote41
tpHL time, from input IT to output Y
12 21 ns

INPUT Vee OUTPUT
1Y-4Y
charac teristics'
PR R = 1MHz. tr = 6ns, tf = 6ns, tw = 500ns,
Vp ~ 3Vp.p. Zo = 5012 1Y-4Y
• MITSUBlsHI
~ELECTRIC 2-177
MITSUBISHI LSTTLs
M74LS158P
QUADRUPLE 2-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER (INVERTED)
DESCRIPTION
containing four 2-line to l-line data selector/multiplexer
circuits.
Vee
FEATURES _G STROBE
10 0-+ 2 INPUT
• Converted outputs provided DATA {
• Strobe inputs provided independently for each circuits INPUTS 10,-+ _ 40 0 }
DATA
• Selection inputs common to four circuits INPUTS
OUTPUT 1'(- 4 -40,
• Wide operating temperature range (Ta=-20~+75°C) 20 0-+ 5 -+ 4'( OUTPUT
DATA {
INPUTS 6 _ 30 0 }
20,-+
APPLICATION DATA
INPUTS
General purpose, for use in industrial and. consumer OUTPUT 2'( 4 - 7 -3D,
equipment.
OUTPUT
GND
This IC has four data selector circuits which provide 2-line
to l-line selection for 4 pairs of signals using four multi- Outline 16P4
plexer circuits which convert the 2-bit parallel data into
~erial data with time-sharing. When2-line signals are applied FUNCTION TABLE (No,e 11
to the data inputs Do and 0 1 and 1 data is specified from G SA Do 0, Y

among the data from selection input SA,the input signal is H X X X H
inverted and can be output at V. By applying 2-bit parallel L L L X H
data to Do and 0 1 , and connecting a binary counter output L L H X L
to SA, the Do and D1 data are inverted and appear in the L H X L H
order to Do and OJ synchronized with the clock pulse. L H X H L
SA and strobe input G are common to all four circuits. Note 1 X: Irrelevant
When G is set high, lV, iv, 3V and 4'1 are set high ir-
respective of the status of the inputs. as M74LS258P but the latter is provided with 3-state
M74LS158P has the same functions and pin connections outputs.
BLOCK DIAGRAM
OUTPUTS
1Y 2Y 4Y Vee
-1 ,
-j GNO
DATA INPUTS SELECTION
INPUT
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS158P
QUADRUPLE 2-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER (INVERTED)

Vo Output vol tage High-level state -0.5- + 7 V

Limits
Min Typ Max
10H High-level output current VOH;;;;;2.7V 0 -400 !-'A

VOL~0.4V 0 4 mA
10L Low-level output-current
VOL";0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75"C, unless otherwise noted)

Limits
Min Typ * Max
V'C Input clamp voltage Vee"" 4. 75V, I,e= -18mA -1.5 V
Vee=4.75V, V,=0.8V
VI=2V. 10H= -400!-,A

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8mA 0.35 0.5 V
Do. 01 Vce=5.25V 20
!-'A
SA. G VI=2.7V 40
Do. 01 Vee=5.25V 0.1
rnA
SA. G V,=10V 0.2
Do, 01 Vee=5.25V -0.4
I,L Low-level input current rnA
SA. G VI=0.4V -0.8
los Short-circuit output current (Note 2) Vee=5.25V. VO= 0 V -20 -100 rnA
leeH High level Supply current Vee=5.25V INote 31 4.8 8 mA
leeL Low-level supply current Vee= 5.25V INote41 6.5 11 mA
* All typical values are at Vcc=5V, Ta=25°C.
Note 2: All measurements should be done quickly, and not more than one output should be shorted at a time. Note 3: Icc is measured with all inputs at 4.5V.
Note 4: The supply current should be measured with 1 Do-4Do at 4.5V and the other inputs at OV.

Limits
Min Typ Max
tPLH Low·to-high·level, high·to-Iow-Ievel output propagation 5 12 ns

tPHL time, from inputs Do. 01 to output Y 5 12 ns
, 20 ns
tPLH Low·to-high·level, high-to-Iow-Ievel output propagation 9
CL=15pF INote 51
tPHL time, from input SA to output Y 10 24 ns
tPLH Low·to-high·level, high-to·low-Ievel output propagation 8 17 ns
tPHL time, from input G to output Y 8 18 ns

INPUT Vee OUTPUT
E)-J6J LEVELS OF
50Q1 T. ICl
(1) The pulse generator (GP) has the following characteristics' DELAY 2._ _+.-....1
PAR = lMHz, tr = 6ns, tf = 6ns, tw = 500ns,
Vp ~ 3Vp.p. Zo ~ son. LEVELS OF
(2) CL includes probe and jig capacitance_ DELAY 3
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS160AP
SYNCHRONOUS PRESETTABLE DECADE COUNTER WITH. DIRECT RESET

containing a presettable synchronous decade counter func-
tion with a direct reset input:
DIRECT RESET
INPUT Vee
FEATURES
I
CARRY
CLOCK INPUT OUTPUT
• Direct reset and synchronous preset inputs
• Carry output and enable input for cascade connection DA ....
14 .... QA}
• High-speed counting (fmax = 55MHz typical)
DB .... ....Qs
• Wide operating temperature range (Ta= -20-+75°C) DATA INPUTS OUTPUTS
De .... ....Qe .
APPLICATION
Do .... ....Qo
equipment. ENABLE INPUT Ep.... 7 .... ET ENABLE INPUT
GND 9 4-LOAD LOAD INPUT

When the count pulse is applied to clock input T, the
number of count pulses appears as a BCD code in the
outputs OA, OB, Oc and 00 synchronized with the count Outline 16P4
pulse. Counti~g is done when T changes from low to high.
Presetting is performed to synchronize the count pulse. Carry output RCO is high only when OA is high, OB is
When data are applied to the data inputs DA, DB, Dc and low, Oc is low, 00 is high and ET is high. Ep, ET and
Do, the load input LOAD is made low and T is changed RCO are used for synchronous counter cascade connection
from low to high, the signals DA, DB, Dc and Do appear at and for configuration of a divide-by-10" counter. (Refer to
the OA, OB, Oc and 00 outputs, respectively, regardless of the application examples.)
the status of enable inputs Ep and ET, thereby presetting
the cou nter.
When the counter is preset to a numerical value of 10 or
more, counting proceeds in accordance with the status
transition diagram.
Resetting is asynchronous. OA, OB, Oc and 00 are set
low by setting direct reset inputRo low, regardless of the
status of the other inputs.
BLOCK DIAGRAM OUTPUTS CARRY

__-----------------A~----------------~ OUTPUT
QA Qe Qo RCO Vee
i
I
U T AD LOAD Ep ET DA De
~~~3~ ~~~!fCI~PUT L~~ST '--y--J \.~-----------D-A-TAY'NPUTS

De Do GND
ENABLE INPUT
• MITSUBISHI
2-180 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS160AP
SYNCHRONOUS PRESETTABLE DECADE COUNTER WITH DIRECT RESET
STATE DIAGRAM FUNCTION TABLE (Note 1)
Ro LOAD ET Ep T OA Os Oe 00 RCO
L X X X X L L L L L
H L L X 1 L
DA Os Dc DD -
H L H X 1 L*
H H H H 1 Count L*
H H L X X Inhibit L
H H H L X Inhibit L*
Note 1. Transition from low to high (positive edge

trigger)
RCO is normally low but is high when Q A is
* high, Os is low, Q c is low, 00 is high and Er
is high. Therefore, RCO 0:= Q A 'OB'OC'Oo'Er
X: Irrelevant

~~r-------------------------------
LOAD --~--~IIUr----------~---------------------
DA-.J
DB-.J c.:-.:: ::.::. :.:::.-:..-:..-=--:..-...:-.:-.:.:.::.::::
Dc -.J [:::=:.-=-~:.:.~-:..-~.:-.:-.:-.:.::=~:.-=-:
DO _ _'--i_J.......I
Ep __---;__-:--+!II
Ii-I----------------~--------.
ET -~-7-~:___+_!rI
II ~-----
QA ::J1 1
II
QB - ---It----:--~1Tl
I II '------------'
Qc ::1 1111-________+-________
II
Qo ::-1 11,-----,
1
1 II '------+1--------
RCO __--;Ir--+--+I:.-I---::,..--lr-l I
1 I7 9 ~O---:----::--:::-31-1----------------
Ut~!.---------~,I,------~,I
RESET PRESET COUNT COUNT INHIBIT

RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75·C. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output curreht Vo ;;;g,2.7V 0 -400 I1A

VOL~0.4V 0 4 mA
VOL~O .5V 0 8 rnA
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS160AP
Limits
Min Typ* Max
V'C I nput clamp voltage Vcc=4.75V.IIC=-18rnA -1.5 V
VcC=4.75V. V,=0.8V
V,=2V. 10H= -400,uA

VCC=4.75V I IOL=4rnA 0.25 0.4 V
VI=0.8V. V,=2V I IOL=8rnA 0.35 0.5 V
DA, DB, Dc, Do, Ep 20
LOAD,T,ET VcC=5.25V. V,=2.7V 40 /-lA
Ro 20
DA, DB, Dc, Do, Ep 0.1
LOAD, T, ET Vcc=5.25V. VI=10V 0.2 rnA
Ro 0.1
DA, DB, DC, Do, Ep -0.4
I,L Low-level input current LOAD, T, ET VcC=5.25V. VI~0.4V -0.8 rnA
Ro -0.4
_.Ios Short-circuit output current (Note 2) VcC=5.25V. Vo=OV -20 -100 rnA
ICCH Supply current, all outputs high Vcc=5.25V INote 31 18 31 rnA
ICCL Supply current. all outputs low Vcc=5.25V INote41 19 32 rnA
* All typical values are at Vee;:: 5V. Ta = 25°C.
Note 2. All measurements should be done quickly and not more than one output should be shorted at a time.
Note 3. I CCH is measured with 0 A . Os' Dc. Do, Ep, ET. and FrO at 4.5V, LOAD at OV, and T set from OV to 4.5VA
Note 4. lecl is measured with DA, DB, Dc. Do. Ep, ET and Ro,'~[) at OV and T set from OV to 4.5V.
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C, unlessotherwisenOledl
Limits
Min Typ Max
Imax Maximum clock frequency 25 55 MHz
tPLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation time, 20 35 ns
tPHL from input T to output RCO 20 35 ns
tpLH Lwo-to-high-Ievel, high-to.r"ow-Ievel output propagation time 12 24 ns
tpHL (when LOAD is high), from input T to outputs OA. OB, Ge, 00 CL = 15pF 16 27 ns
tPLH Low-to·high-Ievel, high-to-Iow-Ievel output propagation time INote 51 12 24 ns
tPHL (when LOAD is low). from input T to outputs OA, OB, Oe, 00 16 27 ns
tPLH Low-to-high-Ievel, high·to-Iow-Ievel output propagation time. 8 14 ns
tPHL from input ET to output RCO 8 14 ns
High-to-Iow--Ievel output propagation time, from input Ro
tPHL 15 28 ns
outputs OA, OB. Oc, Go
TIMING REQUIREMENTS (Vcc=5V. Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
~~(TL) Clock input T low pulse width 25 . 6 ns
tW(RD) Direct reset R D pulse width 20 6 ns
tSU(D) Setup time DA - 0 D to T 20 3 ns
tsU(LOAO Setup time LOAD to T INote 81 20 6 ns
tSU(E) Setup time -Ep, ETta T 20 8 ns
~h(D) Hold time DA"- Do to T 3 0 ns
th (LOAD) Hold time LOAD to T INote 81 3 -3 ns
theE) Hold time Ep, ET to T 3 -3 ns
tree (RD) Recovery time R 0 to T 15 6 ns
• MITSUBISHI
2-182 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS160AP
Note 5 .. Measurement circuit
INPUT Vee OUTPUT
PG OUT (1) The pulse generator (PG) .has the following characteristics:
PRR =; 1MHz, tr = 6ns. tf = 6ns, tw = 500ns,
Vp = 3Vp.p, Zo = 501"!.
50Q

tw(Ro)
,RCO
T
QA.QS.QC.QD T
tSU(D) th(D) tSU(D) th(D)

QA.QB.Qe.Qo tsu (LOAD) th (LOAD) tsu (LOAD) th (["OAD)
RCO
T
Note 7. When the clock input T does not satisfy these
standards, an incorrect counting operation may
result.
Note 8. When the load input LOAD setup time and hold
time are not satisfied, the incorrect data may be Ep. ET
preset. (When LOAD changes within ± 5ns of
the LOAD input transition from low to high,
presetting may be made to low when the data
input is high.) tSU(E) theE) tSU(E) theE)
APPLICATION EXAMPLE Note 6. The shaded areas indicate when the input is per-
mited to change for predictable output perform-
Cascade-connected divided-by-10n counter
ance,
• Low-speed connections
ENABLE INPUT.,_---!E, TO FOLLOWI NG STAGES

T
RD D, DB Dc_ DD AD DA DB Dc Do AD DA DB Dc 00
Y1 I 7I I I I ?I I I I
COUNT P U L S E - . . - - + - - - - - - - - - - + - - - - - - - - - 4 - - - - - - - - -__ TO FOLLOWING STAGES
r---------~---------~-------~ TO FOLLOWING
• High-speed connections STAGES
H
ENABLE INPUT TO FOLLOWING
STAGES
COUNT PULSE~-+_---------~~--------~---------+_-------~~TO FOLLOWING

STAGES
• MITSUBISHI
...... ELECTRIC 2-183
MITSUBISHI LSTTLs
M74LS161AP
SYNCHRONOUS PRESETTABLE 4·BIT BINARY COUNTER WITH DIRECT RESET

containing a synchronous presettable 4-bit binary (hexa-
decimal) counter with direct reset input.
DIRECT ~~~G+ Rii ... 1 Vee
I
RIPPLE
FEATURES CLOCK INPUT CARRY
OUTPUT
• DireCt reset and synchronous preset inputs
DA'" 3
• Enable input and carry output for cascaded operation
Os ...
14 "'OA} .
• High-speed counting (f max = 55MHz typical) ...Os
DATA INPUTS
• Wide operating temperature range (Ta = -20 ~ 75°C) De ...
OUTPUTS
"'Oe
Do ... "'00
APPLICATION
General purpose, for use in industrial and consumer ENABLE INPUT Ep... 7 <--ET ENABLE
INPUT
equipment.
GND LOAD INPUT
FUNCTIONAL DESCRIPITON
When a counting pulse is applied to the T input, the 4-bit
Outline 16P4
binary representation of the count is output at QA, QB, Qc
and Q D in synchronization with the count pulse. Counting
is done on the transition of the T input signal from low to the other inputs.
high. The ripple carry output RCO is high only when all Q
Presetting is accomplished in synchronization with the outputs and ET are high. The two enable inputs Ep and
counting pulse. When preset data is applied to the DA, ET and the RCO carry output can be used to form an
DB, Dc and DD inputs, the load input LOAD is made n-bit synchronous counter by means of cascade connec-
low, and T is changed from low to high, this data will tion of several ICs (refer to the application example for
appear in the QA, QB, Qc and Q D outputs, respectively the M74LS160AP).
regardless of the status of the enable inputs Ep and ET ,
thereby presetting counter.
Resetting is performed asynchronously by setting the
direct reset input RD to low at which time the QA, QB, Qc
and Q D outputs go to low·level regardless of the states of

~ ________________ ~A~ ______________ ~ CARRY
OUTPUT
Qe Qo RCO Vee
-T
An LOAD Ep ET DA Os De
}-----~
Do, GND
CLOCK DI RECT LOAD '--v--' '~------------~r--------~
INPUT 1J.l'~0f INPUT ENABLE INPUTS DATA INPUTS
• MITSUBISHI
2-184 ..... ELECTRIC·
MITSUBISHI LSTTLs
M74LS161AP
SYNCHRONOUS PRESETTABLE 4-BIT BINARY COUNTER WITH DIRECT RESET
RD LOAD ET Ep T QA Qs Qe Qo ROO
L X X X X L L L L L
H L L X i L
DA DB Dc Do r--
H L H X i L*
H H H H i Count L* Note 1: Indicates a transition from low to high (positive edge triggering).
H H L X X Inhibit L * RCO is normally low but is high when all Q outputs and ET are high
simultaneously, i.e .. RCO '" QA a OsoQc·QO"ET
H H H L X Inhibit L* X : irrelevant
r--------------------------
I ______________________
DB --i--l-+-'r-::::-----~:: ::::: : __-=-_-..:::::::::::.::.:

De ..Jr--+-.;.........;-,L::.:::::::=::::::::::::::::::_-_-___-~=:.
Do ..Jr-t---T--;..,C::::=___:.:.:::::.-:::. ::::.__:.______-::
T
Ep
,
1
,
, 1
Er , ,
1 1
QA : : _L--+I---I!+-~
' ....
1:-,_ _ _ _ _ _ _ _
QB - -, I' ,----, 1,..;,,..--------

_, , 1 L---li
Qc :=~I-!-----.., 1
I , ~----r'-------------
Qo--~' ,
--~ 1 '-----11-------
ROO
Ut
1
RESET
'.1:
PRESET
ll2. 13 14
n
15
COUNT
!:-O-:;---;:-1: 11-.-------,
'
INHIBIT
I

Topr Operating free-air ambient temperature range ·-20-+75 'C
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75'C. unless otherwise noted)
Limits
Min Typ Max
IOH High·level output current VOH;;'2.7V 0 -400 "A

VOL"; 0 .4V 0 4 mA
10L Low·level output current
VOL"; 0 .5V 0 8 rnA
• MITSUBISHI
"ELECTRIC 2-185
MITSUBISHI LSTTLs
M74LS161AP
SYNCHRONOUS PRESETTABLE 4-BIT BINARY COUNTER WITH DIRECT RESET
Limits
Min Typ* Max
V'C Input clamp voltage VCC=4.75V.I,c=-18rnA -1.5 V
Vcc=4.75V. V,=0.8V
V,=2V. IOH= -400"A
.
Vcc=4.75V I IOL =4rnA 0.25 0.4 V
V,=0.8V. V,=2V I IOL =8rnA 0.35 0.5 V
DA, DB, Dc, DD, Ep 20
._-
LOAD, T, ET Vcc=5 .25V. V,= 2 .7V 40 ·"A
AD 20
DA, De, Dc, DD, Ep 0.1
LOAD,T,ET Vcc=5 .25V. V,= 10V 0.2 rnA
AD 0.1
DA, De, Dc, DD, Ep -0.4
IlL Low-level input current LOAD, T, ET Vcc=5.25V. V,=0.4V -0.8 rnA
AD 0.4
loS Short-circuit output current (Note 2) Vcc-5.25V. Vo-OV --20 -100 rnA
ICCH Supply current, all outputs high VCC=5.25V (Note 31 18 31 rnA
ICCL Supply current, all outputs low Vcc=5.25V (Note 41 19 32 mA
* : Typical values are for VCC=5V and Ta=25°C
3: Measurement of the high-level power supply current is performed with all data inputs, Ep, ET ard AD at 4.5V and the LOAD input at av. changing the T input
from OV to 4.5V.
4: Measurement of the high-level power supply current is performed with all data ,inputs, Ep. ET. AD and LOAD at OV, changing the T input from OV to 4.5V.
SWITCHING CHARACTERISTICS (Vcc=5V. T a =25'C, unlessotherwisenoted)
Limits
Min Typ Max
Imax Maximum clock frequency 25 55- MHz
\PLH Low-to·high-level. high·to-Iow·level output propagation time, 20 .35 ns
1PHL from input T to output RCO
1--
20 35 ns
\PLH Lwo-to-high-Ievel. high·to-Iow·level output propagation time 12 24 ns
\PHL (when LOAD is high), fro~ input T to·outputs OA, Os, Oc. 00 CL = 15pF 16 27 ns
\PLH Low-to·high-Ievel, high·to-Iow·level output propagation time (Note 51 12 24 ns
\PHL (when LOAD is low), from input T to outputs QA, Os. OC. OD 16 27 ns
\PLH Low-to-high-Ievel. high· to-low· level output propagation time, 8 14 ns
\PHL from input ET to output RCO 8 14 ns
High·to-Iow-Ievel output propagation time. from input Ro
\PHL 15 28 ns
outputs OA, Os. Oc. Go
TIMING REQUIREMENTS (Vcc~5V. Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tW(TL) Clock input T low pulse width 25 6 ns
tW(Ro) Direct reset R 0 pulse width 20 6 ns
\r Clock pulse rise time 400 100 ns
tSU(D) Setup time DA'- Do to T 20 3 ns
tSu(LOAD Setup time LOAD to T (Note 81 20 6 ns
tSU(EI Setup time Ep. E T to T 20 8 ns
th (D) Hold time DA - Do to T 3 .0 ns
\h(LOAD) Hold time LOAD toT (Note 8) 3 -3 ns
lh(E) Hold time Ep. ET to T 3 -3 ns
tree (Ro) Recovery time R 0 to T 15 6 ns
• MITSUBISHI
2-186 "ELECTRIC
MITSUBISHI LSTTLs
M74LS161AP
SYNCHRONOUS PRESETT ABLE 4·BIT BINARY COUNTER WITH DIRECT RESET
INPUT Vee OUTPUT
PG OUT
50Q PRR = 1MHz. Ir =6ns. If = 6ns. Iw =500ns.
Vp = 3Vp.p. Zo = 50n.
(2) CL includes probe and jig capacitance. .

tW(TH) tW(TL)
T
T
QA. QB. Qe. 00

RCO
tSU(O) th(O) tsu( 0) th(O)

tsu (LOAO) th (DiAD) tsu (LOAD) th (LOAD)
SU(E) theEl,
Note 6. The shade~ area indicates the period within which switch-
ing may take place.
RCO
~ ~
Divide
DA DB De Do rale
,
L L L L 1/16
APPLICATION EXAMPLE H L L L 1/15
Programmable divider L H L L 1/14
H H L L 1/13
L L H L 1/12
ENABLE INPUT
COUNT PULSE - - T
..-L tT
Ep
LOAD OA
Ro
I
M741LS161AP
DA
I
Os
Ds
I
Qe
De
I
Qo
RCO r - -
Do
?t 1/4M74LS02P
RESET INPUT
OUTPUT
H
L
H
L
H
L
H
H
L
L
H
H
H
L
L'
L
L
L
H
H
1/11
1/10
1/9
' 1/8
1/7
RESET INPUT Y
\
I I I I
L H L H 1/6
Y
PROGRAM
H H L H 1/5
L L H H 1/4
Note 7: Reset is performed by applying countpulse with reset input
H L H H 1/3
high. AD pin cannot be uSEld since QA-OO should be set low.
L H H H 1/2
, .' MITSUBISHI
~ELECTRIC 2-187
MITSUBISHI LSTTLs
M74LS162AP
FULLY SYNCHRONOUS PRESETTABLE DECADE COUNTER
DESCRIPTION
containing a synchronous presettable decade counter func-
tion with a synchronous reset jnput.
RESET INPUT vee
FEATURES
CLOCK INPUT 15 --+ RCa CAR RY OUTPUT
• Synchronous reset and preset inputs
• Carry output and enable input for cascade connection DA--+ 3
• High-speed counting (fmax~ 55MHz typical) 14 --+QA}
--+ QB .
• Wide operating temperature range (Ta~-20"'+75°C) DATA INPUTS
[
DB--+
OUTPUTS
De-' --+Qe
APPLICATION . DD- --+Qo

ENABLE INPUT Ep-. 7 ~ET ENABLE INPUT
equipment.
GND 9 ~LOAD LOAD INPUT
When the count pulses are applied to clock input T, the
number of count pulses appears as a BCD code in the
outputs OA, OB, Oe, 00 synchronized with the count Outline 16P4
pulses. Counting is done when T challges from low to high.
Presetting is performed to synchronize the count pUlse. low, Oe is low, 00 is high and ETis high. Ep, band RCO
When data are applied to the data inputs DA, DB, Dc and are used for synchronous counter cascade connection and
Do, the load input LOAD is made low and T is changed for configuration of an n-bit counter. (Refer to the applica-
from low to high, the signals DA, DB, be and Do appear at tion examples of the M74LS160AP.)
the OA, OB, Oe and 00 outputs, respectively, regardless of
the status of enable inputs Ep and ET, thereby presetting
the counter. When the counter is preset to a numerical
value of 10 or more, counting proceeds in accordance with
the status transition diagram.
Resetting is synchronized with the count pulses. OA,
OB, Ot and 00 are set low by setting reset input R low
and by changing T from low to high.
Carry output RCO is high only when OA is high, OB is

CARRY
OUTPUT
Qs Qc Qo RCa
L T R
CLOCK RESET
INPUT INPUT
LOAD EpET DA OB
INPUT ENABLE INPUTS

Dc Do
LOAD '-v--' ''---------v---~----~J
DATA INPUTS
--J GND
• MITSUBISHI
2-188 "ELECTRIC
MITSUBISHI LSTTLs
M74LS162AP
FULL Y .SYNCHRONOUS PRESETTABLE DECADE COUNTER
STATE DIAGRAM FUNCTION TABLE INotel1
R LOAD ET Ep T QA QB Qo Qo RCO
L X X X t L L L L L
H L L X t DB DO
L
DA Do
H L H X t ~
H H H H t Count L*
H H L X X Inhibit L
H H H L X Inhibit L*
Note 1 Transition from low to high (positive edge trigger)

* RCO is normally low but is high when Q A is high, Os is low, Q c
is low, 00 is high and ET is high. Therefore, RCO = QA -QS"Qc·Qo
·ET
OPERATION TIMING DIAGRAM X Irrelevant
R-W
LOAD
iI L-J~-------------------------------
I
DA-.J :: c::
DB ...1.----'---':-.[ ::
I
De -.J I
I
I
Do ___--;__-+:_'
T
Ep ____+-+l------------~-----~
ET ~--------------~-----_,i
---+--1-1 '----
QA::: I I
QB::: :::--..thL----.r:!----
Qe::: ~L-------------+i--------------
Q0 -_ _
- --,I II I . - - ...________ . .1-1_ _ _ _ _ _ _ _ _ _ _ __ _
I II
RCO _ _ _~I-~II---'! r--:
IL._ _ _ _~I
I_ _ _ _ _ _ _~
t i ~17-'C8----=-~='---=--3~,i~=====~,I
RESET PRESET COUNT COUNT INHIBIT
ABSOLUTE MAXIMUM RATINGS (Ta=20-+75'C.. unlessotherw;senoted)

T5tg Storage temperature range -65- + 150 'C
RECOrJlrw~EI'JDED OPERAT!!'JG CC~JD~T~O,I'JS (Ta=-20-+75"C. unlessotheflNisenoted)
Limits
Min Typ Max

IOH High-level output current VOH~2.7V 0 -400 t-'A
VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 rnA
• MITSUBISHI
.... ELECTRIC 2-189
MITSUBISHI LSTTLs
M74LS162AP
ELECTRICAL CHARACTERISTICS (Ta=-20-+75l:, unless otherwise noted)
Limits
Min Typ* Max
vui High-level input voltage 2 V
VIC Input clamp voltage Vcc=4.75V.IIC=-18mA -1.5 V
VCC=4.75V. VI=0.8V
VI=2V. IOH= - 400,uA
VOL Low-Ievei output voltage

VCC~4. 75V I 10L =4mA 0.25 0.4 V
VI=0.8V. VI=2V I 10L =8mA 0.35 0.5 V
DA, Ds, Dc, Do, Ep 20
LOAD, T, ET VCC=5.25V. VI=2.7V 40 ,uA
R 40
DA, Ds, Dc, Do, Ep 0.1
LOAD,T,ET Vcc=5 .25V. VI= 10V 0.2 mA
R 0.2
DA, Ds, Dc, Do, Ep -0.4
IlL Low-level input current LOAD, T, ET VcC=5.25V. VI=0.4V -0.8 rnA
R -0.8
los Short-circuit output current (Note 2) Vcc=5.25V. VO=OV -- 20 -100 rnA
ICCH Supply current. all outputs high Vcc=5.25V INote 31 18 31 rnA
ICCL Supply current, all outputs low Vcc=5 .25V INote 4) 19 32 mA
* : All typical',values are at Vee:= 5V, Ta = 25°C.

Note 3. ICCH is measured with DA. DB, Dc, DD. Ep, ET. and R at 4.5V, LOAD at OV, then 4.5V applied to T input.
Note 4. ICCL is measured with DA, Os, Dc, DD ,Ep. ET and A, LOAD at OV and T set from OV to 4.5V.
SWITCHING CHARACTERISTICS (VCc= 5V, Ta=25l:, unlessotherwisenoted)
Limits
Min Typ Max
tPLH Low-to-high·level, high-to-Iow-Ievel output propagation time, 20 35 ns
tPLH Lwo-to-high-Ievel, high-to-Iow-Ievel output propagation time 12 24 ns
tPHL (when LOAD is high), from input T to outputs OA, OS, Oc, Go CL = 15pF 16 27 ns
tPLH Low-to-high-leveJ'. high-to-Iow-Ievel output propagation time INote 5) 12 24 ns
tPHL (when LOAD is low), from input T to outputs GA, OS, DC, DO 16 27 ns
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation time, 8 14 ns
TIMI NG REQUI REMENT (VOC= 5 V, Ta=25l:, unless otherwise noted)
Limits
Min Typ Max
tW(TH) Clock input Thigh pulse width 25 7 ns
tf Clock pulse rise time 400 100 ns
tSU(D) Setup time DA ~ Do to T 20 3 ns
tSU(LOAD) Setup time LOAD to T(Note B) 20 6 ns
tSU(R) , Setup time R to T 20 11 ns
tsu (E) Setup time Ep, E T to T 20 8 ns
thCO) Hold time DA - Do to T 3 0 ns
th(LOAD) Hold time LOAD to T (Note 8) 3 -3 ns
th(R) Hold time R to T 3 -8 ns
theE) Hold time Ep, ET to T 3 - 5 ns
• MITSUBISHI
MITSUBISHI LSTTL~
M74LS162AP
Note 5. Measurement circuit

INPUT Vee OUTPUT Divide-by-n counter configuration
1/6 M74LS04P
1/4 M74LSOOP
"H"
Oe 00
PRR = 1MHz, tr = 6ns. tf -= 6ns, tw = 500ns. M74LSI62AP RCO
VP = 3Vp.p, 20 = 50n.
(2) C L includes probe and jig capacitance

tweTH) tW(TL) Oivide-by-n counter Pins connected to gate input
Ternary counter OB
T Divide-by 5 counter Qo
Divide-by-6 counter OA. 00
Divide-by-7 counter QB.OO
OA.QB,QC.QD Divide-by-9 counter
RCO QD
RCO
---h-JI
tsueR) theA) tsueR) theR)

tsueD) theD) tsueD) theD)
tsueLOAD) theLOAO) tsueLOAD) theLoAD)
Note 6. The shaded areas indicate when the input is per-

mited to change for predictable output perform-
ance.
tsueE) theE) tsueE) theE)
• MITSUBISHI
;"ELECTRIC 2-191
MITSUBISHI LSTTLs
M74LS163AP
FULLY SYNCHRONOUS·PRESETTABLE 4-BIT BINARY COUNTER
DESCRIPTION
The M74LS163AP is Ii semiconductor integrated circuit
containing a synchronous presettable 4-bit binary (hexa-
decimal) counter with a synchronous reset input.
RESET INPUT Vee
I
FEATURES CLOCK INPUT
RIPPLE
CARRY
• Synchronous reset and preset inputs. OUTPUT
• Cascade connected enable input and carry output. DA--> 3

14 -->OA]
• High speed counting (f max = 55MHz typical) DB--> -->OB .
• Wide operating temperature range (T a = -20~+75°C) DATA INPUTS OUTPUTS
Dc---+ --> Oe
APPLICATION Do---+ -->00

General purpose, for use in industrial and consumer ENABLE INPUT Ep---+ 7 <--ET ENABLE INPUT
equipment.
GND 9 <--LOAD LOAD INPUT
When count pulses are applied to the clock input T, the
number of count pulses appears as a 4-bit binary code in Outline 16P4
the outputs QA, Qs, Qc, and Q o synchronized with the
count pulses. Counting is done when T changes from low to The ripple carry output RCa is high only when Q A = Q s =
high. Q c = Q o = high and ET = high. Ep , ET and RCa are used
Presetting is performed to synchronize the count pulse. when the counter is cascade connected in a synchronous
When data is applied to the data inputs DA, De, Dc and manner to from an n-bit counter. (See the M74LS160AP
Do, the load input LOAD is made low, and T is changed application example).
from low to high, the signals DA , De, Dc, and Do appear
at the QA, Qe, Qc, and Q o outputs, respectively, regard-
less of the status of the enable inputs Ep and ET , thereby
presetting the counter.
Reset is performed, synchronized with the count pu Ise.
When the reset input R is made low, and T is changed from
low to high, QA' Qs, Qc, and Q o will be low.

r - - - - - - - ________ _ _ _ _ _ _ _ _ _ _ _ __
A~
CARRY
OUTPUT
OA OB Qe Qo RCO Vee
-1
T R LOAD Ep ET DA DB De Do GND
CLOCK RESET LOAD '----v-' ' r-~~~~~~~
INPUT INPUT INPUT ENABLE INPUTS DATA INPUTS
• MITSUBISHI
2-192 "ELECTRIC
MITSUBISHI LSTTLs
M74LS163AP
FULLY SYNCHRONOUS PRESETT ABLE 4-BIT BINARY COUNTER
FUNCTION TABLE (Note I)
R LOAD ET Ep T QA Q8 Qe Qo RCO
r
L X X X T L L L L L
H L L X t L
DA DB De Do r-
H L H X t L*
Note 1: transition from low to high level
H H H H t Count L*
H H L X X Inhibit L
* RCO output is normally low·level, but RCO output is high·level when ET
input is high-level while the counter is in its maximum count state (HHHH).
H H H L X Inhibit L* X : irrelevant
R~
LOAD : Y
DA I _~r---====::::.::::.:==-=-===:===:
---i-
Ds _ _ _ -;----:_C: :::::.:::.-:-= ::=--=--=-.:-_-___-_-:::.-::::-:
DC-l
Do -l'"--:--'--L _ .:-_-_-_-___-:.::::::::-::.::::::::::::::::.:
T
1
Ep _ _ _+I_-:-!
1
ET I
QA - - - - - :
----'-1--'-'---'
Qs ::=--"1-1---;I+-__~
- - ---I
Qe _ _ _ _ w j-I
-
!--_ _ _-::-....,LI_ _ _!--_ _ _ _ _ __
- - - _J
'----"1--------
r , 1: - -_ _ _- - ,
Qo _ _ _ _ L-J
I 1
RCO _ _ _~I-~I~~~~r-l~-~~I~---~--~
1 lIZ 13 14 15 0 21 I
t
RESET PRESET
fl--I.----.,.fE.IEc----~'
COUNT INHIBIT

Vo Output voltage High·level state -0.5- V ee V
TSlg Storage temperature range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta~-20- + 75'C; unlesS otherwise noted)
Limits
Min Typ Max

IOH High-level output current VOH:<:Z.7V 0 -400 J.lA
VOL~0.4V 0 4 mA
VOL~O.5V 0 8 mA
• MITSUBISHI
"'ELECTRIC 2-193
MITSUBISHI LSTTLs
M74LS163AP
FULLY SYNCHRONOUS PRESETTABLE 4·BIT BINARY COUNTER
ELECTRICAL CHARACTERISTrCS (Ta~-20-+75'C, unless otherwise noted)
Limits
Min Typ* Max
VrH High-level input voltage 2 V

VrL Low-level input voltage 0.8 V
V'C I nput clamp voltage Vcc~4.75V.lro~-18mA -1.5 V

Vcc~4.75V. Vr=0.8V
Vr~2V. 10H= -400"A

Vcc=4.75V I 10L =4mA 0.25 0.4 V
Vr=0.8V. Vr=2V I 10L =8mA 0.35 0.5 V
DA, DB, DC, Do, Ep 20
LOAD, T, ET Vcc~5.25V. Vr=2.7V 40 "A
R 40
'rH High-level input current
DA, DB, Dc, Do, Ep 0.1
LOAD,T,ET VCC=5.25V. Vr=10V 0.2 mA
R 0.2
DA, DB, Dc, [lo, Ep -0.4
IrL Low-level input current LOAD,T,ET VOC=5.2SV. Vr='0.4V -0.8 mA
R -0.8
los Short-circuit output current (Note 2) VcC=5.25V. VO=OV --20 -100 mA
ICCH Supply current, all outputs high Vcc=5.25V INote 31 18 31 rnA
ICCL Supply current, all outputs low Vcc=5.25V (Note41 19 32 rnA
* : All typical values are at Vee = 5V, Ta ,= 25°C.

3: ICCH ,is measured with DA , DB. Dc. Do. Et, R inputs at 4.5V, LOAD inputg rounded and a momentary ground. then 4.5V. applied to T input.
4: ICCl is measured with DA. DB. Dc. DD, ET, A, LOAD inputs grounded and a momentary ground. then 4.5V, applied to T input.
SWITCHING CHARACTERISTICS (Vcc~5V. Ta~25'C, unless otherwise noted)

Limits
Min Typ Max
tPLH Low-to-high-Ievel. high-to· low-level output propagation time. 20 35 ns
I
tPLH Lwo-to-high-Ievel. high-to-Iow-Ievel output propagation time 12 24 ns
tPHL (when LOA D is high). from input T to outputs 0A. 0B. OC, OD CL ~ 15pF 16 27 ns
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation time INote 51 12 24 ns
tPHL (when LOAD is lowl. from input T to outputs OA. OS. 0C, OD 16 27 ns
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation time, 8 14 ns
TIM ING REQUIREMENTS (Voc= 5V. Ta =25'C, unless otherwise noted)
Limits
Symbol Parameter Test conditions Uni,t
Min Typ Max
tWITH) Clock input T high pulse width 25 7 ns

tw (TL) Clock input T low pulse width 25 6 ns
tsulO) Setup time DA- Do tooT 20 3 ns
tSU(LOAO) Setup time LOAD to T (Note 71 20 6 ns
tSUIR) Setup time R to T 20 11 ns
tSU(E) Setup time Ep, E T to T 20 8 ns
th (0) Hold time DA - Do to T 3 0 ns
th(LOAO) Hold time LOAD to T (Note 7) 3 -3 ns
thlR) Hold time R to T 3 - 8 ns
th(E) Hold time Ep. E T to T 3 - 5 ns
• . MITSUBISHI
2-194 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS163AP
FULLY SYNCHRONOUS PRESETT ABLE 4-BIT BINARY COUNTER
INPUT Vee OUTPUT
PG DUT (1) The pulse generator (PG) has the following characteristics:
Vp =3Vp.p, Zo =50n
50Q (2) CL includes probe and jig capacitance.

tW(TH) T
tsu (l'\) th (A) tsu nil th (R)

tSU(D) th(D) tSU(D) th(D)
tsu(LOAiS) th(LOAD) tSU(LOAD) th(LOAD)
RCa
tSU(E) th(E)
APPLICATION EXAMPLE
Variable modulo counter
Divide rate Outputs connect to inputs of GATE
1/6 M74LS04P 3 Os
or 1/4 M74LSOOP
orl/3 M74LS10P 5 Oc
6 QA, Qc
7 Qs, Qc
9 00
LOAD OA Os Oe Qo
10 OA,OO
ENABLE INPUT - I - - - - - I E p
11 OS, 00
ENABLE INPUT -+-___---1 M74LS163AP RCa
12 OA, OS, 00
COUNT PULSE -f-~--l
13 Oc, 00
14 OA, OC, 00
15 Os, OC, 00
• MITSUBISHI
.... ELECTRIC 2-195
MITSUBISHI LSTTLs
M74LS164P
8~BIT SERIAL-IN PARALLEL-OUT SHIFT REGISTER
DESCRIPTION "PIN CONFIGURATION (TOP VIEW)

containing an a-bit serial input-serial/parallel output shift
register function with direct reset input.
FEATURES SERIAL (DS1 --+ 1 vee

OATA
• "Serial input-serial/parallel output INPUTS DS2--+
• Direct reset input provided
• a-biHar high space factor OUTPUTS
• Input load factor of 1 for each input
• Wide operating temperature range (Ta= -20-+7SoC) OUTPUTS
DIRECT
APPLICATION RESET
INPUT
General purpose. for use in industrial and consumer
GND 8 +- T CLOCK INPUT"
equipment.
This" device is configured with 9 D-type edge-triggered
flip-flops and the serial data inputs DS1 and DS2 logic Outline 14P4
product DS1 x DS2 represents the first-stage flip-flop data
input. Outputs 0 0 -0 7 are taken out from the flip-flop a
outputs. When DS1 and DS2 are both high and the" clock
pulse is applied to T. the high signal is shifted in sequence
into 00. a, ... 0 7 , When either DS1 or DS2 or both are
low and the clock pulse is applied to T. the low signal is
shifted into 00. 0 1 ... 0 7 in sequence. Shifting is
performed when T changes from low to high.
Whim the direct reset input Ro is set low. all the outputs
are reset low irrespective of the other input signals. Ro
should be kept at high when using this device as a shift
register. :':·i!'
BLOCK DIAGRAM
OUTPUTS
r -____________________ ~A ________________ ~ ____ ~
Qs Q6
SERIAL
DATA
{DS1 1
"
INPUTS DS2 ,--........J
CLOCK INPUT
DIRECT ,
RESET
INPUT
----------- ------------c6 GND
• MITSUBISHI
2-196 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS164P
8·BIT SERIAL·IN PAR'ALLEL·OUT SHIFT REGISTER
Operational mode Ro T Ds, DS2 Qo Qt Q2 Q3 Q4 Qs Qs Q7

Reset L X X X L L L L L L L L
H i L L L Qoo QtO Q20 Q30 Ql Qso Qso
Right shift
H i H L L Qoo QtO Ql Q30 Q40 Qso Ql
H i L H L Qoo QtO Q20 Q30 Q40 Qso Qso
H i H H H Qoo Q,o Q20 Q30 Ql Qso Q's0
Note 1 f . .. ..
TranSition from low to high (positive edge trigger)
QO: Level of output before the change from low to high
X: Irrelevant
RO~ U
I I
I I
L-Jl~~ ____~~~1 _ _ _ _ _ _ _ __
DS2 _ _ ...,......,...._-..,._.....1
~~------~~-------
~~----~-------
~~--~-------
~-~~-------
LIl~ _______
I
I
I I
+-~--~----------------------~I, I
~--~ ____________________~rl~~__~
I
1.. 1
RIGHT SHIFT RESET


RECOMMENDED OPERATING CONDITIONS (Ta =-20- +75"C, unlessotherwisenoted) .
Limits
Min Typ Max
IOH High-level output current VOH~2. 7V 0 -400 J.lA

VOL~0.4V 0 mA
IOL Low-level output current -4
VOL~0.5V 0 8 rnA
• MITSUBISHI
"'ELECTRIC, 2-197
MITSUBISHI LSTTLs
M74LS164P
8-BIT SERIAL-IN PARALLEL-OUT SHIFT REGISTER
ELECTRICAL CHARACTERISTICS (T a =-20-+75'C. unless otherwise noted)
Limits
Min Typ * Max
V'C I nput clamp voltage Vcc=4. 75V. I,c= -18mA -1.5 V
Vcc=4.75V. V,=O.8V
V,=2V. 10H= -400pA

VcC=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V.V,=2V I IOL=8mA 0.35 0.5 V
Vcc=5.25V. VI=2.7V 20 pA
!,H High-level input current
Vcc=5.25V. V,=10V 0.1 rnA
I'L Low-level input current VCC=5.25V. V,=0.4V -0.4 rnA
los Short-circuit output current '(Note 2) Vcc=5.25V. VO=OV -20 -100 rnA
Icc Supply current VCC=5.2SV (Note 3) 16 27 mA
Note 2: All measurements should be d'one quickly and not more than one. output should be-shorted at a time.
Note 3: Icc is measured with DS I and DS2 at OV, 4.5V applied to T after AD
has been set from OV to 4.5V.
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-low-Ievel output propagation 13 27 ns
CL= 15pF
tpHL time, from input T to outputs QO-Q7 14 32 ns
(Note 41
Low-to-high-Ievel, high-to-Iow-Ievel output propagation
tpHL 18 36 ns
time, input R 0 to outputs Qo - Q 7
Note 4: Measurement circuit INPUT Vee OUTPUT
(1) The pulse generator (~G) has the following characteristics:

PG DUT PRR=lMHz. t r=6ns, t,=6ns, t w =500ns, Vp=3Vp.p, Zo=50n.
50Q ;}CL
TIMING REQUIREMENTS (Vee=5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tW(Ro) Direct reset Ro pulse width 20 9 ns
tsu(o) Setup time 0S1. DS2 toT 15 3 ns
th (0) Hold time 051. o S2 to T 5 2 ns
tree (R D ) Recovery time R D to T 20 -1 ns
' - - - - - - - - ' l t reo (110) .
Qo -Q7
Note 5: The shaded areas indicate when the input is permitted to change
for predictable output performance.
• MITSUBISHI
2-198 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS16SAP
8-BIT PARALLEL-IN SERIAL-OUT SHIFT REGISTER
DESCRIPTION
containing an 8-bit serial/parallel input - serial output shift
register function.
LOAD __
INPUT LOAD --+ 1 Vee
FEATURES CLOCK
CLOCK INHIBIT
• Parallel-to-serial data conversion INPUT INPUT
r-
Complementary output (Q 7 and 0:;)
•
•
•
Direct overriding load (data) input
Clock inhibit input PARALLEL
DATA
0, --+
3
.. - c,
13 ~ 0,
1PARALLEL
DATA
• Wide operating temperature range (Ta = -20 - +75°C) INPUTS 0,-> INPUTS
APPLICATION 0,->
General purpose, for use in industrial and consumer equip- SERIAL ~Ds
SERIAL
OUTPUT DATA INPUT
ment
GND SERIAL
OUTPUT·
This device is configured from eight R-S-T flip-flop circuits
and is designed to accept serial data input through D s , or Outline 16P4
parallel data input through Do - D 7 .
When Ds is used as the input, a clock pulse is applied to
clock input T when load input LOAD is high-level and the Care should be exercised to prevent the recording of
clock inhibit input TINH is low-level. erroneous data caused by a change in the value of Do -
Shih operations are initiated upon T transiting from low D7 when LOAD switches from low to high-value. Also,
to high, and the data present at Ds appears as an output when TINH is high, a shift operation will not be effected
pulse from Q7, Q 7 of the 8th flip-flop circuit. The output with clock pulse input. When T is low-level, and TINH
at Q 7 is always an inverted value of that present at Q7. transits from low to high, a '-bit shift operation will be
When Do - D7 is used as the input, LOAD is active-low. executed.
Since Do - D7 are entered at the direct-set, direct-reset M74LS165AP is an enhanced-performance version of
input of each flip-flop, read is executed regardless of the M74LS165P having modified switching characteristics.
status of other inputs.
BLOCK DIAGRAM
PARALLEL
DATA INPUTS
7 OJ } SERIAL
SERIAL DATA OUTPUTS
INPUT 9 07
LOAD INPUT LOAD 1)------<1
CLOCK INPUT
CLOCK INHIBIT
INPUT
GND
• MITSUBISHI
.... ELECTRIC 2-199
MITSUBISHI LSTTLs
M74LS16SAP
8-BIT PARALLEL-IN SERIAL-OUT SHIFT REGISTER
Inputs Internal Outputs Output
LOAD T'NH T Ds DO"'Dl 00 0, 0,
L X X X DO"'Dl D.O D, 0,
H L L X X 00 0 0,0 01 0
H L t H X H 00 0 060
H L t L X L 00 0 060
H H X X X 000 0,0 01 0
j : Transition from low to high (positive edge trigger)
Q 0: Status of o~tPut before t of T
TIMING DIAGRAM
TINH
Ds ______~~L~____________~----~----------------------~------------------------------
LOAD -----.LJ
II
DO--.J! H :1
, L i~--------~-----+-----------------------------------------------------
D, i ,
D2--.J~i--~H~i~I~~______-+____-+________________________________________________~---
D3------~:~L~+'----------~----~~-----------------------------------------------------
D4~M!--~H~I:I----------~--~~----------------------------------~-------------
: L I
Ds i I
~,'---:-:--:,.,I
D6~1I H I~.----------~--~1_------------------------------------------~----------
D , - - . J iI H ILI----------r-____~-------------------------------------------------
,-
01 :-=.-=- J! ! H I
I
H L H L H L H
I
Qi ----l! : '1
--- ~I~~I--------~~~=-~ L
I
I L H L H L H L r-
I I
CL<)CK INHIBIT , I SERIAL SHIFT
I
I
'
31 IE
i;RESE~i
• MITSUBISHI
2-200 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS165AP
a·BIT PARALLEL· IN SERIAL·OUT SHIFT REGISTER
ABSOLUTE MAXIMUM RATINGS (T. = -20- + 75'C , unless otherwise noted)
Vo Output voltage High-level state -0.5-Vee V
RECOMMENDED OPERATING CONDITIONS (T.=-20- +75'C, unlcss otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH;;;'2.7V 0 -400 "A

VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (T.=-20-+75'C, unless otherwise noted)
Limits
Min Typ* Max
Vie Input clamp voltage Vcc=4.75V, Ilc=-18mA -1.5 V
Vcc=4.75V, VI=0.8V
VOH High-level output voltage, 2.7 3.5 V
VI=2V, IOH= -400"A
Vcc=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V VI=2V I IOL=8mA 0.35 0.5 V
Vcc=5.25V, VI=2.7V 20 "A
HII High-level input current
Vec=5.25V. VI=10V 0.1 mA
IlL LOW-level input current VcC=5.25V, VI= 0.4 V -0.4 mA
los Short-circuit output current (Note 3) Vec=5.25V, Vo=OV -20 -100 mA
lec Supply current Vec=5.25V (Note 41 18 30 mA
* : All typical values are at Vee = 5V. Ta = 25°C.

Note 2. All measurements should be done quickly, and not more than one output should be shorted at a time.
3. With the outputs open, clock inhibit and clock at 4.5V. and a clock pulse applied to the LOAD input, ICC is measured first with the parallel inputs at 4.5V,
then with the parallel inputs grounded.
. Limits
Min Typ Max
t PLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 17 35 ns
t PHL time, from input LOAD to outputs 0 7 and a; 20 35 ns
-
t PLH Low-to-high-Ievel, h igh-to-!ow-Ievel output propagation 14 25 ns
CL= 15pF
t PHL time, from input T to outputs 0 7 and 0:; 13 25 ns
(Note 41
t PLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 9 25 ns
t PHL time, from input 0 7 to output 0 7 20 30 ns
t pLH Low-to-high-Ievel. high-to·low-Ievel output propaQation 16 30 ns
t PHL time, from input 0 7 to output a:;- 12 25 ns
• MITSUBISHI
.... ELECTRIC 2-201
MITSUBISHI LSTTLs
M74LS165AP
a·BIT PARALLEL· IN SERIAL·OUT SHIFT REGISTER
INPUT Vee OUTPUT
PG DUT
PRR = 1MHz, tr = 6ns, tf = 6ns, tw = 500n5, Vp = 3Vp_p,
SOQ Zo =50n.
TIMING REQUIREMENTS (Vee=5V. Ta=2S'C. unless otherwise noted)
limits
Min Typ Max
tw (T) Clock pulse width 25 13 ns
tw (LOAD) LOAD low-level pulse width 15 12 ns
tsu (T 1NH ) Setup time TrNH to T 30 13 ns
tsu (Do~D,) Setup time Do . . . . 0 7 to D:5AD 10 9 ns
tsu (Os) Setup time Os to T 20 8 ns
tSU(LOAD) Setup time IOA5 to T 45 0 ns
th Hold time 0 0 ns
TIMING DIAGRAM (Reference level =1.3V)
TINH
tsu (TINH)
Q7
t pLH
OJ
Q7
Ds
• MITSUBISHI
2-202 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS166AP
a-BIT SHIFT REGISTER
DESCRIPTION
containing an 8-bit serial/parallel input - serial output shift
register function_ SERIAL
DATA Vee
INPUT
FEATURES +--LDAD LOAD
• Parallel-to-serial conversion INPUT
0, --> +-- 01 PARALLEL

• Clock inhibit input PARALLEL DATA INPUT
DATA
• Direct overriding reset INPUTS SERIAL
• Wide operating temperature range (Ta = -20~+75°C) DATA OUTPUT
03 --> +--06
APPLICATION CLOCK
INHIBIT
PARALLEL
DATA
General purpose, for use in industrial and consumer equip- INPUT INPUTS
ment CLOCK INPUT T--> 7 +--D,

DIRECT
GND +--RD RESET
FUNCTIONAL DESCRIPTION INPUT
Parallel or serial input mode is selected via the load input

LOAD signal. When LOAD is high-level, serial input enables
Outline 16P4
the serial data input and couples the eight flip-flop for serial
shifting with each clock pulse. Conversely, when LOAD is
low-level, parallel data inputs Do~D7 are enabled and clock input. The clock-inhibit input should be change to
synchronous loading occurs on the next clock pulse. While the high level only while the clock input is high. The
during parallel loading, serial data flow in inhibited. Clock- buffered, direct reset input Ro overrides all other inputs,
ing is accomplished on the low-to-high-Ievel edge of the including the clock, and sets all flip-flop to zero.
clock pulse through a two-input positive NOR gate permit- M74LS166AP has been improved to resolve timing
ting one input to be used as a clock-enable or clock-inhibit 'problems on LOAD input signal switching that occurred in
function. Holding either of the clock inputs high inhibits the M74LS166P. Serial output Q7 has also been provided
clocking; holding either low enable the clock input. This, with a buffer to reduce noise, resulting in a change in
of course, allows the system clock to be free-running and specifications.
the register can be stopped on command with the other
BLOCK DIAGRAM
SERIAL
OUTPUT
DIRECT _
RESET RD 9
INPUT
LOAD Do 0, 05 TINH
j,,"
LOAD ~----------------------~v~------~---------------- CLOCK
INPUT PARALLEL INPUTS INHIBIT
INPUT
• MITSUBISHI
I!P& ELECTRIC 2-203
MITSUBISHI LSTTLs
M74LS166AP
FUNCTION TABLE INotet)
In t n +l
Parallel Inputs Internal outputs
AD LOAD T'NH T Ds 07
DO'''D7 00 Ot
L X X X X X L L L
H X L L X X 000 010 070
H L L i X DO"'D7 Do D, D7
H H L i H X H OOn OSn
H H L i L X L OOn OSn
H X H i X X 000 01n 070
Note 1. X Irrelevant
t Transition from low to high (positive edge trigger)
Do -- 0,: Indicates status prior to clock pulse at input Do thru 07'
0 00 ... 0 70 : Indicates initial status of output 0 0 thru 0,-
Con ... Q7n: Indicates status of 0 0 thru 0, immediately prior to clock input
tn+l: Bit time after one clocking transition.
TIMING DIAGRAM
,i r,---,
--, ,I
AD , , ~,
I
,,
DS~ ~
~,
LOAD I I , !I
I
I
I
I, rnn
&....+I
Do ! I Hi~------~-r---------------------------------____
0, I
I
1
I ~
Li
02 I: II I HII.,
I ______ ~-r-----------------------------
03 : : LI
D4 :
I
!
I
nm.,__'-'!_+-_____________
I
Ds :
I
II Li
,...-.,+0
Ds I I I ' H'~I----_rl--I~---------------------------
I ,I
I ~'i:
, HI I I
~7--l
7__
'i
Ik-< ------~----OO(.1 ~
~t . lHi;H~
I(-E-E_ _ _ _ _
RESET SERIES SHIFT LOAD INHIBIT SERIES SHIFT
.• MITSUBISHI
MITSUBISHI LSTTLs
M74LS166AP
8·BIT SHIFT REGISTER

Vo Output voltage High-level output -0.5- Vee V
TSIg Storage temperature range' -65- +150 ·C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75·C. unlessotherwisenoted)
Limits
Min Typ Max

10H High-level output current VOH~2.7V 0 -400 !,A
VOL""0.4 V 0 4 mA
VOL""0.5V 0 8 mA
Limits
Min Typ * Max
V'H High·level input voltage 2 V

V,e Input clamp voltage Vee=4.75V,I,e=-18mA -1.5 V
Vee=4. 75V, V,=0.8V
V,=2V, 10H= -400!,A

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V IOL=8mA 0.35 0.5 V
I
Vee=5.25V, V,=2.7V 20 !'A
"H H igh·[evel input current
Vec=5.25V. V,=10V 0.1 mA
"L Low-level input current Vee=5.25V. V,=0.4V -0.4 mA

lOS Short-circuit output curfent (Note 2) Vee=5.25V, VO=OV - 20 -100 mA
ICC Supply current Vee=5.25V INote31 20 32 mA
* : All typical values are at Vee = 5V, T a = 25°C.
3. With all outputs open, 4.5V applied to the serial input and all other inputs except the clock grounded, ICC is
measured after a momentary ground, then 4.5V, is applied to clock.
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25·C, unless otherwise noted)
Limits
Min Typ Max

H igh-to-Iow-Ievel output propagation time, from input
t PHL 18 30 ns
RO to output 0 7 CL=15pF INote51
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 10 . 20 ns

t PHL time, from input T to output 0 7 12 25 ns
• MITSUBISHI
"'ELECTRIC 2-205
MITSUBISHI LSTTLs
M74LS166AP
. Note 4. Measurement circuit
INPUT Vee OUTPUT
PG DUT
characteristics: PRR = lMHz, tr = 6ns. tf = 6ns.
tw = SOOn;, Vp = 3Vp_p, Zo =son.
son (2l CL inCludes jig and probe capacitance.
TIMII\iG REQUIREMENTS (Voo=SV, Ta=2S'C, unlessotherwisenoted)
Limits
Min Typ Max
tW(T) Clock pulse width 20 14 ns
tW(Ro) Reset pulse width 20 B ns
tsu (D) Setup time OS, 0 0 -0, to T 20 12 ns
tSU(LOAD) Setup time LOAD to T 30 12 ns
th Hold time all inputs to T 0 -10 ns
tW(RQ)
00-0, _ _ _ + __.....J
Q, - - - ' "
TEST CONDITION TABLE

Data input for test LOAD Output tested Bit time
0, OV Q, tn+1
Os 4.SV Q, t n +8
• MITSUBISHI
2-206 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS170P
4-BY -4 REGISTER FILE WITH OPEN COLLECTOR OUTPUT

containing a 4-word by 4-bit register file function with
open collector outputs. Vee
DATA
DATA INPUT
FEATURES INPUTS
• Separate read and write addresses for simultaneous data 14 <- WA 1 WRITE
• Read and write enable inputs provided
READ IRS ---. 4 <- Ws
i ADDRESS
INPUTS
• Easy expansion of memory capacity using enable inputs ADDRESS
INPUTS RA---' <- Ew ~~~~ ENABLE
• Usable in AND-Tie connection (open collector outputs)
• Wide operating temperature range (Ta=-20-+75°C)
OUTPUTS I Q3 <-
Qz <-
6
---. Qo 1
READ ENABLE
INPUT
APPLICATION i OUTPUTS
'equipment.
FUNCTIONAL DESCRIPTION * : OPEN COLLECTOR OUTPUT

Outline 16 P4
This device contains 16 D-type latches as memory elements.
Separate read and write inputs, both address and enable,
allow simultaneous read and write operation, thereby Writing Method
enabling readout of other word contents during writing and Writing into the bits is performed by specifying the words
writing into other words during readout resulting in with address inputs WA and WB and by applying the data
increased speed. Open collector outputs make it possible to to data inputs Do, D 1 , D2 and D3 . The write enable input
The open collector outputs permit wire-AND connec- Ew is set low. No writing is performed when Ew is set high.
tions for 256 outputs and expansion up to 1024 words.
M74LS170P has the same functions and pin connections Readout Method
as M74LS670P but the latter is provided with 3-state When the words are specified by read address inputs RA
outputs. and R B , the contents of 'the stored bits appear in outputs
Qo, Q1, Q2 and Q3' Read enable input ER is set low. When
ER is set high, all the outputs are set high.
_OUTPUTS
BLOCK DIAGRAM ~ ________ ~ _~A~ __ ~~ ________ ~
READ ENABLE INPUT
WORD 3
WORD 2
WORD 1
,WORD a
WRITE ADDRESS INPUTS }vA 14
LWS13~~~)-~~t=i======S~~====~=i====~~
WRITE ENABLE INPUT
GND
~~------~~~y~----~------~~
DATA INPUTS OPEN COLLECTOR OUTPUTS
• MITSUBISHI
...... ELECTRIC 2-207
MITSUBISHI LSTTLs
M74LS170P
Writing Method Readout Method

Word RA Re ER Qo Q, Q2 Q3
WA We Ew ,
0 1 2 3 X X H H H H H
X X H QO QO QO QO L L L WoBo WoB, WOB2 WoB3
L L L Q=D QO QO QO H L L W,Bo W,B, W,B2 W,B3
H L L QO Q=D QO QO L H L W2 BO W2 B , W2 B2 W2B3
L H L QO QO Q=D QO H H L W3 BO W3 B, W3B2 W3 B3
H H L QO QO QO Q=D
Note 1 QO: No change in word contents.
Q = 0 : Data input contents are written into specified word.
WxB y: Indicates word X and bit Y contents
X : Irrelevant

VI Input v~ltage -0.5- +15 V
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75'C. unless otherwise noted)
Limits
Min Typ Max

IOH High-level output current Vo =5.5V 0 100 I1A
VOL;;> 0 .4V 0 4 mA
VOL;;> 0 .5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-'-20-+75'C. unless otherwise noted)
Limits
Min Typ * Max
VIH High-level 'input voltage 2 V
V,e Input clamp voltage Vee=4. 75V. Ile= -18mA -1.5 V
V ee=4.75V, VI=0.8V
IOH High-level output current 100 I1A
VI=2V. Vo= 5.5V

Vee=4.75V I IOL= 4rnA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0 . .35 0.5 V
ER, Ew 40
Vee=5.25V. VI=2.7V I1A
Other inputs 20
ER, Ew 0.2
Vee=5.25V. VI=10V rnA
Other inputs 0.1
Low-level input current
ER. Ew -0.8
IlL Vee=5.25V. VI=O.4V mA
Other inputs -0.4
ICC Supply current Vee-5.25V (Note 2) 40
25 mA
: Alit YP ieal'valuesaeatVee
r =5V.T. - 25C.
0
*
Note 2: Icc is measured with WA, Ws, RA and R8 at OVand with 00""'04, ER and EW at 4.5V.
. • MITSUBISHI
MITSUBISHI LSTTLs
M74LS170P
SWITCHING CHARACTERISTICS (Vcc=5V. T a =25·C. unless otherwise noted)
Limits
Min Typ Max

tpHL time, from input E R to outputs QQ. Q 1. Q2. 03 11 30 ns
tpLH Low-w-high-Ievel. high-to-Iow-Ievel output propagation 16 40 ns
tpHL time, from inputs R A. R B to outputs Qo. Q 1. Q2. Q3 RL = 2 kQ 15 40 ns
tpLH Low-to-high-Ievel, high-to-Iow-level output propagation CL=15pF (Note 31 16 45 ns
tpHL time, from input Ew to outputs Qo, 0" Q2. Q3 16 40 ·ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation time, 15 45 ns
tpHL from inputs 00.0,.02.03 to outputsOo. 0,. 02. 03 I 15 35 ns

PG DUT
PRR = 1MHz. t r=6ns. tf= 6ns. tw= 500ns. Vp=3Vp.p . Zo= son.
50Q
TIMING REQUIREMENTS (Vcc=5V. Ta=25·C. unlessotherwisenoted)
Limits
Min Typ Max
tw (ER) Read enable input E R pulse width 25 9 ns
tW(Ew) Wright enable input E w pulse width 25 9 ns
lSU(D) Oo~ D3 setup tjme with respect to E w 10 5 ns
lsu(W) WA. Ws setup time with respect to E w 15 - 2 ns
th(D) Do - 03 hold ti me with respect to E w 15 0 ns
th(w) WA. Ws hold time with respect to E w 5 -2 ns
t latch Do - 03 latch time (note 4) 25 5 ns
Note 4: tLATCH is the time required for storage when data is changed.

tw (E,;). tw(EVi)
00 -03
Note 5: The shaded areas ind'icate when the input is permitted to

change for predictable output performance.
• MITSUBISHI
.... ELECTRIC 2-209
MITSUBISHI LSTTLs
M74LS173AP
4-BIT D~TYPE REGISTER WITH 3-STATE OUTPUT

containing a 4-bit register with 3-state outputs_
FEATURES OUTPUT {O C 1 -> 1

Vee
CONTROL . DIRECT
• Data can be held irrespective of number of clock pulses INPUTS OC2-> RESET
INPUT
• Data are non-destructible with 3-state outputs
• Positive edge-triggering
• Direct reset input provided DATA
OUTPUTS INPUTS
• Easy bit expansion
APPLICATION CLOCK
INPUT <- M(Cl } MODE
CONTROL
General purpose, for use in industrial and consumer <- M(C2 INPUTS
GND
equipment.
This device contains 4 edge-triggered D-type flip-flop Outline 16P 4
circuits and direct reset input RD .and clock input T
common to all circuits_ When T changes from low to high,
the information of data inputs 1D ~ 4D. immediately hold the status established when M/C I and M/C z · are low,
before the change appears in outputs 10 ~ 40 respectively irrespective of the other signals. When DC I or DC z is high,
in accordance with the function table. 10 ~ 40 are all put in the high-impedance state. In this
When RD is set high with mode control inputs M/C I and case, the internal flip-flop status does not change becauseJof
M/C z low, all the fl ip-flop outputs are low irrespective of the DC I and DCzinput change_ For use as aD-type
the other inputs_ When MlC I or M/C z is high, 10 ~ 40 flip-flop, set M/C I , M/C z , DC I and DC z all low.
BLOCK DIAGRAM
lQ 2Q
.
OUTPUTS
OUTPUT CONTROL {.OC2 2

INPUTS OC 1
DIRECT RESET INPUT Ro
CLOCK INPUT
MODE CONTROL.
INPUTS
1 M / ClIO
.
M/C2 91-
-.':::::::c)--l--P------t...!----P------'T
GND
DATA INPUTS
•. MITSUBISHI
2-210 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS173AP
4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUT
FUNCTION TABLE INoteli
RO T M/GI M/ 0 2 D Q
H X X X X L
L L X X X QO
L i H X X QO
L i x H X QO
L i L L L L
L i L L H H
Note 1 High·impedance state when DC, and/or OC2 are high.

t : Transition from low to high (positive edge ttigger)
X : Irrelevant
established
ABSOLUTE MAXIMUM RATINGS (Ta=-ZO-+75'C, unlessotherwisenoted)
Vee .Supply voltage -0.5-+7 V

VI I "put ~oltage -0.5-+15 V
Vo Output voltage Off-5tate -0.5- + 5.5 V
Top. Operating free-air ambient temperature range -ZO-+75 'c
Tstg Storage temperature range -65-+150 'c
RECOMMENDED OPERATING CONDITIONS (Ta =-ZO-+7S'C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage > 4.75 5 5.Z5 V

IOH High-level output current VOH;;;:Z .4V 0 -Z.6 I1')A
VOL~0.4V 0 lZ rnA
VOL~0.5V 0 24 rnA
ELECT'RICAL CHARACTERISTICS (T a= -ZO-+7S'C, unless otherwise noted)
Limits
Min Typ * Max
VIH High-level input voltage Z V
VIC Input clamp voltage Vee=4.75V.lle=-18mA -1.5 V
Vee=4.75V. VI=0.8V
VOH High-level outP.ut volta~e 2.4 3.1 V
VI=2V.loH=.-2.6rnA

Vee=4.75V I IOL=IZrnA 0.25 0.4 V
VI=0.8V. VI=ZV I IOL=Z4rnA 0.35 0.5 V
IOZH Off-state high-level output current Vee=5.Z5V. VI=ZV. VO=Z.7V ZO "A
IOZL Off-state low-level output current Vee 5.Z5V. VI=ZV.Vo=0.4V -ZO "A
Vee=5.Z5V. VI=Z.7V ZO "A
Vee=5.Z5V. VI=10V 0.1 mA
IlL Low-level input current Vee=5.Z5V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 2) Vee=5.Z5V. VO=OV -30 -130 mA
Icc Supply ·current Vee=5.Z5V INote31 17 30 rnA
* : All typical values are at Vee=5V, Ta =25"C
Note 2: All measurements should be done quickly and not more than one output should be Shorted at a time.
Note 3: Icc is measured after M7C7. M"lC';. 1040 and OC2 have been set to OV, T and OC I to 4.5V and RD from OV to 4.5V.
• MITSUBISHI
i9i.ELECTRIC 2-211
MITSUBISHI LSTTLs
M74LS173AP
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25·C, unlessotherwisenoted)
Limits
Min Typ Max
High-to-Iow-Ievel output propagation time, from input
tpHL 21 35 ns
Ro to output Q CL=45pF (Note 4)

tpHL time from input T to output 26 30 ns
tPZH Output enable time to high-level 14 23 ns

CL=45pF, RL=667Q (Note4)
tpz L Output enable time to low-level 15 27 ns
tpHZ Output disable time from high-level 11 17 ns
CL=5p F , RL=667Q (Note 4)
tpLZ Output disable time from low-level 9 17 ns
JIMI NG REQUIREMENTS (Vcc=5V, Ta=25·C, unless otherwise noted)
Limits
Min Typ Max
tWIT) Clock input T pulse width 20 4 ns
tsu (0) Setup time 10- 40 to T 17 3 ns
th (0) Hold time 10- 40 to T 6 3 ns
tSU(M/C) Setup time M/C" M/C2 to T 35 20 ns
th(M/C) Hold 'ime MiC" M/C2 toT 0 -12 ns
tW(Ro) Direct reset R D pu Ise wid th 20 10 ns
tree Recovery time Ro to T 15 12 ns
INPUT Vee
Symbol SW1 SW2 (11 The pulse generator (PG) has the following
_ ..- -- characteristics:
t PZH Open Closed PRR = 1MHz, t, = 6ns, tf = 6ns, tw = 500ns.
I-- Vp = 3Vp.p, Zo = 50n.
t PZL Closed Open
PG DUT (2) All diodes are switching diodes (t rr:;;: 4nsl.
t PLZ Closed Closed (3) CLinciudes probe and jig capacitance.
SOIl t PHZ Closed Closed
10-40
OR
M I C" M I C 2 1.J.i..I.I.J..I.I.J.~~;c;;t~~:::::~~~~
1Q-4Q
OCt'OC2~ ~V
Rq 1Q-4Q PZH ~
,
T
1Q-4Q
• MITSUBISHI
2-212 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS173AP
APPLICATION EXAMPLE
Shown below is a schematic of a 4-bit x 4-word register file using the M74LS173AP.
I I
10 20 30 40
r--T M74LSI73AP Ro WOR D 3
M/C, MlC, 10 2D 3D 4D OC, OC,
Y I I Y
JI I
1/6
M74LS04P
f-- I I I
e-
10 20 30 40 1/6
Ro M74LS04P WOR D 2
f--T M74LSI73AP
iL~ M/C, M/C, 10 2D 3D 4D OC, OC,
IL
Do
D,
'( I 1 'i
DATA {
INPUTS D2
I I I
D3
M74LS04P
1/6
I I I
10 20 30 40 M74LS04P
1/6
M74LSI73AP
~
f--T Ro
WOR
M/C, M/C, 10 20 3D 4D OC, OC,
'( 1 '(
I
I I I
I I I
10 20 30 40
-T M74LSI73AP Ro WOR DO
M/C, M/C, 10 2D 3D 40 OC, OC,
I I II 1
Ro RA Rs
~
WRITE SELECT CLOCK INPUT DIRECT RESET REAO SELECT
INPUTS INPUT INPUTS
Writing method Readout method
WORD Rs RA 00 QI 02 Q3
Ws WA
0 1 2 3 L L WoDo WoD1 WOD2 WOD3
L L O=D QO QO 00 L H W1 D O W, D, W, D 2 W, D 3
L H QO 0=0 QO 00 H L W2 DO W2 D, W2 D 2 W2 D 3
H L QO QO Q=D QO H H W3 D O W3 D1 W3 D2 W3 D 3
H H 00 00 QO O=D
• MITSUBISHI
.... ELECTRIC 2-213
MITSUBISHI LSTTLs
M74LS174P
HEXD-TYPE FLIP FLOPS WITH RESET

containing 6 D-type edge-triggered flip-flop circuits with
common clock input T and direct reset input RD as well
DIRECT
as discrete data input D. 7~~5i RD.... 1 vee
OUTPUT Qo <- .... Qs OUTPUT
FEATURES
• Positive edge-triggering DATA (
INPUTS
Do ....
.
4- 05) DATA
• Common clock and direct reset inputs for all 6 circuits 0, .... 4- D. INPUTS
OUTPUT Q, .... Q. OUTPUT
• Wide operating temperature range (T a = -20 ~ +75 0 C)
4-
DATA INPUT 02 .... 4- 03 DATA INPUT
APPLICATION .... Q3 OUTPUT

OUTPUT
equipment. GNo 4- T CLOCK INPUT
When T changes from low to high, the D signal immediately Outline 16P4
before the change appears in the output Q in accordance
with the function table. When RD is low, all Q are low, FUNCTION TABLE INote 11
regardless of the status of the other input signals. For use RD T 0 Q

as a D-type flip-flop, keep RD high_ L X X L
H i H H
H i L L
H L X QO
Note 1: t : transition from low to high level

QO : level of Q before the indicated steady-state
input. conditions were established
X : irrelevant
BLOCK DIAGRAM
OUTPUTS
o 1 o 1 o 1 o 1 o 1 o 1
T T T T T T
RD RD
DIRECT RESET INPUT RD 1
Do 0, GNo
DATA INPUTS
• MITSUBISHI
"ELECTRIC
MITSUBISHI LSTTLs
M74LS174P
HEX D· TYPE FLIP FLOPS WITH RESET

Topr Operating free-air ambient temperature range -20- + 75 'C
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75"C. unlessotherwisenoted)
Limits
Min Typ Max
10H High-level output current VOH'S2.7V 0 - 400 IlA

VOL~0.4V 0 4 mA
Low-level output current
10L
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20-+75'C, unlessotherwisenoted)
Limits
Min Typ* Max
V,e I nput clamp voltage Vee=4.75V,I,e=-18mA -1.5 V
Vee=4.75V, V,=0.8V
V,= 2 V, 10H= -4001lA

Vee=4.75V I IOL= 4 mA 0.25 0.4 V
V,=0.8V, V,= 2V I IOL = 8 mA 0.35 0.5 V
Vee=5.25V, V,=2.7V 20 IlA
Vec=5.25V, V,= 10V 0.1 mA
I'L Low-level input current Vee=5.25V. V,=O.4V -0.4 mA
loS Short-circuit output current Note2 Vee=5.25V, VO= 0 V -20 -100 mA
IcC Supply current Vee= 5.25V INote 31 16 26 mA
* : All typical values are at Vee 5V, Ta = 25°C.

=
Note 3: Icc is measured with 0, RD inputs at 4.5V and a momentary ground, then 4.5V, applied to T input
SWITCHI NG CHARACTERISTICS (Vee= 5 V. Ta =25'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-row-Iever output propagation 10 30 ns
tpHL time, from input T to output Q CL = 15pF INote 41 10 30 ns
High-to-Iow-Ievel output propagation time,
t pHL 11 35 ns
from input AD to output Q
INPUT Vee OUTPUT

Vp "3Vp_p. Zo" 50n
• MITSUBISHI
"'ELECTRIC 2-215
MITSUBISHI LSTTLs
M74LS174P
HEX D·TYPE FLIP FLOPS WITH RESET
TIMING REQUI REMENTS (VOO= 5 V •.Ta=2S'C. unless otherwise noted)
Limits
Min TVp Max
tw(T) Clock input T pulse width 20 4 ns
tw (RD) Reset input RD pulse width 20 6 ns
tsu (D) Setup time 0 to T 20 2 ns
th (D) Hold time 0 to T 5 0 ns
trec (RD) Recovery time RD to T 25 5 ns
trec (Ro)
0 RD
T
T
.Q Q
for predictable 9utput performance.
APPLICATION EXAMPLE
6-bit shift register
~:)
Q3
Qz
OUTPUTS
Q1
I Qo
J
Qo Q1 Qz Q3 Q4 Qs
M74LS174P
Do 01 0 Z 03 04 05 T RD
DATA INPUT CLOCK DIRECT

INPUT rJ?3-f
• MITSUBISHI
2-216 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS175P
QUADRUPLE D-TYPE FLIP FLOP WITH RESET

containing 4 positive edge-triggered D-type flip-flops with
common clock input T and direct reset input RD and
discrete data inputs D.
DIRECT
RESET
INPUT
_
Ro -+ 1 Vee
FEATURES OUTPUTS {~00 +-

+-
-+ 03}
-+
_
03
OUTPUTS
• . Positive edge-triggering
• Clock and direct reset inputs common to 4 circuits DATA {DO -+ 4 4- 03 } DATA
INPUTS INPUTS
• Q and Q outputs 01 -+ 4- 02

OUTPUTS {
OJ +- 11 -+Q2} , OUTPUTS
APPLICATION 01 +- -+ 02
CLOCK
General purpose, for use in industrial and consumer GND INPUT
equipment.
Outline 16P4
When T changes from low to high, the D signal immediately
before the change emerges in outputs Q and IT in accord-
ance with the function table. By setting RD low, all the Q
and Q outputs are se~ low and high, respectively, irrespec- RD T 0 0 0
tive of the status of the other inputs signals. For use as a L X X L H
D-type flip-flop, RD must be kept in high. H i H H L

H i L L H
H L X 00 00
t : Transition from low to high level (positve edge trigger)
00 : Level of Q before the indicated steady-state input conditions were
established.
BLOCK DIAGRAM
OUTPUTS
(~ __________________ ~A~ ______________________ ~
00 Q(j 02 Q2 Vee
DIRECT ~~~~i Ro 1 I
CLOCK INPUT T
Do
~------------------~y~---------------------
02
---J GND
DATA INPUTS
• MITSUBISHI
"ELECTRIC 2-217
MITSUBISHI LSTTLs
M74LS17SP
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75·C. unlessotherwisenoted)

Tstg Storage temperat'ure range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75'C, unless otherwise noted )
Limits
, Min Typ Max
Vec Supply voltage 4 75 5 5.25 V
10H High-level output current VOH;;"2.7V 0 -400 ,.,A

VOL';;0.4V 0 4 mA
VOL';;0.5V 0 8 mA
Limi'ts
Min Typ * Max
V,H High-level input voltage 2 V ,
V'C Input clamp voltage Vec=4.75V.I'C=-18mA -1.5 V
VCC=4.75V. V,=0.8V
V,=2V. IOH= -400,.,A

Vcc=4.75V I IOL=4mA 0.25 0.4 V
V,=O .8V. V,=2V I IOL=8mA 0.35 0.5 V
Vcc=5.25V. VI=2.7V 20 ,.,A
Vec=5.25V. V,=10V 0.1 mA
IlL Low-level input current Vcc=5.25V. V,=0.4V -0.4 mA
lOS ShOft-circuit output current (Note 2) Vec=5.25V. VO=OV -20 -100 mA
lec Supply current VOC=5.25V INote 31 11 18 mA
*: All typical values are at VCC=SV, Ta=2SQC
Note 2: All measurements should be dOlle quickly and not more than one output should be shorted at a time.
Note 3: Icc is measured with 4.5V applied to 0 and AD after T is set to OV.
SWITCHING CHARACTERISTICS (VCC=5V. T a =25·C. unless otherwise noted)
Limits
Min Typ Max
f max Maximum clock frequency 30 50 ns
CL=15pF INote41
tpHL time, from T to Q. Q 12 25 ns
tpLH Low-to:high-Ievel, high-to-Iow-Ievel output propagation 15 30 ns
tPHL time, from RD to O. Q 19 30 ns
INPUT Vee OUTPUT
PG OUT
PRR = 1 MHz, tr = 6ns, tf = 6ns, tw "" 500ns,
50n Vp = 3V p.p . Zo = 50n.
• MITSUBISHI
2-218 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS17SP
TIMING REQUI REMENTS (Vcc=5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
IW(T) Clock input T pulse width 20 4 ns
IW(Ro) Direct reset input pulse width 20 7 ns
Isu (D) Setup time high to T 20 2 ns
I h (D) Hold time high to T 5 0 ns
Irec(R o ) Recovery time for direct reset input 25 5 ns

tsu(o) th(o) tsu(o) th(o)
I weAn) tree (An)
D.
T
T
Q Q
APPLICATION EXAMPLE
Timing pulse generator
OUTPUTS
,..----A-----.,
lQ 2Q 3Q 4Q
[5 T
lQ
2Q LJ
lQ 2Q 3Q 4Q 3Q LJ
M74LS175P
4Q
LJ
AD T 10 20 30 40
DIRECT CLOCK
RESET INPUT
INPUT
• MITSUBISHI
;"ELECTRIC 2-219
MITSUBISHI LSTTLs
M74LS190P
SYNCHRONOUS PRESETT ABLE UP/DOWN DECADE COUNTER
WITH MODE CONTROL
DESCRIPTION
containing a decade up/down counter function with up/
down control and preset inputs.
DATA INPUT Vcc
FEATURES
DATA INPUT
• Up/down switching with up/down control input OUTPUTS J
• . Asynchronous preset input provided
• Enable input provided
l QA<- CLOCK INPUT
ENAB LE INPUT RIPPLE CLOCK

• Easy cascade connection possible OUTPUT
UP/DOWN
• High-speed counting (fmax = 38MHz typical) CONTROL D/D-+ 5 TERMINAL
COUNT OUTPUT
INPUT
• Wide operating temperature range (Ta= -20-+75°C)
11 <- LOAD LOAD INPUT
OUTPUTS { Qc<- 6
APPLICATION Qo<-
GND
equipment.
When enable input E is low, load input LOAD is high and Outline 16P4
the count pulses are applied to clock input T, the number
of count pulses appear as a BCD code in the outputs QA, High appears in the terminal count output TC during
Qs, Qc and Qo in synchronization with the count pulses. count-up while 9 2 appears in QA, Qs, Qc and Qo and
When the up/down control input D/D is made low, during count-down while O2 appears. Low appears in the
count-up begins and when made high, count-down begins. ripple clock output RC only when E and T are low and 9 2
Counting is performed when T changes from low to high. appears in outputs QA, Qs, Qc and Qo during count-up or
Presetting is performed regardless of the count pulses O2 appears in the outputs during count-down. E, TC and
and by applying the data to data inputs DA, Ds, Dc and RC are used when cascade-connecting the counter. (Refer
Do and by setting LOAD low, the DA, Os, Dc and Do' to application examples.)
signals appear in outputs QA, Qs, Qc and Qo irrespective E can be changed from high to low irrespective of the
of the status of the other inputs and the count can be status of T but when changed from low to high, T must be
preset. Counting proceeds as per the status transition high. Perform the change for D/D when T is high.
diagram with presetting to a numerical value of 102 or
higher.
BLOCK. DIAGRAM OUTPUTS

r-------------------~-------------------\
QD Vee
1 ,
TERMINAL
1 TC COUNT
OUTPUT
_ RIPPLE
13 RC CLOCK
OUTPUT
LOAD INPUT
LOAD 11
UP/DOWN
CONI~~8'r U/D
08 Dc Do GND
DA
\~--------~--------~v~-------------------
DATA INPUTS
• MITS.UBISHI
2-220 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS190P
SYNCHRONOUS PRESETT ABLE UP/DOWN DECADE COUNTER
WITH MODE CONTROL
FUNCTION TABLE (Note 11 STATE DIAGRAM

LOAD E U/D T QA I Os I Oe I 00
L X X X DA I Os I De I Do
H L L 1 Count-up
H L H 1 Count·down
H H X X Inhibit
Note 1. i : Transition from low to high

X : Irrelevant
E TO!I) T RO
L H L L
L H H H
H X X H
X L X H
TC is the output but the signal generated internally by
- - - Count-up
the following logical expression.
---- Count-down
TC = QA ·Qo· (U/DI .... ....... Count·up
TC = OA ·Os·Oc·o,;· (U/DI········ Count·down
.LOAD -U,----------------
DA ~ =-=--=-_=_-=-__=__=__=_'~.:-:. -_
. __=___=___-..:_..:_..:__-_-___-_-_-_-:
I I
:: M~~~~~~~~~~~~~~~~~~~~~~~~
Do ~===__=_ ____=_______________-_-_-_-..:__=___-_-_-_-___..
I I
T I I
I II
U/D -,~~I~I~I_ _ _ _ _ _~
I(
1:1 II
OA=-l I, I "
OB =:±-n~----~--~~-----~
I I, .-
Oe ==y-nLII________~---~~--------~
I
Details of timing diagram
(ll Preset to 13
00 I
--"j
(21 Count-up 8, 9. 0, 1,2
TC==i.Jl...........
_ == 'I '----7-"--i--!-...Jn
I L _ _ __
(3) Count inhibit
141 Count-down 1,0,9,8,7
RC __ 7J-7II~-'LJr---~---7-+--'LJr---~1
LJi"".8~_9__0_1_+21t.;,_ _.j12 0 7,
PRESET COUNT-UP COUNT INHI BIT COUNT-DOWN
(1) (2) (3) (4)
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'0. unlessotherwisenoted)

Vo Output voltage Hjgh·lev~1 state -0.5- Vee V
Tstg Storage temperature range - -65-+150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75·C. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH;'2.7V 0 -400 f.1A

VOL";0.4V 0 4 mA
VOL"; 0 .5V 0 8 mA
• MITSUBISHI
.... ELECTRIC 2-221
MITSUBISHI LSTTLs
M74LS190P
SYNCHRONOUS PRESETTABLE UP/DOWN DECADE COUNTER
WITH MODE CONTROL

Limits
Min. Typ * Max
VIH High-level input vortag-e 2 V
VIC Input clamp voltage VCC=4. 75V. Ilc= -18mA -1.5 V
Vcc=4.75V. VI=0.8V
VOH High-level output-voltage 2.7 3.4 V
VI=2V.loH=-400,uA

VCC=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
T. LOAD. U/D. DA-DO 20
VCC=5 .25V. -V1=2. 7V ,uA
High-level input current E 60
IIH
T. LOAD. U/D. DA-DO 0.1
Vcc=5.25V. VI=10V mA
E 0.3
T. LOAD. U/D. DA-DO - 0.4
IlL Low-level input current VCC=5.25V. VI=O .4V mA
E -1.2
lOS Short·circuit output current (Note 2) VCC=5.25V. VO=OV -20 -100 mA
Icc Supply current VCC-c 5. 25V INote 3) 20 35 mA
* 0
All tYPical values are at Vee = 5V, Ta = 25 C.
Note 3. Icc is measured with all the inputs at OV.

Limits
Min Typ Max
f max Maximum clock freqency 20 40 MHz
tpLH Low-to-high-Ievel, high-to-!ow-!evel output propagation 19 33 ns
tpHL time, input C07il5 to outputs Q A. Q B. Q c. Q 0 25 50 ns
tpLH Low·to-high·!evel. high·to-!ow·!eve! output propagation 11 32 ns
time, from inputs DA. De. Dc. Do to outputs
tPHL QA. QB. Qc. Qo 25 40 ns
tpLH Low-to-high-Ieve!, high-to-!ow-!eve! output propagation CL=15pF INote4) 11 20 ns
tpHL time, from input Tto output RC 11 24 ns
tpLH Low-to-high-Ievel, high-to·!ow·!eve! output propagation 12 24 ns
tpHL time, from input Tto outputs OA. Os. QC. QD 14 36 ns
tpLH Low·to-high-!evel, high·to-!ow-!eve! output propagation 20 42 ns
tpHL time, from input T to output TC 24 52 ns
tpLH Low-to-high·!evel, high·to·low-level output propagation 22 45 ns
tpHL time,from input DID to output RO 20 45 ns
tpLH Low·to·high·level, high-to·low-Ievel output propagation 15 33 ns
tpHL time, from input TI/ D to output TC 15 ns
33
i
tpLH Low·to-high·level, high-to·low-Ievel output propagation 10 33 ns
time, from input E to output RC
wJ I lor
tpHL 11 33 ns
'.m~",",,," B
PRR = 1MHz, t r =6ns, tf= 6ns, tw = 500ns,
'",,' Vp = 3Vp.p. Zo = 50n
(2) CL· includes probe and jig capacitance
TIMING REOUIREMENTS (Vcc=5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tw (IL) Clock input T low pulse width 25 9 ns
tW(LOAO) Load LOAD pulse width 35 10 ns
tSU(O) Setup time DA- DD to COAti 20 9 ns
tSU(EL) Setup time E low to T 40 24 ns
th (0) Hold time DA~Do to LOAD 5 0 ns
th(EL) Hold time E low to T 5 2 ns
trec(LOAO) Recovery time LOAD to T 20 16 ns
• MITSUBISHI
2-222 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS190P
SYNCHRONOUS PRESETTABLE UI'/DOWN DECADE COUNTER
WITH MODE CONTROL
-~-.
T
tsu (EL) th (Ell
----k!+.tP-LH
!!T"l T
UfO
Note 5. The shaded areas indicate when the input is
permitted to change for predictable output per-
TO
formance.
Note 6. The shaded area with the arrows indicate the
direction of when the input is permitted to change.
APPLICATION EXAMPLES OUTPUTS

(1) Asynchronous in counter A
20 21
100
A
22 23
101
A .
102
20 21 22 23 20 21 22 23
f
QA
+
Q8
+
Qc
I
Qo QA
1-
QB
1-
Qc •
Qo QA
t 4
QB Qc Qo
TO l - TO t- TO t-
RO ~T
~T
COUNT PULSE T M74LS190P M74LS190P M74LS190P
E
~
g
Ie
i:) DA DB Dc Dc
RC
E
~ Ie
g :a DA DB Dc Do E
~ Ie
9 :a 0" Os Dc Do
RC I>---J
~
ENABLE INPUT
LOAD INPUT
E
iJiAi'i
I PROGRAMS
r
~
PROGRAMS
I '-'----'--Y---'
PROGRAMS
TO
FOLLOWING
STAGES
UP/DOWN UfO
CONTROL INPUT
(2) Sy· nchronous 10 n counter

,-______________ OUTPUTS
~~--~A~--------------------_,
10 1 102
20
QA
21
t
QB
,
22
Qc Qo
23
t
~
.!
QA
20 . 21
QB
22
Qc
23
Qo
~
~o
QA
~'
Q8
f2
Qc
rQo
r-T
M74LS190P TO
r--- ,T M74LS190P TO
I--
r-T M74LS190P TO
r---
51,0 RO P 51,0 ROp 51'0 ROp
E 9 :a 0" DB Dc Do E g::J DA DB Dc 00 E 9 :a DA De Dc Dc
ENABLE INPUT E J '----v---'

PROGRAMS
J
%M74Lr4P
~
PROGRAMS
0' I
,I--'-~
PROGRAMS
TO
XO M74L,SOr p FOLLOWING
COUNT PULSE } STAGES
LOAO INPUT LOAD
CONTR~r/FNc;,~~ UfO
• MITSUBISHI
6.. ELECTRIC 2-223 I
MITSUBISHI LSTTLs
M74LS191P
SYNCHRONOUS PRESETTABLE UP/DOWN 4-BIT BINARY COUNTER
WITH MODE CONTROL

containing a synchronous 4-bit binary (hexadecimal)
counter function with up/down control and preset inputs.
DATA INPUT DB --+ 1 Vee
FEATURES
• Up/down switching with up/down control inputs QB~· 2 DATA INPUT
• Asynchronous preset input provided OUTPUTS {
QA+-- CLOCK INPUT
• Enable input provided
RIPPLE CLOCK
• Easy cascade connection possible ENABLE INPUT OUTPUT
• High-speed counting (fmax = 40MHz typical) UP/DOWN _ TERMINAL
CONTROL U/D--+ 5
• Wide operating temperature range (Ta= -20~+75°C) INPUT
COUNT OUTPUT
fl Qc+-- 11 +--LOAD LOAD INPUT

APPLICATION OUTPUTS
Qo+--
equipment. GND
When enable input E is low, load input LOAD is high and Outline 16P4
the count pulses are applied to clock input T, the number of
count pulses appears as 4-bit pure binary code in the
outputs OA, Os, Oc and 00 in synchronization With the High appears in the terminal count output TC during
count pulses. When the up/down control input '0/0 is made count-up while 15 2 appears in OA, Os, Oc and 00 and
low, count·up begins and when made high, count-down during count-down while 02 appears. Low appears in the
begins. Counting is performed when T changes from low to ripple clock output RC only when E and T are low and 15 2
high. appears in outputs OA, Os, Oc and 00 during count-up or
Presetting is performed regardless of the count pulses O2 appears in the outputs during count-down. E, TC and
and by applying the data to data inputs DA, Os, Dc and RC are used when cascade-connecting the counter. (Refer
Do and by setting LOAD low, the DA, Os, Dc and Do to application example.)
signals appear in outputsOA, Os, Oc and 00 irrespective E can be .changed from high to low irrespective of the
of the status of the other inputs and the counter can be status of T but when changed from low to high, T must be
preset. high. Perform the change for '0/0 when T is high.

r-------------------A~------------------ __
Os Oc Qo
TERMINAL
12 reCOUNT
OUTPUT
13 R6 ~1[6E~
OUTPUT
UP/DOWN
CONTROL D/D
INPUT
DB Dc Do GND
DA
\~----------~--------r------------------~
DATA INPUTS
• MITSUBISHI
2-224 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS191P
.SYNCHRONOUS PRESETTABLE UP/DOWN 4-BIT BINARY COUNTER
WITH MODE CONTROL
FUNCTION TABLE INoteli OPERATION TIMING DIAGRAM

LOAD E U/D T QA I QB I Qc I Qo LOAD~
L X X X I I De I Do
~: =11~~~~~~~~~~~~~~~~~
DA DB
H L L i Count-up
H L H i Count-down
H H X X Inhibit
i
o e....J.............. -- ------------------
1'-__________________ _
Note 1 f: Transition from low to high level Do

T
JTjC-=-===--==-========-====
I
X: Irrelevant
O/DIL~IJl----~----~--t-----------
E
L
TC(')
H
T
L
RC
L
E -, i II 111--4--_________
QA ---
L H H H --l I . I
QB--~""·--+-!....j~
Qe::~~1 :~-
H X X H
X L X H
Qo ---I II I I I
(1) Te is the output but the signal generated internally by --1 II . I I
the following logical expression .• TC-- I I I
TC = GA'GB 'Gc 'GD 'IU/D) ......... Count·up
TC = OA 'OB 'Gc 'G D·!iJ/D)··.· .... Count·down
PRESET COUNT·UP COUNT COUNT·DOWN

(1) (2) INHIBIT (4)
(3)
Details of timing diagram
11) Preset to 13 12) Count·up 14. 15.0,1. 2
(3) Count inhibit (4) Count-down 1,0,15.14,13
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C. unlessotherwisenoted)

Tstg Storage temperature-range -65- + 150 "C
Limits
Min Typ Max
IOH High-level output current VOH;:::'2.7V 0 -400 /-lA
VOL;;>0.4V 0 4 mA
IOL
VOL;;>0.5V 0 8 mA
• MITSUBISHI
"ELECTRIC 2-225
MITSUBISHI LSTTLs
M74LS191P
SYNCHRONOUS PRESETT~BLE UP/DOWN 4-BIT BINARY COUNTER
WITH MODE CONTROL
limits
Min Typ * Max
V,H High·level input voltage 2 V
V,L Low·level input voltage 0.8 V
V'C Input clamp voltage Vcc=4.75V,I,c=-18rnA -1.5 V
VCC=4.75V, V,=0.8V
VOH High-revel output voltage 2.7 3:4 V
V,= 2V, 10H= -400"A

VCC=4.75V I 10L= 4 rnA 0.25 0.4 V
V,=0.8V, V,= 2 V I 10L= 8 rnA 0.35 0.5 V
T, LOAD, UfD, DA-DO 20
VCC=5.25V, VI=2.7V "A
High·level E 60
I'H input current
T, LOAD, UfD, DA-Do 0.1
Vcc=5.25V, V,= 10V rnA
E 0.3
Low-level T, LOAD, UfD, DA-Do -0.4
I,L input current Vcc=5.25V, V,=0.4V rnA
E -1.2
los Short-circuit output current (Note 2l Vcc=5.25V, VO= OV -20 -100 rnA
Icc Supply current VCC=5.25V (Note 3) 20 35 rnA
* : All typical values are at Vee = 5V, Ta = 25°C. )
Note 3. Icc is measured with all the inputs at OV.
SWITCHING CHARACTERISTICS (Vcc= 5 V, Ta=25'C, unless otherwise noted)
Ur:nits
Min Typ Max
frnax Maximum clock freqency , MHz
20 40
tPH L time. from input LOAD to outputs QA, QB, Qc, Qo 25 50 ns
tPL H Low-to-high-Ievel, high-to-Iow-Ievel output propagation 11 ns
32
time, ,from inputs OA. DB. DC. Do to outputs
tPH L QA, QB, Qc, Qo 25 40 ns
tPL H Low-to-high-Ievel, high-to-Iow-Ievel output propagation 11 20 ns
tPH L time, from input T to output RC 11 24 ns
tpH L time, from input" T to outputs QA. QS. Qa. Qo CL=15pF (Note4) 14 36 ns
tpL H Low-to-high-output, high-to-Iow-Ievel output propagation 20 42 ns
tPH L time, from input T to output TO 24 52 ns
tPH L time, from input DID to output RO 20 45 ns
tpL H Low-to-high-Ievel, high-to·low·level output propagation 15 33 ns
tPHL time, from input UIO to outrut TO 15 33 ns
tPL H Low-to-high-Ievel, high-to-low-Ievel output propagation 10 33 ns
tpH L time, from input E to output ,RO 11 33 ns
TIMING REQUIREMENTS (Vcc~5V, Ta~25·C, unlessotherw;senoted)

Limits
Min Typ Max
tW(LOAD) Load I:'OAlJ pulse width 35 10 ns
tr Clock pulse rise time , 2000 100 ns
tsu(O) Setup time DA-DO to LOAD I
20 9 ns
tSU(EL) Setup time E low to T 40 24 I ns
th (D) Hold time DA Do to LOAD 5 ns
0
th (EL) Hold time E low to T 5 2 ns
trec(LOAO) Recovery time LOA D to T 20 16 ns
• MITSUBISHI
2-226 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS191P
WITH MODE CONTROL

INPUT Vee OUTPUT
(1) The pulse generator (PG) has

T
the following characteristics: ---'I
PAR'" lMHz, tr=6ns, tf= 6ns,
tw = 500ns, Vp = 3Vp.p, Zo =
50n.
(2) CL includes probe and jig
capacitance
TIMING DIAGRAM (Reference level = 1.3V) I
T'E~ 1. OA-OO ..-l \'----

"
-,
b} U"--- LOAD
UIO
---1
D::::V\.~OU
TC
I
tpLH
\ J,
f---c--
~
tpHL
~ tsU(O) thCO) tsU(O) th(o)
tW{LOAo)
T~.--
T Note 5. The shaded areas indicate when the input is
permitted to change for predictable output per-
formance. The- shaded areas with the arrows
indicate the direction of when the input is per-
Eti! tSU(OL) th(EL)
tree mitted to change.
APPLICATION EXAMPLES OUTPUTS
(1) Asynchronous2 n --------------------2'--~2~'--2-'~~2~'------~28~~2~9--~2~1O--2~1~,-----
counter
COUNT PULSE
TO FOLLOWI NG
ENAB LE INPUT E ~__---+ +-t-__"---__________t-+-'-"..::...:."'--''-''---------+-++P~R~O~GR~A~M~S_____ STAGES
LOAD INPUT LOAO~------~-r----------------~+----------------_t------------~

UP/DOWN CONTROL
INPUT UIO
OUTPUTS
(2) Synchronous 2 n
counter 2' 2' 2' 2'
t t t t t J i ~ t t t t
QA QB Qe Qo QA QBQe Qo QA QB Qe Qo
I-- - I--
,- T M74LSI91 P TC T M74LSI91 P TC T M74LSI91P TC
~lCl ' -RO P ~ICI RC D ~ICl RC P
E :3 3DADsDcDo E :3 3'OADSDcDD E :3 =:;DADSDcDo
6'
I I I I I I I I I I I I
ENABLE INPUT E T ~~-~ ~~-~ ~~-~
PROGRAMS PROGRAMS PROGRAMS
CLOCK INPUT T
YsM74
1,04P
1
Y.M74~100P ~
TO FOLLOWING
STAGES
LOAD INPUT LOAD 1 I
UP/DOWN CONTROL 1
INPUT U/O
•. MITSUBISHI
.... ELECTRIC 2-227
MITSUBISHI LSTTLs
M74LS192P

containing a synchronous decade up/down counter func-
tion with direct reset and preset inputs.
FEATURES DATA INPUT Os ---> 1 Vee
• Special up count, down count clock inputs QS+- DATA INPUT

• Asynchronous preset input provided OUTPUTS { DIRECT
. QA+- RESET
• Direct reset input provided INPUT
• Easy cascade connection possible COUNT·DOWN
CLOCK INPUT ----BRa g2~~3f
• High-speed counting (fmax = 38MHz typical)
• Wide operating temperature range (Ta= -20-+7SoC) CLO~~UI%~·~~ T u---- ----CAO g~~~~T
APPLICATION {
Qe <- 11 +- LOAD LOAD INPUT
OUTPUTS
General purpose, for use in industrial and consumer Qo +- <-DC} DATA
equipment. +- Do . INPUTS
GND
This device comes with special count-up clock input Tu Outline 16P4
and count-down clock input T D used independently for
count-up and count-down applications. For count-up, the transition diagram with presetting to a numerical value of
number of count pulses appears as a BCD code" in outputs 10 or more.
OA, OB, Oc and OD in synchronization with the count Reset can be performed by setting the direct reset input
pulses by setting load input LOAD and To high, applying RD high which sets OA = OB = Oc = OD low irrespective of
the count pulses to T u while for count-down, LOAD and the status of the other inputs.
T u are set high and the count pulses are applied to T D. Low appears in the carry output CAO during count-up
Counting is performed when Tu or TD changes from low to when 9 appears in OA, OB, Oc and OD and when Tu is low
high. while low appears in output BROwhen 0 appears in the
Presetting is performed independently of the count pulse. outputs CAO and BRO should be connected to the next
When data are applied to data inputs DA, DB, Dc and DD stage T u and To for counter cascade connection. (Refer to
and LOAD is set low, the DA, DB, Dc and DD signals the application examples.)
appear in the OA, OB, Oc and OD outputs, respectively,
regardless of the status of the T u and T D signals, thereby
presetting the counter. Counting proceeds as per the status
BLOCK DIAGRAM
OUTPUTS
~ ______________~A~______________~~
Qe Qo Vee
COUNT-UP CLOCK INPUT Tu 5
DIRECT RESET INPUT
BORROW
COUNT-DOWN CLOCK INPUT To 4 OUTPUT
08 Dc Do GND
~------------------y-----------------~
DATA INPUTS
• MITSUBISHI
2-228 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS192P
FUNCTION TABLE (Note 1) STATE DIAGRAM

Ro LOAD Tu To OA Os Oe 00 CAO BRO
H X X X L L L L H H*
L L X X DA Os De Do H* H*
L H H H Inhibit H* H*
L H 1 H Count-up H* H*
L H H 1 Count-down H* H*
Note 1. Transition from low to high
* Normally high but low appears in accordance
with the following logical expressions:
CAO = 9,.;:,.00·1'),'····· .. ·· .. · ··· ...... Count·up
BRO=QA-QS'OC·QD·To ·······Count·down
X: Irrelevant
- - COUNT·UP
---- COUNT·DOWN
_______________________________________
Ro---fl~
,
LOAD I u
DA-.J
DB
! ! ~_:-:-:-=-=-=-:--=--=--=--=--_-____---=-.:==========-=
,'--'-;---;-1-;1. --------------
-II r:.-=--=--:..-_-_-_-_-=--.:-..::: :::.=:::::::::.=::::.:.-:
DC -.Jr---;--+l-i~---------------------------
~ I ~---------------------------
I -i1
--'-..---4- --------------------------
I 1
Tu I I ,
To
QA
Os
'I '
=-~r----'---I-i...----....J
1
I ri
I
'I 'r-+--+--. I ,
Qc==t1-J ~----------r:~----------~~
'I I I I
Oo=~ I : 1 L+-
I I U I I
I I : I
)1 ! I , I U I Details of timing diagram
(11 Reset
I~~---'-::-::---':---12.1
(2) Preset to 7
(31 Count·up 8, 9, 0,1,2
W W /-E---'-I--=--------:C---l
E
7.1
(4) Count-down 1,0,9,8,7
RESET PRESET COUNT·UP COUNT·DOWN
(1) (2) (3) (4)
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75°C. unless otherwise noted)

V, I nput voltage -0.5- +15 V
Va Output voltage High-level state -0,5- Vee V
Tstg Storage temperature range -65 - + 150 ·C
• MITSUBISHI
;"ELECTRIC 2-229
MITSUBISHI LSTTLs
M74LS192P
SYNCHRONOUS PRESETTABLE UP/DOWN DECADE COUNT.ER
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S"C" unressotherwise noted)
Limits
Min Typ Max
Vee Supply voltage 4.7S S S .2S V
10H High-level output current VOH;;'2.7V 0 -400 J.lA

VOL:::;0.4V 0 4 rnA
VOL:::; 0 .SV 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta =...,20- +7S"C. unless otherwise noted)
Limits
Min Typ * Max
VrH High·level input voltage 2 V
VrL Low-level input voltage 0.8 V
V'C Input clamp voltage Vee=4. 7SV. I rc= -18mA -1.5 V
VcC=4. 7SV. Vr=0.8V
Vr=2V. 10H= -400J.lA
Low-level output voltage

VCC=4.7SV I IOL=4mA o.2S 0.4 V
VOL
Vr=0.8V. Vr=2V J IOL=8mA 0.35 O. S V
Vcc=S.2SV. Vr=2.7V 20 J.lA
IrH High·level input current
Vcc=S.2SV. Vr=10V 0.1 rnA
IrL Low-level input current VCC=S.2SV. Vr=0.4V -0.4 rnA
los Short-circuit output current (Note 2) VCC= S.2SV. Vo=OV -20 -100 rnA
Icc Supply current Vec= S .2SV INote 31 19 34 rnA
* All typical values are at Vee = 5V, Ta = 25°C.
Note 3. Icc is measured with Ro and LOAD at OV and T u • TO, DA -Do at 4.5V
SW1TCHING CHARACTERISTICS (Vcc=SV. Ta=2S"C, unressotherwisenoted)
Limits
Symbol . Parameter Test conditions Unit
Min Typ Max
f max Maximum clock frequency 2S 38 MHz
tf'HL time, from input Tuto output CAO . 14 24 ns
tpLH Low-to-high-Ievel, high-to-Iow-level output propagation 7 24 ns
tpHL time, from input To to output BRO 24
19 ns
CL=lSpF INote41
time, from input TU. To to outputs
tpHL QA. QS. QC. Qo , 17 47 ns
tpHL time, from input LOADto outputs QA. QS. QC. Qo 20 40 ns
tpHL 12 3S ns
from input Roto outputs QA. QS. QC. Qo
INPUT Vee OUTPUT
PG OUT
PRR = lMHz, tr = 6ns, tf = 6ns. tw = 500ns,
SOQ Vp = 3Vp.p, Zo = 50fl.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS192P
TIMING REQUIREMENTS (Voo=SV. Ta=2S'C. unless otherwise noted)
Limits
Min Typ Max
tw(Tu L ) Clock input T u low pulse width 20 14 ns
---.!.W(ToL) Clock input To low pulse width 20 18 ns
tW(LOAO) Load LOAD pulse width 20 11 ns
tW(R o ) Direct reset R 0 pulse width 20 4 ns
tsu (D) Setup time DA-DD to LOAD 20 4 ns
th (D) Hold time DA-DD to LOAD 5 -3 ns

tW(T". To. L)
Tu. To
tW(TIiAll) \'--'-----
QA, QS. QC. Qo
tW(Ro)
Ro
QA.QS.QC.Qo
~:::O"~~
lsu(o) th(O) tsu(D) th(D)
Note 5. The shaded areas indicate when the input is permitted to change for predictable output performance.
APPLICATION EXAMPLE
Asynchronous 10 n counter
OUTPUTS
~ __________________ ~A~ ________________________
1 100
10 1 102
_ _ _ _~A~_ _~
~
~
~
20 2' 22 23 20 2' 22 23
COUNT-UP
COUNT-DOWN
TO FOLLOWING
STAGES
DIRECTRESET~----~~----------------~~r------------------+-T--------------~
LOAD~------~------------------~------------------~--------------~
• MITSUBISHI
;"ELECTRIC 2-231
MITSUBISHI LSTTLs
M74LS193P
SYNCHRONOUS PRESETTABLE UP/DOWN 4·BIT BINARY COUNTER

containing a synchronous hexadecimal (4-bit binary) up/
down counter with direct reset and preset. DATA INPUT Ds --+ 1 Vee
2 DATA INPUT
FEATURES QS""-
OUTPUTS {
• Special clock for up count, down count QA <-
DIRECT
RESET INPUT
• Asynchronous preset input provided
~~~~-PNOp~~ TD --+ 4 --+ BRO g~~~8i'
• Cascade connection easily made CLO~~UI~t~~ Tu--+ --+ CAO g~~~JT
• High-speed counting (f max =3BMHz typical)
Qe<- 11 <- LOAD LOAD INPUT
• Wide operating temperature range (T a=-20-+ 75°C) OUTPUTS {
QD <-
<-De}
DATA INPUTS
APPLICATION GND .-DD
equipment.
Outline 16P4
This device comes with special count-up clock input T u
and count-down clock input To used independently for appear in the OA, Os, Oc, and 0 0 outputs, respectively,
count-up and count-down applications. For count-up, the regardless of the status of the T u and To signals, thereby
count pulse number appears as a 4-bit pure binary code in presetting the counter.
outputs OA' Os, Oc and 0 0 in synchronization with the Reset can be performed by setting the direct reset input
count pulses by setting load input LOAD and Toto high, RD high which sets 0A = Os = Oc = 0 0 low irrespective of
applying the count pulses to T u while for count-down, the status of the other inputs.
LOAD and T u are set "high and the count pulses are applied Low appears is the carry output CAO during count-up
to To. Counting is performed when T u or To changes when 15 appears in 0A, OS, 0c and 0 0 and when T u is
from low to high. low, while Ibw appears in output BRO when 0 appears in
Presetting is performed regardlessly of the count pulse. the outputs and when To is low. CAO and BRO should be
When data are applied to data inputs DA, Ds , Dc and Do connected to T u and To of the next stage for cascade
and LOAD is set low, the DA , Ds , Dc and Do signals connection. (Refer to the application example.)

~ __________ ~ ____~A ________________ ~
Qe QD Vee
COUNT-UP
CLOCK INPUT
DI RECT RESET
LOAD INPUT LOAD

COUNT-DOWN
CLOCK
DA DB De DD GND
~------------~y,.----------------~
DATA INPUTS
.• MITSUBISHI
MITSUBISHI LSTTLs
M74LS193P
RO LOADi Tu To QA Qs Qc Qo CAD BRO

H X X X L L L L H H*
L L X X: DA Ds Dc Do H* H*
L H H H Inhibit H* H*
L H I H Count-up H* H*
L H H I Count-down H* H*
N o t e l : Transition from low to high
* : Normally high but low appears in accordance with the following
CAD = 0A' Os' Oc' 00' T u . . Count-up
BRO = QA' Os' Qc' Go' To·········· Count-down
X : Irrelevant
Ro---Fl~
LOAD
,, _________________________________________
" U
DA~ I I ""-!',---;'--';.....;i ------------ ------- ------
I I ~-------------------------
Os " r---------------------------
De -~~,=~=:::~~!=
---l ,I :::==--=--=---~-=--~=-=--=-==========-=-
I~--------------------------
DO..J ,
I
Tu
To
~- I I
Qs =-, I
I
I
I I
I
'------'
...-------.LL-
I
I
Qe =- ~i-t-I- - ; - - -
I I I '--____- ;__-;-____---J
I
I
Qo =~ I ...------+1--
, I
" I I I
CAO I I I I U I Details of timing diagram
II I I I (1) Reset
BRO I I " U ,
~ tj 14 15 2.1 0 15 14 1: I (2) Preset to 13
(3) Count-up 14, 15, 0.1,2
RESET PRESET COUNT-UP COUNT-DOWN
(4) Count-down 1,0,15,14,13
(1) (2) (3) (4)

• MITSUBISHI
"'ELECTRIC 2-233
MITSUBISHI LSTTLs
M74LS193P
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S·C. unless otherwise noted)
Limits
Min Typ Max
10H ~igh.level output current VOH~2. 7V 0 -400 jJA
VOL'" 0 .4V 0 4 mA
VOL"'O.SV 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20- +7S·C. unlessotherwisenoted)
Limits
Min Typ * Max
VIC Input clamp voltage VCC=4. 7SV. IIC= -18mA -1.5 V
VCc=4.7SV. VI~0.8V
VOH High-level output,voltage 2.7 3.4 V
VI~2V. 10H= -4OO.uA

VCC-4.7SV I IOL-4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
Vcc-S.2SV. VI-2.7V 20 .u A
Vcc=S.2SV. VI=10V 0.1 mA
IlL Low-level input current VCC~S.2SV. VI=0.4V 0.4 mA
los Short-circuit output current (Note 2) Vcc=S.2SV. VO=OV -20 -.100 mA
Icc Supply current Vcc=S.2SV INote 3) 19 34 mA
* All typical values are at Vcc= 5V. T a= 25°C,
Note 3: Icc is measured with Ro and LOAD at OV and T u, To, DA -Do at 4.5V
SWITCHING CHARACTERISTICS (Vcc=SV. T a =25·C. unless otherwise noted)
Limits
Min Typ Max
tpHL time, from input TU to output CAO
14 24 ns
tpHL time"from input TO to output BRO
19 24 ns
CL= lSpF INote 41
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propag?tion 20 38 ns
tpHL time, from inputsTu. To to outputs QA. Qs. Qc. Qo 17 47 ns
tpHL time. from input LOAD to outputs QA. QS. QC: Qo 20 40 ns
tpHL 12 35 ns
Ro to outputs QA. Qs. Qc. Qo
INPUT Vee OUTPUT
PG OUT
(1) The pulse generator (PG) ,has the following characteristics:
PRR= 1MHz, tr=6ns, tf=6ns, t w =500ns, Vp= 3Vp.p, Zo=50n.
SOQ (2) CL includes probe and jig capacitance
• MITSUBIS.HI
2-234 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS193P
TIMING REQUIREMENTS (Vcc=SV. Ta=2S·C. unless otherwise noted).
limits
Min Typ Max
twCTuL) Clock input T u low pulse width 20 14 ns

tW(TDL) Clock input To low pulse width 20 18 ns
tw (LOAD) Load LOAD pulse width 20 11 ns
tW(R o ) Direct reset R 0 pulse width 20 4 ns
tsU(D) Setup time OA-OD to LOAD 20 4 ns
th (D) Hold time DA- Do to LOAD 5 -3 ns
Tu. To \'-----
QA. Qa. QC. Qo
QA. Qa. Qc. Qo
Tu. TD
CAO. BRO
1 ------k-'
I~
~. 1PLH
Ro
Note 5; The shaded areas indicate when the input is permitted to change for predictable output performance.·
APPLICATION EXAMPLE
Asynchronous 2 n counter
OUTPUTS
r~--------------------------~A~--------------------------~~
20 2t 22 23 2- 25 26 27 28 292 '0 211
l:g"~,,,
COUNT-UP
COUNT-DOWN To To To
AD LOAD AD LOAD AD LOAD
OIRECT RESET
LOAD
~ ____ ~~ ~_PR_~_G_R_A_M
___ ________ ~-+___~_R_~_G_R_A_M ________-+-4____ ~_RO_G_R_A_M
______ ~J , ""
• MITSUBISHI
"ELECTRIC 2-235
MITSUBISHI i.STTLs
M74LS194AP
4·BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH RESET
DESCRIPTION
with a 4-bit bidirectional serial/parallel input-serial/parallel
output shift register functions.
DIRECT RESET
INPUT Vee
FEATURES
• Synchronous serial/parallel input-serial/parallel/output
• Right shift and left shift functions
• Mode control input provided , {DO -+ 3
• Direct reset input provided 0, -+
PARALLEL
• Hold mode function DATA INPUTS 02-+
• Wide operating temperature range (Ta= -20-+75°C)
03 -+ 11 +- T CLOCK INPUT
APPLICATION
10 +- M/G 2 } MODE
General purpose, for use in industrial and consumer CONTROL
equipment. GNO 9 +- MIG, INPUTS
l..--_ _- - l
This device is usable as a serial input-serial/parallel output Outline 16P4
and parallel input-serial/parallel output shift register with
the modes control inputs M/C! and M/C2 • When M/G! is
kept in high and M/G 2 in low, the serial data are applied to pulse is applied to the clock input T_
right shift data input Ds R and the clock pulse is applied to When T changes from low to high, the right shift, left
clock input T, the serial data are shifted sequentially to shift or parallel data are read in_ 0 0 -03 are set low by
outputs 0 0 -03 in synchronization with the .clock puise. setting direct ·reset input Ro low irrespective of the status
When M/G! is kept in low and M/G 2 in high the serial data of the other input signals.
are applied to left shift data input DSL and clock pulse is
applied to clock input T. the serial data are shifted
sequentially in synchronization with the clock pulse. The
Do -D 3 signal appears in 0 0 -0 3 by keeping M/G! and
M/G2 in high, applying the parallel data to parallel data
inputs Do-D 3 and applying a 1-bit clock pulse to clock
input T. When both M/G! and M/C 2 are kept in low, the
status of the flip-flops does not change even if the clock

r~Q-o--------~Q-,--_A_----Q-2----------Q~~
CLOCK INPUT
DIRECT RESET
INPUT
RIGHT SHIFT LEFT SHIFT

DATA INPUT DATA INPUTS
MODE CONTROL J MIG, 9

INPUTS l M/G 2
\. Do 0, O2 03 GNO
~~--------~--~v~----~--------~
PARALLEL DATA INPUT
• MITSUBISHI
2-236 ..... EI.ECTRIC
MITSUBISHI LSTTLs
M74LS194AP
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH RESET
FUNCTION TABLE INotel)
Operational mode RD M/Gt M/GZ T DSR DSL 00- 0 3 Qo Qt Qz Q3

Direct reset L X X X X X X L L L L
Right shift
H H L t L X X L QOO QtO QZO
H H L t H X X H Qoo Q,o Qzo
Left shift
H L H t X L X Q,o Qzo Q30 L
H L H t X H X Q,o Qzo Q30 H
Parallel read H H H t X X 00-03 Do Dt Dz 03
Clock inhibit H L L X X X X QoO Q,O Q20 Q30
Note 1. i : Transition from low to high (positive edge trigger)

QO : Level of Q before the indicated steady-state input conditions were established
X : Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+7S"C, unless otherwise noted)

RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S"C, unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH"62.7V 0 -400 /.'A

VOL:£0.4V 0 4 rnA
IOL LOW-level output current
VOL:£0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7S"C, unless otherwise noted)
Limits
Min Typ * Max

VIC Input clamp voltage Vee=4.7SV.IIC=-18rnA -1.5 V
Vee=4.75V, V, =O.8V
VI '=2V. 10H= -400/.'A

Vec=4.7SV I IOL=4rnA 0.25 0.4 V
VI =0.8V, VI =2V I IOL=8rnA 0.35 0.5 V
Vce=5.2SV, VI =2. 7V 20 /.'A
IlL Low-level input current Vee=5.25V. VI =0.4V -0.4 mA
loS Short-circuit output current (Note 2) Vee=S.25V. VO= 0 V -20 -100 rnA
ICC Supply current Vee=S.25V INote 3) 15 23 rnA
Note 2: All measurements mus.t be done quickly and not more than one output should be shorted at a time.
Note 3: Ice is measured after 0 0 ....-'0 3 have been set to av, 0SR. OSL, M/C 1 • M/C 2 and RD to 4.5V and T to 4.5V from av.
• MITSUBISHI
"ELECTRIC 2-237
MITSUBISHI LSTTLs
M74LS194AP
4·BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH RESET
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25"C, unless otherwise noted)
limits
Min Typ. Max
tPLH Low-to-high-level. high-to-Iow-Ievel output ipropagation 10 22 ns
tPHL time, from input T to outputs 00 -03 CL= 15pF INote 41 12 26 ns
tPHL S 30 ns
from input An to outputs Qo - Q3
Note 4: Measurement circu it
INPUT Vee OUTPUT
(1) The pulse generator (PG) has the following characteristics':

PRR = 1MHz, t, = 6ns, tf = 6ns,ty, = 500ns,
Vp = 3Vp.p, Zo = 50n.
TIMING REQUIREMENTS (Vcc=5V, Ta=2S'C, unlessotherwisenoted)
Limits
Min Typ Max
tW(T) Clock input T high pulse width 20 S ns
tW(Ro) Direct reset input Ro pulse width 20 6 ns
tsu (D) Setup time 0, to T 20 7 ns
tsu (MIC) Setup time M/C" M/Cz to T 30 12 ns
th (D) Hold time 0 to T 0 -3 ns
th (MIC) HoldtimeM/C" M/CztoT a -6 ns
trec(Rn) Recovery time to direct reset 25 3 ns

~ V
T RD
\
tW(Ri)) treo(Ri))
T ~
tPHL
\
\
\.._--------- ,
\ - ----- ----
M/C1.M/czM\\\\\O\\\\\\\\~
t 5U(M/C) t 5U(M/C)
th (M/C)
T Note 5: The shaded areas indicate when the input is permitted to

change for predictable output performance. The broken
liners for M/C, and M/C 2 indicate three timings for left
\~----II
shifting. Setup time DSR is for 0 0 only; setup time DSL
00-03 \\----.Jr is for 0 3 only
• MITSUBISHI
2-238 "ELECTRIC
MITSUBISHI LSTTLs
M74LS195AP
4-BIT PARALLEL-ACCESS SHIFT REGISTER WITH RESET
DESCRIPTION
shift register function with a direct reset input_
DIRECT ~~~~i RD---. 1 Vee
FEATURES
• Synchronous serial/parallel input-serial/parallel output SERIAL DATA { J ---. 2
INPUTS _
• Right shift function K---.
• Left shift function available with external connection 00 ---. 4 OUTPUTS

• Mode control input provided
• Serial inputs J and K provided
• 0 3 and 0 3 outputs provided
PARALLEL
DATA
INPUTS
1 0,'"
02'"
• Wide operating temperat~re range (Ta= -20~+75°C) 03 ---. +- T CLOCK INPUT

MODE
GND 9 +- M/GCONTROL
APPLICATION '--_--:._---1 INPUT
equipment.
Outline 16P4
This device can be used as a serial input-serial/parallel
output and parallel input-serial/parallel output shift register The last stage flip-flop output has mutually complementary
with the mode control input M/C signal. When M/C is kept outputs 0 3 and 0 3 . OO~03 are reset low and 0 3 high by
in high, the serial data are applied to serial data inputs J and setting direct reset input RD low irrespective of all the
K and the clock pulse is applied to clock input T, the serial other input signals.
data are shifted sequentially into outputs OO~03 i'n
synchronization with the clock pUlse. The first stage
flip-flop with J and R functions as a J-K flip-flop. When
serial data are applied from line 1, J and R are mutually
connected and used as serial input pins. When M/C is kept
in low, the parallel data are applied to parallel data inputs
Do~D3 and a l-bit clock pulse is applied to T, the Do~D3
signals appears in OO~03. When T changes from low to
high, the shift or parallel reading operation is performed.
BLOCK DIAGRAM OUT~~UT_S~~~~~~~~~~_

Qo
DIRECT RESETRQ 1
INPUT
MODE
CONTROL M/G 9~{>~-1>-~-1~~~====j-~~t----------+tt--------~
INPUT '
~-------\2
J K Do 02 GND
~'~-----------------~r------------------~
SERIAL DATA INPUTS PARALLEL DATA INPUTS
• MITSUBISHI
.... ELECTRIC 2-239
MITSUBISHI LSTTLs
M74LS19SAP
4-BIT PARALLEL-ACCESS SHIFT REGISTER WITH RESET
Operational mode T RD MIG J K 00- 0 3 Qa· Q, Q2 Q3 Q3

Direct reset X L X X X X L L L L H
i H H H H X H QOO Q,o Q2 0 Q2 0
i H H L L X L QOO Q,O Q2 0 Q2 0
Right shift
i H H H L X Qoo QOO Q,O Q2 0 Q2D
i H H L H X QOD QOD Q,D Q2 0 Q2D
Parallel read i H L X X 00- 0 3 Do 0, 02 03 03
Note 1. i : Transition from low to high (positive edge triggering)

QO: Level of Q before the indicated steady-state input conditions were established
X : Irrelevant
Vee Supply voltage -0.5-'+7 V
Va Output voltage High-level output -0.5- Vee V

Tstg Storage temperature range -65- -'-150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75'C, unlessotherwisenoted)
Limits
Min Typ Max
10H High-level output current VOH~2. 7V 0 -400 /-lA
VOL";;; 0 .4V 0 4 rnA
VOL";;; 0 .5V 0 8 rnA
ElECTR ICAl CHARACTER ISTICS (T a = - 20 - + 75'C, unless otherwise noted)
limits
Min Typ* Max
VIH High·level input voltage 2 V
VIL Low·level input voltage 0.8 \!
VIC Input clamp voltage Vee=4.75V,lle=-18rnA -1.5 V
Vee=4.75V. VI=0.8V
VI=2V. IOH= -400/-lA

Vec=4.75V I IOL=4rnA 0.25 0.4 V
VI=0.8V, VI=2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V. VI-2.7V 20 /-lA
Vee=5.25V. VI=10V 0.1 rnA
IlL Low-level input current Vee=5.25V. VI=O.4V -0.4 rnA
los Short-circuit output current (Note 21 Vec=5.25V. Vo=OV -20 -100 rnA
Icc Supply current Vee=5.25V INote 3) 14 21 rnA
* : All typical values are at Vcc=5V. Ta=25°C.
Note 3: ICC is measured with M/C at OV, J, K and 0 0 ...... 0 3 at 4.5V, with RO
kept at 4.5V after changing from OV and after changing T from OV to 4.5V.
• MITSUBISHI
2-240 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS195AP
4.BIT PARALLEL·ACCESS SHIFT REGISTER WITH RESET
SWITCHING CHARACTERISTICS (VCc=SV. T a =2S·C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-row-Ievel output propagation 12 22 ns
tpHL time, from input T to outputs 00 - Q3. OJ 12 26 ns
GL=1SpF (Note4)
tpHL 14 30 ns
from input AD to ou,tput 00 - 03
Low-to-high-Ievel output propagation time,
tpLH 12 30 ns
from input Rota output OJ
INPUT Vee OUTPUT
(1) ,The pulse generator has the following characteristics:

PG OUT
PRR"" 1 MHz, tr '" 6ns, 1f = 6ns, tw = 500n5,
Vp =3Vp.p. Zo = 50n.
SOQ (2) CL includes probe and jig capacitance.
TIMING REQUIREMENTS (VCc=SV. Ta=2S'C, unless otherwise noted)
Limits
Min Typ Max
tW(T) Clock input T high pulse width 16 10 ns
tW(Ro) Direct reset AD pulse width 12 6 ns
tsu (0) Setup time input data to T 1S 3 ns
tSU(MIC) Setup time MIG to T 25 10 ns
th(D) Hold time input data to T 3 -1 ns
th (M/C) MIG hold time to T 0 ~7 ns
trec(Ro) Direct reset recovery time to T 2S 5 ns
treC(RO)
tSU(M/C) th(M/c)
M/C
Note 5: The shaded areas indicate when the input is permitted to

change for predictable output performance.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS196P
PRESETTABLE DECADE COUNTER/LATCH

direct reset input and preset input.
LOAD INPUT LOAD --+ 1 Vee

FEATURES
DIRECT
• Direct reset input and asynchronous preset input pro· OUTPUT Oe.... 2 .... AD RESET
INPUT
vided
• Usable independently as binary and divide-by-five coun-
ter
DATA INPUTS jOe --+
DA --+
3 --+ 00 OUTPUT
11 .... Do)
• High-speed counting (f max = 80MHz typical) ' DATA INPUTS
.... Os /
• Wide operating temperature range (Ta= -20~+75°C) OUTPUT
CLOCK INPUT OUTPUT

APPLICATION
GND CLOCK INPUT
equipment.
This device is composed of independent binary and Outline 14P4
divide-by-5 counters. Clock input T 1 and output OA are
employed for usea~ a binary counter while clock input T2
and Os, Qe and OD are employed for use as a divide·by-5 STATE DIAGRAM
counter. When employed as a decade counter, OA an'd T2
are connected and by making Tl the input, the count
number as a BCD code appears in outputs OA, Os, Oe and
OD. Counting is performed when Tl and T2 are changed
from high to low.
The counter can be preset by applying data to data
inputs DA, Os, De and DD and by setting LOAD input
low, and the DA, Ds, De and DD signals appear in OA, Os,
Oe, OD outputs irrespective of the T 1 and T2 inputs. When
preset to a numerical value of 10 or above, the count
proceeds in accordance with the status transition figure.
BLocK DIAGRAM
OUTPUTS
Os Oe 00
CLOCK INPUT
LOAD INPUT
DIRECT ~~~Gi Ro
DA Os Dc Do GND
~------~--~-----~----------------
DATA INPUTS
• MITSUBISHI
2-242 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS196P
For resetting, it is possible to set QA = Qs = Qc = QD =

low by setting direct reset input RD low irrespective of Count
number QA Qs Qe Qo
the status of the other inputs. 0 L L L L
1 H L L L
2 L H L L
T Ro LOAD QA Qs Qe Qo 3 H H L L
X L X L L L L 4 L L H L
X H L DA Ds DC Do 5 H L H L
! H H Count
6 L H H L
Note 1 !: Transition from high to low (negative edge trigger) 7 H H H L
X : Irrelevant
B L L L H
9 H L L H
ABSOLUTE MAXIMUM RATINGS -
(1) Valid when QA andT;' are connected and T I is made the input
(T a = - 20- + 75"C, unless otherwise noted)

Inputs Tl, T2 -0.5-+5.5
VI Input voltage V
Inputs LOAD, Ro, DA-Do -0.5-+15
RECOMMENDED OPERATING CONDITIONS (TF -20- +75"C, unless otherwise noted)
Limits
Min Typ Max
10H High·level output current VOH"'2.7V 0 -400 I,A
VOL;i;0.4V 0 4 mA
VOL;i; 0.5V 0 B mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+,15"C, unless otherwise noted)
Limits
Symbol Parameter Test condtions Unit
Min Typ * Max

VIC Input clamp voltage Vee=4.75V,lle=-18mA - 1.5 V
Vee=4.75V, VI=O.BV
VI= 2V, IOH=-400"A

Vee=4.75V L IOL = 4 mA 0.25 0.4 V
VI=O.BV, VI= 2 V I 10L= B mA 0.35 0.5. V
LOAD, DA, Os, Dc, Do 20
Tl, Ro Vee=5.25V, VI=2.7V 40 "A
High-level T2 BO
IIH input current
Tl 0.2
Vee=5.25V, VI=5.5V
T2 0.4
mA
LOAD, DA, Ds,De, Do 0.1
Vee=5.25V, VI=10V
Ro 0.2
LOAD, DA, DB, Dc, Do -0.4
LOW-level Ro -O.B
IlL input current Vee=5.25V, VI=0.4V mA
T, -2.4
T2 -2.B
los Short-circuit output current (Note 2) Vee=5.25V, VO=OV -20 -100 mA
Icc Supply current Vee=5.25V (Note 31 16 27 mA
* All typical values are at Vec = 5V, Ta = 25°C.
Note 3: Iccis measured with all inputs at.oV.
• MITSUBISHI
.... ELECTRIC 2-243
MITSUBISHI LSTTLs
M74LS196P
SWITCHING CHARACTERISTICS (Vcc= 5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
Maximum clock frequency.

f max 30 80 MHz
from input"'i1 to output 0,4

f max 25 MHz
from input 12 to output as
tPLH Low-to-high-Ievel, high-to-Iow-Ievel output 9 15 ns
tpHL propagation time from input 11
to output QA 8 20 ns
tpLH Low-to-high-Ievei, high-to-Iow:!!vel output 10 24 ns
propagation time. from input Tz to outputQs 10 33 ns
tpHL
to output Qc 17 62 ns
OL=15pF (Note 4)
tpLH Low-to-high-Ievel, tiigh-to-Iow~el output 10 18 ns
tpHL propagation time, from input T 2 to output Qo 9 45 ns
propagation time. from inputs OA. Os. DC. Dc
tpHL to mltput, QA, QB, Qc, Qo ,11 44 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel outout 14 41 ns
propagation time, from input input LOAD to outputs
tpHL QA, QB,QC,QO 10 45 ns
tpHL 14 51 ns
from input ADto outputs QA, QB, Qc, Qo

INPUT Vee OUTPUT,
(1) The pulse generator IPG) has the foflowing characteristics:

PRR = lMHz, t, = 6n" tf =6ns, tw =SOOn"
Vp = 3Vp_p, Zo = 500_
(21 CL includes probe and jig capacitance
TIMING REQUIREMENTS (Vcc= 5V, Ta=25'C, unlessotherwi,enoted)
. Limits
Symbol' Parameter Test conditions Unit
Min Typ Max
twCriH) Clock input T 1 high pulse width 20 5 ns
tweT,H) Clock input T2 high pulse width 30 17 ns
tW(LOAD) Load LOAD input pulse width 20 8 ns
tW(RD) Direct reset AD pulse width 15 4 ns
tSU(DL) Setup time DA-Dolow to LOAD 15 3 ns
tSU(OH) Setup time DA-Do high to LOAD 10 0 ns
theDL) Hold time DA-Dolowto LOAD 6 0 ns
th(DH) Hold time DA-Dohigh to,LOAD 3 -1 ns
treceLOAD) _Recovery time LOAD to T 30 7 ns
treC(Ro) Recovery ti~e RDtoT '30 7 ns

t W(T1.T2H)
DA,DB,Dc,DD
QA,QB,QC,QD
, • ' MITSUBISHI
2-244 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS196P
~ \
DA,DB,DC,DD RO, LOAD
tree
LOAD
S"~') ~
Ti,12
Q-
QA,QB,QC,QO QA,QB,QC,QO
tPL
DA,DB,DC,DO
Note 5: The shaded areas indicate when the input is permitted

to change for predictable output performance.
(1) Divide-by-10" presettable counter
10° OUTPUTS 10' OUTPUTS 10"OUTPUTS

,----------A--- ,----------A--- ,..---------A--
COUNT INPUT . , > - - - j - d T,
'----y-----' '---v----' '---y------'

10° DATA INPUTS 10'OATA INPUTS 10" DATA INPUTS
01 RECT RESET
INPUT
LOAD INPUT
The above counter can be configured by connecting n + 1 changes with respect to the input is delayed in accordance with the
M74LS196P devices. It operates at a high speed i60MHz typicall following formula.
but since the system is synch~onous, the time during which the output
The delay time (typical) of each output at the Mth stage is:
QA 20 (M-l)+ 8 ns Qc 20 (M-1)+31 ns
QB 20 (M-l) +17 ns Qo 20 (M-1)+20 ns
(2) Use as a latch
01 RECT RESET
INPUT
DATA INPUT
ENABLE INPUT
I I
I i
DIRECT ~~;~+ ; .--____ ....J
OUTPUT --1+-,-;----+-,11
_ r-LJ
I I
ENABLE INPUT .......- - - - - - - '
'-y---'
DATA INPUTS
o
RESET
ENABLE LATCH
• MITSUBISHI
.... ELECTRIC 2-245
MITSUBISHI LSTTLs
M74LS197P
PRESETTABLE 4-BIT BINARY COUNTER/LATCH
DESCRIPTION
containing an asynchronous hexadecimal (4-bit binary)
counter function with direct reset and preset inputs_
FEATURES Vee
LOAD INPUT LOAD -+ 1
• Direct reset input and asychronous preset input provided
• Usable independently as binary and octal counter OUTPUT Qc .... .... AD P~~0V RESET
• High-speed counting (fm ax= BOMHz typical) -+ Qo OUTPUT

• Wide operating temperature range (Ta= -20~+75°C) DATA INPUTS {DC-
DA -+
.... DO}
DATA INPUTS
OUTPUT QA 4- .... DB
APPLICATION
General purpose, for use in industrial and consumer CLOCK INPUT 12--.. - QB
OUTPUT
equipment_ GND 4-T, CLOCK INPUT
This device is composed of -independent binary and octal
counters. Clock input T 1 and output OA are employed for Outline 14P4
use as a binary counter while clock input T2 and Os, Oc
and 00 are employed for use as an octal counter. When
employed as a hexadecimal counter, OA and T2 are
connected and by making Tl the input, the count number
as a 4-bitpure binary code appears in outputs OA, Os, Oc
and 00. Counting is performed when T 1 and T2 are
changed from high to low.
The counter can be preset by applying data to data
inputs DA, Ds, Dc and Do and by setting LOAD input
low, and the DA, Ds,Dc and Do signals appear in OA, Os,
Oe,Oo outputs irrespective of the Tl and T z inputs.
For resetting, it is possible to set OA = Os = Oc = 00 =
low by setting direct reset input R 0 low irrespective of the
status of the other inputs.
BLOCK DIAGRAM
OUTP_U_~~__7QC____________Q_D
QB
CLOCK INPUT
CLOCK INPUT
LOAD INPUT
DIRECT RESET INPUT RD
.~D_A___________D_B____________D_C__________~DO GND
DATA INPUTS
• MITSUBISHI
2-246 . . . . ELECTRIC
MITSUBISHI LSTTLs
M74LS197P
T Ro LOAD QA QB Qe Qo Count number QA QB Qe Qo

X L X L L L L 0 L L L L
X H L DA DB De Do 1 H L L L
t H H Count 2 L H L L
Note 1 Transition from high to low (negative trigger) 3 H H L L
X Irrelevant 4 L L H L
5 H L H L
6 L H H L
7 H H H L
8 L L L H
9 H L L H
10 L H L H
11 H H L H
12 L L H H
.13 H L H H
14 L H H H
15 H H H H
(1) Valid when OA and -T2 are connected and T1 is made the input

InputsTt. T2 -0.5-+5.5
V, Input voltage V
Inputs LOAD. RD. DA-DO -0.5-+15
Limits
Min Typ Max
IOH High-level output current VOH"'2.7V 0 -400 I,A

VOL-O;O.4V 0 4 mA
VOL-O;O.5V 0 8 mA
• MITSUBISHI
.... ELECTRIC 2-247
MITSUBISHI LSTTLs
M74LS197P
limits
Min Typ * Max
VIC Input clamp voltage Vcc=4.75V.llc=-18rnA -1.5 V
Vcc=4.75V. VI=0.8V
VOH High:levet output voltage 2.7 3.4 V
VI= 2V. 10H= -400,uA

Vcc=4.75V I 10L= 4 rnA 0.25 0.4 V
VI=0.8V. VI= 2 V I 10L= 8 rnA 0.35 0.5 V
LOAD. DA. DB. DC. Do 20
VCC=5.25V. VI=2.7V ,uA
RO.Tl.T2 40
High·level Vcc=5.25V. VI=5.5V
IIH Tl. T2 0.2
input current
LOAD. DA. DB. DC. Do 0.1 rnA
Vcc=5.25V. VI= 10V
Ro 0.2
LOAD. DA. DB. Dc. Do -0.4
Low-level Ro Vcc=5.25V. VI=0.4V -0.8
IlL rnA
input current Tl -2.4
T2 -1.3
los Short-circuit output current (note 2) VCC=5.25V. VO= 0 V -20 -100 rnA
Icc Supply current Vcc=5.25V (Note 3) 16 27 rnA
Note 3: IcC is measured with all inputs at OV.
SWITCHING CHARACTERISTICS (Vcc= 5V. Ta=25'C. unless otherwise noted)
Limits
Symbol Parameter Test conditons Unit
Min Typ Max
frnax Maximum clock freQuency(T 1) 30 80 MHz
frnax Maximum clock frequ8.ncy (T2) 35 MHz
tPHL propagation time, from input 11 to output QA 7 21 ns
tPLH Low-to-high-level, high-to-low-Ievel output 8 19 ns
tPHL propagation time, from input 12
to output Qa 8 35 ns
tPLH Low-to-high-Ievel, high-to-low-level output 15 51 ns
CL=15pF INote41
tPHL propagation time, from input 12 to output Qc 15 63 ns
tPHL propagation time, from input 12
to output QD 24 95 ns
tPLH Low-to-high-Ievel, high-to-low-Ievel output 8 27 ns
propagation time, from inputs DA. Os. Dc. 00
tPHL to outputs QA. QS. QC. Qo 10 44 ns
tPLH Low-to-high-Ievel output propagation time, from 13 39 ns
tPHL input LOAD to outputs QA. QB. Qe. Qo 10 45 ns
tPHL 13 51 ns
input Ro to outputs QA. QB. QC. Qo
INPUT Vee OUTPUT
(1) The pusle generator (PG) has the following characteristics:

PAR = lM~z, tr = 6ns, tf = 6ns, tw = 500n5,
Vp = 3Vp.p. Zo = 50n.
• MITSUBISHI
2-248 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS197P
TIMING REQUIREMENTS (Vcc= 5 V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tW(TIH) Clock input T 1 high pulse width 20 5 ns

t'v\(TlH) Clock input T2 high pulse width 30 14 ns
tW(LOAO) Load LOAD input pulse width 20 8 ns
tW(Ro) Direct reset RD pulse width 15 4 ns
tSU(oL) Setup time DA - Do low to LOAD 15 3 ns
t SU(DH) SetuptimeDA-Dohighto LOAD 10 0 ns
t h (DL) Hold time DA-Do low to LOAD 6 0 ns
th(DH) Hold time DA-DO high to LOAD 3 -1 ns
treC(LOAD) Recovery time LOAD to T 30 7 ns
treC(Ro) Recovery time Ro.to T 30 7 ns
OA. Os. Ob. 00
\'---- treo
OA. Os. OC. 00
0.0::::' 11t\~Sl1 t
tsu(DH) th(DH) tSU(DL) th(DL)
Note 5: The shaded areas indicate when the input is
permitted to change for predictable output performance.
• MITSUBISHI
.... ELECTRIC
MITSUBISHI LSTTLs
M74LS221P
DUAL MONOSTABLE MULTIYIBRATOR

containing two monostable multivibrator circuits with
direct reset in pu ts.
TRIGGER { fA -+ 1 Vee
FEATURES INPUTS
. 1B-+
• Pulse width excellent temperature characteristics and 1RE/C E } TIMING
DIRECT _
1CE INPUTS
supply voltage 7~~o+ 1RD -+ 3
• Schmidt trigger inputs (B inputs) provided 10 4- 4 13 -+ 1Q }
OUTPUTS {
• Wide output pulse width range (tw = 47ns - 1s) _ OUTPUTS
2Q 4- 12 ---+ 2Q
• Operation possible with duty cycle up to 90%
_ DIRECT
(R T =100kQ) 11 <;- 2Ro RESET
INPUT
10 4- 2B } TRIGGER
• A, B complementary inputs provided 9 _ -
2A INPUTS
GND
• Q and Q outputs '--------'
• High input breakdown voltage (VI~15V)
• Wide operating temperature range (T a =-20-+75°C)
Outline 16P4
APPLICATION
General purpose, for use in industrial and .consumer voltage and temperature characteristics since both its
equipment. supply voltage and temperature are assured.
Q can be reset immediately low and Q high by setting
FUNCTIONAL DESCRIPTION direct reset input RD low irrespective of the ~tus of the
Positive pulses appear in output Q and negative pulses in outputs. If RD changes from low to high when A is low and
output Q by connecting external resistor RT and electro· B is high, the trigger is applied and the pulse appears in the
static capacitor CT to timing pins RE/C E and CE, as shown output.
in Fig. 1, and by applying a trigger from input A or B. The
width tw of the pulses appearing in the outputs is set by RT
and CT. When A changes from high to low or when B
changes from low to high, the trigger is applied. This ICis
able to obtain an output pulse width with excellent supply
BLOCK DIAGRAM (EACH MONOSTABLE MULTIVIBRATOR)
TIMING PINS
~
DE RE/CE
TRIGGER INPUTS { : o-------+---;
DIRECT RESET INPUT Ro 0-------+---+---+--1
; } OUTPUTS
• MITSUBISHI
2-250 "ELECTRIC
MITSUBISHI LSTTLs
M74LS221P
DUAL MONOSTABLE MULTIVIBRATOR
TIMING PIN EQUIVALENT CIRCUIT

Vee
Vee
7.5k 19k
1.2k
.li!.1.li: : Q .li!.1.li:: Q
FUNCTION .TABLE (Note 1)
RD A B Q Q Note 1. t : Transition from low to high.

1 : Transition from high to low.
L X X L H
n: Positive one-shot operation.
X H X L H U: Negative one-shot operation.
X X L L H X : Irrelevant
H L t .n. U 2. Output pulse width tv.

H ~ H .n. U The output pulse width tw is set using RT and C T by the
t L H .n. l...f following formula:
tw=CrRr In2 (ns)X (1±O.1)
. OPERATION DESCRIPTION
== O.7CrRT (ns) X (1 ±O.1)
As shown in Fig. 1, external resistor RT and electrostatic RT is measured in kiloohms and CT in picofarads.
capacitor CT are connected to timing pins RE/C E and C E . Individual fluctuations of +10% may occur in prod·
Connect the negative to the RE/C E side and the positive to ucts.
the C E side when using CT with polarity. Depending on the product, fluctuations in the order of
3/-10% may occur.
vge 3. Precautions with use
To CE pin r RT
+CT _
To RE/CE pin
In order to minimize the floating capacitance and to
safeguard against malfunction caused by noise, make the
RT and CT wiring as short as possible and avoid signal wires
which may be conducive to noise.
Fig. 1 Connection of external resistor RT and capacitor
CT to timing pins RE/CE and CE Connect a capacitor of O.01"'O.lJlF with good high·
frequency characteristics between pins Vee and GND.
Mount this capacitor as close as possible to the IC.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75t. unless otherwise noted)

V, Input voltage -0.5-+ 15 V
Topr Operating free-air ambient temperature range 20.,.. + 75 t
Tstg Storage temperature range -65-+150 t
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75t. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH22.7V 0 -400 pA
VOL";0.4V 0 4 mA
VOLS:0.5V 0 8 mA
RT External timing resistance 1.4 100 kQ
OT External timing capacitance 0 1000 pF
•. MITSUBISHI
MITSUBISHI LSTTLs
M74LS221P
Limits
Min Typ * Max
V,L Low-level input voltage

I A, B O,B
V
I Ra 0,5
V'C Input clamp voltage Vcc=4,75V,I,c=-lBmA -1.5 V

Vcc=4.75V, V, =0.5, O,BV
V, = 2V, 10H= - 400,uA

VCC=4.75V I IOL='4mA 0.25 0.4 V
V, =0.5V, O.BV,V, =2vl 10L=BmA 0.35 0.5 V
Vcc=5.25V, V, =2.7V 20 ,uA
VCC=5.25V, V,=10V 0.1 mA
I,L Low-level input current

I A VCC=5.25V -0.4
mA
I B, Ra V, =0.4V -O.B
los Short-circuit output current (Note 2) Vcc=5.25V, Vo= 0 V -20 -100 mA
Supply current (static state) Vcc=5.25V 4.7 11 mA
Icc
Supply current (one-shot state) Vcc=5.25V 19 27 mA
* All typical values are at Vee= 5V, T a= 25°C.
Limits
Min Typ Max
Low-to-high·level output propagation time, from
tPLH 27 70 ns
input Ato output Q
Low-to-high-Ievel output propagation time, from
tPLH 24 55 ns
input B to output Q
tPHL CT=BOpF 30 BO ns
input Ato output Q
RT=2kQ
tpHL CL= 15pF (Note 3) 26 65 ns
input B to output Q
Low-to,high-level output propagation time, from
tp.LH 23 65 ns
input Ro to output Q
tpHL lB 55 ns
input RD to output Q
Minimum output pulse width, from inputs CT= OpF, RT=2kQ
tWQ(min) 20 30 70 ns
A, B to outputs Q, Q CL=15pF (Note3)
CT=BOpF, RT=2kQ 70 120 150 ns
tWQ
-
Output pulse width, from inputs A, B to outputs Q, Q
CL=15pF
CT=100pF, RT=10kQ 600 670 750 ns
(Note 3)
CT=l,uF, RT=10kQ 6 6.9 7.5 ms
Note~: Measurement circuit
INPUT Vee OUTPUT

PR R=1 MHz, tr=6ns, tf=6ns; tw =40ns,
V p 3Vp.p, Zoo 50n
0
• MITSUBISHI
2-,-252 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS221P
TIMING REQUIREMENTS (Vcc=5V, Ta=25"C;, unless otherwise noted)
Limits
Min Typ Max
~ 1 Vips
tr, tf Maximum .rise. fall voltage rate of input pulse B
1 Vis
tw (A) Trigger A pulse width 40 35 ns
tw (S) Trigger B pulse width 40 35 ns
tW(RO) Direct reset input pulse width 40 9 ns
O.D.C Output duty cycle
I RT=2kQ
INote 31
50 %
I RT= 100kQ 90 %
tSU(AL) Setup time A low to RD 60 33 ns
tSU(SH) Setup time B high to RD 60 25 ns
tSU(RoL) Setup time RO low to B 50 15' ns
tree 1 Recovery ti me 15 -5 ns
tree 2 Recovery time (when B is superimposed onto Ro) 50 30 ns
th(RoLi Hold time AD low to 8 0 -15 ns

tW(SI
B B
tW( ROL)
RD
Q Q
________n . . ._
tWOI)
B~ tSU(SH)
L
RD
U Q
Q_--I/ \""'"-----,-
B
RD
A -\ /
----"\
Q \
\
I
I
0 Q
{ }tWQ
Q
____ J I
I
W Q
f {two
• MITSUBISHI
"ELECTRIC 2-253
MITSUBISHI LSTTLs
M74LS221P

SUPPLY VOLTAGE AMBIENT TEMPERATURE
CT-60pF 1 V - 5v
ee
~ RT= 10kQ CT=60pF
Ta=25'C RT= 10k Q
z
o
0.5 0.5
....
~
V
--
c:
«
>
I
f-
o
0 o /
f...--" V
~
w
~
~ -0.5 -0.5
f-
:oJ
:=:oJ
p
-1 1
4.5 4.75 5.25 5.S 25 o 25 50 75
SUPPLY VOLTAGE Vee (V) AMBIENT TEMPERATURE Ta ('C)
(1) Delay circuit (2) Pulse generator
By connecting an integration circuit to the B input, a rec- Using the fact that the output pulse width of the
tangular waveform applied to the input is changed to the M74LS221P varies only slightly with changes in supply
waveform shown at B and delayed by time td _The width of voltage and ambient temperature, a pulse generator with
the pulse output at Q and Q is determined as usual by the good supply voltage and temperature stability can be
values of CT , RT connected externally to the circuit_ implemented. By choosing the values of externally con-
Vee nected components CT . and RT , the duty cycle and fre-
quency can be freely selected.
Y,M74LS221P Vee Vee
B Q
IN PUT e>---IIfII'-_----fE.-:'"
Qz
Qz
"H" cr--l---t<'---......- - I - - - -.......- - - '
Q1 _ _ _ _ _- - '
B Qz _ _ _ _~
t 1==0. 70T1' RT1

Iz==O. 70TZ' RTZ
Q
----t-.-.J
==0.70T·RT
• MITSUBISHI
2'-254 "ELECTRIC
MITSUBISHI LSTTLs
M74LS221P
(3) ANTI·CHATTERING CIRCUIT
Vee
A
I I
CT RT
B
'- (
0
Q
Q
C
--1l
DIRECT
RESET INPUT
Q
~ L
• MITSUBISHI
.... ELECTRIC 2-255
MITSUBISHI LSTTLs
M74LS240P
OCTAL. BUFFER/LINE DRIVERS WITH 3-STATE OUTPUTS(lNVERTED)

OUTPUT
containing 2 blocks of buffers with 3-state inverted output CONTROL lOC-+ 1 Vee
INPUT
and common output control input for all 4 discrete circuits. _ OUTPUT
INPUT 19 ..... 20C CONTROL
INPUT
FEATURES OUTPUT OUTPUT
• Small input load factor (pnp input) INPUT

INPUT
• Hysteresis provided (= 400mV typical)
OUTPUT '-+ l Y 2 OUTPUT
• High breakdown input voltage (V I ~5V)
• Output control input having same phase for 2 circuits. INPUT INPUT
(10C,20C)
OUTPUT OUTPUT
• High fan·out, 3·state output.
(lOL = 24mA,IoH = -15mA) INPUT INPUT
• Wide operating temperature range. (T a = -20- + 75°C) OUTPUT -+ 1Y4 OUTPUT
INPUT
APPLICATION GND

FUNCTIONAL DESCRIPTION By connecting 1OC with 20C, it becomes possible to

The use of pnp transistors in the input circuits has enabled control the output of the 8 circuits. The output can be
the achievement of small input load factor and high break- terminatedwith load resistor of 133n or over.
down input voltage. With hysteresis characteristics, the
buffer has a 3·state inverted output with high noise margin. FUNCTION TABLE INote 1)
When the output control input OC is low, high appears A OC Y

in the output Y if input A is low, and low appears in the Y L L H
if A is high. If, on the. other hand, OC is high, all the H L L
outputs Y 1 , Y2 , Y3 ,and Y4 are in a high·impedance state, X H Z
irrespective of the status of A. Note 1: Z : high-impedance
X : irrelevant
CIRCUIT DIAGRAM (EACH BUFFER)
r-----~--~--~----~~--------~~----~--~~~----+_--OVee
OUTPUT
CONTROL OCo-~--*~~.I. INPUT A ()-..-l::......,.....~
INPUT
Y OUTPUT
L-~----~-------L~--~-+------~~~-- __~__+-____~~-L__-oGND
L.....__________________......____________~ TO OTHER
BUFFERS
UNIT: n
• MITSUBISHI
2-256 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS240P
OCTAL BUFFER/LINE DRIVERS WITH 3-STATE OUTPUTS(lNVERTED)

Topr Operating free·air ambient temperature range -20-+75 'c
Limits
Min Typ Max
VOH~2 .4V 0 -3 mA
10H High·level output current
VOH~ 2V 0 -15 mA
VOL';;;0.4V 0 12 mA
VOL';;;0.5V 0 24 mA
Limits
Min Typ* Max
VT+-VT- Hysteresis Vcc=4.75V 0.2 0.4 V
V,c Input clamp voltage Vcc=4.75V.I,c=-18mA -1.5 V
VOH High·level output voltage

Vcc=4.75V I V,-0.8V, 10H- 3mA 2.4 3.4 V
V,=2V I V,=0.5V, IOH=-15mA 2 V

VcC=4.75V I IOL=12mA 0.25 0.4 V
V,=0.8V. V,=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Vcc=5.25V, V,=2V. VO=2.7V 20 pA
10ZL Off-state low-level output current VcC=5.25V. V,=2V, Vo=0.4V -20 pA
Vcc=5.25V, V,=2.7V 20 pA
Vcc=5.25V. V,= 10V 0.1 mA
IlL Low-level input current Vcc=5.25V, V,=0.4V -0.2 mA
los Short-circuit output current (Note 2) Vcc=S.25V. VO=OV -40 -225 mA
lecH Supply current, all outputs high Vcc=5.25V, V, =ov. 17 27 mA
leeL Supply current, all outputs low Vcc=5.25V, V,=OV, V,=4.5V 26 44 mA
Iccz Supply current, all outputs off Vcc-5.25V. V,=4.5V 29 50 mA
*_ : All typical values are at Vee = 5V, Ta = 25°C.
limits
Min Typ Max
t pLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation CL =45pF 7 14 ns
tpHL time, from input A to output Y INote 3) 9 18 ns
tPZL Output enable time to low-level RL-667Q, CL = 45pF INote 3) 15 30 ns
tPZH Output enable time to high-level RL=667Q, C L = 45pF INote 3) 12 40 ns
tpLZ Output disable time from low-level RL=667Q, CL = 5 pF INote 3) 11 25 ns
tpHZ Output disable·time from high-level RL=667Q, CL = 5 pF INote 3) 12 18 ns
'. MITSUBISHI
MITSUBISHI LSTTLs
M74LS240P
OCTAL BUFFER/LINE DRIVERS WITH 3-STATE OUTPUTS(lNVERTED)
INPUT Vee
Parameter SW1 SW2 (1 J The pulse generator (PGl has the following characteristics:
PRR = lMHz, tr = 6ns, tf" 6ns, tw= 500ns,
t PZH Open Closed Vp = 3Vp.p. Zo = 50n
DUT (2) All diodes are switching diodes Itrr ~ 4ns)
t PZL Closed Open
"(3) CL includes probe and jig capacitance.
tPLZ Closed Closed
SOQ
t PHZ Closed Closed
A
TYPICAL CHARACTERISITCS
y OUTPUT VOLTAGE VS
INPUT VOLTAGE
Vee = 5 V
IOH =-lSmA
I Ta =17S"C
,;
IOL =24mA ~:a =2S"C
2:- Ta
.>
o V}\ /-20"C
y
UJ
'-'
« v'{ \
I'---,.--+.....J'HO .sv ':j
o
>
Ta =7S"C 1\ \ \
f-
:::J I
Ta =2S"C
I '"
i'-- \\
Cl.
f-
:::J
o i
l - T = T O"C
I'-- \ \
y 0.5 1.5
INPUT VOL T~GE V, (V)
HIGH-LEVEL OUTPUT VOLTAGE VS LOW-LEVEL OUTPUT VOLTAGE VS

HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
4 ~ 0.6,--,--,--..,--.,--,--,.,
2:- Vee =4.75V 2:-
I 3.S .J
0
~
> ~ O.SI--t---t---t---j-~+---I
UJ 3 UJ
'-'
"I"
«
f-
'-'
;:: 0 . 4 1 - - t - - - t - - - - - . ' " - - j - - + - - - j
.J 2.5 .J
0 o
> >
f- Ta=7S"C-- f- 0.31--+-----"'R'I---t---j--+---j
~ ~vTa=-20"C-
:::J
:::J
/ Ta ~2S"C
Cl.
f- Cl.
:::J f-
0
1.5 :::J
o
.J
UJ .J
UJ
> >
UJ
.J
± 0.5 'K\::r-.. UJ
.J
~
'-'
I '\ ~ "-. o.J
00 -10 -20 -30 -40 -50 -60 -70 -80
HIGH-LEVEL OUTPUT CURRENT IOH (mA) LOW·LEVEL OUTPUT CURRENT IOL (mA)
• MITSUBISHI
2-258 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS241P
OCTAL BUFFER/LINE DRIVER WITH 3·STATE OUTPUT (NONINVERTED)
DESCRIPTION
containing' 2 buffer blocks with 3-state non-inverted out- OUTPUT
CONTROL 100 --+ 1 Vee
puts and is provided with output control inputs which are INPUT
OUTPUT
common to 4 circuits and which are independent. 19 +- 200 CONTROL
INPUT
OUTPUT 2Y 4 +- 3 OUTPUT
FEATURES
INPUT 1A2 --+ 4 INPUT
• Small input load factor (pnpinput)
• Hysteresis provided (=400mV typical) OUTPUT 2Y 3 +- 5 OUTPUT

• Complementary output control inputs (lOC, 20C)
• High fan-out 3-state outputs OUTPUT 2Y2 +- 7 OUTPUT
(lOL = 24mA, IOH = -15mA) INPUT

• Wide operating temperature range (T a=-2D-+75°C)
OUTPUT 2Y 1+-9 OUTPUT
APPLICATION GND INPUT

Since pnp transistors are used for the input circu its, the appears in 2Y if 2A is high. All the outputs are put in a
input load factor is small and a high breakdown input high-impedance state when 10C and 20C are high and low,
voltage is provided. The 3-state non-inverted output buffers respectively.
have a high noise margin due to hysteresis. The device can be used as a 4-bit two-way bus driver by
When 10C is low, low appears in output Y if input lA is connecting lOC and 20C, lA and 2Y and also 2A and 1Y.
low, and high appears in Y if lA is high. When 20C is high, The outputs can be terminated with load resistors of not
low appears in output 2Y if input 2A is low and high less than 133 ohms.
~----~--~~------r---------r-~--~--~~~--~----oVec
OUTPUT
CONTROL INPUT OCO-'ri:--~---1
Y OUTPUT
' - - - - - - - - - - - - - - - -........- - - - - - - - _ TO OTHER BUFFERS
UNIT: n
• MITSUBISHI
.... ELECTRIC 2-259
MITSUBISHI LSTTLs
M74LS241P
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT (NONINVERTED)
lA 10C lY 2A 20C 2Y
L L L L H L
H L H H H ,H
X H Z X L Z
Note 1 Z : High·impedance
X : irrelevant
Vt Input voltage -0.5-+15 V

Vo Output voltage Off·state -0,5- +5.5 V
Tstg Storage temperature range -65- +150 'c
Limits
Min Typ Max
Vee Supply voltage 4,75 5 5,25 V
VOH;;;;2.4V 0 -3 rnA
IOH High-level output current
VOH;;;; 2V 0 -15 rnA
VOL::;>0.4V 0 12 rnA
VOL::;>0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C, unless otherwise notpd)
Limits
Min Typ * Max
VIH Hi~h.level input voltage 2 l II
VT+-VT- Hysteresis width Vee=4.75V 0.2 0.4 V
VIC Input clamp voltage Vee-4.75V,lle--18rnA -1.5 V
Vee-4.75VI VI-0.8V, 10H- 3rnA 2.4 3.1 V
VI=2V I VI=0.5V, IOH=-15rnA 2 V

Vee=4.75V I IOL-12rnA 0.25 0.4 V
VI=0.8V, VI=2V I IOL=24rnA 0.35 0.5 V
10ZH Off-state high-level output current Voe=5.25V, VI=2V, VO=2. 7V 20 p.A
10ZL Off-state low-level output current Vee=5.25V, VI=2V, Vo=0.4V -20 p.A
Vee=5.25V, VI=2.7V 20 p.A
Voo=5.25V ,·VI= 10V 0.1 rnA
ilL Low-level input current Vee=5.25V, VI=0.4V -0.2 rnA
105 Short-circuit output current (Note 2) Vee-5.25V, VO-OV -40 -225 rnA
leeH Supply current, all outputs. high Vee=5.25V, VI = OV, VI =4.5V 17 27 rnA
leeL Supply current, all outputS low Vee=5.25V, VI=OV, VI=4.5V 27 46 rnA
laez· Supply current, all outpUts disableq Vee=5.25V, VI=OV, VI=4.5V 32 54 rnA
* : All typical values are at Vee = 5V, Ta =25°C.

• MITSUBISHI
2-260 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS241P
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT (NON INVERTED)
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C. unlessothe"l'isenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel. hjgh-to-low-lev~1 output propagation OL=45pF 8 18 ns
tpHL time, from input A.to output Y (Note 31 9 18 ns
tpZL Output enable time to low-level RL-667Q. OL-45pF (Note 31 15 30 ns
tPZH Output enable time to high· level RL-667Q. OL-45pF (Note 31 12 40 ns
tpLZ Output disable time from low-level RL=667Q. OL- 5 pF INote31 11 25 ns
tpHZ Output disable time from high-level RL=667Q OL=5pF (Note 31 12 lB ns
INPUT Vee
Symbol SWI SW2

tPZH Open Closed characteristics:
PG DUT Closed Open PR R = 1MHz. tr = 6ns, tf = 6ns, tw = 500n5,
tPZL
Vp ~ 3Vp.p. 20 = 50n.
tpLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4"5)
50Q
(3) tL includes probe and jig capacitance.
tpHZ Closed Closed
t 100
b}-
y 200
200
• MITSUBISHI
;"ELECTRIC 2-261
MITSUBISHI LSTTLs
M74LS241P
OUTPUT VOLTAGE VS HIGH·LEVEL OUTPUT VOLTAGE VS
INPUT VOLTAGE HIGH·LEVEL .OUTPUT CURRENT
4 4
Tal=-JO"C
Vee = 5 V
> ~ee 24.7~V
f-- ~ta=2S"C~ ~IOH=-l'SrnA ';; 3.5
~ 3 Ta =7S"C ' "

~L=24rnA ~
f- 3
~
""
G. Z
w
~ ~ 2.5
w ITa =17S"C, ::>
u Ta =7S"C
~ 2 r--Ta =2S"C f-
:;
o
>
I I-~
I- Ta=-20"C ~
::>
:=::> 1.5
~ ./ j)a=-20"C
Ta =2S"C
I ',_
~
""-.. o
f-
::> .J
Q. 1 W 1
f-
::>
o
>
W
± 0.5
&
~,
"
(!)
, I
0.5 1.5 00 -10 -20 -30 40 50 60 70 ao
INPUT VOLTAGE V, (V) HIGH·LEVEL OUTPUT CURRENT IOH (rnA)
LOW·LEVEL OUTPUT VOLTAGE VS

LOW·LEVEL OUTPUT CURRENT
LOW·LEVEL OUTPUT C.URRENT IOL (rnA)
• MITSUBISHI
2-262 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS242P
QUADRUPLE BUS TRANSCEIVER WITH 3-STATE OUTPUT (INVERTED)
DESCRIPTION
The, M74LS242P is a semiconductor integrated circuit
containing 4 bus transmitters/receivers circuit with 3-state
inverted outputs.
OUTPUT _ _
CONTROL OOAB-+ 1 Vee
INPUT
FEATURES OUTPUT
r-,
NO 13 +- OOBA CONTROL
• Two-way transmission for, or isolation from, two 4-bit INPUT
NO
data words
• Low input load factor (pnp input) A2 ++
INPUTS/
• Hysteresis provided (= 400mV typical) OUTPUTS
A3 .... ..... 82
• High fan-out (IOL = 24mA, IOH = -15mA) INPUTS/
OUTPUTS
• Wide operating temperature range (Ta = -20 - +75°C) A4 ++
GND -84
APPLICATION
equipment.
. Outline 14P4 NO: NO CONNECTION

In this device the inputs and outputs are connected mutual-
ly to 2 circuits and the buffers with the 3-state inverted and B are put in the high-impedance state and A and Bare
outputs are made two-way buffers. isolated. When OCAB is low and OCBA is high, both A and
Since the input section is provided with hysteresis, the B are put to the output state resulting in the possibility of
noise margin is increased and the use of pnp transistors in oscillation and damage to the IC. Use in this state must
the inputs reduces the input load factor. therefore be avoided. This state reSUlting from the OCAB
The input/output direction is controlled by OCA Band and OCBA signals should be kept as short as possible.
OCBA. When OCAB and OC BA are low, input/output pins Termination is possible with a load resistor of not less than
A are made the input pins and the output/input pins Bare 133 ohms.
made the output pins. Wnen OCAB and OCBA are high, Refer to M74LS240P for the typical characteristics.
pins B are made the input pins and A the output pins. When
OCAB is high and OCBA is high and OCBA is low, both A
OUTPUT
CONTROL OOAB<>-1-+-........, INPUT/OUTPUT A o-,-...-f~1-1
INPUT 8 OUTPUT/INPUT
' - - - - - - - - + - - - - - . + - - - - - t - f - t - TO OTHER BUFFERS
OUTPUT
CONTROL OOBA ~.f---k--1
INPUT
~----~~-+-~------~~~+-~~~~-~~~ GND
TO OTHER BUFFERS
UNIT: n
• MITSUBISHI
.... ELECTRIC 2-263
MITSUBISHILSTTLs
M74LS242P
OCAB OCBA A S
H H 0 (
Note 1: I : Input pin
L H 6' : Output pin (inverted)
* * * : Inhibited (A and B are made output pins)
H L Z Z
Z : High-impedance (A, 8 are isolated)
L L ( 0

Vee Supply voltage -0.5-.+7 V
VI Input voltage I A,S -0.5- +5.5 V

I OCAB,OCBA -0.5- + 15 V
Topr Operating free-air ambient temperature range -20- +75 '0
Tstg Storage temperature range -65- + 150 '0
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S'O, unless otherwise noted)
Limits
Min Typ Max
VOH~2.4V 0 -3 rnA
VOH~ 2V 0 -15 rnA
VOL";0.4V 0 12 rnA
VOL";O.SV 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75'0, unless otherwise noted)
Limits
Min Typ * Max
VT+-VT- Hysteresis width Vee=4·7SV 0.2 0.4 V
Vie Input clamp voltage Vee=4.7SV.lle=-18rnA -1.5 V
VOH High-level output volt~ge

Vee=4.7SV I
VI-0.8V, 10H- 3rnA 2.4 3.1 V
VI=2V I V,-O.SV, IOH- lSrnA 2 V

VCC=4.75V I IOL=12rnA 0.25 0.4 V
VI=0.8V,VI=2V I IOL=24rnA 0.35 0.5 V
IOZH Off·state high·level output current Vcc=5.2SV, VI=0.8V, V,=2V, VO=2.7V. 40 ,.,A
IOZL Off·state low·level output current Vcc=5.25V, VI=0.8V, V,=2V, VO=0.4V -200 ,.,A
A,S 20
Vee=5.25V. V,=2.7V ,.,A
OCAB.OCBA 20
ilH High·level input current
A,S Vec=S.25V, V,=5.5V 0.1
rnA
OCAB.OCBA Vcc=5.25V, V,= 10V 0.1
OCAB,OCBA -0.2
Vcc=S.25V
ilL Low-level input current A I OCAB=OCBA= OV -0.2 rnA
VI=0.4V
S IOCAB=OGBA=4.SV -0.2
los Short-circuit output current (Note 2) VCC=5,25V, VO=OV -40 -225 rnA
ICCH Supply current. all outputs high Vcc=5.25V, V,=OV, V,=4.5V 22 38 rnA
ICCL Supply current. all outputs low Vcc=S.25V, V,=OV, V,=4.5V 29 50 rnA
Iccz Supply current, all outputs off Vcc=5.25V, VI=OV, VI=4.5V 29 50 rnA
* : All typical values are at VCC=5V, Ta=25·0.
Note 2: All measurements should be done quickly and not more, than orie output should be shorted at a time.
• MITSUBISHI
2-264 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS242P
SWITCHING CHARACTERISTICS (Voo=5V. Ta =25·C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, CL=45pF 7 14 ns
high-to-Iow-Ievc! output propagation time,
tpHL from inputs A, B to outputs B. A INote 3) 9 18 ns
tPZL Output disable time from low-level RL=667Q. CL=45pF INote 3) 15 40 ns
tpZH Output enable time to high-level RL=667Q. CL=45pF INote 3) 12 40 ns
tpLZ Output enable time to lOW-level RL=667Q. CL= 5 pF INote 3) 11 25 ns
tpHz Output disable time from high-level RL=667Q CL= 5 pF INote 3) 12 18 ns
INPUT Vee
Symbol SWl SW2 (1) The pulse generator (PG) has the fo(Jowing
. characteristics:
t PZH Open Closed PRR = 1MHz, tr = 6n5, tf = 6n5, tw = 500ns,
PG OUT
t PZL Closed Open Vp = 3Vp.p. Zo ~ 50n
(2) All diodes are switching diodes (tr r ~ 4n5)
t PLZ Closed Closed
t PHZ Closed Closed
A. B (INPUT)
B. A (OUTPUT)
• MITSUBISHI
;"ELECTRIC 2-265
MITSUBISHI LSTTLs
M74LS243P
QUADRUPLE BUS TRANSCEIVER WITH 3-STATE OUTPUT (NON INVERTED)

containing 4 bus transmitters/receivers with 3-state non-
inverted outputs_
OUTPUT _ _
CONTROL OCAB -> 1 Vee
INPUT
FEATURES OUTPUT
NC 13 <- OCBA CONTROL
• Two-way transmission for, or isolation from, two 4-bit INPUT
NC
data words
• Low input load factor (pnp input)
INPUTSI
• Hysteresis provided (= 400 mV typical) OUTPUTS
• High fan-out (IOL = 24mA, IOH = -15mA) OUTPUTSI
INPUTS
GND
APPLICATION
equipment_
FUNCTIONAL DESCRIPTION Outline 14P4 NC: NO CONNECTION
In this device the inputs and outputs are connected

mutually to 2 circuits and the buffers with the 3-state OCAB is low and OCBA is high, both A and B are put to
non-inverted outputs are made two-way buffers_ the output state resulting in the possibility of oscillation
Since the input section is provided with hysteresis, the and damage to the IC. Use in this state must therefore be
noise margin is increased and the use of pnp transistors in avoided. This state resulting from the OCAB and OCBA
the inputs reduces the input load factor. signals should be kept as short as possible. Termination is
The input/output direction is controlled by OCAB and possible with a load resistor of not less than 133 ohms.
OCBA. When OCAB and OCBA are low, input/output pins Refer to M74LS241 P for the typical characteristics.
A are made the input pins and the output/input pins Bare
made the output pins. When OCAB and OCBA are high,
pins B are made the input pins and A the output pins. When
OCAB is high and OCBA is low, both A and B are put in
the high-impedance state .and A and B are isolated. When

.---;-~r-~--;-------------------~--~-r-,~----~--~Vee
OUTPUT I NPUT I Ao-,-..-f--!4-+ .----+-+H-1

CONTROL OCASD---t-t-....--1 ... OUTPUT B OUTPUT liN PUT
INPUT
L--------------j--------......--------t-1:-1-+ TO OTHER BU FFE RS
OUTPUT
CONTROL OCSA~-+--;l+---1
INPUT
~~------~L-~~~----------------~~~-4_t----~~~~GND
L -________________---'-______--I-__________~ TO OTHE R BUF FERS
UNIT: n
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS243P
QUADRUPLE BUS TRANSCEIVER WITH 3-STATE OUTPUT (NON INVERTED)
OCAS OCSA A S
H H 0 I Note 1: I : Input pin
L H 0: Output (non-inverted) pin
* * * : Inhibited (A and B are made output pins)
H L Z Z
Z: High-impedance (A, B are isolated)
L L I 0
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, unless otherwise-noted)

Input voltage I A.S -0.5-+5.5 V

VI
I OCAS,OCSA -0.5-+15 V
Vo Output voltage Off·state -0.5-+5.5 V
Limits
Min Typ Max
VOH~2.4V 0 -3 mA
VOH~ 2V 0 -15 rnA
VOL~0.4V 0 12 rnA
VOL~0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C., unless otherwise noted)
Limits
Min Typ * Max
Vie I nput clamp voltage Vee=4.75V,lle=-18rnA -1.5 V
Vee=4.75V IVI=0.8V, IOH--:-3rnA Z.4 3.1 V
VI=2V IVI=0.5V.loH=-15rnA 2 V
Vee=4.75V I 10L=lZrnA 0.Z5 0.4 V
VI=0.8V, VI=ZV I IOL=Z4rnA 0.35 0.5 V
10ZH Off-stage high·level output current Vee=5.25V, VI=0.8V, VI=ZV, Vo=2.7V 40 p.A
10ZL Off-state low·level output current Vee=5.25V, VI=0.8V, VI=2V, Vo=0.4V -ZOO p.A
A,S 20
Vee=5.Z5V, VI=2.7V p.A
OCAS,OCSA ZO
A,S Vee=5.Z5V, VI=5.5V 0.1
rnA
OCAB,OCSA Voe=5.Z5V, VI= 10V .. _-_.- 0.1
OCAS,OCSA -O.Z
Vee=5.25V
ilL Low·level input current A IOCAS=OCSA=OV -0.2 rnA
VI=0.4V
S IOCAS=OCSA=4.5V -o.z
los Short-circuit output current (Note 2) Vee=5.Z5V, Vo=OV -40 ~ZZ5 rnA
leeH Supply current. all output high Vee=5.25V, VI = 0 V, VI =4.5V Z2 38 mA
leeL Supply current. all outputs low Voc=5.25V, VI = 0 V, VI =4.5V Z9 50 mA
leez Supply current. all outputs off Vee=5.Z5V, VI= 0 V, VI =4.5V 32 54 rnA
* : All typical values are at Vee=5V, Ta=25·C.
Note 2: All measurements should be done quickly and not more than one outputs should be shorted at a time.
_ • MITSUBISHI
.... ELECTRIC 2-267
MITSUBISHI LSTTLs
M74LS243P
QUADRUPLE BUS TRANSCEIVER WITH 3·STATE OUTPUT (NON INVERTED)
SVVITCHI~G CHARACTERISTICS,(vcc=sv, Ta=2S'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-hiRh-level, CL=4SpF 8 18 ns
high-to-Iow-Ievel output propagation time,
t pHL . !from inputs A. B to outputs B, A (Note 3) 9 18 ns
tpZH Output enable time to high-level RL:=667Q , CL=4SpF (Note 3) 15' 40 ns
tPZL ·Output enable time to low-level RL=667Q, CL=4SpF (Note 3) 12 40 ns
tpLZ Output disable time from low-level RL=667Q, CL= 5 pF (Note 3) 11 25 ns
tpHZ Output disable time from high-level RL=667Q CL= 5 pF (Note 3) 12 18 ns
INPUT Vee
Symbol SWl SW2

PG OUT PRR = 1MHz, tr =6ns, tf =6ns, tw = 500ns,
tPZL Closed Open
Vp = 3Vp_p, Zo:= son
tpLZ Closed Closed (2) All diodes are switching diodes (t" ~ 4ns),
son
lSW2 tpHZ Closed Closed
(3) CL includes probe and jig cap~citance.
TIMING DlAGFJAM (Reference level = 1.3V)
A, B (INPUT) OCSA
B, A (OUTPUT) A (OUTPUT)
A (OUTPUT)
B (OUTPUT)
B,(OUTPUT)
• MITSUBISHI
2-268 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS244P
OCTAL BUFFER/LINE DRIVERS WITH 3·STATE OUTPUTS(NONINVERTED)
DESCRIPTION
OUTPUT _
containing 2 blocks of buffers with 3-state non-inverted CONTROL 1 OC... 1 Vee
INPUT.
output and common output controlling input for all 4 _ OUTPUT
INPUT lA, ... 2 19 ..... 200 CONTROL
discrete circuits. INPUT
OUTPUT 2Y 4 ..... 3 ... lY, OUTPUT

FEATURES
INPUT lA2 ...· 4 ..... 2A4 INPUT
• Low input load factor (pnp input)
• Hysteresis provided (= 400mV typical) OUTPUT 2Y3 ..... 5 ... lY2 OUTPUT
• High breakdown input voltage (V1:? 15V)
INPUT 1A3'" INPUT
• Output control input having same phase for 2 circuits
• High fan-out, 3-state output OUTPUT
(lOL = 24m A, IOH = -15mA) ..... 2A2 INPUT

OUTPUT 2Y,..... 9 ... lY 4 OUTPUT
APPLICATION GND INPUT

FUNCTION TABLE (No'. 1)
The use of pnp transistors in the input circuit has enabled
the achievement of small input load factor. With hysteresis A OC Y
characteristics, the buffer has a 3-state non inverted output L L L
with high noise margin. H L H
When output control input OC is low, the output Y is X H Z
low if input A is low and Y is high if A is high. When Note 1: Z : hIgh-Impedance

X : irrelevant
OC is high, all of Y1, Y2, Y3, and Y4 are in the high-
impedance state, irrespective of the status of A.
By connecting 10C with 20C, it becomes possible to con-
trol the output of all 8 circuits simultaneously. Output can
be terminated by a load resistor of 133Q or over.
For standard characteristics, see M74LS241 P.
~----~--4r--~----~--------------~------~--4r~----~r--oVee
OUTPUT
CONTROL OC o-t-+--;M-~ INPUT Ao-~t--f4III--1
INPUT Y OUTPUT
L-~----~------~-----+-+----------~~~------1-~----~~~--OGND
'---------------"'-----.......0------------_ TO OTHER BUFFE RS
UNIT: n
• MITSUBISHI
.... ELECTRIC 2-269
MITSUBISHI LSTTLs
M74LS244P
VOO Supply voltage -0.5-'- +7 V
Vo Output voltage Off·state -0.5-+5.5 V
Topr Operating free-air ambient temperature range -20 +75 'C
Limits
Min Typ Max
VOH~2 .4V -3 mA
VOH~ 2V -15 mA
VOL":0.4V 12 mA
VOL":O.5V 24 mA
Limits
Min Typ* Max
VT+-VT- Hysteresis Voo=4. 75V 0 .2 0 .4 V
VIO Input clamp voltage Voo-4. 75V. 110--18mA -1.5 V
VOO=4 .75V I VI=0.8V, IOH=-3mA 2.4 3 4 V
VI=2V IVI=0.5V,loH=-15mA 2 V
VOO=4. 75V I IOL=12mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Voo=5.25V. VI=2V. VO=2.7V 20 I,A
10ZL Off-state low-level output current Voo=5.25V. VI=2V. Vo=O 4V -20 I,A
VoO=5.25V. VI=2.7V 20 I,A
Voo=5. 25V, VI=IOV 0.1 mA
IlL Low-level input current VOO=5.25V. VI=0.4V -0.2 mA
los Short-circuit output current (Note 2) VOO=5.25V, VO=OV -40 -225 mA
leCH Supply c!Jrrent, all outputs high VCC =5.25V, V,=OV, V,=4.5V 17 27 mA
100L Supply current, all outputs low Voo-5.25V, V, =OV 27 46 mA
looz Supply current, all outputs off VOO-5. 25V , VI-4. 5V 32 54 mA
*: All typical values are at Vee = 5V, Ta = 25°C.
limits
Min Typ Max
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propaga'tion OL=45pF 8 18 ns
tpHL time, from input A to output Y INote 3) 9 18 ns
tPZH Output enable time to high-level RL=667Q, OL =45pF INote3) 15 30 ns
tPZL Output enable time to lOW-level RL=667Q, OL-45pF INote 3) 12 40 ns
tpLZ Output disable time from low-level RL=667Q, OL= 5 pF INote 3) 11 25 ns
tpHz Output disable time from high-level RL=667Q, OL = 5 pF INote 3) 12 18 ns
• MITSUBISHI
2-270 ;"'ELECTRIC
MITSUBISHI LSTTLs
M74LS244P
INPUT Vee
Symbol SWl SW2
tPZH Open Closed
t PZL Closed Open
PG OUT PRR::::: 1 MHz, tr::::: 6ns. tf::::: 6ns, tw = 500n5,
t PLZ Closed Closed Vp = 3Vp.p. Zo =500
(2J All diodes are switching diodes (trr ~ 4nsl
SOQ Closed Closed
t PHZ (3) CL includes probe and jig capacitance.
• MITSUBISHI
;"ELECTRIC 2-271
MITSUBISHI LSTTLs
M74LS24SP
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS(NONINVERTED)

The M74LS245P' is a semiconductor integrated circuit
containing of 8 bus transmitter/receiver circuits with non- DIRECTION
CONTROL
inverted outputs. INPUT
OUTPUT
CONTROL
INPUT
FEATURES
• Bi·directional transmission or separation of two 8 bit
data is possible.
• Low input load factor (pnp input) INPUTS
• Input/output A and output/input B have hysteresis /OUTPUTS
characteristics (Hysteresis =400mV typical). OUTPUTS

/ INPUTS
• High fan·out (lOL = 24mA, IOH = -15mA)
• Wide operating temperature range. (T a =-20 - +75° C)
APPLICATION
General digital equipment for industrial and consumer use
Outline 20P4 ,
The inputs and outputs of the two buffer circuits with When the output control input DC is high, both A and B,
3-state non:inverted outputs are connected alternately to in.a high-impedance state, are separated.
form a bi-directional buffer.
With hysterisis characteristics in the input section of FUNCTION TAB LE (Note 1)
input/output A and output/input B, noise margin is high.
.OC DIR A B
The use of a pnp transistor input has made the input load
L L 0 I
factor small. The data direction control input DIR controls
L H I 0
the direction of input and output. When DIR is high,A is
H X Z Z
the input terminal and B is the output terminal. On the
Note': I : input
contrary, when DIR is low, B is the input terminal and A is
o : output (noninverted output I
the output terminal. Z : high·impedance
x: irrelevant

r-----~~~--4r----~----------~----~--~--~----_r_,r_~vcc
OUTPUT
CONTROL Dc o-r+---.P.....-{
INPUT
DATA
DIRECTION
CONTRO L D IR o-.-+--;!<......-t
t--.:I'-:h-+-tOB OUTPUT/INPUT
INPUT
L-~ ____ ~~~ ____ ~ ____ ~ ________ ~~~ ____ ~-+~ ____ -4~ __~~GND
~---------------------+~----------~~~F~~~~R
UNIT: n
• MITSUBISHI
2-272 IAtt.ELECTRIC
MITSUBISHI LSTTLs
M74LS245P
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS(NONINVERTED)
ABSOLUTE JYlAXIMUM RATINGS (Ta=-20-+75"C. unlessotherwisenoted)
V, I nput voltage I A. B -0.5-+5.5 V
I DIR.OC -0.5- +15 V

Tstg Storage temperature range - 65- +150 "C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C. unlessotherwisenoted)
Limits
Min Typ Max

VOH~ 2.4V 0 -3 mA
10H High·level output current
VOH~ 2V 0 -15 mA
VOL';;: 0.4V 0 12 mA
VOL';;: 0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C. unlessotherwisenoted)
Limits
Min Typ Max

VT+ -VT- Hystersis Vec=4.75V 0.2 0.4 V
V'C I nput clamp voltage Vce=4.75V. l,c=-18mA - 1.5 V
Vcc=4.75V IOH=-3mA 2.4 3.4 V
V, =0.8V. V, =2V IOH=-15mA 2 V
VCC=4.75V 10L= 12mA 0.4 V
V, =0.8V. V,=2V 10L =-24mA 0.5 V
10ZH Off-state high-level output current Vcc=5.25V. V, =0.8V. V, =2V. Vo=2.7V 20 /iA
10ZL Off-state low-level output current Vcc=5.25V. V, =0.8V. V, =2V. Vo=0.4V -200 /iA
A. B 20 /i A
Vcc=5.25V, V, =2.7V
DIR.OC 20 /iA
A, B Vcc= 5.25V. V, = 5.5V 0.1 mA
DIR,OC Vce=5.25V, V, =10V 0.1 mA
ILL Low-level input current Vcc=5.25V, V, =0.4V -0.2 mA
los Short-circuit output current (Note 2) VCC=5.25V, VO= OV -40 -225 mA
ICCH Supply current, all outputs high Vcc=5.25V. V,=OV. V,=4.5V 48 70 mA
leCL Supply current, all outputs low Vce=5.25V. V, = 0 V. V, =4.5V 62 90 mA
leez Supply current, all outputs off Vcc=5.25V. V, = 0 V. V, =4.5V 64 95 mA
*: All typical values are at Vee = 5V, Ta = 25°C . .
Note 2: All measurements should be done quickly, and not more than one output should beshoned at a time.
SWITCHING CHARACTERISTICS (Vce=5V. Ta=25"C unless otherwise noted)
Limits
Min Typ Max
tP'LH . Low-to·high·level, high-to·low-Jevel output propagation 10 15 ns

CL=45pF INote 31
tpHL time. from input A, B to output B. A 10 15 ns
tPZL Output enable time to low·level RL=667Q. CL=45pF INote31 25 40 ns
tPZH Output enable time to high-level RL=667Q. CL=45pF INote31 23 40 ns
tpLZ Output disable time from low-level RL=667Q. CL=5pF INote 31 15 25 ns
tPHZ Output disable time from high-level RL=667Q. CL=5pF INote 31 14 25 ns
• MITSUBISHI
;,.. ELECTRIC 2-273
MITSUBISHI LSTTLs
M74LS24SP
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS(NONINVERTED)
INPUT
~
Symbol SWl SW2
\PZH Op~n Closed
(1 J The pulse generator (PG) has the following characteristics:
\PZL Closed Open PRR = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns,
~SOQi \PLZ Closed

Closed
Closed
Closed
Vp = 3Vp_p, Zo = son
(21 All diodes are switching diodes (t" ~ 4nsl
\PHZ (3) CL includes probe and jig capacitance.
}
b=
A,B 00
Gi=
( INPUT)
B,A
(OUTPUT)
B,A
(OUTPUT)
b1 tpHZ
~-.
00
OUTPUT VOLTAGE VS INPUT VOLTAGE
B,A
(OUTPUT)
W k·" tpLZ
;;
>
w
o
'-"
~
o
3
-
VCC- S
IOH=-ISmA
IOL=24~A
v
Tl=7Soc
- Ta =2So~ '-.. '"
Tin~~
/
',- 2S"C
7 Ta =
-20"C
- Ta=-20"C
>
f-
::J
j':: I
::J
o
o 2.0
0.0 0.5 1.0 1.S
INPUT VOLTAGE VI (V)
HIGI-1-LEVEL OUTPUT VOLTAGE VS LOW-LEVEL OUTPUT VOLTAGE VS

HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
VCC=4.7SV ;:
-::,
~~ 0
w
'-"
~
o
3
-- ~~
~
>
w
'-"
 ~ Ta=7S"C 0
>
f-
~ V Ta=2S"C
~
f-
::J ::J
0-
f- '1'a= -20"C 0-
f-
::J
'\ ~
::J
o 0
.J .J
W I W
>
W
.J
:i:
'\ ~ >
w
~
0.1
'-"
I o 1\' ,'\ 0
.J
0.0
o -10 -20 -30 -40 -so -60 -70 -80 0 10 20 50 60
HIGH-LEVEL OUTPUT CURRENT I OH( rnA) LOW-LEVEL OUTPUT CURRENT I od rnA)
• MITSUBISHI
2-274 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS247P
BCD-TO-7-SEGMENT DECODER/DRIVER(ACTIVE-LOW OUTPUT)
DESCRIPTION
The. 'M74LS247P is a semiconductor integrated circuit
provided with BCD-to-7-segment decoder/driver function
and open collector outputs.
Vee
FEATURES BCD INPUTS {
De--+ --+(
• Suitable for 7-segment display element lighting LAMP TEST
• RB I input and Bi/RBO outputs for zero suppression INPUT
BLANKING
• LT input for lamp testing INPUT/RIPPLE BI/RBO ...
BLANKING
• BI/RBO input for extinguishing all segments OUTPUT
SEGMENT
OUTPUTS
• Open collector outputs RIPPLE
BLANKING
• Wide operating temperature range (Ta =-20-+75°C) INPUT{ DD--+
BCD INPUTS
DA--+
APPLICATION
equipment.
*:OPEN COLLECTOR OUTPUTS
When a number is specified in BCD code for BCD inputs
DA , Ds , Dc and DD, segment ouputs a--ij are set low in By setting blanking input BI/R BO low, outputs a~ are
accordance with that number. By connecting the 7-segment set high and the display element is extinguished irrespective
display element to each of the outputs, the character of the status of the other inputs. Since 81/ R BO serves as
indicated on the display character can be displayed. a,..;g are both an input and output pin, only ICs with open collector
open collector outputs with a breakdown voltage of not less outputs can be connected to this pin.
than 15V and a low-level output current of 24mA, therby By setting lamp test input LT low, a-9 are set low
making it possible to drive directly a 7-segment LED for the irrespective of the status of Bi/RBO, DA , Ds , Dc and DD,
display of anode-common numbers. all the segments in the display element are lighted and each
Suppression of the unnecessary high-order zeroes is segment can be tested. Refer to M74LS47P for the BI/RBO
possible by setting the highest order RBI ripple blanking and a-g circuits.
input low and connecting ripple blanking output Bi/RBO The only difference between the M74LS247P and
to the next-level RB I for each of the digits. Refer to the M74LS47P is the configuration of the 6 and 9 numerals.
M74LS47P for the appli,cation example.
BLOCK DIAGRAM
* ' OPEN COLLECTOR OUTPUTS
SEGMENT OUTPUTS
BLANKING
BCD INPUTS INPUT/RIPPLE
BLANKING OUTPUT
• MITSUBISHI
;"ELECTRIC 2-275
MITSUBISHI LSTTLs
M74LS247P
BCD-TO-7 -SEGMENT DECODER/DRIVER(ACTIVE-LOW OUTPUT)
FUNCTION TABLE INote1)
Decimal number or function LT RBI Do De DB DA BI/RBO a b c d e f 9 Note
0 H H L L L L H L L L L L L H
1 H X L L L H H H L L H H H H
2 H X L L H L H L L H L L H L
3 H X L L H H H L L L L H H L
4 H X L H L L H H L L H H L L
5 H X L H L H H L H L L H L L
6 H X L H H L H L H L L L L L
7 H X L H H H H L L L H H H H
(i)
8 H X H L L L H L L L L L L L
9 H X H L L H H L L L L H L L
10 H X H L H L H H H H L L H L
11 H X H L H H H H H L L H H L
12 H X H H L L H H L H H H L L
13 H X H H L H H L H H L H L L
14 H X H H H L H H H H L L L L
15 H X H H H H H H H H H H H H
Blanking X X X X X X L H H H H H H H (2)
Ripple blanklng H L L L L L L H H H H H H H (3)
Lamp test L X X X X X H L L L L L L L (4)
Note 1. (1) IT IS normally kept In high.
RBi is kept open or in high with a decimal a output. DEFINITION OF SEGMENTS
(2) When Bi/RBO is low, all the segment outputs are high irrespective ~f the status of the other inputs.
(3) All the segment outputs are set high and Sf/RBO is set low when RBI, OA. Os. Dc and Do are set low with IT high.
(4) When IT is low, all the segment outputs are low.
X: Irrelevant
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
number
n -, 3 u, 5 5 -,, 8 u c
- l::
I 0
Character
u I C -' C :J

Input BI/RBO -0.5- Vee V
V, Input voltage
Other inputs -0.5 -+15 V
Output BI/RBO -0.5- Vee V
Vo Output voltage High-Ieve! state
Other outputs -0.5-+15 V
10(pcak) Output current \w";;lms. dutycycle";;10% 200 mA
10 Output current High-level state 1 mA
Topr Operating free-air ambient temperature range < ~20-+75 °C
Tstg Storage temperature range ~65-+150 "C
RECOMMENDED OPE RATI NG CONDITIONS (Ta = -20 - + 75"C. unless otherwise noted)
Limits
Min Typ Max

High-level output current. 250,
10H outputs a -.
9 VOH=15V 0 /-i A
High-Iev.,& output current, -50
10H output BI/RBO VOH~2.4V 0 /-iA
VOL";0.4V 0 12 rnA
Low-Ievelou!put current,
10L outputs a '-!g
VOL";O .5V 0 24 rnA
VOL";0.4V 0 1.6 rnA

Low-lev~utPut current,
10L
output BI/RBO VOL";0.5V 0 3 .2 rnA
• MITSUBISHI
2-276 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS247P
BCD-TO-7 -SEGMENT DECODER/DRIVER(ACTIVE-LOW OUTPUT)
ELECTRICAL CHARACTERISTICS (Ta= -20- + 70'C , unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage Vcc- 4 •75V,llc=-18rnA -1.5 V
VOH High·level output voltage, output BI/RBO Vcc=4.75V 10H= -501'A 2.4 4.2 V
10H High-level output current, outputs a - 9 VI=0.8V, VI=2V Vo=15V 250 f.lA
IOL=12rnA 0.25 0.4 V
Outputsa-g
Vcc=4.75V IOL=24rnA 0.35 0.5 V
VI=0.8V, VI=2V IOL=I.6rnA 0.25 0.4 V
Output Bi/RBO
IOL=3.2rnA 0.35 0.5 V
VcC=5.25V, VI=2.7V 20 I'A
IIH High·level input voltage, except input Bi/RBO
VCC=5 .25V. VI= 10V 0.1 rnA
Input BIIRBO -1.2 rnA
ilL Low-level input current Vcc=5.25V, VI=0.4V
Other inputs -0.4 rnA
los Short-circuit output current, output BII RBO Vcc=5.25V, Vo=OV -0.3 -2 rnA
Icc Supply current Vcc=5.25V (Note 2) 7 13 rnA
* : All typical values are at Vcc= 5V, T.= 25'C.
Note 2..Icc is measured with all inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vcc=5V, T a =25'C, unlessotherwisenoted)
Limits
.Symbol Parameter Test conditions Unit
Min Typ Max
tpLH Low-to-high-Ievel. high-to-\ow-Ievel output propagation 35 100 ns
RL =665Q
tpHL time, from input DA to outputs a- g 30 100 ns
0L= 15pF
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation (Note 3) 50 100 ns
tPHL time, from input RBI to outputs a- T 45 100 ns
Note 3: Mea$urement circuit
INPUT Vec Vce OUTPUT
PG DUT
PRR=lMHz, ',=6ns. ,,=6ns. t w =500ns, Vp=3Vp.p. Zo=50n.
50Q (2) CL includes probe and jig capacitance
LEVELS OF
DELAY 2 a-T
--+.......11
LEVELS OF
DELAY 3
•. MITSUBISHI
...... ELECTRIC 2-277
MITSUBISHI LSTTLs
M74LS248P
BCD· TO· 7 ·SEGMENT DECODER/DRIVER (ACTIVE·HIGH OUTPUT)
DESCRIPTION
The M74LS248P is a semiconductor integrated circuit pro-
vided with a BCD-to-7-segment decoder/driver function and
2kohm (typ) pull-up resistor outputs_
Vee
BCD INPUTS{
FEATURES ->f
• Suitable for lighting 7-segment display element LAMP TEST
INPUT LT-> ->g
• RID input and BI/RBO output for zero suppression BLANKING
• LT input for lamp testing INPUT/RIPPLE BI/RBO .... 4 ->a
BLANKING OUTPUT SEGMENT
• BI/RBO input for blanking all segments RIPPLE RBT-> 5 ->b OUTPUTS
BLANKING INPUT
• NPN transistor can be externally mounted for high-
00->
current drive. BCD INPUTS {
• Wide operating temperature range (Ta=-20~+75°C) OA-> ->d
APPLICATION
FUNCTIONAL DESCRIPTION OUTPUT CIRCUIT SCHEMATIC

This IC is a version of the M74LS247P without the output
transistors. When numbers are specified in BCD code for a - 9 Outputs
BCD inputs DA , DB, Dc and DD, segment outputs a~g are
set high in accordance with those numbers. These outputs - - - - - - - 4 t - -......-o Vee
have built-in 2k.l1. pull-up resistors suited to driving
common-cathode LEOs. High-current display elements can
be driven by connecting NPN transistors to the outputs. a-9
The ripple blanking, blanking and lamp test functions
are the same as those for the M74LS247P.
Refer to the M74LS47P for the application example.
The only difference from the M74LS48P is the con-
figuration of the 6 and 9 numerals.
BLOCK DIAGRAM SEGMENT OUTPUTS

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _\
A~
,.
, DA
~4~'J
~------ ~_
DB De
BCD INPUTS
Do
_ _ _~I
BI/RBO
BLAN KI NG
INPUT/RIPPLE
BLANKING OUTPUT
LT
LAMP
TEST
INPUT
RIPPLE
GND
BLANKING INPUT
• MITSUBISHI
2-278 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS248P
Decimal number or function LT RBI Do De DB DA BI/RBO a b c d e f g Note
0 H H L L L L H H H H H H H L
1 H X L L L H H L H H L L L L
2 H X L L H L H H H L H H L H
3 H X L L H H H H H H H L L H
4 H X L H L L H L H H L L H H
5 H X L H L H H H L H H L H H
6 H X L H H L H H L H H H H H
7 H X L H H H H H H H L L L L
(1)
8 H X H L L L H H H H H H H H
9 H X H L L H H H H H H L H H
10 H X H L H L H L L L H H L H
11 H X H L H H H L L H H L L H
12 H X H H L L H L H L L L H H
13 H X H H L H H H L L H L H H
14 H X H H H L H L L L H H H H
15 H X H H H H H L L L L L L L
Blanking X X X X X X L L L L L L L L (2 )
Ripple blanking H L L L L L L L L L L L L L (3)
Lamp test L X X X X X H H H H H H H H (4 )
Note 1. (1) LT IS normally kept In high.
RBI is kept open or in high in case of a decimal 0 output.
DEFINITION OF SEGMENTS
(2) When BY/RBO is low, all the segment outputs are low irrespective of the status of the other inputs.
(3) All the segment outputs are set jaw and BT/RBO is set low when. RBI. DA, Os. DC and Do are set low with IT high.
(4) When IT is low. all the segment outputs are high.
X: Irrelevant
Decimal 0 1 2 10 11 12 13 14 15
number 3 4 5 6 7 8 9
Character n
U
1
1 c l
3 1-1 c.J 5 -I
1 EI ~l C ~
u c
- C
I

Input BI IRBO -D.5-Vee V
V, Input voltage
Other inputs -0.5-+15 V
Output BI IRBO -0.5-Vee V
Other outputs -0.5 -Vee V
RECOMME!\~DED OPERJ.'.T!!\JG CO!\JD!T!O!\JS (To.=-20- +75·C. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current, outputs a ....... g VOH ~2 .4V 0 -100 J1A
IOH High-level output current, output STIR BO VOH';;'2.4V 0 -50 /-I A
VOL-O;O.4V 0 2 mA
IOL Low-level output current, outputs. a-g
VOL-O;O .SV 0 6 mA
VOL -0;0 .4V 0 1.6 mA

IOL Low-level output current, output Bi/RBO
VOL-O;O.5V 0 3.2 mA
• MITSUBISHI
-"ELECTRIC 2-279
MITSUBISHI LSTTLs
M74LS248P
ELECTRICAL CHARACTERISTICS (Ta=-20-+70·C, unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage Vee=4.7SV, Ile=-18rnA -1.5 V
Outputs a-9 Vee=4.7SV 10H= -100liA 2.4 4.2 V
Output BI/RBO VI=O .8V, VI=2V 10H= -SOliA 2.4 4.2 V
10H High-level output current Outputs a-9 Vee=4.7SV. VI=0.8V, VI=2V. VO=0.8SV -1.3 -2 rnA
IOL=2rnA 0.25 0.4 V
Outputs a-9
Vee=4.7SV IOL=6rnA 0.35 0.5 V
VI=0.8V, VI=2V IOL=1.6rnA 0.25 0.4 V
Output Bi/RBO
IOL=3.2rnA 0.35 0.5 V
Vee= 5 .25V • VI= 2. 7V 20 liA
IIH High-level input current Except input Bi IRBO
Vee=.5.25V. VI=10V 0.1 rnA
Input BIIFfi36 -1.2 rnA
ilL Low-level input current Vee=5.25V. VI=0.4V
Other inputs -0.4 rnA
los Short-circuit output current Output BI/RBO Vee=5.2SV. VO=OV -0.3 -2 rnA
Icc Supply current Vee=5.2SV (Note 21 25 38 rnA
* All typical values are at Vee= 5V, Ta= 25°C.
Note 2. Icc is measured with all inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vee=5V, Ta=2S·C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high·level, high-to-Iow-Ievel output propagation RL=4kQ 30 100 ns
tpHL time, from input DA to outputs a-g CL=15pF (Note31 30 100 ns
tpLH Low·to·high·level, high·to·low·level output propagation RL=6kQ 40 100 ns
tpHL time, from input RBI to outputs a-f CL=lSpF (Note 31 45 100 ns
INPUT Vee Yee OUTPUT
PG DUT
PRR=1MHz, t r=6ns, tf=6'ns, t w ""500ns, Vp=3Vp.p, Zo""50£1.
50Q (2) C L includes pro~e and jig capacitance
LEVELS OF
DELAY 2 a-I
--+'--'1
LEVELS OF
DELAY 3
• MITSUBISHI
.... ELECTRIC
MITSUBISHI LSTTLs
M74LS251P
8-LlNE TO 1-LlNE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT

containing an 8-line to l-line data selector/multiplexer
function and 3-state outputs.
Vee
FEATURES
• 3-state outputs DATA
INPUTS
• Complementary output provided
DATA
• Wide operating temperature range (T a=-20'--'+75°CI INPUTS
APPLICATION
equipment.
OUTPUTS !Y +-
_
Y+-
5
11 +--SA I
OUTPUT
CONTROL +--Ss SELECTION
INPUTS
FUNCTIONAL DESCRIPTION INPUT
GNO +--So
i
This IC has a data selector function which provides l-line
selection of 8 input signals and using a multiplexer function
which converts the 8-bit parallel data into serial data by
time-sharing. When 8-line signals are applied to the data Outline 16P4
inputs and 1 data is specified from among the 8 data from
selection inputs SA. S8 and Sc. the input signal is at out-
put Y and the inverted signal from output Y. When output
control input OC is set high, Y and Yare put in the high-
impedance state and the outputs are completely isolated.
M74LS251 P has the same functions and pin connections
as M74LS151 P but the latter is provided with active pull-up
resistor outputs.
BLOCK DIAGRAM
CONTROL
OUTPUT
INPUT
D2 2
D3 1
DATA
INPUTS 04 15
05 14
06 13
07 12
• MITSUBISHI
.... ELECTRIC 2-281
MITSUBISHI LSTTLs
M74LS251P
a-LINE TO 1-LlNE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT

Se Ss SA OC Do Dt D2 D3 D4 Ds D6 D7 Y Y
x x X H X X X X X X X X Z Z
L L L L L X X X X X X X L H
L L L L H X X X X X X X H L
L L H L X L X X X X X X L H
L L H L X H X X X X X X H L
L H L L X X L X X X X X L H
L H L L X X H X X X X X H L
L H H L X X X L X X X X L H
L H H L X X X H X X X X H L
H L L L X X X X L X X X L H
H L L L X X X X H X X X H L
H L H L X X X X X L X X L H
H L H L X X X X X H X X H L
H H L L X X X X X X L X L H
H H L L X X X X X X H X H L
H H H L X X X X X X X L L H
H H H L X X X X X X X H H L
Z: High-impedance state
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+7s'e, unlessotherwisenoted)
Veo Supply vol tage -O.S- +7 V
VI· Input voltage -0.5-+15 V

Tstg Storage temperature range -65- +150 'c
RECOMMENDED OPERATING CONDITIONS (Ta=-20-c- +75'C, unlessotherwisenoted)
limits
Min Typ Max
IOH High-level output current VOH~2 .4V 0 -2.6 mA
VOL:O;O.4V 0 4 rnA
VOL:O;O .5V 0 8 rnA
• MITSUBISHI
2-282 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS251P
a·LlNE TO 1·LlNE DATA SELECTOR/MULTIPLEXER
WITH a·STATE OUTPUT
Limits
Min Typ * Max

VIC Input clamp voltage VCC=4. 75V, Ilc= -lBmA -1.5 V
VCC=4,. 75V, VI=O.BV
VI=2V,loH=-2.6mA

Vcc=4.75V I 10L= 4 rnA 0.25 0.4 V
VI=O.BV, VI= 2 V I 10L= BrnA 0.35 O.S V
10ZH Off-state high·level output current VCC=5.2SV, VI=2V, Vo=2.7V 20 p.A
10ZL Off-state low-level output current VCC-S.2SV, VI-2V, Vo-0.4V -20 p.A
Vcc-5.2SV, VI=2. 7V 20 p.A
hH High-level input current
VCC=5.2SV, VI=10V 0.1 rnA
IlL Low-level input current Vcc=S.2SV, VI=0.4V -0.4 rnA
105 Short-circuit output current (Note 2) VCC=S.2SV, Vo=OV -30 -130 rnA
Icc Supply current VCC=5.25V (Note 3) 6.1 10 rnA
Iccz Supply current. all outputs off VCC- 5 •25V (Note 4) 7.1 12 rnA
* : All typical values are at Vcc=5V. Ta=25 C.· D

Note 3: Icc is measured with DC at OV and all other inputs at 4.5V
Note 4: Iccz is measured with all inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vcc=SV, Ta=2S·C, unless otherwise noted)
limits
Min Typ Max
tpLH Lo~-to-high-Ievel, high-to-Iow-level output propagation 22 45 ns
tpHL time, from inputs SA. 5s. So to outputY 18 4S ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 10 33 ns'
tpHL time,from inputs SA, SB. So tooutputy IS 33 ns
CL=lSpF (Note51
tpLH Low-to-high-Ievel, high·to-Iow-Ievel output propagation 15 2B ns
tpHL time, from inputs 0 a - D 1 to output Y 14 28 ns
tpLH Low-to-high·level, high-to-Iow·level output propagation 7 15 ns
tpHL time, from inputs 00-D7 to outputy 7 15 ns
High-level output enable time,
tPZH 11 45 ns
from input a c to output Y
RL=2kQ, CL=lSpF (NoteS)
Low-level output enable time,
tpZL 16 40 ns
from input 00 to output Y
High-level output enable time,

tpZH 11 27 ns
RL =2kQ, CL = 15 pF (Note 5)
Low-level output enable time,
tPZL 13 40 ns
from input a 0 to output V
High-level outpout disable time,

tpHZ 16 4S ns
RL=2kQ, CL= S pF (Note 51
Low-level output disable time,
tpLZ B 2S ns
High-level output disable time,

tpHZ 18 5S ns
from input 00 to output V
RL=2kQ, CL= 5 pF (NoteS)
Low-level output disable time,
tpLZ 9 2S ns
from input OC to output Y
•. MITSUBISHI
;"ELECTRIC 2-283
MITSUBISHI LSTTLs
M74LS251P
a.LlNE TO 1·LlNE DATA SELECTOR/MULTIPLEXER
WITH 3·STATE OUTPUT
Note 5: Measurement circuit TIMING DIAGRAM (Reference level = ,1.3V)
INPUT Vee
LEVELS OF
DELAY 3
PG
---4-....J1
DUT
LEVELS OF
500 DELAY 2
(1) The pulse generator (PG) has the following Symbol SWl SW2
characteristics:
PRR=lMHl, t r =6ns. tf=6n5. tw=500ns. tPZH Open Closed
Y,V
Vp=3Vp.p. Zo=500. Closed Open
tPZL
(2) All diodes are switching diodes. (trr ~ 4ns)
(3) CL includes probe and jig capacitance tPLZ Closed Closed
Closed Closed
tPHZ V,V
• MITSUBISHI
2-284 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS253P
DUAL 4·LlNE TO l·LlNE DATA SELECTOR/MULTIPLEXER

containing two 4-line to I-line data selector/multiplexer
circuits and 3-state outputs. OUTPUT
CONI~~Si: 100 -+ 1 vee
FEATURES OUTPUT
SELECTION +- 200 CONTROL
• Selection inputs common to both circuits INPUT INPUT
• Output control inputs separate for each circuit +- SA SELECTION
INPUT
• 3-state outputs
+- 2D3
• Wide operating temperature range (T a=-2(}--+75°C) DATA
INPUTS
+- 2D2
DATA
APPLICATION INPUTS
4- 2D,
equipment. OUTPUT +- 2Do
GND OUTPUT
This IC has two data selector circuits which provide I-line
selection of 4 input signal using two multiplexer circuits
which convert the 4-bit parallel data into serial data by Outline 16P4
time-sharing. When 4-line signals are applied to the data
inputs Do. DI • D2 and D3 • and 1 data is specifed from FUNCTION TABLE INo'e 11
among the data input by selection inputs SA and Ss. the S8 SA Do 0, D2 03 DC Y

input signal is output at Y. By applying 4-bit parallel data X X X X X X H Z
to data inputs Do. DI • D2 and D3 and by connecting the L L L X X X L· L
output of a synchronous divide-by-four counter to SA and L L H X X X L H
Ss. data Do. DI • O2 and D3 appear in the order of Do. D I • L H X L X X L L
D2 and D3 • synchronized with the clock pulse. SA and Ss L H X H X X L H
are common to both circuits while output control inputs H L X X L X L L:
1OC and 20C are separate. When 10C and 20C are set H L X X H X L H
high. lY and 2Y are put in the high-impedance state ("Z")
H H X X X L L L
irrespective of the status of the inputs.
H H X X X H L H
M74LS253P has the same functions and pin connections
as M74LS153P but the latter is provided with active pull-up
Z : High·impedance state
resistor outputs.
BLOCK DIAGRAM
OUTPUTS
lY 2Y Vee
J--------@
!----f- I
I
10C 100 10, 102 103 S8 SA 2Do 20, 2D2 203 200 GND
OUTPUT ---~--~ ~
OUTPUT
CONTROL DATA SELECTION DATA CONTROL
INPUT INPUTS INPUTS INPUTS INPUT
• MITSUBISHI
;"ELECTRIC 2-285
MITSUBISHI LSTTLs
M74LS253P
DUAL 4·LlNE TO I·LlNE DATA SELECTOR/MULTIPLEXER
VOO Supply voltage -0.5-+7 V

Vo Output voltage Off..tate -0.5-+5.5 'v
Limits
Min Typ Max
10H High-level output current VOH~2.4V 0 -2.6 mA

VOL~0.4V 0 4 mA
VOL~0.5V 0 8 mA
limits
Min Typ * Max
V,O Input clamp voltage VOO= 4. 75V, ho= -18mA -1.5 V
'100=4. 75V, V,=0.8V
VOH High-level autp.ut voltage 2.4 3.1 V
V,= 2V, IOH=-2.6mA

Voo=4.75V I 10L= 4mA 0.25 0.4 V
V,=0.8V, VI=.2 V I 10L= 8 mA 0.35 0.5 V
10ZH Off-state high-level output current VoO=5.25V. VI=2V. Vo=2.7V 20 J-lA
10ZL Off-state low-level output current VOO=5.25V, V,= 2 V, Vo=0.4V -20 J-lA
VoO=5:25V, V,=2.7V 20 J-lA
I'H High-level input ~urrent
VOO=5.25V, V,=10V 0.1 mA·
IlL Low-level input current Voo=5.25V, VI=0.4V -0.4 mA
lOS Short-circuit output current (Note 21 Voo=5.25V, VO= 0 V -30 -130 mA
100L Supply current, all ·outputs low VOO=5.251/ INote31 7 12 mA
ICOZ Supply current, all outputs off VoO=5.25V INote41 8.5 14 mA
* : All typical values are at Vcc=5V. Ta=25"C.·
Note 2: All measurements should be done quickly and not more tha~ one output should be shorted at a time.
Note 3: lecl is measured with all inputs at av.
Note 4: Iccz is measured with 10C and 20C at 4.5V and all other inputs at av.
SWITCHING CHARACTERISTICS (Voc= 5V, Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel, high-t~-Iow-Ievel outpu't.propagation 8 25 ns
t pHL time, from inputs Do -03 to output Y 12 20 ns
OL=15pF INote 51
tpLH Low-to-high-Ievel, high-to-Iow-Ievel ~utput propagation 12 45 ns
t pHL time, from inputs SA. S8 "to output Y 12 32 ns
tPZH Output enable tin:-e to high-level .RL=2kQ,OL=15pF INote51 11 28 ns
tPZL Output enable time to low-level RL=2kQ,OL=15pF INote 51 12 23 ns
tpHZ Output disable time from high-level RL=2kQ,OL=5pF INote 51 15 41 ns
tpl..Z Output disable time from low-level RL=2kQ,OL=5pF INote 51 9 27 ns
• MITSUBISHI
2-286 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS253P
DUAL 4-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT
Note 5: Measurementcircuit TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee
LEVELS OF
DELAY 3 _ _-+_.11
LEVELS OF
DELAY 2
Symbol SWl SW2

\PZf1 Open Closed
\PZL Closed Open
\PLZ Closed Closed
\Pf1Z Closed Closed

PRR-1MHz, t r =6ns, tf=6ns, tw=500ns. Vp = 3Vp.p'. Zo = 50n.
(2) All diodes are switching diodes. (t rr ~ 4nsl
(3) CL includes probe and jig capacitance. Y
• MITSUBISHI
.... ELECTRIC 2-287
MITSUBISHI LSTTLs
M74LS256P
DUAL 4-BIT ADDRESSABLE LATCH
DESCRIPTION
containing a dual demultiplexer circuit configured into a
4-bit latch addressable in 2-bit binary code.
SA ..... 1 Vee
FEATURES SELECT
INPUTS
t Sa ..... 2
R RESET
• Easily expandable INPUT
• May be used as a 2-bit binary-to-quaternary decoder/ DATA INPUT 10
MODE
M/C CONTROL
demultiplexer INPUT
• Active low common reset 20 DATA INPUT
• Wide operating temperature range (Ta = -20 - +75°C) 2Q3
OUTPUTS
APPLICATION 2Q2
OUTPUTS
. General purpose, for use, in industrial and consumer 2Ql
equipment
GND
This device is configured from two circuits providing the
capability to function as a 2- bit binary-to-quaternary
Outline 16P4
demultiplexer or as a 4-bit latch. The operational modes
listed below are selectable using mode control input M/C When used as an addressable latch,. SA and 58 will be
(common to both circuits) and reset inputR in combina- lecified as in the above operation, with the corresponding
tion. tch being selected. The signal present at data input D will
(1) 2-bit binary-to-quaternary decoder/demultiplexer then appear at output. When M/C transits from low to high
(2) Addressable latch (data inhibit mode), the information present at D im-
(3) Data input inhibit mediately prior to that event will be latched. When M/C is
(4) Reset low-level, changing the signal at D will also change the
When used as a 2-bit binary-to-quaternary decoder/ signal present at O.
demultiplexer and a 2-bit binary number is applied to select During the data input inhibit mode, changes applied to
inputs SA and 58, one of the (lo - 03 outputs will D will not affect 0 0 - 0 3 • and the status prior to M/C
correspond to that number, and the signal appearing at its transiting high will be held.
output will be the same as the one present at data input D. Direct reset is activated by all outputs at low-level,
All other outputs will remain low-level at this time; and regardless ofthe status of D. SA. and S8'
latch operations are not performed in this mode.
rr--------------------------------~~~--------------------------------~\
2QJ 2Q2
20 Sa SA 10 . GNO
DATA
INPUT
RESET
INPUT
'----v--------I DATA
INPUT
MODE
CONTROL
SELECT INPUTS INPUT
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS256P

Operational mode R M/C D SA S8 Qe Q, Q2 Q3
Reset L H X X X L L L L
L L L L L L L L L
L L H L L H L L L
L L L H L L L L L
Active high 4-channel
L ·L H H L L H L L
demultiplexers
L L L L H L L L L
L L H L H L L H L
L L L H H L L L L
L L H H H L L L H
Memory H H X X X Qe" Q," Q2" "Q3"
H L L L L L Q," Q2" Q3"
H L H L L H Q," Q2" Q3"
H L L H L Qe" L Q2" Q3"
H L H H L Qe" H Q2" Q3"

Addressable latch
H L L L H Qe" Q," L Q3"
H L H L H Qe" Q," H Q3"
H L L H H Qe" Q," Q2" L
H L H H H Qe" Q," Q2" H

Q 0: Indicates output status prior to input .condltions being set.
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75"C, unless otherwise noted)
Vee Supply vol'age -0.5-+7 V

Topr Operating free-air ambient temperature range -20--: +75 "C
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75"C, unlesso'herwise noted)
limits
Min Typ Max
IOH High-level output current VOH""2.7V 0 -400 p.A
VOU';0.4V 0 4 rnA
VOL~0.5V 0 8 rnA
• MITSUBISHI
"'ELECTRIC. 2-289
MITSUBISHI LSTTLs
M74LS256P
DUAL 4·BIT ADDRESSABLE LATCH
Limits
Min Typ * Max
VIC Input clamp voltage VCC=4.75V.llc- 18mA -1.5 V
High-level output voltage

, Vcc-4.75V. VI=0.8V
2.7
VOH 3.4 V
VI=2V.loH=-400/lA

Vcc-4.75V I IOL-4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
M/C 40
Vcc=5.25V. VI=2.7V /lA
Exclusive of M/C 20
M/C 0.2 mA
Vcc=5.25V. VI=10V
Exclusive of M/C 0.1
M/C -0.8
IlL Low-level input current VCC=5.25V. VI=0.4V mA
Exclusive of M/C -0.4
los Short-circuit output current (Note 2) Vcc=5.25V. Vo=OV -20 -100 mA
ICC Supply current VCC=5.25V (Note 31 20 36 mA
* : All typical values are at Vee '·5V, Ta' 25·C.
Note 2. All measurements should be done quickly. and not more than one output should be shorted at a time.
3. Icc is measured with all inputs at OV.
Limits
Symbol Parameter Test conditions. Unit
Min Typ Max
tPHL from input R to output 00-03 9 27 ns
tpLH Low-to-high-Ievel, high-to-low-Ievel output propagation 15 32 ns

tPHL time, from input 0 to output 00-03
11 21 ns
CL=15pF (Note41
tpLH Low-to-high-Ievel, high-to-Iow-Ievel 'output propagation 15 38 ns
tpHL time, from input SA. Sa to output 00-03 - 11 29 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel outp'ut propagation 14 35 ns
tpHL time, from input M/C to output 00-Q3 13 ns
24
TIMING REQUIREMENTS (Vcc=5V, Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tSU(DH) o high· level setup time to M/C 15 10 ns
th(DH) o high·level hold time to M/C 5 - 5 ns
tsu (OL) o lOW-level setup time to M/C 15 8 ns
th(DL) o low-level hold time to M/C 5 - 7 ns
tSU(5) SA, Sa setup time to M/C 15 7 ns
th (5) SA. Sa hold time to M/C 5 - 5 ns
tW(M/C) M/C pulse width 15 8 ns
tW(R) R pulse width 15 7 ns
INPUT Vee OUTPUT

fRR ' lMHz. tr' 6ns, tf' 6ns. tw' SOOns, Vp' 3Vp.p, 2 0 ' son.
PG OUT (2) CL includes probe and jig capacitance.
50Q
• MITSUBISHI
2-290 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS256P
o SA. SB
MIG
o o
. MIG
SA. SB
MIG
Note 5. Shaded area denotes the time period in which switching is possible.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS257AP
QUADRUPLE 2-L1NE TO 1-L1NE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT

The M74LS257 AP is a semiconductor integrated circuit
containing four 2-line to 1-line data selector/multiplexer
circuits and.3-state outputs.
vee
OUTPUT
FEATURES +-- OC CONTROL
• Output control input common to all four·circuits INPUT
• 3-state outputs
• Wide operating temperature range (T a=-20-+75°C)
+-- 4DoI PN";,"L~S
OUTPUT 1 Y +-- +-- 4Dl
APPLICATION 2DO.... 5 .... 4Y OUTPUT

DATA (
General purpose, for use in industrial and consumer INPUTS 2Dl--+
+-- 3DO} DATA
equipment.
+-- 3Dl INPUTS
OUTPUT 2Y +-- 7
FUNCTIONAL DESCRIPTION OND OUTPUT
This Ie has four data selector circuits which provide 1-line
selection of 2 input signals using four multiplexer circuits
which convert the 2-bit parallel data into serial data by
time-sharing. When 2-line signals 3re applied to the data Outline 16P4
inputs Do and 0 1 , and 1 data is specified from among the
data input from selection input SA, the input signal is FUNCTION TABLE INoten
output at Y.
OC SA Do Dl Y
SA and output control ~C. are common to all four
circuits. When DC is set high, 1Y, 2Y, 3Y and 4Y are put in H X X X Z
the high-impedance state irrespective of the status of the L L L X L
other inputs. L L H X H
M74LS257AP has the same. functions and pin connec- L H .x L L
tions as M74LS157P but the latter is provided with active L H X H H
pull-up resistor outputs. Note 1 X: Irrelevant

Z: High·impedance state
BLOCK DIAGRAM
OUTPUTS
lY 2Y 3Y 4Y
DC 2Dl 3Do 4Do 4Dl SA

OUTPUT SELECTION
CONTROL DATA INPUTS INPUT
INPUT
• MITSUBISHI
2-292 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS257AP
QUADRUPLE 2-L1NE TO I-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT

VI Input voltage -0.5-+ 15 V
Vo Output voltage Off·state -0.5- +5.5 V
Topr Operating free·air ambient temperature range -20-+75 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwisanoted)
Limits
Min Typ Max
10H High-level output curr~nt VOH~2.4V 0 -2.6 mA

VOL;;>O.4V 0 12 mA
VOL;;>O.SV 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+7S'C. unlessotherwisenoted)
Limits
Min Typ * Max
VIC Input clamp voltage Vcc=4.75V. 110= -18mA -1.5 V
VCC=4. 75V. VI=0.8V
VI=2V.IOH=-2.6mA

Vcc=4.75V, I IOL=12mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Vcc=5.25V. VI=2V. Vo=2.4V 20 /-lA
10ZL Off-state low-level output current Vcc=5.25V. VI=2V. Vo=0.4V -20 /-lA
00.0,.00 Vcc=S.2SV 20
/-lA
SA VI=2.7V 40
00.0,.00 VCC=5.25V 0.1
mA
SA VI=10V 0.2
00. 0 ,.00 Vcc=S.25V -0.4
IlL Low-level input cu'rrent mA
SA VI=0.4V -0.8
los Short-circuit output current (Note 2) Vcc=5.25V. Vo~OV -30 -130 mA
ICCH Supply current. all outputs high VCC=5.25V INote 31 6.2 '10 mA
ICCL Supply current, all outputs low Vcc=S.2SV (Note 41 10 16 mA
Iccz Supply current. all outputs off Vcc=5.25V (Note 51 12 19 mA
* : All typical values are at Vcc=5V, Ta=25 C. D
Note 2: All measurements should be done quickly and not more than one output should b~ sh~rted at a time.
Note 3: I CCH is measured with TIC. SA. Dl at av and Do at 4.5V . ,
Note 4: I CCl is measured with all inputs at av. I
Note 5: I ccz is measured with OC at 4.5V and all ot,her inputs at av.
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25'C. unlessotherwiseJ1oted)
Limits
Min Typ Max
t pLH Low-to-hi!iJh-level. high-to-Iow·level output propagation 6 18 ns
t pHL time, from inputs Do. 01 to output Y 8 18 ns
OL= 45pF INote 61
tpLH Low·to-high-Ievel, high'-to-Iow-Ievel output propagation 11' 28 ns
t pHL time, from input SA to outpU1 Y 11 35 ns
tPZH Output enable time to high-level RL=667Q CL =4SpF (Note 61 7 22 ns
tPZL Output enable time to low-level RL=667Q. CL =4SpF INote 61 9 35 ns
tpLZ Output disable time from low-level RL=667Q. CL =5 pF (Note 61 11 26 ns
tpHZ Output disable time from high-level RL-667Q. CL =5 pF (Note 61 8 35 ns
r:l\MITSUBISHI
~ELECTRIC 2-293
MITSUBISHI LSTTLs
M74LS257AP
QUADRUPLE 2-LlNE TO 1-LlNE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT
INPUT Vee
Symbol SWl SW2 {ll The pulse generator (PGl has the following
Open Closed characteristics:
!PZH
PRR = lMHz, tr::: 6ns, tf = 6ns, tw = 500ns,
!PZL Closed Open
Vp = 3Vp.p, Zo = 50n.
!PLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4nsl
SOQ
!PHZ Closed Closed
00,0,
OC
SA
LEVELS OF
DELAY 2 Y
LEVELS OF
DELAY 3 Y
APPLICATION EXAMPLE
4-line to 1-line data selector (multiplexer)
lY 2Y 3Y 4Y OUTPUT
SB
L L WORD a
L H WORD 1
H L WORD 2
WORD 3
I H H
lY 2Y 3Y 4Y lY 2Y 3Y 4Y
M74LS257 AP M74LS257AP
100 10, 200 20, 300 30,400 4D, SA OC 100 10, 2Da 20, 300 3D, 400 40, SA OC
SELECTION JI SB '1 Y
". INPUTS SA
YsM74LS04 P
,--
,--
!
100 200 300 400 10,20,30,40, 10, 20, 3D, 40, 103 203 3D3 403
~ '-v-----' ~ '---v-------'
DATA INPUTS DATA INPUTS DATA INPUTS DATA INPUTS
{WORD 01 {WORD 11 {WORD 21 {WORD 31
• MITSUBISHI
2-294 "ELECTRIC
MITSUBISHI LSTTLs
M74LS258AP
QUADRUPLE 2-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT (INVERTED)

containing four 2-line to 1-line data selector/multiplexer
circuits with 3-stage outputs_
vee
FEATURES +- OC
OUTPUT
CONTROL
1 00-+
DATA { INPUT
• Inverted outputs
PNAp~~S
INPUTS
• Output control input common to all four circuits 10,-+
+- 400}
• Select input common to all four circuits OUTPUT - 40 1
• 3-state outputs
200 -+ --+ 4'( OUTPUT
• Wide operating temperature range (T a=-20'-+ 75°C) DATA {
INPUTS
20, -+ +- 30 0) DATA
APPLICATION +- 3D,
INPUTS
OUTPUT 2'( +- 7
equipment_ GNO --+ 3'( OUTPUT
This IC contains four sets of circuits which are used 1-line Outline 16P4
selection 2 input signals and as both data selectors, selecting
1-line out of 2 input signals, and multiplexers which FUNCTION TABLE INotel)
convert the 2-bit parallel data into serial data by time-shar- OC Do 0, y

SA
ing. When one out of 2-line signals, which are applied to the H X X X Z
data inputs 0 0 and 0 1 , is specified by select from input L L L X H
SA, inverted signal of that appears at output Y. L L H X L
SA and output control OC are common to all four L H X L H
circuits. When OC is set high, iV, 2Y, 3Y and 4Y are put in L H X H L
the high-impedance state irrespective of the status of the
other inputs. Z : High-impedance state
M74LS258AP has the same functions and pin connec-
tions as M74LS158P but the latter is provided with active
pu II-u p resistor outputs.
BLOCK DIAGRAM
--,
OUTPUTS
Vee
OC
OUTPUT
CONTROL
INPUT
100 102 200 20, 300
DATA INPUTS
3D, 400 40, SA
SELECTION
INPUT
J GNO
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS258AP
QUADRUPLE 2·LlNE TO l·LlNE DATA SELECTOR/MULTIPLEXER
WITH 3·STATE OUTPUT (INVERTED)

Vo Output voltage Off-state -0.5-+ 5.5 V
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C, unlessotherwisenoted.)
Limits
Min Typ Max
Veo Supply voltage 4.75 5 5.25 V
10H High-level output current VOH:;;;2.4V 0 -2.6 mA

VOL~0.4V 0 12 rnA
VOL~0.5V 0 24 mA
Limits
'Min Typ * Max
V,e Input clamp voltage Voo=4.75V, "0= -18mA -1.5 V
Voo=4.75V, V,=0.8V
V,=2V,loH=-2.6mA

Voo=4.75V I 10L= 12rnA 0.25 0.4 V
V,=0.8V, V,C"2V I IOL=24rnA 0.35 0.5 V
10ZH Off-state high-level output current Voo=5.25V, V,=2V, Vo=2.7V 20 I1A
10ZL Off-state low-level output current Voo=5.25V, V,=2V, Vo=0.4V -20 I1A
OO,O"OC Voo=5.25V 20
I1A
SA V,=2.7V 40
"H
Do, 0" OC VoO=5.25V 0.1
rnA
SA V,=10V 0.2
°O,O"OC Voe=5.25V -0.4
"L Low-level input current rnA
SA V,=0.4V -0.8
los Short-circuit output current (Note 2) VoO=5.25V, Vo=OV -30 -130 mA
IOOH Supply current, al! outputs high Voe=5.25V INote 3) 4.5 7 rnA
100L Supply current, all 'outputs low VOO=5.25V INote 4) 8.8 14 rnA
Icez Supply current, all outputs off Voo=5.25V INote 5) 12 ,19 rnA
*: All typical values are at Vee::: 5V, Ta::: 25°C.
Note 3: I CCH is measured with all inputs at av.
Note 4: I CCl is measured with OC, SA and 0 1 at OV and Do at 4.5V.
~ote 5: I ccz is measured with OC at 45V and all other inputs at av.
Limits
Min Typ Max
tpLH Low-to·high-Ievel, high·to-Iow-Ievel output propagation 5 18 ns
-
tpHL time, from inputs Do. 01 t6 output Y 8 18 ns
CL=45pF INote 6)
-
t PHL time. from in'put SA to output Y 16 35 ns
tpZH Output enable time to high-level RL=667Q, CL =45pF INote 61 7 22 ns
tpZL Output enable time to low-level RL=667Q, CL=45pF INote61 12 35 ns
tpLZ Output disable time from Jow-Ievel RL=667Q, CL = 5 pF INote 61 11 26 ns
tpHZ Output disable time from high-level RL=667Q, CL = 5 pF INote 61 8 35 ns
• MITSUBISHI
2-296 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS258AP
QUADRUPLE 2-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUT (INVERTED)
Note 6: Measurementcircuit TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee
LEVELS OF
DELAY 2 _ _-1.,.....-1
LEVELS OF
DELAY 3
Symbol SWl SW2
!PZH Open Closed
!PZL Closed Open
!PLZ Crosed Closed
!PHZ Closed Closed

PR R = 1MHz, t r =6ns, t,=6ns, t w =500ns, Vp=3Vp.p, Zo=50n.
(2) All diodes are switching diodes.
(3) ~L includes probe and jig capacitance
• MITSUBISHI
"'ELECTRIC 2-297
MITSUBISHI LSTTLs
M74LS259P
8·BIT ADDRESSABLE LATCH
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)·
containing 8 latch circuits and a demultiplexer which
designates the latches with a 3-bit binary code.
Vee
FEATURES SELECT ( RESET INPUT
INPUTS
• Easy bit expansion MODE
CONTROL
• Usable as 3·bit binary/octal decoder/demultiplexer INPUT
• Direct reset input provided DATA INPUT
OUTPUTS
APPLICATION
OUTPUTS
equipment.
GND
This device is composed of a 3-bit binary/octal de·
multiplexer and 8 latch circuits. The following operational Outline 16P4
modes can be selected by combining the mode control
input M/C with the reset input R" D appears in one of the outputs 00 ~ 0 7 corresponding to
(1) 3·bit binary/octal M/C: Low; that number and all the other outputs are set low. There is
decoder /demu Itiplexer R": Low no latch operation in this mode.
(2) Addressable latch M/C: Low; When used as an addressable latch and inptus SA ~ Sc
R": High are designated as above, the corresponding latch is selected
(3) Data input inhibit M/C: High and the same signal as D appears in the output. When M/C
R": High changes from low to high (data inhibit model. the
(4) Reset M/C: High;
information from the data input D immediately before the
R: Low
change is latched. When M/C is low, the signal appearing in
When this device is used as a 3·bit binary/octal decoder/
demultiplexer and the select inputs SA ~ Sc are designated
o is also changed if the signal D is changed.
In the data input inhibit mode 0 0 ~ 0 7 do not change
by a 3·bit binary number, the same signal as the data input
06 05 00 ' Vee
R
RESET INPUT DATA MODE
SELECT INPUTS INPUT CONTROL INPUT
• MITSUBISHI
2-298 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS259P
a·BIT ADDRESSABLE LATCH
even if D is changed and the status before M/C is set high is

held.
With direct resetting, all the outputs are reset low ir·
respective of the status of D and SA ~ Sc.
FUNCTION TABLE (Note II
Operational mode R MIG 0 SA S8 Se 00 01 02 03 O. 05 06 07
Reset L H X X X X L L L L L L L L
L L L L L L L L L L L L L L
L L H L L L H L L L L L L L
L L L H L L L L L L L L L L
3-bitbinary/octal
decoder/demult iplexer L L H H L L L H L L L L L L
:
L L L H H H L L L L L L L L
L L H H H H L L L L L L L H
Data input inhibit H H X X X X 000 010 020 030 0.0 050 06 0 070
H L L L L L L 01° 020 030 0,0 050 060 07 0
H L H L L L H 010 020 030 0. 0 050 060 07 0
H L L H L L 000 L 020 030 0. 0 050 060 070

Addressable latch H L H H L L 000 H 020 030 0,0 050 060 07 0
:
H L L H H H 000 010 020 030 0,0 050 060 L

H L H H H H 000 010 020 030 0.0 050 060 H
QO: Level of Q before the indicated steady-state input conditions were established.
Symbol Parameter Conditions Li"mits Unit

Vo Output voltage High-level state -0:5- Vee V
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75·C. unless otherwise noted)
"
Limits
Min Typ Max
IOH High-level output current VOH~2. 7V 0 -400 "A

VOL~O.4V 0 4 rnA
VOL~O .5V 0 8 rnA
• MITSUBISHI
I.. ELECTRIC 2-299
MITSUBISHI LSTTLs
M74LS259P
a-BIT ADDRESSABLE LATCH
ELECTRICAL CHARACTERISTICS (Ta =-20-+75·C. unless otherwise noted)
Limits
Min Typ * Max
VIC Input clamp voltage VCC=4. 75V • IIC = -lamA -1.5 V
VcC=4.75V. vl=o.av
VI=2V.loH=- 400 IlA

Vcc=4.75V I IOL=4rnA 0.25 0.4 V
VI=O.BV. VI=2V I 10L=BrnA 0.35 0.5 V
Vcc=5.25V. VI=2.7V 20 /.lA
Vcc=5.25V. VI=10V 0.1 rnA
IlL Low·level input current Vcc=5.25V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 21 Vcc=5.25V. VO=OV -20 -100 rnA
Icc Supply current VCC=5.25V INote 31 22 36 rnA
* : All tYPical values are at Vee = 5V. Ta = 25"C
Limits
Min Typ Max
tpHL 9 27 ns.
R to outputs 00-Q7
tpLH Low-to·high-Ievel, high·to-Iow-Ievel output propagation 15 32 ns
tpHL time, from input Oto outputSQO-Q7 12 21 ns
GL= 15pF
tPHL time. from inputs SA, S e, Seta outputs Qo- Q7 12 29 ns
tpHL time from input MIG to QutputSQO-Q7 13 24 ns
TIMING REQUIREMENTS (Vcc=5V. Ta=25·C. unlessotherwisenoted)
Limits
Min Typ Max
tsu (DH) Setup time D high to MIG 15 10 ns
th (DH) Hold time D high to MIG 5 -5 ns
tsu (DL) Setup time 0 low to MIG 15 a ns
th (DL) Hold time D low to MIG 5 -7 ns
tSU(S) Setup time SA. S8 to M/C 15 7 ns
th (s) Hold time SA. S8. to M/C 5 -5 ns
tW(M/C) M/C input pulse width 15 a ns
tW(R) R input :pu IS8 width 15 7 ns

INPUT Vee OUTPUT
(1) The pulse' generator (PG) has the following

OUT characteristics:
PG
PRR = 1MHz, tr ::: 6n5. tf ,= 6n5. tw = 500n5,
Vp " 3Vp.p. Zo " 5012.
50~1 (2) CL includes probe and jig capacitance.
• MITSUBISHI
2-300 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS259P
a-BIT ADDRESSABLE LATCH
M/C
D
D
M/C
M/c
APPLICATION EXAMPLE
16-bit addressable latch
r -________________________OUTPUTS
________________________
~A~ ~
M74LS259P M74LS259P
o Mic D M/C
1/4 M74LSOOP 1/4

M74LSOOP
D So So S8 SA M/C R
'----v-----' MODE RESET
OATA INPUT SE LECT INPUTS CONTROL· INPUT
INPUT
• MITSUBISHI
.... ELECTRIC 2-301
MITSUBISHI LSTTLs
M74LS266P
QUADRUPLE 2-INPUT EXCLUSIVENORGATE

containing four integral open-collector output circuits
configured into dual input exclusive NOR gates_
FEATURES 1A -+ Vee
• "wire-AND" capability
INPUTS 1
16 ,.....
• Capable of gating high output voltages (V o ~ 7V)
1Y'+-
• Low power dissipation (Pd =40mW typical) OUTPUTS {
• Wide operating temperature range ITa = -:20 - +75°C) 2Y +-
2A -+
APPLICATION INPUTS 1
General purpose, for use in industrial and consumer 26 -+ +- 3A IINPUTS
equipment j
GND +- 36
The use otopen-collector output circuits in this device gives * : OPEN COLLECTOR OUTPUT
the user the option of varying high-level output impedal')ce
via an external resistance_ It is thus possible to implement Outline 14P4
an AND tie which is not possible in conventional gates.
When both inputs A and, B are either high or 'low- CIRCUIT DIAGRAM (Applicable to each gate)
level, output Y goes high-level. Conversely, when A and B
are high - low, or low - high with respect to each other, Y
will be low-level. r---~~--~~~~-----oVee
FUNCTION TABLE
A B Y
y
L L H OUTPUT
H L L
L H L
----
H H H
~~------~------~--~~~GND
UNIT: Q
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C, unlessotherwisenoted)

VI Input voltage -0.5 - +15 V
Topr . Operating free-air ambient temperature range -20- +75 'C
• MITSUBISHI
2-302 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS266P
QUADRUPLE 2·INPUT EXCLUSIVE NOR GATE
RECOMMENDED OPERATING CONDITIONS (Ta = -20 - + 75'C , unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current Vo =5.5V 0 100 pA
VOL::;;i0.4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20- + 75'C , unlessotherwi,e noted)
Limits
Min Typ.* Max
VIC Input clamp voltage Vee=4.75V.IIC=-18mA -1.. 5 V
Vec=4.75V. VI=0.8V
IOH High-Ieve"' output current 100 pA
VI=2V. Vo=5.5V

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
Vcc=5.25V. VI=2. 7V 40 pA
IIH High·lev~1 input current
Vcc=5.25V. VI=10V 0.2 mA
IlL low· level input current Vec=5.25V. VI=0.4V -08 mA
Icc Supply current Vec=5.25V (Note 1) 8 13 mA
* : All typical values are at Vee:::: 5V. Ta = 25°C.
Note 1. ICC is measured with one input of each gate at 4.5V, the other inputs grounded; and the outputs open.
SWITCHING CHARACTERISTICS (Vce=5V, Ta=25'C, unlessotherwi,enoted)
Limits
Min Typ Max
tPLH RL= 2 kQ 16 30 ns
CL = 15pF Other i~put low-level (Note 2) 16 ns
tPHL Low-to·high-Ievel, high·to-Iow·tevel output 30
propagation time RL - 2 kQ 14 ns
tPLH 30
CL=15pF Other input high-level (Note 21 14 30 ns
tPHL
Note 2. Measurement Circuit TIMING DIAGRAM (Reference level = 1,3V)
A or B
RL
PG DUT BorA
5012
7!T r CL y
(1) The pulse generator has the following

characteristics: PRR = lMHz, tr = 6ns. tf = 6ns,
tw = 500n" Vp =3Vp.p, Zo =501l.
• MITSUBISHI
.... ELECTRIC 2-303
MITSUBISHI LSTTLs
M74LS273P
OCTAL POSITIVE EDGE·TRIGGERED D·TVPE FLIP FLOP WITH RESET

containing 8 D-type positive edge-triggered flip-flop circuits DIRECT RESET
vee
INPUT
with common direct reset and clock inputs_
OUTPUT .... 8Q OUTPUT
FEATURES lO .... 3 80 1DATA

DATA f +-
• Positive edge-triggering INPUTS I20 .... 4 +- 70 f INPUTS
• High mounting density with 8 circuits contained
• Direct reset and clock inputs common to all 8 circuits f 2Q +- 5 .... 7Q I
• Wide operating temperature range (Ta'; -20~+75°C)
OUTPUTS I /
OUTPUTS
3Q +- .... 6Q
30 .... 7
APPLICATION DATA /
INPUTS I 40 .... 8
equipment_ OUTPUT 4Q +- 9 OUTPUT
CLOCK
FUNCTIONAL DESCRIPTION GNO INPUT
This device contains 8 edge-triggered D-type flip-flop

Outline 20P4
circuits and it is provided with direct reset Ro input and
clock input T common to all 8 circuits_ When T changes in
each flip-flop from low to high, the data input signal D FUNCTION TABLE (Notell
immediately before the change appears in output O. Ro T 0 Q

When Ro is set low, 10 through 80 are all set loiN L X X L
irrespective of the status of the ID through 8D and T
H t H H
signals. For use as a D-type flip-flop, Ro must be kept in
high.
H t L
I
L
H L X QO
Note 1 t : Transition from low to high (positive edge
trigger)
Q 0: Level of 0 before the indicated steady-state
input conditions were established.
X : Irrelevant
BLOCK DIAGRAM
OUTPUTS
____________________ ________________________________
~
~
A
~
lQ 2Q 3Q 4Q 5Q 6Q 7Q
CLOCK
INPUT
D~~~g Ro 1
INPUT
10 20 3D 40 50 60 70 80 GNO
~------------------~----~y~--------------------------~
DATA INPUTS
• MITSUBISHI
2-304 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS273P
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET

RECOMMENDED OPERATING CONDITIONS (1'a=-20- +7S'C, unlessotherwisenoted)
Limits
Min Typ Max

10H High-level output current VOH;;:'2.7V 0 -400 p.A
VOL~0.4V 0 4 mA
10L Low-revel output current
VOL~O .5V 0 S mA
ELECTRICAL CHARACTERISTICS (Ta =-20- +75'C, unless otherwise noted)
Limits
Min Typ * Max
VIL Low-level input voltage O.S V'
VIC Input clamp voltage Vee=4.75V.lle=-ISmA -1.5 V
Vee=4. 75V. VI=O.SV
VI=2V. I OH= -400p.A

Vee=4.7SV I IOL=4mA 0.25 0.4 V
VI=O.SV. VI=2V I 10L-SmA 0.35 0.5 V
Vee=5.2SV. VI=2.7V 20 p.A
Vee=5.25V. VI=10V 0.1 mA
IlL Low-level input current Vee=5.2SV. VI=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vee=5.25V. VO=OV -20 -100 mA
Icc Supply current Vee=S.25V INote 3) 17 27 mA
* : All typical values are at Vee=5V, Ta=2S'C
Note 3: Icc is measured after 10"" 80 and AD
are made 4.5V and T has been changed from OV to 4.5V.
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25'C. unlessotherwisenoted)

.1
Limits
Min Typ Max
tpLtl Low·to-high-level, high-to-Iow-level output propagation 12 27 ns
tpHL time, from T to 1 Q-SQ CL=ISpF INote4) 13 27 ns
High-to-Iow-Ievel output propagation tirne, from
tPHL 15 27 ns
RotolQ-SQ
INPUT Vee OUTPUT
PG DUT II) The pulse generator IPG) has the following

cha racter isti cs:
PRR "" 1MHz, tr a·6ns, tf "'" 6ns. tw = 5OOns,
50Q Vp =3Vp.p, Zo =50!}.
12) CL: includes probe and jig capacitance.
• MITSUBISHI
.... ELECTRIC 2-305
MITSUBISHI LSTTLs
M74LS273P
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET
TIMING REOUIREMENTS eVcc=5V, Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
tW(Ro) Direct reset pulse width 20 6 ns
tst) (D) Setup time 10 -80 to T 20 7 ns
th(D) Hold time 1 0-80 to T 5 -3 ns
trec(Ro) Recovery time R D to T 25 8 ns
10-80 T
lQ-8Q 1Q-8Q
Note 5: The shaded areas indicate when the input is permitted to change for pre-
dictable output pe,rformance.
• MITSUBISHI·
2-306 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS279P
QUADRUPLE R-S LATCH

The M74L5279P is a semiconductor integrated circuit I
containing 4 R-5 flip-flop circuits_
.1
FEATURES
•
•
High breakdown input voltage (VI ~ 15V)
High breakdown output voltage (Va ~ 7V)
INPUTS
\
1:
1R -+
-+
1
+-
+- 4R
vee
4S}
_ INPUTS
• Low power dissipation (Pd = 19mW typical) 152 -+
• Low output impedance OUTPUT 1Q _ 4 -+ 4Q OUTPUT

iR
INPUTS [ _
-+
+- 351)
APPLICATION 25 -+ +- 3~ INPUTS
General purpose, for use in industrial and consumer OUTPUT 2Q +- +- 3R

equipment.
GND -+ 3Q OUTPUT
Two of the 4 circuits have set inputs 51 and 52 and reset
input R and the other 2 circuits have 5 and R inputs. Outline 16P4
When"S;" or 52 or both are low or 5 is low, high appears
in output Q, and when R is low, low appears in output Q. FUNCTION TABLE (Note 1)
When ~ or 52 or both are low and R is low, high appears 51 52 R Q
in the output but when each of the inputs is set high at the L X L H*
same time, the status of Q cannot be anticipated. X L L H*

L X H H
X L H H
H H L L
H H H QL
Note 1 QO: Level of Q before the indicated steady-

state input conditions were established
X: Irrelevant
*: Nonstable. it will not persist when R,51
and 52 return to their inactive (high)
level
CIRCUIT SCHEMATIC (EACH LATCH)
r---~------------~~----~------~~~O~e
RESET INPUT Ro-...,....------~~-+--_i
YNr-+--t--Q Q OUTPUT
SET INPUTS {s'51

_
52o-~+-~~r---------+-----r-~
~~~-+--------~~---4------------------~----+-+--oGND
UNIT: Q
• MITSUBISHI
...... ELECTRIC 2-307
MITSUBISHI LSTTLs
M74LS279P
QUADRUPLE R-S LATCH
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C, .unlessotherwisenoted)
Vee Supp1x voltage -0.5-+7 V

RECOMMENDED OPERATING CONDITIONS (Ta = -20- +75"C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply, voltage 4.75 5 5.25 V
10H High-level output current VOH;?;2.7V 0 -400 pA

VOL~0.4V 0 4 rnA
VOL~0.5V 0 8 rnA
Limits
Min Typ * Max

V,e Input clamp voltage Vee=4.75V,I,c=-18rnA -1.5 V
Vec=4. 75V, V,=0.8V
VOH High-jeve! output voltage 2.7 3.4 V
V,=2V,IOH=-400pA

Vec=4.75V I IOL=4rnA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V
20 pA
V,=2.7V
Vee=5.25V
0.1 rnA
V,=10V
Vec=5.25V
"L Low-level input current -0.4 inA
V,=0.4V
los Short-circuit output current (Note 2) Vce=5.25V, VO=OV -20 -100 rnA
ICC Supply current Vcc=5.25V (Note 3) 3.8 7 rnA
* : All typical values are at VCC=5V, Ta=25'C
Note 3: Icc is measured with all R'inputs at OV and all S inputs at 4.5V.
SWITCHING CHARACTERISTICS (Vec=5V, Ta=25"C, unless otherwise noted )
Limits
Min Typ Max
tpLH Low·to-high-Ievel, high-to·low-Ievel output propagation 6 22 ns
-
tpHL time, from input S tO,output Q 12 21 ns
CL= 15pF (Note4)
High·to-Iow·level output propagation time, from input
tpHL 12 27 ns
Rto output Q
• MITSUBISHI
2-308 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS279P
QUADRUPLE R-S LATCH
INPUT Vee OUTPUT

characteristics:
PRR = 1MHz, I, = 6ns, If = 6ns, Iw = 500ns,
Vp = 3Vp.p, Zo =500.
(2). CL includes probe and jig capacitance
SD
RD
APPLICATION EXAMPLE
Chattering prevention circuit
Vee
10k 10k
P--~_-- __ Q
)'.iM74LS279P
• MITSUBISHI
;"ELECTRIC 2-309
MITSUBISHI LSTTLs
M74LS280P
9-BIT ODD/EVEN PARITY GENERATOR/CHECKER

containing a 9-bit parity generator/checker function.
FEATURES
{
• Easy expansion of bits with cascade connection D6~ 1 Vee
DATA INPUTS
• Wide operating temperature range (Ta=-20~+75°C) D7~
NC
APPLICATION
General purpose, for use in industrial and consumer OATA INPUT
DATA INPUTS
equipment. EVEN OUTPUT
ODD OUTPUT
This device is provided with both a 9-bit parity generator GND
and checker functions. For use as a parity generator, parity
outputs in even output ~E and odd output ~oare obtained
in accordance with the function table, depending on NC : NO CONNECTION
whether the number of high-level data in the inputs is even Outline 14P4
or odd when 9-bit data are applied to data inputs Do~D8.
For use as a parity checker, one of the 9-bit data input~
is used for the even or odd parity designation and the
remaining 8 bits are used as the data.
FUNCTION TABLE
~ui~g~r ~~t~~gh.level data 2:E 2:0
Everrnumber H L
Odd number L H
BLOCK DIAGRAM
I
DATA
INPUTS
~-----
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS280P
9-BIT ODD/EVEN PARITY GENERATOR/CHECKER
ABSOLUTE MAXIMUM RATINGS (Ta= -20- +75l:, unlessotherwisenoted)

Va Output voltage High-level state -0.5-Vee V
Topr Operating free-air ambient temperature range -20-+75 l:
Tstg Storage temperature range -65-+150 l:
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75l:, unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH;<:2.7V 0 -400 "A

VOL"'0.4V 0 4 rnA
VOL"'0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75l:, unless otherwise noted)
Limits
Min Typ * Max
V'c Input clamp voltage Vee=4.75V, l,e=-18rnA -1.5 V
Vee=4.75V. V, =0.8V
V, =2V. IOH=-400"A
VOL Low-level output

Vee=4.75V I IOL=4rnA 0.25 0.4 V
V, =0.8V. V, =2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V, VI=2.7V 20 "A
I'H
Vee=5.25V, V, =10V 0.1 rnA
I,L Low-level input current Vee=5.25V. V, =0.4V -0.4 rnA
loS Short-circuit output current (Note 1) Vee=5.25V. VO= 0 V -20 -100 rnA
Icc Supply current Vee=5.25V INote 21 16 27 rnA
* All typical values are at Vce= 5V, T a= 25° C.
Note 2: Icc is measure.d with all inputs at av.
Limits
Symbr ' Parameter Test conditions Unit
Min Typ Max
time, from inputs Do - 08 to output :i.E 17 45 ns
tPHL
CL = 15pF INote 31
time, from inputs DO - 08 to output 20 17 50
tPllL flS
INPUT Vee OUTPUT

PRR=lMHz, t r =6ns, tf=6ns, t w =500ns. Vp=3Vp_p, Zo=50fl.
I
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS280P
9·BIT ODD/EVEN PARITY GENERATOR/CHECKER
LEVELS OF
DELAY 2
LEVELS OF
DELAY 3
APPLICATIONS EXAMPLES
(1) 25-line parity generator/checker (2) 81-line parity generator/checker
Do Do
00 Do
Dl Dl a.Q ~E
Dl
D2
Dl a. ~E
D2
...
Q
D2 D2 co
DATA D3
D4
D3
D4
...
co
(J)
D3
D4
D3
D4 (J)
INPUTS· .J
05
D6
Ds
D6
.J
;:! ~o.
Ds
D6
D7
Ds
D6
D7
.......:::E ~o
D7 D7 :::E
D8 D8
D8 D8
D9 Do Do HIGH:
HIGH:
a. ~~
r
~ ~E EVEN NUMBER 0'0 01 Dl a. ~E
EVEN NUMBER
... LOW:
Q
...
Dll D2 Q
DATA
INPUTS
DlO
D
11
...In
co LOW:
ODD NUMBER D12
D13
D2
D3
D4
co
(J)
D3
D4
co
(J)
ODD NUMBER
D12 .J .J
D13
D14
.J
....
Sl ~o
HIGH: DATA D14
ODD NUMBER· INPUTS D1S
Ds
D6
.......:::E ~o
Ds
D6
....
Sl ~o
HIGH:
ODD NUMBER
D16 D7 D7 LOW:
D1S LOW:
D17 D8 D8 EVEN NUMBER
EVEN NUMBER
D16 Do D18 Do
D17 Dl a. D19 Dl a.Q ~E TO M74LS280P
... D20
Q
DATA
INPUTS
D18
D19
D2
D3
co
(J)
D21
D22
D2
D3
D4
...
co
(J)
D20 D4
.J .J
D21
D22
Ds
D6
.......:::E ~o
D23
D24
D2S
Ds
D6
D7
.......:::E ~o
D23 D7
D24 D26 D8
D8
• MITSUBISHI
2-312 . .... ELECTRIC
MITSUBISHI LSTTLs
M74LS283P
DESCRIPTION
containing a 4-bit full adder function using the look-ahead
carry method of operation.
OUTPUT 2:2 - ,
FEATURES
• Full-carry look-ahead across the four bits 82""-+ 2
INPUTS {
• Systems achieve partial look-ahead performance with the A2-+
economy of ripple carry
• Wide operating temperature range (Ta = -20 ~ +75°C) OUTPUT 2:1 - 4
Al-+ 5
APPLICATION INPUTS {
81-+
equipment CAARY OUTPUT
INPUT
CARRY
FUNCTIONAL DESCRIPTION OUTPUT
This device functions as a 2-group, 4-bit binary adder with
full adder capability. When a 4-bit binary number is applied
to input A, thru A4 or 8 1 thru 8 4 and a carry signal from Outline 16 P4
the previous .column is applied to input Co, the sum output
for the respective bits will appear at output ~1 ~ ~4; and
carry output to the following column will appear at C4 -
The full adder capability of this device is also complete
with full look-ahead carry operations, and its high speed
means that a 4-bit carry. output is produced at an average
rate of Bns (typical). Thus, when N-stages are configured
for parallel addition of an N-number of 4-bit inputs, a carry
output can be obtained with a 8Nns delay time. (See the
application example provided in the back of this specifica-
tion sheet_) Also provided is the M74LS83AP with the same
functions and electrical characteristics. This device differs
only in its pin configuration.
BLOCK DIAGRAM ~_ _ _ _ _ _ _O~UT~_UT_S_ _ _ _-,--_ _ _~ CARRY OUTPUT

( 2: 1 04
GND
• MITSUBISHI
.... ELECTRIC 2-313
MITSUBISHI LSTTLs
M74LS283P
Ck·1 Ak 8k L:k Ck
L L L L L
L H L H L
Note 1. ~K and CK are the sum and carry output calculated in response to
L L H H L
input at AK, BK, and CK-l (carry input). derived from the following
L H H L H logical equation.
1:K = AK ® BK ® CK.1
H L L H L
CK = AK'BK + (AK + BKI'CK.1
H H L L H (Where K = 1-4; ® = Exclusive OR; + = OR; • = ANDI
H L H L H
H H H H H
ABSOLUTE MAXIMUM RATINGS (Ta= -20- +7S'C, unlesso1herwise noted)
Vee Supply voltage -O.S- +7 V

VI Input voltage "O.S- +1S V
Topr Operating free-air ambient temperature range -20-+7S 'C
RECOMMENDED OPERATING CONDITIONS (Ta= -20- +7S'C, unless otherwise noted)
limits
Min Typ Max
Vee Supply voltage 4 .7S 5 5.25 V
10H High·level output current VOH;::'2.7V 0 -400 p.A
VOL"; 0 .4V 0 4 mA
VOL";0.5V 0 , 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20- +75'C, unless otherwise noted)
limits
Min Typ * Max
VIC Input clamp voltage Vee-4.75V.IIC-- 18mA -1.5 V
Vee=4.75V. VI-0.8V
VI=2V.loH=-400J,A

Vee= 4. 75V I IOL=4mA 0 .25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
Co 20
Vee=5.25V. VI=2.7V p.A
A,-A4. 8,-84 40
Co 0 .. 1
Vee=5.2SV. VI=10V mA
A,-A4. 8,-·84 0.2
Co -0.4
IlL Low-level input current Vee=5 .25V. VI=O .4V mA
A,-A4. 8,-84 -0.8
lOS Short-circuit output current (Note 2) Vec-5.25V. Vo-OV -20 -laO mA
Vee-5.25V, VI- OV 22 39
Icc Supply current Vee-S.2SV, VI- OV, VI- 4.5V(Note31 19 34 mA
Vee-S.25V, VI-4.SV 19 34
* . All tYPIcal values are at Vee - 5V, T a = 25 C.0
Note 3. Iccis measured with B1 -- B4 at OV and with all other inputs 4.5V.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS283P
SWITCHING CHARACTERISTICS (Vee=SV. T a =2S·C. unlessotherwisenoted)
Limits
Min Typ Max
tPHL time, from input Co to outputs 1.:, -1:4 13 24 ns
tpLH Low-to-high-Ievel, high-to-Iaw-Ievel output propagation 9 24 ns
tpHL time, from inputs Al-~ or 8,-84 to outputsl:,-E4 11 24 ns
CL=15pF (Note 4)
tPHL time, from inputs Co to output C4 8 22 ns
tpHL time, from inputs A,-A4 or 8,-84 to output C4 8 17 ns
Note4. Measurement Circuit

INPUT Vee OUTPUT
PG 1--+--., DUT
5012 LEVELS
(1) The pulse generator (PG) has the iollowing

I CL OF
DELAY 2 ----i-JI
LEVELS
characteristics: PAR == lMHz. tr = 6ns, tf == 6ns. OF
tw = 500ns. Vp = 3Vp_p. Zo = 50n. DELAY 3
CARRY
INPUT
r
M74LS283P
APPLICATION EXAMPLE Co
Al
The· accompanying diagram shows an N-number of ~1 20
21 A2
M74LS283P devices connected in parallel for addition of an SUMMAND 22 A3
~2 21
r
N-number of 4-bit inputs. Typical delay times for carry 23 A4
output in this circuit configuration are listed below. This 81
~3 22
figures indicates the suitability of this device for use in a 21 82
high-speed adder employing the ripple-carry method. ADDEND 22
83
~4 23
23 84
N=l (4 bits) 10.5n5 C4
r
N=2 (8 bits) 21n5 M74LS283P
CO
N=3 (12 bits) 31.5n5 Al
~1 24
N=4 (16 bits) 42n5 25 A2
SUMMAND 26 A3
N=8 (32 bits ) 84n5 ~2 25
27 A4
8t
r-
~3 26
25 82
A[lDEND 26 83
~4 27 SUM
27 84 OUTPUT
INPUT 04
I
: TO NEXT-STAGE Co
FROM PREVIOUS
STAGE C4
{"'.
M74LS283P
Co
Al
~1 24N-4
SUM 24N-3 A2
MAND
24N-2 A3
~2 24N-3
r"
24N-l A4
81
~3 24N-2
ADD 24N-3 82
END 24N-2 83
~4 24N-l
24N- t 84
C4
CARRY OUTPUT
.• MITSUBISHI
"'ELECTRIC 2-315
MITSUBISHI LSTTLs
M74LS290P
DECADE COUNTER

The M74L5290P is a semiconductor integrated cirucit
direct reset and direct 9-set inputs_
DIRECT
FEATURES M5+ SO(9)1 - . 1 Voo
• Direct 9-set inputs provided NC 4- R02} DI RECT
RESET
• Usable independently as binary and divide-by-5 counter DIRECT
4- ROI INPUTS
9 SET SO(9)2 - . 3
• High-speed counting If max = 75MHz typical) INPUT
• Wide operating temperature range ITa= -20~+75°C)
OUTPUTS {
Q04-"4 11 4- 12}
_
CLOCK
INPUTS
QB 4- 4- Tl
APPLICATION
General purpose, for use in industrial and consumer NC QA}
Qo OUTPUTS
equipment. GND
This device is composed of independent binary and
Outline 14P4 NC : NO CONNECTION
and OB, Oc and OD are employed for use as a divide-by-5
counter. When employed as a decade counter, OA and T2
are connected and by making Tithe input, the BCD code
output appears in outputs OA, OB, Oc and OD. Counting is
performed when =r; and T2 are changed from high to low.
The binary and divide-by-5 counters can be reset or set
to 9 simultaneously by setting direct reset inputs R D1 and
RD2and direct 9 set inputs 5D(9)1 and 5D(9)2 high. For
use as a counter, either RD1 or RD2, or both, and 5D(9)1
or 5D(9)2 , or both, are set low.
Also provided is the M74L590P with the same functions
and electrical characteristics. This device differs only in. its
pin configuration.
BLOCK DIAGRAM
OUTPUTS
DIRECT 9 SET {SO(9)1 1

INPUTS
So (9)2 3
CLOCK INPUT 11
DIRECT { ROI
RESET
INPUTS R02
CLOCK INPUT
GND
• MITSUBISHI
2-316 "ELECTRIC
MITSUBISHI LSTTLs
M74LS290P
DECADE COUNTER
T R01 Ro2. S0(9)1 S0(9)2 QA QB Qe Qo Count number QA QB Qe Qo

x H H L X L L L L 0 L L L L
X H H X L L L L L 1 H L L L
X X X H H H L L H 2 L H L L
~ L X L X Count 3 H H L L
~ X L X L Count 4 L L H L
~ L X X L Count 5 H L H L
~ X L L X Count 6 L H H L
Note 1: Transition from high to low 7 H H H L

X Irrelevant S. L L L H
9 H L L H
( 1) Valid when QA and T2 are connected and T 1 is made the input

Inputs Tl. T2 -0.5-+5.5
V" Input valtae V
Inputs R01. R02. SO(9)1, S0(9)2 -0.5-+15
RECOMMENDED OPERATING CONDITIONS (Ta=-2D-'-+75'C. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH~2.7V 0 - 400 pA
VOL;i;0.4V 0 4 mA
VOL;i;0.5V 0 B mA
Limits
Min Typ * Max
V'L Low-level input voltage O.B V
V'C Input clamp voltage Vce=4.75V. I,e= -1BmA -1.5 V
Vce=4.75V. V,=O.BV
V,= 2V. IOH=-400pA
Vec=4.75V l'oL =4 mA (Note 21 0.25 0.4 V
VOL Low-level output voltate
V,=O.BV. V,= 2V I'OL=B mA(Note21 0.35 0.5 V
Ro,. R02. SO(9)1. S0(9)2 20
T, Vee=5.25V. V,=2.7V 40 /1-A
High-level T2 BO
IIH input current
T1 0.2
Vee=5.25V. V,=5.5V mA
T2 0.4
R01. R02. SO(9)1. S0(9)2 Vee=5.25V. V,= 10V 0.1 mA
R01, R02, SO(9) 1. S0(9)2 -0.4
Low-level
IlL input current T1 Vee=5.25V. V,=0.4V -2.4 mA
T2 -3.2
los Short-circuit output current (Note 3) VCC=5.25V. Vo= 0 V -20 -100 mA
Icc Supply current Vee=5.25V (Notq) 9 15 mA
*: All typical values are at VCC= 5 V. T a = 25t.
Note 2: Output QA should be tested with input 12' connected to output QA.
Note 4: IcC is measured with ~. T;, SO(9) 1 and SO(9)2 at OV after Ro 1 and R02 have been set to OV after 4.5V.
" MITSUBISHI
.... ELECTRIC 2-317
MITSUBISHI LSTTLs
M74LS290P
DECADE COUNTER
SWITCHING CHARACTERISTICS <Vcc= 5V. Ta=25'C. unlessolherwisenoled)
Limits
Min Typ Max
fmax 32 75 MHz
from input r, to. output QA
Maximum clock frequency~
fmax 16 30 MHz
from input"'i2 to output OB
tPLH Low·lo-high·level. high·lo·low·level oUlpul propagalion 7 16 ns

tpHL time, from input T1to output QA 8 18 ns
tpLH Low-to-high·level. high-to-Iow-Ievel output propagation 15 48 ns
tpHL tim.B, from input 12 to output Os 16 50 ns
tpLH Low-to-high-Ievel. high·ta-Iow-Ievel output propagation 7 16 ns
tpHL time, from input 12 to output Qc 8 21 ns
tpLH Low-to-hiQh-level. high-to-Iow-Ievel output propagation 15 32 ns
CL=15pF (NoleSI
tpHL time, from input 12 to output Qo 15 35 ns
tpLH low-to-high-Ievel. high-to-Iow-Ievel output propagation 7 32 ns
tpHL time, from input 11 to output 00 \
8 35 ns
Low-to-high-Ievel output propagation time, from inputs
tpHL 17 40 ns
50(9)1.50(9)2 100Ulpuls QA. Qo
tpLH 10 30 ns
50(9) 1. 50(9)210 OUlpUIS Qs. Qp

tpHL 14 40 ns
ROI. R02 100Ulputs QA. Qs. Qc.. Qo
Note 5: Measurement circuit INPUT OUTPUT
(11 The pusle generator (PGI has Ihe following characleristics:

PR R = 1MHz, I, = 6ns. If = 6ns, Iw = SOOns,
Vp = 3V~.p. Zo = son.
(21 CL includes probe and jig capacitance
TIMING REQUIREMENTS <Vcc= 5V. Ta=25'C. unlessolherwise nOled)
Limits
Min Typ Max
tW(T.H) Clock inpul T 1 high pulse width 15 6 ns
tW(T2H) Clock inpul T2 high 'pulse widlh 30 17 ns
tW(Ro) Direct reset R01. Roz pulse width 15 5 ns
tw(so) Direct 9 sel 50(9) 1. 50(912 pulse widlh 15 5 ns
treC(RD) Recovery lime ROI. R02 10 Tl. T2 . 25 8 ns
trer;: (SD) Recoverylime50(9)t. 50(9)2 loTI. T2 25 8 ns
tW(SO)
11.12
QA,QS.QC.Qo
Qs.Qc
R01.R02
_ _ _..II
Ti.TZ ____~--------~Itrec
11.12
QA.QS.QC.Qo
QA.QO
• MITSUBISHI
2-318 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS293P
DESCRIPTION
containing an asynchronous 4-bit binary (hexademical)
counter function with direct reset inputs.
FEATURES NC Vcc
• Direct reset inputs provided 4- RD21
NC
• Usable independently as binary and octal counter f DIRECT RESET
NC 4- RD ~ INPUTS
• High-speed counting (f max = 60MHz typical)
• Wide operating temperature range (Ta= -20~+75°C) QC4-4
114-T2}
OUTPUTS { _ CLOCK INPUT
APPLICATION QB 4- 4- T,
General purpose, for use in industrial and consumer NC 9 .... QA}

equipment. OUTPUTS
GND .... QD
This device is composed of independent binary and octal
counters. Clock input Tl and output OA are employed for
use as a binary counter while clock input T2 and OB, Oc Outline 14P4 NC: NO CONNECTION
and 00 are employed for use as an octal counter. When
employed as a hexadecimal counter, the pure binary code
output appears in the OA, OB, Oc and 00 outputs by
connecting OA and T 2 and making Tithe input. Counting
is performed when Tl and T2 change from high to low.
The binary and octal counters can be reset simultane-
ously by setting direct reset inputs ROl and R02 high. For
use as a counter, either ROl or R02, or both, is set low.
This pin has the same functions and electrical character-
istics as the M74LS93P; only its pin configuration is
different.
BLOCK DIAGRAM
Q~ Vcc
--Ii
QA
, - - - - ----\.9
CLOCK INPUT 11 10 T
ril
T
DIRECT RESET
INPUTS
r D1
RD2
--------------------~
CLOCK INPUT 12 11
GND
• MITSUBISHI
.... ELECTRIC 2-319
MITSUBISHI LSTTLs
M74LS293P
4·BIT BINARY COUNTER
FUNCTION TABLE (Nota1l Count number QA Qs Qe Qo

0 L L L L
T R01 R02 QA I Qs I Qe I Qo
1 H L L L
x H H L I L I L I L
2 L H L L
! L H Count
H L L
3 H
! H L Count
L
4 L L H
! L L Count
5 H L H L
Note 1 Transition from high. to low
6 L H H L
X Irrelevant
7 H H H L
8 L L L H
9 H L L H
10 L H .L H
11 H H L H
12 L L H H
13 H L H H
14 L H H H
15 H H H H
ABSOLUTE MAXIMUM RATINGS
(Ta = - 20 - + 75 'C, unless otherwise noted)
Valid when Q A and 12 are connected and 11 is made the input

Inputs T" T2 -0.5-+5.5
V, Input voltage V
Inputs RD1. RD2 -0.5-+15
RECOMMENDED OPERATING CONDITIONS(Ta =-20-+75'C, unless otherwise noted)

Limits
Min Typ Max
IOH High-Jevel output current VOH~2.7V 0 -400 pA

VOL~0.4V 0 4 mA
VOL~0.5V 0 8 mA

Limits
Min Typ* Max
V,e Input clamp voltage Vee=4.75V,I,e=-18mA -1.5 V
VcC=4.75V, V,=0.8V
V,= 2V, IOH=-400pA
Vee=4.75V IloL = 4mA(Note 21 0.25 0.4 V
V,=0.8V, V,= 2V II OL = 8'rnA(Note 21 0.35 0.5 V
R01, R02 20
Vcc=5.25V, Yi''=2.7V pA
T" T2 40
I'H High-level inp~t current
T" T2 Vee=5.25V, V,=5.SV 0.2
rnA
R01, R02 Vee=5.25V, V,=10V 0.1
R01, R02 -0.4
rnA
I'L Low-level input current T1 Vee=5.25V, V,=0.4V -2.4
T2 -1.6
los Short-circuit output current (Note 3) Vee=5.25V. Vo= OV -20 -100 mA
IcC Supply current Vee=5.25V (Note 41 9 15 mA
Note 2: Output QA should be tested with input T 2 connected to output GA·
Note 4: tcc is measured with T, and 12
at OV after ROl and R02 have been set to OV after 4.5V.
• MITSUBISHI
2-320 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS293P
SWITCHING CHARACTERISTICS (Vcc=5V, T a =25'C, unless otherwise noted)
Limits
Min Typ Max
fmax 32 60 MHz
from input T, to output Q A
Maximum clock frequency,

fmax 16 35 MHz
from input 12 to output OB
tpHL propagation time, from input 11 to output QA 8 18 ns
propagation time, from inputll to output Qo
tpHL 28 70 ns
tpLH Low-to-high-Ievel. high-to-Iow-Ieve[ output 7 16 ns
CL= 15pF (Note 5)
tpHL propagation time. from input 12 to output OS 8 21 ns
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output 15 32 ns
to output Qc 15 35 ns
to output Qo 22 51 ns
tpHL
inputs R 01, R02 to OUlputs QA, QB, Qc, Qo
17 40 ns
TIMING REQUIREMENTS (Vcc= 5V,Ta =25'C, unless otherwise noted)
Limits
Min Typ Max
tW(T1H) Clock input T, high pulse width 15 6 ns
tW(TzH) Clock input T2 high pulse width 30 15 ns
\
tW(Ro) Oirect reset RD' ,. R02 pulse width 15 5 ns
Ir Clock pulse rise time 500 100 ns
treC(Ro) Recovery time RD 1, RO 2 to T" T2 25 8 ns
Note 5: Measurement circuit TIMING DIAGRAM (Reference level = ',3V)
QA,QB,QC,QO

PRR = tMHz, tr = 6ns, tf = 6ns, tw = 500n5,
Vp = 3Vp.p, Zo = 50n.
ROt,R02
___t-________ ~trec
1\'-_ __
QA,QB,QC,QO
'. MITSUBISHI
.... ELECTRIC 2-321
MITSUBISHI LSTTLs
M74LS29SBP
4-BIT SHIFT REGISTER WITH 3-STATE OUTPUT

containing a 3-state output 4-bit serial/parallel input serial/
parallel output shift register function.
SERIAL
FEATURES DATA Vee
INPUT
• Synchronous serial/parallel input-serial/parallel output
~QO)
Do ~ 2
• Right shift function
• Left shift function available with external connection PARALLEL { 0, ~
~Q1
• Mode control input provided DATA OUTPUTS

INPUTS 02 ~ ~Q2
• Output control input provided
• Usable in AND-Tie connection (3-state output provided) 03~ ~Q3
• Wide operating temperature range (Ta= -20-+75°C) MODE

CONTROL M/C ~ 6 CLOCK INPUT
• High fan·out (loL = 24mA, IOH = -2.6mA) INPUT
GNO OUTPUT
CONTROL
APPLICATION INPUT

equipment.
Outline 14P4
This device is usable as a serial input-serial/parallel output 0 3 is connected with Dz , O2 with D1 and 0 1 with Do, the
and parallel input-serial/parallel output shift register with serial data are applied to D3 and the clock pulse applied to
the mode control input M/C signal. When M/C is kept in T. the left shift operation is performed. When low is applied
low, the serial data are applied to serial data input Ds and to output control input OC, 00-03 are put in the
the clock pulse is applied to clock input T, the serial data high-impedance state and AND-tie connection is enabled.
are shifted into outputs 0 0 -03 sequentially in synchroniz- Even when OC is changed, there are no effects on the shift
ation with the clock pulse. When M/C is kept in high, the and parallel data reading operations. When a low-level signal
parallel data are applied to parallel data inputs Do -D 3 and is applied to OC with an expansion in the bit number due
the l-bit clock pulse is applied to clock input T, the to the high-impedance state and so shifting is disabled. In
signals Do-D 3 appear in 0 0 -03 respectively. When T cases like this, the M74LS395AP with cascade output 0 3 '
changes from high to low, the right shift or parallel data is recommended.
reading operation is performed. When M/C is kept in high,

r~~Q-o--------~Q-,--_A~--~Q-2--------A-
Vee
OUTPUT
CONTROL
INPUT 1
CLOCK INPUT T
SERIAL I~~~~
MODE CONTRa L M / C
INPUT
Os lr.--~=~--+~":::::.J.--+~'::::::~--+l-":::::'.J
~~--------~---yr--~--------~
}-----.-J GNO
• MITSUBISHI
2-322 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS295BP
\ Input Output
D~
Function mode Parallel Data
M/C T Qo Q, Qz Q3
Do D, Dz D3
Output hold H H X X X X X QOO Q,O QzO Q3 0
Parallel read H ~ X Do D, Dz D3 Do D, Dz D3
Left shift H ~ X Q,+ QZ+ Q3+ D3 Q,O QZO Q30 D3
Output hold L H X X X X X QOO Q,O QzO Q3 0
L ~ H X X X X H QOO Q,O Q2 0
Right shift
L ~ L X X X X L QOO Q,O QzO
Note 1: transition from low to high level (negative edge trigger)
00 level of Q before the indicated steady-state input conditions were established
X irrelevant
0+ Do and 0,,0, and Q2, and 02 and 03 are connected externally and serial data are applied to 03
High·impedance state when OC is low.

Va Output voltage Off-state -0.5-+5.5 V
Limits
Min Typ Max
IOH High-level output current VOH"'2.4V 0 -2.6 rnA

VOL~O.4V 0 12 mA
VOL~O.5V 0 24 mA
Limits
Symbol Parameter Test condotions Unit
Min Typ * Max

VIC I nput clamp voltage Vee=4.75V, Ile=-18mA -1.5 V
Vee=4.75V, V, =0.8V
V, =2V, IOH= -2.6rnA

Vee=4.75V I 10L= 12mA 0.25 0.4 V
V, =O.8V, V, =2V I 10L = 24mA 0.35 0.5 V
10ZH Off-state high-level output current Vee=5.25V, V, =O.8V, Vo""2.7V 20 jJ.A
10ZL Off-state lOW-level output current Vee=5.25V, V, =0.8V, Vo=0.4V -20 /1A
Vee=5.25V. VI =2.7V 20 /1 A
Vee=5.25V. V, = 10V 0.1 rnA
I,L Low-level input current Vee=5.25V, V, ""O.4V -0.4 mA
lOS Short-circuit output current (Note 2) Vee=5.25V, VO= 0 V -30 -130 mA
leez Supply current, all outputs off Vee=5.25V (Note 4) 22 33 mA
Note 2: All measurements should be done quickly and not more than one output should be shorted at [l time.
Note 3: Icc is measured with 0 0 -0 3 at av, OS, MIC and ac at 4.5V after T has been set from 3V to av.
Note 4: locz is measured with 0 0 -0 3 , DC and T at OV and Os and M/C at -:l.5V.
• MITSUBISHI
.... ELECTRIC 2-323
MITSUBISHI LSTTLs
M74LS295BP
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25"C, unlessotherwisenoted)
Limits
Min Typ Max
CL=15pF (Note 5)
tPHL time, from input T to outputs Qo - 03 18 30 ns
tPZH Output enable time to high-level RL=2kQ, CL=15pF (Note 5) 14 26 ns
tpzL Output enable time to low-level RL=2kQ, CL=15pF (Note 5) 16 30 ns
tPHZ Output disable time from high-level RL=2kQ, CL=5pF (Note5) 14 20. ns
tPLZ Output disable time from low-level RL=2kQ. CL=5pF (Note5) 14 20 ns
INPUT Vee
Symbol SWI SW2 (1) The pulse generator (PG) has the following
characteristics:
tPZH Open Closed
PRR = lMHz, tr =6ns, tf = 6ns, tw = 500n5,
tPZL Closed Open Vp =3Vp.p. 20 =50n
tpLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4ns)
tPHZ Closed Closed
TIMING REQUIREMENTS (Vcc=5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
tW(T) Clock input T high pulse width 25 10 ns
tsu (0) Setup time D to T 20 3 ns
tSU(M/C) Setup time M/C to T 40 20 ns
th (0) Hold time D to T 20 -1 ns
th(M/O) M IC hold time to T 0 -10 ns
OC::1\~
00--'03
tPZL
___
~ OC~
:LZ
.
00-03
. tPZH
tpH3
....- - - - - - - - - : . : . . : .
~ 0.5V
0.5V
predictable output performance .
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS298P
QUADRUPLE 2·INPUT MULTIPLEXERS WITH STORAGE
DESCRIPTION
which containing four 2-line to 1-line multiplexers provided
with a temporary storage circuit with common selection
input and clock input. vee
FEATURES
• One line data can be selected from 2·line data.
DATA
• Equipped with Ootype negative edge-triggered flip-flop. INPUTS
4 DI .... CLOCK INPUT

APPLICATION
General purpose, for use- in industrial and consumer +- SA SELECT INPUT
equipment.
GND DATA INPUT
When the select input SA is low, data input Do - is
selected, and when it is high, data input 0, is selected. Outline 16P4
When the clock input 'f changes from high to low, the
selected data appears in the output Q. Since aD-type FUNCTION TABLE (Note 1)
negative edge-triggered flip-flop is used as a temporary
T SA Do 01 Q
storage circuit, the status of Q does not change even if 0 is
~ L L X L
changed, whether 'f is high or low.
~ L H X H
~ H X L L
~ H X H H
Note 1: i : transition from high to low-level
X: irrelevant
BLOCK DIAGRAM
OUTPUTS
3Q 4Q
CLOCK INPUT T - - - - - +.....-----+~----__1.....J

1 1 ) - - - V o O - - - - +.....
3Do 3DI 4Do 4DI GND

/
DATA INPUTS
• MITSUBISHI
"'ELECTRIC 2-325
MITSUBISHI LSTTLs
M74LS298P
QUADRUPLE 2-INPUT MULTIPLEXE~S WITH STORAGE

VI Input vollage -0.5-+15 V
Vo Output voltage High·level slale -0.5-Vee V
TSIg Storage temperature range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C. unleSSOlherwisenoled)
Limits
Min Typ Max
10H High·level output current VOH~2. 7V 0 -400 "A

VOL"'0.4V 0 4 mA
VOL"'0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta =-20- +75'C. unlessolherwisenoled)
Limits
Min Typ* Max
Vie Input clamp voltage Vee=4. 75V • Ile= -18mA -1.5 V
Vee=4.75V. VI=0.8V
VI=2V.loH=-400"A

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
Vee=5.25V. VI=2.7V 20 "A
Vee=5.25V. VI=10V 0.1 mA
IlL Low-level input current Vee=5.25V. VI=0.4V "':0:4 rnA
los Short-circuit output current (Note 2) Vee=5.25V. Vo=OV -20 -100 mA
lee Supply current Vee=5.25V (Nole31 13 21 rnA
* : All Iypical values are al Vee =5V, Ta =2SoC.
Note 2: All measurements should be done quickly, and not more than one output should be shorted at a time,
3: Icc is measured with SA, 100 """ 40 1 inputs grounded and a momentary 4,5V, then grounded, applied Tinput,
SWITCHING CHARACTERISTICS (Vcc=SV. Ta~2S'C, -unless otherwise nOled)
Limits
Min Typ Max
tPLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation CL=lSpF 12 27 ns
tpHL time, from input T to outputs 1 Q-4Q (Note4) 11 32 ns
INPUT Vee OUTPUT
PG DUT

50Q PRR = lMHz, Ir = 6ns. If = 6ns, Iw =SOOns,
Vp = 3Vp.p, Zo = 50n
• MITSUBISHI
2-326 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS298P
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
TIMING REQUIREMENTS <Vcc=SV. Ta=2S"C. unless otherwise noted)
limits
Min Typ Max
tw(TL) Clock input T low pulse width 20 4 ns
tsu(O) Setup time data input to T 15 0 ns
tsu( SA) Setup time SA to T 25 5 ns
th (D) Hold time data input to T 5 0 ns
t h( SA) Hold time SA to T 0 -2 ns

tsu (D) th (D) tsu (D) th (D)
1Q-4Q
• MITSUBISHI
.... ELECTRIC 2-327
MITSUBISHI LSTTLs
M74LS299P
8·BIT UNIVERSAL SHIFT /STORAGE REGISTER

containing an 8-bit serial/parallel input-parallel output shift MODE
CONTROL M/Cl-+ 1 Vee
register function equipped with 3-state outputs and direct INPUT
MODE
reset input. OUTPUT { OC 1 -+ 2 CONTROL
CONTROL INPUT
INPUT OC2-+ LEFT SHIFT
DATA INPUT
FEATURES
D6/Q6 ... 4 CASCADE
• Synchronous serial/parallel input-serial/parallel input OUTPUT
INPUTS/
• Possible expansion of bit number OUTPUTS
• 3-state outputs INPUTS/
• Common parallel input and output pins OUTPUTS
Do/QO'" 7
CASCADE
• Wide operating temperature range (Ta= '-20~+75°C) OUTPUT
DIRECT
RESET CLOCK INPUT
APPLICATION INPUT
General purpose, for use in industrial and consumer GND +- DSR
RIGHT SHIFT
DATA INPUT
equipment.
Outline 20P4
The operational modes listed below can be selected by
left shift data input Ds L, a shift is made one bit at a time
combining the mode control inputs M/C! and M/C z .
from D7/Q 7 to Do/Q o every time the clock input T
(1) Parallel read M/C! : High; M/C z : High
changes from low to high.
(2) Right shift M/C! : High; M/C z : Low
With clock inhibit, the flip-flop status does not change
(3) Left shift M/C! : Low; M/C z : High since the clock pulses are inhibited from being applied to
(4) Clock inhibit M/C! : Low; M/C z : Low the fl ip-flop.
With parallel read, the 8-bit parallel data are applied to When one or both OC! and OC z are set high, all
inputs/outputs Do/Qo~D7/Q7 and when the clock input T Do/Qo~D7/Q7 outputs are put in the high-impedance
changes from low to high, the data are stored in each of the mode "Z." The contents of the flip-flop do not change even
respective flip-flops.
if OC! and OC z are changed.
With right shift,when the parallel data are applied to the When R D is set low, all the flip-flops are set low
right shift data input DSR, a shift is made one bit at a time
irrespective of the status of the other inputs.
from Do/Qo to D7/Q7 every time the clock input T
Cascade outputs 0'0 and Q' 7 are used for expansion of
the respective bit numbers. Reference shou Id be made to
With left shift, when the parallel data are applied to the the typical application.
BLOCK DIAGRAM
MODE CONTROL
INPUTS
~
M/C2~Cl
f1~-
-------------
CLOCK INPUT
CASCADE OUTPUT Qo LEFT SHIFT

DATA INPUT
DIRECT ~~~0i RD
OUTPUT {OCl 2 ,
CONTROL _
INPUT OCz I
-@-----0-- -®- ---@
_ Do/Qs DElQ6 D7/Q7 GND
y
INPUTS/OUTPUTS
• MITSUBISHI
2-328 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS299P
8-BIT UNIVERSAL SHIFT /STORAGE REGISTER
Operational mode Ro T M/O, M/02 OSR OSL 00, 002 00/00 0,/0, 02/02 03/03 04/04 05/05 06/06 07/07 06 07
L X L X X X L L L L L L L L L L L L
Direct reset
L X X L X X L L L L L L L L L L L L
H i H L L X L L L 00° 0,0 02° 03° 0,° 05° 06° L 06°

Right shift
H i H L H X L L H 00° 0,0 02° 03° 0,0 05° 06° H 06°
H i L H X L L L 0,0 02° 03° 04° 05° 06° 07° L 0,0 L
Left shift
H i L H X H L L 0,0 02° 03° 04° 0,0 06° 07° H 0,0 H
Parallel read H i H H X X L L Do 0, 02 03 04 05 06 07 Do 07
H X L L X X L L 00° 0,0 02° 03° 0,0 05° 06° 07° 00° 07°
Clock inhibit
H L X X X X L L 00° 0,0 02° 03° 0,0 05° 06° 07° 00° 07°
Output inhibit X X X X X X H L Z Z Z Z Z Z Z Z 00° 07°
(00/00- 07/07 are put) X X X X X X L H Z Z Z Z Z Z Z Z 00° 07°
in the high-impedance
state X X X X X X H H Z Z Z Z Z Z Z Z 00° 07°
Note 1. Qn O : level of Q before the indicated steady-state input conditions were established
X 1rrelevant
t Transition from low to high (positive edge trigger)
On 0 0 /0 0 .... 0 7 /0, function as inputs. 0'0 and 0'" are set to the same status as Do and 0." respectively.
Z High-impedance state. Status of flip-flops before 0 0 /0 0 -0 7 /0 7 were put in the high-impedance mode is held.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+7S'C. unlessotherw;senoted)

Output voltage
I 00/00- 0 7/07 Off-state -0.5-+5.5 V
Vo
I 00.07 High-level state -O.S-+Voo V
Tstg Storage temperature range -65- + ,50 "C
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75'C. unlessotherw;senoted)
Limits
Min Typ Max
Vee Supply voltage 4.7S 5 5.25 V
High-level DO/00-07/07 VOH"'2.4V 0 -2.6 mA
IOH output current
06.07 VO;-¥;2.7V 0 -400 11A
VOL";O.4V 0 12 mA
00/00- 07/07
Low-level VOL";O.5V 0 24 mA
IOL output current
VOL";0.4V 0 4 mA
00.0,
VGL s O.5V 0 8 mA
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS299P
a·BIT UNIVERSAL SHIFT /STORAGE REGISTER

Limits
Min Typ * Max
VIC Input clamp voltage VCc=4.75V,llc=-18mA -1.5 V
High-level 00/00- 0 7/07 VCC=4.75V IOH=-2.6mA 2.4 3.1 V
VOH
output voltage 00,07 VI=0.8V, VI=2V IOH= -400 pA 2.7 3.4 V
IOL=12mA 0.25 0.4 V
00/00- 0 7/07 Vcc=4.75V
Low-level IOL=24mA 0.35 0.5 V
VOL output voltage VI=0.8V
10L= 4 mA 0.25 0.4 V
00,07 VI= 2V
10L= 8 mA 0.35 0.5 V
Off~state high-level
10ZH 00/00 -07/07 VCC=5.25V, VI=2V, VO=2.7V 40 pA
output current
Off-state low-level pA
10ZL 00/00- 0 7/07 Vcc=5.25V, VI=2V, VO=0.4V -400
output current
00/00-07/07, M/Cl, M/,C2 40 pA

VCC=5.25V, VI=2.7V
Onputs 'other then
20 pA
DO/OO-07/07, M/Cl, M/C2
Hi~h·level
IIH input current 00100- 07/0 7 VI=5.5V 100 pA
M/Cl, M/C2 Vcc=5.25V 200 pA
Onputs other then VI=10V
100 pA
00100-07/07, M/Cl, M/C2
Low-level M/Cl, M/C2 Vcc=5.25V -0.8 mA
IlL input current Onpul other then M/Cl, M/C2 VI=0.4V -0.4 mA
Short-circuit 00100- 07/07 VCC=5.25V -30 -130 mA
los output current
Oo,Oi VO=OV -20, -100 mA
Icc Supply current VCC=5.25V 33 53 mA
* All typical values are at Vee = 5V, Ta = 25 0
C.
Note 3: lecis measured with inputs T and DC at 4,5V.
SWITCHING CHARACTERISTICS (Vco= 5V, Ta=25'C unless otherwise noted)

Limits
Min Typ Max
tpLH 20 33 ns
Low~to·high-Ievel, high-to-Iow-Ievel output propagation
CL=15pFINote41
tpHL time from input Ttc outputs 00. 01 20 39 ns
tpHL
18 40 ns
from input RD to outputs Qo. 07
tpLH 17 25 ns
Low-to-high-Ievel. high-to-Iow-Ievel output propagation
tpHL time, from input Ttc inputs/outputs' Do/Qo-D7/Q7 23 39 ns
CL=45pF INote41
High-to-Iow-Ievel output propagation time, 20 40 ns
tpHL
from inputs RDto inputs/outputs 00/00'-07/07
tpZH Output enable time to high-level RL=665Q, CL=45pF INote41 12 21 ns
tPZL Output enable time to low-level RL-665Q, CL-45pF INote41 15 30 ns
tpHZ Output disable time from high-level. RL=665Q, CL= 5pF INote41 12 15 ns
tpLZ Output disable time from low-level RL=665Q, CL= 5pF INote41 12 15 ns
TIMING REQUIREMENTS (Vco= 5 V, Ta=25'C, unless otherwise noted)

Limits
Min Typ Max
tWiTL) Clock input T_low pulse width 20 17 ns
tw( RoL) Direct reset input low pulse width 20 7 ns
tSIJ(M/C) Setup time M/Cl, M/C2 to T 35 18 ns
tSU(D) Setup time OSR, OSL, 0 0/00- 0 7/07 to T 20 10 ns
th(M/C) Hold time M/Cl, M/C2 to T 10 -12 ns
th(D) Hold time OSR, OSL, 00/00- 07/0710 T 0 -5 nS
trec(Ro) Recovery ti me R 0 to T 20 15 ns
• MITSUBISHI
2-330 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS299P
8-BIT UNIVERSAL SHIFT/STORAGE REGISTER

INPUT Vce
INPUT Vee OUTPUT
DUT PG DUT
PG
50Q
50Q
Symbol SWl SW2 (1) The pulse generator (PG) has the following
Open Closed characteristics:
I PZH
PRR = lMHz, tr = 6nS,!f = 6ns. tw = 500ns,
I PZL Closed Open Vp=3Vp_p, Zo=50n
Closed Closed (2) All diodes are switching diodes (t rr ~ 4ns)
I PLZ
I PHZ Closed Closed
TIMING DIAGRAM
Isu (M/C) Ih (M/C)
MIG,.
M/G2
T
DSR. DSL
Do/Qo-D7/Q7
T
QQ. Q7
Qo. Qi
OG,.OG2
IPLH
APPLICATION EXAMPLE
The figure below shows the configuration of a 16·bit shift register using two M74LS299P devices.
Similarly, an 8n-bit shift register can be configured with niCs.
DSL
DSR
MIG,
OG
M/G2
-
L MIC,
M/C,
DSR DSL
), ),
oc, Gez
L
~
MlC,
M/C,
DSR DSL Oe,Oe2
M 74LS299P M74LS299P
r- T r-T
~ 0, D z D) 04 05 06 07 OJ; 01-'01-' ~ ~02 ~~
Ro Qo Q 0 /0, -15, -153 1)4 705 ~6 1), Q; RD Qo Qo Ql Q2 Q3 4 05 06 Q7
I
Q7
TI
I
I
'-
11
J
• MITSUBISHI
~ELECTRIC 2-331
MITSUBISHI LSTTLs
M74LS323P
a-BIT UNIVERSAL SHIFT /STORAGE REGISTER

The M74LS323P is If semiconductor integrated circuit
containing an a-bit serial/parallel input/parallel output shift MODE
CONTROL M/c,-+ 1 Vee
register function equipped with 3-state outputs and INPUT MODE
CONTR'OL
synchronous reset input. OUTPUTl OC, -+ 2 INPUT
CONTROL
INPUTS DC2-+ LEFT SHIFT
FEATURES DATA INPUT
• Synchronous serial/parallel input/serial/parallel input CASCADE

OUTPUT
INPUTS!
• Possible expansion of bit number OUTPUTS
• 3-state outputs INPUTS!
• Common parallel input and output pins Do/Qo+-+ 7
OUTPUTS
• Synchronous'reset input
CASCADE
• Wide operating temperature range (Ta= -20~+75°C) OUTPUT
RESET INPUT R -+ 9 CLOCK INPUT

APPLICATION
General purpose. for use in industrial and consumer GND RIGHT SHIFT
DATA INPUT
equipmerit.
Outline 20P4
The operational modes listed below can be selected by
combining the mode control inputs M/C I and M/C2 •
(1) Parallel read M/C I : High; M/C2 : High With left shift. when the parallel data are applied to the
(2) Right shift M/C I : High; M/C2 : Low left shift data input DSL. a shift is made one bit at a time _
(3) Left shift M/C I : Low; M/C2 : High from Do/Oo to D7 /O, every time the clock input T
(4) Clock inhibit M!C I : Low; M/C2 : Low changes from low to high.
With parallel read. the a-bit parallel data are applied to With clock inhibit. the flip-flop status does not change
inputs/outputs Do/Oo~D,/O, and when the clock input T since the clock pulses are inhibited from being applied to
changes from low to high. the data are stored in each.of the the flip-flop.
respective flip-flops. When one or both OC I and OC 2 are set high. all
With right shift. when the parallel data are applied to the Do/Oo~D, /0, outputs are put in the high-impedance
right shift data input DSR. a shift is made one bit at a time mode "Z." The contents of the flip-flop do not change even
from Do/Oo to D,/O, every time the clock input T if OC I and OC 2 are changed.
BLOCK MODE CONTROL INPUTS

DIAGRAM ~
fI1/C2 M/Cl Vee
- - - - - -------<?OJ
RESET INPUT , r
CLOCK INPUT
CASCADE CASCADE
OUTPUT OUTPUT
OUTPUT JOC, 2
,
CO~~~3~ l OC2
7 --®---®--~--@--@----@
D~o Dll'Q2 DW3 D~4 D~Q5 DlfQ6 D7/Q7 GND
• .MITSUBISHI
2-332 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS323P
8·BIT UNIVERSAL SHIFT/STORAGE REGISTER
When R is set low if T is changed from low to high, all the respective bit numbers. Reference should be made to
the flip·flops are set low. the application example.
Cascade outputs Q' 0 and Q' 7 are used for expansion of
Operational mode R T M/O, M/O, DSR DSL 00, 00, Do/Oo D,/O, D,/O, 0:3103 D4/0. Ds/Os D6/06 D7/07 00 07
L i L X X X L L L L L L L L L L L L
Reset
L i X L X X L L L L L L L L L L L L
H i H L L X L L L Qoo Q,o Q,o Q30 Q40 Qso Q60 L Q60

Right shift
H i H L H X L L H Qoo Q,o Q,o Q30 Q40 Qso Q60 H Q60
H i L H X L L L Q,o Q,o 03° Q.O Qso 06° Q70 L Q,o L

Left shift
H i L H X H L L Q,o Q,o Q30 Q40 QsO Q60 Q70 Q Q,o H
Parallel read H i H H X X L L Do D, D, D3 D4 Ds D6 D7 Do D7
H X L L X X L L Qoo Q,o Q,o Q30 Q40 Qso Q60 Q70 Qoo Q70
Clock inhibit
H L X X X X L L Qoo Q,o Q,o Q30 Q40 Qso Q60 Q70 Qoo Q70
Output inhibit X X X X X X H L Z Z Z Z Z Z Z Z 00° 07°

(DO/QO-D7/Q7 are put) X' Z Z Z QOO Q70
in the high-impedance X X X X X L H Z Z Z Z Z
state X X X X X X H H Z Z Z Z Z Z Z Z QOO Q70
Note 1 On D : level of Q before the indicated steady-state input conditions were established
X Irrelevant
i transition from low to high (positive edge trigger)
On 00/00-D,/Q7 were put in the hig~·jmpedance mode is held.
Z High-impedance state. Status of flip-flops before Do/Q7-D.7/Q, were put in the high-impedance mode is held.
Vo Output voltage I Do/Qo-D7/Q7 Off-state -0.5'-+5.5 V

High-level state -0'.5- Vee V
I QQ. Q7
Limits
Min Typ Max
High-level Do/Qo- D7/Q7 VOH"'2.4V 0 -2.6 rnA
IOH output current 06. Qi VOH'" 2 . 7V 0 -400 /1A
VOL~0.4V 0 12 rnA
Do/Qo-D7/Q7
Low-level VOL~0.5V 0 24 rnA
IOL output current
VOL~0.4V 0 4 rnA
Q6. Q\
VOL~0.5V 0 8 rnA
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS323P
a-BIT UNIVERSAL SHIFT /STORAGE REGISTER
ELECTRICAL CHARACTERISTICS (Ta=-20-+7S'C, unlessotherwisenoted)

Limits
Min Typ * Max
VIC Input clamp voltage Vcc=4.75V, IIC~-18mA -1.5 V
High·level 00/00- 0 7/07 Vcc=4.75V IOH=-2.6mA 2.4 3.1 V
VOH output voltage
Oo,Oi VI=0.8V, VI=2V 10H = - 400,uA 2.7 3.4 V
IOL=12mA 0.25 0.4 V
00/00- 0 7/07 VCC=4.75V
Low-level IOL=24mA 0.35 0.5 V
VOL VI=0.8V
output voltage 10L= 4 mA 0.25 0.4 V
Oo,Oi VI= 2V
10L= 8 mA 0.35 0.5 V
10ZH Off-state high-level output cu~rent I 00/00- 0 7/07 VCC=S.25V, VI= 2V,Vo=2.7V 40 ,uA
10ZL Off·state low·level output current I 00/00-07/07 VCC=5.25V, VI=2V, Vo=0.4V -400 ,uA
00/00-07/07, M/O" M/ 0 2 40 ,uA
Input other then Vcc=5.25V, VI=2.7V
20 ,uA
00/00-07/07, M 10" M 102
High·level ,uA
IIH 00/00 - 07/07 VI=5.5V 100
input current
M/O" M/02 Vcc=5.25V 200 ,uA
Inputs other then VI=10V
100 ,uA
00/00-07/07, M 10" M 102
Low-level M/O" M/02 VCC=5.25V -0.8 mA
IlL input cur'rent Inputs otherthen M 10" M/02 VI=0.4V -0.4 mA
Short-circuit 00/00- 0 7/07 Vcc=5.25V -30 -130 mA
los output current
INote 11 Oo,Oi Vo"'" 0 V -20 -100 mA
ICC Supply current Vcc=5.25V INote21 33 53 mA
Note 3: Icc is measured with inputs T and 5C at 4.5V ..

Limits
Symbol Par"ameter Test conditions Unit
Min Typ Max
tpLH Low-to-high-Ievel, high-to-iow-Ievel output propagation OL=15pF INote41 20 33 ns
t pHL time, from input T to outputs QO. Q7 20 39 ns
OL=45pF (Note41
tpHL time, from input T-to inputs/outputs Do/Qo-D7/Q7 23 39 ns
tpzH Output enable time to high-level RL=665Q, OL=45pF (Note41 12 21 ns
tpZL Output enable time to low-level RL=665Q, OL=4SpF INote41 15 30 ns
tpHZ Output disable time from high-level RL=665Q, OL= 5 pF (Note41 12 15 ns
tpLZ Output disable time from low-level RL=665Q, OL= 5 pF (Note41 12 15 ns
Limits
Min Typ Max
tWITH) Clock input T high pulse width 30 13 ns
twlTLI Clock input T low pulse width 30 17 ns
tsulMlC) Setup time M/O" MIG, to T 35 18 ns
tsuID) Setup time OSR, OSL, 00/00- 07/07 to T 20 10 ns
tsulR) Setup time R to T 30 23 ns

thIM/C) Hold time M 10" M 102 to T 10 -12 ns
thlD) Hold time OSR, OSL, 00/00-07/07 to T 0 -5 ns
thlR) Recovery time R to T 0 -8 ns
.• MITSUBISHI
2-334 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS323P
8-BIT UNIVERSAL SHIFT/STORAGE REGISTER
Note 4: Measurement circu it

INPUT Vee
INPUT Vee OUTPUT
PO DUT PO DUT
50Q
50Q
~CL
~CL .;;; SW2
Symbol SW1 SW2

IpZH Open Closed characteristics:
PRR = 1MHz, tr = 605, tf = 6ns, tw = 500ns,
I PZL Closed Open
Vp =3Vp.p,Zo = 50n.
Closed Closed (2) All diodes are switching diodes (t rr ~ 4ns)
I PLZ
I PHZ Closed Closed
Isu (MlO) th (MlC) T
M/C"
M/C2
DSR.R DSl~~~~~~4!~~~~=r~~~~-1---~~~~
T
Qo. Q7
for predictable output performance. IpZH
APPLICATION EXAMPLE
The figure below shows the configuration of a 16-bit shift register using two M74LS323P devices.
Similarly, an Bn-bit shift register can be configured with n les.
DSL
DSR
-
L MIC,
M/C,
DSR DSL
hh
oc , oe Z
-
L MIC,
M/C,
DSR DSL oc,oe z
M74LS323P M74LS323P
,-- T r- T
~ ~ 02 DJ 04 05 06 07
R Qo Qo Q, ~'~3 --6, ~5 ;0-, ::07 Q; R Qo
ZQo
D
~D1: ~ ~D2
Q, Qz 03
~~ ,
4 Q5 06 Q7 Q7
R '( I I
~
I I
T I
Qo I
Q,s
• MITSUBISHI
;"ELECTRIC 2-335
MITSUBISHI LSTTLs
M74LS352P
DUAL 4-LlNE TO 1-LlNE DATA SELECTOR/MULTIPLEXER
WITH STROBE (INVERTED)

containing two 4-line to 1-line data selector/multiplexer cir-
cuits.
STROBE
INPUT
vee
FEATURES STROBE
SELECTION +- 20 INPUT
• Inverted outputs provided INPUT
• Strobe inputs provided independently for each circuit +- SA
SELECTION
INPUT
• Selection inputs common to both circuits
• Low output impedance +- 203
DATA
• Wide operating temperature range (Ta=-20-+75°C) . INPUTS
+- 202
DATA
INPUTS
APPLICATION
General purpose. for use in industrial and consumer OUTPUT +- 200
equipment
GNO OUTPUT
This Ie has two data selector circuits which provide 1-line
selection of 4 input signals and two multiplexer circuits Outline 16P4
which convert the 4-bit parallel data into serial data
with time-sharing. When 4-line signals are applied to the FUNCTION TABLE (Note 1)
data inputs 0 0 .01 • D2 and 0 3 and 1 data is specified
S8 SA 00 01 02 03 G Y
from among the data by selection inputs SA and
Sa. the input signal is output' at Y. By apply'ing X X X X X X H H
4-bit parallel data to 0 0 • 0 1 • O2 and 0 3 • and con- L L L X X X L H
necting a synchronous divide-by-4 counter output to SA L L ,H X X X L L

and S8. the 0 0 • 0 1 • O2 and 0 3 data appear in the order of L H ,X L X X L H
0 0 • 0 1 • O2 and 0 3 synchronized with the clock pulse. SA L ,H X H X X L L
and S8 are common to both circuits while strobe inputs 1G H L X X L X L H
and 2G are independent. When 1G and 2G are set high. 1Y H L X X H X L L
and 2'( are set high irrespective of the status of the input. H H X X X .L L H
H H X X X H L L
Note 1 K: Irrelevant
BLOCK DIAGRAM
OUTPUTS
lY 2Y Vee
fer 100 lOt 102 103 Sa SA 200 20t 202 203 2G GNO
-v--'
STROBE --'----'D-AT-A-"---"-' STROBE
SELECTION DATA
INPUT INPUTS INPUTS INPUTS INPUT
• MITSUBISHI
2-336 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS352P
DUAL 4-LlNE TO I-LINE DATA SELECTOR/MULTIPLEXER
WITH STROBE (INVERTED)

Vo Output voltage High-level state -0.5- Vec V
Limits
Min Typ Max
10H High-level output current VOH~2.7V 0 -400 p.A

VOL~O.4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"C, unle;s otherwise noted)
limits
Min Typ * Max

V,c Input clamp voltage Vee=4.75V, l,e=-18mA -1.5 V
Vcc=4.75V, V,=0.8V
V,= 2V, IOH=-400p.A

Vcc=4.75V I 10L= 4 mA 0.25 0.4 V
V,=0.8V, V,= 2 V I 10L= 8 mA 0.35 0.5 V
Vce=5.25V, V,=2:7V 20 p.A
Vce=5.25V, V,=10V 0.1 mA
"L Low-level input current Vee=5.25V, V,=0.4V -0.4 mA
loS Short-circuit output current (Note 2) Vee=5.25V, VO= 0 V -20 -100 mA
Icc Supply current Vee= 5.25V INote 3) 6.2 10 mA
SWITCHING CHARACTERISTICS (Vec= 5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to·high·level, high-to-Iow·level output propagation 7 20 ns
t PHL time, from inputs Do - 03 to output 7 26 ns
Low-to·high-Ievel, high·to·low·level output propagation 9 29 ns
CL=15pF INote4)
time, from inputs SA, Ss to output Y 14 38 ns
t pLH Low-to-high·level; high-to-Iow-Ievel output propagation 8 24 ns
t pHL time, from input G to output Y 13 32 ns
INPUT Vee OUTPUT

'?
(1) The pulse generator (PG) has the
following characteristics:
PRR=1MHz, t r=6ns, tf=6ns, t w =500ns, LEVELS OF
DELAY 2
Vp = 3Vp..p, Zo =50n.
LEVELS OF
DELAY 3
• MITSUBISHI
.... ELECTRIC 2-337
MITSUBISHI LSTTLs
M74LS353P
DUAL 4·LlNE TO 1·LlNE DATA SELECTOR/MULTIPLEXER

containing two 4-line to l-line data selector/multiplexer
circuits and 3-state outputs. OUTPUT
CONTROL' OC-+ 1 Vee
INPUT
FEATURES SELECTION
_ OUTPUT
+- 20C CONTROL
• Inv.erted outputs provided INPUT INPUT
• Output control inputs separate for each circuit +- SA SELECTION

103-+ INPUT
• Selection inputs common to both circuits
+- 203
• 3-state outputs DATA
INPUTS
• Wide operating temperature range (T a =-2D-'+75°C) 10,-+ +- 202
DATA
INPUTS
100-+ +- 20,
APPLICATION
General purpose. for use in industrial and consumer OUTPUT +- 200
equipment.
GNO OUTPUT
This IC has two data selector circuits which provide l-line
selection of 4 input signals two multiplexer circuits wbich Outline 16P4
convert the 4-bit parallel data into serial data by time-
sharing. When 4-line signals are applied to the data inputs FUNCTION TABLE (Note 1)
Do. 0,. Dz and 0 3 • and 1 data is specified from among the Do 0,

S8 SA 02 03 OC Y
data input by selection inputs SA and S8. the input signal
X X X X X X H Z
is output at Y. By applying 4-bit parallel data to data inputs
L L L X X X L H
Do. 0,. O2 and 0 3 and by connecting the output of a
L L H X X X L L
synchronous divide-by-four counter to SA and S8. data Do.
L H X L X X L H
0,., O2 and 0 3 appear in the order of Do. 0,. O2 and 0 3 •
L H X H X X L L
synchronized with the clock pulse. SA and S8 are common
H L' X X L X L H
to both circuits while output control inputs 10C and 20C
are separate. When 10C and 20C are set high. 1'( and 2'( H L X X H X L L
are put in the high-impedance state ("Z") irrespective of H H X X X L L H

the status of the inputs. H H X X X H L L
Z : High-impedance state
BLOCK DIAGRAM
OUTPUTS
Vee
>--------@
~-
, -----I
I
I
, OC -.:.1:::00,------,'-,,0-,-'~1::;02,--_10,-,,3 ~ 200 20, 202 20 3 20C

OUTPUT DATA OUTPUT
SELECTION DATA
?~~J.f0L INPUTS INPUTS INPUTS
CONTROL
INPUT
• MITSUBISHI
2-338 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS353P
DUAL 4·LlNE TO 1·LlNE DATA SELECTOR/MULTIPLEXER
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C. unlessotherwisenoted)

"
Vo Output voltage Off·state -0.5-+5.5
Topr Operating free-air ambient temperature range -20"':' +75 'C
Limits
Min Typ Max
Vee Supply voltage \

4.75 5 5.25 V
IOH High-level output current VOH<::2.4V 0 -2.6 mA
VOL~0.4V 0 4 mA
VOL~0.5V 0 S mA
Limits
Min Typ .. Max
VIL Low-level input voltage O.S V
VIC Input clamp voltage Vee=4.75V,lle=-ISmA -1.5 V
Vee=4.75V, VI=O.SV
VI= 2 V, IOH= -2.6mA

Vee=4.75V I IOL= 4 mA 0.25' 0.4 V
VI=O.SV. VI= 2 V I IOL= SmA 0.35 0.5 V
IOZH Off-state high-level output current Vce=5.25V, VI= 2V, VO=2.7V 20 f.lA
IOZL Off-state low-level output current VCC=5.25V, VI= 2V, VO=0.4V -20 f.lA
Vce=5.25V, VI=2.7V 20 f.lA
Vec=5.25V. VI=10V 0.1 mA
IlL Low-level input current Vec=5.25V. VI=0.4V -0.4 mA
ios Short·drcuit output current (Note 2) Vee=5.25V. VO= 0 V -30 -130 mA
leeL Supply current, all inputs low Vec=5.25V (Note 31 7 12 mA
lecz Supply current, all outputs off Vcc=5.25V (Note 41 S.5 14 mA
* : All typical values are at VCC= 5V. Ta=25"C
Note 2: All measurements should be done quickly and not more than one output should
be shorted at a time.
Note 3: ICCl is measured with all inputs at av.
Note 4: Iccz is measured with lCC and 20C at 4.5V and all other inputs at av.
SWITCHING CHARACTERISTICS (Vec= 5V. Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
tpHL time, from inputs 00-03 to output Y 6 20 ns
CL=15pF (Note 51
tpHL time, from inputs SA. Sa to output Y 14 32 ns
tPZH Output enable time to high-level RL= 2 kQ, CL= 15pF (Note 51 14 23 . ns
t pZL Output enable time to low-level RL= 2 kQ, CL= 15pF (Note 5) 15 23 ns
tpHZ Output disable time from high-level RL = 2 k Q, CL = 5 pF (Note 51 14 41 ns
tpLZ Output disable .time from lOW-level RL- 2kQ, CL- 5 pF (Note 51 9 27 ns
• MITSUBISHI
"'ELECTRIC 2-339
MITSUBISHI LSTTLs
M74LS353P
DUAL 4·UNE TO 1·LlNE DATA SELECTOR/MULTIPLEXER
LEVELS OF
DELAY 3 ---4..-J
LEVELS OF
DELAY 2
Symbol SWl SW2
tPZH Open Closed
tPZL Closed Open
tPLZ Closed Closed
tPHZ Closed Closed

00
PRR=lMHz. t,=6ns, t,=6ns, t w =500ns, Vp=3Vp.p, Zo = 50n.
(2) All diodes are switching diodes.
1'-_ _ _-+.....--IJI-_-.+O. 5V
O.5V
• MITSUBISHI
2-340 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS365AP
HEX BUS DRIVER WITH 3-STATE OUTPUT
DESCRIPTION
with output control inputs OC l and OC 2 , which are
cg~;~g~ 00,-+ 1 vee
common to sil< circuits. INPUT _OUTPUT
INPUT .... 002 CONTROL
INPUT
FEATURES OUTPUT .... 6A INPUT
• Provided with output control inputs common to 6
INPUT .... 6Y OUTPUT
circuits
• High fan-out (lOl = 24mA, IOH = -2.6mA) OUTPUT 2Y .... SA INPUT
• High breakdown input voltage (VI:;;:; 15V)

INPUT 3A OUTPUT
• Wide operating temperature range (T a = -20-+75 0 C)
OUTPUT 3Y .... 4A INPUT

equipment.

When OC l and OC 2 are both low, high appears at the
output Y if input A is high and low appears if A is low.
When either OC l or OC 2 or both are high, Y is put in FUNCTION TABLE INotel)
the high-impedance state irrespective of the status of A. For 00, 002 A Y

this reason, this device is most suitable for use as a bus line l l L L
driver. L L H H
H X X Z
X H X Z
Z : high-impedance
CIRCUIT SCHEMATIC (EACH BUFFER)

r---~------~------~------~--------~----~--------~-oVec
12k 4k
17k
00,
OUTPUT
CONTROL
INPUTS
12k Y OUTPUT
002
I NPUT A o-~-----I4I-----I---II---------+--+-'
~----------~~~------~--I--------~~--------------~----~-oGND
' - - - - - - THE OTHER BUFFERS UNIT: Q
• MITSUBISHI
.... ELECTRIC 2-341
MITSUBISHI LSTTLs
M74LS36SAP
ABSOLUTE MAXIMUM RATINGSCTa=-20-+75'c, unless otherwise noted)

V, Input voltage -0.5- +15 V
,RECOMMENDED OPERATING CONDITIONS (Ta =-20- +75'C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply v~ltage 4.75 5 5.25 V
10H High-level output current VOH:;;'2.4V 0 -2.6 rT)A
VOL"; 0 .4V 0 12 mA
VOL"; 0 .5V 0 24 mA
Limits
Min Typ * Max
V'c Input clamp voltage Vee=4. 75V, I,e= -18mA -1.5 V
Vee=4.75V, V,=0.8V
V,=2V, 10H= -2 .6mA
Vee=4.75V 10L = 12mA 0.25 0.4 V
V,=0.8V IOL=24mA o.3S 0.5 V
10ZH Off-state high-level output current Vee=S.2SV, V,(OC)=2V, VO=2.4V 20 J.1A
10ZL Off-state low-level output current Vee=S.2SV, V, (OC)=2V, Vo=0.4V -20 J.1A
Vee=S.2SV, V,=2.7V 20 J.1A
Vee=S.2SV, V,=10V 0.1 mA
OC Vee=S.25V, V,=0.4V -0.4 rnA
V,(OC)=0.4V
-0.4 mA
"L Low-level input current V,=0.4V
A Vee=5.2SV
V,(OC)= 2V
-20 J.1A
V,=0.5V
los Short circuit output current (Note 2) Vee-S.2SV, VO-OV -40 -225 rnA
IcC Supply current Vee=S.2SV, VI=OV, V, (OC) =4.SV 14 24 mA
* : All values are at Vcc=5V, Ta=2S"C
Note 2: All measurements should be done Quickly and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS(Vee=SV, Ta=2S'C, unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to·high-Ievel, high-to-Iow·level output CL=45pF 7 16 ns
tpHL propagation time, from input A to output Y INote 3) 10 22 ns
tPZH Output enable time to high-level RL-667Q, CL=4SpF· INote 3) 13 35 ns
tPZL Output enable time to low-level RL-667Q, CL-4SpF INote3) 15 40 ns
tpHZ Output disable time from high-level RL=667Q, CL= 5pF (Note 3) 13 30 ns
tpLZ Output -disable time from low-level RL=667Q, CL=5pF (Note 3) 16 35 ns
• MITSUBISHI
2-342 "ELECTRIC
MITSUBISHI LSTTLs
M74LS365AP
Note3: Measurementcircuit TIMING DIAGRAM (Reference level = 1.3V)
INPUT Vee
PG DUT
y
50Q
Symbol SWl SW2

t PZH Open Closed
t PZL Closed Open
tPLZ Closed Closed
t PHZ Closed Closed

V p = 3Vp.p. Zo = 50>2.
(2) All diodes are switching diodes (t rr ~ 4ns)
• MITSUBISHI
.... ELECTRIC 2-343
MITSUBISHI LSTTLs
M74LS366AP
HEX BUS DRIVER WITH 3-STATE OUTPUT (INVERTED)

with output control inputs OC I and OC 2 , which are OUTPUT
CONTROL Vee
common to six circuits. INPUT
OUTPUT
INPUT lA +- CiC2 T~pNUTTROL
FEATURES OUTPUT lY +- 6A INPUT
INPUT 6Y OUTPUT
circuits
• High fan-out (10 L = 24mA, 10H = -2.6mA) OUTPUT 2Y SA INPUT
• High breakdown input voltage (VI ~ 15V)

• Wide operating temperature range (T a = -20~+75°C)
INPUT
OUTPUT
3A
3Y
- SY
4A
OUTPUT
INPUT

equipment.

When OC I and OC 2 are both low, low appears in the
output Y if input A is high and high appears if A is low.
When either OC I or OC2 both are high, all outputs Yare
put in the high-impedance state irrespective of the status of 00, 002 A Y

A. For this reason, this device is most suitable for use as a L L L H
bus line driver. L L H L
H X X Z
X H X Z
Note1: X : irrelevant
Z : high-impedance

r---~------or------~--------~------------~--------~~OVoo
OUTPUT
CONTROL
INPUTS Y OUTPUT
12k
INPUT A o-+-+---------+--+--------Hf-l
L-~--------~--~----~-4_+------~------------------~----~_oGND
THE OTHER BUFFERS

UNIT: Q
• .MITSUBISHI
2--:-344 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS366AP
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75'c, unlessotherwisenoted)

Vo Output voltage Off-state '--0.5- +5.5 V
RECOMMENDED OPERATING CONDITIONS CTa=-20- + 75'C, unless otherwise noted)
Limits
Min Typ Max
10H High-level output current VOH~2.4V 0 -2.6 rnA

VOL",0.4V 0 12 rnA
VOL",0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS CTa= -20- +75·C. unless otherwise noted)
Limits
Min Typ * Max
V,O Input clamp voltage VOO=4.75V,I'0=-18rnA -1.5 V
VOH High-level output voltage Voo-4.75V, V,-0.8V, IOH--2.6rnA 2.4 3.1 V
Voc=4.75V IOL=12mA 0.25 0.4 V
V,=0.8V, V,=2V IOL=24rnA 0.35 0.5 V
10ZH Off-state high-level output current Voo=5.25V, V,(OC)=2V, VO=2.4V 20 J.1A
10ZL Off-state low-level output current VoC=5.25V, V,(OC) =2V, VO=0.4V -20 J.1A
VOO=5.25V, V,=2.7V 20 J.1A
Voo=5.25V, V,=10V 0.1 rnA
DC VoO=5.25V, V, =0.4V -0.4 rnA
V, (DC) =0.4V
-0.4 rnA
I,L Low-level input current V,=0.4V
A VOO=5.25V
V,(OC)= 2V
-20 J.1A
V, =0.5V
lOS Short-circuit output current (Note 2) Voo=5.25V, Vo=OV -40 -225 rnA
100 Supply current Voo=5.25V, V,=OV, V,(OC)=4.5V 12 21 rnA
* : All values are at Vco=5V, Ta=25'C
SWITOHING CHARACTERISTICS(Voo=5V, Ta=25'C, unlessotherwisenoted)
Limits
Min Typ Max
t pLH Low-to-high-Ievel, high-to-Iow-Jevel output propagation CL=45pF 7 15 ns
tpHL time, from input A to output y INote3) 7 18 ns
tPZH Output enable time to'high-Ievel RL-667Q, CL=45pF INote3) 10 35 ns
tPZL Output enable time to low-level RL-667Q, CL-45pF INote3) 18 45 ns
tpHZ Output disable time from high-level RL-667Q, CL- 5pF INote 3) 13 32 ns
tpLZ Output disable time from I ow· level RL-667Q, CL= 5 pF INote3) 14 14 ns
• MITSUBISHI
.... ELECTRIC 2-345
MITSUBISHI LSTTLs
M74LS366AP

INPUT Vee
PG DUT
50n y
Symbol SW1 SW2
t PZH Open Closed
t PZL Closed Open
t PLZ Closed Closed
t PHZ Closed Closed

PR R = 1MHz, tr = 6ns. tf = 6ns, tw = 500ns,
Vp ~ 3Vp.p, Zo = 50n.
(3) CL includes probe and j.ig capacitance.
• MITSUBISHI
2-346 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS367AP
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
DESCRIPTION
I PIN CONFIGURATION (TOP VIEW)
The M74LS367 AP is a semiconductor integrated circuit
constaining 6 buffers with 3-state output and is provided
with output control inputs 10C and 20C, which are
OUTPUT _
common to 4 circuits and 2 circuits, respectively. CONTROL lOC .... 1 vee
INPUT
__ OUTPUT
INPUT lA, 20C CONTROL
FEATURES INPUT
OUTPUT lY, 2A, INPUT
circuits and 2 circuits. INPUT lA, 2Y, OUTPUT
• High fan-out OUTPUT lY, 2A, INPUT
• High breakdown input voltage
• Wide operating temperature range (Ta = -20 ~ +75°C) INPUT lA3 2Y, OUTPUT
OUTPUT 1 Y3 lA4 INPUT

APPLICATION
GND 1 Y4 OUTPUT
equipment.

When OC is low, high appears in the output Y if input A is
high, and low appears if A is low. When OC is high, Y is put
in the high-impedance state irrespectiv.e of the status of A.
For this reason, this device is most suitable for use as a bus
line driver.
FUNCTION TABLE (NOlell
OC A y
L L L
L H H
H X Z
Note 1: X: irrelevant
Z : high-impedance
r-----------~------~----~~------_;----~--------~~DVcc
OUTPUT
CONTROL OC
INPUT
Y OUTPUT
INPUT A o-r--I-u---------1----------'-H~=:j---I---+----j4t-~
L-_+_-----------4--------~~--------_+_--------------_+----+__oGND
L -____ TO OTHER BUFFERS
UNIT: Q
• MITSUBISHI
.... ELECTRIC 2-347
MITSUBISHI LSTTLs
M74LS367AP
Voe Supply voltage -0.5 +7 V
Topr Operating free-air ambi~nt temperature range -20-+75 'C
Tstg Storage temperature range -65 +150 'C
limits
Min Typ Max
10H High-level output current VOH;;;'2.4V 0 -2.6 mA

VOL"; 0 .4V 0 12 mA
VOL"; 0 .5V 0 24 mA
Limits
Min Typ* Max
VIC I nput clamp voltage Veo-4.75V, 110- -18mA -1.5 V
Voe-4.75V, VI-0.8V
VI=2V, IOH=-2.6mA
Voe=4.75V IOL=12mA 0.25 0.4 V
VI=0.8V IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Vee=5.25V, VI(OC)=2V, VO=2.4V 20 J1A
10ZL Off-state low-level output current Vee=5.25V, VI(OC)=2V, Vo=0.4V -20 J1A
Vee=5.25V, VI=2.7V 20 J1A
hH High-level input current
Vee=5.25V, VI=10V 0.1 mA
OC Vee=5.25V, VI=0.4V -0.4 ,mA
VI(OC)=0.4V
-0.4 mA
IlL Low-level input current VI= 0.4V
A Vce=5.25V
VI(OC)'= 2V
-20 J1A
I VI= 0.5V
los Short-circuit.output current VOO=5.25V, VO=OV -40 -22,5 mA
Icc Supply current Vee=5.25V, VI=OV, VI(OC)=4.5V 14 24 mA
=
Note 2; All measurements should be done quickly, and not more"than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Veo=5V, Ta=25'C, unless otherwise noted)
limits
Min Typ Max
tPLH Lwo-to-high-Ievel, high-to-Iow-Ievel output propagation CL-45pF 7 16 ns
tpHL time, from input A to output Y INote 31 10 22 ns
tPZH Output enable time to high-level RL=667Q, CL=45pF INote 3) 13 35 ns
tPZL Output enable time to low-level RL=667Q, CL=45pF INote 3) 15 40 ns
tpHZ Output diSable time from high·level RL=667Q, CL=5pF INote 3) 13 30 ns
tpLZ Output disable time from low-level RL=667Q, CL= 5 pF INote 31 16 35 ns
• MITSUBISHI
2-348 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS367AP

INPUT Vee
PG DUT
y
50Q
Symbol SWI SW2

--- -~
I---~--
t PZH Open Closed
t PZL Closed Open
t PLZ Closed Closed
t PHZ Closed Closed

PRR = 1MHz, tr = 6ns, tl = 6ns, tw = 500ns,
Vp =3Vp_p, Zo =50n
(2) All diodes are switching diodes (trr ~ 4ns)
• MITSUBISHI
.... ELECTRIC 2-349
MITSUBISHI LSTTLs
M74LS368AP

with output control inputs 10C and 20C, which are
OUTPUT
common to 4 circuits and 2 circuits respectively. CONTROL 10C -+ 1 Vee
INPUT
OUTPUT
INPUT lAt 20C CONTROL
FEATURES INPUT
• Provided with output control inputs common to 4 OUTPUT lVt 2A2 INPUT
circuits and 2 circuits INPUT lAz 2 Yz OUTPUT

• High fan-out (10 L = 24mA, 10 H = -2.6mA)
• High breakdown input voltage (VI ~ 15V) OUTPUT 1Vz 2A, INPUT
• Wide operating temperature range (Ta = -2<r- +75°C) INPUT 1A3 2Y, OUTPUT
OUTPUT lV3 lA4 INPUT

APPLICATION
General purpose, for use in industrial and consumer GND 1Y, OUTPUT
equipment.

When OC is low, low appears in the output Y if input A is
high and high appears if A is low. When OC is high, Y is put
in the high-impedance state irrespective of the status of A.
For this reason, this device is most suitable for use as a bus
line driver_
OC A Y
L L H
L H L
H X Z
Z : high-impedance
r-----------~----~--------~----------~--------~_oVee
12k 7k
OUTPUT
CONTROL OC
INPUT
Y OUTPUT
4k
I NPUT A o--t-+------------I-----~--_t_t_'
~4-----------~--------~~--~----------~------~--~__oGND
TO OTHER BUFFERS
UNIT: Q
• MITSUBISHI
2-350 ;"'ELECTRIC
MITSUBISHI LSTTLs
M74LS368AP
ABSOLUTE MAXIMUM RATINGSCTa=-20-+75'c, unless otherwise noted)

RECOMMENDED OPERATING CONDITIONS (Ta= -20- +75'C, unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current VOH~2 .4V 0 -2.6 mA
VOL"'0.4V 0 12 mA
VOL'" 0 .5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75'C, unless otherwise noted )
Limits
Min Typ * Max
VIC I nput clamp voltage Vee=4.75V,lle=-18mA -1.5 V
VOH High-level output voltage Vee=4.75V, VI=0.8V. IOH=-2.6mA 2.4 3.1 V
Vee=4.75V IOL= 12mA 0.25 0.4 V
VI=0.8V, VI=2V IOL=24mA 0.35 0.5 V
IOZH Off-state high-level output current Vee=5.25V, VI(OC)=2V, Vo=2.4V 20 I1A
IOZL Off-state low-level output current Vee=5.25V, VI(OC)=2V, VO=0.4V -20 I1A
Vee=5.25V, VI=2.7V 20 I1A
Vee=5.25V, VI=10V 0.1 mA
OC Vee=5.25V, VI =0.4V -0.4 mA
VI(OC) =0.4V
-0.4 mA
IlL Low-level input current VI =O.4V
A Vee=5.25V
VI(OC)=2V
-20 I1A
VI =p.5V
los Short-circuit output current (Note 2) Vee=5.25V, Vo=OV -40 -225 mA
IcC Supply current Vee=5.25V, VI=OV, VI(OC)=4.5V 12 21 mA
* : All values are at VCC= SV, T a = 2S C. unless otherwise noted
Q
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25'C, unless otherwise noted)
limits
Min Typ Max
t pLH Low-to-high level. high-to-Iow-Ievel output propagation CL=45pF 7 15 ns
tpHL time. from input A to output Y INote 3) 7 18 ns
tPZH Output enable time to high-level RL=667Q, CL=45pF INote31 16 35 ns
tPZL Output enable time to low-level RL=667Q, CL=45pF INote 31 18 45 ns
tpHZ Output disable time from high-level RL=667Q, CL= 5 pF INote 3) 13 32 ns
tpLZ Output disable time 'from low-level RL=667Q, CL= 5 pF INote 3) 18 35 ns
• MITSUBISHI
.... ELECTRIC 2-351
MITSUBISHI LSTTLs
M74LS368AP

INPUT Vee
A,
PG OUT
y
SOQ
Symbol SWl SW2

t PZH Open Closed
t PZL Closed Open
t PLZ Closed Closed
t PHZ Closed Closed
(1) The pulse generator (PG) has the following characteristics;

PRA = 1MHz. tr = 6ns, tf = 6ns, tw = 500n5,
Vp =3Vp.p. Zo =50n.
(3) CL includes probe and j i9 capacitance.
., MITSUBISHI
2-352 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS373P
OCTAL D-TYPE TRANSPARENT LATCHS WITH 3-STATE OUTPUTS
DESCRIPTION
containing 8 D-type latch circuits with 3-state output and cg~{~g~ DC -. 1 Vee
is provided with an output controlling input and an enable INPUT
input common to all circuits. OUTPUT -. 8Q OUTPUT
11D-.3 of- 80 I
FEATURES DATA INPUTS I of-
DATA
70 jlNPUTS
20 -.
• 3-state, high fan-out output
• Since pnp transistor input is used in output control and 1 2Q of- 5
enable inputs, the input load factor is small OUTPUTS I
3Q of-
• The enable input has high noise margin (Hysterisis

3D -. 7
= 400mV typical) DATA 1
• Package density is high with 8 circuits in one package INPUTS I 40 -. 8
• Provided with .output control and enable inputs which
OUTPUT 4Q of- 9 -. 5Q OUTPUT
are common to all 8 circuits.
• Wide operating temperature range (Ta = -20 ~ +75° C) GNO ENABLE
INPUT
APPLICATION Outline 20P4

equipment.
immediately before the change is latched. While E is low,
FUNCTIONAL DESCRIPTION the status of 0 does not change even if the D is changed.
Since the 8 D-type latches use pnp transistor input for the When DC is high, 10 - 80 are all put in the high-
output control input OC and enable input E, which are impedance state irrespective of other input signals. Since all
common to all 8 circuits, the input load factor is small. outputs have high fan-out, this device is suitable for use as a
With a hysteretis of 400mV (typical) specially given to the buffer register, I/O port, or bi-directional bus driver. For
input circuit E, noise margin is high. application, see M74LS374P.
When E is high, the information from the data input D app-
ears in the output O.
When the D signal changes, the signal that appears in 0 also
changes. When E changes from high to low, the status of D
BLOCK DIAGRAM
OUTPUTS
__---------------------A~--------------------------------~\
lQ 2Q 3Q 4Q 5Q 5Q 7Q 8Q Vee
ENABLE INPUT E 11)--ITI>~'------_+'------_+'------_+L------_+L------_++-----__++-----_T
1D 20 3D 40 50 50 80 GNO
~--------------------------~y------------------------------
DATA INPUTS
• MITSUBISHI
.... ELECTRIC 2-353
MITSUBISHI LSTTLs
M74LS373P
OCTAL D·TYPE TRANSPARENT LATCHS WITH 3·STATE OUTPUTS
OC E D Q
L H H H
Note 1: QO : level of Q before the indicated steady-state input conditions were established
L H L L
Z : high-impedance
L L ,X QO
X : irrelevant
H X X Z
VI Input voltage - 0.5- +15 V
Vo Output voltage Off·state -0.5-+7 V
RECOMMENDED OPERATING CONDITIONS (Ta =-20- +75·C. unless otherwise noted)
Limits
Min Typ Max
10H High-level output current VOH"'2.4V 0 -2.6 IT]A
VOL~0.4V 0 12 mA
VOL~O .5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75·C. unless otherwi;e noted)
Limits
Symbol Parameter Test conditions I Unit
! Min Typ* Max
VIH High-level input voltage , 2 V
VIL Low-level input voltaae I E I

I
0.75
V
I D. OC 'I 0.8
VIO Input clamp voltage Voo=4.75V.110=-18mA -1.5 V
Voo=4.75V. VI=0.8V
VOH High-level output voltage •
2.4 3.1 V
VI=2V.loH=-2.6mA

VOO=4.75V I IOL=12 mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current VOO=5.25V. VI=2V. Vo=2.7V 20 "A
10ZL Off-state low-level output current VOO=5.25V. VI=2V. VO=0.4V -20 "A
VOO=5.25V. VI=2.7V 20 "A
VOO=5.25V. VI=10V O. , mA
IlL Low-level input current VOo=5.25V. Vj=0.4V -0.4 mA
los Short·circuit output current (Note 2) VOO=5.25V. Vo=OV -30 -130 mA
looz Supply current, all outputs off Voo=5.25V (Note 3) 24 40 mA
=
3: leez is measured with OC input at 4.5V.
• MITSUBISHI
2-354 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS373P
OCTAL D-TYPE TRANSPARENT LATCHS WITH 3-STATE OUTPUTS
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25'C, unlessotherwisenoted)
Limits
Symbol Parameter Test conditions Unit·
Min Typ Max
tpLH Low-to-high-Ievel. high-to-Iow-Jevel output propagation 9 18 ns
tpHL time, from input 1D-8D to output 1Q-8Q 11 18 ns
OL=45pF (Note 41
tPLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 14 30 ns
tpHL time, from input E to output 1 Q-8Q 13 30 ns
tPZH Output enable time to high-level RL=66Hl, OL=45pF INote41 13 28 ns
tPZL Output enable time to low-level RL=667 Q, OL=45pF INote41 14 36 ns
tpHZ Output disable time from high-level RL=667 Q, OL = 5 pF (Note 41 16 20 ns
tpLZ Output disable time from low-level RL=667Q, OL= 5pF (Note 41 8 25 ns
Note 4: Measurme Measurement circuit
INPUT Vee
Symbol SW1 SW2
tPZH Open Closed (11 The pulse generator (PGI has the following
characteristics:
PG OUT tPZL Closed Open
PR R = 1MHz, tr = 6ns, tf = 6ns, tw = 500ns,
tPLZ Closed Closed Vp = 3Vp.p, Zo = 50n
SOQ (21 All diodes are switching diodes It" ~ 4nsl
tPHZ Closed Closed (3) CL includes probe and jig capacitance.
;;.SWZ
TIMING REQUIREMENTS (Vee=SV, Ta=Z5'C unless otherwise noted)
Limits
Min Typ Max
tw (EH) Enable input E high pulse width 15 11 ns
tw (EL) Enable input E low pulse width 15 10 ns
tsu Setup time 1D-8D to E 5 -2 ns
th Hold time 1D-8D to E 20 7 ns
tW(EH) tW(EL)
1D-8D 1Q-8Q
1Q-8Q
lQ -8Q
• MITSUBISHI
"'ELECTRIC 2-355
MITSUBISHI LSTTLs
M74LS374P
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOPS
WITH 3-STATE OUTPUTS

TheM74LS374P is a semiconductor integrated circuit
OUTPUT
containing 8 Ootype positive edge-triggered flipflop circuits CONTROL oc -+ 1 Vee
INPUT
with 3-state output, and is provided with an output control
OUTPUT OUTPUT
input and a clock input, which are common to all the
circuits_ 10-+ 3 +-- 80 ) DATA
DATA
INPUTS
1 INPUTS
20 -+ +-- 70
FEATURES
• Positive edge triggering 1
2Q +-- 5 -+ 7Q I
• 3-state, high fan-out output
OUTPUTS
3Q +-- -+ 6Q
IOUTPUTS
• The use of pnp transistor input for the output control 30 -+ 7
14+-- 60 ) DATA
and clock inputs has made the input load factor small DATA
INPUTS
1 +-- 50 INPUTS
40 -+
• The clock input has high noise margin_
(Hysterisis = 400mV typical) OUTPUT 4 Q +-- 9 --+ 5Q OUTPUT
• Package density is high with 8 circuits in one package
GND CLOCK INPUT
• Provided with output control and clock inputs which
are common to all 8 circuits.
Outline 20P4
APPLICATION When T changes from low to high,. the information of data

General purpose, for use in industrial and consumer input 0 immediately before the change appears in the
equipment. output 0 in accordance with the function table.
When DC is high, 10 - 80 are all put into the high-
FUNCTIONAL DESCRIPTION inpedance state, irrespective of other input signals. Since all
Since the B Ootype ege-triggered flip-flop circuits use a pnp outputs have high fan-out, this device is suitable for use as a
transistor input for the output control input DC and buffer register, I/O port, or bi-directional bus driver.
clock input T, which are common to all 8 circuits, the input
load factor is small. With a hysterisis of 400mV (typical)
specially given to the input circuit T, noise margin is high.
BLOCK DIAGRAM
OUTPUTS
_____________________ ____________ _____________________
~
A
~
~
1Q 2Q 3Q 4Q 5Q 6Q 7Q
CLOCK INPUT T 11D-~>-j-J1-------+1--------+1-------+1-------+1-------+.l------+.l--------j.J
10 20 3D 40 50 60 7D GND
~----------~---------------y~----------------------------~
DATA INPUTS
. • MITSUBISHI
2-356 "ELECTRIC
MITSUBISHI LSTTLs
M74LS374P
OCTAL POSITIVE EDGE·TRIGGERED D·TYPE FLIP FLOPS
WITH 3·STATE OUTPUTS
FUNCTION TAB LE (Note 11
OC T 0 Q Note 1: i : transition from low to high level

L i H H QO : level of Q before the indicated steady-state input conditions were established
Z : high·impedance
L i L L
X : irrelevant
L L X QO
H X X Z
.ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, unless otherwise noted)

Vo Output voltage Off-state -0.5-+7 V
RECOMMENDED OPERATING CONDITIONS (Ta =-20-+75'C, unless otherwise noted)
Limits
Min Typ Max

IOH High·level output current VOH~2 AV 0 -2.6 mA
VOL~0.4V 0 12 mA
IOL' Low-level output current
VOL~O .SV 0 24 mA
Limits
Min Typ* Max
VIC Input clamp voltage Vee=4. 75V. Ile= -1BmA -1.5 V
Vee=4.75V. VI=O.BV
VI=2V.loH=-2.6mA

Vee=4.75V I IOL-12mA 0.25 004 V
VI=O.BV. VI=2V J IOL=24mA 0.35 0.5 V
10ZH Off·state high-level output current Vee-S .25V , VI-2V . VO- 2. 7V 20 /-lA
10ZL Off-state low-level output current Vee=5.25V. VI-2V, Vo-OAV -20 /-lA
Vee=5.25V. VI=2.7V 20 /-lA
Vee=5.25V. VI=10V 0.1 mA
IlL Low-level input current Vcc.=5.25V. VI=0.4V -0.4 mA
los Short-circuit output current '(Note 2) Vee=5.25V. VO=OV -30 -130 mA
leez Supply current, all outputs off Vee=5.25V (Note 3) 27 45 mA
* : All typical values are at Vee =5V, Ta =25°C.
3: Iccz is measured with OC input at 4.5V.
• MITSUBISHI
.... ELECTRIC 2-357
MITSUBISHI LSTTLs
M74LS374P
SWITCHING CHARACTERISTICS (Vcc=SV. Ta=2S·C. unless otherwise noted)
Limits
Min Typ Max
t pLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation CL=4SpF INote4) 10 28 ns
tpHL time, from input T to output 10-80 13 28 ns
tPZH Output enable time to high-level RL=667Q. CL=4SpF INote4) 14 28 ns
tPZL Output enable time to low-level RL=667Q. CL=4SpF INote4) 14 28 ns
tpHZ Output disable time from high-level RL =667Q. CL= SpF INote 4) 16 20 ns
tpLZ Output disable time from low-level RL=667Q. CL= SpF INote 4) 8 2S ns
INPUT Vee
Symbol SW1 SW2

(1) The pulse generator IPG) has the following
t PZH Open Closed characteristics:
PG DUT Closed Open PRR = 1MHz, tr = 6ns, tf = 6ns, tw= SOOns,
tPZL
Vp = 3Vp.p, Zo =son
tpLZ Closed Closed (2) All diodes are switching diodes It" ~ 4ns)
SOQ
t PHZ Closed Closed
TIMING REQUIREMENTS (Vcc=SV. Ta=2S·C. unless otherwise noted)
Limits
Min Typ Max
tW(TH) Clock input T high pulse width 1S S ns
tW(TL) Clock input. T low pulse width 18 15 ns
tSU(O) Setup time 1 D - 8D to T 20 6 ns
th(O) Hold time 1D-8D to T 4 1 ns
1O-8D 10-80
10-80 10-80
• MITSUBISHI
2-358 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS374P
APPLICATION EXAMPLE
a·Bit shift register
OUTPUT
CONTROL INPUT 1
6 M74LS374P
DC
10 10
20 20
30 30
40 40
DATA BUS 1 50 DATA BUS 2
50
60 60
7D 70
80 80
T
CLOCK INPUT 1 I
CLOCK INPUT 2
I
T
'-- 80 80 t--
'--- 70 7D t---
60 60
50 50
40 40
30 30
20 20
10 10
DC
I' M74LS374P
OUTPUT
CONTROL INPUT 2
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS375P

containing 4 bistable latch circuits and is provided with
outputs Q and Q.
DATA INPUT Vee
FEATURES '-0 <- .... 4D DATA INPUT
• Enable inputs common to two circuits each OUTPUTS {
• Q and Q outputs
lQ <- --+ 40 } OUTPUTS
• pin 8 GND, pin 16 Vee --+ 4Q
• Wide operating temperature range (T a = -20 ~ +75° C) 2Q .... 5 .... 3-4E ~~pAUBTLE
OUTPUTS { _
2Q ....
APPLICATION --+ 3Q }
_ OUTPUTS
General purpose, for use in industrial and consumer DATA INPUT --+ 3Q
equipment. GND DATA INPUT
This device contains 4 D-type latch circuits and is provided
Outline 16P4
with enable inputs E common to 2 circuits each. When E is
high, the information from the data input D appears in the
outputs Q and Q. When the D signal changes, the signal that BLOCK DIAGRAM (EACH LATCH)
appears in outputs Q and Q also changes. When E changes
from high to low, the status of D immediately before the
change is latched. While E is low, the status of Q and Q
does not change even if D is changed. DATA - I
This IC has the same functions and electrical charac- ,"MC~. QQOUT
I PUTS
teristics as M74LS75P and differs only in its pin con- ENABLE E
INPUT
figu ration.
THE OTHER LATCHES
FUNCTION TABLE {Note 11
E D Q Q
H H H L
H L L H
L x
Note l QO, QO: Level of Q and 0' before the indicated steady-state input conditions
were established.
X : Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-,-+75"C. unlessotherwisenoted)

T5t9 Storage temperature range -65- + 150 "C
• MITSUBISHI
2-360 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS375P
Limits
Min Typ Max
IOH Hiqh-Ievel output current VOH;;'2.7V 0 -400 I1A

VOL~0.4V 0 4 mA
IOL Low-Jevel output curr~nt
VOL~0.5V 0 B mA
Limits
Min Typ * Max
V,H High-level input voltage' 2 V
V,L Low-level input voltage O.B V
V'C Input clamp voltage VCC=4.75V, l,c=-lBmA -1.5 V
Vec=4.75V, V, =O.BV
V,=2V, IOH= -40011A

VCC=4.75V I IOL=4mA 0.25 0.4 V
V, =O.BV, V, =2V I IOL=BmA 0.35 0.5 V
0 Vcc=5.25V 20
I1A
E V, =2.7V BO
0 VCC=5.25V 0.1
mA
E V,=10V 0.4
0 VCC=S.2SV -0.4
IlL Low-level input current mA
E V, =0.4V -1.6
los Short-circuit output current {Note 2} Vce=5.25V. VO= 0 V -20 -100 rnA
Icc Supply current VCC=S.25V INote 3) 6.3 12 mA
* : All typicalvaluesareatVcc=5V, Ta=25"C
SWITCHING CHARACTERISTICS (Vee=SV. Ta=2S·C. unlessotherw;senoted)
Limits
Min Typ Max
tPHL time, from input 0 to output Q B 17 ns
-
tPHL time, from input 0 to output Q 6 lS ns
CL=lSpF INote 41
tpHL time, from input E to output Q 12 25 ns
tpLH Low-to-high-Ievel. high-~o-Iow-Ievel output propagation 12 30 ns
tPHL time, from input E to output Q 6 15 ns
INPUT Vcc OUTPUT
r
characteristics:
PRR == 1MHz, tr '" 6ns, tf '" 6ns, tw = 500ns,
Vp = 3Vp.p. Zo = 50f!.
(2) CL includes pr~be and jig capacitance.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS37SP
TIMING REQUIREMENTS (Vcc=SV. Ta=2S'C. unlessotherwisenoted)
Limits
Min Typ Max
tW(EH) Enable input E high pulse width 20 7 ns

tSU(D) Setup time 10 -4D to E 20 12 ns
th (D) Hold time 10 - 4D to E 8 5 ns

tW(EH)
1-2E
1O-4D
3-4E
1O-4D 1Q-4Q
th(D)
1Q-4Q
High-level 3-4E, 1-2E
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS377P
OCTAL POSITIVE EDGE·TRIGGERED D·TYPE FLIP FLOP WITH ENABLE

containing 8 D-type positive edge-triggered flip-flop circuits ENABLE
vee
INPUT
with common clock input and enable input.
OUTPUT OUTPUT
FEATURES DATA /10 -> 3 +- 80 \

• Positive edge-triggering INPUTS I20 ->
+- 70
DATA
f INPUTS
• High mounting density with 8 circuits contained
• Enable and clock inputs common to all 8 circuits /2Q +- 5 -> 7Q I
OUTPUTS I 3Q +- -> 6Q
/
OUTPUTS
APPLICATION DATA I 3D -> 7
INPUTS 140 -> 8

equipment. OUTPUT 4Q +- 9 OUTPUTS
CLOCK
FUNCTIONAL DESCRIPTION GNO INPUT
This device contains 8 edge-triggered D-type flip-flop

Outline 20P4
circuits and it is provided with clock input T and enable
input E common tq all 8 circuits. When T changes in each
flip-flop from low to high, the data input signal D
immediately before the change appears in output Q.
When E is set high, the output status does not change
irrespective of the status of the other input signals.
Malfunctioning does not result even if E is set from high to
low or from low to high.
BLOCK DIAGRAM
OUTPUTS
r - ____________________~A~------------------------------~
lQ 2Q SQ 6Q 7Q
CLOCK
INPUT
ENABLE
INPUT
10 20 3D 40 50 70 80 GNO
~------------------------~v--------------------------~
DATA INPUTS
• MITSUBISHI
.... ELECTRIC 2-363
MITSUBISHI LSTTLs
M74LS377P
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH ENABLE
FUNCTION TABLE:INote 11
E T D 0
H X X 0° Note 1 i : Transition form low to high (positive edge trigger)
L i H H QO: Level of Q before the indicated steady-state input conditjon~ were established.
X : Irrelevant
L i L L
X L X 0°
Limits
Min Typ Max
10H High-level output current VOH~2. 7V 0 -400 /.LA
VOL";;0.4V 0 4 mA
VOL";;0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta = -20- +75'C, unless otherwise noted)
Limits
Min Typ Max
VIH High-level input voltage 2
* V
Vie Input clamp voltage Vce=4.75V,IIC=-18rnA -1.5 V
Vee=4.75V. VI=0.8V
VI=2V.loH=-400/.LA

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8rnA 0.35 0.5 V
Vee=5.25V. VI=2.7V 20 /.LA
Vee=5.2,5V. VI=10V 0.1 rnA
IlL Low-level input current Vee=5.25V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 2) Vee=5.25V. VO=OV -20 -100 mA
I'ee Supply current Vee=5.25V INote 3) 17 28 mA
*: AlitypicalvaluesareatVcc=5V, Ta=2SoC
Note 3: Supply current is measured after 10""" 8D are set to OV and T has been changed from OV to 4.5V.
SWITCHING CHARACTERISTICS (Vec=5V. T a =25·C. unlessothcrwisenoted)
Limits
Symbol Param~,ter Test conditions Unit
Min Typ Max
tpL," Low-to-high-Ievel, high-to-Iow-Ievel output propagation OL=15pF l!'Jote 4) 11 27 ns
tpHL time, from T to 1 Q-8Q 11 27 ns
. • MITSUBISHI
2-364 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS377P
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH ENABLE
INPUT Vee OUTPUT
PG DUT (1 I The pulse generator (PG) has the following

characteristics:
son PR R = 1MHz, tr == 6ns. tf =6ns. tw = 500n5.
Vp =3Vp.p. Zo =50,!.
(2) C L includes probe and jig capacitance.
TIMING REQUIREMENTS <Vcc=SV. Ta=2S"C. unless otherwise noted)
Limits
Symbol Parameter. Test conditions Unit
Min Typ Max
tW(TLl Clock input T low pulse width 20 8 ns
tSU(O) Setup time 10 -80 to T 20 6 ns
tSU(EH) Setup time high E to T 10 0 ns
tSU(EL) Setup time low E to T 2S 9 ns
th (D) Hold time 10-80 to'T 5 - 5 ns
th (EH) Hold time high E to T 5 - 5 ns
th (EL) Hold time low E to T 5 1 ns
10-8D
lQ-8Q
pred ictable output performance.
• MITSUBISHI
.... ELECTRIC 2-365
MITSUBISHI LSTTLs
M74LS386P
QUADRUPLE 2·INPUT EXCLUSIVE OR GATE

The M74LS386P is a semiconductor circuit containing four
integral circuits configured into dual input exclusive OR
gates.
FEATURES lA -+ 1 Vee
INPUTS.{
• Capable of withstanding high input voltages (VI ~ 1SV) 18 --+
...... 4A }
• Low power dissapation (Pd = 30.SmW typical) INPUTS
• High operating speed (t pd = 10ns typical) OUTPUT lY <- ...... 48
• Low output impedance OUTPUT -+ 4Y OUTPUT

• Wide operating temperature range (Ta = -20 - +7So C)
2A --+ --+ 3Y OUTPUT
INPUTS {
APPLICATION 28 -+ <- 3A }
equipment GND ...... 38
The use of Shottky TTL technology has enabled the
achievement of high input voltages, high speed, low power Outline 14P4
dissipation, and high fan·out.
When both inputs A and B either low or high, output V CIRCUIT DIAGRAM (Applicable to each gate)
is low, and when A and B are high and low or low and high
respectively, V is high.
r--t--~--.,.-t---~{) Vee
24k 24k 9k 24k 7k 120
FUNCTION TABLE
A B Y Y .
OUTPUT
L L L
H L H
L H H
~~~--4-----~-~GND
H H L
UNIT: g
Vo Output voltage High-level state -0.5.-Vee V
Topr Operating free-air ambient temperature range -20 +75 '0
TSlg Storage temperature range -65-+150 '0
.• MITSUBISHI
2-366 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS386P
QUADRUPLE 2-INPUT EXCLUSIVE OR GATE
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S'C, unless otherwise noted)
Limits
Min Typ Max
VCC Supply votttlge 4.75 5 5.25 V

10H High-level output current VOH;"2.7V 0 -400 f.J. A
VOL";0.4V 0 4 rnA
VOL";0.5V 0 8 rnA
ELECTRICAL CHARACTERISTICS (Ta =-20-+75'C. unless otherwise noted)
Limits
Min Typ * Max

VIO Input clamp voltage Voo=4.75V,llc=-18rnA -1.5 V
Voo=4.7SV, VI=0.8V
VOH
- High-level output voltage
VI=2V. IOH= -4OOf.J.A
VoO=4.7SV I IOL =4rnA
2.7 3.4
0.25 0.4
V
V
V
VI=0.8V. VI=2V I IOL=8rnA 0.35 0.5
Voo=5.2SV. VI=2.7V 40 f.J.A
Voo=S.2SV, VI=10V 0.2 rnA
IlL Low-level input current Voo=S.25V, VI=O.4V -0.8 rnA
lOS Short-circuit output current (Note 1) VoO=5.2SV, VO=OV -20 -100 rnA
100 Supply current VoO=5.2SV INote 21 6.1 10 rnA
* : All typical values are at Vee:: 5V, T a:: 25°C.

2. ICC is measured with all inputs grounded.
SWITCHING CHARACTERISTICS (Veo=5V, Ta=2S'C. unless otherwise noted)
Limits
Min Typ Max
t PLH Low-to-high-Ievel, high-to-Iow-Ievel output 8 23 ns

CL=lSpF, Other inputs low (Note 3)'
tpHL propagation time 12 17 ns
t pLH Low-to-high-Ievel, high-to-Iow-!evel output 8 30 ns
CL=lSpF, Other inputs high (Note 3)
t PHL propagation time 10 22 ns
. Note 3. Measurement circuit TIMING DIAGRAM (Reference level = 1.3V)

INPUT Vee OUTPUT
PG OUT
B
50n
y
. (1) The pulse generator (PG) has the following

characteristics: PRR =: 1MHz, tr = 6ns, tf = 6ns,
tw= 500ns. Vp =3Vp.p. Zo = 5011.
(2) Cl includes probe and jig capacitance.
• MITSUBISHI
"ELECTRIC 2-367
MITSUBIS~I LSTTLs
M74LS390P
DUAL DECADE COUNTER
DESCRIPTION
containing two asynchronous decade counters with direct
reset inputs
CLOCK INPUT Vee
FEATURES DIRECT
RESET CLOCK INPUT
• High mounting density with 2 circuits equivalent to INPUT
DIRECT
LS90 and LS290 OUTPUT RESET
INPUT
• Direct reset inputs independent for both circuits CLOCK INPUT OUTPUT
j
• Usable independently as binary and divide-by-5 counters
• High-speed counting (f max = 80MHz typical) lOS+- 5 CLOCK INPUT
• Wide operating temperature range (Ta= -20~+75°C) OUTPUTS lOe+- 6
100 +- 7
APPLICATION
equipment.
This device is composed of independent binary and Outline 16P4
and outputs Os, Oc and OD are employed for use as a
divide-by-5 counter. When employed as a decade counter,
the pure binary code output appears in the OA' Os, Oc
and OD outputs by connecting OA and T 2 and makirig T 1
the input. Counting is performed when T 1 and T 2 change
from high to low.
The binary and divide-by-5 counters can be reset
simultaneously by setting direct reset input RD high. For
use as a counter, RD is set low.
BLOCK DIAGRAM
r-~-------- ____________ OUTPUTS

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ____
~A
Os Oe 00
CLOCK INPUT 11 0------<:IT

K
K Ro Ro 0 Ro
DIRECT ~~~0i Ro
CLOCK INPUT T2 0---------------.....----------------------------------------.1
• MITSUBISHI
2-368 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS390P
DUAL DECADE COUNTER
FUNCTION TABLE (Note 11 Count number OA OB Oe 00

OB Oe 00 0 L L L 'L
T Ro OA I I I
L L L L 1 H L L L
X H I I I
t L Count 2 L H L L
3 H H L L
Note 1 Transition from high to low (negative trigger)
X Irrelevant 4 L L H L
5 H L H L
6 L H H L
7 H H H L
8 L L L H
9 H L L H
- -
Valid when 0Aand'T 2 are connected and T 1 is made the input
Vee Supply voltage -0,5- +7 V

Inputs Tl. Tz -0,5-+5,5 V
VI Input voltage
Input Ro -0,5-+15 V
Vo Output voltage High-level state -D,S-Vee V
Limits
Min Typ Max

10H High-level output current VOH~2, 7V 0 -400 J.1A
VOL",0,4V 0 4 mA
VOL'" 0 ,5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C. unlessolherwisenoted)
Limits
Min Typ* Max
VIL Low-level input voltage 0,8 V
VIO Input clamp voltage Vee=4,75V,lle=-18mA -1.5 V
Veo=4,75V, VI=0,8V
VOH High-level output voltage 2,7 3,4 V
VI=2V,loH=-400J.1A
Veo=4,75V llOL =4mA(Note 21 0,25 0,4 V
VI=0,8V, VI=2V Ii0L =8mA(Note 21 0,35 0,5 V
RO 20
T1 Vee=5,25V. VI=2,7V 100 J.1A
T2 200
RO Vee=5,25V. VI=10V 0,1
T1 0,2 mA
Vee=5,25V, VI= 5,5V
Tz 0,4
Ro -0,4
ilL LOW-level input current T1 Vee=5 ,25V, VI=0,4V -1.6 mA
Tz -2,4
los Short-circuit output current (Note 3) Vee-S,25V, VO-OV -20 -100 mA
Icc Supply current Vee=5,25V (Note 41 15 26 mA
*. All tYPical values are at Vcc = 5V, Ta - 25 C.
0
Note 2: Output QA should be tested with input 12

connected to outPut GA.
Note 3: All measurements should be done quickly' not more than one output should be shorted at a time.
Note 4: Icc is measured with 11 and 12 at av after RD has been set from 4.5V to av.
• MITSUBISHI
.... ELECTRIC 2-369
MITSUBISHI LSTTLs
M74LS390P
DUAL DECADE COUNTER
$WITCHING CHARACTERISTICS (Voo=SV. Ta=2S"C, unles,otherwi,enoted)
Limits
Min Typ Max
Maximum clock frequency. 25 80 MHz

fmax
from input 11
to output QA

fmax 12.5 35 MHz
from input i2 to output Os
tpLH Low·to-high·level. high·to·low·level output 8 20 ns
tpHL propagation time, from input 11 to output Q A 8 20 ns
tpLH Low·to·high·level, high·to·low·level output 24 60 ns
tpHL propagation time, from input T1 to output Qc 24 60 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output CL = lSpF (Note 5) 10 21 ns
tpHL propagation time, from input 12 to output Os 10' 21 ns
tpHL propagation time, from input 12 to output Qc 17 39 ns
tpLH Low-to-high-Ievel. high:to-Iow-Ievel output 10 21 ns
tpHL propagation time, from input 12 to output Qo 10 21 ns
tpHL 11 39 ns
from input Ao to outputs QA. QS. QO. Qo
INPUT Vee OUTPUT
PG DUT
111 The p~lse generator (PG) has"the following characteristics:
PRR = IMHz, Tr = 6n" tf = 6n,. tw = 500n"
son Vp = 3Vp.p, ZO° 500
TIMING REQUIREMENTS (VOO=SV, Ta=2S"C, unlessotherwi,enoted)
Limits
Min Typ Max
tW(T,H) Clock input T thigh pul,e width 20 4 ns
tW(T,H) Clock input T 2 high pul,e width 40 12 ns
tl Clock pulse fall time 300 100 ns
trec(RD) Recovery time RD to T,. T2 25 8 ns
tw (fl, T2H) tW(RO)
QA.QS.Qp,Qo
• MITSUBISHI
2-370 ;'ELECTRIC
MITSUBISHI LSTTLs
M74LS393P
DUAL 4-BIT BINARY COUNTERS
DESCRIPTION
containing two 4-bit binary (hexadecimal) asynchronous
counter circuits with direct reset inputs
CLOCK
INPUT Vee
FEATURES DIRECT CLOCK
• High package density with 2 circuits equivalent to LS93 RESET ~2f INPUT
INPUT
DIRECT
or LS293 -2Ro RESET
INPUT
• 2 discrete direct reset inputs
• High-speed counting (fmax =75MHz typical) OUTPUTS
• Wide operating temperature range (Ta = -20 ~ +75° C) ~ 2QB
OUTPUTS
APPLICATION
.equipment_
When a count pulse is fed to the clock input T , pure Outline 14P4
binary code appear in at outputs a A , a B, a c , and aD.
Counting is performed when T changes from high to low.
Reset is affected by making the direct reset input RD high.
For use as a counter, hold RD low.
BLOCK DIAGRAM (EACH BLOCK)
OUTPUTS
r -________________~A~_ _~--------------~
QB Qe Qo
CLOCK INPUT T o---------.q T
RESE.f:~~8::: Ro 0-----1 '>o-----+--------------+------~------.....-------------'
• .MITSUBISHI
.... ELECTRIC 2-371
MITSUBISHI LSTTLs
M74LS393P
DUAL 4·BIT BINARY COUNTERS
FUNCTION TABLE INote 11 Count QA Q8 Qe QD

T RD QA I Q8 I Qe I QD 0 L L L L
X H L
I L
1 L I L 1 H L L
L
L
1 L Count 2 L H L
Note 1: 1: transition from high to low-level 3 H H L L
X: irrelevant 4 L L H L
5 H L H L
6 L H H L
7 H H H L
8 L L L H
9 H L L H
10 L H L H
11 H H L H
12 L L H H
13 H L H H
14 L H H H
ABSOLUTE MAXIMUM RATINGS
(Ta= -20- +75"0, unless otherwise note~) 15 H H H H
Symbol Parameter Cond;tion~ Limits Unit

T'input -0.5-+5.5
VI Input voltage V
RD input -0.5-+15
Topr Operating free-air ambient temperature range -20- +75 "0
Tstg Storage temperatu re range -65-+150 "0
'RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"0, unless otherwise noted)
Limits
Min Typ Max
10H High·level output current VOH~2. 7V 0 -400 !-'A

VOL;£0.4V 0 4 mA
VOL;£0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75"0, unlessotherwisenoted)
Limits
Min Typ* Max
VIC Input clamp voltage Vee=4. 75V. Ile= -18mA -1.5 V
Vee=4.75V. VI=0.8V 2.7 3.4
VOH High-level output voltage V
VI=2V, 10H= -400!-,A
Vee=4.75V I IOL=4mA 0:25 0.4 V
VI=O .8V. VI=2V
1 IOL=8mA 0.35 0.5
20
V
RD
Vee~5.25V, VI=2.7V pA
T 100
IIH Hig'h-Ievel input current
RD Vee=5 .25V, VI=10V 0.1 mA
T Vee=5.25V, VI=5.5V 0.2 mA
RD -0.4
IlL Low-level input current Vee=5 .25V. VI=O .4V mA
T -1.6
los Short-circuit output current (Note 2) V ee=5 .25V, Vo=OV -20 -100 mA
Icc Supply current Vee-5.25V INote31 15 26 mA
* : All typ!cal values are at Vce == 5V, Ta == 25°C.
Note 2: All measurements should be done quickly, and not more than o'ne output should be shorted at a time.
3: Icc is measured with Tinput grounded and a momentary 4.5V, then grounded, applied R D input.
• MITSUBISHI
2-372 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS393P
DUAL 4-BIT BINARY COUNTERS
SWITCHING CHARACTERISTICS (Vcc=sv, Ta=2S'C, unlessothe,wisenoted)
Limits
Min Typ Max
f max Maximum dock frequency 25 75 MHz
tpHL time. from input T to output QA CL=lSpF INote41 8 20 ns
tpHL time. from input T to output Q 0 36 60 ns
tpHL 11 39 ns
f,om input R 0 to output 0 A. 0 B. 0 c. 00
INPUTS OUTPUT
PG OUT
SOQ PAA = 1MHz, t, = 6ns, tf = 6ns, tw = 500ns,
Vp = 3Vp.p, Zo = 50n
TIMING REQUIREMENTS (Vcc=sv, Ta=2S'C, unless otherwise noted)
limits
Min Typ Max
tW(THI Clock input T high pulse width 20 4 ns
.'
tW(Rol Direct reset input RD pulse width 20 4 ns'
tl Clock pulse fall time 300 100 ns
trec(Ro) Recovery ti me R D to T 25 7 ns
tW(fH) tW(Rol
Ro
QA,QS,QC,Qo '----__--J/
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS395AP
4-BIT CASCADABLE SHIFT REGISTER WITH 3-STATE OUTPUT

containing a 3-state output 4-bit serial/parallel input-serial/
parallel output shift register function.
01 RECT ~~~0i AD -+ 1 Vee
FEATURES
• Synchronous serial/pllrallel input-serial/parallel output SERIAL 1~~0~ Os -+
j
• Right shift function DO -+ 3
• Left shift function available with external connection
• Mode control input provided PARALLEL 0 1 -+ 4
• Output control input provided DATA INPUTS O2 -+ 5
• 0 0 -03 usable in AND-Tie connection
(3-state output provided) 03 -+ Q3' g~~~~~E
• Bit number can be expanded MODE
CONTROL MIC T CLOCK INPUT
• ~ide operating temperature range (Ta= -20-+75°C) INPUT OUTPUT
GNO CONTROL
• High fan·out (loL = 24mA, IOH = -2.6mA) INPUT
APPLICATION
General purpose, for use in industrial and. consumer Outline 16P4
equipment.
This device can be used as a serial input-series/parallel connected to D2 , O2 to D1 and 0 1 to Do, the serial data
output and parallel input-serial/parallel output shift register are applied to D3 , and the clock pulse is applied to T, the
with the mode control input M/C signal. When M/C is kept left shift operation is performed. When a high-level state is
in low, the serial data are applied to the serial data input Os applied to output control input OC, 0 0 -0 3 are put in a
and the clock pulse is applied to the clock input T, the high-impedance state and AND-Tie connection is made
serial data are shifted sequentially to outputs 0 0 -03 and possible. There will be no effect on the sh ift and parallel
0 3 ' in synchronization with the clock pulse. When M/C is data reading operations even when OC is changed. Cascade
kept in high, the parallel data are applied to parallel data output 0 3 ' is used for bit number expansion .. Even if OC is
inputs Do-D 3 and the l-bit clock pulse is applied to the T, changed in this state, there is no ·effect on the shifting and
signals Do-D 3 appear in outputs 0 0 -0 3 and 0 3 '. When T parallel data reading. By setting direct reset input Ro and
changes from high to low, the right shift or parallel data OC low, 0 0 ~03 'are reset low irrespective of the status of
re.ad operation is performed. When M/Cis kept in high, 0 3 is the other input signals.
BLOCK DIAGRAM OUTPUTS CASCADE OUTPUT

~ __________ ~A~ ____________ ~ OUTPUT
~o Q1 ~\ Q3
OUTPUT CO~~~~~ OC 9
CLOCK INPUT f
DIRECT ~~~~+ Ro 1
SER IAL 1~~0~ Os 2
MODE CONTROL MIC 7

INPUT
, Do 01 02 03 GNO
~~----------~--~Vr----~~----------~
• MITSUBISHI
2-374 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS395AP

Input -3-5tate output Cascade output
Function mode -RD MiG T Ds

Parallel input
Qo Ql Qz Q3 Q3'
Do Dl Dz D3
Direct reset L X X X X X X X L L L L L
Output hold H H H X X X X X QoO Ql 0 QZO Q3 0 Q:P
Parallel output H H t X Do Dl Dz D3 Do Dl Dz D3 D3
Output hord H L H X X X X X QoO Ql 0 QzO Q30 Q30
Right shift
H L t H X X X X H QoO Ql 0 QzO QzO
H L t L X X X X L QOO Ql 0 QzO QzO
Note 1. ! . Transition from high to low (negative edge trigger) X : Irrelevant
QO: Level of Q before the indicated steady-state input conditions were established Output impedance state is high when DC is high.
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C unless otherwise noted)


Vo Output voltage
I QO-Q3
,
Off-state -0.5- +5.5 V
I Q3 High-level output -0.5- Vee V

Tslg Storage temperature range -65- + 150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C. unless otherwise noted)

Limits
Min Typ Max

High-level Qo -Q3 VOH""2.4V 0 -2.6 mA
10H output current
03' VOH ",,2. 7V 0 -400 I"A
VOL~0.4V 0 12 mA
Qo -Q3
Low-level VOL~0.5V 0 24 mA
10L output current
VOL~0.4V 0 4 mA
Q3'
VOL~O.5V 0 8 mA

Limits
Min Tvp Max
Vie Input clamp voltage Vee -4. 75V, I,e- 18mA -1.5 V
Qo Q3 Vee -4.75V. Vi-0.8V 10H- -2.6mA 2.4 3.1 V
VOH High-level owtput voltage
Qi V, =2V 10H = -400l"A 2.7 3.4 V
IOL-12mA 0.25 0.4 V
QO-Q3
Vee =4.75V IOL=24mA 0.35 0.5 'J
V, =0.8V, V, =2V 10L- 4 mA 0.25 0.4
Q3' V
10L- 8 mA 0.35 0.5 V
10ZH Off-state high-level output current QO-Q3 Vee=5.25V, V, =2V. Vo=2.7V 20 I"A
10ZL Off-state low-level output current Qo Q3 Vee-5.25V. V, -2V. Vo-0.4V -20 I"A
Vee-5.25V, Vi -2.7V 20 I"A
I'H High-level ioput current
Vee-S.25V. V, -10V 0.1 mA
I,L Low-level input current Vee-5.25V, Vi -0.4V -0.4 mA
Qo -03 -30 -130 mA
los Short-circuit output current (Note 2) Vee=5.25V, Vo=OV
03' -20 -100 mA
lee Supply current Vee -5.25V INote 31 21 31 mA
leez Supply current, all outputs off Vee -5.25V INote 41 22 34 mA
All typical values are at Vee = 5V. T a = 25°C.
Note 3: Supply current Icc should be measured with RD, DS and M/C at 4.5V and Do-D3. OC andT at av.
Note 4: locz is measured with RD. OS. M/C and DC at 4.5V. and 00-03 at OV after T has been set from 3V to av.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS395AP
SWITCHING CHARACTERISTICS (licc=5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
Imax Maximum dock frequency 30 40 MHz
tpHL time, from input f to outputs Qo - Q3, 03' CL=15pF (NoteS) 16 30 ns
tpHL 20 35 ns
from input RO to output Qo - Q3. Q3'
tPZH Output enable time to high-level RL=2kQ, CL=15pF (NoteS) 13 25 ns

tPZL Output enable time to low-level RL=2kQ, CL= 15pF (NoteS) 15 25 ns
tpHZ Output disable time from high-level RL=2kQ, CL=5pF (NoteS) 11 17 ns
tPLZ Output disable time from low-level RL=2kQ, CL=5pF (NoteS) 10 20 ns
INPUT Vee
Symbol SW1 SW2 (1) The pulse generator (PG) has the following
PRR = lMHz, tr = 6ns, tf = 6ns, tw = 500n5,
tPZL Closed Open
Vp = 3Vp.p, Zo = son.
tPLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4ns)
Closed Closed (3) CL includes probe and jig capacitance
tPHZ
TIMING REQUIREMENTS (Vcc=5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tw(T) Clock inputT high pulse width 25 10 ns
tsu(O) Setup time D to T 20 9 ns
tSU(M/C) Setup time M IC to T 40 16 ns
th(O) Hold time 0 to T 10 -1 ns
th(M/C) M IC hold time to T 10 -12 ns
M/C ~ tlJ/I///{ ~
'W'"":t"'.'" 'W,"'" '"'"'"
T I- \>1 / I \,-'_1__
Note 6: The shaded areas indicate when the input is permitted,to change
• MITSUBISHI
2-376 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS423P

containing two retriggerable monostable multivibrator cir-
cuits with direct reset inputs.
Vee
TRIGGER {
FEATURES INPUTS
• Long pulse widths can be generated using the retrig-

1 RE ICE I TIMING
gerable function
DIRECT
RESET lCE I PINS
INPUT
• Output pulses can be stopped at any time with direct

OUTPUTS { } OUTPUTS
reset inputs
• A, B complementary inputs provided DIRECT
RESET
• Direct reset pulses with no one-shot operation. TIMING J
• High input breakdown voltage (VI ~ 15V)
PINS I 2 RE ICE +- 2B
INPUT
} TRIGGER
• Q and Q outputs INPUTS
GND
• Wide operating temperature range (Ta =-20-+75°C)
APPLICATION
Outline 16P4
equipment.
FUNCTIONAL DESCRIPTION output pulse width can be extended. (Fig. 2(b))

Positive pulses appear in output Q and negative pulses in Q can be reset immediately low and Q high by setting
output Q by connecting external resistor RT and capacitor direct reset input Ro low irrespective of the status of the
CT to timing pins R E ICE and C E , as shown in Fig. 1 on the outputs_ The output pulse width can therefore be made as
next page, and by applying a trigger from input A or B. short as preferred by the Ro signal. (Fig_ 2(c))
(Fig. 2(a)) The width tw of the pulses appearing in the The above functions are the same as for the M74LS123P.
outputs is set by RT and CT. When A changes from high to However, when Ro changes from low to high with A at low
low or when B changes from low to high, the trigger is and B at high for the M74LS123P, the trigger is applied and
applied. one-shot operation takes place, whereas with the
The retriggerable function is used to obtain long output M74LS423P one-shot operation does not take place for the
pulse widths and when the trigger is applied from A or B same change in Ro.
immediately before the output pulse is completed, the
BLOCK DIAGRAM (EACH MONOSTABLE MUL TIVIBRATOR)
.
TIMING PINS
TRIGGER { Ii.
INPUTS
B
Q} DUT-
PUTS
Q -
DIRECT
RESET RD
INPUT
• MITSUBISHI
.... ELECTRIC - 2-377
MITSUBISHI LSTTLs
M74LS423P
DUALRET'RIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET
TIMING TERMINAL EQUIVALENT CIRCUIT Refer to K·C T characteristics indicated in TYPICAL

DIAGRAM CHARACTERISTICS for value of K. (No change is
Veo brought to K by value of RT.)
Depending on the product, fluctuations in the order of
3/-10o/dllay occur.
14.4k 3.3k
2-2. When CT is equal to or less than 1000pF
Refer to the output pulse width versus-C T , RT given
in the typical characteristics.
3. Output pulse width control
The output pulse width can be controlled in 3 ways by
using, or not using, the trigger signal and RD signal.
3-1. Normal use
This is the normal method of use as a regular
monostable multivibrator such as that shown in Fig.
2(a) and the output pulse width tw can be set as for
FUNCTION TABLE (NOlell the formula and figure in section 2 above.
Ro A B Q Q 3-2. Extension of output pulse width with retrigger func-
L X X L H tion
X H X L H As shown in Fig. 2(b), the output pulse width can be
X X L L H extended as desired by applying a trigger pulse before
H L i .JL lS the output pulse is completed.
H ! H IL U- 3-3. Shortening of the output pulse width with RD signal
Note 1. i : Transition from low to high. (positive edge triggering) As shown in Fig. 2(c), the output pulse which has been
n _--- --__ _ - - - -
l : Transition from high to low. (negative edge triggering)
generated by the trigger signal can be term inated with
Positive one-shot operation ..
...fl.. :
LS: Negative one-sho.t operation. the R D signal and it is possible to shorten its width as
X : Irrelevant
re:uire
OPERATION DESCRIPTION
As shown in Fig. 1, external resistor RT and capacitor CT
are connected to timing pins RE/C E and CEo Connect the Q
Jt--<------'t~w----<>1',-1_ _
positive to the RE/C E side and the negative to the CE side (a) Normal use
when using CT with polarity. In this case, it is not necessary
to connect a switching diode required with the same type B JLj~etrjgge~ pulse ,
'-------
of TTL IC. With malfunctions caused by noise, connect CE
to the GND line (neighboring on pin 8) as shown by the I.
dotted line in Fig. 1. Vo
.----~!:f'
Q
tw
(b) Extension of output pulse width with retrigger
"to B
Jl'----_ _
u
GND line To pin CE To pin RE/CE
Fig. 1 Connection of external resistor RT and capacitor CT

to timing pins RE/CE and CE
2. Output pulse width tw ------,
I
The output pulse width tw is set by RT and CT I
.......J
2·1. When CT is greater than 1000pF Decrease with
AD pulse
tW=K·RT·C T (ns)X(1+0.1)
tw
Depending on the product, fluctuations of about ±10%
(0) Shortening of output pulse width with Ro signal
may arise. Fig. 2 Output pulse width control
• MITSUBISHI
2-378 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS423P
4. Precautions with use 4·3. Connect an external capacitor of O.01-o.1J,LF with

4·1. Apply the retrigger pulse after a wait of O.22C T (ns) good high·frequency characteristics between pins Vee
upon application of the trigger pulse. CT is measured in and GND.
picofarads. The retrigger pulse during this period is 4·4. The output pulse is generated when the power is
ineffective. switched on.
4·2. In order to minimize the floating capacitance and to
safeguard against malfunction caused by noise, make
the RT and CT wiring as short as possible (less than
3cm) and avoid signal wires which may be conducive
to noise.
ABSOLUTE MAXIMUM RATINGS (Ta= -20- +75'C. unless otherwise noted)

Va Output voltage High-level stage -0.5- Vee V
Limits
Min Typ Max

10H High-level output current VOH""2.7V 0 -400 f.lA
VOL";0.4V 0 4 mA
VOL";0.5V 0 8 rnA
CT External timing capacitance None
CR RE/OE pin wiring capacitance 50 pF
ELECTRICAL CHARACTERISTICS (Ta=-20-+75t:. unless otherwise noted)
Limits
Min Typ * Max

Vee=4. 75V. VI=0.8V
VI=2V. 10H= -400f.lA

Vee=4.75V I 10L= 4 rnA 0.25 0.4 V
VI=O .8V. VI=2V I IOL-8rnA 0.35 0.5 V
Vee=5.25V, VI=2.7V 20 f.lA
IlL Low-level input current Vee=5.25V, VI=0.4V -0.4 rnA
los Short-circuit output current (Note 2) Vee=5.25V, VO=OV -20 -100 rnA
Icc Supply current Vee=5.25V INote 3) 12 20 rnA
* : All typical values are at Vcc=5V, Ta=25 C. Q
Note 3: Icc is measured with RE ICE and CE open, 4.5V applied to AD, A and B and A set from OV momentarily to 4.5V.
• MITSUBISHI
.... ELECTRIC 2-379
MITSUBISHI LSTTLs
M74LS423P
SWITCHING CHARACTERISTICS (Vcc= 5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel output propagation time. from input A to output Q 33 ns
tPLH Low-to-high-Ievel output propagation time, from input B to output Q 44 ns
tpHL High-to-Iow-Ievel output propagation time, from input A to output Q OT= 0 pF 45 ns
tpHL High-to-Iow-Ievel output propagation time, from input B to output Q RT= 5 kQ 56 ns
tpHL High-to-Iow-Ievel output propagation time, from input RD to output Q OL=15pF (Note41 27 ns
tpLH Low-to-high·level output propagation time, from input Ro to output Q 45 ns
tWQ (min) Minimum output pulse width, from inputs A. 8 to output Q 200 ns
OT= 1000pF. RT= 10kQ
tWQ Output pulse width, from inputs Ii.. 8to output Q 4 5 !-,S
OL=15pF (Note41
Note 4: Measurement circuit INPUT Vee OUTPUT

PAR = 1MHz (100kHz with twa measurement), t r=6ns, w=6ns, tw ~40ns. Vp=3Vp.p, Zo=50n.
TIMING REQUIREMENTS (Vee= 5 V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
tW(A) Trigger input A pulse width 40 ns
tW(B) Trigger input B pulse width 40 ns
tW(Ro) Direct r~set 'input pulse width Ro 40 ns
TIMING DIAGRAM (Reference level = 1,3V)
Q Q
tWQ' twQ(min) tWQ' tWQ(min)
• MITSUBISHI
2-380 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS423P
DUALRETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET
OUTPUT PULSE WIDTH VS CT. RT K VSCT
(CT;2;1000pF) (CT> 1000 pF)
lOOOOO 1.0
RT 26 kQ
f-
::> 0.9 II!III IIIII
T= 160 kQI,
D..
f-
::> 0.8 f-
U~~I=J Jill
:; 1000 0
K- o Ta = 25"C
.5 0.7 r-
I
'z" tw=KCTRTCt w : OUTPUT PULSE
f- 2: 0.6 WIDTH)
Cl
~
,..... V' ~
100 0 o 0.5
UJ
a::
'"
...J R 80 kQ o
u. 0.4
i2 RT 40kQ 0:
f- 0.3
::>
0- 10 0
RT-20kQ
~
RT 10kQ U
f-
::> «
u.
0.2
0 !=Vex) SV RT S k~.:j:
"" 0.1
10
I-T a ii S,rc imTlll Tn o
1 10 100 1000 10000 103 10 4 lOS 10· 10 7
EXTERNAL CAPACITANCE CT CpF) EXTERNAL CAPACITANCE CT ipF)
Note 5: The error of the output pulse width in the above graph is within ±20%.

SUPPL V VOLTAGE AMBIENT TEMPERATURE
S 5
Ta =2S"C Vex)I=~VI_
4 - 4
RT = 10kQ z RT =10kQ
o
3 I'\, CT= 1000pF-
~
3 CT =1000pF-
1
" 't-...,
a:
;;
I
f-
2
1
- r- r-
-
o
1
..........
I'-.... ~
UJ -
0
1
r- r-
UJ
'"::>
...J
- 2
~
I---.. ~
::> - 2
r-
D.. t--... D..
f-
::> -3 ~ -3
D..
0-
f-
o
~ -4 6 -4
- 5 25
4.5 5.5 6.5 25 50 75 100
SUPPLY VOLTAGE Vex) CV) AMBIENT TEMPERATURE Ta C"C)
• MITSUBISHI
"ELECTRIC 2-381
MITSUBISHI LSTTLs
M74LS490P
DUAL 4·BIT DECADE COUNTER
DESCRIPTION
containing a dual circuit asynchronous decade counter with
direct reset input and direct 9-set input.
~~~3~ 11' --+ 1 vee
FEATURES DIRECT ~~~G+ 1Ro--+
CLOCK
INPUT
• Two integral circuits (the functional equivalent of LS90
OUTPUT 1QA<- 3 DIRECT
and LS290) provide high mounting density capability RESET INPUT
• I ndividual clock, direct clear, and set-to-9 inputs for DI~_~~+ lSO(9)--+ 4 OUTPUT
each decade counter INPUT
• High-speed counting (f max = 35MHz typical) <-2SO(9) ~Is~~n
INPUT
• Wide operating temperature range (Ta = -20 - +75°C) OUTPUTS
APPLICATION --+2Qo OUTPUTS

equipment

This device functions to produce binary-coded decimal
output at 0Ai Os, 0c, and 0D in response to count pulse
input at clock input f _ Counting occurs when f transits
from high to low-level. A high-level status at direct reset
input RD or direct 9-set input So (9) initiates reset or a
setting to 9 respectively_ When operated as a counter, Ro
and SO(9)are set low-level.
BLOCK DIAGRAM (Applicable to each circuits)

~ __ ~ ______________
OUTPUTS
~A_______________________
T SO(9) Ro
DIRECT DIRECT
CLOCK 9-SET RESET
INPUT INPUT INPUT
• MITSUBISHI
2-382 "ELECTRIC
MITSUBISHI LSTTLs
M74LS490P
FUNCTION TABLE INote 1) Count OA Os Oe 00

T Ro SO(9) OA Os Oe 00 0 L L L L
X H L L L L L 1 H L L L
X L H H L L H 2. L H L L
~ L L Count 3 H H L L
4 L L H L
Note 1. ~ : Transition from high to low 5 H L H L
(negative edge trigger)
X : Irrelevant 6 L H H L
7 H H H L
8 L L L H
9 H L L H

INPUT T -0.5-+5.5 V
VI Input voltage
INPUT RD. SDI91 -0.5-+15 V
TSlg Storage temperature range -65-+150 'C
RECOMMENDED OPERATING CONDITIONS (Ta = -20- +75'C, unless otherwise noted)
Limits
Min Typ Max
Vee Supply'voltage 4.75 5 5.25 V

10H High-level output current VOH~2.7V 0 -400 p.A
VOL:;:;O.4V a 4 mA
VOL"'0.5V 0 8 mA
Limits
Min Typ * Max

VIC Input clamp voltage Vee=4.75V, Ile=~18mA -1.5 V
Vee=4. 75V, VI=O .8V
VI=2V,IOH=-400p.A

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI=O,8V, VI=2V I IOL=8mA 0'.35 0.5 V
RO, SO(9) 20
Vee=5.25V, VI=2.7V Il A
T 100
RO, SO(9) Vee=5.25V, VI=10V 0.1
rnA
T Vee=5.25V, VI=5.5V 0.2
Ro, So (9) -0.4
IlL Low-level input current Vee=5.25V, VI=0.4V mA
T -1.6
los Short-circuit output current (N~te 2) Vee=5 .25V, VO=OV -20 -100 mA
ICC Supply current Vee=5.25V INote 3) 15 26 rnA
* : All typical valuesareatVcc::::5V,Ta= 25°C.

3. Icc is measured with all outputs open, both RD and SD(9) inputs grounded following momentary connection to 4.5V: all other inputs grounded.
.• MITSUBISHI
;"ELECTRIC 2-383
MITSUBISHI LSTTLs
M74LS490P
SWITCHING CHARACTERISTICS (Vee=5V. Ta= 25'C, unlessotherwisenoted)
Limits
Min Typ Max
f max Maximum clock frequency (from input Tto output CA) 25 35 MHz
t pHL time, from input T to output QA 8 20 ns
tpHL time, from input T to outputs as. OD 22 39 ns
tpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation CL=15pF INote41 30 54 ns
tpHL time, from input T to output Oc 30 54 ns
High-to-Iow-Ievel output propagatio!l time, from input
tpHL 11 39 ns
RD to outputs QA. OBI 0C. 00
Low-to-high-Ievel output propagation time, from input

tpLH 11 39 ns
50191 to outputs DA, Do
High-!o-Iow-Ievel output propagation time, from input

tpHL , 12 36 ns
50191 to outputs Ds, Dc
Note 4. Measurement Circuit INPUT Vee OUTPUT
~"
11 J The pulse generator (PG) has the following characteristics:
PRR' 1MHz, tr' 6ns. tf' 6ns, tw' SOOns, Vp , 3Vp_p, Zo ' 50n.
12J CL includes probe and jig capacitance.
TIMING REQUIREMENTS eV ee=5V. Ta=25·C. unless otherwise noted)
Limits
Min Typ Max
tW(T) Clock input T pulse width 20 5 ns

t W(501 Direct 9-5et SD(9) pulse width 20 4 ns
tree (Ro) AD recovery time to T 25 8 ns
tree (So) SD(9) recovery time to T 25 8 ns

tw cT)
50(9)
QA.Q8,QC.QO
Q8,Qe
tW(RO)
Ro 50(91
T
T
QA.QO
QA, QB. Qe. Qo
• MITSUBISHI
2-384 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSS40P
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT (INVERTED)
DESCRIPTION
OUTPUT _
containing 1 block of buffer with 3-state inverted output CONTROL OCI'" I Vee
INPUT
and common output control input for all 8 discrete circuits_ _ OUTPUT
19 ~ OC 2 CONTROL
INPUT
FEATURES
• Small input load factor (pnp input)
• Hysteresis provided (= 400mV typical)
• High breakdown input voltage (VI £5V)
INPUTS
• Dutput control inputs provided (DC l , DC 2 )
OUTPUTS
• High fan-out, 3-state output
(lOL = 24m A, IOH = -15mA)
• Data flow-thru pin out
• Wide operating temperature range. (T a = -20- + 75°C)
APPLICATION GND

FUNCTIONAL DESCRIPTION FUNCTION TABLE (Note 11

The use of pnp transistors in the input circuits has enabled
A CCI OC2 Y
the achievement of small input load factor and input high L L L H
break-down voltage. With hysteresis characteristics, the H L L L
buffer has a 3-state inverted output with high noise margin. X L H Z
X H L Z
When output control inputs DC l and DC 2 are low, a high-
X H H Z
level signal appears at output Y if input A is low and a low-
Note 1: Z : high·impedance
level signal appears if it is high.
X : irrelevant
All outputs are set to the high-impedance state regard-
less of the status of A when DC l and DC 2 are in any other
state.
The input and output pins are arranged for facilitated board layout (data flow-thru pin out).
OUTPUTS
r-----------------------A~--------------------~
Ys Vee
OC2 OC, A4 As A6 As GND

'---v------" ----------------------~vr.--------------------~
OUTPUT CONTROL INPUTS INPUTS
• MITSUBISHI
"ELECTRIC 2-385
MITSUBISHI LSTTLs
M74LSS40P
OCTAL BUFFER/LINE DRIVERS WITH 3·STATE OUTPUTS(lNVERTED)
Vee Supply voltage -0.5-+ 7 V
Vo Output voltage Off-state -0.5-+ 5.5 V
Topr Operating free-air ambient temperature range I

-20- +75 'C
Limits
Min Typ Max

VOH;'2.4V 0 -3 mA
VOH;' 2 V 0 -15 mA
VOL";0.4V 0 12 mA
VOL";0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C. unless otherwise noted)
Limits
Min Typ* Max
VT,-VT, Hysteresis Vee=4.75V 0 2 0.4 , V
VIC Input clamp voltage Vee=4. 75V, 110= -18mA -1.5 V
High-level output voltage

VOO=4.75V I VI =0.8V, IOH=-3mA 2.4 3,.4 V
VOH
VI=2V I VI =0.5V, IOH=-15mA 2 V

Vee=4.75V I IOL=12mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Vee=5.25V, VI=2V, Vo=2.7V 20 I,A
10ZL Off-state low-level output current Vee=5.25V, VI=2V, VO=0.4V -20 I,A
Voe=5c25V. VI=2.7V 20 I,A
Voe=5.25V, VI= 10V 0.1 rnA
ilL Low·level input current Vee=5.25V, VI=0.4V -0.2 mA
los Short·circuit output current (Note 2) Vee=5.25V. Vo=OV -40 -225 mA
lOCH Supply current, all outputs high Vee=5.25V, V, =OV 13 25 mA
IceL Supply current, all outputs low Voe=5.25V, VI =OV, VI =4.5V 24 45 mA
leez Supply cu_rrent. all outputs off Vee=5.25V, VI=4.5V 30 52 mA
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25·C. unlessotherwisenoted)
Limits
Symbol Para~eter Test conditions Unit
Min Typ Max
tpLH Low·to-high-revel. high-to-Iow-Ievel output propagation CL=45pF 15 ns
tpHL time, from input A to output Y INote3) 15 ns
tpZL Output enable time to low-level RL=667Q, CL =45pF INote 3) 38 ns
tPZH Output enable time to high-level RL=667Q, CL=45pF INote3) 25 ns
tpLZ Output disable time from low71evel RL=667Q, CL = 5 pF INote3) 25 ns
tpHZ Output disable time from high-level RL=667Q CL= 5 pF INote 31 18 ns
• MITSUBISHI
2-386 "ELECTRIC
MITSUBISHI LSTTLs
M74LS540P
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT (INVERTED)
INPUT Vee

Parameter SWl SW2
PRR = 1MHz, tr == 6ns, tf = 6ns, tw =: 500n5,
t PZH Open Closed Vp = 3Vp.p. Zo = 50n
DUT (2) All diodes are switching diodes (trr ~ 4n5)
PG t PZL Closed Open
t PLZ Closed Closed
50Q
t PHZ Closed Closed
y
1'-____-+.-_,-j--I:°. 5V
• MITSUBISHI
~ELECTRIC 2-387
MITSUBISHI LSTTLs
M74LS541P
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT (NONINVERTED)

OUTPUT
containing 1 buffer block with 3-state non-inverted out- . CONTROL 00, -+ I Vee
INPUT
puts and is provided with output control inputs which are OUTPUT
19 ..... 002 CONTROL
common to 8 circuits and which are independent. INPUT
FEATURES
• Small input load factor (pnp input)
• Hysteresis provided (=400mV typical) INPUTS
• High breakdown input voltage (V I ~ 15V)
OUTPUTS
• Output control inputs provided (OC l , CO 2 )
• High fan-out 3-state outputs
(JOL = 24mA, IOH = -15mA)
• Data flow-thru pin out

• Wide operating temperature range (T a=-2D-+75°C)
GND
APPLICATION
Outline 20P4
equipment.
FUNCTION TABLE INote 11 .
FUNCTIONAL DESCRIPTION A 00, 002 Y
Since pnp transistors are used forthe input circuits, the L L L L
input load factor is small and a input high breakdown H L L H
X L H Z
voltage is provided. The 3-state non-inverted output buffers
X H L Z
have a high noise margin due to hysteresis.
X H H Z
When OC, or OC 2 is low, low appears in output Y if
Note 1 Z : High-impedance
input A is low, and high appears in Y if A is high. X : irrelevant
All outputs are set to the high-impedance state when
OC I and OC2 are in any other state.
The input and output pins are arranged for facilitated
board layout (data flow-thru pin out).
BLOCK DIAGRAM
OUTPUTS
r_--~------------------A~--------------------~
Ys Ys Ys Vee
002 oc; As GND

~ ~---------------------,vr--------------------~
OUTPUT CONTROL INPUTS INPUTS
. • MITSUBISHI
2-388 .... ELECTRIC
MITSUBISHI LSTTLs
M74LSS41P

V, Input voltage .-0.5- +15 V
Limits
Min Typ Max
VOH:;;'2.4V 0 -3 mA
VOH:;;' 2 V 0 -15 mA
VOL::>0.4V 0 12 mA
VOL::>0.5V 0 24 mA
Limits
Min Typ * Max
VT+-VT- Hysteresis width Vee- 4 ..75V 0.2 0.4 V
V'c Input clamp voltage Vee=4.75V.IIC=-18mA -1.5 V
Voo=4.75V I V,-0.8V. IOH--3mA 2.4 3.4 V
High·level output voltage
VOH
V,=2V I V, =0.5V, IOH=-15mA 2 V

Voo=4.75V I IOL=12mA 0.25 0.4 V
V,=0.8V, VI=2V I IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Voo=5.25V. V,=2V, VO=2.7V 20 f../ A
10ZL Oft-state low-level output current Voe-5.25V, V,-2V, VO-0.4V -20 f../ A
VOO=5.25V, V,=2.7V· 20 f../ A
!,H High-level input current
Voo=5.25V, V,=IOV 0.1 mA
I,L Low-level input current VOO=5.25V, VI=0.4V -0.2 mA
los Short·circuit output current (Note 2) VOO=5.25V, VO=OV -40 -225 mA
IOOH Supply current, all outputs high Voo=5.25V, V,=OV, V,=4.5V 18 32 mA
IOOL Supply current, all outputs low, Voo=5.25V, V, =OV, V, =4.5V 30 52 mA
looz Supply current, aU outputs disabled Veo=5.25V, V,-OV, VI-4.5V 32 55 mA
* : All typical values are at Vee = 5V, Ta = 25°C .

.' Note 2; All measurements should be done Quickly, and not more than one output should be shorted at a time.
SWITCHING CHARACTERISTICS (Voe=5V, Ta=25·C. unlessotherwisenoted)
Limits
Min Typ Mex
tpLH Low·to·high·level, high-to-Iow-Ievel output propagation CL=45pF 15 ns
tpHL time, from input A to output Y INote 3) 18 ns
tPZL Output enable time to low-level RL=667Q, CL ~45pF INote 3) 38 ns
tPZH Output enable time to high·level RL=667Q. CL=45pF INote3) 32 ns
tpLZ Output disable time from low-level RL=667Q, CL~ 5pF INote 3) 29 ns
tpHZ Output disable time from high-level RL=667Q CL ~ 5 pF (Note 3) 18 ns
• MITSUBISHI
;"ELECTRIC 2-389
MITSUBISHI LSTTLs
M74LSS41P
INPUT Vee
Symbol SWl SWZ

PG OUT Closed Open PRR = 1MHz, tr = 6ns, tf = 6ns. tw = 500n5,
t PZL
Vp 0 3Vp.p, Zo 0 5012.
t PLZ Closed Closed (2) All diodes are switching diodes (trr'~ 4ns)
SOQ
t PHZ Closed Closed
i b! ~-
=t u:
A DC
lJ-
y
tpHZ
'tpZH
fc-'
~
DC
lJ tPLZ
• MITSUBISHI
2-390 "ELECTRIC
MITSUBISHI LSTTLS
M74LS595P
8-BIT SHIFT REGISTER/LATCH WITH 3-STATE OUTPUT
DESCRIPTION
taining an 8-bit serial input/parallel output shift register
function with a 3-state output latch.
Vee
FEATURES OUTPUT
• 8-bit serial in, parallel out shift register with latch
SERIAL DATA INPUT
• Shift register has direct reset (RSFT) OUT
OUTPUT CONTROL
• Independent clock input pins (TsFT , TLAT) PUTS
INPUT
• 3-state, high fan-out outputs (00 - 0 7 ) (lOL = 24 mA, 12 +- TLAT LATCH CLOCK INPUT
IOH = -2.6mA)
11 +- TSFT SHIFT CLOCK INPUT
• Cascade output pin provided (0 7 ')
• Wide operating temperature range (Ta = -20 - +75°C) 10 +- RSFT ~~~E~ ~~~~~TER
GND CASCADE OUTPUT
APPLICATIONS
ment.
Outline 16P4
The shift register bits are each composed of two flip-flops. When the pulse is applied to T LAT, the contents of the
Separate clocks are used for shifting and latching. shift register are stored in the latch register and appear at
The shift clock input TSFT and latch clock input T LAT Go-07. 0 0 - 0 7 are 3-state outputs with buffers. Cascade
are independent, and the shift or latch operation is per- output 0 7 ' at which the output ofthe eighth shift register
formed when the respective pin changes from low to high, appears is used for expanding the number of bits.
Serial data input Ds is the data input of the first stage When TSFT and T LAT are connected for use, the shift
shift register and when it is high and a pulse is applied to register state with a 1 clock delay is output to Go-07.
TsFT , the high signal enters the shift register in sequence.
When Ds is low and a pulse is applied to TSFT, the low
signal enters the shift register in sequence.
BLOCK DIAGRAM
OUTPUTS
Qo Qs Q6 Q7 Vee
OUTPUT
T~~\ROL OC 13r-~--,-t----.--t----.--r---~-1----~-1-----r-+-----.-+----,
SERIAL
DATA OS
II,PUT
RSFT TSFT TLAT GND

SHIFT SHIFT LATCH
REGISTER CLOCK CLOCK
RESET INPUT INPUT
INPUT
• MITSUBISHI
MITSUBISHI LSTTLs
M74LSS9SP
a-BIT SHIFT REGISTER/LATCH WITH 3-STATE OUTPUT
When shift register reset input RSFT is set low, the shift When a high signal is applied to output control input ac,
register and Q7' are reset. In order to reset QO~Q7' the Qo~a, are put in a high-impedance state but Q,' does not
state of T LAT must be changed from low to high after the change. ac status changes have no effect on the shift opera-
shift register has been reset by RsFT • tion.
Input 3-5tat8 output Cascade

Operating mode
RSFT TSFT TLAT Ds 00 00 0, 02 03 O. 05 06 0, output Q'7
Shift t, L X X X L 00° 01° 02° 03° 0.° 05° 06° 0,0 L

Reset
Latch t2 X X t X L L L L L L L L L L
Shift t, H t X H L 000 010 02 0 03 0 0. 0 05 0 06 0 0,0 q 60
Shift/latch Latch t2 H X t X L H qOO q to q2 0 q30 q.O q5 0 Q6 0 Q6 0

operation Shift t, H t X L L 000 010 02 0 03 0 0. 0 050 060 0,0 Q6 0
Latch t2 H X t X L L QOO Q, 0 Q2 0 Q3 0 q.O q5 0 q6 0 Q6 0
3-5tate X X X X H Z Z Z Z Z Z Z Z Q,
Note 1 . t : transition from low to high level (positive edged trigger)

QO: level of Q before the indicated steady-state input conditions were established
X : Irrelevant
qO: contents of shift register before T SFT is applied
q : shift register contents
t 1. t 2: t2 is set after t1 has been set
Z : high-impedance state
ABSOLUTE MAXIMUM RATINGS (Ta~-20- +WC. unless otherwise noted)
Symbol Parameter Test conditions Limits Unit

00-0, High-level state -0.5-+5.5 V
Vo Output voltage I
I Oi Off-state -0.5- Vee V
Topr Operating free-air ambient temperature range -20-+75 ·0
Tstg Storage temperature range -65- +150 ·0
RECOMMENDED OPERATING CONDITIONS (Ta= - 20- +75·C. unless otherwise noted)
Limits
Min Typ Max
High-level output On-07 VOH<;;2.4V 0 -2.6 rnA

IOH current oi VOH<;;2.7V 0 -400 "A
VOL";0.4V 0 12 rnA
00-0,
LOW-level output VOL";0.5V 0 24 rnA
IOL current
VOL";0.4V 0 4 rnA
07·
VOL";0.5V. 0 8 rnA
•.. MITSUBISHI
2-392 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS595P
a-BIT SHIFT REGISTER/LATCH WITH 3-STATE OUTPUT
ELECTRICAL CHARACTERISTICS (Ta=-20-+75·C. unless otherwise noted)
Limits
Min Typ * Max
V'O I nput clamp voltage Voo=4.75V.I,o=-18mA -1.5 V

QO-Q7 Voo=4.75V IOH=-2.6mA 2.4 3.1 V
Q7' V,=0.8V. V,=2V 10H= -4OOtLA 2.7 3.4 V
IOL=12mA 0.25 0.4 V
QO-Q7 VOO=4.75V
IOL=24mA 0.35 0.5 V
VOL Low-level output voltage V,=0.8V
IOL=4mA 0.25 0.4 V
Q7' V,=2V
IOL=8mA 0.35 0.5 V
10ZH Off-state high-level output current QO-Q7 VOO=5.25V, V,=0.8V, V,=2V, Vo=2.7V 20 tL A
10ZL Off-state low-level output current QO-Q7 VOO=5.25V, V,=O.8V, V,=2V, VO=0.4V -20 tL A
V,=2.7V 20 tL A
I'H High-level input current VOO=5.25V
V,=lOV 0.1 mA
Ds -0.4 mA
I'L Low-level input current Voo=5.25V, V,=O.4V
Input except Ds -0.2 mA
QO-Q7 -30 -130 mA
loS Short-circuit output current (Note 2) Voo=5.25V, VO=OV
Q7' ...,20 -100 mA
IOOH H igh·level supply current VoO=5.25V, V,=OV. V,=4.5V 29 50 mA
IOOL Low-level supply current VOO=5.25V, V,=OV, V,=4.5V 39 65 mA
looz Off-state supply current Voo=5.25V, V,=OV, V,=4.5V 41 65 mA
* : All typical values are at Vee"" 5V, Ta 25°C.

=
SWITCHING CHARACTERISTICS (Voo=5V. Ta=25'C. unless otherwise noted)
Limits
Min Typ Max
f max Maximum repeat frequency 20 25 MHz
t PLH Low-to-high, high-ta-low output propagation time, from 11 16

ns
t PHL input T SFT to output 0'7 16 25
CL= 15pF INote 3)
High-ta-Iow output propagation time from input RSFT
t PHL 19 35 ns
to output Q'7
--
t PLH Low-ta-high, high-ta-Iow output propagation time, from 12 18
CL=45pF INote 3) ns
t PHL input T L AT to outputs 00 -- 07 22 35
. tPZH Output enable time to high level 16 30 ns
RL=667Q, CL=45pF INote 3)
tPZL Output enable time to low level 20 38 ns
tpHZ Output disable time to high level 22 30 ns

RL=667 Q, CL=5pF INote 3)
t PLZ Output disable time to low level 17 38 ns
INPUT Vee

Parameter SWl SW2 characteristics: PRR = lMHz, tr = 8ns, tf = 6ns,
t PZH Open Closed tw ::: 500n5, Vp= 3Vp_p . Zo = 50 ohms.
(2) All diodes are switching diodes (t rr S 4ns).
PG DUT tPZL Closed Open
t PLZ Closed Closed
SOQ
tpHZ Closed Closed
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS595P
8-BIT SHIFT REGISTER/LATCH WITH 3-STATE OUTPUT
TIMING REQUIREMENTS (Voo=5V, Ta=25·C. unlessotherwisenoted)
limits
Min Typ Max
IW(TSFT) Shift clock input pulse width 25 22 ns
IW(TLArl Latch clock input pulse width 20 12 ns
IW(R SFT ) Shift register reset pulse width 20 10 ns
Isu (Ds) Setup time Ds to TSFT 20 12 ns
Ih (Ds) Hold time Os to TSFT 2 -1 ns
treC(RSFT) Recovery time ASFT to TSFT 20 12 ns
Isu (TsFT) Setup time T SFT to T u~, T 40 12 ns
TIMING DIAGRAMS (Reference level = 1.3V)
Ds
TSFT
• MITSUBISHI
2-394 .... ELECTRIC
MITSUBISHI LSTTLs
M74.LSS96P
a·BIT SHIFT REGISTER/LAT~H WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
containing an 8-bit serial input/parallel output shift register
function with an open collector output latch.
Vee
FEATURES OUTPUT
• a-bit serial in parallel out shift register with latch.
SERIAL OATA INPUT
• Shift register has direct reset (RsFT) OUT- OUTPUT ENABLE
• Independent clock input pins (TSFT' T LAT) PUTS INPUT
• Open-collector, high fan-out outputs (00-0,) (In=
12 +- TLAT LATCH CLOCK INPUT
24mA)
• Cascade output pin provided (a',) 11 +- TSFT SHIFT CLOCK INPUT
• Wide operating temperature range (Ta =-20- +75° C) 10 +- RSFT ~~~~ ~~~~~TER
GND CASCADE OUTPUT
APPLICATIONS
equipment.
* : OPEN COLLECTOR
OUTPUTS
Outline 16P4
The shift register bits are each composed of two flip-flops When a pulse is applied to T LAT, the contents of the
Separate clocks are used for shifting and latching. shift register are stored in the latch register and appear at
The shift clock input TSFT and latch clock input T LAT ·00-0,. 00-0, are open collector outputs with buffers.
are independent, and the shift or latch operation is Cascade output a,' at which the output of the eighth
performed when the respective pin changes from low to shift register appears is used for expanding the number of
high. bits.
Serial data input Ds is the data input of the first stage When TSFT and T LAT are connected for use, the shift
shift register and when it,is high and the pulse is applied to register state with a 1 clock delay is output to 0 0 -0,.
TSFT, the high signal enters the shift register in sequence. When shift register reset input RSFT is set low, the shift
When Ds is low and a pulse is applied to TSFT, the low
signal enters a shift register in sequence.
BLOCK DIAGRAM
OUTPUTS
Qo Qz Q3 Qs Q6 Q7 Vee
OUTPUT _
ENABLE Eo
INPUT
SERIAL
DATA Ds
INPUT
9 Q . CASCADE
7 OUTPUT
TSFT TLAT GND

SHIFT REGISTER SHIFT LATCH
RESET INPUT CLOCK INPUT CLOCK INPUT
* : OUTPUTS
OPEN COLLECTOR
• . MITSUBISHI
.... ELECTRIC 2-395
MITSUBISHI LSTTLs
M74LSS96P
a-BIT SHIFT REGISTIER/LATCH WITH OPEN COLLECTOR OUTPUT
register and 0'7 are reset. In order to reset 0 0 -07• the When a high sign'al is applied to output enable input Eo.
state of T LAT must be changed from low to high after the 00-0 7 are set high but 0 7 ' does not change. Eo status
shift register has been reset by RsFT . changes have no effect on the shift operation.
Input Open collector output Cascade

Operating mode output Q'7
RSFT TSFT TLAT Ds Eo Qo Qt Q2 Q3 Q4 Qs Qs Q7
Shifttt L X X X L Qoo Qt O Q2 0 Q30 Q40 Qso Qso Q70 L

Reset
Latch t2 'X X t X L L L L L L L L L L
Shift t, H t X H L Qoo Qt O Q20 Q3 0 Q4 0 Qso Qso Q7 0 qso

)
Shift/latch Latch t2 H X t X L H qoO q ,0 q20 q30 q40 qsO qsO qso
operation Qt O Q2 0 Q30 Q40 Qso Qso Q7 0 QSO
Shift t, H t X L L Qoo
Latch 12 H X t X L L qOO qt O q2 0 Q30 Q40 Qso Q6 0 QOs
Output disable X X X X H H H H H H H H H Q7
Note. t : transition from low to high level (positive edged trigger)

QO: level of Q before the indicated steady-state j'nput conditions were established
X : irrelevant
qo: contents of shift register before TSFT is applied
q : shift register contents
t 1. t 2: 12 is set after 11 has been set
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C. unlessother";isenoted)
Vee Supply voltage -0.5:-+7 V

Vo Output voltage
I QO-Q7
High·level state
-0.5-+7 V
I Qi -0.5-Vee V
Topr Operating free-air ambient. temperature range -20-+75 ·C
Tstg . . Storage temperature range -65-+150 ·C
Limits
Min Typ Max
High-level output QO-Q7 VO=5.5V 0 100 /lA

IOH
current Q7' VOH~2. 7V 0 -400 /lA
VOL~0.4V 0 12 rnA
QO-Q7
Low-level output VOL~0.5V 0 24 rnA
IOL current VOL~0.4V 0 4 rnA
Qi
VOL~0.5V 0 8 rnA
• MITSUBISHI
2-396 "ELECTRIC
MITSUBISHI LSTTLs
M74LS596P
8-BIT SHIFT REGISTER/LATCH WITH OPEN COLLECTOR OUTPUT
ELECTRICAL CHARACTERISTICS (Ta=-20- +7S"C, unless otherwise noted)
Limits
Min Typ Max
V'C Input clamp voltage VCC=4.7SV,IIC=-18mA -1.5 V

VCC=4. 7SV, V,=0.8V,
VOH High-level output voltage Qi V,=2V, 10H= -400J'A
2.7 3.4 V
I
Vcc=4.7SV, V,=0.8V,
IOH High-level output voltage QO-Q7 100 J<A
V,=2V, VO=S.SV
IOL=12rnA 0.25 0.4 V
QO-Q7 VCC=4.7SV
IOL=24rnA 0.35 0.5 V
VOL Low-level output voltage Vt=0.8V
IOL=4rnA 0.25 0.4 V
Qi V,=2V
IOL=8rnA 0.35 0.5 V
V,=2.7V 20 J'A
IIH High-level input current VCC=5.25V
V,=10V 0.1 rnA
Os -0.4 rnA
I,L Low-level input current Vcc=5.25V, VI=0.4V
I nput except Os -0.2 rnA
los Short-circuit output current (Note 2) Qi Vcc=5.25V, VO=OV -20 -100 rnA
ICCH High-level supply current VCC=5.25V, V,=OV, V,=4.5V rnA
ICCL Low-level supply current VCC=5.25V, V,=OV, V,=4.5V rnA
Iccz Off-state supply current Vcc=5.25V, V,=OV, V,=4.5V rnA
* : All values are at VCC= SV, T a = 25"C
Note 2: All measurements should be done quickly and not more than one output should be shorted at alime.
SWITCHING CHARACTERISTICS (VCc=SV. Ta=2S"C, unless otherwise noted)
Limits
Symbol Parameter Test condit.ions Unit
Min Typ Max
f max Maximum repeat frequency from input T SFT to output 0'1. 20 25 MHz
tpLH Low-to-high, high-to-Iow output propagation time, from 16 21
ns
tpHL input T 5 FT to output 0'7
RL=2kQ, CL=15p F (Note 31 12 30
High-to-Iow output propagation time
tpHL 19 35 ns
from input RSFT to output 0'7

ns
t pHL input T LAT to outputs Go - 07 23 35
RL=667 Q , CL=45pF (Note 3)
ns
tpHL input Eo to output 00. - OQ 12 38
PG OUT
PAA = lMHz, t, 6ns, tf = 6ns, lw = 500ns, Vp =3Vp.p ,
5011 . 20 = 50 ohms.
(2) CL inclu~es probe and jig capacitance .
• . MITSUBISHI
MITSUBISHI LSTTLs
M74LSS96P
8-BIT SHIFT REGISTER/LATCH WITH OPEN COLLECTOR OUTPUT
TIMING REQUIREMENTS (Vcc=5V, Ta=25°C, unlessotherwisenoted)
Limits
Min Typ Max
tW(TSFT) Shift clock input pulse width 25 22 ns
tW(TcAT) Latch clock input pulse width 20 12 ns
tW(RSFT) Shift register reset pulse width 20 9 ns
tsu (Os) Setup time Os to TSFT 20 12 ns
th (Os) Hold time Ds to T 8FT 2 -1 ns
treC(Rs FT ) Recovery time RSFT to T SFT 20 12 ns
tsu (TSFT) Setup time T S FT to T LAT 40 12 ns
TIMING DIAGRAMS (Reference level = 103V)
• MITSUBISHI
2-398 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS620P
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT (INVERTED)
DESCRIPTION
OUTPUT
containing an octal bus transmitter/receiver with a tri-state CONTROL
inverted output_ 'INPUT
OUTPUT
CONTROL
INPUT
FEATURES
• Two 8-bit data trains can be transmitted bidirectionally
or as unidirectional pulses
• Input/output A and output/input B each exhibit hys-
INPUTSi
teresis characteristics (Hysteresis width = 400mV typ) OUTPUTS
• High fan-out capability (l oL = 24mA. IOH =-1SmA) OUTPUTS!
• Wide operating temperature range (Ta = -20 ~ +7 SO C) INPUTS
APPLICATION
equipment
Outline 20P4
mutually to 2 circuits and the buffers with 3-state inverted
outputs are made two-way buffers_ A high impedance status is initiated at both pin A and ,B
The input/output A and output/input B input sections when OCAB is low and OC BA is high. isolating A from B.
are provided with hysteresis for an increased noise margin. Precautions should be taken to guard against OCAB being
The input/output direction is controlled by OCAB and at a high while OCeA is low. This condition will result in
OCBA · output from both A and B. and could result in the IC being
When OCAB and OCeA are high. A becomes the in'put destroyed.
pin. with output obtained at pin B. Conversely. when
OCAB are OCeA are low. B is the input and A is the output.
OUTPUT
CONTROL OOBA o-.r-+--.fo......-L
INPUT
.----+--+-----.....4------H~_ TO OTHER BUFFERS
OUTPUT
CONTRO L 00 AB o-..-+-;lIII-+-i.. +--w--+.....--I-<> B OUTPUT/;lNPUT
INPUT
' - -_ _ _ _ _.....4___ _ _ _ _.,.......,.. TO OTHER BUFFERS
UNIT: n
• MITSUBISHI
~ELECTRIC 2-399
MITSUBISHI LSTTLs
M74LS620P
OCBA OCAB A B Note 1. : Input pin

L L 0 I o : Output pi n
H H I 0 Z High-impedance (A and B isolated)
H L Z Z
* : Inhibit (No output from either A or SJ
L H
* *
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75"C, unless otherwise noted)
I A,B -0.5-+5.5 V
VI I nput voltage
-0.5-+15 V
I OCAB, OCBA
Topr Operating free·air ambient temperature range -20- +75 'c
Limits
Min Typ Max

VOH~2 .4V 0 -3 mA
VOH~2V 0 -15 mA
VOL::> 0 .4V 0 12 mA
VOL::>0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75"C, unless otherwise noted )
Limits
Symbol Parameter Test c'onditions Unit
Min Typ * Max
VT+-VT- Hysteresis width VOO=4.75V 0.2 0.4 V
VIC Input clamp voltage VOc=4.75V,llo=-18mA -1.5 V
Vco=4.75V IOH=-3mA 2.4 3.4 V
VI=0.6V, VI=2V IOH=-15mA 2 V
VCO""4.75V 10L =12mA 0.25 0.4 V
VI=O.6V, VI=2V IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Voc=5.25V, VI=0.6V, VI=2V, VO=2.7\ 20 "A
10ZL Off-state low-level output current Vco=5.25V, VI=0.6V, VI=2V, VO=O.4V -400 "A
A,B 20 "A
VOC=5.25V, VI=2.7V
OCBA, OCAB 20 "A
A,B VcO=5 .25V, VI=5.5V 0.1 rnA
OCBA, OCAB Voc=5.25V, VI=10V 0.1 rnA
IlL Low-level input current VOO=5.25V, VI=O.4V -0.4 mA
lOS Short-circuit output current (Note 2) VOO=5 .25V, VO=OV -40 -225 mA
ICCH Supply current, all outputs high Vco=5 .25V, VI=OV, VI=4 .5V 48 70 mA
ICCL Supply current, all outputs low Vco=5.25V, VI=OV, VI=4.5V 62 90 , mA
Iccz Supply current, all outputs off Vco=5.25V, VI=OV, VI=4.5V 64 95 mA
*: AlltypicalvaluesareatV cc=5V,Ta=25°C.
• MITSUBISHI
2-400 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS620P
SWITCHI NG CHARACTER ISTICS (Vee=5V, T a =25'C, unless otherwise noted)
Limits
Min Typ Max
Low-to-high-Ievel output From input A to output 8 8 10
tpLH
propagation ti me
ns
From input B to output A 8 10
CL=45pF INote 31
High-ta-Iow level output From input A to outputS 12 15
t pHL ns
propagation time From input B to outputA 12 15
Output enable time to From input OCSA to output A 25 40
tpZL
low-level
ns
From input OCAB to outputS 25 40
RL=667Q, CL =45pF INote 31
Output enable time to From input OCSA to output A 23 40
tpZH
high-level
ns
From input OCAB to output B 23 40
Output disable time fram From input OCSA to output A 17 25
tpLZ
Jow-Jevel
ns
From input OCAB to outputS 17 25
RL=667Q, CL=5pF INote31
Output disable time from From input OCSA to output A 19 25
tpHZ
high-level
ns
From input OCAB to output B 19 25
Note 3: Measurement Circuit
INPUT Vee
Parameter SW1 SW2

(1) The pulse generator IPGI hast he following
tpZH Open Closed
characteristics: PAR = lMHz, tr = Ens, tf == 6ns,
PG OUT tpZL Closed Open tw =500ns, Vp =3Vp.p, Zo = son.
(2) All diodes have high·speed switching dli1riU:wrhlic~;
tpLz Closed Closed·
. (t,,';; 4nsl
SOQ
t pHZ Closed Closed (3) CL includes probe and jig capacitance.
A,8 IINPUT)
• MITSUBISHI
;"ELECTRIC 2-401
MITSUBISHI LSTTLs
M74LS640P
DESCRIPTION
taining 8 bus transmitter/receiver circuits with inverted DATA
DIRECTION
outputs_ CONTROL
INPUT OUTPUT
CONTROL
INPUT .
FEATURES
• Bi-directional transmission or separation of two 8 bit
data is possible.
• Hysteresis provided (width = 400mV typical) for input/
output A and output/input B I NPUTS/
OUTPUTS
• High fan-out (lOL = 24mA,IoH = -15mA) OUTPUTS/
• Wide operating temperature range. (T a = -20 ~ +75°C) INPUTS
APPLICATION
ment.
The inputs and outputs of the two buffer circuits with Outline 20P4
3-state inverted outputs are connected together to form bi-
directional buffers. Having ~ysteresis characteristics in the
input section of input/output A and output/input B, noise
margin is high.
The data direction control input D IR controls the direc-
tion of input and output. When DI R is high, A is the input
terminal and B is the output terminal and when DI R is low,
A is the output terminal and B is the input terminal.
When the output control input DC is high, both A and
B are put in the high-impedance state so the buffers are
isolated.
A device, M74LS640-1P, having the same pin connec-
tions and functions except the value of IOL (= 48mA) has
been provided.
CIRCUIT DIAGRAM (Each buffer)

.---~~--~--~--~------------~~--~--~~--~--~--OVcc
OUTPUT
CONTROL 00 ~+-*+-{
INPUT
DATA
D~~~~T~g~ DIR o-,-+-;lO....-l ~+.!'--,+.....--t-oB OUTPUT/INPUT
INPUT
L-~ __~~~~__-+______~______-+-L~~~~____~~__~--oGND
~~-----------4-L------------~~SF~1~~R
UNIT: n
• MITSUBISHI
2-402 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS640P
00 DIR A S
L L 0 I
L H I a
H x Z z
Note1: I: Input pin
0: Output !inverted output)pin
Z: High impedance (A and B separated)
X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75"C ,unless otherwise noted)

VI Input voltage I A, B -0.5-+5.5 V
I DIR,OO -0.5-+15 V
Vo Output voltage Off state -0.5-+5.5 V
Tstg Storage temperature range -6S-+150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+7S"C,unless otherwise noted)
Limits
Min Typ Max
VOH~2,4V 0 -3 mA
VOH~2V 0 -15 mA
VOL";;0.4V 0 12 mA
VOL";;0.5V 0 24 mA
Limits
Min Typ * Max
VIC Input clamp voltage Vee=4.75V,lle=-·18mA -l.S V
Vee-4.75V 10H- 3mA 2.4 3.4 V
Vee=4,75V IOL=12mA 0.25 0.4 V
VI=0.6V, V,=2V IOL=24mA 0.35 0.5 V
10ZH Off-state high-level output current Veo=5.25V, VI=0.6V, VI=2V, VO=2,7V 20 /J,A
10ZL Off-state low-level output current Vee=S.25V, VI=0.6V, VI=2V, Vo=0.4V -400 /J,A
A,S 20 /J,A
Vee=S,25V, VI=2.7V
DIR,OO 20 /J,A
A,S Voo=5.25V, VI=5.5V 0.1 mA
DIR,OO Vee=S.25V, VI=10V 0.1 mA
IlL Low-level input current Vee=5.25V, VI=0.4V -0.4 mA
los Short-circuit output current (Note 2) Vee-S.2SV, VO-OV -40 -225 mA
leeH Supply current. all outputs high Vee=5.25V, VI=OV, VI-4.5V 48 70 mA
leeL Supply current. all outpus low Vee=5.25V, VI=OV, VI=4.5V 62 90 mA
leez Supply current. all outputs off Vee-5.25V, VI- OV, VI~4.5V 64 95 mA
*: All typical values are at Vee = 5V. T a = 25°e,
• MITSUBISHI
"ELECTRIC 2-403
MITSUBISHI LSTTLs
M74LS640P
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C,unlessotherwisenoted)
Limits
Min Typ Max
Low-ta-high level output From input A to output B 8 10
t PLH propagation time
ns
OL=45pF (Note 3)
High-to-Iow level output From input A to output B 12 15
t PHL ns
propagation time From input B to output fA 12 15
From input DC to output A 25 40
tPZL Low output enable,time ns
From input DC to output B RL =667Q GL = 45pF 25 40
From input DC to output A (Note 3) 23 40
lpZH High output enable time ns
From input DC to output B 23 40
tpLZ Low output disable time ns
From input DC to output B RL =667>2 GL= 5pF 17 25
t pHZ High output disable time ns
INPUT Vee
Parameter SWI SW2

t PZH Open Closed characteristics: PRR = 1MHz, tr = 6ns, tf =
6ns. tw = 500ns, Vp = 3Vp.p, Zo = 50n
PG DUT t PZL Closed Open
(2) All diodes are high speed switching diodes
t PLZ Closed Closed (t rr ,,:; 4ns).
50£2 (3) CL includes probe and jig capacitance.
t PHZ Closed Closed
A.B
(INPUT)
B.A
(OUTPUTI
be
B.A
(OUTPUT) '-____-+_.I+--+ 0 ,5V
• MITSUBISHI
2-404 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS640·1P

The M74LS640-1P is a semiconductor integrated circuit DATA
DIRECTION
containing 8 bus transmitters/receivers with inverted out- CONTROL Vee
INPUT OUTPUT
puts. CONTROL
INPUT
FEATURES
• Bi-directional transmission, or separation, of two 8-bit
data is possible.
INPUTS
• Hysteresis provided (= 400mV typical) for input/output /OUTPUTS
A and output/input B
OUTPUTS
• High fan-out (IOL = 48mA, IOH = -15mA) /INPUTS
• Wide operating temperature range (T a = -20~+75°C)
APPLICATION
GND
equipment.
Outline 20P4
mutually to 2 circuits and the buffers with 3·state inverted
outputs are made two·way buffers.
The input/output A and output/input B input sections
are provided with hysteresis for an increased noise margin.
The input/output direction is controlled by DI R.
When DIR is high, A is made the input pin and B the
output pin. When DI R is low, B is made the input pin and
A the output pin. When DC is high, both A and B are put in
the high-impedance state and A and B are isolated.

r---~r-~~--~----~------------~-,r-~--~lr--~--lr---oVee
OUTPUT
CONTROL OC o--orl--,i<e-+-1
INPUT
,---l--------l------------+---+----------j-l--b- TO OTHER BUF FERS
DATA
~~R~TC:6~N 0 IR o-..-t--.!....y +--M---j~--j-O B OUTPUTIINPUT

INPUT
' - - - - - - - - - - - - - -__.......4 -________~--_ TO OTHER BUFFERS
UNIT: Q
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS640·1P
OC DIR A B
L L 0 I
L H I 0
H X Z Z
Note 1: I: Input pin
o
t Output (inverted) pin
Z: High·impeoance (A, B isolated)
X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C. unlessotherwisenoted)
Symbol Parameter Cond!tions Limits Unit
V, I nput voltage I A, B -0,5- +5,5 V
I DIR,OO -0,5- + 15 V
Vo Output voltage Off-state -0,5- +5,5 V
Tstg IStorage temperature range ~65-+150 'C
RECOMMENDED OPERATING CONDITIONS(Ta=-20-+75'C, unless otherwise noted)
limits
Min Typ Max
VOH~2,4V 0 -3 rnA
VOH~2V 0 -15 rnA
VOL~O,.4V 0 12 rnA
VOL~0.5V 0 48 rnA
limits
Min Typ Max
High-level input" voltage 2
* V
VIH
VT+-VT- Hysteresis width VOC=4.75V 0.2 0,4 V
VIC Input clamp voltage VOC=4.75V,llc=-18rnA -1,5 V
VCC=4,75V 10H=- 3 rnA 2.4 3.4 V
VI=0,6V, VI=2V 10H= -15rnA 2 V
IOL=12mA 0,25 0,4 V
VCC=4,75V
VOL Low-level output voltage IOL-24mA 0.35 0,5 V
VI=0,6V, VI=2V
IOL -48mA 0.4 0,5 V
10ZH Off-state high-level output current VOC=5,25V. VI=0,6V, VI=2V. Vo=2,7V 20 ",A
10ZL Off-state low-level output current Voc=5.25V, Vj=0,6V, VI=2V, VO=0,4V -400 ",A
A,B 20 ",A
Voo=5,25V, VI=2.7V
DIR,OC 20 ",A
A,B Voo=5.25V, VI=5.5V 0,1 rnA
DIR,OC Voo=5,25V, VI=10V 0.1 rnA
IlL Low-level input current VcO=5,25V, VI=0,4V -0.4 rnA
los Short-circuit output current (Note 2) Voc~5.25V ' VO=OV -40 -225 rnA
lOCH Supply current, all outputs high Voc=5.25)1, VI=OV, VI=4,5V 48 70 rnA
10CL Supply current, all outputs low Vcc-5.25V, VI-OV, VI-4,5V 62 90 rnA
locz Supply, current, all outputs off Voc=5,25V, VI=OV, VI=4.5V , 64 95 rnA
*. AlitYPlcalvaluesareatVcc=5V, Ta=25C
• MITSUBISHI
2-406 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS640-1P
SWITCHING CHARACTERISTICS (Vee=5V, Ta=25'C, unless otherwise noted)
Limits
Min Typ Max
Low-to-high-Ievel From input A to output B 8 10
tpLH
ns
From input B to'Qutput A 8 10
CL =45pF (Note 3)
High-ta-Iow level From input A to output B 12 15
tpHL
ns
From input DC to outputA • 25 40
tPZL Low-level output enable time ns
RL=667Q CL = 45pF (Note 3)
From input DC to outputA 23 40
tPZH High-level output enable time ns
F rom input DC to output 8 23 40
tpLZ Low-level output disable time ns
From input OC to outputS 17 25
RL=667Q CL= 5pF (Note 3)
tPHZ High-level output disable time ns
INPUT Vee
Symbol SW 1 SW2
tpZH Open Closed characteristics:
PRR:= TMHz, tr =; 6ns, tf = 6ns, tw = 500ns.
Vp = 3Vp.p, Zo = 50n.
t PLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4m),
t PHZ Closed Closed
tr=
A,SIINPUTI - - - { -
S, AIOUTPUTI I -\ ~
~'----. tPLH
I'-------+-J+--+ O. 5V
• MITSUBISHI
.... ELECTRIC 2-407
MITSUBISHI LSTTLs
M74LS641P
OCTAL BUS TRANSCEIVER WITH OPEN COLLECTOR OUTPUT(NONINVERrED)

taining B bus transmitter/receiver circuits with non-inverted DATA
DIRECTION Vee
open collector outputs. CONTROL OUTPUT
INPUT CONTROL
INPUT
FEATURES
• Bi-directional transmission or separation of two B bit
data is possible.
• Open collector outputs
I NPUTSI
• Hysteresis provided (width = 400mV typical) for input/ OUTPUTS
output A and output/input B OUTPUTSI
• High fan-out (IOL = 24mA) INPUTS
• Wide operating temperature range. (T a = -20 - +75°C)
APPLICATION
ment_ GND
*: OPEN COLLECTOR OUTPUTS

The inputs and outputs of the two buffer circuits with
3-state non-inverted outputs are connected together to
form bi-directional buffers. The input sections of input/
tions and functions except the value of IOL ( = 4BmA) has
output A and output/input B have been designed with
been provided.
hysteresis characteristics giving increased noise margin_
The input/output direction is controlled by 01 R.
When 01 R is high, A is the input pin and B is the output
pin. When OIR is low then B is input terminal and A is the
output terminal. When output control input OC is high,
A and B become high so the buffers are isolated.
Open collector outputs are provided, so the high-level
output impedance can be freely selected with external load
resistors.
The functions and pin connections of this Ie are identi-
cal to those of M74LS645P.
OUTPUT
CONTROL oc O--M~~I-[
INPUT
DATA
D~~~~T~g~ D IR o-.-+--,Iio......-t ~-+J~H-+-+---
BUFFERS
UNIT: n
• MITSUBISHI
2-408 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS641P
OCTAL BUS TRANSCEIVER WITH OPEN COLLECTOR OUTPUT(NONINVERTED)
OC DIR A B
L L 0 I
L H I 0
H X H H
Note1: I: Input pin
0: Output (non-inverted output) pin
X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75t.unless otherwise noted)

I A. B -0.5-+7 V
V, Input voltage
I DIR.OC -0.5-+ 15 V
Tstg Storage temperature range -65- +150 t
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75t. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current Vo=5.5V 0 100 J-IA
VOL;::;0.4V 0 12 rnA
VOL';:0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta= -20-+75t. unless otherwise noted)

Limits
Min Typ * Max
VT+-VT- Hysteresis width Vcc=4.75V 0.2 0.4 V
V'C Input clamp voltage Vcc=4.75V. l,c=-18rnA - 1.5 V
IOH High-level output current VcC=4.75V. V, =O.6V. W=2V. Vo=5.5V 100 J-IA
Vcc=4.75V /IOL=12rnA 0.25 0.4 V
V,=0.6V. V, =2V i loL=24rnA 0.35 0.5 V
A. B 20 J-IA
Vcc=5.25V. V, =2.7V
DIR.OC 20 J-IA
A. B Vcc=5.25V. V, =5.5V 0.1 rnA
DIR.OC VCO=5.25V. V, =lOV 0.1, rnA
I,L Low-level input current Vcc=5.25V. V, =0.4V -0.4 rnA
lOCH Supply current. all outputs high Vcc=5.25V. V, =OV .. V, =4.5V 48 70 rnA
ICCL Supply current. all outputs low VCC=5.25V. V, =OV. V, =4.5V 62 90 rnA
ICCZ Supply current, all outputs off Vcc=S.25V. V,=OV. V,=4.5V 64 95 rnA
* AH typical values are at Vee = 5V. T a = 25°C.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS641P
Limits
Min Typ Max
t pLH ns
propagation time From input B to output A 20 25
High-ta-Iow level output From input A to output B 15 25
t pHL ns
CL=45pF, RL=667Q (Note 2)
Low-ta-high level output From input OC to output A 25 40
t pLH propagation time ns
From input OC to output 8 25 40
High-to~low level output From input DC to output A 30 50
tpHL propagation time ns
From input OC to output B 30 50
(1) The pulse generator {PGI has the following

characteristics: PRR "" 1MHz, tr = 6ns, tf =
6ns, tw" 500ns,Vp " 3Vp.p, Zo" 50n.
A.B
(INPUT)
B.A
(OUTPUT)
OC
B.A
(OUTPUT)
• MITSUBISHI
2-410 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS641-1P
DESCRIPTION
The M74LS641-1P is a semiconductor integrated circuit
containing 8 bus transmitters/receivers with non-inverted DATA
DIRECTION
outputs, CONTROL Vee
INPUT OUTPUT
OC CONTROL
INPUT
FEATURES ..... B1
..... B2
data is possible.
• Open collector outputs ..... B3
INPUTS/
• Hysteresis provided (= 400mV typical) for input/output OUTPUTS
A and output/input B OUTPUTS/
_. B5 INPUTS
• High fan-out (10 L = 48mAl
• Wide operating temperature range (Ta= -20~+75°CI -B6
-B7
APPLICATION
General purpose, for use in industrial and consumer GND -B8
equipment.
Outline 20P4 * : OPEN COLLECTOR
OUTPUTS
In this device the inputs and outputs are connected both A and B go to high and are isolated ..
mutually to 2 circuits and the buffers with open collector The functions and pin connections of this device are
non-inverted outputs are made two-way buffers_ identical to those of M74LS645-1P but since open collector
The input/output A and output/input B input sections outputs are provided, the high-level output impedance can
are provided with hysteresis for an increased noise margin. be freely selected with an external load resistor.
The input/output direction is controlled by DI R.
output pin. When D IR is low, B is made the input pin and
A the output pin. When output control input OC is high,
.--+-_-+_____.L._ _ _++-+....... TO OTHE R BUFFERS

S.4k
DATA
ggiNilT6~N DIRo-.-+---.I<.....-t ~~'--H-+-+-<J B OUTPUT/INPUT
INPUT
L-.L.-~L-~.L.--~--+--~~~_4- _ _ _~.L._.L.~GND
L------~ _ _ _ _ _ _ _ _ TO OTHER BUFFERS
UNIT: Q
• MITSUBISHI
.... ELECTRIC 2-411
MITSUBISHI LSTTLs
M74LS641-1P
FUNCTION TABLE. (Note 1)

00 DIR A B
L L 0 I
L H I 0
H X H .H
o : Output Inon-inverted) pin
X : Irrelevant
Symbol Parameter Conditions Limits Unit.
VI Input voltage
I A. B -0.5-+7 V
I DIR.OO -0.5'- + 15 V
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75'C. unless otherwise noted)
Limits
Min Typ Max
IOH High-level output current I Vo=5.5V 0 100 ,.,A
IOL Low-level output current I VOL;:;;;0.4V 0 12 mA

I VOL';:0.5V 0 48 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C. unlessotherviisenoted)
Limits
Min Typ * Max
VIC Input clamp voltage , Vec'=4.75V. Ile=-18mA -1.5 V
IOH High-level output current Vcc=4.75V. VI =O.6V. VI =2V. Vo=5.5V 100 ,.,A
IOL=12rnA 0.25 0.4 V
Vee=4.75V
VOL Low-level output voltage IOL=24rnA 0.35 0.5 V
VI=0.6. VI=2V
IOL=48rnA 0.4 0.5 V
A. B 20 ,.,A
Vee=5.25V. VI =2.7V
DIR.OO 20 ,.,A
A. B Vee=5.25V. VI =5.5V 0.1 rnA
DIR. 00' Vee=5.25V. VI =10V 0.1 rnA
IlL Low-level input current Vee=5.25V. VI =0.4V -0.4 rnA
leeH Supply current, all outputs high Vee=5.25V. VI=OV .. VI=4.5V 48 70 rnA
leeL Supply current, all outputs low Vee=5.25V. VI =OV. VI =4 .5V 62 90 rnA
leez Supply current, all· outputs off Vee-5.25V. VI-OV. VI -4.5V. 64 95 rnA
,
* : All tYPical values are at Vee=5V. Ta=25'C
• MITSUBISHI
2-412 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS641-1P
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C. unlessotherwisenoted)
Limits
Min Typ Max
Low-to-high-Ievel output From input A to output B 20 25
t pLH ns
tpHL ns
CL =45pF. RL =667 Q (Note 2)
Low-la-high level output From input OC to output A 25 40
t pLH ns
propagation time From input OC to output B 25 40
High-to-Iow-Ieveloutput From input ac to output A 30 50
tpHL ns

PRR = lMHz, tr = 6ns. tf = 6ns. tw = 500n5,
Vp =3Vp_p. Zo =SO!"!_
(2) CL includes probe arid jig'capacilance.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS642P
OCTAL BUS TRANSCEIVER WITH OPEN COLLECTOR OUTPUT (INVERTED)
DESCRIPTION
taining 8 bus transmitter/receiver circuits with inverted DATA
DIRECTION Vee
open collector outputs. CONTROL , OUTPUT
INPUT CONTROL
INPUT
FEATURES
data is possible.
'. Open collector outputs
INPUTS/
output A and output/input B OUTPUTS/
• High fan·out (IOL = 24mA) INPUTS
• Wide operating temperature range. (T a = -20 - +75°C)
, APPLICATION
ment. GND

The inputs and outputs of the two buffer circuits with
inverted output open collectors are connected together to The functions and pin connections of this IC are identi-
form bi-directional buffers. cal to those of M74LS640P.
The input sections of input/output A and output/input A device, M74LS642-1P, having the same pin connec-
B have been designed with hysteresis characteristics for tions and functions except the value of IOL (= 48mA) has
increased noise margin. The input/output direction is con- been provided.
trolled byDIR.
When D IR is high then A is the input pin and B is the
output pin. When 0 I R is low then B is input pin and A is
the output pin. When output control input OC is high, A
and B become high so the buffers are isolated.
resistors.
OUTPUT
CONTROL oc C>-<.-+-.............-t
INPUT
r-+----~---------------"----+++~ TO OTH E R BU F FE RS
DATA
Db~~~/~g~ DIR o-rl-r.....-:I. t--...'-----I~----j-O B OUTPUT/INPUT
INPUT
L-~----~+-~----+---~------~~~--+-~----~~--~~GND
L-____________-+-_____________ TO OTH E R BU F FE RS
UNIT: n
• . MITSUBISHI
2-414 "'ELECTRIC
MITSUBISHI LSTTLs
M74LS642P
DC DIR A B
L L 0 I
L H I 0
H X H H
Notel: I: Input pin

0: Output (inverted output) pin
X: Irrelevant

VOO Supply voltage -0.5- +7 V
V, Input voltage I A. B -0.5-+7 V
I DIR.OC -0.5- + 15 V
Limits
Min Typ Max
IOH High-level output current Vo=5.5V 0 100 {lA
VOL~0.4V 0 12 mA
VOL';;:0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75"C. unless otherwise noted)
Limits
Min Typ * Max
VT+-VT- Hysteresis width Voo=4.75V 0.2 0.4 V
V,O Input clamp voltage VOO=4.75V.I,0=-.18mA -1.5 V
IOH High-level output current Vcc=4.7SV. V, =O.6V. V, =2V. VOH=S.SV 100 {lA

VOO=4.75V I IOL=12mA 0.25 0.4 V
V,=O.6V. V,=2V I IOL=24mA 0.35 0.5 V
A. B 20 {lA
Vco=5.2SV, V,=2.7V
DIR.OC 20 {lA
A. B Voo=5.25V, V, =5.5V 0.1 mA
DIR.OC VOO=5.25V. V, =10V 0.1 mA
I,L Low-level input current Voo=S.2SV, V, =0.4V -0.4 mA
ICOH Supply current, all outputs high Voo-S.25V. V,-OV. VI-4.5V 48 70 mA
ICCL Supply current, all outputs low VOO-5.25V. V, -OV. V, =4 .5V 62 90 mA
100Z Supply current. all outputs off VOO=S.25V. V, =OV. V,=4.SV 64 95 mA
* All typical values are at Vee = 5V, T a = 25°C.
• MITSUBISHI
"ELECTRIC 2-415
MITSUBISHI LSTTLs
M74LS642P
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25"C,unlessotherwisenoted)
limits
Min Typ Max
tpLH propagation time ns
From input 8 to, output A 16 25
t PHL propagation' time
ns
Fro'm input B to output A CL =45pF. RL =667 Q 14 25
tpLH (Note 2) ns
propagation time From input DC to output B 25 40
High-ta-Iow level output From input DC to output A 30 60
tpHL propagation time ns

characteristics: PAR = lMHz, tr = 6ns, tf =
PO DUT 6ns, tw = 500ns, Vp = 3Vp.p, Zo = son
50Q
• MITSUBISHI
2-416 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS642-1P
DESCRIPTION
The M7 4LS642-1 P is a semiconductor integrated circu it
DATA
containing 8 bus transmitters/receivers with open collector DIRECTION Vee
CONTROL
inverted outputs. INPUT OUTPUT
CONTROL
INPUT
FEATURES
data is possible.
INPUTS
• Open collector outputs IOUTPUTS
• Hysteresis provided (= 400mV typical) for input/output
OUTPUTS
A and output/input B IINPUTS
• High fan-out (10 L = 48mA)

• Wide operating temperature range (T a = -20-+75°C)
APPLICATION
GND
equipment. * : OPEN COLLECTOR OUTPUTS
Outline 20P4
In this device the inputs and outputs are connected The functions and pin connections of this device are
mutUally to 2 circuits and the buffers with open collector identical to those of M74LS640-1P but since open collector
inverted outputs are made two-way buffers. outputs are provided, the high-level output impedance can
The input/output A and output/input B sections are be freely selected with an external load resistor.
provided with hysteresis for an increased noise margin. The
input/output direction is controlled by D IR.
A the output pin. When OC is high, both A and B are high
and A and B are isolated.
r-+----i--------O~-_+++~ TO OTHER BUFFERS
DATA
g6%~CRT6~N DIR o--M--:!~"'{ t-~t-H-4-+C B OUTPUT/INPUT
INPUT
L-~--~~~--~--r----~~-+-4---~~-~~ GND
L-______ ~------_ TO OTHER BU"FFERS
UNIT: Q
• MITSUBISHI
.... ELECTRIC 2-417
MITSUBISHI LSTTLs
M74LS642-1P
00 DIR A B
L L 0 I
L H I 0
H X H H

(5 : Output (inverted) pin
X : Irrelevant
MAXIMUM ABSOLUTE RATINGS (Ta=-20-+75"C. unless otherwise noted)
Vec Supply voltage -0.5-+7 V
V, I nput voltage I A. B -0.5-+7 V
I DIR.OO -0.5-+15 V
TS19 Storage temperature range -65-+150 "C
RECOMMENDED OPERATING CONDITIONS (Ta = -20- +75"C. unless otherwise noted)
Limits
Min Typ Max
Vcc Supply voltage 4.75 5 5.25 V
IOH High-level output current Vo=5.5V 0 100 /1A
VOL~0.4V 0 12 mA
VOL';:0.5V 0 48 rnA
ELECTRICAL CHARACTERISTICS(Ta = -20- +75"C. unless otherwise noted)
Limits
Min Typ * Max
VT + -VT- Hysteresis width Vcc=4.75V 0.2 0.4 V
V'C Input clamp voltage Vcc=4.75V. I,c= - 18,rnA -1.5 V
IOH High-level output current Vcc=4.75V. V, =O.6V. V, =2V. Vo=5.5V 100 /1A
IOL=12rnA 0.25 0.4 V
VCC=4.75V
VOL Low-_Ievel output voltage IOL=24rnA 0.35 0.5 V
V,=0.6V. V,=2V
IOL=48rnA 0.4 0.5 V
A. B 20 /1 A
Vcc=5.25V. V,=2.7V
DIR.OO 20 /1 A
A. B Vcc=5.25V. V, = 5.5V 0.1 rnA
DIR.OO VCC=5.25V. V, =10V 0.1 mA
IlL Low-level input current VCC=5.25V. V, =0.4V -0.4 rnA
ICCH Supply current. all outputs high Vcc=5.25V. VI.=OV. V, =4.5V 48 70 rnA
ICCL Supply current, all outputs low Vcc=5.25V. V,=OV. V,=4.5V 62 90 rnA
Iccz Supply current. all outputs off VCC=5.25V. V, =OV. VI =4.5V 64 95 rnA
* All typical values are at Vcc= 5V. Ta = 25"C
.MITSUBISHI
2-418 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS642-1P
Limits
Min Typ Max
t PLH ns
High-ta-Iow level outpout From input A to output B 14 25
t pHL ns
propagation time ·From input B to output A 14 25
CL =45pF. RL =667 Q(Note 2)
t pLH ns
High-to-Iow-Ievel output From input DC to output A 30 60
tpHL ns

PAR = lMHz, tr = 6ns. tf = 6ns, tw '" 500n5.
PG DUT Vp = 3Vp_p, Zo = son.
50Q
tr
A. B(INPUT) --f-
B. A (OUTPUT) I\ B. A(OUTPUT)
~·---ttP:H
• MITSUBISHI
.... ELECTRIC 2-419
MITSUBISHI LSTTLs
M74LS643P
OCTAL BUS TRANSCEIVER WITH 3·STATE OUTPUT

taining 8 bus transmitter/receiver circuits with inverted and DATA
DIRECTION Vee
non-inverted outputs. CONTROL OUTPUT
INPUT CONTROL
INPUT
FEATURES
data is possible.
output A and output/input B INPUTS!
OUTPUTS
• High fan-out (IOL = 24mA, IOH = -15mA)
OUTPUTS!
• Wide operating temperature range. (T a = -20 - +75°C) INPUTS
APPLICATION
ment.
GND
The inputs and outputs of the two buffer circuits with 3- Outline 20P4
state outputs are connected together to form bi-directional
buffers.
The input sections of input/output A and output/input
B have been designed with hysteresis characteristics for
increased noise margin. The input/output direction is con-
trolled by D I R_
When DI R is high then A is the input pin and B is the
output pin. When D I R is low then B is input pin and A is
the output pin.
When output control input OC is high, both A and Bare
put in the high-impedance state so the buffers are isolated.
tions and functions except the value of IOL (= 48mA) has
been provided.

r---~~~~--~----~----------~--~--~~~----~------~vee
OUTPUT
CONTRDL OC O-rl----.....>-I
INPUT
r---+-----~----------~~--------~+---TOOTHER
BUFFERS
DATA
DIRECTION DIR o-.-+---.IlH-{ "'-~'--'-"'--+-J.......<:J B OUTPUT!INPUT
CONTROL
INPUT
~4-----+-+-~----+------t---------+-+~~~~~----+-~~--~GND
~----------------~---"-----------'--- TO OTHER
BUFFERS
UNIT:n
• MITSUBISHI
2-420 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS643P
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT
FUNCTION TABLE INotell
OC DIR A 8
L L 0 I
L H I 0
H X Z Z
Notel: I: Input pin

0: Output {non-inverted outputl pin
B: Output (inverted output) pin
Z: High impedance (A. B separated)
X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C,unless otherwise noted)

VI Input voltage l A, S -0.5- + 5.5 V
I DIR,OC -0.5- + 15 V
Vo Output voltage Off state -0.5-+5.5 V
T opr Operating free-air ambient temperature range -20-+75 "C
Tstg Storage temperatu re range -65-+150 "C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C.unlessotherwisenoted)
Limits
Min Typ Max
VOH~2 .4V 0 -3 mA
VOH~ 2V 0 -15 rnA
VOL;i;0.4V 0 12 rnA
VOL;i;0.5V 0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta= -20-+75"C, unless otherwise noted)

Limits
Min Typ * Max
VIH Hi,gh.level input voltage 2 V
VIL Low-Jevel input voltage 0.6 V
VT+ -VT- Hysteresis width Vee=4.75V 0.2 0.4 V
V'C InPl:lt clamp voltage Vce=4.75V,lle--18mA -1.5 V
Vee=4.75V 10H=- 3mA 2.4 3.4 V
Vec=4.75V IOL=12mA 0.25 0.4 V
VI=0.6V, V,=2V IOL=24mA 0.35 0.5 V
IOZH Off-state high-level output current Vee=5.25V, VI=0.6V, VI=2V, VO=2.7V 20 "A
IOZL Orf-stat~ low-lev~1 output current Vec=5.25V, VI=0.6V, VI=2V, Vo=0.4V -400 "A
A,S 20 "A
Vee=5.25V, VI=2.7V
DIR,OC 20 "A
A,S Vee=5.25V, VI=5.5V 0.1 mA
DIR,OC Vee=5.25V, VI=10V 0.1 mA
los Short-circuit output current (Note 2) Vee=5.25V, VO=OV -40 -225 rnA
leeH Supply current, all outputs high Vee=5.25V, VI=OV, VI=4.5V 48 70 rnA
leeL Supply current, all outputs low Voe=5.25V, VI=OV, VI=4.5V 62 90 rnA
leez Supply current, all outputs off Vee=5.25V, VI-OV, VI-4.5V 64 95 mA
*: All tYPical values are at Vee = 5V. Ta = 25°C.
Note 2: All measurements shoul~ be done quickly, and not more than one output should be shorted at a time.
• MITSUBISHI
;"'ELECTRIC 2-421
MITSUBISHI LSTTLs
M74LS643P
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25"C,unlessotherwisenoted)
Limits
Min Typ Max
t pLH ns
CL=45pF (Note 3)
t PHL ns
From input OC to output A 25 40
tPZL Low output enable time ns
From input OC to output B AL = 667Q CL = 45pF 25 40
High output enable time ns
tPZH
From input DC to output 8 23 40
t PLZ Low output disable time ns
From input OC to output 8 AL.=667Q CL= 5pF 17 25
tpHZ High output disable time ns
INPUT Vee
Parameter SWl SW2
(1) The pulse gE!nerator (PG) has the following
tPZH Open Closed characteristics: PRR "" 1MHz, tr = 6ns, tf =
t PZL Closed Open

6ns. tw = 500ns,Vp = 3Vp.p. Zo =50n
PG OUT
t PLZ Closed Closed (t,,"; 4ns).
5012 (3) CL includes probe and jig capacitance.
t PHZ Closed Closed
A, 8 (INPUT)
8 (OUTPUT)
A (OUTPUT)
A, 8 (OUTPUT)
A, 8 (OUTPUT)
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS643·1P
OCTAL BUS TRANSCEIVER WITH 3·STATE OUTPUT
DESCRIPTION
DATA
containing 8 bus transmitters/receivers with inverted and DIRECTION Vee
non-inverted outputs_ CONTROL
INPUT OUTPUT
CONTROL
INPUT
FEATURES
data is possible_
• Hysteresis provided (= 400m V typical) for input/output INPUTS
/OUTPUTS
OUTPUTS
• High fan-out (lOL = 48mA, IOH = -15mAl /INPUTS
• Wide operating temperatu re range (T a = -20-+75° Cl
APPLICATION
equipment. GND
Outline 20P4
In this device the inputs and outputs are mutually
connected and the buffers with non-inverted outputs and
the buffers with 3-state inverted outputs are made two-way
buffers.
The input/output A and output/input B input sections
The input/output direction is controlled by D I R.
When DI R is high, A is made the input pin and B the
A the output pin_ When output control input OC is high,
both A and B are put in the high-impedance state and A
and B are isolated.

r-----~~~~~----~------------~~--~--~~--~------~ Vee
OUTPUT
CONTROL 0C 0-.-+-.1....'-1.
INPUT
r---+-----~----------~~--------~----TOOTHER
BUFFERS
DATA
ggiJ'TCRT6~N 0 IR ()-jH--d't-+-{. ~-..t'-t...,...>--_oB OUTPUT/INPUT
INPUT
L-4-----~4-~----~----~--------~~--+-~_+_+----~~-----oGND
L -________________~~------------___ TOOTHER
BUFFERS
UNIT: Q
• MITSUBISHI
"ELECTRIC 2-423
MITSUBISHI LSTTLs
M74LS643-1P
DC DIR A 8
L L 0 I
L H I 0
H X Z Z
o : Output (non-inverted) pin
'0 : Output (inverted) pin
Z : High·impedance (A, 8 are isolated)
X : Irrelevant
ABSOLUTE MAXIMUM RATINGSCTa=-20-+75L:, unless otherwise noted)
Vee Supply voltage -0,5- +7 V
VI I nput voltage I A, B -0,5-+5,5 V
I DIR, CO -0,5-+15 V
Vo Output voltage Off-state -0,5-+5,5 V
Topr Operating free-air ambient temperature range -20-+75 L:
Tstg Storage temperature range -65-+150 L:
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"O, unless otherwise noted)
Limits
Min Typ Max
VOH~2.4V 0 -3 mA
VOH~ 2V 0 -15 mA
VOL~0.4V 0 12 mA
IOL L9w-level output current
VOL;;;0.5V 0 48 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75L:, unless otherwise noted)
Limits
Min Typ * Max
V,e Input clamp voltage Vee=4.75V, I,e= -18mA - 1.5 V
Vee=4.75V IOH=-3mA 2.4 3.4 V
V, =0,6V, V, =2V IOH= -15mA 2 V
IOL=12mA 0.25 0.4 if
Vee=4.75V
VI=0,6V, V,=2V
IOL=48mA 0.4 0.5 V
IOZH Off-state high-level output current Vcc=5.25V, V, =O.6V, V, =2V, Vo=2.7V 20 J.'.A
10ZL Off-state low-level output current Vce=5.25V, V, =0.6V, V, =2V, Vo=0.4V -400 J.'.A
A, B 20 J.'.A
Vee= 5.25V, V, = 2. 7V
DIR, DC 20 J.'.A
A, B Vee=5.25V, V, =5.5V 0.1 mA
DIR, DC Vee=5,25V, V, = 10V 0.1 mA
I'L Low-level input current Vee=5.25V, V, =0.4V -0.4 mA
los Short-circuit output current (Note 2) Vec=5,25V, Vo= aV -40 -225 mA
leeH Supply current, all outputs high Vec=5.25V, V, = a V, V, =4.5V 48 70 mA
leeL Supply current, all outputs low Vee=5.25V, V, = a V, V, =4.5V 62 90 mA
leez Supply current, all outputs off Vee=5.25V, v,=OV, V,=4.5V 64 95 mA
*.: All typical va'ues are at Vee = 5V, Ta = 25L:
• MITSUBISHI
2-424 "ELECTRIC
MITSUBISHI LSTTLs
M74LS643-1P
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25·C. unless otherwise noted)
Limits
Min Typ Max
t PLH ns
CL=45pF INote 3)
t pHL ns
propagation time From input 8 to output A 12 15
Low-level output enable" From input DC to output A 25 40
tPZL ns
time From input OCto output B 25 40
RL=667Q CL=45pF INote3)
High-level output enable From input OCto output A 23 40
tpZH ns
Low-level output disable From inputOe to output A 17 25
tpLZ ns
time From inputOOto output B 17 25
RL=667Q CL=5pF (Note 3)
High-level output disable From inputOCto output A 19 25
tpHZ ns
INPUT Vee
Symbol SWl SW2
(1) The-pulse generator (PG) has the following
Closed PRR::: 1MHz, tr ::: 6ns, tf ::: 6ns, tw ::: 500ns,
OUT tPZL Open
PG Vp 3V p_p • Zo" 50n.
0
t PLZ Closed Closed (2) All diodes are switching diodes (t rr ~4ns).
SOQ (3) CL includes probe and jig capacitance.

t PHZ Closed Closed
-1 SW2
A. B (INPUT)
B (OUTPUTI
A IOUTPUT)
A. B (OUTPUT)
A. B (OUTPUT)
• MITSUBISHI
.... ELECTRIC 2-425
MITSUBISHI LSTTLs
M74LS644P
OCTAL BUS TRANSCEIVER WITH OPEN COLLECTOR OUTPUT
DESCRIPTION
taining B bus transmitter/receiver circuits with inverted, DATA
DIRECTION DIR -+ 1 Vec
non-inverted open collector outputs. CONTROL OUTPUT
INPUT CONTROL
INPUT
FEATURES
data is possible.
• Open collector outputs
INPUTS/
output A and output/input B OUTPUTS/
• High fan·out (IOL = 24mA) INPUTS
• Wide operating temperature range. (T a = -20 ~ +75°C)
APPLICATION
General purpose,' for use in industrial and consumer equip-
ment. GND
*: OPEN COLLECTOR OUTPUTS

The inputs and outputs of the buffer'circuits with open col-
lector outputs are connected together to form bi·directional The functions and' pin connections of this IC are identi-
buffers. The input sections of input/output A and output/ cal to those of M74LS643P.
input B have been designed with hysteresis characteristics A device, M74LS644-1 P, having the same pin connec-
giving increased noise margin. The input/output direction tions and functions except the value of IOL (= 48mA) has
is controlled by DI R. been provided.
When DI R is high then A is the input pin and B is the
output pin. When D IR is low then Bis input pin and A is
the output pin. When output control input OC is high, A
and B become high so the buffers are isolated.
resistors.

r---~~~~--~----~----------~--~--~-t-t----t--ovee
INPUT/
OUTPUT OUTPUT
CONTROL ooo-t+---f-....-t A ~-rt-;;e-....,
INPUT
.----j------+------------.......-----Hr-t- TO OTHE R BU F FE RS
2.4k
2k
DATA
Db~~~T~g~ DIR 0-M--;I'->-t .....~-'l~I--+--o B OUTPUT/INPUT
INPUT
L-~----~~~----~----~------ .......~~--t_----~~~~~GND
L....._ _ _ _ _ _ _ _ _ _ _ _~>____ _ _ _ _ _ _ _ _ _ _ _• TO OTHER BUFFERS
UNIT:f!
. 'MITSUBISHI
2-426 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS644P
OC DIR A B
L L 0 I
L H I 0
H X H H
Note1: I: Input pin

0: Output (inverted output) pin
X; Irrelevant

VI Input voltage I A. B -0.5-+7 V

I DIR.OC --0.5-+15 V
Va Output voltage High-level state -0.5- +7 V
Topr Operating free-air ambient temperature range -ZO-+75 ·C
Tstg Storage temperature range -65-+150 ·c
Limits
Min Typ Max
Vee Supply voltage 4.75 5 5.Z5 V
IOH High-level output current Vo=5.5V 0 100 "A

VOL;"i;0.4V . 1Z rnA
VOL;"i;0.5V
°0 24 rnA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C. unless otherwise noted)
Limits
Min Typ * Max
VIH High-level output voltage Z V
VIL Low-level output voltage 0.6 V
VT+-VT- Hysteresis width Veo=4.75V O.Z 0.4 V
IOH High-level output current Vee=4. 75V. VI=0.6V.VI=ZV.Vo=5.5V 100 "A

Vee=4.75V I IOL=lZrnA 0.Z5 0.4 V
VI=0.6V. VI=ZV I IOL=Z4rnA 0.35 0.5 V
A. B ZO "A
Veo=5.2SV. VI=2.7V
DIR.OC 20 "A
IIH High-,Ievel input current
A. B VOO=5.Z5V. VI=5.5V 0.1 rnA
DIR.OC Veo=5.25V. V,=10V 0.1 rnA
IlL Low-level input current Vee=5.Z5V. VI=0.4V -0.4 rnA
leeH Supply current, all outputs high Voo=5.Z5V. VI=O,v. VI=4.5V 48 70 rnA
leeL Supply current, all outputs low Vee=5.Z5V. VI=OV. VI=4.5V 6Z 90 rnA
loez Supply current, all outputs off Vee=S.Z5V. VI=OV. VI=4.5V 64 95 rnA
* : All tYPical values are at VCC = 5V, Ta = 25°C.
• MITSUBISHI
~ELECTRIC 2-427
MITSUBISHI LSTTLs
M74LS644P
Limits
Min Typ Max
tpLH ns
propagation time From input 8 to output A 20 25
t PHL propagation time
ns
CL=45pF, RL=667 Q
Low-ta-high level output From input DC to output A 25 40
t pLH (Note 2) ns
High-ta-Iow level output From input DC to output A 30 60
t PHL propagation time
ns
From input OC to output B 3,0 50
Note2: Measurement circuit
(1) The pulse generator (PG) hils the following

RL characteristics: PR R = 1 MHz, tr = 6ns, tf =
6ns, tw = 500ns, Vp = 3Vp_p, Zo = 50n
PO OUT (2) CL includes probe and jig capacitance.
50Q
r CL
A, B (INPUT)
B (OUTPUT)
A (OUTPUT)
A, B (OUTPUT)
• MITSUBISHI
2-428 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS644-1P
DESCRIPTION
The M74LS644-1 P is a semiconductor integrated circuit
DATA
containing 8 bus transmitters/receivers with open collector DIRECTION
CONTROL
inverted and non-inverted outputs. INPUT OUTPUT
CONTROL
INPUT
FEATURES
data is possible.
• Open collector outputs INPUTS
IOUTPUTS
• Hysteresis provided (= 400mV typical) for input/output
OUTPUTS
A and output/input B IINPUTS
• High fan·out (10 L = 48mA)

APPLICATION,
equipment. *: OPEN COLLECTOR OUTPUTS
Outline 20P4
In this device the inputs and outputs are connected A the output pin. When OC is high, both A and B are high,
mutually and the buffers with open collectors inverted and A and B are 'isolated.
outputs and the buffers with the non-inverted outputs are The functions and pin connections of this device are
made two-way buffers. the input/output A and output/ identical to those of M74LS643-1 P but since open collector
input B input sections are provided with hysteresis for an outputs are provided, the high-level output impedance can
increased noise margin. The input/output direction is be freely selected with an external load resistor.
controlled by 01 R.
When OIR is high, A is made the input pin and B the
output pin. When 0 I R is low, B is made the input pin and

r---~--~~--~----~----------~--~--~~~----~-o Vee
OUTPUT
CONTRO L 0C o--.-+--.I....-l
INPUT
r---f-------+-------------------t-i--t-~ TO OTH E R BU F FE RS
2Ak
DATA
g6RNEg6~N 0 IR o-<rl-oI'It---I--t __'*I'--!-r<'---t-'() B OUTPUT liN PU T
INPUT
~~--~'--~4-----~----1_------~-4~--+-----~~'----L-~GND
L __ _ _ _ _ _ _ _ _ _ _ _- - - '_ _ _ _ _ _ _ _ _ _ _ _ _ _~ TO OTH ER BUF F ERS
UNIT: Q
• MITSUBISHI
"'ELECTRIC 2-429
MITSUBISHI LSTTLs
M74LS644-1P
OC DIR A B
L L 0 I
L H I 0
H X H H

o : Output (non-inverted) pin
o: Output (inverted) pin
X : Irrelevant

VI Input voltage L A. B -0.5-+7 V

I DIR.OC -0.5-+15 V
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75'C. unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage 4.75 5 5,25 V
IOH High-level output current Vo=5.5V 0 100 /1A

VOL~0.4V 0 12 mA
VOL~O .5V 0 48 mA
ELECTRICAL CHARACTERISTICS (Ta=-20-+75'C. unlessotherwisenoted)
limits
Min Typ * Max
VT+-VT- Hysteresis width Voo=4.75V 0.2 0.4 V
VIO Input clamp voltage Voo=4.75V.llo=-18mA -1.5 V
IOH High-level output current VOO=4. 75V. VI=0.6V.VI=2V.VO=5.5V 100 /1 A
IOL=12mA 0.25 0.4 V
VOO=4.75V
VI=0.6V. VI=2V
IOL=48mA 0.4 0.5 V
A. B 20 /1 A
VOO~S.25V. VI=2.7V
pIR.OC 20 /1 A
IIH High-level input curr~nt
A. B VOO=5.25V. VI=5.5V 0.1 mA
DIR.OC Voo=5.25V. VI=10V 0.1 mA
IlL Low-level input current Voo-S.25V. VI-Q.4V -0.4 mA
IOOH Supply current, all outputs high VOO-5.2SV. VI-OV. VI-4.5V 48 70 mA
IOOL Supply current, all outputs low VOO=5.25V. VI=OV.VI=4.5V 62 90 mA
looz Supply current, all outputs off Voo=5.25V. VI=OV. VI=4.SV 64 95 mA
* : All typical values are at Vcc=5V, Ta=25~C
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS644-1P
SWITCHING CHARACTERISTICS (Vcc=5V. T a =25'C, unlessotherwisenoted)
Limits
Min Typ Max
Low-to-high-Ieveloutput From input A to output 8 16 25
t pLH ns
High-ta-Iow level output From input A to output 8 14 25
t pHL ns
CL=45pF, RL=667Q INote 2)
Low-ta-high level outpout From inputCC to output A 25 40
t PLH propagation time
ns
From inputOCto outputS 25 40
High-to-Iow-Ievel outpout From input 0 C to output A 30 60
t pHL ns
propagation time From input 0 C to output B 30 50
(1) The pulse generatQr (PG) has the following characteristics:

PR R =: 1MHz. tr =: 6ns, tf =: 6ns, tw =: 500n5,
PG DUT Vp " 3Vp.p. Zo " 50n.
50Q
A, BIINPUT)
BIOUTPUT)
AIOUTPUT)
A, BIOUTPUT)
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS645P
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT (NONINVERTED)

taining 8 bus transmitter/receiver circuits with non-inverted DATA
DIRECTION
outputs. CONTROL
OUTPUT
INPUT
CONTROL
INPUT
FEATURES
data is possible.
output A and output/input B ' INPUTSI
OUTPUTS
• 'High fan-out (IOL = 24mA, IOH = -15mA)
OUTPUTSI
• Wide operating temperature range (T a = -20 - +75°C) INPUTS
APPLICATION
ment.
The inputs and outputs of the buffer circuits with 3-state Outline 20P4
outputs are connected together to form bi-directional
buffers. A device, M74LS645-1P, having the same pin connec-
The input sections of input/output A and output/input tions and functions except the value of IOL (= 48mA) has
B have been designed with hysteresis characteristics for been provided.
increased noise margin. The input/output direction is con-
trolled by DI R.
When DIR is high then A is the input pin and B is the,
output pin. When D I R is low then B is input pin and A is
the output pi n.
When output control input OC is high, both A and B
are put in the high-impedance state so the. buffers are
isolated.
OUTPUT
CONTROL oc o-....+~~--l'
INPUT
rl---t-----w~-----++-+-- ~~F~l~~R
+--+l'----,t--.-~-----1---Q B OUTPUTII N PUT
L-~-~~~~--~--4----~~~~-+_~-~~~-J_oGND
L-_ _ _ _ _ _ _ _~~------_TOOTHER
BUFFERS
UNIT: n
'MITSUBISHI
2-432 "ELECTRIC
MITSUBISHI LSTTLs
M74LS645P
OCTAL BUS TRANSCEIVER WITH 3·STATE OUTPUT (NON INVERTED)
OC DIR A B
L L 0 I
L H I 0
H X Z Z
Notel: I: Input pm
Z: High impedance (A. B separated)
X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta= -20-+7S"C,unless otherwise noted)

VCC Supply voltage -0.5- +7 V
VI Input voltage I A, B -0,5- +5,5 V
I DIR,OC -0,5- + 15 V
Vo Output voltage Off state -0.5- +5,5 V
T opr Operating free-air ambient temperature range -20- +75 "C
TsIg Storage temperature range -65- +150 'C
RECOMMENDED OPERATING CONDITIONS (Ta=-20- +75"C,unless otherwise noted)
Limits
Min Typ Max
Vee Supply voltage 4,75 5 5.25 V
VOH62.4V 0 -3 mA
VOH62V 0 -15 rnA
VOl;5;O.4V 0 12 mA
VOL"; 0,5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75"C, unless otherwise noted)

Limits
Min Typ * .Max
VIL Low-level .input voltage 0,6 V
VT+ -VT- Hysteresis width Vee=4,75V 0,2 0,4 V
Vie Input clamp voltage Vee=4, 75V, Ile= -18mA -1.5 V
Vee=4,75V IOH=-3mA 2,4 3.4 V
VI =0,6V, VI =2V 10H= -15mA 2 V
Vce=4,75V IOL=12mA 0,25 0,4 V
VI=0,6V, V,=2V 10l =24mA 0,35 0.5 V
10ZH Off-state high-level output current Vcc=5,25V, V, =O,6V, V, =2V, Vo=2,7V 20 J.lA
10ZL Off-state low-level output current Vcc=5.25V, V, =0,6V, V, =2V, Vo=0.4V -400 J.lA
A, B 20 J.lA
VCC= 5.25V. V,~2.7V
High-level input DIR,OC 20 J.lA
IIH current
A,B Vec=5.25V, VI =5,5V 0,1 mA
DIR,OC Vee=5,25V, VI =10V 0,1 mA
IlL Low-level input current Vec=5.25V, VI =0,4V -0.4 mA
lOS Short-circuit output current (Note 2) Vec= 5,25V, VO= 0 V -40 -225 mA
leCH Supply current. all outputs high Vee=5.25V, VI = 0 V, VI =4,5V 48 70 mA
leel Supply current. all outpus low Vee=5,25V, V, = 0 V, V, =4,5V 62 90 mA
Icez Supply current. all outputs off Vee=5.25V, V, = OV, V, =4,5V 64 95 mA
*: All typical values are at Vee = 5V. T a = 25°C.
Note 2: All measurements should be done quickly. and not more than one output should be shorted at a time .
• . MITSUBISHI
.... ELECTRIC 2-433
MITSUBISHI LSTTLs
M74LS64SP
OCTAL BUS TRANSCEIVER WITH 3·STATE OUTPUT (NONINVERTED)
SWITCHING CHARACTERISTICS (Vee=5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
t pLH ns
CL=45pF (Note 3)
High-to-Iow level output From input A to output B 12 15
tpHL ns
From input ac to output A 25 40
t PZL Low output enable time ns
RL=667Q • . CL=45pF
tpZH High outputenable time (Note 3) ns
From input ac to output B 23 40
From input ac to output A 17 25
tpLZ Low output disable time ns
RL=667 Q. CL=5pF
From input DC to output A
(Note 3)
19 25
tpHZ High output disable time ns
Frort:l input ac to output B 19 25
INPUT Vee
Parameter SWI SW2
(1) The p':Jlse generator (PG) has the following
t PZH Open Closed characteristics: PR R = 1MHz, tr = 6ns, tf =
6ns. tw = 500ns. Vp = 3Vp_p. Zo = 50n
t PLZ Closed Closed Itrr ~ 4nsl.
50Q Closed Closed
t PHZ
A. B (INPUT) ----.:f- ~
·~----+--..,.----fo .5V
B. A (OUTPUT)
'. , 'o"''""1Jr------W-+-
.....
' '-PH
'. 'O~O"''"~ ~ sv
b:J-iJfo. tPLZ
• MITSUBISHI
2-434 ;"ELECTRIC
MITSUBISHI LSTTLs
M74LS645-1P
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT (NON INVERTED)
DESCRIPTION
DATA
containing a bus transmitters/receivers with non-inverted DIRECTION
CONTROL
Vee
outputs. INPUT OUTPUT
CONTROL
INPUT
FEATURES
• Bi-directional transmission, or separation, of two a-bit
data is possible.
• Hysteresis provided (= 400mV typical) for input/output INPUTS/
OUTPUTS
OUTPUTS!
• High fan-out (IOl = 4amA, IOH = -15mA) INPUTS
APPLICATION
equipment. GND

mutually to 2 circuits and the buffers with 3-state
non-inverted outputs are made two-way buffers.
The input/output A and output/input B input sections \
The input/output direction is controlled by DIR.
output pin. When DIR is low, B is made the input pin and
A the output pin. When DC is high, both A and B are put in
the high-impedance state and A and B are isolated.
OUTPUT
CONTROL OC 0-0+--1".....,
INPUT
> TO OTHER BUFFERS
DATA
g6~\CRT6~N DIR o-rl:----d'H-:l ~-+.I:""""!-?-+----j-o B OUTPUT/INPUT
INPUT
L-+---~~~~---+----1--------+~~~~i-t---~~~--~GND
L - - - - - - - - - - - - - + - _ < l _ - - - - - -...... TO OTHER BUFFERS
UNIT: Q
• MITSUBISHI
;"ELECTRIC 2-435
MITSUBISHI LSTTLs
M74LS645-1P
FUNCTION TABLE .{Notell
OC OIR A B
L L 0 I
L H I 0
H X Z Z
Note': I : Input pin

o : Output (non-inverted output) pin
Z : High impedance (A and B are isolated)
X : Irrelevan t
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75'C, unless otherwise noted)
V, I nput voltage I A, B -0.5- + 5.5 V

DIR,OC -0.5- + 15 V
I
RECOMMENDED OPERATING CONDITIONS(Ta=-20-+75'C, unless otherwise noted)
Limits
Min Typ Max
VOH<:: 2.4V 0 -3 rnA
VOH<:: 2V 0 -15 rnA
VOL~ 0.4V 0 12 rnA
VOL~ 0.5V 0 48 rnA
Limits
Min Typ * Max
V,H H!gh-Ievel input voltage 2 V
V,L Low-I.evel input voltage 0.6 V
VT+ -VT- Hysteresis width Vee=4.75V 0.2 0.4 V
V'c I nput clamp vol tage Vee=4.75V, l,e=-18mA -1.5. V
Vee=4.75V IOH=-3rnA 2.4 3:4 V
V, =0.6V, V, =2V IOH=-15rnA 2 V
IOL=12rnA 0.25 0.4 V
Vee=4.75V
VOL Low-level output voltage 10L =24rnA 0.35 0.5 V
V,=0,6V, V,=2V
10L =48rnA 0.4 0.5 V
IOZH Off-state h!gh-level output current Vee=5.25V, V,=0.6V, V,=2V, Vo=2.7V 20 /.LA
10ZL Off-state low-level output current Vce=5.25V, V,=0.6V, V,=2V, Vo=0.4V -400 /.LA
A,S 20 /.LA
Vce=5.25V. V,=2.7V
DIR,OC 20 /.LA
IIH High-level inpu! current
A,S Vee=5.?5V. V,=5.5V 0.1 rnA
DIR,OC Vee=5.25V. V,=10V 0.1 rnA
I,L LOW-level input current Vce=5.25V. VI=0.4V -0.4 rnA
los Short-circuit output current (Note 2) Vee~5.25V. VO=OV -40 -225 rnA
leeH Supply current, all outputs high Vee-5.25V, V,-OV, V,-4.5V 48 70 rnA
leeL Supply current, all outputs low Vee- 5 25V. V,= OV. VI=4 5V 62 90 rnA
ICCZ Supply current, all outputs off Vee=5.25V, V,=OV, V,=4.5V 64 95 rnA
* . All typical values are at Vcc=5V, Ta=25C
Note 2 All measurements should be done qui~kly, and not more than one output should be shorted at a time.
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS64S-1P
Limits
Min Typ Max
Low-to-high-Ieveloutput From input A to output B 12 15
t pLH ns
CL=45pF (Note 3)
High-ta-Iow level output From input A to outputS 12 15
t pHL ns
Low-level output enable From input OC to output A 25 40
tpz L ns
time From input OC to outputB 25 40
RL=667 Q. CL =45pF (Note 3)
High-level output enable From inputOCtooutputA 23 40
tPZH ns
time From input 00 to output B 23 40
Low-level output disable From inputQe to output A 17 25
tpLz ns
time From inputGe to output B 17 25
R L=667 Q. CL=5pF (Note 3)
High-level outpout disable From input DC to output A 19 25
tpHZ ns
time From input OC to output B 19 25
INPUT Vee
Symbol SW1 SW2
tPZH Open Closed char acteristics;
PRR = lMHz. tr = 6ns. tf = 6ns. tw::= 500ns,
Vp = 3Vp.p, Zo =50!"!.
t PLZ Closed Closed (2) All diodes are switching diodes (t rr ~ 4ns)
50 ~1 (3) CL includes probe and jig capacitance.
t PHZ Closed Closed
J;.SW2
A. B (INPUT) ----.if ~
.r - - - - - f -....--t 0 .5V
,. "oo'"~'----k1r-----1}-+-tP-H"""'\' B. A (OUTPUT)
'. '~:~eo"r~ r bj_ltfo.5V

tPLZ
.• MITSUBISHI
.... ELECTRIC 2-437
MITSUBISHI LSTTLs
M74LS668P
DESCRIPTION
containing a synchronous decade counter function with an
up/down control input and preset input.
UP/DOWN _
CONTROL UfD ~ Vee
INPUT
FEATURES CLOCK INPUT T ~ 2
CARRY
OUTPUT
• Fully synchronous operation for counting and program-
14
l
DA~
ming 3
~QA)
• Integral look·ahead for counting DB~ ~QB
• Carry output for n bit cascading DATA OUTPUTS
INPUTS
Do~ ~Qo
• Fully independent clock circuit
• Up/down control input provided Do~ -> Qo
• Preset input provided COUNT _ COUNT
ENABLE Ep~ 7 ENABLE
INPUT INPUT
APPLICATION GND LOAD
General purpose, for use in industrial and consumer equip· INPUT
ment
FUNCTIONAL DESCRIPTION Outline 16 P 4

This device operates with the preset, up/down control
and enable function synchronized to the rising edge of the U/O is high·level, and decrements (down) at low·level.
clock pulse. Carry output (RCO) goes low-level (active) at 9 2 during
Data is also acquisitioned from outputs QA thru Q o on up counting operations and at O2 while the count is going
the rising edge of clock input T, synchronized with (and in down. The synchronous feature of the counter permits it
response to) data input at DA thru Do; and occurs after to be cascaded for use as a decade counter. (See the applica-
preset is initiated by dropping load input (LOAD) to a tion example provided in the back of this specification
low·level. sheet.)
Up/down counter operations are initiated when LOAD is Counter operations are inhibited when LOAD and (Ep
high·level, and the count enable input (E p and ET ) is low· or ET ) are all high·level.
level. The counter increments (up) when control input

~------~-----~
OUTPUT
QB Qo Qo RCO Voo
1
I
T
7
UfO LOAD EPETDA
10
DB
3
Do Do
jGND
CLOCK UP/DOWN LOAD ~T'~------~ ------~
INPUT CONTROL INPUT ENABLE DATA INPUTS
INPUT INPUT
• MITSUBISHI
2-438 "ELECTRIC
MITSUBISHI LSTTLs
M74LS668P
LOAD Ep ET U/D T QA QB 1
Qc 1 Qo RCO*
1
L X X X i DA 1
DB 1
DC I Do H
H L L H i COUNT UP H
H L L L i COUNT DOWN H
H H X X X
COUNT INHIBIT H
H X H X X
Note 1. Transition from low to high

X Irrelevant
* RCO is normally at high·level, however, when ET
is low and the counter is incrementing, QA is high-
level, Os is center-level. Oc is low-level. and 00 is high-level, and RCO will go low-level. Also, when the
counter is decrementing, GA. Os. Oc and 00 will be low, and RCO will also be low.
RCa = QA" QO"(U/D) "ET

RCa =QA" OB" QC" GO" (U/D)" E T
TIMING DIAGRAM
i
L
i
L
i
L
Do
---j-I
UfO
,,
I
----+---i
nl
- ___ , I I .....
1
QB ___ ..J
,
I
I
1-_ _ _ _ _--'"1 '1
,
' -_ _ _ _ _ ---1'r--
Qc
----~'
___ j:!: 'r--
: ': ,
Qo :::~ ~______~:______~~-------J ~
: " I
----, ,I Ljr-----+:---..:.....-l...----OLj
RCa
___ .J I I '
: 7 : I 2, 2 2 0 8
W I. ~I.
LOAD COUNT UP INHIBIT COUNT DOWN
(1) (2) (3) (4)
Timing diagram not8S:

(1) Preset at 7
(2) Increment at 8, 9, 0,1,2
(3) Count inhibit
14) Decrement at 1. D. 9. 8. 7
• MITSUBISHI
"ELECTRIC 2-439
MITSUBISHI LSTTLs
M74LS668P

Vi I nput voltage' -0.5-+15 V
Limits
Min Typ Max

IOH Hjgh-Ievel output current VOH"'2.7V 0 -400' ,."A
VOL$0.4V 0 4 mA
VOL~0.5V 0 8 mA
ELECTRICAL CHARACTERISTICS (Ta= -20- +75·C. unless otherwise noted)
Limits
Min Typ Max

V,e Input clamp voltage Vee=4.75V.I,e=-18mA -1.5 V
Vee=4. 75V. V,=O .8V
V,=2V. iOH=-400,."A

Vee=4.75V I IOL=4mA 0.25 0.4 V
IOL ~8mA 0.35 0.5 V
V,=0.8V. V,=2V I
DA.Ds.De.Do,Ep,U/D 20
T.ET Vee=5 .25V, V,=2. 7V 20 ,."A
High-level input LOAD 40
"H current
DA,Ds,De,Do,Ep,U/D 0.1
T,ET Vee=5.25V, V,=10V
"
0.1 mA
LOAD 0.2
DA,Ds,De,Do,Ep,U/D -0.4
Low-level input
"L T.ET Vee=5 .25V, V,=0.4V -0.4 mA
current
LOAD -0.8
los Short-circuit output current (Note 2) Vee=5.25V, Vo=OV -20 -100 mA
* . All typical values are at Vcc = 5V, T a = 25 C.
0
3. IcC is measured after applying a-momentary 4.5V, then ground, to clock input with other inputs grounded and the outputs open.
• MITSUBISHI
2-440 "ELECTRIC
MITSUBISHI LSTTLs
M74LS668P
SWITCHING CHARACTERISTICS (Vcc=SV, Ta=2S'C, unlessotherwisenoted)
Limits
Min Typ Max

IpLH Low-to-high-Ievet, high-to-Iow-Ievel output,propagation 24 40
time, from input T to output RCO ns
IpHL 30 60
IpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 18 27

ns
time, from input T to outputs GA. Os. Ge. and Go
IpHL CL=15pF (Note 41 15 27
IpLH Low-to-high-Ievel. high-to-Iow-Ievel output propagation 10 17

ns
IpHL
time, from input ET to output RCO 24 45
I PLH Low-to-high-leveJ, high-to-Iow-Ievel output propagation 20 35

ns
time, from input UfO to output RCO 40
I PHL 20
TIMING REQUIREMENTS <Vcc=5V. Ta=25·C. unlessotherwisenoted)
Limits
Min Typ Max
Iw Clock T pulsewidth 25 10 ns
Isu (D) Setup time DA ....... OO to T 20 18 ns
Isu ([) Setup time ET. Ep to T 35 26 ns
Isu (LOAD Setup time LOAD to T 25 15 ns
I su WID) Setup time UfO to T 30 20 ns

Ih Setup time of all inputs to T 0 -15 ns
INPUT Vcc OUTPUT
PG OUT
(1) The purse generator (PG) has the following
= 1MHz, tr = 6ns. tf = 6ns,
characteristics: PR R
50Q tw = 500ns, Vp = 3Vp.p, Zo = 50n.
6MITSUBISHI
"ELECTRIC 2-441
MITSUBISHI LSTTLs
M74LS668P

twIT) twIT)
OB
Qc
00
tw (T) tw (T)
Isu (D) Ih (D)
Ep or ET
UfD
-;
\1\
~--------------------~
• MITSUBISHI
2-442 ~ELECTRIC
MITSUBISHI LSTTLs
M74LS668P
APPLICATION EXAMPLE
10" counter with cascade connection
TO
ENABLE M74LS668P RCOp---aET M74LS668P RCOP------<-l RCO FOLLOWING
INPUT STAGE
T T T
H H H
TO
COUNTER ____4 - - - - - - - - - - - - - - + - -_ _ _ _ _ _ _ _~-----_ _ _ _ FOLLOWING
PULSE STAGE
• MITSUBISHI
"'ELECTRIC 2-443
MITSUBISHI LSTTLs
M74LS669P
DESCRIPTION
containing a synchronous 4-bit binary counter function
with an up/down control input and preset input_
I
~6Wr~~~ UfO':'" 1 Vee
INPUT
FEATURES CLOCK INPUT T-+ 2 -+ROO
CARRY
0L!TPUT
• Fully synchronous operation for counting and pro-
gramming -+QA
• Integral look-ahead for counting

• Carry output for n bit cascading OATA
INPUTS OUTPUTS
• Fully independent clock circuit -+Qe
• Up/down control input provided

• Preset input provided COUNT COUNT
ENABLE +---ET ENABLE
INPUT INPUT
APPLICATION GND 9 +-LOAD LOAD
General purpose, for use in industrial and consumer equip- INPUT
ment
FUNCTIONAL DESCRIPTION Outline 16 P4

This device operates with the preset, up/down control
and enable function synchronized to the rising edge of the level. The counter increments (up) when control input U/O
clock pulse. is high-level, and decrements (down) at low-level.
Data is acquisitioned from outputs QA thru Q o on the Carry output (RCO) goes low~evel (active) at 152 during
rising edge of cl.ock input ,T, synchronized with (and in up operations, and at 02 while the count is going down.
response to) data input at DA thru Do; and occurs after The synchronous feature of the counter permits it to be
preset is initiated by dropping load input (LOAD) to a cascaded for use as a binary counter. (See the application
low-level. example given for M74LS66BP.)
Up/down counter operations are initiated when LOAD is Counter operations are inhibited when LOAD and (Ep
high-level, and the count enable input (Ep and ET ) is low- or ET ) are all high-level.

__________ ____________
~ ~A~ ~
OUTPUT
QB Qe Qo ROO Vee
T DB De GND
CLOCK UP/DOWN LOAD
INPUT CONTROL INPUT DATA INPUTS
INPUT
• MITSUBISHI
2-444 .... ELECTRIC
MITSUBISHI LSTTLs
M74L$669P
LOAD Ep ET U/D T QA I Qs I Qc I Qo RCa·

.L x X x t DA I Os I Dc I Do H
H L L H t COUNT UP H
H L L L t COUNT DOWN H
H H X X X
COUNT INHIBIT H
H X H X X
Note 1. t Transition from low to high
X : Irrelevant
*:Rm is normally at high·level. however. when ET is low and the counter is incrementing, GA. as, Qc and aD will be high, and RCO· will be low.
Also, when the counter is decrementing, GA. 0e. 9c and aD will be low, and RCO will also be low.
RCa = QA'QB'Qc'Qo'(U/D)' ET
RCO=QA'QS'QC'Qo(U/El)' ET
TIMING DIAGRAM
~
I 1.---------------------------------
~ I~ _____
I . - - - - - - - - - - - - - - - - -_- - - - - - - - -
Os I~------------------------------
----11..,'-
I
- - - - - - - - - - - - - - - - - - - - - - - -- ----
DC I I i--------~---------------------
~ II~---------------~--------------
Do
I 1.-·---- .... -------------------------
~ II~-----------------------------
T I
U/O - i
_.J
(ET or Ep)
-,~-+~--------~
--~
I
I
I,
,,
I i------, I
Qs
--H
--,
L -_ _-""
I
I
II
Qc I
__ .J
II
III
I
I
I
I
I I I I
---I II I I
Qo __ .J
-- I
I II
II
II
I
I
I
I
I
I
I
RCO
---4 II LJ I I
I
L-I
I 13 I I 14 15 2 12 1 0 15 14
I II I I
I II I I
I
~
I~IE--------~--~
.. I IE
LOAD COUNT UP INHIBIT COUNT DOWN
(1) (2) (3) (4)
Timing diagram'notes:
(I) Preset at 13
(2) Increment at 14, 15.0, 1.2
(3) Count inhibit
(4) Decrement at 1. O. 15. 14, 13
• MITSUBISHI
;"ELECTRIC . 2-445
MITSUBISHI LSTTLs
M74LS669P

V, I nput voltage ...,0.5-+15 V
Limits
Symbol Parameter \
Unit
Min Typ Max

IOH High-level output current VOH:;;;;2.7V 0 -400 "A
VOL';;O .4V 0 4 rnA
VOL';;0.5V 0 8 mA
Limits
Min Typ Max

V,e I nput clamp voltage Vee=4. 75V, I,e= -18mA -1.5 V
Vee=4.75V, V,=0.8V
V,=2V,loH=-400"A

Vee=4.75V I IOL=4mA 0.25 0.4 V
V,=0.8V, V,=2V I IOL=8mA 0.35 0.5 V
~
DA,Ds,De,Do,Ep,U/D 20
T,ET Vee=5.25V, V,=2.7V 20 "A
High-level input LOAD 40
"H current DA,Ds,De,Do,Ep,U/D 0.1
T,ET Vee=5.25V, V,=10V 0.1 rnA
LOAD 0.2
DA,Ds,De,Do,Ep,U/D -0.4
Low-level input
"L T,ET Vee=5.25V, V,=O.4V -0.4 mA
current
LOAD -0.8
los Short-circuit output current (Note 2) Vee=5 .25V, VO=OV -20 -100 mA
IcC Supply current Veo=5.25V INote 3) , 20 34 mA
\late 2. All measurements should be done Quickly, and not more than one output should be shorted at a time.
3. ICC is measured after applying a momentary 4.5V, then ground, to the clock input with 'all other inputs grounded.
•. MITSUBISHI
2-446 "ELECTRIC
MITSUBISHI LSTTLs
M74LS669P
SWITCHING CHARACTERISTICS (Vcc=5V. Ta=25"C. unlessotherwisenoted)
Limits
Min Typ Max
tpLH Low-to-high-Ievel. high-to-Iow-Ievel output 24 40
ns
propagation time, from input T to output RCO 32 60
tpHL
tpLH Low-to-high-Ievel, high-to-low-Ievel output propagation 20 27
ns
t pHL time, from input T to outputs QA. 0B. Ge. and aD OL=15pF INote4) 15 27
tpLH Low-to-high·level. high-to-Iow-Ievel output 10 17

ns
tpHL propagation time, from input ET to output RCO 28 45
tpLH Low-to-high-level. high-to-Iow-Ievel output propagation 25 35

ns
tpHL
time, from input U/O to output RCO 20 40
TIMING REQUIREMENTS (Vcc=5V. Ta=25"C. unless otherwise noted)
Limits
Min Typ Max
tw Clock T pulse width 25 12 ns
tsu (D) Setup time DA .... OO to T 20 18 ns
tsu (E) Setup time ET, Ep to T 35 26' ns
tsu (LOAiJ Setup time LOAD to T 25 15 ns
tsu (u/B) Setup time u/D to T 30 20 ns
th Setup time of all inputs to T 0 -15 ns

/
INPUT Vee OUTPUT
F?G OUT
111 The pulse generator IPG) has the following
characteristics: PRR = lMHz, tr = 6ns. tf = 6ns,
tw = 500ns, Vp = 3Vp-p. Zo = 50n.
50Q
• MITSUBISHI
.... ELECTRIC 2-447
MITSUBISHI LSTTLs
M74LS669P

twIT) twIT)
Q8
Qc
QD
tPHL
RCO
twIT)' twIT)
tsu ILOAD) th (COAD)

LOAD
tsu (0) th (0)
DA-DD
tsu (E)
Eper ET
UfO
~
1\ }
tpHL tpLH
,1\ )
1/
• MITSUBISHI
2-448 "ELECTRIC
MITSUBISHI LSTTLs
M74LS670P
4-BY -4 REGISTER FILE WITH 3-STATE OUTPUTS
DESCRIPTION
The M74LS670P' is a semiconductor integrated circuit
containing a 4 word x 4 bit register file circuit with 3-state
outputs_
Vee
FEATURES DATA
INPUTS <- Do DATA INPUT
• Since read address and write address are independent,
simultaneous writing and reading of data is possible_ 14 <- WA 1WRITE
ADDRESS
• Provided with read enable input and output control READ
ADDRESS
1RB ..... 4
<- We INPUTS
inputs WRITE
INPUTS RA ..... ENABLE
INPUT
• Stqrage capacity can be easily expanded with the aid of OUTPUT
CONTROL
the enable input_ INPUT
• ANO-tie may be used (With 3-state output)
..... Qo 1OUTPUTS
Wide operating temperature range ITa = -20 ~ +75°C)
OND 9 ..... Ql
APPLICATION
equipment_ Outline 16P4
FUNCTIONAL DESCRIPTION Writing Method

16 flip-flops are used as storage devices, and a discrete By designating a word using write address inputs WA and
enable input, address input, and output controlling input WB and applying data to the data inputs 0 , 1 , 2 , °°°
are provided for reading and writing. Accordingly, during °
and 3 , writing into each bit is performed_ For writing
writing, the contents of other words can be read, and the write enable input Ew is held low (Writing will not
during reading, other words can be written, thereby be performed ~f Ew is high)
enhansing to high-speed operation. Readout Method
The 3-state output permits 128-output AN O-tie even in the When a word is designated by read address inputs RA
worst condition_ Expansion of up to 512 words is possible. and R B, the contents of each bit appear in the outputs
possible. Qo, Ql, Q2, and Q3. For reading the output control
input OC is held low_ (when OC is high, all the outputs
are in the high-impedance state).
OUTPUTS
BLOCK DIAGRAM
OUTPUT CONTROL.: INPUT OC llr-""""t;:lC}---,
WORD 3
WORD 2
WORD 1
,WORD 0
WRITE ENABLE INPUT
, Do ,
DATA INPUTS
-J OND
• MITSUBISHI
"'ELECTRIC 2-449
MITSUBISHI LSTTLs
M74LS670P
4·BY·4 REGISTER FILE WITH 3·STATE OUTPUTS
Writing Method Readout Method
-Ew Word RA Rs OC Qo Q, Q2 Q3
WA Ws Z
0 1 2 3 X X H Z Z Z
X X H QO QO QO QO L L L WoBo WoB, WOB2 WOB3
L L L Q=D QO QO QO H L L W,Bo W,B, W,B2 W,B3
H L L QO Q=D QO QO L H L W2 BO W2 B, W2B2 W2 B3
L H L QO QO Q=D QO H H L W3 BO W3 B, W3 B2 W3 B3
H H L QO QO QO Q=[) Note 1: QO : The level of Q before the indicated steady-state input conditions were
established.
Q= 0 : The four selected internal latch outputs will assume the states applied
to the four external data inputs.
W XBy: The Yth bit of word X. X: irrelevant Z: high-impedance
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75'C, )

Vo Output voltage Off-state -0.5- + 5.5 V
RECOMMENDED OPERATING CONDITIONS (Ta= -20- + 75'C • unless otherwise noted)
Limits
Min Typ Max
10H High·level output current VOH~2.4V 0 -2.6 mA
VOL~0.4V 0 4 mA
VOL~O .5V 0 8 mA
ELECTRICAL CHARACTERISTICS na= -20- +70'C, unless otherwise noted)
Limits
Min Typ* Max
VIL Low-level input voltag~ 0.8 V
VIC Input clamp voltage Vcc=4. 75V. Ilc= -18mA -1.5 V
V CC=4.75V. VI=0.8V
VI=2V.IOH=-2.6mA

Vee=4.75V I IOL=4mA 0.25 0.4 V
VI=0.8V. VI=2V I IOL=8mA 0.35 0.5 V
10ZH Off·state high-level output current Vce=5.25V, VI=2V. VI=2.7V 20 pA
IOZL Off-state low-level output current Vce=5.25V. VI=2V. VI=0.4V -20 pA
EW 40
OC VCC=5.25V. VI=2.7V 60 pA
Other input 20
Ew 0.2
OC Vee=5 .25V. VI= 10V 0.3 mA
Other input 0.1
Ew -0.8
IlL Low-level input current OC Vee=5 .2SV. VI=0.4V -1.2 mA
Other input -0.4
los Short-circuit output current (Note 2) VCC-5.25V. Vo-OV -30 -130 mA
Icc Supply current Vcc=5.25V (Note 31 30 50 mA
*. All tYPical values are at Vee = 5V, Ta = 25°C.
3: Icc is measured with WA, We, RAt RB inputs grounded and Do '" 0 3 , EW, OC inputs at 4.5V.
• MITSUBISH.I
2-450 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS670P
4-BY-4 REGISTER FILE WITH 3-STATE OUTPUTS
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25·C, unless otherwise noted)
Limits
Min Typ Max
IpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation 11 40 ns
IpHL time, from input RA. RB to output QO. Q1. Q2. 03 14 45 ns
IpLH Low-to-high-Ievel, high-tcrlow-Ievel output propagation 11 45 ns
CL= 15pF (Note 41
IpHL time,. from input Ew to output 00, 01, 02, 03 16 50 ns
IpLH Low-to-high-Ievel, high-to-Iow-Ievel output propagation time, 9 45 ns
IpHL from input Do, 01, 02, 03 to output 00, 01, 02, 03 14 40 ns
IpZH Output enable time to high-level RL=2kQ, CL-15pF (Note 41 6 35 ns
IpZL Output enable time to low-level RL=2kQ, CL-15pF INote 41 10 40 ns
IpHZ Output disable time from high-level RL=2kQ, CL- 5pF (Nole 41 16 50 ns
IpLZ Output disable time from low-level RL=2kQ, CL= 5pF (Note 41 7 35 ns
INPUT Vee
Symbol SWI SW2
I PZH Open Closed (1) The pulse generator (PG) has the following
characteristics:
PG OUT I PZL Closed Open
PRR = 1 MHz, tr = 6ns, tf = 6ns. tw = 500ns.
I PLZ Closed Closed Vp = 3Vp,p, Zo = son
50Q (2) All diodes are switching diodes (trr ~ 4nsl
I PHZ Closed Closed (3) CL includes probe and jig capacitance.
J;.SW2
Limits
Min Typ Max
IW(Ew) Write enable input E w pulse width 25 9 ns
tW(OC) Output control input OC pulse width 25 9 ns
Isu(o) Setup time OO~03 to Ew 10 5 ns
Isu(w) Setup time WA. Ws to Ew 15 -2 ns
Ih (D) Hold time 00-03 to Ew 15 1 ns
th (w) Hold time WA. Ws to E w 5 0 ns
I la tch Latch time for new date (Note 5) 25 5 ns
Note 5. Latch time IS the time allowed for the Internal output of the latch to assume the state of new data.
TIMING DIAGRAM (Reference level = 1,3V) WA, Ws
00- 0 3
EW
00 -03
RA , Rs
===t------F u
DC
W
IpLZ
RA, Rs
00 -03
Q' -Q,
r-----
00 -03
• MITSUBISHI
;"ELECTRIC 2-451
MITSUBISHI LSTTLs
M74LS682P
a-BIT MAGNITUDE COMPARATOR
DESCRIPTION
taining two 8-bit words comparator functions.
OUTPUT Op>o- Vee
FEATURES
Po- -Op=o OUTPUT
• Hysteresis at inputs (width = 400mV typical)
• Internal 24kU pull-up resistors on the 0 inputs 00- -.07
• Active pull-up outputs Pl- -P7

COMPA
• Wide operating temperature range (Ta = -20 - +75°C) RATOR 01-+
INPUTS
P2_ COMPA
APPLICATION RATOR
02- INPUTS
P3-
ment.
03-
FUNCTIONAL DESCRIPTION GND
Two eight-bit binary or BCD words are applied at inputs
Po - P7 and 0 0 - 0 7 • The results as shown in Function
Table are expressed at outputs Op>oand Op=o. Outline 20P4
00 -07 have internal pull-up resistors (=24kU), so that
misoperation due to noise is reduced on condition that
0 0 -07 are open. 8-BIT MAGNITUDE COMPARATORS TABLE
Beside the IC, there are eight-bit digital comparators
Type Inputs Outputs
varying input/output formats. They are shown in the table.
The detailed information are shown in individual catalogue.
designation a 24kll pull-up E Op=o OP>O Format
An example of the extention bits is shown in the appli- M74LS682P Ves No Ves Ves Active pull-up
cation.' M74LS683P Ves No Ves Ves Open collector

M74LS684P No No Ves Ves Active pull-up
M74LS685P No No Ves Ves Open collector
M74LS688P No Ves Yes, No' Active pull-up
M74LS689P No Ves Ves No Open collector
BLOCK DIAGRAM
OUTPUTS
r~---------------A~------------~
Op=o
__________________________ ~GND
COMPARATOR INPUTS
• MITSUBISHI
2-452 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS682P
FUNCTION TABLE
P, Q Op~o Op>o
P=Q L H
P>Q H L
P<Q H H
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C. unless otherwise noted)

Symbol Parameter Conditipns Limits Unit

Inputs P -0.5-+15 V
VI Input voltage
[nputsO -0.S-Vee+0.5 V
Va Output voltage High-level state -O.s-Vee V
Tst9 Storage temperature range -65-+150 'C
Limits
Min Typ Max
10H High-level output current VOH~2.7V 0 -400 pA
VOL";0.4V 0 12 mA
VOL";0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75'C. unless otherwise noted)

Limits
Min Typ * Max
VT+-VT- Hysteresis width Vee=4.75V 0.4 V
VIC Input clamp voltage Vee=4.75V, Ilc=-18mA -1.5 V
VOH High-level output voltage VcC~4.75V, VI ~2V. VI ~O.8V,loH~ -400pA 2.7 V
Vce-4.75V 0.25 0.4 V
VOL Low-level output voltage VI =2V I IOL=12mA
VI =0.8V I iOL=24mA 0.35 0.5 V
P, Q Vee=5.25V, VI=2.7V 20 pA
IIH High-level input current P Vee=5.25V, VI=10V
0.1 mA
Q Vee=5.25V, VI=5.5V
P -0.2 mA
IlL Low-level input current Vee=5.25V, VI=0.4V
Q -0.4 mA
los Short·circuit output current (Note 11 Vcc=5.2SV, VO=OV -20 -100 mA
ICC Supply current Vee=S.25V {Note 21 42 70 mA
*: All typical values are at VCC = 5V, Ta = 25°C.

2: ICC is measured with all inputs at value of 4.5V.
• MITSUBISHI
.... ELECTRIC 2-453
MITSUBISHI LSTTLs
M74LS682P
SWITCHING CHARACTERISTICS eVee=5V, Ta=25"C, unless otherwise noted)
Limits
Min Typ Max
tPLH Low-ta-high level, high-ta-Iow level output 13 30
ns
tpHL propagation time from inputs P to output 0P=Q 16 30
tpLH Low-ta-high level, high-ta-low level output 12 30
ns
tPHL propagation time from inputs Q to output OP=Q 17 30
CL=45pF INote 31
tPLH Low-ta-high level, high-ta-Iow level output All other input pins in low-state
24 30
ns
tpHL propagation time from inputs P to output OP>Q 21 30
ns
tPHL propagation time from inputs Q to output 0P>Q 27 30
INPUT Vee OUTPUT
PG DUT
50Q
(1 J The"pulse generator (PG) has the following characteristics:,

PRR = 1MHz, tr = 6ns, tf =6ns, tw = 500ns, Vp = 3Vp_p,
Zo = son
• MITSUBISHI
2-454 ...... ELECTRIC
MITSUBISHI LSTTLs
M74LS682P
APPLICATION EXAMPLE
Example of 15-bit comparator
I /4M 74LSOOP
M 74LS682P M 74LS682P
• MITSUBISHI
.... ELECTRIC 2-455
MITSUBISHI LSTTLs
M74LS683P
a·BIT MAGNITUDE COMPARATOR WITH OPEN COLLECTOR OUTPUT
DESCRIPITON PIN CONFIGURATION (TOP VIEW)

taining two 8-bit words comparator functions with 'open
collector outputs. OUTPUT Op>o- Vee
Po- -Op=o OUTPUT
FEATURES
• Hysteresis at inputs (width = 400mV typical) 00- -07
• Internal 24kU pull-up resistors on the 0 inputs Pl- -P7
COMPA
• Open collector outputs RATOR 01-
• Wide operating temperature range (Ta = -20~ +7So C) INPUTS
P2_ COMPA
RATOR
02- -05 INPUTS
APPLICATION
General purpose, for use in industrial and consumer equip- P3-
ment. 03-
GND
Two eight-bit binary or BCD words are applied at inputs *: OPEN COLLECTOR OUTPUTS
Po ~P, and 0 0 ~ 0,. The results as shown in Function
Outline 20P4
Table are expressed at outputs Op>o and Op=o.
0 0 ~ 0 7 have internal pull-up resistors (=24kU), so that
misoperation due to noise is reduced on condition that 8-BIT MAGNITUDE COMPARATORS TABLE
0 0 ~07 are open. Inputs Outputs
Type
Beside this IC, there are eight-bit digital comparators d6::ignation Q 24kn pull-up E Op=o Op>O Format
varying input/output formats. They are shown in the
M74LS682P Ves No Ves Ves Active pull-up
table. The detailed information are shown in individual
M74LS683P Ves No Ves Ves Open collector
catalogue.
An example of the extention bits is shown in the appli- M74LS684P No No Ves Ves Active pull-up
cation of M74LS682P. M74LS685P No No Ves Ves Open collector

M74LS688P No Ves Ves No Active pull-up

~ ____________ ~A~~ ____________ ~
--------..J GND
COMPARATOR INPUTS * : OPEN COLLECTOR OUTPUTS
• MITSUBISHI
2-456 .... ELECTRIC
MITSUBISHI LSTTLs
M74LS683P
a-BIT MAGNITUDE COMPARATOR WITH OPEN COLLECTOR OUTPUT
FUNCTION TABLE
P, 0 Op=o Op>o
p=o L H
P>O H L
P<O H H
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75"C.unlessotherwisenoted)

Inputs P -0.5-+15 V
VI I "put voltage
Inputs Q -0.5-Vee+0.5 V
Limits
Min Typ Max
IOH High-level output current Vo=S.5V 0 100 /loA
VOL:;>0.41! 0 12 mA
VOL:;>0.5V 0 24 rnA

Limits
Min Typ* Max
Vie I "put clamp voltage Vee=4.75V, Ile=-18mA -1.5 V
IOH High-level output current VCC=4.75V, VI =2V, VI =0.8V, Vo=5.5V 100 /loA
Vee-4.75V IOL=12mA 0.25 0.4 V
VOL Low-IE:!Vel output voltage VI=2V I
VI=0.8V l'OL=24mA 0.35 0.5 V
P, 0 Vee=S.25V, VI=2.7V 20 /loA
IIH High-level input current P Vee=5.2SV, VI=10V
0.1 rnA
0 Vee=S.2SV, VI=S.SV
P -0.2 rnA
IlL Low-iaval input current Vee=5.25V, VI=0.4V
0 -0.4 rnA
*: All typical values are at Vee =5V. Ta =25°e.
Note 1: ICC is measured with all inputs at value of 4.5V.
• MITSUBISHI
~ELECTRIC 2-457
MITSUBISHI LSTTLs
M74LS683P
Limits
Min Typ Max
tpLH Low-ta-high level, high-ta-Iow level output 23 45
ns
propagation time from inputs P to output 0P=Q 20 30
tpHL

ns
propagation time from inputs Q to output 0P=Q 20 35
tPHL
RL=667Q, CL=45pF (Note 2)
All other input pins in low-state.
ns
tpHL propagation time from inputs P to output Op>O 22 30
tpLH Low-ta-high level high-to-low level output 28 45

ns
propagation time from inputs Q to output Op>O 26 30
tPHL
PG OUT
50Q

characteristics: PR R = 1MHz, tr = 6ns, tf =
6ns, tw = 500ns, Vp = 3Vp.p, Zo e 50n
• MITSUBISHI
2-458 "ELECTRIC
MITSUBISHI LSTTLs
M74LS684P
DESCRIPTION
taining two 8-bit words comparator functions_
OUTPUT Op>o - - Vee
FEATURES
po--;>
• Hysteresis at inputs (width =400mV typical) -OP=Q OUTPUT
• Active pull-up outputs. 00- -07

• Wide operating temperature range (Ta = -20 ~ +75°C) P1- -P7
COMPA
RATOR 01--;>
APPLICATION 1NPUTS
P2~ COMPA
General purpose, for use in industrial and consumer equip- RATOR
02- -05 INPUTS
ment.
P3~ -P5
FUNCTIONAL DESCRIPTION 03-

Two eight-bit binary or BCD words are applied at inputs GND -Po
Po ~ P7 and Q o ~ Q7. The results as shown in Function
Table are expressed at outputs OP>Q and 0P=Q.
Note that this IC, in comparison to M74LS682P, does
Outline 20P4
not have internal pull-up resistors on its inputs Q o ~ Q7.
Beside this IC, there are eight-bit digital comparators
8-BIT MAGNITUDE COMPARATORS TABLE
An example of the extention bits is shown in the appli- Type Inputs Outputs
cation of M74LS682P. designation 24kn pull-up E

Q Op=o Op>O Format
M74LS6B2P Ves No Ves Ves Active pull-up
M74LS6B3P Ves No Ves Ves Open collector
M74LS6B4P No No Ves Ves Active pull-up
M74LS6B5P No No Ves Ves Open collector

M74LS6BBP No Ves Ves No Active pull-up
M74LS6B9P No Ves Ves No Open collector
. BLOCK DIAGRAM
OUTPUTS
rr--------------A~---------------
QP=Q
------- --@ GND

I
COMPARATOR INPUTS
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS684P
FUNCTION TABLE
P, 0 Op=o Op>o
p=o L H
p>o H L
p<o H H
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C. unless otherwise noteo)


V, I nput vol tage -0.5-+15 V
Topr 'Operating free-air ambient temperature range -20-+75 "C
Limits
Min Typ Max
10H High-level output current VOH'i?;;2.7V 0 -400 pA
VOL"'0.4V 0 12 mA
VOL"'0.5V 0 24 mA
ELECTRICAL CHARACTERISTICS (Ta=-20- +75"C. unless otherwise noteo)

Limits
Min Typ * Max
V'C I nput clamp voltage Vee=4.75V, l,e=-18mA -1.5 V
VOH High-level output voltage Vec=4.75V, V, =2V, V, =O.BV,loH= -400pA 2.7 V
Vec=4.75V IOL=12mA 0.25 0.4 V·
VOL Low-level output voltage V, =2V I
V, =0.8V I IOL=24mA 0.35 0.5 V
Vcc=S.25V, V,=2.7V 20 pA
Vce=5.2SV, V,=10V 0.1 mA
I,L Low-level input current VCC=5.25V, V,=0.4V -0.2 mA
lOS Short-circuit output current (Note 1) VCC=5.25V, VO=OV -20 -100 mA
ICC Supply current Vcc=5.2SV INote21 40 65 rnA
*': All typical values are at Vee = 5V, T a = 25°e.
2: lee is measured with all inputs at value of 4.5V.
SWITCHING CHARACTERISTICS (Vcc=5V, Ta=25'C. unless otherwise noted)
Limits
. Symbol Parameter Test conditions Unit
Min Typ Max
tPLH Low-to-high level, high-to-Iow level output 13 30
ns
tpHL propagation time from inputs, P to output 0P=Q 16 30
tpLH Low-to-high level. high-to-Iow level output 12 30
ns
tPHL propagation time from inputs 0 to output 0P=Q 17 30
CL =45pF INote 3)
tpLH Low-to-high level, high-to-Iow level output All other, input pins in low·state
24 30
ns
tPHL propagation time from inputs P to output Op>O 21 30
tPLH Low-to·high level, high-to-Iow level-output 26 30
propagation time from inputs 0 to output OP>Q
ns
tpHL 27 30
• MITSUBISHI
MITSUBISHI LSTTLs
M74LS684P
INPUT Vee OUTPUT
OUT
SOQ
(1) The pulse generator (PGI has the foilowing

c,haracteristics: PAR = lMHz, tr = 6ns, tf =
6ns, tw = SOOns, Vp = 3Vp_p, Zo = 50n
•.. MITSUBISHI
.... ELECTRIC 2-461
MITSUBISHI·LSTTLs
M74LS68SP
DESCRIPTION
.PIN CONFIGURATION (TOP VIEW)
taining two 8-bit words comparator functions with open
collector outputs_
OUTPUT Op>o- Vee
FEATURES Po-+ -Op=o OUTPUT
• Hysteresis at inputs (width = 400mW typical) 00- -07

• Open collector outputs Pl- -P7
• Wide operating temperature range (Ta = -20 - +75°C) COMPA
RATOR 01-
INPUTS
P2_ -P6 COMPA
APPLICATION RATOR
02- -05 INPUTS
General purpose, for use in for industrial and consumer
equipment_ P3--
03-
FUNCTIONAL DESCRIPTION GND
The eight-bit binary or BCD words are applied at inputs
Po - P 7 and Q o - Q 7 _ The results as shown in Function
Table are expressed at outputs OP>Q and 0P=Q.
* : OPEN COLLECTOR OUTPUTS
Note that this IC, in comparison to M74LS683P, does Outline 20P4 .
not have internal pull-up resistors on its inputs Q o - Q7'
8·BIT MAGNITUDE COMPARATORS TABLE
Type InpLits Outputs
designation Q 24kn pull·up E OP=O Op>O Format
An example of the extention bits is shown in the appli-
cation of M74LS682P. M74LS682P Yes No Ves Yes Active pull-up
M74LS683P Yes No Ves Yes Open collector
M74LS684P No No Yes Yes Active pull-up
M74LS685P No No Yes Yes Open collector

M74LS688P No Yes Yes No Active pull-up
M74LS689P No Ves Yes No Open collector,
BLOCK DIAGRAM
OUTPUTS
__- -__________ ~A~ _______________,
Op>o
_______ ~ GND
COMPARATOR INPUTS
•.. MITSUBISHI
2-462 ;"'ELECTRIC
MITSUBISHI LSTTLs
M74LS685P
FUNCTION TABLE
P, 0 Op=o Op>o
p=o L H
p>o H L
p<o H H
ABSOLUTE MAXIMUM RATINGS (Ta=-20- +75'C, unless otherwise noted)

Vo Output voltage Hjgh~level state -0.5- +7 V
Topr Operating free·air ambient temperature range -20- +75 'C
Limits
Min Typ Max
IOH High-level output current VO=5.5V 0 100 I'A

VOL",0.4V a 12 rnA
IOL
VOL;£0.5V a 24 rnA
Limits
Min Typ * Max
V,H High-leve1 input voltage 2 V
VT+ -VT- Hysteresis width Vee=4.75V 0.4 V
V'c Input clamp voltage Vee=4.75V, l,e=-18rnA -1.5 V
IOH High-level output current VcC=4.75V, V, =2V, V, =O.BV, Vo=5.5V 100 I'A

Vee=4.75V
VI=2V l IOL=12rnA 0.25 0.4 V
V,=0.8V I IOL=24rnA 0.35 0.5 V
Vee=5.25V, VI=2.7V 20 I'A
IlL Low-level input current Vcc=5.25V, V,=0.4V -0.2 rnA
Icc Supply current Vcc=5.25V INote 11 40 65 rnA
*: All typical values are at Vee = 5V, Ta = 25'e.

SWiTCHiI~G CHARACTERiSTiCS (Vcc=5V, Ta=25'C.unlessotherwisenoted)
Limits
Min" Typ Max
tpLH Low-ta-high level, high-ta-Iow levet output 23 45
ns
tpHL propagation time from inputs P to output 0P=Q 20 35
propagation time from inputs Q to output 0P=Q ns
tpHL 20 35
RL=667Q, CL=45pF INote21
All other input pins in low-state
ns
tpHL propagation time ,from inputs P to output OP>Q 22 35
propagation time from inputs Q to output OP>Q ns
tpHL 26 35
.• MITSUBISHI
"ELECTRIC 2-463
MI.TSUBISHI LSTTLs
M74LS68SP
PG 1--'---1 OUT
50Q
III The pulse generator IPGI has the following

characteristics: PRR = 1 MHz, tr = 6ns. tf =
6ns. tw ~ 500ns. Vp = 3Vp.p. Zo = 50n
12) CL includes probe and jig capa~itance.
TIMING DIAGRAM (Reference ievel = 1.3V)
•.. ·. MITSUBISH. I
2-464 ;';ELECTRIC
MITSUBISHI LSTTLs
M74LS688P
a-BIT MAGNITUDE COMPARATOR WITH ENABLE INPUT
DESCRIPTION
The M74LS6BBP is a semiconductor integrated circuit con-
taining two B-bit words comparator functions with enable
input_ ENABLE
INPUT E- Vee
Po~ OUTPUT
FEATURES -Op=o
• Hysteresis at inputs P and a (width = 400mV typical) 00- -07

• Provided with enable input (E) P,- -P7
COMPA
• Active pull-up output RATOR 0,-
• Wide operating temperature range (T a = -20 - +75°C) INPUTS
P2_ COMPA
RATOR
02- INPUTS
APPLICATION
General purpose, for use in industrial and consumer equip- P3- -Ps
ment_ 03-
GND -P4
When enable input E is low, two eight-bit binary or BCD
words are applied at inputs Po - P7 and a o - a 7 • The
Outline 20P4
results as shown in Function Table are expressed at output
Op=o·
When E is high, 0P=Q is high in spite of Po - P7 and 8-BIT MAGNITUDE COMPARATORS TABLE
ao - a 7 • Inputs Outputs
Beside this IC, there are eight-bit digital comparators Type
designation Q 24kn pull-up
varing input/output formats. They are shown in the table. E Op=O Op>O Format
The detailed information are shown in individual catalogue. M74LS682P Ves No Ves Ves Active pull·up
An example of the extent ion bits is shown in the appli- M74LS683P Ves No Ves Ves Open collector
cation. M74LS684P No No Ves Ves Active pull-up

BLOCK DIAGRAM OUTPUT
~--------------------~v~--------------------~) ENABLE INPUT
COMPARATOR INPUTS
•... MITSUBIS.H. I
"ELECTRIC 2-465
MITSUBISHI LSTTLs
M74LS688P
8~BIT MAGNITUDE COMPARATOR WITH ENABLE INPUT
p. Q E Op=o
P=Q L L
p>o L H
P<Q L H
X H H
Note 1: X: Irrelevant
ABSOLUTE MAXIMUM RATINGS(Ta=-20-+75'C.unlessotherwisenoted)


Topr Operating fre&-alr ambient temperature range -20-+75 'C
Tstg . Storage temperature range -65-+150 "C
RECOMMENDED OPERATING CONDITIONS (Ta=-20-+75"C.unless otherwise noted)

Limits
Min Typ Max
IOH High-level output current VOH;<;2.7V 0 400 pA
VOL~O..4V 0 12 , mA
VOL~0.5V 0 24 mA

Limits
Min Typ * Max
VIL LOW-level input voltage 0.8 V
VIC Input clamp voltage Vee=4.75V. Ile=-18mA -1.5 V
VOH High.level output voltage Vcc=4.7SV. VI =2V.VI =O.BV,loH= -4001'A 2.7 V

Vcc-4.75V
VI=2V
I IOL=12mA 0.25 0.4 V
VI=0.8V I IOL=24mA 0.35 0.5 V
Vcc=5.25V. VI,=2.7V 20 pA
IIH High-level Input current
Vee=5.25V. VI=10V 0.1 mA
IlL Low-level input current Vee=5.25V. VI=0.4V -0.2 mA
105 Short-circuit output current Vce=5.25V. Vo=OV -20 -100 mA
ICC Supply current Vee=5.25\,1 (Note2l 40 65 mA
*: All typical value. are at VCC = 5V. T. =25"C.
Note 2: ICC is measured with all other inputs at value of 4.SV.
• MITSUBISHI
2-466 .... ELECTRIC·
MITSUBISHI LSTTLs
M74LS688P
8-BIT MAGNITUDE COMPARATOR WITH ENABLE INPUT
SWITCHING CHARACTERISTICS (Vee=SV. Ta=2S'C,unlessotherwisenoted)
Limits
Min Typ Max
propagation time from inputs P to output 0P=Q
ns
tpHL 18 28
tPLH Low-ta-high level, high-to-Iow level output 11 23
CL=4SpF (Note 3) ns
propagation time from inputs Q to output Op=Q 19 28
tpHL All other input pins in tow-state
tPLH Low:to-high level. high-ta-Iow level output 10 18
propagation time from input E to output 0P=Q ns
tPHL 16 20
INPUT Vee OUTPUT

PG DUT characteristics: PRR = 1MHz, tr=:: 6ns, tf =
6ns, tw = 500ns, Vp = 3Vp_p, Zo = 50n

SOQ
\'----
E
APPLICATION EXAMPLE
Example of 16-bit comparator
Op~o
M74LS688P M74LS688P
E Po
"L" Po 00 P, at
• MITSUBISHI
"'ELECTRIC . 2-467
MITSUBISHI LSTTLs
M74LS689P
a-BIT MAGNITUDE COMPARATOR WITH ENABLE INPUT AND OPEN COLLECTOR OUTPUT

taning two 8-bit words comparator functions with enable
input and open collector output. ENABLE
INPUT E- Vee
Pa- -Op=o OUTPUT
FEATURES
• Hysteresis at inputs P and Q (width =400mV typical) 00-
• Provided with enable input (E) Pl-
COMPA
• Open collector output RATOR 01-
• Operating temperature range (T a = -20 ~ +75°C) INPUTS
P2_ COMPA
,RATOR
02--+ INPUTS
APPLICATION
General purpose, for use in industrial and consumer equip- P3-
ment. 03-
i'
GND
When enable input E is low, two eight-bit binary or BCD
words are applied at inputs Po ~ P7 and Q o ~ Q7. The
Outline 20P4
results as shown in Function Table are expressed at output
Op=o·
When E is high, OP=Q is high in spite of Po ~ P 7 and Q o 8-BIT MAGNITUDE COMPARATORS TABLE
~Q7·
Type Inputs Outputs
designation Q 24kn pull·up
varing input/output formats. They are 'shown in the table. E Op=O Op>O Format
The detailed information are shown in individual catalogue. M74LS682P Ves No Ves Ves Active pull-up
An example of the extention bits is shown in the appli- M74LS683P Ves No Ves Ves Open Collector
cation in M74LS688P. M74LS684P No No Ves Ves Active pull-up

M74LS689P No Ves Yes No Open collector
BLOCK DIAGRAM
OUTPUT
,
I
@GND
ENABLE INPUT
~------~------------~v~------~------------~
COMPARATOR INPUTS * : OPEN COLLECTOR OUTPUT
• MITSUBISHI
2-468 "ELECTRIC
MITSUBISHI LSTTLs
M74LS689P
a·BIT MAGNITUDE COMPARATOR WITH ENABLE INPUT AND OPEN COLL~CTOR OUTPUT
P, 0 E Op~a
p=o L L
p>o L H
p<o L H
X H H
Note 1: X: Irrelevant
ABSOLUTE MAXIMUM RATINGS (Ta=-20-+75"C.unless otherwise noted)

Va Output voltage High-level state -0.5-+7 V
Limits
Min Typ Max
IOH High-level output current Vo=5.5V 0 100 p.A
Low'-Ievel output current

VOL";0.4V a 12 mA
IOL
VOL";0.5V a 24 mA

Limits
Min Typ * Max

VIC Input clamp voltage Vee=4.75V, Ile=-18mA -1.5 V
IOH High-level output current Veo=4.75V, V, =2V, VI =O.8V, VO=S.SV 100 p.A
Vee=4.75V
VOL Low-level output voltage VI=2V
I IOL =12mA 0.25 0.4 V
VI=0.8V IOL =24mA 0.35 0.5 V
I
Vee=5.25V, V,=2.7V 20 p.A
Vee=5.25V, V,=10V 0.1 mA
leo Supply current Vee=5.25V INote21 40 65 mA
*: All typical values are at VCC = 5V. Ta = 25°C.

SWITCHING CHARACTERISTICS (Vee=5V, Ta=25"C.unlessotherwisenoted)
Limits
Min Typ Max
tPLH Low-to-high level, high-to-Iow level output 23 40
propagation time from inputs P to output 0P=Q
ns
tpHL 21 35
tPLH Low-to-high level, high-to-low level output 23 40
RL =667Q, CL =45pF INote31 ns
tpHL propagation time from inputs Q to output Op=Q 21 35
All other input pins in low-state.
tpLH Low-to-high level high-to-Iow level output 22 35
propagation time from input E to output 0P=Q ns
tpHL 20 30
• MITSUBISHI
...... ELECTRIC
MITSUBISHI LSTTLs
M74LS689P
a-BIT MAGiNITU~E COMPARATOR WITH ENABLE INPUT AND OPEN COLLECTOR OUTPUT
PG 1-----41-----1 DUT
50Q
(1) The pul,. generator (PG) ha, the following

characteristics: PRR = 1MHz, tr = 6ns. tf =
6n" tw = 500n" Vp = 3Vp_p, Zo = 50n
(2) CL inclu?es probe and jig capacitance.
P,O
• MITSUBISHI
2-470 "ELECTRIC
CONTACT ADDRESSES FOR FURTHER INFORMATION
JAPAN NORTHEAST FRANCE
Electronics Marketing Division Mitsubishi Electronics America, Inc. Mitsubishi Electric Europe GmbH
Mitsubishi Electric Corporation 200 Unicorn Park Drive 65 Avenue de Colmar Tour Albert ler
2-3, Marunouchi 2-chome Woburn, MA 01801, U.S.A. F-92507 Rueil Malmaison Cedex,
Chiyoda-ku, Tokyo 100, Japan Telex: 951796 MELASB WOBN France
Telex: 24532 MELCO J Twx: 710-348-1229 Telex: 202267 (MELCAM F)
Telephone: (03) 218-3473 Telephone: (617) 938-1220 Telephone: (01) 7329234
(03) 218-3499 Facsimile: (617) 938-1075 Facsimi.le: (01) 7080405
Facsimile: (03) 214-5570
MID-ATLANTIC ITALY
Overseas Marketing Manager Mitsubishi Electronics America, Inc. Mitsubishi Electric Europe GmbH
Kita-Itami Works 110 New England Ave. West Centro Direzionale Colleoni
4-1, Mizuhara, Itami-shi, Piscataway, NJ 08854 U.S.A. Palazzo Cassiopea 1
Hyogo-ken 664, Japan Telex: 833244 MESANJPWAY 20041 Agrate Brianza I-M ilano
Telex: 526408 KMELCO J Twx: 710-991-8584 Telephone: (039) 636011
Telephone: (0727) 82-5131 Telephone: (201) 981-9256 Facsimile: (039) 6360120
Facsimile: (0727) 72-2329 Facsimile: (201) 981-9256
SWEDEN
HONG KONG SOUTHWEST Mitsubishi Electric Europe GmbH
Ryoden Electric Engineering Co., Ltd. Mitsubishi Electronics America, Inc. Lastbilsviigen 6B
22nd fl., Leighton Centre 991 Knox St. 5-19149 Sollentuna, Sweden
77, Leighton Road Torrance, CA. 90502, U.S.A. Telex: 10877 (meab S)
Causeway Bay, Hong Kong Telex: 664787 MELA TRNC Telephone: (08) 960468
Telex: 73411 RYODEN HX Telephone: (213) 515·3993 Facsimile: (08) 966877
Telephone: (5) 7907021 Facsimile: (213) 324-6578
Facsimile: (852) 123-4344 U.K.
SOUTH CENTRAL Mitsubishi Electric (U.K.) Ltd.
TAIWAN Mitsubishi Electronics America, Inc. Centre Point, (18th Floor),
MELCO TAIWAN CO., Ltd. 3247 West Story Road, 103 New Oxford St.,
6th fl., Chung-Ling Bldg., Los Colinas Business Park London WC1, England, U.K.
363, Sec. 2, Fu-Hsing S. Road, Irving, TX 75062, U.S.A. Telex: 296195 MELCO G
Taipei, R.O.C. Telephone: (214) 258·1266 Telephone: (01) (379) 7160
Telephone: (704) 0247 Facsimile: (214) 659-9313 Facsimile: (01) (836) 0699
Facsimile: (704) 4244
SOUTHEAST AUSTRALIA
U.S.A. Mitsubishi Electronics America, Inc. Mitsubishi Electric Australia Pty. Ltd.
NORTHWEST Town Ex. CTR. 6100 Glades Rd. #210 73-75, Epping Road, North Ryde,
Mitsub.ishi Electronics America, Inc. Boca Raton, FI. 33433 U.S.A. P.O. Box 1567, Macquarie Centre,
1050 East Arques Ave. Twx: 510-953-7608 N.S.w., 2113, Australia
Sunnyvale, Ca 94086, U.S.A. Telephone: (305) 487-7747 Telex: MESYD AA 26614
Telex: 172296 MELA SUVL Facsimile: (305) 487-2046 Telephone: (02) (888) 5777
Twx: 910-339-9549 Facsimile: (02) (887) 3635
Telephone: (408) 730-5900 WEST GERMANY
Facsimile: (408) 730-4972 Mitsubishi Electric Europe GmbH
Head Quater
NORTH CENTRAL Gothear Str. 6
Mitsubishi Electronics America, Inc. 4030 Ratingen 1, West Germany
799 North Bierman Ci rcle, Telex: 8585070 MED D
Mt. Prospect, ILL 60056, U.S.A. Telephone: (02102) 4860
Telex: 270636 MESA CHI-MPCT Facsimile: (02102) 486-115
Telephone: (312)298-9223~8
Facsimile: (312) 298-0567 Munich Office:
ArabellastraBe 31
Mitsubishi Electronics America, Inc. 8000 Munchen 81, West Germany
15612 HWY 7 #243 Telex: 5214820
Minnetonka, MN 55345 U.S.A. Telephone: (089) 919006-09
Telex: 291115 MELA MTKA Facsimile: (089) 91013199
Telephone: (612) 938-7779
Facsimile: (612) 938-5125
• MITSUBISHI
.... ElECTRIC
MITSUBISHI SEMICONDUCTORS
BIPOLAR DIGITAL IC LSTTL DATA BOOK
March, Third Edition 1985

Editioned by
Committee of editing of Mitsubishi Semiconductor Data Book
Published by
Mitsubishi Electric Corp., Semiconductor Marketing Division
This book, or parts thereof, may not be reproduced in any form without permission of
Mitsubishi Electric Corporation.
MITSUBISHI SEMICONDUCTORS
BIPOLAR DIGITAL IC LSTTL 1985

1985 Mitsubishi Bipolar Digital IC LSTTL Integrados

Caricato da

Informazioni sul documento

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

1985 Mitsubishi Bipolar Digital IC LSTTL Integrados

Caricato da

Copyright:

Formati disponibili

MITSUBISHI s1Io1(o)~

TYPE DESIGNATION TABLE

SCHEMATICS OF INPUTS AND OUTPUTS

M74LSOOP Quadruple 2-lnput Positive NAND Gate ...................................................................................................... 2-9

TYPE DESIGNATION TABLE

TYPE DESIGNATION TABLE

M74LSOOP 2-9 M74LS93P 2-101 M74LS191P 2-224 M74LS373P 2-353

INVERTERS, NAND GATES

Type of output Typical electrical characteristics

Quadruple 2-lnput Positive AND Gote

Quadruple 2-lnput Positive NOR Gate

Quadruple 2-lnput Positive OR Gate

0 M74LS86P 10 30.5 8 0.4 14P4 74LS86 2-90

EXCLUSIVE NOR GATE

I Quadruple 2-lnput Exclusive NOR Gate o M74LS266P 15 40 I 14P4 74LS266 I 2-3021

Dual 2-Wlde 2-lnput AND·OR INVERT

SCHMITT TRIGGER NAND GATES/INVERTERS

I - M74LS14P 12 51.5 1.6 0.8 14P4 74LS 14 2-31

Circuit function Type

Dual J-K Negative Edge-Triggered Flip-

Dual J-K Negative Edge-Triggered Flip-

Dual J-K Positive Edge- Triggered Fllp-

Dual J-K Negative Edge-Triggered Fllp-

Dual J-K Negative Edge-Triggered Fllp-

Dual J-K Negative Edge-Triggered Flip-Flop

I: Positive-going edge L: Negative-going edge lJ: Active low-level

D-Type FLIP FLOPS

Dual D-Type Edge-Triggered Flip-Flop with

(ns) (ns) (ns) (mW)

4-BI1 Bistable Latch

Dual 4-Blt Decade Counter 2X5 M74LS490P 0-35 75

Dual 4-Blt Binary Counter 16 M74LS393P 0-75 100 ~ -

MONOSTABLE MUL TIVIBRATORS

Retriggerable Monostable Multivibrator with

8-Line to I-Line Data Selector/Multiplexer

Dual 4·Line to I·Llne Data Selector/

Dual 4-Line to I-Line Data Selector/

Dual 4-Line to I-Line Data SeleCtor/

Dual 4-Llne to I-Line Data Selector/

Quadruple 2-Line to I-Line Data,Selector/

Quadruple 2·Line to I-Line Data Selector/

Output Typical electrical characteristics " "'

Segment Identification of M74LS47P, M74LS48P

DECODERS !DEMUL TIPLEXERS

TYPical Typical propagation time (ns)

BCD-to-Declmal Decoder M74L542P 35 - 12 16P4 74LS42 2-59

Typical electrical characteristics OJ "'

TYPical electrical characteristics

9-Blt Odd/Even parity Generator/Checker M74LS2BOP 18 80 0.4 114P41 74LS280 I 2-310 I

Circuit function Type

Circuit function Type

CL Load capacitance Extenally connected load capacitance

VSE Base-emitter voltage

Vo Output voltage Voltage applied to or appearing at an output

VOL Low-level1output voltage Voltage at an output in the low state

TYPE 14P4 14-PIN MOLDED PLASTIC DIL Dimension in mm

2.S4±0.2S O.S±O.1 7.6-10

TYPE 20P4 20-PIN MOLDED PLASTIC DIL Dimension in mm

e::::: :::0)] 4.SMAX

SCHEMATICS OF INPUTS AND OUTPUTS

SCHEMATICS OF INPUTS AND OUTPUTS

SCHEMATICS OF INPUTS AND OUTPUTS

M74LS73AP 1 -1 9k T 0-14 120

M74LS76AP I -1 9k T 0-14 120