Historically, most increases in processor speed were accomplished by:

Miniaturization

A Von Neumann architecture is one which:

stores instructions and data in the same memory

The Von Neumann Bottleneck is the reason computers today have:

a hierarchy of memory

Which of these describes the maximum number of transistors on a chip?

Moore's Law

An invention which characterized the third generation of computers was:

integrated circuits

Which of the following is true about the sign and magnitude representation?
it has two zeroes &
bitwise addition of the positive and negative version of a number do not produce 0

The easiest way to convert a 10-bit binary number to octal is to

group the bits in groups of three from right to left. Then each group is a single octal digit

Given the hexadecimal 8-bit signed integer 17, its value in decimal is:
1*16+7=23

You take the 2's complement of a number by:

taking the 1's complement and adding 1

The decode step in executing an instruction:

take the instruction apart to yield the operation and where the operands are

The instruction set architecture is

the interface between the machine and the lowest level of software

The instruction word for the simple machine consists of:

two fields: opcode and address

The address at which a Simple Machine starts execution is:

always 0

What does the following RTL describe?

MAR <- PC
PC <- PC+1
get()
IR <- MBR
the fetch cycle

If LOAD is opcode 1, then the instruction 0x1004 does what?

It places the memory at address 4 in the accumulator.
The instruction STORE 0x10 (0x2010) uses (either explicitly or implicitly) which of these addressing
modes?
register and memory

The instruction 0x9010 uses the memory addressing mode. Here, it means:
one operand is at memory[0x10]

Which of the following describes a use of the counter register (CTR)?

It is used for comparisons in conditional branch (JEQ, JLT) instructions.

The user-accessible registers (those that can be manipulated directly by a user program) in the Simple
Machine are:
the accumulator, address register, and counter

The number 32 comes up with respect to our version of basic MIPS technology because:
it has 32 registers

The following classes of MIPS instructions access memory:

loads and stores

The acronym MIPS stands for:

Microprocessor without Interlocking Pipe-stages

Which of the following statements is true about basic (R- and I-type) MIPS instructions?
each instruction has room for encoding at least two registers

Which of the following would a right- or left-shift instruction NOT be used for?
adding two numbers

Given two MIPS registers $t0, which contains 6 and $t1, which contains 5, what is the result of the
following instruction in $t2?
or $t2, $t0, $t1
0x7

This section introduces an addressing mode that MIPS has that the Simple Machine didn't have. It is:
base plus displacement

I-type instructions:
have room for two registers and a 16-bit immediate field

There are only two native branch statements on MIPS. They are:
beq and bne
Which non-native branch instruction do the following two instructions implement?
slt $at,$t0,$t1
bne $at,$zero,Label
blt $t0,$t1,Label

Given two integers i and N, where N>=0, what might this loop be translated to?
i=0;
while (i<N) i++;
i = 0;
loop: if (i>=N) goto loopdone:
i++:
goto loop;
loopdone:

In the code sample below, $t0 contains the value of i, and the goal is to place A[i] in $t1. What is the
missing instruction X?
la $t2,A
X
add $t2,$t2,$t0
lw $t1,0($t2)
sll $t0,$t0,2

Which of the following characteristics of a switch statement would suggest implementing it using a jump
table?
both b and c must be true to use a jump table

Say you have the following integer array:

Arr: .word 1,2,3,4,5
Which code segment will place Arr[1] (the integer 2) in $t1?
la $t0,Arr
lw $t1,4($t0)

The branch instructions use their 16-bit immediate constant to encode where to branch. If the immediate
has the value X, it means:
none of the above
You must add X<<2 to the contents of the PC to get the branch target (X is a word offset)

In the leaf function below, which does not allocate a stack frame, what is the location of
argument e?
int foo (int a, int b, int c, int d, int e) {
...
16($sp)

What can you freely use in the following function?

int foo(int a, int b)
register $a0
register $a3
register $t1

Data regions are allowed to grow:

in two directions - stack data and static data start at opposite ends of the data region and grow
towards each other

The starting addresses for data and text are "far apart". This:
allows each segment to be contiguous and allows sufficient space for each.
Which of the following is true about the stack?
Locations in the stack are accessed as offsets from a movable pointer.

Which of the following is true about this code?

char *message = "hello";
*message = 'H';
It will probably cause a fault - the string is considered to be constant.

Which of the following is true about 16-bit Unicode being transmitted using UTF-8?
Each Unicode character is encoded as one or more UTF-8 characters.
An international character can be encoded in a maximum of three bytes of UTF-8.
The most-significant bit of the first byte of the character indicates whether it has been encoded
using UTF-8.

The jal and jalr instructions differ in which way?

b and d only:
The jal instruction takes a function name. The jalr instruction takes a register.
The address jumped to by the jal instruction is guaranteed to be aligned. The address jumped to by the
jalr instruction has no such guarantee.

The term top-of-stack is a bit confusing on MIPS because:

the stack grows downwards on MIPS, so "top" is confusing.

The first instruction in a non-leaf procedure is:

Addiu

foo calls moo and foo is using regX. If regX is a caller-save register...
foo must save regX before the call to moo, and restore it afterwards

On entry to the function foo declared below, where is the variable e?

int foo (int a, int b, int c, int d, int e)
on the stack at 16($sp)

In the function below, where would be an appropriate place to put thelen?

int len(char *str) {
int thelen=0;
while (*str++) thelen++;
return(thelen);
}
a t-register-
The function is a leaf, so it doesn’t require a stack frame.
The best place to put thelen is in a temporary register. This could be a t-register, an a-register, or
a v-register. If you put it in $v0, it is ready to return.
If you put it in an s-register or on the stack, you need a stack frame, which is silly!
In the function below, what is the minimum size of the stack frame func1 needs?
int func1(int a) {
int sum = 0;
for (;a>0;a--) sum += munge(a);
return(sum);
}
2416 + 4 ($ra) + 4 (sum) - and you home a.
the function is not a leaf, so it needs 16 (args) + 4 ($ra). It also needs a location for sum (4).
There is already room for a on the stack (in the home location), but it may be better to put a in an
s-register, in which case it must save and restore it, requiring four more bytes.
the minimum is 24, but optimally you may want 28.

In the non-leaf function below, where should $ra be saved?

myfunc:
addiu $sp,$sp,-28
24($sp)
$ra is always saved at the furthest location in the stack frame. here that is 24($sp)

Which of the following groups of registers are callee-save?

s-regs

You are writing code for this function:

char * getmessage(char **messages, int mesnum) {
return (messages[mesnum]);
}
The line return (messages[mesnum]) could be coded:
sll $t0,$a1,2
add $a0,$a0,$t0
lw $v0,0($a0)

In a character string (a char *), the end of the string is indicated by

a null byte

You are writing the following function:

void message(char * msg) {
char c = msg[1]; // <<----
The code for the bold line above, where c is to be placed in $t0, would be:
lb $t0,1($a0)

How would you describe the type of foo in the following declaration?
char ** foo;
a pointer to a character string (a pointer to a char *)
a pointer to a pointer to a char
an array of character strings (an array of char *'s)

In the following code, where the register $s0 is to be used for banner, $s0 is initialized by what?
foo(void) {
char *banner = "the result is: ";
...
Placing a copy of the string on the stack and initializing $s0 with the address of the first byte of
the string.

When the exception handler is invoked, all registers must be preserved except:
k0 and k1

Each of the following is an example of an exception except:

bad Xcode

On MIPS, a mutual exclusion to protect a critical section is implemented using:

a pair of instructions
ll and sc is a pair of instructions used to simulate atomic test and set. These provide the
capability to program mutual exclusion.
There is no atomic test-and-set instruction on MIPS.

The MIPS instructions which are used to simulate an atomic operation are:
load linked and store conditional

Each of the following is an advantage of the use of dynamically-linked libraries except:

lower function call overhead

When a [virtual] memory address is not in the cache it is referred to as a cache miss.
If the [virtual] memory address is not in memory at all it is referred to as a:
page fault

During the translation of a virtual to a physical address, the virtual address is broken up into a:
virtual page number and page offset

If a direct-mapped cache has eight blocks with a blocksize of 1, address 0xff maps to block
number:
7

A direct-mapped cache is characterized by:

mapping each memory location to exactly one location in the cache

Caches often have a valid bit, which is:

a per-entry bit that indicates the entry contains a valid address

In a cache, the tag is stored with the cache entry. It is:

the part of the address that is not used in the blocksize or block number. It is used to verify the
address of the data in the cache.

A fully-associative cache maps an address:

to any block in the cache, requiring each cache tag to be compared with the address

Combinational logic is logic in which:

the output depends only on the current inputs.
Which of the following is true for a logic block with n inputs?
Each entry in the truth table has the value 0 or 1.
The truth table has 2^n entries.

Which of the following statements are true?

( * is used in place of the dot operator to mean "AND".)
A truth table with n inputs has 2^n entries.
f (D * C) is 1, both D and C are 1.

Which of the following is NOT sufficient to express all logic functions?

AND and OR gates
As long as you can do inversion plus one of AND or OR, you have a set that can express all logic
functions AND, OR and NOT.

Which of the following Boolean algebra expressions is/are always true?

A+0=A
A+A=A

Which of the following laws hold in Boolean algebra?

the commutative law over OR A + B = B + A
the commutative law over AND A * B = B * A
the associative law over OR A + (B + C) = (A + B) + C
the distributive law A * (B + C)= (A * B) + (A * C)

The acronym PLA stands for:

Programmable Logic Array

You can implement a sum-of-products equation using:

a decoder and a set of OR gates
a PLAA

one-bit full adder has:

three input bits and two output bits

You can derive:

a multiplexor from a decoder, a set of AND gates and an OR gate

A decoder has:
n inputs and 2^n outputs