nEXT IAS BIG LEARNINGS MADE EASY ‘Old Rajinder Nagar Centre: Ground Floor 6, Old Rajinder Nagar Saket Centre: 316/274, Westend Marg, (Near (TDC) (Wear Salwan Schoo! Gate No.2) New Delhi - 110060 Saidulajab, Near Saket Metro Station, New Delhi-110020, Ph 017-49858612, 8800338066 1-45124642, 880076445 Infoenestiascom EET re (To be filled by candidate) Name of Candidate Roll NO. ennnnnne CSE (MAIN) 2018 ELECTRICAL Test-2 Part Syllabus Test : Control System, Microprocessor and ENGINEERING Micro Computer, Digital Communication Time Allowed : Three Hours Maximum Marks: 250 QUESTION PAPER SPECIFIC INSTRUCTIONS Please read each of the following instructions carefully before attempting questions: ‘There are EIGHT questions divided in TWO SECTIONS and printed in ENGLISH. Candidate has to attempt FIVE questions in all Question no. 1 and 5 are compulsory and out of the remaining, THREE are to be attempted choosing atleast ONE from each section. The number of marks carried by a question/part is indicated against it. Answers must be written in the medium authorized in the Admission Certificate which must be stated clearly on the cover of the Question-cum-Answer Booklet (QCAB) in the space provided. No marks will be given for answers written in a medium other than the authorized one. Wherever any assumptions are made for answering a question, they must be clearly indicated. Diagrams/Figures, wherever required, shall be drawn in the space provided for answering the question itself. Unless otherwise mentioned, symbols and notations carry their usual standard meanings. Attempts of questions shall be counted in sequential order. Unless struck off, attempt of a question shall be counted even if attempted partly. Any page or portion of the page left blank in Question-cum-Answer Booklet must be clearly struck offNEXT IAS CSE (Main) 2018 : Test Ser Test :2 Q.1 (a) Obtain the response y(1) of the following system: %) [A -05]-x,]J05] fx]_fo %} 7 {1 0 [Lx] ho |” x,0} "Lo vet of] u(t) is the unit step occuring at f = 0. 15 (b) Consider the system defined by: ay 2 2fx,] [2 Hy} =] 0 AA 1 |x. |+]olu as 100 -ilx} [a a y= [11 On % Is the system completely state controllable and completely observable? 15 (©) What are Gain Margin and Phase Margin? Discuss briefly about their importance in design of control system. 10 (d)_ Explain the following addressing modes used in the microprocessor. () Indexed addressing (ii) Base-register addressing (ii) Present-page addressing (iv) Zero page addressing 10 Q.2 (a) Consider the feedback control system shown below: 70 e+) Re, ‘Compensator }—+] a The compensator block of the system is to be designed, such that the overall system will have a velocity error coefficient of 10 and a minimum phase margin of 43°. Compare the phase margin of the uncompensated system and compensated system. 20 Page 2NEXT IAS Electrical Engineering Test :2 (b) Explain the following Data Transfer Schemes (i) Programmed data transfer schemes (ii) DMA transfer scheme. 10+5 (©) (i) Draw the block diagram of 8155 Programmable Peripheral Device. Explain the control signals associated with 8155. (ii) Explain the control word of 8155 1/0 section. 15 Q.3 (a) Consider the system shown below: a RG R or Wit e Ry I . } AW Determine the values of R;, Ry, Ry Ry C,, C, of the controller such that = 39. so(1 + +0. 76028) 3.0778 15 (b) Write a program to generate continuous square wave with a period of 500 41s. Assume the system clock period is 325 ns and use bit D, to output the square wave. Use register B as delay counter. Display the square wave at PORT 0. 15 (©). Following is the segment of a 8085 assembly language programs. LXI ‘SP, EFFFH CALL, 3000H 3000H LXIH, 3CF4H PUSH PSW SPHL POP PSW RET ‘What are the contents of SP on completion of RET execution? 10 Page 3