Esquema Elétrico Asus Nexus 7 ME370T

5 4 3 2 1
01.Block Diagram
02.POWER TREE
03.Power On/Off&Reset Timing
04.Power Sequence map
1.0
05.T30 Core & Fuse
06.T30 SYS IF
07.T30 GMI IF
ME370T (Nakasi)
08.T30 DDR
09.T30 DSI/CSI,CAM
10.T30 LCD 2012/02/08 Front Rear
11.T30 HDMI,VGA Camera module Camera module
D D
12.T30 BB,UART Aptina 1040 OV5650
13.T30 AUDIO
14.T30 USB,HSIC,ICUSB
15.T30 SDMMC,eMMC
16.T30 PCIe MIPI_CSIB_1V2
17.T30 NC
18.Boot Straps MIPI_CSIA_1V2 Antenna
19.DDR3L
20.LCD data EMI filter CAM_I2C_1V8
21.LCD panel power NFC NXP PN65
22.eMMC,SDIO I/F
23.Sensor
CAM_I2C_1V8 Light sensor
24.Debug Connector HDMI LSC3010 XTAL 27.12MHz
25.Hall
28.NUVOTON NPCE795L-1
Micro HDMI DDC_I2C 5V0 CAM_I2C_1V8 E-COMPASS
30.EC description AICHI AMI304
31.SMBus tributaries
32.I/O Connector CAM_I2C_1V8 Gyro sensor
33.TP&IO_CON(MB) LVDS Transmitter LCD_RGB_1V8 Invensense MPU-6050
TI SN75LVDS83B
34.Coin cell LCD Panel
35.Camera power
GEN1_SMB_3V3 Controls
36.Camera ISP & Connector
37.Codec_ALC5631Q-VE 32.768KHz PMIC XTAL
Gen1_I2C_1V8
38.DSP_FM34
Audio DSP MAXIM 32.768KHz
C 39.Audio Conn HEADSET PWR_I2C_1V8 MAX77663
C
40.HW_RF_Interface
EXT MIC FM34
41.WiFi+BT combo II
43.BCM4751 GPS Thermal Sensor
44.SW CON
I2S CODEC I2S_1V8 Tegra XTAL 12MHZ
OnSemi NCT72
46.HDMI Conn HEADSET JACK
ALC5642
47.EMC
48.Srew Hole T30L
49.DC_JACK & BAT CON
50.Power Sequenc Logic Speaker PWR_I2C_1V8 Kai DDR3L x 32_1V35 DDR3L 256M x8 x4pcs
51.Power_Latch
52.LVDS transmitter_30 DMIC KNOWLES Internal D MIC 1333(667MHz)
53.LCD panel connector_30
a54.TP&IO_Block Diagram
SPM0423HD4H-WB
HSMMC x8_1V8 eMMC 8GB
a55.TP&IO_Conn&SIM&SD GEN2_I2C_3V3 Button FPC
a56.TPIO_ATMXT768EXES Touch screen Power Button
a57.TP&IO_TP CON ELAN Volume Up & Down
a58.TP&IO_POWER I/O Board & TP JTAG_1V8
a59.TP&IO_RST_SW UART_4_1V8 Debug Port Reset Button
63.ALS_LSC3010 EXTERNAL
81_PW_+5VSUS_+3VSUS_TPS51125A
SD SCOKET
86_PW_2.85V&VDD_5V0_SYS
89_PW_Charger(BQ24745) GEN2_I2C_1V8 EC
90_PW_A/D_IN NUVOTON
B 91.PMU-TPS65911 1/3 PWR_I2C_1V8 NPCE795LA0DX B
92.PMU-TPS65911 2/3 Battery Gauge
93.PMU-TPS65911 3/3
95.Force_off_recovery Charger Antenna
96.Low_Low_BAT# SDIO_1_1V8
97.PWR_SW# Selection SMB347 UART_3_1V8 WIFI + BT
Azurewave AW/NH-665
99.HISTORY
32.768KHz
USB_1_3V3 XTAL 37.4MHz
USB Conn.
USB_3_3V3
Docking USB Port TCXO 26MHz
Gen1_I2C_1V8
USB*3 , Line out , Antenna
Mic In , DC Jack
32.768KHz
GPS
Docking Broadcom BCM4751
UART_2_1V8
A A
Title : 01.Block Diagram

ASUSTeK COMPUTER INC. EPAD Engineer: Richard Lin
Size Project Name Rev
C
ME370T 2.0
Date: Friday, March 02, 2012 Sheet 1 of 60
5 4 3 2 1
5 4 3 2 1
page 52
PMIC
ME370T (Nakasi) MAX77663
VDD_PMU_LDO2_2V8 T30
Power Tree IN_LDO2 LDO2 2.8V. 150mA, PMIC
VDD_DDR_RX
VDD_PMU_LDO3_2V8 page 20
IN_LDO3/5 LDO3 VCORE_EMMC_S
2.8V. 300mA, PMIC
200mA for eMMC VCC
D D
VDD_PMU_LDO5 page 31
LDO5 VDDIO_CAM
2.8V. 300mA, PMIC
Camera VDDIO
Power Source
page 49 page 5 U1
VDD_USB1_VBUS +3VSUS_CPU T30
USB Conn. Power SW VDD_FUSE
Charger VBATT NCT352 VDD_1V8_GEN_CPU
Battery T30
EN_VDD_FUSE (T30 LCD_PWR1)
AVDD_OSC
DOCK_5V SMB347 T30 T30
Dock Conn. VDD_3V3_GMI VDDIO_SYS
T30
page 14 U14 VDDIO_CAM
T30
Power SW AVDD_USB T30
NCT352 VDDIO_LCD
EN_AVDD_USB (MAX77663 GPIO2) T30
VDDIO_BB
page 21 page 26
VCORE_TEMP T30
VCC_LED VDDIO_UART
for Thermal Sensor T30
T30
VDD_IO_AUDIO
VDDIO_PEX_CTL T30
TBD (no use) VDDIO_SDMMC4
C page 21 U8 C
VDD_PNL T30
page 48
Power SW VCC_LCD3V3 VDDIO_SDMMC3
VDD_AC_BAT +3VSUS NCT352 Q2
Buck-Boost 3.3V. 2A
for LCD Panel page 14
T30
(VPH_PWR_CHGR) EN_VDD_PNL (T30 LCD_M1)
TPS63020 Load SW AVDD_USB_PLL
for LVDS Transmitter
PMOS
EN_3V3_SYS(PMU GPIO3) page 22 VDD_LVDS_30 VCC
CORE_PWR_REQ for eMMC VCCQ
VDD_LVDS_30 page 20
page 48 page 29 U30 for Touch Sensor VDDIO_HSMMC
VDD_5V0_SYS LVDSVCC
Boost 5V. 1A
LDO S-1167 TP_3V3 VDD_LVDS_F_30 for LVDS Transmitter
3.3V. 150mA page 29
RT9276GQW PLLVCC page 22 IOVCC
IOVCC_30
VDD_5V0_SYS enable VDD_LVDS_PLL_30
EN_5V0_SBY(T30 GMI_AD11)
page 25 page 26
page 50~52 VDD_ALS for Hall Sensor, ALS VDDIO_GYRO for Gyro VLOGIC
PMIC page 26
VDD_GYRO for Gyro VDD page 26
MAX77663 DVDD_ECOM for E-compass DVDD
MBATT, page 26
MON, AVDD_ECOM for E-compass AVDD
Internal Usage GPIO_INA &
AVSD page 41 for Audio Codec
T30 CPU page 27
VDD_1V0_GEN VDD_CPU WiFi_BT_VCC_3V3 for Wifi/BT Module VDD_1V8_CDC DBVDD
SD0 VDB_CDC
1.05V. 6A, PMIC 1.05V, 6.1A, Terga (Tj=90, 1.3GHz)
T30 CORE page 41 CPVDD
VDD_1V2_SOC VDD_CORE VCP_CDC
B
SD1 1.2V. 3A, PMIC 1.2V, 2.5A, Terga
GPS_VDD_BAT_3V3 for GPS B
AVDD
AVDD_CDC_F
VDD_1V8_GEN
SD2 1.8V. 2.0A, PMIC DCVDD
DACREF_CDC
+1.35V
SD3 1.35V. 1.5A, PMIC
page 52
page 27
PMIC VDD_1V8_DMIC
T30
VDD_PMU_LDO4_1V2 VDD_RTC for DMIC VDD
LDO4 MAX77663
1.2V. 150mA, PMIC
IN_LDO4/6
LDO6 VDD_PMU_LDO6_3V_1V8 T30 IN_LDO0/1 LDO0 VDD_DDR_HS
VDDIO_SDMMC1 1.0V. 150mA, PMIC
3/1.8V. 150mA, PMIC page 41
WiFi_BT_VDDIO_1V8 for Wifi/BT Module
VDD_PMU_LDO1
page 31 U27 LDO1 150mA, PMIC No usage
LDO S-1132 AVDD_CAM1 Camera AVDD page 43
2.8V. 300mA
GPS_VDD_IO_1V8 for GPS
IN_LDO7/8 LDO7 AVDD_DSI_CSI
CAM1_LDO_EN(T30 KB_ROW6) 1.2V. 450mA, PMIC
page 44
page 31 U28 T30
NFC_PVDD for NFC
VDD_PMU_LDO8_1V2 AVDD_PLLA_P_C
LDO S-1132 AVDD_VCM CAMERA AF VCM LDO8 1.2V. 300mA, PMIC
2.8V. 300mA AVDD_PLLM
page 50
CAM2_LDO_EN(T30 KB_ROW8) AVDD_PLLU_D
page 27
PMIC
VDD_SPK Codec Speaker Amp. AVDD_PLLX
A
MAX77663 A
T30
page 44 VDDIO_DDR
NFC_VBAT NFC VBAT
Max. 710mA Internal Usage GPIO_INB
DRAM Chip 256Mb x8bits x4pcs

page 19 170mA x4, each DRAM chip
VDD_DDR3L for DDR3L VDD
Title : 02.POWER TREE

VDDQ_DDR3L for DDR3L VDDQ Engineer: Richard Lin
ASUSTeK COMPUTER INC. EPAD
Custom ME370T 2.0
Date: Thursday, March 01, 2012 Sheet 2 of 60
5 4 3 2 1
5 4 3 2 1
TF300T_T3
Power On/Off
A/D_IN
D
AC_BAT_SYS 3.3V
D
AC_OK
3.3V
+3VA_PAL(PU8805)
3.3V
PWR_SW#
3.3V
+3VA_EC (PU8806)
AC_BAT_SYS
EC to PU8100 P_+5VSO_EN_10 (Q7900)
5V
+5VSUS (PU8100)
1.8V
VDD_1V8_PMU_VRTC(PMU VRTC)
3.3V
SW# to PMU PMU_ONKEY#
C C
EN_5V0_SBY(PMU GPIO0) 1.8V

VDD_5V0_SBY(PQ9106, 2A)
5V
VDD_RTC(PMU LDO4) 1.8V
PMU to T3 VDD_1V8_GEN(PMU SWIO)
1.2V
PMU to T3 VDD_CORE(PMU SW1)
1.1V
PMU to T3 VDD_PMU_LDO7(T3 AVDD_PLLx)
PMU to T3 CLK_32K_IN(PMU)
T3 XTAL System Clock(T3 26MHz)
5.0V
EN_VDD_1V35(EN_DDR, PMU GPIO7)
1.8V
B +1.8V B
1.35V
+1.2V(for DDR3L 1.35V)
5.0V
PMU to PU8100 EN_3V3_SYS(PMU GPIO6)
1.8V
T3 to Q1603 EN_3V3_EMMC(T3)
2.85V
VCORE_eMMC_S(Q1603)
PMU to T3 VDD_DDR_HS(PMU LDO8) 1.0V
1.05V
PMU to T3 VDD_SATA(PMU LDO2)
1.05V
PMU to T3 VDD_PEX(PMU LDO1) (EEPROM OFF)
1.8V
PMU to T3 SYS_RESET#(PMU)
1.8V
A
T3 to PMU CPU_PWR_REQ(TERGA) A
1.0V
PMU to T3 VDD_CPU(PMU SW)
+1.05VS/+1.2VS/+1.5VS
OTHERS (PMU LDOs, Switched Rails)
Title :Timing
Custom
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
<1>PWR_SW#
TF300T T3 Button
Power Latch <2A>P_+3VA_EN
power on/off map <10B>+3VSUS P-MOS
SI2305DS VDD_FUSE T30 <10B>+3VSUS LDO 2.85V
1201 LDO <2B>+3VA_EC EN_VDD_FUSE EN RT9193-2HGU5 AVDD_CAM1
CAM1_LDO_EN EN
<10B>VDD_PNL(+3VSUS) P-MOS
<2A>P_+3VA_EN SI2305DS VCC_LCD3V3 LCD panel
<10B>+3VSUS LDO 2.85V
D
EN_VDD_PNL EN RT9193-2HGU5 D
AVDD_VCM
Adapter
CAM2_LDO_EN EN
LDO +3V_PAL <10B>+3VSUS P-MOS
A/D IN SI2305DS WiFi_BT_VCC_3V3 WIFI+BT
EN_3V3_COM EN
AC_BAT_SYS
Charger BAT SW1 <10B>+3VSUS(+3VSO1)
Buck BQ24740
Boost
TI
TPS51125ARGER
<3>+5VSUS(+5VSO1)
EN1 SW2 N-MOS
IRFHS8342TRPBF **
EN2 <5>EN_5V0_SBY <5A>VDD_5V0_SBY
EN
LDO <4>+3VA
Battery N-MOS
Pack IRFHS8342TRPBF *** P-MOS
<OFF>EN_5V0_SYS VDD_5V0_SYS SI2305DS VDDIO_HDMI_CONN_AIO
EN
HDMI_VBUS_EN_AIO EN
<2C> P_+5VSO_EN_10
<10A> EN_3V3_SYS
P-MOS
SI2305DS <OFF>+5VSUS_DOCK
<OFF>DOCK_IN
EN
P-MOS
C SI2305DS <11>VCC_TCH C
<10B>+3VSUS EN
P-MOS
SI2305DS <6A>VDD_1V2_SOC T30
<6>EN_VDD_SOC EN
EN2
EN1 <13>CPU_PWR_REQ CPU_PWR_REQ
SLEEP CORE_PWR_REQ CORE_PWR_REQ
BAT P-MOS NRESPWRON <12>SYS_RESET# SYS_RESET_N
SI2305DS VCC_LED LCD panel backlight PWR_INT# PWR_INT# PWR_INT_N
EN_VDD_BL EN CLK32KOUT <9>CLK_32K_IN CLK_32K_IN
<7>VDD_1V8_GEN P-MOS <5A>VDD_5V0_SBY

SI2305DS V5IN SW <0FF>VDD_CPU VDD_CPU
VDDIO_CAM
<OFF>EN_1V8_CAM EN VCC1 SW1 <0FF>VDD_1V2_GEN VDD_CORE
VCC2 SW2 <9>+1.2V
VCCIO SWIO <7>VDD_1V8_GEN VDD_1V8_GEN

@
VCC7 VRTC <5>VDD_1V8_PMU_VRTC
B
<10>+3VSUS(+3VSO1) LDO1 <11>VCORE_eMMC_S(core power) B
VCC6
LDO2 <OFF>VDD_SD_S VDD_SATA
LDO3 <OFF> VDDIO_SDMMC1

VCC5
LDO4 <4>VDD_RTC VDD_RTC
***
<OFF>VDD_5V0_SYS
VCC4 LDO5 <OFF>VDD_PMU_LDO5 VDDIO_SDMMC1(3.3V)
Sequence: LDO6 <OFF>VDD_PMU_LDO6 AVDD_DSI_CSI(1.2V)
<1>--><2>--><2A>--><2B>--><2C>--><2D>--> <7>VDD_1V8_GEN
VCC3 * ***
<3>--><4>--><5>--><6>--><6A>--><7>--><8>--> LDO7 <9>VDD_PMU_LDO7(T3 AVDD_PLLx) AVDD_PLLx
<9>--><10>--><10A>--><10B>--><11>--><12>--><13>
LDO8 <11>VDD_DDR_HS VDD_DDR_HS
VDDIO
GPIO0 <5>EN_5V0_SBY
VBACKUP GPIO2 <6>EN_VDD_SOC
VDD_CELL_LCL GPIO6 <10>EN_3V3_SYS
AVDD_USB
GPIO7 <9>EN_DDR
VDD_DDR_RX
AVDD_HDMI
@ VDDIO_GMI
<5>VDD_1V8_PMU_VRTC GPIO4
VDD_PEX_CTL
GPIO5
<10B>+3VSUS VDDIO_LCD
AP_OVERHEAT# PWRDN(power down)
<9>+1.2V VDDIO_DDR
HOT_RST HOT_RST
HVDD_PEX HVDD_PEX(3.3V)
<2D>PMU_ONKEY# PWRON
EEPROM VDD_FUSE VPP_FUSE(3.3V)
A A
time slot duration: 2ms
5 4 3 2
5 4 3 2 1
VDD_PMU_LDO4_1V2
BOM 需需需需 02004-00120000 C.S T30-R-A3 FCBGA-728
1.2V MAX77663 LDO4 VDD_RTC 1 2 C1 N/A
VDD_RTC 0.1U6.3VX5RC1K
0620
0906 NV add
VDD_CPU 1 2 C2 N/A
0.1U6.3VX5RC1K VDD_CPU 1 2 C5 N/A
0.9~1.0V VDD_1V0_GEN MAX77663 SD0(6A) U2A
1.2V
1 2 C4 N/A
0.1U6.3VX5RC1K 1
4.7U6.3VX5RC2M
2 C29 /@
VDD_CPU 1/22 CORE POWER
(1.0 ~ 1.2V) 1 2 C6 N/A 4.7U6.3VX5RC2M
A2 V22 VDD_RTC 0.1U6.3VX5RC1K 1 2 C9 N/A
GND_001 VDD_RTC_0001
A29 V23 1 2 C8 N/A 4.7U6.3VX5RC2M
GND_002 VDD_RTC_0002 4.7U6.3VX5RC2M
AC11 1 2 C11 N/A
GND_003
AC14 1 2 C7 N/A 8P25VNPOC1J
D GND_004 4.7U6.3VX5RC2M
D
AC17
GND_005
AC2 1 2 C3 N/A
GND_006 4.7U6.3VX5RC2M
AC20
GND_007
AC23 1 2 C10 N/A
AC26
GND_009
AC29 1 2 C13 N/A
AC5
GND_011
AC8
GND_012
AF11
GND_013
VDD_1V2_SOC
AF14
GND_014 0.9~1.0V
AF17 (0.9 ~ 1.0V)
GND_015
1.0~1.2V MAX77663 SD1(3A) AF2
GND_016 VDD_CPU_01
H10 VDD_CPU
VDD_CORE AF20 J10
GND_017 VDD_CPU_02
AF23 J8
GND_018 VDD_CPU_03
AF26 K8
GND_019 VDD_CPU_04
AF29 K9
GND_020 VDD_CPU_05
AF5 M7
GND_021 VDD_CPU_06
AF8 M8
GND_022 VDD_CPU_07
AJ1 M9
GND_023 VDD_CPU_08
AJ11 N8
GND_024 VDD_CPU_09
AJ14 N9
GND_025 VDD_CPU_10
AJ17
GND_026 VDD_CPU_11
P14 0906 NV add
AJ2
GND_027 VDD_CPU_12
P15 1220 add
AJ20 P16
GND_028 VDD_CPU_13
0622 +3VSUS_CPU Unmount VDD_FUSE
AJ23
GND_029 VDD_CPU_14
P17
AJ26 R14 VDD_CORE 1 2 C14 N/A VDD_CORE 1 2 C15 N/A VDD_CORE 1 2 C16 N/A
R1 GND_030 VDD_CPU_15 22U6.3VX5RC5M 0.1U6.3VX5RC1K 4.7U6.3VX5RC2M
AJ29 R17
GND_031 VDD_CPU_16
1 0R2J 2 /@ AJ30 T14 1 2 C17 N/A 1 2 C12 N/A 1 2 C19 N/A
GND_032 VDD_CPU_17 22U6.3VX5RC5M 0.1U6.3VX5RC1K 4.7U6.3VX5RC2M
AJ5 T17
GND_033 VDD_CPU_18
AJ8 U14 1 2 C20 N/A 1 2 C21 /@
U1 GND_034 VDD_CPU_19 0.1U6.3VX5RC1K 4.7U6.3VX5RC2M
AK2 U15
GND_035 VDD_CPU_20
5 1 AK29 U16 1 2 C22 N/A 1 2 C23 /@
IN OUT GND_036 VDD_CPU_21 4.7U6.3VX5RC2M 0.1U6.3VX5RC1K
2 B1 U17
GND GND_037 VDD_CPU_22
4 3 B11 1 2 C18 N/A
DIS EN GND_038 4.7U6.3VX5RC2M
B14
GND_039
1
0720 NCT3521U N/A B17 1 2 C26 N/A

B2
R2 GND_041
C B20 1 2 C27 N/A C
2
VDD_FUSE_DISABLE GND_042
1 300R1F 2 N/A B23 4.7U6.3VX5RC2M
GND_043
B26 1 2 C28 N/A
C24 GND_044 4.7U6.3VX5RC2M
B29
0.1U6.3VX5RC1K GND_045
B30 1 2 C25 N/A
N/A VDDIO_UART GND_046 33P25VNPOC1J
B5
GND_047 1.0~1.2V
B8
GND_048
E11 (1.0 ~ 1.2V)
GND_049
1
E14 M13 VDD_CORE

R3 GND_050 VDD_CORE_01
100KR1J
Unmount E17
GND_051 VDD_CORE_02
M15
E2 M17
/@ GND_052 VDD_CORE_03
E20 M19
GND_053 VDD_CORE_04
E23 N12
2
GND_054 VDD_CORE_05
10 EN_VDD_FUSE E26 N14
GND_055 VDD_CORE_06
E29 N16
GND_056 VDD_CORE_07
E5 N18
GND_057 VDD_CORE_08
E8 N7
GND_058 VDD_CORE_09
H11 P13
GND_059 VDD_CORE_10
H14 P19
GND_060 VDD_CORE_11
H17 R12
GND_061 VDD_CORE_12
1
H2 R18
R4 GND_062 VDD_CORE_13
H20 R7
100KR1J GND_063 VDD_CORE_14
H23
GND_064 VDD_CORE_15
R8 0614 remove VDD_CPU_SENSE
N/A H26 R9
GND_065 VDD_CORE_16
H29 T13
Note: Place the 0402 shunts close to Tegra side
2
GND_066 VDD_CORE_17
H5 T19
GND_067 VDD_CORE_18
H8 T8
GND_068 VDD_CORE_19
L2 T9
GND_069 VDD_CORE_20
0720 default disable FUSE function L23
L26
GND_070 VDD_CORE_21
U18
V13 PJP1
GND_071 VDD_CORE_22 SHORT_PIN
L29 V15
GND_072 VDD_CORE_23 VDD_CPU_SENSE_T30 VDD_CPU_SENSE
L5 V17 2 1 /@ VDD_CPU_SENSE 51
GND_073 VDD_CORE_24
L8 V19
GND_074 VDD_CORE_25 P05
M12
GND_075 VDD_CORE_26
W14 MAX77663 SD0 sense
M14 W16 P05
GND_076 VDD_CORE_27 GND_CPU_SENSE_T30
M16 W18 2 1 /@ GND_CPU_SENSE GND_CPU_SENSE 51
GND_077 VDD_CORE_28
M18
GND_078 PJP2
N13
B GND_079 SHORT_PIN
B
N15
GND_080 Short Copper
N17
GND_081
N19
GND_082
P12
GND_083
P18
GND_084 Short Copper
P2 PJP3
GND_085 SHORT_PIN
P23
GND_086 VDD_CPU_SENSE_T30 VDD_CORE_SENSE_T30
P26 AB12 2 1 /@ VDD_CORE_SENSE
GND_087 VDD_CPU_SENSE VDD_CORE_SENSE 51
P29
GND_088 GND_CPU_SENSE_T30 P05
P5
GND_089 GND_CPU_SENSE
AB15 MAX77663 SD1 sense
P8 P05
GND_090 GND_CORE_SENSE_T30 GND_CORE_SENSE
R13 2 1 /@
GND_091 GND_CORE_SENSE 51
R15
GND_092 PJP4
R16
GND_093 SHORT_PIN
R19 AB16
GND_094 VVDD_CPU_SENSE
T12
GND_095
T15 AA23
GND_096 VGND_CORE_SENSE
T16
GND_097
T18
GND_098
U13
GND_099
U19
GND_100
U2
GND_101
U23
GND_102 VDD_CORE_SENSE_T30
U26 W23
GND_103 VDD_CORE_SENSE
U29
GND_104 GND_CORE_SENSE_T30
U5 W22
GND_105 GND_CORE_SENSE
U8
GND_106
V12
GND_107
V14
GND_108 VDD_FUSE
V16
GND_109
V18
GND_110
W12 (3.3V) AB8
GND_111 VPP_FUSE
W13
GND_112 VPP_KFUSE
W15 (3.3V) AA4
GND_113 VPP_KFUSE
W17
GND_114
1
W19
GND_115
1
1
Y2 R6
GND_116 R5 1KR1J C30
A Y23 A
GND_117 10KR1J /@ 0.1U6.3VX5RC1K
Y26
2
GND_118 N/A N/A

Y29
2
GND_119
Y5
2
GND_120
Y8
GND_121
Unmount
T30L-R-P-A3
T30
Title : T30 Core & Fuse
C
ME370T 2.0
Date: Saturday, March 24, 2012 Sheet 5 of 60
5 4 3 2 1
5 4 3 2 1
MAX77663 LDO8
1.2V VDD_PMU_LDO8_1V2 VDD_PMU_LDO8_1V2_CPU 1.2V VDD_PMU_LDO8_1V2_CPU AVDD_PLLA_P_C Power from MAX77663
1.2V VDD_PMU_LDO8_1V2_CPU AVDD_PLLU_D MAX77663 LDO8 1.2V to T30 AVDD_PLLx
1.2V Remove AVDD_PLLX MAX77663 SD2 1.8V (VDD_1V8_PMU_DCDC2) to VDD_1V8_GEN
1.2V Remove AVDD_PLLM
Signal to & from MAX77663

R8
1.8V VDD_1V8_GEN 1 2 N/A VDD_1V8_GEN_CPU 1.8V VDD_1V8_GEN_CPU VDDIO_SYS SYS_RESET# from MAX77663 nRSTIO, check reset circuit(p.32) and PMU side
0R3J
L7 PWR_INT# from MAX77663 nIRQ, check PU resister in PMU side(100k PU to VDD_1V8_GEN)
D D
MAX77663 SD2 (2A) N/A
1.8V VDD_1V8_GEN_CPU 1 2 AVDD_OSC
CORE_PWR_REQ to MAX77663 EN1, check PU resister in PMU side(100k PU to VDD_1V8_GEN)
VDD_1V8_PMU_DCDC2 30Ohm/100Mhz
0906 NV change CPU_PWR_REQ to MAX77663 EN2, check PD resister in PMU side(100k PD)
U2B
CLK_32K_IN from MAX77663 GPIO4, check PU resister in PMU side(100k PU to VDD_1V8_GEN)
2/22 OSC, PLL & SYS
1.8V
(1.8V)
AVDD_OSC F30 T30 XTAL_IN
AVDD_OSC XTAL_IN
R9 N/A
PMU VDD_PMU_LDO7 2MR2J
T29 XTAL_OUT 1 2
XTAL_OUT
R1.0 1.1V
1
R10 Change
R1.2 1.2V 0R1J
N/A X1 N/A
12MHz X1 change to 12MHz XTAL
2
XTAL_OUT_R 1 3 Change
1
AVDD_OSC AVDD_PLLA_P_C 1.2V
(1.1V)
AVDD_PLLA_P_C H13 AUDIO&PERIPHERAL H12 C33
4
AVDD_PLLA_P_C NC37 12P50VNPOC2J
Remove C35, C36 remove PLL_S_PLL_LF
2
1
C31 C34 for AVDD_PLLX & 1.2V N/A

(1.1V)
4.7U6.3VX5RC2M 0.1U6.3VX5RC1K J12 CPU 0721
N/A N/A
AVDD_PLLM AVDD_PLLX C32 C32 & C33 change to 12pF
2
1.2V 12P50VNPOC2J TXC/7V12000011

(1.1V)
J13
AVDD_PLLM
DRAM N/A
AVDD_PLLU_D VDDIO_SYS
Change
(1.1V)
1.2V
AVDD_PLLU_D AA8
AVDD_PLLU_D
USB&DSI
VDDIO_SYS VDDIO_SYS
1
C37 C38
(1.1V)
C 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K AD7 C
N/A N/A AVDD_PLLU_D2
2
1
PJ1 /@ (1.05V) 1.05V
2 1 AVDD_PLLE_no_use AA22 PCIE&SATA R11 R12
AVDD_PLLE 1KR1J 1KR1J
N/A N/A 1227 R0732 100K -> 10K
SHORT_PIN
2
VDDIO_SYS
Short Copper PWR_I2C_SCL
M24
PWR_I2C_SCL PWR_I2C_SDA PWR_I2C_SCL 26,27,49,50
N27
PWR_I2C_SDA
1
PWR_I2C_SDA 26,27,49,50
N28 SYS_RESET# R14
SYS_RESET_N SYS_RESET# 20,32,50
100KR1J
1 R16 2 JTAG_TRST# N/A
Unmount 1KR1J N/A
2
M22 PWR_INT# 0229 NV change
PWR_INT_N PWR_INT# 50
N25 CORE_PWR_REQ 10k -> 100k
CORE_PWR_REQ CORE_PWR_REQ 14,50
1.8V R24 CPU_PWR_REQ CPU_PWR_REQ 50
(1.8/3.3V) CPU_PWR_REQ
VDDIO_SYS K29
VDDIO_SYS_1
1
POR Deep Sleep K30
VDDIO_SYS_2 SYS_CLK_REQ
T23
VDDIO_SYS R15
PUPD PinState PUPD After Wake R22 CLK_32K_IN 100KR1J
CLK_32K_IN CLK_32K_IN 50
U27 CLK_32K_OUT CLK_32K_OUT 40,41,43 N/A
CLK_32K_OUT
COL0 UP 100K PU Config. Reset
2
COL1 UP 100K PU Config. Reset J30 KB_COL0 PCBID
KB_COL00 KB_COL1 PWR_SW#_BUTTON_R 33
COL2 UP 100K PU Config. Reset KB_COL01
N26
V25 KB_COL2 CPU_PWR_REQ PD ID5 ID4 ID3
KB_COL02 VOL_UP_BUTTON 32
KB_COL03
R26 KB_COL3
VOL_DWN_BUTTON 32 100k in KAI design 0 0 0 for ME370T SR3
COL3 UP 100K PU Config. Reset W26 PCB_ID2 SNN_KB_COL4
KB_COL04 PCB_ID5 SNN_KB_COL5
KB_COL05
R30 0802 ID5
COL4 UP 100K PU Config. Reset P27 SNN_KB_COL6 PCBID
KB_COL06 PCB_ID3 SNN_KB_COL7
N29
COL5 UP 100K PU Config. Reset KB_COL07 ID2 = 0 for BCM47511
ID2 = 1 for BCM4751
COL6 UP 100K PU Config. Reset T26 KB_ROW0
KB_ROW00 KB_ROW1 KB_ROW0 32,33
M23
B KB_ROW01 PCB_ID4 KB_ROW2 B
COL7 UP 100K PU Config. Reset KB_ROW02
V27
M28 SNN_KB_ROW3 PCBID
KB_ROW03 NFC_GPIO4_R 44
ROW0 DOWN 100K PD Config. Reset N24 PCB_ID0 SNN_CAM_I2C_SEL0
KB_ROW04
N30 PCB_ID1 SNN_CAM_I2C_SEL1 ID1 ID0
KB_ROW05
ROW1 DOWN 100K PD Config. Reset KB_ROW06
T24 CAM1_LDO_EN CAM1_LDO_EN
CAM1_LDO_EN 31 0 0 AW-NH660 BCM4330
T25 NC CAM2_LDO_EN
KB_ROW07 CAM2_LDO_EN CAM3_LDO_EN
R27 CAM2_LDO_EN 31 ROW10, 11 for charger control
M26 SNN_CAM1_AF_PWDN*
SMB347_USB51HC 33 Pin to Pin 1 0 AW-NH665 BCM4330
KB_ROW09 SNN_CAM2_AF_PWDN*
R25 SMB347_SUSP 33
M27 CAM3_AF_PWDN*
KB_ROW11 TEMP_ALERT#_KAI 26
ROW4 DOWN 100K PD Config. Reset N23 LL_BAT_T30 SNN_KB_ROW12
KB_ROW12 SNN_KB_ROW13 LL_BAT_T30 33 VDD_1V8_GEN_CPU
V28
KB_ROW13 1V8_O_LID# SNN_KB_ROW14
M25 1V8_O_LID# 25 TEMP_ALERT#_KAI form Thermal Sensor
V26 SNN_KB_ROW15
KB_ROW15 NFC_VEN 44
ROW6 DOWN 50K PD Config. Reset PCB_ID0 1 100KR1J 2 R18 /@/PCBID/WIFI
1 100KR1J 2 R17 /PCBID/WIFI
ROW7 DOWN 50K PD Config. Reset Unmount
T27 JTAG_TCK JTAG_TCK 24
JTAG_TCK JTAG_TDI PCB_ID1
ROW8 DOWN 50K PD Config. Reset R29 JTAG_TDI 24 1 100KR1J 2 R19 /PCBID/WIFI
JTAG_TDI JTAG_TDO
T28 JTAG_TDO 24 1 100KR1J 2 R20 /@/PCBID/WIFI
JTAG_TDO JTAG_TMS
ROW9 DOWN 50K PD Config. Reset JTAG_TMS
R23 JTAG_TMS 24 Unmount
T22 JTAG_TRT_N 1 2 R21
JTAG_TRST_N JTAG_TRST# 24
ROW10 DOWN 50K PD Config. Reset V24 JTAG_RTCK 0R1J /@ JTAG_RTCK 24 JTAG_TRT_N PCB_ID2 1 100KR1J 2 R22 /PCBID/GPS
JTAG_RTCK
Unmount 1 100KR1J 2 R27 /@/PCBID/GPS
ROW11 DOWN 50K PD Config. Reset Unmount
M30 THERMD_N THERMD_N 26
THERM_DN THERMD_P PCB_ID3
ROW12 DOWN 50K PD Config. Reset M29 THERMD_P 26 1 100KR1J 2 R23 /@/PCBID/PROJECT
THERM_DP
1
1 100KR1J 2 R25 /PCBID/PROJECT
ROW13 DOWN 50K PD Config. Reset N22 R24 Unmount
OWR 100KR1J
ROW14 DOWN 50K PD Config. Reset AC18 N/A PCB_ID4 1 100KR1J 2 R31 /@/PCBID/PROJECT
HDMI_CEC R26 N/A 1 100KR1J 2 R28 /PCBID/PROJECT
2
ROW15 DOWN 50K PD Config. Reset R28 TEST_MODE_EN 1 0R1J 2 Unmount
TEST_MODE_EN
PCB_ID5 1 100KR1J 2 R30 /@/PCBID/PROJECT
1 100KR1J 2 R29 /PCBID/PROJECT
<Value>
A T30L-R-P-A3 A
N/A

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
R35
3.3V +3VSUS 1 2 N/A +3VSUS_CPU 3.3V +3VSUS_CPU VDD_3V3_GMI
0R3J
TPS63020 buck-boost
D D
1 2 C39 N/A U2D

VDD_3V3_GMI
10U6.3VX5RC3M
4/22 GMI
1 2 C40 N/A
0.1U6.3VX5RC1K (1.8/3.3V)
VDD_3V3_GMI C1 F8 NAND_D0
VDDIO_GMI_1 GMI_AD00 NAND_D0 18
C2 G6 NAND_D1
D1 D3 NAND_D2
NAND_D3
3.3V GMI_AD03
GMI_AD04
E4
G2 NAND_D4
NAND_D3
NAND_D4
18
18
Boot Straps
D2 NAND_D5
GMI_AD05 NAND_D5 18
B3 NAND_D6 PCBID
GMI_AD06 NAND_D6 18
G1 NAND_D7
GMI_AD07 NAND_D7 18 ID7 ID6
POR Deep Sleep H6 LCD_BL_PWM LCD1_BL_PWM
LCD_BL_PWM 23
GMI_AD08
VDDIO_GMI
GMI_AD09
F4 NC PWM_3D 0 0 ALC5631Q
PUPD PinState PUPD After Wake E7 LCD1_BL_EN
GMI_AD10 TS_WAKEUP# EN_VDD_BL1 0 1 WM8903
F3 TS_WAKEUP# 29,48
GMI_AD11 TS_IRQ# TS_IRQ* 1 0 ALC5642
AD00 None Z Disable Reset GMI_AD12
F5 TS_IRQ# 29
F7 1 1 Reserved
GMI_AD13 TS_RESET#_3V3 TS_RESET*
J2 TS_RESET#_3V3 29
F1 CARD_PEX_RST#
TS_WAKEUP# for TS 5V enable (PD 1M on page.48) PCBID
AD03 None Z Disable Reset ID8 Reserved VDD_3V3_GMI
H4 NC SPI4_SCK
GMI_A16 NC SPI4_DOUT
AD04 None Z Disable Reset GMI_A17
J6
C4 NC SPI4_DIN PCB_ID6 1 100KR1J 2 R37 /@/PCBID/CODEC
GMI_A18 NC SPI4_CS1
AD05 None Z Disable Reset J3 1 100KR1J 2 R36 /PCBID/CODEC
GMI_A19
Unmount
AD06 None Z Disable Reset
J4 NC PCB_ID6 SNN_GMI_CS0 PCB_ID7 1 100KR1J 2 R38 /PCBID/CODEC
GMI_CS0_N NC PCB_ID7 CHARGER_STAT
AD07 None Z Disable Reset K7 1 100KR1J 2 R39 /@/PCBID/CODEC
GMI_CS1_N NC PCB_ID8 SNN_GMI_CS2
GMI_CS2_N
F6
NC LCD_LANDSCAPE
Unmount
AD08 None Z Disable Reset GMI_CS3_N
A3
D6 SNN_TP_IRQ# PCB_ID8 1 100KR1J 2 R40 /@/PCBID
GMI_CS4_N SNN_GMI_CS6
AD09 None Z Disable Reset J5 1 100KR1J 2 R41 /PCBID
GMI_CS6_N FTM_MODE# WW_WAKE*
J7
GMI_CS7_N
C AD10 DOWN 100K PD Disable Reset C
AD11 DOWN 100K PD Disable Reset E6 NAND_ALE R43 N/A

GMI_ADV_N NAND_ALE 18
330KR1J
AD12 None Z Disable Reset A4 NAND_CLE NAND_CLE 18,26 LCD_BL_PWM 1 2
GMI_CLK
AD13 None Z Disable Reset GMI_RST_N
D4
B4
SNN_GMI_RST*
RECOVERY_MODE*
NAND_CLE for AP thermal shut down in KAI
GMI_WAIT MFG_MODE_R
AD14 None Z Disable Reset GMI_WP_N
D5
AD15 None Z Disable Reset GMI_IORDY

C3
A16 None Z Config. Hold F2 NAND_RE#

GMI_OE_N NAND_RE# 18
G4 NAND_WE#
GMI_WR_N NAND_WE# 18
A17 None Z Config. Hold
A18 None Z Config. Hold GMI_DQS
G3
A19 None Z Config. Hold VDD_3V3_GMI VDD_3V3_GMI

SNN_GMI_DQS
CS0 UP 100K PU Config. Reset
CS1 UP 100K PU Config. Reset R44, R45 (GEN2_I2C PU) placed on P.29
CS2 UP 100K 1 Disable Reset VDD_3V3_GMI
CS3 UP 100K 1 Disable Reset G5 GEN2_I2C_SCL
GEN2_I2C_SCL GEN2_I2C_SDA GEN2_I2C_SCL 29
CS4 UP 100K PU Config. Reset GEN2_I2C_SDA
G7
GEN2_I2C_SDA 29 TS I2C
1
CS6 UP 100K PU Disable Reset
R316
CS7 UP 100K PU Config. Reset 1MR1J
N/A
ADV_N None 1 Disable Reset
2
CLK None 0 Disable Reset FTM_MODE# 1 T51 /@
T30L-R-P-A3 tpc40t_np_68
B B
RST_N UP 100K 0 Disable Reset N/A
WAIT UP 100K PU Disable Reset

WP_N UP 100K PU Config. Reset
IORDY UP 100K PU Config. Reset
OE_N None 1 Disable Reset
WR_N None 1 Disable Reset
DQS None Z Disable Reset
A A
Title : T30 GMI IF

C
ME370T 2.0
Date: Wednesday, March 21, 2012 Sheet 7 of 60
5 4 3 2 1
5 4 3 2 1
U2C
3/22 DDR3/LPDDR2
(1.2/1.25/1.35/1.5) DDR_DQ[31..0] 19
G16 D24 DDR_DQ0
from PMIC +1.35V VDDIO_DDR VDDIO_DDR
G19
VDDIO_DDR_01 DDR_DQ00
B25 DDR_DQ1
VDDIO_DDR_02 DDR_DQ01 DDR_DQ2
0620 H15
A25
MAX77663 SD3(2A) H16 D21 DDR_DQ3
H18 A24
H19 A21
H21 A22
H22 B22
D VDDIO_DDR_08 DDR_DQ07 DDR_DQ8 D
1.35V J15
C15
MAX77663 LDO2 J16 A13 DDR_DQ9
2.8V VDD_PMU_LDO2_2V8 VDD_DDR_RX J18
J19
C12
B13 DDR_DQ11
J21 C13
J23 A10
from PMIC K22
K23
B10
C10 DDR_DQ15
G22
DDR_DQ16 DDR_DQ17
D22
DDR_DQ17 DDR_DQ18
D25
DDR_DQ18 DDR_DQ19
F23
DDR_DQ19 DDR_DQ20
G21
DDR_DQ20 DDR_DQ21
E25
DDR_DQ21 DDR_DQ22
MAX77663 LDO0 DDR_DQ22
F24
DDR_DQ23
1.0V VDD_PMU_LDO0_1V0 VDD_DDR_HS
A27
(2.8/3.3V) DDR_DQ23
F22
F13 DDR_DQ24
VDD_DDR_RX VDD_DDR_RX DDR_DQ24
G13 DDR_DQ25
DDR_DQ25 DDR_DQ26
G10
DDR_DQ26 DDR_DQ27
from PMIC DDR_DQ27
D13
G9 DDR_DQ28
DDR_DQ28 DDR_DQ29
F10
DDR_DQ29 DDR_DQ30
D10
DDR_DQ30 DDR_DQ31
F12
DDR_DQ31
VDDIO_DDR 1 2 C41 N/A 3.3V DDR_DM[3..0] 19

0.1U6.3VX5RC1K C22 DDR_DM0
DDR_DM0
1 2 C43 N/A D12 DDR_DM1
0.1U6.3VX5RC1K DDR_DM1 DDR_DM2
E22
DDR_DM2
1 2 C44 N/A G12 DDR_DM3
4.7U6.3VX5RC2M (1.00V) DDR_DM3
VDD_DDR_HS E10
VDD_DDR_HS_1
1 2 C42 N/A H9
4.7U6.3VX5RC2M VDD_DDR_HS_2 DDR_DQS0N
B24
DDR_DQS0N DDR_DQS0P DDR_DQS0N 19
1 2 C45 N/A C24
4.7U6.3VX5RC2M DDR_DQS0P DDR_DQS0P 19
1 2 C46 N/A B12 DDR_DQS1N
10U6.3VX5RC3M DDR_DQS1N DDR_DQS1P DDR_DQS1N 19
A12
DDR_DQS1P DDR_DQS1P 19
C 1 2 C47 N/A C
10U6.3VX5RC3M E24 DDR_DQS2N
DDR_DQS2N DDR_DQS2N 19
1 2 C48 N/A 1.0V D23 DDR_DQS2P
10U6.3VX5RC3M DDR_DQS2P DDR_DQS2P 19
E12 DDR_DQS3N
0503 DDR_DQS3N DDR_DQS3P DDR_DQS3N 19
D11
DDR_DQS3P DDR_DQS3P 19
DDR_A[14..0] 19
D20 DDR_A0
C60 N/A DDR_A00 DDR_A1
VDDIO_DDR 1 2 G15
4.7U6.3VX5RC2M DDR_A01 DDR_A2
A18
1 2 D14
B19
1 2 A16
C21
1 2 A15
D15
DDR_A08 DDR_A9
C16
DDR_A09 DDR_A10
E16
DDR_A10 DDR_A11
D18
DDR_A11 DDR_A12
E15
DDR_A12
VDD_DDR_HS 1 2 C49 N/A A19 DDR_A13
B16
DDR_A14
1 2 C50 N/A G18 DDR_RAS_N VDDIO_DDR
VDD_DDR_RX DDR_RAS_N DDR_RAS_N 19
4.7U6.3VX5RC2M D17 DDR_CAS_N DDR_CAS_N 19
DDR_CAS_N
D19 DDR_WE_N DDR_WE_N 19 Unmount
DDR_WE_N
F15 DDR_BA0_N DDR_BA0_N 19 DDR_RESET_N 1 10KR1J 2 R48 /@

DDR_BA0 DDR_BA1_N
E21 DDR_BA1_N 19
DDR_BA1 DDR_BA2_N
F21 DDR_BA2_N 19
DDR_BA2
0906 NV change to UM
F16 DDR_CS0_N DDR_CS0_N 19
DDR_CS0_N DDR_CS1_N
E19 DDR_CS1_N 19
DDR_CS1_N
D16 DDR_ODT0_N DDR_ODT0_N 19
DDR_ODT0
F18
B DDR_ODT1 B
No Use
F19 DDR_CKE0 DDR_CKE0 19
DDR_CKE0
E18
DDR_CKE1
No Use
B18 DDR_CLKN DDR_CLKN 19
DDR_CLK_N DDR_CLKP
C18 DDR_CLKP 19
DDR_CLK
1
C19 DDR_RESET_N DDR_RESET_N 19
DDR_RESET R49 R50 R51
D27 DDR_QUSE0 1 0R1J 2 45.3R2F 45.3R2F
DDR_QUSE0 DDR_QUSE1 /@ N/A N/A
D26
DDR_QUSE1 DDR_QUSE2
E9 1 0R1J 2
2
DDR_QUSE2 DDR_QUSE3 R52 /@
F9
DDR_QUSE3
DDR_CLK_R_C
Unmount
1
R53 C51
B21 DDR_COMP_PU 1 40.2R2F 2 N/A VDDIO_DDR 0.01U10VX7RC1K
DDR_COMP_PU N/A
2
B15 DDR_COMP_PD 1 2 N/A
DDR_COMP_PD 40.2R2F
R54
T30L-R-P-A3
N/A
A A
Title : T30 DDR

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
0502
T30 VI T30 GPIO T30S pin POR Deep Sleep
MAX77663 LDO7 VDDIO_VI
1.2V VDD_PMU_LDO7_1V2 AVDD_DSI_CSI PUPD PinState PUPD After Wake
VI_MCLK PRO_RST# BB AA1
D00 DOWN 15K PD Disable Hold
VI_PCLK HDMI_VBUS_EN_OC# BB W5
VI_HSYNC EN_VDDIO_SD BB W5 D02 DOWN 15K PD Disable Hold
VI_VSYNC EN_VDD_MC BB AA3
AVDD_DSI_CSI
D03 DOWN 15K PD Config. Hold
D D
VI_DO0 BAT_IN_CPU# BB V4 D05 DOWN 15K PD Disable Hold
1
GPIO
1
C53 VI_DO1 COMPASS_DRDY BB AC11
C52 4.7U6.3VX5RC2M VI_DO2 ALS_INT#_MB BB AF6 D06 DOWN 15K PD Disable Hold
0.1U6.3VX5RC1K N/A VI_DO3 GS_INT BB AA9
2
2
N/A VI_DO4 LVDS_SHTDN# LCD AP18 D07 DOWN 15K PD Disable Hold
VI_DO5 CAM_RST_2M CAM AM14
VI_DO6 EN_VDD_PNL UART AG33 D08 DOWN 15K PD Disable Hold
VI_DO7 DSP_RST# BB V8
VI_DO8 EN_VDD_FUSE UART AM36 D09 DOWN 15K PD Disable Hold
VI_DO9 EN_HVDD_PEX XX X
VI_DO10 DSP_PWDN# CAM AM16 D10 DOWN 15K PD Disable Hold
VI_DO11 SDMMC1_WP AUDIO D36
0620 D11 DOWN 15K PD Disable Hold
MCLK DOWN 15K PD Disable Hold
U2H
7/22 DSI & CSI PCLK DOWN 15K PD Disable Hold

(1.2V) HSYNC DOWN 15K PD Disable Hold
AVDD_DSI_CSI AB6 AC4 CSI_CLKAN
AVDD_DSI_CSI CSI_CLKAN CSI_CLKAN 31
AD4 CSI_CLKAP VSYNC DOWN 15K PD Disable Hold
CSI_CLKAP CSI_CLKAP 31
1.2V AD3 CSI_D1AN
CSI_D1AN CSI_D1AN 31
CSI_D1AP
CSI_D1AP
AD2 CSI_D1AP 31 Camera 1 (Rear)
AE2 CSI_D2AN
CSI_D2AN CSI_D2AN 31
AE3 CSI_D2AP
CSI_D2AP CSI_D2AP 31
C AG3 CSI_CLKBN C
CSI_CLKBN CSI_CLKBN 31
AG2 CSI_CLKBP
CSI_CLKBP CSI_CLKBP 31
CSI_D1BN
AD1 CSI_D1BN
CSI_D1BN 31
Camera 2 (Front)
AE1 CSI_D1BP
CSI_D1BP CSI_D1BP 31
AH2
CSI_D2BN
AH1
CSI_D2BP
AA1
DSI_CLKAN
AB1
DSI_CLKAP
AB2
DSI_D1AN AVDD_DSI_CSI
AB3
DSI_D1AP
AA2
DSI_D2AN
2
AA3
DSI_D2AP R56
453R2F
N/A
1
AG4 DSI_CSI_RUP
DSI_CSI_RUP
AJ3 DSI_CSI_RDN
DSI_CSI_RDN
2
R57
AB4 DSI_CSI_TEST_OUT 49.9R2F
DSI_CSI_TEST_OUT N/A
2
B B
1
T30L-R-P-A3 R58
N/A 49.9R2F
N/A POR Deep Sleep
VDDIO_CAM
1
PUPD PinState PUPD After Wake

PBB0 None Z Config. Hold
0626
1.8V VDD_1V8_GEN_CPU VDDIO_CAM_T30S PBB3 None Z Config. Hold
0626
VDDIO_CAM_T30S PBB7 None Z Config. Hold
0626 0626
VDD_1V8_GEN VDD_1V8_GEN PCC1 UP 50K PU Config. Hold
PCC2 UP 50K PU Config. Reset
1
C54 C55
1
0.1U6.3VX5RC1K N/A
4.7U6.3VX5RC2M
N/A R59 R60
2
0626 2.2KR1J 2.2KR1J

U2G N/A N/A
18/22 CAM
2
(1.8/2.8 ~ 3.3V)
VDDIO_CAM_T30S AD9 1.8V AG5 CAM_I2C_SCL CAM_I2C_SCL 25,26,31,44

VDDIO_CAM CAM_I2C_SCL CAM_I2C_SDA R61 N/A
AH7 CAM_I2C_SDA 25,26,31,44
CAM_I2C_SDA 33R2J
AD5 VI_MCLK 1 2 CAM_MCLK 31
CAM_MCLK
AF6 CAM_RST_5M CAM_RST_5M 31 CW/0228

GPIO_PBB0
1
AD6 Check SI
GPIO_PBB3 C56 /@
A AG7 A
GPIO_PBB4 PWDN_5M
AE5 PWDN_5M 31 33P25VNPOC1J
2
GPIO_PBB5 CAM2_PWDN
AE6
GPIO_PBB6 PWDN_2M
GPIO_PBB7
AE7 PWDN_2M 31 Unmount
12/23 RF add 33P
AC6 NC FRONT_SEL
GPIO_PCC1 TEMP_ALERT#
AG6 TEMP_ALERT# 26
GPIO_PCC2
T30L-R-P-A3
N/A
Title : T30 DSI/CSI,CAM
C
ME370T 2.0
Date: Tuesday, March 20, 2012 Sheet 9 of 60
5 4 3 2 1
5 4 3 2 1
U2I
8/22 LCD
1.8V VDD_1V8_GEN_CPU VDDIO_LCD 1.8V

VDDIO_LCD AB13 AG11 LCD_PCLK LCD_PCLK 22
VDDIO_LCD_1 LCD_PCLK
AC13
VDDIO_LCD_2 SNN_LCD_ER#
AH16
(1.8 ~ 3.3V) LCD_WR_N LCD_DE
AG9 LCD_DE 22
LCD_DE LCD_HSYNC
AF16 LCD_HSYNC 22
LCD_HSYNC LCD_VSYNC
AF10 LCD_VSYNC 22
LCD_VSYNC
D LCD_D[17..0] 22 D
AE8 LCD_D0
LCD_D00 LCD_D1
AF12
LCD_D01 LCD_D2
AD10
LCD_D02 LCD_D3
AK15
LCD_D03 LCD_D4
AK16
LCD_D04 LCD_D5
VDDIO_LCD 1 2 C57 N/A AK10 POR Deep Sleep
0.1U6.3VX5RC1K LCD_D05 LCD_D6
LCD_D06
AK12 VDDIO_LCD
1 2 C58 N/A AG16 LCD_D7 PUPD PinState PUPD After Wake
0.1U6.3VX5RC1K LCD_D07 LCD_D8
AG8
C59 N/A LCD_D08 LCD_D9
1 2
LCD_D09
AD15 LCD_M1 DOWN 100K PD Disable Hold
0.1U6.3VX5RC1K AK9 LCD_D10
LCD_D10 LCD_D11
LCD_D11
AJ12 LCD_PWR0 DOWN 100K PD Disable Hold
AF9 LCD_D12
LCD_D12 LCD_D13
LCD_D13
AC12 LCD_PWR1 DOWN 100K PD Disable Hold
AD12 LCD_D14
LCD_D14 LCD_D15
LCD_D15
AE18 LCD_PWR2 DOWN 100K PD Disable Hold
AF13 LCD_D16
LCD_D16 LCD_D17
LCD_D17
AH15 LCD_SCK UP 100K PU Disable Hold
AE9 NC
LCD_D18
AE10 NC LCD_CS0_N UP 100K PU Disable Hold
LCD_D19
AH13 NC
LCD_D20
AH9 NC LCD_CS1_N UP 100K PU Disable Hold
LCD_D21
AE13 NC
LCD_D22
AK13 NC LCD_SDOUT UP 100K PU Disable Hold
LCD_D23
LCD_SDIN UP 100K PU Disable Hold
AG12 EN_VDD_PNL EN_VDD_PNL1
EN_VDD_PNL 21,48 LCD_DC0 DOWN 100K PD Disable Hold
LCD_M1
LCD_DC1 DOWN 100K PD Disable Hold
AJ9 NC SNN_LCD_PWR0
LCD_PWR0 EN_VDD_FUSE EN_3V3_FUSE
LCD_PWR1
AG10 EN_VDD_FUSE 5 0502
AH12 NC SNN_LCD_PWR2
LCD_PWR2
SDMMC_WP*
0621
AG15
LCD_SCK BAT_DET*
AJ15
LCD_CS0_N COMPASS_DRDY COMPASS_DRDY
AC10 COMPASS_DRDY 26
LCD_CS1_N SNN_LCD_SDOUT
C AJ13 C
LCD_SDOUT ALS_INT#_MB ALS_IRQ*
AH10 ALS_INT#_MB 25
LCD_SDIN
AE15 LVDS_SHTDN# LVDS1_SHTDN*

LVDS_SHTDN# 22
LCD_DC0 SNN_LCD_DC1
AE12
LCD_DC1
0721
AD13 SNN_CRT_HSYNC
CRT_HSYNC SNN_CRT_VSYNC
AJ16
CRT_VSYNC
AG14
DDC_SCL
AJ10
DDC_SDA
AG13
HDMI_INT
T30L-R-P-A3
N/A
B B
A A
Title : T30 LCD

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
3.3V
U2K
10/22 HDMI
3.3V
AE4 AK3
AVDD_HDMI_1 HDMI_TXCN
AF4 AK4
AVDD_HDMI_2 HDMI_TXCP
(3.3V)
AJ4
HDMI_TXD0N
1.8V
HDMI_TXD0P
AH4
HDMI Conn.
AH6
D HDMI_TXD1N D
AJ6
HDMI_TXD1P
AK7
HDMI_TXD2N
AJ7
HDMI_TXD2P
1.8V
AF7
AVDD_HDMI_PLL
(1.8V) AG1
HDMI_PROBE
AH3
HDMI_RSET
T30L-R-P-A3
All HDMI pins & powers leave NC when HDMI is not be used.
U2J
9/22 VDAC
AK6 AB7
AVDD_VDAC VDAC_R
(2.8V) AA9
VDAC_G
AA7
VDAC_B
AA5
VDAC_VREF
AA6
VDAC_RSET
C C
T30L-R-P-A3
All VDAC pins & powers leave NC
CEC
B B
0818 NC son't support CEC
A A
Title : T30 HDMI,VGA

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
U2S Note: 'EN_VDD_SDMMC1' reserved for power gating

12/22 BB
1.8V POR Deep Sleep
UART1_TXD DEBUG_GPIO0 VDDIO_BB
VDDIO_BB W1
VDDIO_BB
(1.8/3.3V)
ULPI_DATA0
ULPI_DATA1
R3
V1 UART1_RXD DEBUG_GPIO1 Debug?? PUPD PinState PUPD After Wake
N1 DBG_IRQ#
ULPI_DATA2 WLAN_MAC_WAKEN WF_WAKEUP
ULPI_DATA3
T3 WLAN_MAC_WAKEN 41 DATA0 UP 100K PU Disable Hold
P4 ACC_IRQ*
ULPI_DATA4 NC SNN_ULPI_DATA5
1.8V VDD_1V8_GEN_CPU VDDIO_BB ULPI_DATA5
T4
GPIO DATA1 UP 100K PU Disable Hold
T1 NC SNN_ULPI_DATA6 No Use
D ULPI_DATA6 CAM_RST_2M SNN_ULPI_DATA7 D
ULPI_DATA7
T2 CAM_RST_2M 31 DATA2 UP 100K PU Disable Hold
M2 UART4_TXD DATA3 UP 100K PU Config. Hold
ULPI_CLK UART4_RXD
ULPI_DIR
ULPI_NXT
M4
N2 Debug?? DATA4 UP 100K PU Config. Hold
VDDIO_BB 1 2 C69 N/A N4
1U6.3VX5RC2K ULPI_STP
DATA5 UP 100K PU Disable Hold
1 2 C70 N/A
0.1U6.3VX5RC1K DATA6 UP 100K PU Disable Hold
N3 NC CDC_LDO1_EN EN_VDD_SDMMC1
CDC_LDO1_EN 27 DATA7 UP 100K PU Disable Hold
DAP3_DIN EN_VDDIO_VID_OC*
M3
DAP3_DOUT EN_3V3_MODEN
DAP3_FS
R4 DSP_1V8_EN -> CODEC_1V8_EN PV0 None Z Config. Hold
R6 SNN_DAP3_SCLK
DAP3_SCLK
PV1 None Z Config. Hold
R1 AP_ONKEY# SNN_D_AP_ONKEY#
GPIO_PV0 AP_ONKEY# 33
R2 AP_ACOK# SNN_D_AP_ACOK# POR Deep Sleep
GPIO_PV1 AP_ACOK# 33
VDDIO_BB
GPI : Disable SD card write protection
DAP3_DIN DOWN 100K PD Disable Hold
DAP3_DOUT DOWN 100K PD Disable Hold
不不不不不, 需需TX/RX GND

DAP3_FS DOWN 100K PD Disable Hold
T30L-R-P-A3
JTAG DAP3_SCLK DOWN 100K PD Disable Hold
N/A
VDD_1V8_GEN_CPU
Unmount
UART4_TXD 1 0R1J 2 R69 /@
1
R71
UART4_RXD 1 0R1J 2 R70 /@ 1MR1J
C /@ Unmount C
2
UART1_TXD 1 0R1J 2 R72 N/A UART_DEBUG_TXD 24,28
UART1_RXD 1 0R1J 2 R73 N/A
UART_DEBUG_RXD 24,28
1
R74
1MR1J
N/A
+3VSUS_CPU +3VSUS_CPU
2
0906 NV change
2.2K -> 4.7K 0902
1
R75 R76
U2R 4.7KR1J 4.7KR1J Cardhu use 4.7K GEN1_I2C no use
N/A N/A
14/22 UART KAI -- ALS, Compass, Gyro, NFC I2C connect to GEN1 I2C
2
(1.8/3.3V)
1.8V Current connect to CAM_I2C
VDDIO_UART AA30 AB25 GEN1_I2C_SCL
VDDIO_UART GEN1_I2C_SCL GEN1_I2C_SDA GEN1_I2C_SCL
1.8V VDD_1V8_GEN_CPU VDDIO_UART GEN1_I2C_SDA
V29
GEN1_I2C_SDA
W25 GPS_UART2_TXD GPS_UART2_TXD 43 POR Deep Sleep
UART2_TXD GPS_UART2_RXD VDDIO_UART
UART2_RXD
UART2_RTS_N
AB28
AB26 GPS_UART2_RTS#
GPS_UART2_RXD 43
GPS_UART2_RTS# 43
GPS UART PUPD PinState PUPD After Wake
AA25 GPS_UART2_CTS#
VDDIO_UART UART2_CTS_N GPS_UART2_CTS# 43
PU0 None Z Disable Hold
AC27 BT_UART3_TXD BT_UART3_TXD 41
UART3_TXD BT_UART3_RXD
UART3_RXD
W27 BT_UART3_RXD 41 BT UART PU1 None Z Disable Hold
AB29 BT_UART3_RTS# BT_UART3_RTS# 41
UART3_RTS_N
1
C71 W29 BT_UART3_CTS# PU2 None Z Disable Hold

UART3_CTS_N BT_UART3_CTS# 41
0.1U6.3VX5RC1K
N/A Z AA28 BT_EN BT_EN
BT_EN 40,41 PU3 None Z Disable Hold
2
GPIO_PU0 BT_WAKEUP BT_WAKEUP

Z GPIO_PU1
V30 BT_WAKEUP 40,41
Z AB30 GPS_PWRON GPS_PWRON
GPS_PWRON 40,43 PU4 None Z Disable Hold
B GPIO_PU2 GPS_RST* B
Z GPIO_PU3
AB27
GPIO
Z AC25 DOCK_IN# MB_DET_DOCK* DOCK_IN# -> MAX8903B_CHG#_1V8 PU5 None Z Config. Hold
GPIO_PU4 DOCK_IN# 28
Z W30 AP_CHARGING# GPS_IRQ#
GPIO_PU5 AP_CHARGING# 33
Z AA27 BT_IRQ# BT_IRQ* PU6 None Z Config. Hold
GPIO_PU6 BT_IRQ# 41
williams 0602
AA29 DAP4_DIN
DAP4_DIN DAP4_DIN 41
DAP4_DOUT
DAP4_DOUT
DAP4_FS
W28
AA24 DAP4_FS
DAP4_DOUT
DAP4_FS
41
41
BT PCM
AA26 DAP4_SCLK DAP4_SCLK 41
DAP4_SCLK
Y27 CLK3_OUT
CLK3_OUT CLK3_REQ
W24
CLK3_REQ
T30L-R-P-A3
N/A
A A
Title : T30 BB,UART

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
D D
VDD_IO_AUDIO
1.8V VDD_1V8_GEN_CPU VDD_IO_AUDIO
1
C72
0.1U6.3VX5RC1K
N/A
2
U2Q
Change
13/22 AUDIO
1.8V 09002-00050000 N/A
VDD_IO_AUDIO C30 C27 DAP_MCLK1_H R77 1 0R1J 2 DAP_MCLK1 27
VDDIO_AUDIO CLK1_OUT
F26 NC
CLK1_REQ
1
(1.8/3.3V)
C73
33P25VNPOC1J C74
SNN_MODEM_AUDIO_CLK N/A
G29 33P25VNPOC1J
REMOVE FM I2S 0609
2
DAP1_SCLK SNN_MODEM_AUDIO_CS /@
D28
DAP1_FS SNN_MODEM_AUDIO_DI
DAP1_DOUT
G26
SNN_MODEM_AUDIO_DOUT
Unmount
G25
DAP1_DIN
C28 DAP2_SCLK_H R78 1 33R1J 2 N/A DAP2_SCLK 27

DAP2_SCLK DAP2_FS_H R79 1 33R1J 2 N/A
DAP2_FS
DAP2_DOUT
C29
G27 DAP2_DOUT DAP2_DOUT 27
DAP2_FS 27 CODEC
F27 DAP2_DIN
DAP2_DIN DAP2_DIN 27
1
C C75 C76 C
27P25VNPOC1J 27P25VNPOC1J
/@ /@
2
H27 NC SNN_SPDIF_IN
Unmount
SPDIF_IN
A28 NC SNN_SPDIF_OUT
SPDIF_OUT
B28
SPI1_SCK
J24
SPI1_CS0_N
F29
SPI1_MOSI
F28
SPI1_MISO
HOOK_DET#_CPU N/A 1 0R1J 2 R234
HOOK_DET# 28
1
C89
D29 HOOK_DET#_CPU SNN_DIS_5V_SWITCH 27P25VNPOC1J
SPI2_SCK CDC_IRQ# SNN_SATA_DET* /@
G28 CDC_IRQ# 27
2
SPI2_CS0_N HEAD_DET# HP_DET*
SPI2_CS1_N
F25 HEAD_DET# 28 Unmount
E27 NC LINOUT_DET CDC_IRQ*
SPI2_CS2_N
SPI2_MOSI
B27 NC NFC_IRQ* LINOUT_DET
NFC_IRQ_R
28
44
GPIO
D30 GYRO_INT GYRO_IRQ*
SPI2_MISO GYRO_INT 26
0229 EMI add

T30L-R-P-A3
N/A
POR Deep Sleep

VDD_IO_AUDIO
SPI2_SCK UP 100K PU Disable Reset
B
SPI2_CS0_N UP 100K PU Disable Reset B
SPI2_CS1_N UP 100K PU Config. Hold

SPI2_CS2_N UP 100K PU Config. Hold
SPI2_MOSI DOWN 100K PD Disable Hold
SPI2_MISO DOWN 100K PD Disable Hold
A A
Title : T30 AUDIO

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
USB1_VBUS VDD_USB1_VBUS
TPS63020 buck-boost Q6
SI2305DS
3.3V +3VSUS AVDD_USB USB VBUS
R68 2 N/A
D 3
S
3
2
1 0R2J 2 /@
1
C80
G
1
0.1U6.3VX5RC1K
1
U14 USB1_VBUS /@
2
5 1 Unmount R81
IN OUT ACOK_DOCKOK_3
2 1 1MR1J 2 N/A
GND
1
4 3
DIS EN
1
N/A C81
1
0720 NCT3521U 4.7U6.3VX5RC2M
2
N/A R82
2
USB1_VBUS 100KR1J
D
C62 AVDD_USB_DISCHARGE 1 330R1J 2 0229 EMI add N/A
D
0.1U6.3VX5RC1K R66 N/A
Close to CPU 1014 TF201 add
2
N/A ACOK_DOCKOK_2
1
C90
6
0.1U6.3VX5RC1K AVDD_USB
/@ Q5A
SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23
2
Unmount 2 UM6K1N
50 EN_AVDD_USB
N/A 07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
1
MAX77663 GPIO2 07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23
Signal from MAX77663
EN_AVDD_USB from MAX77663 GPIO2, check PU resister in PMU side(100k PU to VPH_PWR_CHGR) AVDD_USB
U2L
0620 USB1_VBUS
1
11/22 USB R83
AVDD_USB 1 2 C77 N/A 100KR1J
4.7U6.3VX5RC2M W5 USB1_VBUS /@
USB1_VBUS
1 2 C78 N/A (3.3V) 3.3V
2
0.1U6.3VX5RC1K AVDD_USB U12 Unmount
AVDD_USB USB1_DN
W3 USB1_DN 28,49
USB1_DN USB1_DP
USB1_DP
W2 USB1_DP 28,49 USB Conn.(OTG)
T7 USB1_ID USB1_ID 28
ACC1_DETECT
0229 EMI add

Close to CPU
1
C C156 C
0.1U6.3VX5RC1K
2
/@
(1.8V) 1.8V Unmount
AVDD_USB_PLL U4
AVDD_USB_PLL
V5 SNN_USB2_VUS
USB2_VBUS
SI2305DS 2nd Source USB2_DN

T6
3G Module
T5
07G005C69010 P-MOSFET EMF44P02J SOT-23 USB2_DP
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2 SNN_USB2_ID
W4
07G005051310 P-MOSFET NTR2101PT1G SOT-23 ACC2_DETECT
1.8V
T30 AVDD_USB_PLL 1.8V

AVDD_USB_PLL_1
R80 N/A
Unmount 30Ohm/100Mhz
2 3 1 2
S
3 D
VDD_1V8_GEN AVDD_USB_PLL AVDD_USB_PLL

2
Q2
G
SI2305DS C63 R62

11
N/A 100P25VNPOC1J 330R1J

1
/@ N/A
2
C79
2
EN_AVDD_USB_PLL__SWITCH_2 0.1U6.3VX5RC1K R5 SNN_USB3_VUS

2
N/A USB3_VBUS
3
R63 N/A Q3B

B
1 100KR1J 2EN_AVDD_USB_PLL__SWITCH_1 5 UM6K1N USB3_DN
USB3_DP
V3
V2 Dock USB HUB B
N/A
4
Vth=1.5V V4 SNN_USB3_ID
ACC3_DETECT
1
R64
10KR1J
N/A
Y4 USB_RSET
2
USB_REXT
1
EN_AVDD_USB_PLL_SWITCH_3
T30L-R-P-A3 R84
6
N/A 1KR1F
Q3A N/A
2 UM6K1N
6,50 CORE_PWR_REQ
2
N/A
1
From T30
U2N
16/22 IC_USB
SNN_AVDD_IC_USB V9 W8 SNN_IC_USB_DN
AVDD_IC_USB IC_USB_DN SNN_IC_USB_DP
(1.8V) W9
IC_USB_DP
V8 SNN_IC_USB_REXT
IC_USB_REXT
T30L-R-P-A3
N/A
A A
U2M
15/22 HSIC
(1.2V) HSIC_DATA
W7 V6
VDDIO_HSIC HSIC_DATA HSIC_STROBE
V7
HSIC_STROBE
Note:
1. once USB1 is connected and USB1_VBUS is a wake source, our EMC, CPU would run at max frequency and voltage.
2. USB1_VBUS must be powered when force recovery mode. W6
HSIC_REXT
3. USB1_VBUS is powered with USB_DP/N data transition, SW will recognize that a HOST PC is plugged in.
T30L-R-P-A3
Title : T30 USB,HSIC,ICUSB
N/A Engineer: Richard Lin
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
0620
U2E
5/22 SDMMC4
(1.2/1.8V)
VDDIO_SDMMC4 D8 B9 SDMMC4_DAT0
VDDIO_SDMMC4 SDMMC4_DAT0 SDMMC4_DAT1 SDMMC4_DAT0 20
1.8V VDD_1V8_GEN_CPU VDDIO_SDMMC4
1.8V SDMMC4_DAT1
B6
C6 SDMMC4_DAT2 SDMMC4_DAT1 20
SDMMC4_DAT2 SDMMC4_DAT3 SDMMC4_DAT2 20
A6
D SDMMC4_DAT3 SDMMC4_DAT4 SDMMC4_DAT3 20 D
B7
A7
D7
D9
SDMMC4_DAT7 SDMMC4_DAT7 20
2 C82 N/A
VDDIO_SDMMC4 1
4.7U6.3VX5RC2M eMMC
1 2 C83 N/A A9 SDMMC4_CLK_T30
0.1U6.3VX5RC1K SDMMC4_CLK SDMMC4_CMD_T30
C7
SDMMC4_CMD
C9 SDMMC4_RST#
SDMMC4_RST_N SDMMC4_RST# 20
SDMMC4_CLK_T30 1 N/A 2 R32 SDMMC4_CLK

0R1J SDMMC4_CLK 20
SDMMC4_CMD_T30 1 N/A 2 R33 SDMMC4_CMD
0R1J SDMMC4_CMD 20
1
C65
T30L-R-P-A3 33P25VNPOC1J C66
/@ 33P25VNPOC1J
2
N/A /@
Unmount
0217 EMI add
MAX77663 LDO6 Unmount
3.3V/1.8V Internal Pull-up resistors on DATA & CMD is 15K
0620
VDD_PMU_LDO6_3V_1V8 1 2 R34 VDDIO_SDMMC1
0R1J /@
U2P
C 17/22 SDMMC1 C
3.3V/1.8V
(1.8/2.8 ~ 3.3V)
VDDIO_SDMMC1 J1 K1
VDDIO_SDMMC1 SDMMC1_DAT0
K3
SDMMC1_DAT1
0229 SDMMC1_DAT2
K2
K4
NV recommend VDDIO_SDMMC1 connect to SDMMC1_DAT3
GND when SDMMC1 is not using SDMMC1_CLK
M6 SD Card
N6
SDMMC1_CMD
Unmount
VDDIO_SDMMC1 1 2 C84 /@
4.7U6.3VX5RC2M
Unmount VDDIO_SDMMC1
1 2 C85 N/A POR Deep Sleep
0.1U6.3VX5RC1K VDDIO_SDMMC1
10G211000007010 L4 SDMMC1_COMP_PU 1 33.2R1F 2 R86 /@ PUPD PinState PUPD After Wake
SDMMC1_COMP_PU
Change C85 change to 0ohm K6 SDMMC1_COMP_PD 1 33.2R1F 2 R87 /@ GPIO_PV2 None Z Disable Hold
SDMMC1_COMP_PD
0613Y GPIO_PV3 None Z Disable Hold
SNN_GPIO_PV2
M5 NC
GPIO_PV2 NC SNN_GPIO_PV3
GPIO_PV3
M1 No Use
K5 NC 0614
CLK2_OUT NC
N5
CLK2_REQ
T30L-R-P-A3
N/A
1.8V VDD_1V8_GEN_CPU VDDIO_SDMMC3
B B
0620
T30s has onchip 47k pull-ups
U2O Note: 'EN_3V3_EMMC' reserved for power gating
6/22 SDMMC3
(1.8/2.8 ~ 3.3V)
SDMMC3_DAT0 SDMMC3_DAT0 40
VDDIO_SDMMC3 G24
VDDIO_SDMMC3 SDMMC3_DAT0
SDMMC3_DAT1
L27
J26 SDMMC3_DAT1 SDMMC3_DAT1 40 WIFI POR Deep Sleep
1.8V J28 SDMMC3_DAT2 SDMMC3_DAT2 40 VDDIO_SDMMC3
SDMMC3_DAT3
K26 PUPD PinState PUPD After Wake
J27 EN_3V3_EMMC
SDMMC3_DAT4 EN_3V3_COM
SDMMC3_DAT5
K25
GPIO SDMMC3_DAT4 UP 15K PU Config. Hold
K24 WF_RST# WF_RST*
SDMMC3_DAT6 WIFI_EN WF_EN WF_RST# 40,41
SDMMC3_DAT7
K28
WIFI_EN 40,41
SDMMC3_DAT5 UP 15K PU Config. Hold
SDMMC3_DAT6 UP 15K PU Config. Hold
VDDIO_SDMMC3 1 2 C86 N/A G30 SDMMC3_CLK
4.7U6.3VX5RC2M SDMMC3_CLK SDMMC3_CMD SDMMC3_CLK 40
SDMMC3_CMD
J29 SDMMC3_CMD 40 WIFI SDMMC3_DAT7 UP 15K PU Config. Hold
1 2 C87 N/A
0.1U6.3VX5RC1K
J25 SDMMC3_COMP_PU
SDMMC3_COMP_PU
K27 SDMMC3_COMP_PD VDDIO_SDMMC3
SDMMC3_COMP_PD
R88
T30L-R-P-A3 1 33.2R1F 2 N/A
N/A 1 33.2R1F 2 N/A
R89
A A
Title : T30 SDMMC,eMMC

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
U2T
20/22 PEX
(1.05V)
AB18 AG18
AVDD_PEXA_1 PEX_L0_TXN
AB19 AF18
AVDD_PEXA_2 PEX_L0_TXP
1.05V
AJ19
D PEX_L0_RXN D
AH19
PEX_L0_RXP
AF19
PEX_L1_TXN
AG19
PEX_L1_TXP
(1.05V)
AD22 AK22
VDD_PEXA PEX_L1_RXN
AK21
PEX_L1_RXP
1.05V
AJ18
PEX_L2_TXN
AH18
PEX_L2_TXP
AK19
PEX_L2_RXN
(3.3V) AK18
PEX_L2_RXP
AB21
HVDD_PEX
3.3V
AK24
PEX_L3_TXN
AK25
PEX_L3_TXP
AJ21
PEX_L3_RXN
AH21
PEX_L3_RXP
(1.05V)
C AC22 AG21 C
AVDD_PEXB PEX_L4_TXN
AF21
PEX_L4_TXP
1.05V
AJ24
PEX_L4_RXN
AH24
PEX_L4_RXP
R91
3.3V +3VSUS_CPU 1 0R2J 2 /@ VDDIO_PEX_CTL
Unmount PEX_L5_TXN
AJ25
(1.05V) AH25
PEX_L5_TXP
AE23
VDD_PEXB
1.05V PEX_L5_RXN
AG22
AG23
PEX_L5_RXP
(1.05V)
AE24 AK28
B AVDD_PEX_PLL PEX_CLK1N B
AK27
PEX_CLK1P
1.05V
AB24
PEX_CLK2N
AB23
PEX_CLK2P
AH27
PEX_CLK3N
AJ27
PEX_CLK3P
AJ22
PEX_REFCLKN
AH22
PEX_REFCLKP
(3.3V)
VDDIO_PEX_CTL AF24 AG24

VDDIO_PEX_CTL PEX_L0_CLKREQ_N
AD25
U2U PEX_L0_PRSNT_N
3.3V PEX_L0_RST_N
AG26
1
21/22 NC
C88
AC15 (1.05V) AD16 4.7U6.3VX5RC2M AD26
2
AVDD_SATA SATA_L0_TXN 10G212000004010 PEX_L1_CLKREQ_N

AE16 AD24
SATA_L0_TXP N/A PEX_L1_PRSNT_N
AF15 (1.05V) AG27
VDD_SATA PEX_L1_RST_N
AC16 AE19
HVDD_SATA
(3.3V)
SATA_L0_RXN
AD19
C88 change to 0ohm (0402) AC21
SATA_L0_RXP PEX_L2_CLKREQ_N
AG17
AVDD_SATA_PLL
(1.05V) Change PEX_L2_PRSNT_N
AE22
AG25
PEX_L2_RST_N
AF22
PEX_WAKE_N
A AE21 A
SATA_TESTCLKN
AD21
SATA_TESTCLKP
AJ28
PEX_TESTCLKN
AH28
PEX_TESTCLKP
AD18
SATA_TERMP
AG20
PEX_TERMP
T30L-R-P-A3
T30L-R-P-A3 Title : T30 PCIe
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
D D
U2V
22/22 NC
AB10
NC38
AB5
NC39
AC19
NC40
AC9
NC41
C25
NC42
E13
NC43
H25
NC44
U2F
19/22 VI
(1.2 / 1.8V)
AH30 AE26
VDDIO_VI VI_MCLK
AF25
VI_PCLK
AD27 AB11
VI_HSYNC NC_1
AG30 AB14
VI_VSYNC NC_2
AB17
NC_3
C AB20 C
NC_4
AB22
NC_5
AB9
NC_6
AF27 AE11
VI_D00 NC_7
AD30 AE14
VI_D01 NC_8
AH29 AE17
VI_D02 NC_9
AG28 AE20
VI_D03 NC_10
AE27 F11
VI_D04 NC_11
AE25 F14
VI_D05 NC_12
AG29 F17
VI_D06 NC_13
AD29 F20
VI_D07 NC_14
AE29 J11
VI_D08 NC_15
AD28 J14
VI_D09 NC_16
AE30 J17
VI_D10 NC_17
AE28 J20
VI_D11 NC_18
J22
NC_19
J9
NC_20
L22
T30L-R-P-A3 NC_21
L25
NC_22
L6
NC_23
L9
NC_24
P22
NC_25
P25
NC_26
P6
NC_27
P9
NC_28
U22
NC_29
U25
NC_30
U6
NC_31
U9
NC_32
Y22
NC_33
Y25
NC_34
Y6
NC_35
Y9
NC_36
T30L-R-P-A3
B B
A A
Title : T30 NC
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
Boot Source:eMMC as default NAND_D0 7 AD3 AD2 AD1 AD0 Determine Boot Device to be config.
0502 VDD_3V3_GMI NAND_D1 7 0 0 0 0 eMMC primary x4

NAND_D2 7 0 0 0 1 eMMC primary x8
1
R92
NAND_D3 7 0 0 1 0 eMMC secondary x4
100KR1J
N/A
0 0 1 1 NAND
D D
0 1 0 0 NAND w/ block & page offset=1
2
NAND_D0
NAND_D1
0 1 0 1 Mobile LBA NAND
NAND_D2
NAND_D3
0 1 1 0 FlexMuxOneNAND
0 1 1 1 eSD x4
1
1
R93 R94 R95
1 0 0 0 SPI Flash
100KR1J 100KR1J 100KR1J
AD[3:0] 0001 (T30S CRB)
N/A N/A N/A
1 0 0 1 SNOR (Muxed, x16)
1 0 1 0 SNOR (Muxed, x32)
2
Default value Default value

1 0 1 1 SNOR (Non-Muxed, x16)
should set to 10 should set to 00 1 1 0 0 MuxOneNAND
Note:
1 1 0 1 SATA
1. NAND_D[3:0] have internal 100K pull up. 1 1 1 0 eMMC secondary x8
1 1 1 1 Use fuse data
YM 0502
DG05576900 V1.3 P75
RAM Code AD[7:0] 0000 (T30S CRB)
VDD_3V3_GMI VDD_3V3_GMI VDD_3V3_GMI VDD_3V3_GMI NAND_D4 7
NAND_D5 7
AD5 AD4 Select Memory Type R100 R101 R102 R103
1
NAND_D6 7
R96 R100 R102 SKU1&3 V V
100KR1J R98 100KR1J 100KR1J
0 0 ELPIDA DDR3LRS 256MBx4 EDJ2108EDBG-DJL-F 03006-00030900
NAND_D7 7
/@/BOOTSTRAP/eMMC 100KR1J /@/BOOTSTRAP/DDR /BOOTSTRAP/DDR SKU2&4 V V
C
0 1 Hynix DDR3LM 256MBx4 H5TC2G83CFR-H9R 03006-00031200 C
2
/@/BOOTSTRAP/eMMC TBD V V
NAND_D4
1 0
NAND_D5 TBD V V
NAND_D6
1 1
NAND_D7 20120302
1
R97 R101 R103

100KR1J 100KR1J 100KR1J
/BOOTSTRAP/eMMC R99 /BOOTSTRAP/DDR /@/BOOTSTRAP/DDR AD7 AD6 Select eMMC Type R96 R97 R98 R99
100KR1J
2
/BOOTSTRAP/eMMC SKU1&2 V V
0 0 HYNIX 8GB H26M42001FMR FBGA-153 03100-00120000
Remove RECOVERY_MODE# & DEV_MODE# SKU3&4 0 1 Kingston 8GB KE44B-26BN FBGA169 05G002514010 V V
Default value Default value 1 0 TBD V V
should set to 00 should set to 11
1 1 TBD V V
Note:
1. NAND_D[7:4] do NOT have internal 100K pull up.
For what?
F_RECOVERY# 24,32
VDD_3V3_GMI VDD_3V3_GMI NAND_RE# 7

NAND_CLE NAND_ALE Description
NAND_CLE 7,26
0 0 Serial JTAG chain, MPCORE and AVP
1
B NAND_ALE 7 B
R104 R106 MPCore only JTAG
100KR1J 47KR1J
0 1
NAND_WE# 7
N/A N/A AVP only JTAG
1 0
2
N/A Reserved
1 47KR1J 2 R105 NAND_RE#
1 1
NAND_CLE
NAND_ALE
NAND_WE#
1
RECOVERY Description
R107 R108 R109 F_RECOVERY#
100KR1J 100KR1J 0R1J USB Recovery Mode
0502 N/A N/A /@
0
1 Boot from secondary device
2
Unmount
Default value Default value

should set to 10 should set to 01
A A
Title : Boot Straps

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
03006-00031200 03006-00031200
U3 HYNIX/H5TC2G83CFR-H9R U4 HYNIX/H5TC2G83CFR-H9R
/DDR /DDR
8 DDR_DQ[31..0]
DDR_DQ0 DDR_VREFCA J8 B3 DDR_DQ2 DDR_VREFCA J8 B3 DDR_DQ9
DDR_DQ1 DDR_VREFDQ E1 VREFCA DQ0
C7 DDR_DQ4 DDR_VREFDQ E1 VREFCA DQ0
C7 DDR_DQ12
DDR_DQ2 VREFDQ DQ1 DDR_DQ6 VREFDQ DQ1 DDR_DQ8
C2 C2
VDDQ_DDR3L VDD_DDR3L DDR_DQ3 DDR_A0 DQ2 DDR_DQ3 DDR_A0 DQ2 DDR_DQ14
K3 C8 K3 C8
A0 DQ3 A0 DQ3
1
DDR_DQ4 DDR_A1 L7 E3 DDR_DQ7 DDR_A1 L7 E3 DDR_DQ11
DDR_DQ5 DDR_A2 A1 DQ4 DDR_DQ1 DDR_A2 A1 DQ4 DDR_DQ15
L3 E8 L3 E8
+1.35V DDR_DQ6 DDR_A3 K2
A2 DQ5
D2 DDR_DQ0 DDR_A3 K2
A2 DQ5
D2 DDR_DQ13
2
DDR_DQ7 DDR_A4 A3 DQ6 DDR_DQ5 DDR_A4 A3 DQ6 DDR_DQ10
from PMIC MAX77663 SD3(2A) L8
A4 DQ7
E7 L8
A4 DQ7
E7
DDR_DQ8 DDR_A5 L2 DDR_A5 L2
DDR_DQ9 DDR_A6 A5 DDR_A6 A5
M8 M8
DDR_DQ10 C92 N/A DDR_A7 A6 C95 N/A DDR_A7 A6
M2 M2
DDR_DQ11 0.1U6.3VX5RC1K DDR_A8 A7 0.1U6.3VX5RC1K DDR_A8 A7
N8 N8
DDR_DQ12 C91 DDR_A9 A8 C94 DDR_A9 A8
M3 M3
DDR_DQ13 0.1U6.3VX5RC1K DDR_A10 A9 0.1U6.3VX5RC1K DDR_A10 A9
H7 H7
DDR_DQ14 N/A DDR_A11 A10/AP N/A DDR_A11 A10/AP
M7 M7
D 03006-00030900 DDR_DQ16 DDR_A13
K7
N3
A12/BC# DDR_A13
K7
N3
A12/BC# D
ELPIDA DDR3LRS 256MBx4 EDJ2108EDBG-DJL-F DDR_DQ18
N7
A14
N7
A14
DDR_DQ19
DDR_DQ20 A2 VDD_DDR3L A2 VDD_DDR3L
DDR_DQ21 DDR_BA0_N VDD1 DDR_BA0_N VDD1
J2 A9 J2 A9
DDR_DQ22 DDR_BA1_N BA0 VDD2 DDR_BA1_N BA0 VDD2
03006-00031200 DDR_DQ23 DDR_BA2_N
K8
J3
BA1 VDD3
D7
G2 DDR_BA2_N
K8
J3
BA1 VDD3
D7
G2
DDR_DQ24 BA2 VDD4 BA2 VDD4
Hynix DDR3LM 256MBx4 H5TC2G83CFR-H9R DDR_DQ25 VDD5
G8
K1
VDD5
G8
K1
DDR_DQ26 VDD6 VDD6
K9 K9
DDR_DQ27 DDR_CLKP VDD7 DDR_CLKP VDD7
F7 M1 F7 M1
DDR_DQ28 DDR_CLKN CK VDD8 DDR_CLKN CK VDD8
G7 M9 G7 M9
DDR_DQ29 DDR_CKE0 CK# VDD9 DDR_CKE0 CK# VDD9
G9 G9
DDR_DQ30 CKE CKE
VDDQ_DDR3L 1 2 C93 N/A VDDQ_DDR3L 1 2 C96 N/A DDR_DQ31

10U6.3VX5RC3M 10U6.3VX5RC3M DDR_ODT0_N G1 B9 VDDQ_DDR3L DDR_ODT0_N G1 B9 VDDQ_DDR3L
ODT VDDQ1 ODT VDDQ1
1 2 C100 N/A 1 2 C97 N/A
8 DDR_DM[3..0]
DDR_CS0_N H2 C1 DDR_CS0_N H2 C1
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_DM0 DDR_RAS_N CS# VDDQ2 DDR_RAS_N CS# VDDQ2
F3 E2 F3 E2
RAS# VDDQ3 RAS# VDDQ3
1 2 C98 N/A 1 2 C99 N/A DDR_DM1 DDR_CAS_N G3 E9 DDR_CAS_N G3 E9
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_DM2 DDR_WE_N CAS# VDDQ4 DDR_WE_N CAS# VDDQ4
H3 H3
DDR_DM3 WE# WE#
1 2 C101 N/A 1 2 C102 N/A
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K
1 2 C103 N/A 1 2 C104 N/A DDR_DQS0P C3 DDR_DQS1P C3
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_DQS0N DQS DDR_DQS1N DQS
8 DDR_A[14..0] D3 D3
DDR_A0 DQS# DQS#
1 2 C105 N/A 1 2 C106 N/A
4.7U6.3VX5RC2M 4.7U6.3VX5RC2M DDR_A1
DDR_A2 A7 A1 A7 A1
DDR_A3 DDR_DM0 NU/TDQS# VSS1 DDR_DM1 NU/TDQS# VSS1
B7 A8 B7 A8
DDR_A4 DM/TDQS VSS2 DM/TDQS VSS2
B1 B1
DDR_A5 VSS3 VSS3
D8 D8
DDR_A6 DDR_RESET_N VSS4 DDR_RESET_N VSS4
N2 F2 N2 F2
RESET# VSS5 RESET# VSS5
VDD_DDR3L 1 2 C107 N/A VDD_DDR3L 1 2 C108 N/A DDR_A7 F8 F8
10U6.3VX5RC3M 10U6.3VX5RC3M DDR_A8 VSS6 VSS6
J1 J1
VSS7 VSS7
1 2 C109 N/A 1 2 C110 N/A DDR_A9 N/A J9 N/A J9
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_A10 DDR3L_ZQ0_0 VSS8 DDR3L_ZQ1_0 VSS8
1 243R1F 2 R111 H8 L1 1 243R1F 2 R112 H8 L1
DDR_A11 ZQ VSS9 ZQ VSS9
1 2 C111 N/A 1 2 C112 N/A L9 L9
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_A12 VSS10 VSS10
C N1 N1 C
DDR_A13 VSS11 VSS11
1 2 C113 N/A 1 2 C114 N/A N9 N9
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DDR_A14 VSS12 VSS12
1 2 C115 N/A 1 2 C116 N/A
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K A3 B2 A3 B2
NC1 VSSQ1 NC1 VSSQ1
1 2 C117 N/A 1 2 C118 N/A B8 B8
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K VSSQ2 VSSQ2
C9 C9
C119 N/A C120 N/A VSSQ3 VSSQ3
1 2 1 2 D1 D1
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K VSSQ4 VSSQ4
D9 D9
C121 N/A C122 N/A VSSQ5 VSSQ5
1 2 1 2
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K F1 F1
NC2 NC2
1 2 C123 N/A 1 2 C124 N/A F9 F9
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K NC3 NC3
H1 H1
NC4 NC4
1 2 C125 N/A 1 2 C126 N/A H9 H9
4.7U6.3VX5RC2M 4.7U6.3VX5RC2M DDR_CS1_N NC5 DDR_CS1_N NC5
J7 J7
NC6 NC6
03006-00031200 03006-00031200
U5 HYNIX/H5TC2G83CFR-H9R U6 HYNIX/H5TC2G83CFR-H9R
/DDR /DDR
DDR_VREFCA J8 B3 DDR_DQ25 DDR_VREFCA J8 B3 DDR_DQ20
DDR_CS0_N DDR_VREFDQ E1 VREFCA DQ0
C7 DDR_DQ30 DDR_VREFDQ E1 VREFCA DQ0
C7 DDR_DQ16
8 DDR_CS0_N VREFDQ DQ1 VREFDQ DQ1
DDR_CS1_N C2 DDR_DQ26 C2 DDR_DQ22
8 DDR_CS1_N DQ2 DQ2
DDR_A0 K3 C8 DDR_DQ24 DDR_A0 K3 C8 DDR_DQ19
A0 DQ3 A0 DQ3
1
1
DDR_A1 L7 E3 DDR_DQ31 DDR_A1 L7 E3 DDR_DQ17
DDR_CLKP DDR_A2 A1 DQ4 DDR_DQ28 DDR_A2 A1 DQ4 DDR_DQ21
8 DDR_CLKP L3 E8 L3 E8
DDR_CLKN DDR_A3 A2 DQ5 DDR_DQ29 DDR_A3 A2 DQ5 DDR_DQ23
8 DDR_CLKN K2 D2 K2 D2
2
2
VDD_DDR3L DDR_A4 A3 DQ6 DDR_DQ27 DDR_A4 A3 DQ6 DDR_DQ18
L8 E7 L8 E7
DDR_CKE0 DDR_A5 A4 DQ7 DDR_A5 A4 DQ7
8 DDR_CKE0 L2 L2
DDR_A6 A5 DDR_A6 A5
M8 M8
A6 A6
2
C128 N/A DDR_A7 M2 C130 N/A DDR_A7 M2

R113 0.1U6.3VX5RC1K DDR_A8 A7 0.1U6.3VX5RC1K DDR_A8 A7
N8 N8
DDR_RAS_N C131 DDR_A9 A8 C129 DDR_A9 A8
7.5KOhm 8 DDR_RAS_N M3 M3
N/A 1% DDR_CAS_N 0.1U6.3VX5RC1K DDR_A10 A9 0.1U6.3VX5RC1K DDR_A10 A9
8 DDR_CAS_N H7 H7
N/A DDR_A11 A10/AP N/A DDR_A11 A10/AP
M7 M7
1
DDR_VREFDQ DDR_A12 A11 DDR_A12 A11

K7 K7
DDR_WE_N DDR_A13 A12/BC# DDR_A13 A12/BC#
8 DDR_WE_N N3 N3
A13 A13
2
B B
DDR_A14 N7 DDR_A14 N7
A14 A14
1
R114 C127
7.5KOhm 0.1U6.3VX5RC1K DDR_BA0_N
8 DDR_BA0_N
N/A 1% N/A DDR_BA1_N A2 VDD_DDR3L A2 VDD_DDR3L
8 DDR_BA1_N
2
DDR_BA2_N DDR_BA0_N VDD1 DDR_BA0_N VDD1

8 DDR_BA2_N J2 A9 J2 A9
1
DDR_BA1_N BA0 VDD2 DDR_BA1_N BA0 VDD2

K8 D7 K8 D7
DDR_BA2_N BA1 VDD3 DDR_BA2_N BA1 VDD3
J3 G2 J3 G2
BA2 VDD4 BA2 VDD4
G8 G8
DDR_DQS0N VDD5 VDD5
K1 K1
8 DDR_DQS0N DDR_DQS0P VDD6 VDD6
K9 K9
VDD_DDR3L 8 DDR_DQS0P DDR_CLKP VDD7 DDR_CLKP VDD7
F7 M1 F7 M1
DDR_DQS1N DDR_CLKN CK VDD8 DDR_CLKN CK VDD8
G7 M9 G7 M9
8 DDR_DQS1N DDR_DQS1P DDR_CKE0 CK# VDD9 DDR_CKE0 CK# VDD9
G9 G9
CKE CKE
2
8 DDR_DQS1P
R115 DDR_DQS2N
7.5KOhm 8 DDR_DQS2N DDR_DQS2P DDR_ODT0_N G1 B9 DDR_ODT0_N G1 B9
8 DDR_DQS2P ODT VDDQ1 VDDQ_DDR3L ODT VDDQ1 VDDQ_DDR3L
N/A 1% DDR_CS0_N H2 C1 DDR_CS0_N H2 C1
DDR_DQS3N DDR_RAS_N CS# VDDQ2 DDR_RAS_N CS# VDDQ2
F3 E2 F3 E2
1
DDR_VREFCA 8 DDR_DQS3N DDR_DQS3P DDR_CAS_N RAS# VDDQ3 DDR_CAS_N RAS# VDDQ3

G3 E9 G3 E9
8 DDR_DQS3P DDR_WE_N CAS# VDDQ4 DDR_WE_N CAS# VDDQ4
H3 H3
WE# WE#
2
R118 C132 DDR_ODT0_N

8 DDR_ODT0_N
7.5KOhm 0.1U6.3VX5RC1K DDR_DQS3P C3 DDR_DQS2P C3
N/A 1% N/A DDR_DQS3N DQS DDR_DQS2N DQS
D3 D3
2
DQS# DQS#
1
DDR_RESET_N
8 DDR_RESET_N
A7 A1 A7 A1
DDR_DM3 NU/TDQS# VSS1 DDR_DM2 NU/TDQS# VSS1
B7 A8 B7 A8
DM/TDQS VSS2 DM/TDQS VSS2
B1 B1
VSS3 VSS3
D8 D8
DDR_RESET_N VSS4 DDR_RESET_N VSS4
N2 F2 N2 F2
RESET# VSS5 RESET# VSS5
F8 F8
VSS6 VSS6
J1 J1
N/A VSS7 N/A VSS7
J9 J9
VSS8 VSS8
1 243R1F 2 R116 DDR3L_ZQ3_0 H8 L1 1 243R1F 2 R117 DDR3L_ZQ2_0 H8 L1
ZQ VSS9 ZQ VSS9
L9 L9
VSS10 VSS10
N1 N1
VSS11 VSS11
A N9 N9 A
VSS12 VSS12
A3 B2 A3 B2
NC1 VSSQ1 NC1 VSSQ1
B8 B8
VSSQ2 VSSQ2
C9 C9
VSSQ3 VSSQ3
D1 D1
VSSQ4 VSSQ4
D9 D9
VSSQ5 VSSQ5
F1 F1
NC2 NC2
F9 F9
NC3 NC3
H1
H9
NC4
H1
H9
NC4 Title : DDR3L
DDR_CS1_N NC5 DDR_CS1_N NC5
J7
NC6
J7
NC6 ASUSTeK COMPUTER INC. EPAD Engineer: Richard Lin
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
eMMC I/F
MAX77663 SD2 (2A)

D D
1.8V VDD_1V8_GEN VDDIO_HSMMC
03100-00120000
0906 NV add
HYNIX 8GB H26M42001FMR FBGA-153
VDDIO_HSMMC 1 2 C133 N/A VDDIO_HSMMC 1 2 C134 N/A
1U6.3VX5RC2K 1U6.3VX5RC2K
1 2 C135 N/A 1 2 C136 N/A
05G002514010
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K
1 2 C137 N/A
Kingston 8GB KE44B-26BN FBGA169
0.1U6.3VX5RC1K
MAX77663 LDO3
2.8V VDD_PMU_LDO3_2V8 VCORE_eMMC_S
0906 NV add
C VCORE_eMMC_S 1 2 C150 N/A VCORE_eMMC_S 1 2 C152 N/A C

1U6.3VX5RC2K 1U6.3VX5RC2K
1 2 C138 N/A 1 2 C153 N/A YM 0502
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K DG05576900 V1.3 P63
1 2 C151 N/A
0.1U6.3VX5RC1K CW/0320
Change to 4.7K by Cardhu.
VDDIO_HSMMC
1
R120 R121
4.7KR1J 4.7KR1J
N/A /@ Unmount
2
15 SDMMC4_DAT0 SDMMC4_DAT0
15 SDMMC4_CMD SDMMC4_CMD
15 SDMMC4_CLK SDMMC4_CLK
SDMMC4_RST# SDMMC4_RST#_eMMC
Unmount
1
R402 /@
1 2 SDMMC4_RST#_eMMC
15 SDMMC4_RST#
0R1J /@ /@ /@ /@ /@ /@ /@ /@ /@ /@ /@
2
6,32,50 SYS_RESET# 1 2
0R1J N/A
B B
KAI ref. design R403
EMI
C146 C148 C142 C144 C149 C147

33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J
C139 C141 C143 C145 33P25VNPOC1J
C172
33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J 33P25VNPOC1J
Unmount
AG13
AH11
AE14
AA14
AA13
AA12
AA11
AA10
W14
W13
W12
W11
W10
AG2
AH9
AH6
AH4
AE1
AA9
AA8
AA7
AA2
AA1
Y14
Y13
Y12
Y11
Y10
W9
U7B
Y9
Y8
Y7
Y6
Y3
Y1
/eMMC
A4 W8
NC138
NC137
NC136
NC135
NC134
NC133
NC132
NC131
NC130
NC129
NC128
NC127
NC126
NC125
NC124
NC123
NC122
NC121
NC120
NC119
NC118
NC117
NC116
NC115
NC114
NC113
NC112
NC111
NC110
NC109
NC108
NC107
NC106
NC105
NC104
NC0 NC103
A6 W7
NC1 NC102
A9 W3
U7A NC2 NC101
A11 W2
/eMMC NC3 NC100
B2 W1
NC4 NC99
SD I/F B13
NC5 NC98
V14
SDMMC4_DAT7
J6 D1 V13
SDMMC4_DAT6 DAT7 NC6 NC97
J5 D14 V12
J4 H1 V3
J3 H2 V2
J2 H6 V1
H5 H7 U14
H4 H8 U13
H3 H9 U12
DAT0 NC13 NC90
H10 U10
SDMMC4_CMD NC14 NC89
W5 H11 U7
SDMMC4_CLK CMD NC15 NC88
W6 H12 U6
CLK NC16 NC87 SDMMC4_RST#_eMMC
H13 U5
NC17 RST_n
H14 U3
NC18 NC85
POWER/GND J1
NC19 NC84
U2
J7
NC20 NC83
U1 Check
VCORE_eMMC_S M6 M7 J8 T14
VCC0 VSS0 NC21 NC82
N5 P5 J9 T13
VCC1 VSS1 NC22 NC81
T10 R10 J10 T12
VCC2 VSS2 NC23 NC80
U9 U8 J11 T5
VCC3 VSS3 NC24 NC79
A J12 T3 A
NC25 NC78
VDDIO_HSMMC K6 K4 J13 T2
VCCQ0 VSSQ0 NC26 NC77
W4 Y2 J14 T1
Y4 Y5 K1 R14
AA3 AA4 K3 R13
AA5 AA6 K5 R12
K7 R5
VCCI_EMMC NC31 NC72
K2 K8 R3
VCCI NC32 NC71
K9 R2
NC33 NC70
1
NC35
NC36
NC37
NC38
NC39
NC40
NC41
NC42
NC43
NC44
NC45
NC46
NC47
NC48
NC49
NC50
NC51
NC86
NC52
NC53
NC54
NC55
NC56
NC57
NC58
NC59
NC60
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68
K10 R1
C154 HYNIX H26M42001FMR NC34 NC69
2.2U6.3VX5RC2M 03100-00120000 Title : eMMC
2
HYNIX H26M42001FMR
K11
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M5
M8
M9
M10
L4
M12
M13
M14
N1
N2
N3
N10
N12
N13
N14
P1
P2
P3
P10
P12
P13
P14
03100-00120000 Engineer: Richard Lin

N/A ASUSTeK COMPUTER INC. EPAD
Footprint 12x16_14x18 colay
03100-00120000 C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
LCD PNL power Switch

TPS63020 buck-boost
3.3V +3VSUS VDD_PNL
VDD_PNL VCC_LCD3V3
D D
U8
5 1 1 2 C155 N/A
IN OUT 1U6.3VX5RC2K
2
GND
1 2 4 3
N/A DIS EN N/A
C157 1 R125 NCT3521U
0.1U6.3VX5RC1K 330R1J
N/A
2
VCC_LCD3V3_SW_DIS
EN_VDD_PNL_R
10,48 EN_VDD_PNL
1
1201
1
C158 R127 R1907 100K -> 1M
100P25VNPOC1J 1MR1J
/@ N/A
2
Unmount Close to LCD Connector
2.8~5.5V
LCD BL power Switch
C C
R128
0R3
VPH_PWR_CHGR 1 2 N/A VCC_LED
Remove for Hydis panel
1
C161
0223 change from VBATT 1U6.3VX5RC2K
2
N/A
B B
A A
Title : LCD panel power

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
EMI FILTER
N/A
1
U10 U11 N/A
1
U9 N/A
LCD_D8 7 3 LCDC_C_G2 LCD_D4 7 3 LCDC_C_B4
LCD_D12 7 3 LCDC_C_R0
18bit LCD panel LCD_D13 8 4 LCDC_C_R1
LCD_D10 9 5 LCDC_C_G4 9 5
LCD_D11 10 6 LCDC_C_G5 10 6
NFA21SL307X1A45L NFA21SL307X1A45L
2
10 LCD_D[17..0] NFA21SL307X1A45L
2
D D
1
U12 N/A U13 N/A
LCD_D16 7 3 LCDC_C_R4 LCD_D0 7 3 LCDC_C_B0
LCD_D17 8 4 LCDC_C_R5 LCD_D1 8 4 LCDC_C_B1
2
MAX77663 SD2 (2A)
R134 N/A
1.8V 1 0R2J 2
VDD_1V8_GEN IOVCC_30
3.3V VDD_LVDS_30 L2 N/A

C R135 N/A 120Ohm/100Mhz C
+3VSUS 1 0R2J 2 1 2 VDD_LVDS_F_30
TPS63020 buck-boost
1 2 VDD_LVDS_PLL_30
EMI FILTER
L3 120Ohm/100Mhz
N/A
U39
LCDC_C_R0 J2 H2
LCDC_C_R1 D0 Y0P
K1 H1
D1 Y0M
2
LCDC_C_R2 K2
LCDC_C_R3 D2
J3 G2
LCDC_C_R4 D3 Y1P R136
K3 G1
D4 Y1M
2
LCDC_C_R5 J4 100R1J
LCDC_C_G0 D6 /@ TXE0P_30
K5 E2 TXE0P_30 23
1
D7 Y2P R137 TXE0N_30
E1 TXE0N_30 23
Y2M
2
LCDC_C_G1 K6 100R1J
LCDC_C_G2 D8 TXE3P_30 /@ TXE1P_30
J6 C2 TXE1P_30 23
1
LCDC_C_G3 D9 Y3P TXE3N_30 R138 TXE1N_30
G5 C1 TXE1N_30 23
D12 Y3M
2
LCDC_C_G4 G6 100R1J
LCDC_C_G5 D13 TXECK1P_30 /@ TXE2P_30
F6 D2 TXE2P_30 23
1
LCDC_C_B0 D14 CLKP TXECK1N_30 R139 TXE2N_30
E5 D1 TXE2N_30 23
LCDC_C_B1 D15 CLKM 100R1J
D5
D18
2
/@
1
VDD_LVDS_30 1 2 C163 N/A LCDC_C_B2 C6 H5 VDD_LVDS_30
4.7U6.3VX5RC2M LCDC_C_B3 D19 VCC R140
B6 G4 IOVCC_30
LCDC_C_B4 D20 IOVCC2 100R1J
B5
LCDC_C_B5 D21 /@
A6 F1 VDD_LVDS_F_30 TXECK1P_30 23
1
D22 LVDSVCC
VDD_LVDS_PLL_30 1 2 C164 N/A 10 LCD_HSYNC LCD_HSYNC LCDC_HSYNC_C A4 TXECK1N_30 23
0.01U10VX7RC1K LCD_VSYNC LCDC_VSYNC_C D24
10 LCD_VSYNC B4 B2 VDD_LVDS_PLL_30
D25 PLLVCC
1 2 C165 N/A 10 LCD_DE LCD_DE LCDC_DEN_C A3 Unmount
0.1U6.3VX5RC1K D26
TF201 0906 add GND1
A1
IOVCC_30
LCDC_C_R6 J1 B1
LCDC_C_R7 D27 GND2
K4 C3
LCDC_C_G6 D5 GND3
VDD_LVDS_F_30 1 2 C166 N/A H4 C5
1U6.3VX5RC2K LCDC_C_G7 D10 GND4
H6 D3
B
LCDC_C_B6 D11 GND5 B
1 2 C167 N/A E6 F2
D16 GND6
1
0.1U6.3VX5RC1K LCDC_C_B7 D6 F5
D17 GND7 R141
A5 G3
D23 GND8 100KR1J
H3
GND9
VDD_LVDS_30 1 2 C168 N/A J5 N/A
0.1U6.3VX5RC1K LCD_PCLK N/A R143 LCDC_PCLK_C_30 GND10
10 LCD_PCLK 1 0R1J 2 A2
2
LVDS_SHTDN# LVDS_EN_30 B3 CLKIN
1 2 C140 N/A 10 LVDS_SHTDN# N/A R142 1 0R1J 2 C4 IOVCC_30
1U6.3VX5RC2K SHTDN# IOVCC1 LVDS_R_F_30
D4
CLKSEL
1
1
IOVCC_30 1 2 C170 N/A R144 SN75LVDS83BZQLR
1
0.1U6.3VX5RC1K C171 1MR1J C169 N/A R145

10P50VNPOC1J N/A 10P50VNPOC1J 100KR1J
/@ 1201 /@ /@
2
For Y3P and Y3M use
2
Unmount Unmount As Y3P and Y3M are open, so Unmount
connect pin 50, 2, 8, 10, 16,
R9807
18 to GND
100K -> 1M
LCDC_C_R6
LCDC_C_R7
LCDC_C_G6 For Y3P and Y3M use
LCDC_C_G7
LCDC_C_B6 As Y3P and Y3M are open, so connect pin 50(D27),
LCDC_C_B7 2(D2), 8(D10), 10(D11), 16(D16), 18(D17) to GND
Unmount
LVDS_EN_30 1 2 C185 /@
A 0.1U6.3VX5RC1K A
0229 EMI add
Title : LVDS transmitter_30

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
LCD PNL power Switch
From +3VSUS
3.3V 1 2 C173 N/A
VCC_LCD3V3
1U6.3VX5RC2K
D D
From +3VSUS through SW 1 2 C174 N/A
0.1U6.3VX5RC1K
Close to LCD Connector
LCD BL power Switch

VCC_LED 1 2 C178 N/A
C 1U6.3VX5RC2K Unmount EMI Cap. C
4.2V 1 2 C179 N/A
0.1U6.3VX5RC1K
2 1 C175 /@ TXE0N_R_30
0.1U6.3VX5RC1K
Close to LCD Connector 2 1 C176 /@ TXE0P_R_30
0.1U6.3VX5RC1K
2 1 C177 /@ TXE1N_R_30
0.1U6.3VX5RC1K
2 1 C180 /@ TXE1P_R_30
0.1U6.3VX5RC1K
2 1 C181 /@ TXE2N_R_30
0.1U6.3VX5RC1K
2 1 C182 /@ TXE2P_R_30
0.1U6.3VX5RC1K
CON5 N/A
BTOB_CON_30P
34 31
SIDE4 SIDE1
2 1 C183 /@ TXECK1N_R_30 2 1 VCC_LCD3V3
0.1U6.3VX5RC1K TXE0N_R_30 2 1
4 3
4 3
2 1 C184 /@ TXECK1P_R_30 TXE0P_R_30 6 5
0.1U6.3VX5RC1K 6 5
8 7
TXE1N_R_30 8 7
10 9
TXE1P_R_30 10 9
12 11
12 11
14 13
TXE2N_R_30 14 13
16 15
TXE2P_R_30 16 15
18 17
18 17
20 19
TXECK1N_R_30 20 19
22 21
TXECK1P_R_30 22 21
24 23
24 23
26 25
26 25
28 27
LCD_BL_PWM 28 27
7 LCD_BL_PWM 30 29 VCC_LED
30 29
33 32
SIDE3 SIDE2
12016-00070700
B B
LVDS EMI Filter

CON5 2nd source
MATSUSHITA/AXT530124
12G161H00307
1
U15 0805 SIZE U16 0805 SIZE
TXE0N 7 3 TXE0N_R_30 TXE2N_30 7 3 TXE2N_R_30

22 TXE0N_30 22 TXE2N_30
TXE0P_30 8 4 TXE0P_R_30 TXE2P_30 8 4 TXE2P_R_30
22 TXE0P_30 22 TXE2P_30
TXE1N_30 9 5 TXE1N_R_30 TXECK1N_30 9 5 TXECK1N_R_30
22 TXE1N_30 22 TXECK1N_30
TXE1P_30 10 6 TXE1P_R_30 TXECK1P_3010 6 TXECK1P_R_30
22 TXE1P_30 22 TXECK1P_30
N/A N/A
2
A A
Title : LCD Connector

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
D D
0226 delete debug port power

VDD_1V8_GEN_CPU Unmount
1
R146 R147
10KR1J 10KR1J 0705
N/A N/A Debug UART
J1
2
2
1 2 UART_DEBUG_TXD
1 2 UART_DEBUG_RXD UART_DEBUG_TXD 12,28
JTAG 3
3 4
4
UART_DEBUG_RXD 12,28
5 6
JTAG_TCK 5 6 HOT_RST#
7 8 HOT_RST# 32
6 JTAG_TCK JTAG_TDI 7 8 F_RECOVERY#
9 10 F_RECOVERY# 18,32
6 JTAG_TDI JTAG_TDO 9 10
6 JTAG_TDO 11 12
JTAG_TMS 11 12
13 14
6 JTAG_TMS JTAG_TRST# 13 14
15 16
6 JTAG_TRST# JTAG_RTCK 15 16
17 18
6 JTAG_RTCK JTAG_RESOUT# 17 18
1 19 20
T1 19 20
21 22
/@ 21 22
23 24
23 24
1
BtoB_CON_24P
R148 R149 /@/DUG
10KR1J 100KR1J MATSUSHITA/AXK6F24347YG
/@ N/A 12G160800244
BtoB CON 24P,0.5mm,M,1.5H,S/T UART_DEBUG_TXD 1 T15 /@
2
C HEADER UART_DEBUG_RXD 1 T16 /@ C
Unmount
B B
A A
Title : Debug Connector

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
MAX77663 SD2 (2A)
Hall Sensor TPS63020 buck-boost +3VSUS_CPU VDD_1V8_GEN_CPU
1
R150 R151
1MR1J 100KR1J
PR 0217 N/A D1 N/A N/A
RB520CS_30
2
TPS63020 buck-boost O_LID# 2 1 1V8_O_LID# 6
+3VSUS_CPU
1
D D
C186 RB520CS 2nd Source
10P50VNPOC1J
U17 /@ 07004-00030200 - SCHOTTKY BAT54TM SOD923
2
1
VDD 07G004045223 SCHOTTKY RB520CS-30 VMN2 [GA] ROHM
GND
3 Unmount 07G004250110 SCHOTTKY RB520G-30 SOD723 [GA] PANJIT
2
Output
1
1
C187 C188
1U6.3VX5RC2K 0.1U6.3VX5RC1K EC2618NLB1GR
N/A N/A 06G051025010
2
2 N/A
GND GND
Note:
1. VDD power supply range is +2.7V to +3.3V.
C C
Ambient Light Sensor
VDD_ALS 1 2 C189 N/A

1U6.3VX5RC2K
1 2 C190 N/A
0.1U6.3VX5RC1K
TPS63020 buck-boost
VDD_ALS CW/0310 CW/0302
+3VSUS VDD_ALS
Follow EP101, change P/N Change to 1.8V for ALS.
U18 EP101 BOM

1 6 ALS_SDA 1.8V level
VDD SDA ALS_SCL
2 5
ALS_SEL GND SCL ALS_INT#_MB
3 4
SEL INT
AL3010 N/A
B B
ALS_SDA
9,26,31,44 CAM_I2C_SDA ALS_SCL VDD_ALS
9,26,31,44 CAM_I2C_SCL
Slave address 7 bit 1
R155
GND R:00111001(39h) 1C 0R1J
W:00111000(38h)
/@
VDD_1V8_GEN
2
1201 VDD R:00111101(3Dh) 1D Unmount

W:00111100(3Ch) ALS_SEL
1
R3137
R156
10K -> 100K
1
100KR1J
N/A
NC R:00111111(3Fh) 1E R157
W:00111110(3Eh)
0R1J
2
ALS_INT#_MB N/A
10 ALS_INT#_MB
2
A A
Title : Hall & ALS

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
Thermal Sensor 1
R158 VDD_1V8_GEN_CPU
3.3V +3VSUS 1 0R2J 2 VCORE_TEMP
N/A
+3VSUS detect
1
R160
10KR1J
N/A
VCORE_TEMP
Unmount
2
D D
TEMP_ALERT_3V3# 1 0R1J 2 /@ TEMP_ALERT# 9
1
R161 R163
100R1J
R162 N/A 1 0R1J 2 R159 TEMP_ALERT#_KAI 6
THERMD_P 1 100R1J 2 N/A
6 THERMD_P
2
N/A TEMP_VDD
0217 KAI modify
1
C194 N/A
1
0.1U6.3VX5RC1K
C193
2
1000P25VX7RC1K U20 06023-00030100
2
N/A 1 8
VDD SCLK PWR_I2C_SCL 6,27,49,50
R166 TEMP_THERMD_P 2 7
THERMD_N TEMP_THERMD_N D+ SDATA TEMP_ALERT_3V3# PWR_I2C_SDA 6,27,49,50
6 THERMD_N 1 100R1J 2 3 6
TEMP_THERMAL# D- ALERT#/THERM2#
4
THERM# GND
5 OD
N/A OD
NCT72CMTR2G N/A
VPH_PWR_CHGR
VDD_1V8_GEN
Signal to MAX77663 VDD_5V0_AC_BAT
1
VDD_1V8_GEN_CPU 1201
R172 100K -> 1M THERMAL#_R 50 R168
10KR1J AP_OVERHEAT# to MAX77663 SHDN, NAND_CLE reverse circuit on PMU side
N/A
1
R170
2
R172 1 0R1J 2
1
1MR1J N/A
AP_OVERHEAT# 50 Signal to MAX77663
3
R171 N/A Q9B
10KR1J UM6K1N
2
N/A TEMP_THERMAL#_REV 5 N/A
1103
2
4
6
1
U20 C195
C 06G023124010 TEMP. SENSOR NCT1008CMT3R2G 2 0.1U16VX7RC2K 0322 delete R640 & R641 C
2
N/A
1
change to Q9A 1201

UM6K1N
Note:
06023-00030100 TEMP. SENSOR NCT72CMTR2G
N/A C195 1uF -> 0.1uF 1. Low pass filter (R=100ohm & C=1nF) to reduce CM/DIFF noise.
2. THERM# & ALERT# provide open-drain, active low output.
6
Q8A
NAND_CLE_THERMAL 2 UM6K1N 3. VDD power supply range is +3.0V to +3.6V.
7,18 NAND_CLE
N/A 4. Route D+/D- tracks close together and w/ grounded guard.
0217 KAI modify
1
Unmount
+3VSUS AVDD_ECOM
Gyro Sensor +3VSUS VDD_GYRO E-COMPASS 1 2 C196 N/A
1U6.3VX5RC2K
1 2 C197 N/A 1 2 C198 N/A
1U6.3VX5RC2K 0.1U6.3VX5RC1K
1 2 C199 N/A
0.1U6.3VX5RC1K
VDD_1V8_GEN DVDD_ECOM
1 2 C201 N/A
0.01U10VX7RC1K
1 2 C202 N/A
0.1U6.3VX5RC1K
VDD_1V8_GEN VDDIO_GYRO
1 2 C200 N/A
0.1U6.3VX5RC1K
B B
GYRO_CLKOUT
GYRO_CPOUT
1 0R1J 2 R179 N/A GYRO_SCL CPOUT chage to 0.22nF DVDD_ECOM

9,25,31,44 CAM_I2C_SCL
1
9,25,31,44 CAM_I2C_SDA 1 0R1J 2 R178 N/A GYRO_SDA

C203 CAD0_DAU AVDD_ECOM
MPU-6050 02134-00010000 220P25VX7RC1K 0720 AVDD_ECOM
2
N/A
1
CW/0223 02143-00010000
10
9
U21 U22 R183
24
23
22
21
20
19
Remove Gyro CLKIN.

MPU-6050 10KR1J
ADDR
DVDD
N/A VDD_GYRO 1 /@
SCL
REGOUT RESV2
RESV1
CLKOUT
CPOUT
SDA
GYRO_CLKIN GYRO_FSYNC AVDD

Unmount 1 18 1 100KR1J 2 R180 N/A COMPASS_DRDY 8 2
2
CLKIN GND1 10 COMPASS_DRDY MS_I2C_SCL DRDY GND ECOMPASS_VREG
2
NC1 NC8
17 7
SCL VREG
3 Unmount
1
3 16 GYRO_CLKIN 1 100KR1J 2 R181 N/A 6 CAD0_DAU
SDA
NC2 NC7 VPP
1
INT
C204 4 15 C205
NC3 NC6
VLOGIC
100P25VNPOC1J GYRO_CLKOUT 1 100KR1J 2 R182 N/A 1U6.3VX5RC2K

IME_CL
5 14
FSYNC
2
NC4 NC5
1
/@ GYRO_IME_DAT 6 13 AMI306 N/A
5
4
2
IME_DA
AD0
VDD
INT
GYRO_IME_CLK N/A R184

10KR1J
N/A
7
8
9
GYRO_REGOUT10
GYRO_FSYNC 11
12
GND GND
2
VDD_GYRO
GND
1
VDDIO_GYRO R185 ECOMPASS_INT 1 T3

1KR1J MS_I2C_SDA /@
GYRO_INT 13 /@
Unmount
2
GYRO_AD0 GYRO_FSYNC GYRO_AD0 Unmount CAM_I2C_SCL 1 0R1J 2 R187 N/A MS_I2C_SCL

9,25,31,44 CAM_I2C_SCL
1
C207 CAM_I2C_SDA 1 0R1J 2 R188 N/A MS_I2C_SDA

9,25,31,44 CAM_I2C_SDA
C206 0.1U6.3VX5RC1K R186
0.01U10VX7RC1K N/A 1KR1J
2
/@ N/A
A A
2
Note:
1. VDD power supply range is +1.8V to +3.6V. Note: ADDR I2C Address
2. VIO max. voltage is VDD. 1. DVDD power supply range is +1.7V to +2.8V.
2. AVDD power supply range is +2.4V to +3.6V. H 1Fh/read 1Eh/write
3. VOH=0.9xVIO & VOL=0.3xVIO. 3. Let VREG & VPP NC for reference.
4. VIH=0.8xVIO & VIL=0.2xVIO 4. DRDY is +1.8V level out and active high. L 1Dh/read 1Ch/write Title : Sensors
Gyro AD0 High : I2C Address 1101001b ASUSTeK COMPUTER INC. EPAD Engineer: Richard Lin
Gyro AD0 Low : I2C Address 1101000b Size Project Name
ME370T Rev
C 2.0
5 4 3 2 1
5 4 3 2 1
VDB_CDC 1 2 C208 N/A

R189 N/A 2.2U6.3VX5RC2M
Codec VDD 1.8V 1 0R2J 2 C209 N/A
1.8V VDD_1V8_CDC 2 VDB_CDC 1
0.1U6.3VX5RC1K
R190 N/A GND

1 0R2J 2 VCP_CDC VCP_CDC 1 2 C210 N/A
10U6.3VX5RC3M
VDD_1V8_GEN VDD_1V8_CDC 1 2 C211 N/A
10Ohm/100Mhz 0.1U6.3VX5RC1K
L4 1 2 N/A AVDD_CDC_F
GND
0226
AVDD_CDC_F 1 2 C213 N/A
Codec 1.8V change to system 1.8V power 10Ohm/100Mhz 10U6.3VX5RC3M
AVDD_CDC_F L5 1 2 N/A DACREF_CDC 1 2 C214 N/A
D VDD_1V8_GEN 0.1U6.3VX5RC1K
D
PMU LDO5 change to camera 1.8V R193 N/A GND

VDD_1V8_GEN 1 0R2J 2 VDD_1V8_DMIC DACREF_CDC 1 2 C215 N/A
10U6.3VX5RC3M
1 2 C216 N/A
0.1U6.3VX5RC1K
GND
VDD_5V0_AC_BAT
VPH_PWR_CHGR VDD_SPK 2 C217 N/A
VDD_SPK 1
DMIC Unmount
L6 10U6.3VX5RC3M
N/A 2 C218 N/A
VPH 1 2 1
0.1U6.3VX5RC1K 1 2 C221 /@
VDD_1V8_DMIC
80Ohm/100Mhz 1U6.3VX5RC2K
GND VDD_1V8_DMIC 1 2 C222 N/A
Unmount 0.1U6.3VX5RC1K
1
VDD_MIC_CDC 1 2 C219 N/A
2.2U6.3VX5RC2M R197
1 2 C220 N/A 10KR1J VDD_1V8_DMIC
0.1U6.3VX5RC1K /@ U23 N/A
1 6
2
GND DMIC_CS Ground1Power(Vdd) DMIC_DAT_U23
2 5
Left/Right Data DMIC_LR_U23
3 4
Ground2 Clock
1
R209 SPM0423HD4H-WB
10KR1J 04G160008210 C223 C224
N/A 33P25VNPOC1J 33P25VNPOC1J
2
/@ /@
2
Unmount
C C
CS Drives data after High-Z after
High Rising clock edge Falling clock edge

Codec Realtek ALC5642 Low Falling clock edge Rising clock edge
VDD_1V8_CDC Forte media: 04G160007713

KNOWLES/SPM0423HD4H-WB:04G160008210
1
VDD_SPK VCORE_CDC
R313 VCORE_CDC 1 2 C225 N/A
10KR1J VDD_MIC_CDC VDB_CDC 2.2U6.3VX5RC2M
N/A 1 2 C226 N/A DMIC_DAT_U23 R214 2 0R1J 1 N/A DMIC_DAT
AVDD_CDC_F VCP_CDC 0.1U6.3VX5RC1K DMIC_LR_U23 R213 2 0R1J 1 N/A DMIC_LR
2
12 CDC_LDO1_EN 1 0R1J 2 CDC_LDO1_EN_5642

GND
1
R199
From T30 /@ R198 0229 EMI add
1MR1J
Unmount /@
15
46
42
43
23
3
U24
2
C229 N/A
SPKVDDL
AVDD
MICVDD
SPKVDDR
DCVDD
DBVDD
CPVDD
2.2U10VX5RC3K
GND 19 ALC5642_CPP2 1 2
CPP2 ALC5642_CPN2
18
CPN2
CPP1
20 ALC5642_CPP1 C230 N/A SPEAKER CONN.
21 ALC5642_CPN1 1 2 2.2U10VX5RC3K
CPN1
24 ALC5642_CPVPP 1 2 C231 N/A
CPVPP 2.2U6.3VX5RC2M
MICBIAS CPVEE
27
ALC5642_CPVEE
Unmount
28 MICBIAS 4 1 2 C227 N/A
MICBIAS1 2.2U6.3VX5RC2M
R201
GND SPK_OUT_L+ 1 0R1J 2 SPK_OUT_L+_CON
28 HP_OUT_L HP_OUT_L 28
HPO_L
1
B B
26 HP_OUT_R HP_OUT_R 28 C233
DMIC_DAT HPO_R 27P25VNPOC1J
5 25 N/A
IN1P/DMIC1_DAT HPOFB
1
6 Unmount C232 /@
2
MIC1_P IN1N/DMIC2_DAT/JD1 27P25VNPOC1J
28 MIC1_P 7
MIC1_N IN2P GND /@
28 MIC1_N 8
2
IN2N/JD2 GND
R200
DACREF_CDC 1 SPK_OUT_L+ SPK_OUT_L- 1 0R1J 2 N/A SPK_OUT_L-_CON
SPO_LP SPK_OUT_L-
48
SPO_LN
1
10 45 SPK_OUT_R+ C234 CON2
C228 N/A ALC5642_VREF2 DACREF SPO_RP SPK_OUT_R- 27P25VNPOC1J
2 1 12 47 4 6
4.7U6.3VX5RC2M VREF2 SPO_RN /@ 4 SIDE2
11 3
2
C235 N/A ALC5642_VREF1 VREF1 3
2 1 2
4.7U6.3VX5RC2M MONOOUTP 2
13 1 5
MONOP MONOOUTN GND 1 SIDE1
14
GND MONON R205 WTOB_CON_4P
1 0R1J 2N/A R203 DAP_MCLK1_5642 37 17 LINEOUTR SPK_OUT_R- 1 0R1J 2 N/A SPK_OUT_R-_CON N/A
13 DAP_MCLK1 MCLK LOUTR
0R1J 2N/A R204 DAP2_SCLK_5642 LINEOUTL
T30 13 DAP2_SCLK 1 36
BCLK1 LOUTL
16 12G171030040
1
1 0R1J 2N/A R206 DAP2_FS_5642 35 C237 GND
13 DAP2_FS LRCK1
1 0R1J 2N/A R208 DAP2_DOUT_5642 33 41 DMIC_LR 27P25VNPOC1J
DAP2 13 DAP2_DOUT DACDAT1 GPIO2/DMIC_SCL
1
13 DAP2_DIN 1 0R1J 2N/A R207 DAP2_DIN_5642 34 40 CDC_IRQ# CDC_IRQ# 13 Unmount C236 /@
2
ADCDAT1 GPIO1/IRQ CDC_LDO1_EN_5642 27P25VNPOC1J
44
LDO1_EN /@
2
30 GND
BCLK2 R202
29
LRCK2 SPK_OUT_R+ 1 0R1J SPK_OUT_R+_CON
31 2 N/A
DACDAT2
32
ADCDAT2
1
C238
CODEC_I2C_SCL R211 0R1J 1 N/A 27P25VNPOC1J
CPGND
38 2 PWR_I2C_SCL 6,26,49,50
SCL
AGND
GND1
GND2
39 CODEC_I2C_SDA R210 2 0R1J 1 N/A /@

PWR_I2C_SDA 6,26,49,50
2
SDA
DAP_MCLK1_5642
ALC5642 GND
9
49
50
22
DAP2_SCLK_5642 N/A C258 C259

1
/@ /@
2
2
1
C239 R212 C240 Unmount

A 27P25VNPOC1J 100R1J 27P25VNPOC1J A
/@ /@ /@
2
GND GND GND HP_OUT_L 2 C241 N/A HP_OUT_L_C

0229 EMI add 1
2
Unmount 0.1U6.3VX5RC1K
HP_OUT_R 1 2 C242 N/A HP_OUT_R_C
0.1U6.3VX5RC1K
1
DAP2_FS_5642
R215 R216
20R1F 20R1F
1
C243 Unmount N/A N/A

27P25VNPOC1J 2
2
/@ Title : Codec ALC5642
2
GND ASUSTeK COMPUTER INC. EPAD Engineer: Richard Lin

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
External. Microphone 22pin FFC Connector

R217
470R1J Mic & Headphone Conn.
27 MICBIAS MICBIAS 2 1 N/A MIC1BIAS_IO
0229 EMI add
1
C245 R258
C244 10U6.3VX5RC3M HP_DET# 1 0R2J 2 N/A HP_DET#_CONN
4.7U6.3VX5RC2M N/A
2
N/A R260
1
EP101/0318 MIC1P_R 1 0R2J 2 N/A MIC1P_R_CONN
R218
1KR1J
Add Cap.
Unmount
1
N/A GND GND C252 C251
C251, C252, C271, C279 C279 C271 220P50VNPOC2J 220P50VNPOC2J
2
D D
220P50VNPOC2J 220P50VNPOC2J N/A N/A
change to 07019-00010000 ESD
2
/@ /@
PR 0214 support iphone headphone ESD
GND GND GND GND
Change
1213 1213 R6775 0 ohm -> 68 ohms
C6701 1uF -> 0.1uF R235
C246 HPOUTL2 1 0R2J 2 N/A HPOUTL2_CONN
0.1U10VX5RC2K R219 L29 N/A
27 MIC1_N 1 2 MIC1P_RR 1 68R1J 2MIC1P_R_LRC 1 2 10Ohm/100Mhz MIC1P_R R236
N/A N/A HPOUTR2 1 0R2J 2 N/A HPOUTR2_CONN
1
27 MIC1_P C247 Unmount
1
220P50VNPOC2J C250 C249
C249, C250, C269, C270
1
C248 R220 N/A C270 C269 220P50VNPOC2J 220P50VNPOC2J
2
1U6.3VX5RC2K 100KR1J 220P50VNPOC2J 220P50VNPOC2J N/A N/A
change to 07019-00010000 ESD
2
N/A N/A VDD_1V8_GEN /@ /@
ESD
2
williams 0607
2 GND Change
GND 1201 GND GND GND GND
1
R221 R6712 VDD_USB1_VBUS
330KR1J
N/A
100K -> 330K
1 2 C336 /@
1U6.3VX5RC2K
2
1 2 C338 /@ R322
HOOK_DET# 13 0.1U6.3VX5RC1K VDD_USB1_VBUS 1 0R6 2 N/A VDD_USB1_VBUS_CONN
1 2 C339 /@
0.1U6.3VX5RC1K
3
Q5B GND
UM6K1N 0OHM 4 3 RN1B
HOOK_DET 5 N/A N/A
USB1_D_FP
14,49 USB1_DP
3
1
90Ohm/100Mhz Unmount
C253 Also connect to SMB347 L11 /@
Unmount 0.1U6.3VX5RC1K GND USB1_D_FN
14,49 USB1_DN
2
2
C /@ C
0OHM 2 1 RN1A
GND N/A
Also connect to SMB347
R233
USB1_ID 1 0R2J 2 N/A USB1_ID_CON
14 USB1_ID
2
EP101
1
VDD_1V8_GEN R223 1201 C254
330KR1J PR 0213 0.1U6.3VX5RC1K R222 USB1_ID_CON 1 2 C255 N/A
EXT. Headphone
1
1 N/A 2 R6707 N/A 100KR1J 220P50VNPOC2J
/@
100K -> 330K
Change
2
13 HEAD_DET#
HEAD_DET# L8 1 2 HP_DET# ESD
N/A
10Ohm/100Mhz EP101 C255 change to
R224 N/A
PR 0215B RF request
R225
07019-00010000
27 HP_OUT_L 1 0R1J 2 HP_OUTR_L 1 2 L9 N/A HPOUTL2_R 1 33R1J 2 N/A HPOUTL2
22U6.3VX5RC5M VDD_USB1_VBUS
R226 N/A R227 ESD
27 HP_OUT_R 1 0R1J 2 HP_OUTR_R 1 2 L10 N/A HPOUTR2_R 1 33R1J 2 N/A HPOUTR2 22
22U6.3VX5RC5M HP_DET#_CONN 22
21 24
21 SIDE2
1
HPOUTR2 USB1_D_FN 20
20
1
EP101 C256 C257 HPOUTR2_CONN 19

R228 R229 220P25VX7RC1K 220P25VX7RC1K HPOUTL2_CONN 19
VI/O
VBUS
18
VI/O
PR 0217D 330R1J 330R1J N/A N/A 17
18
2
17
6
/@ /@ MIC1P_R_CONN 16
2
16
Unmount 15
15
Unmount GND GND D2 USB1_ID_CON
14
14
13
IP4223-CZ6 VDD_USB1_VBUS_CONN 13
12
/@ USB1_D_FP 12
11
GND USB1_D_FN 11
10
10
1 2 C337 /@ 9
B
1U6.3VX5RC2K 9 B
8
R230 8
1 2 C331 /@ 7
UART_DEBUG_TXD 7
1 1KR1J 2 N/A HPOUTL2 1U6.3VX5RC2K 6
12,24 UART_DEBUG_TXD 6
1 2 C332 /@ 5
VI/O
VI/O
3
1
UART_DEBUG_RXD HPOUTR2 1U6.3VX5RC2K 5
1 2 4
GND
12,24 UART_DEBUG_RXD 1KR1J N/A 4
1 2 C334 /@ 3
R231 HPOUTL2 USB1_D_FP 0.1U6.3VX5RC1K 3
TF201X add UART through Phone Jack 0930 2
2 SIDE1
23
1 2 C335 /@ VDD_USB1_VBUS_CONN 1
GND 0.1U6.3VX5RC1K 1
CON1
VDD_1V8_GEN GND FPC_CON_22P
12018-00360200
N/A
1
R293 DOCK_5V
330KR1J Change
To Tegra3 GPIO_PU5 N/A 4pin Docking Connector
2
DOCK_IN# R308 2 C328 N/A

12 DOCK_IN#
1KR1J 0229 EMI & Safety add DOCK_5V 1
220P50VNPOC2J
3
N/A R321
Q12B DOCK_5V 1 0R6 2 N/A DOCK_5V_SPRING
ESD 07019-00010000
2
UM6K1N 5 DOCK_5V_IN GND

N/A DOCK_5V
4
1
1
R309 U51
C284 1MR1J 0229 EMI add DOCK_5V_SPRING 1
1 EMI_SPRING_PAD
GND 0.1U6.3VX5RC1K N/A R263 N/A N/A
2
N/A HPOUTL2 1 0R1J 2 HPOUTL2_SPRING

2
HPOUTL2_SPRING 1 U52
R311 N/A DOCK_5V_SPRING 1 EMI_SPRING_PAD
VDD_1V8_GEN GND GND HPOUTR2 1 0R1J 2 HPOUTR2_SPRING N/A
Unmount HPOUTR2_SPRING 1 U53

1
1
1
VDD_1V8_GEN C327 C326 C321 EMI_SPRING_PAD
R256 C320 C319 220P50VNPOC2J 220P50VNPOC2J 10U6.3VX5RC3M N/A
330KR1J
A
ESD 220P50VNPOC2J/@ 220P50VNPOC2J N/A N/A /@ A
2
2
N/A /@ 07019-00010000 07019-00010000 11G233210625310 1 U54
1
1
07019-00010000 07019-00010000 Unmount EMI_SPRING_PAD

2
R257 Change N/A

13 LINOUT_DET 10KR1J GND GND GND GND GND
ESD
6
N/A GND
2
Q12A 2 HPOUTR2
UM6K1N
1
N/A
C319, C320, C326, C327, C328 change
GND
to 07019-00010000 Title : Audio/USB Conn.
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
From 5V boost Circuit

L12 VCC_TCH For once 5V boost unused
120Ohm /@
VDD_5V0_SYS 1 2 L14 to 5V boost enable
120Ohm /@
VDD_AC_BAT 1 2 VCC_TCH 7,48 TS_WAKEUP# EN_5V0_SBY 7,48 Connectivity refer to Touch sensor spec
L15
Vin=5V
VCC_TCH
120Ohm N/A I/O
+3VSUS 1 2 VCC_TCH J2
P_+3V3_VIN_20 TOUCH_Y30 1
TOUCH_Y32 1 TOUCH_Y31
3 2
3 2
1
TOUCH_Y34 5 4 TOUCH_Y33
3V_Power_Supply for Touch 5 4
1
R232 7 6
100KR1J C261 C260 TOUCH_X1 7 6
9 8
N/A 1U6.3VX5RC2K 0.1U6.3VX5RC1K TOUCH_X3 9 8 TOUCH_X2
11 10
2
11 10
FPC1
N/A N/A TOUCH_X5 13 12 TOUCH_X4
2
D TP_3V3 GND_TP TOUCH_X7 13 12 TOUCH_X6 GND_TP
D
15 14
U30 TOUCH_X9 15 14 TOUCH_X8
Unmount GND_TP GND_TP
P_+3V3_VO_20 TOUCH_X11
17
17 16
16
TOUCH_X10
6 1 19 18
R310 VIN VOUT TOUCH_X13 19 18 TOUCH_X12
5 2 21 20
VSS2 VSS1 21 20
7,48 TS_WAKEUP# 1 0R1J 2 TP_+3V_EN 4 3 TOUCH_X15 23 22 TOUCH_X14
ON/OFF NC 23 22
1
/@ TOUCH_X17 25 24 TOUCH_X16
25 24
1
S-1167B31-I6T2G C263 C264 TOUCH_X19 27 26 TOUCH_X18
C262 N/A 1U6.3VX5RC2K 0.1U6.3VX5RC1K TOUCH_X21 27 26 TOUCH_X20
29 28
2
0.1U6.3VX5RC1K 06G029075018 N/A N/A EKTF3624_TDO 29 28
31 30
2
/@ 31 30
GND_TP GND_TP GND_TP GND_TP
0610
修修修12018-00110000
GND_TP EN, High>1.5V FPC_CON_31P
12018-00110000 GND
Unmount EN, Low<0.25V Vout=3.1V , Iout=150mA N/A
J3
R239 N/A TOUCH_SENSOR_CONFIG 1

RESET#_1036 TOUCH_Y1 1
TP_3V3 1 10KR1J 2 3 2
5 4
3624_RESET#_1036 TOUCH_Y5 5 4 TOUCH_Y4
1 2 7 6
7 6
1
0R1J TOUCH_Y7 TOUCH_Y6

Touch interface 9
9 8
8
1
R237 R238 TOUCH_Y9 11 10 TOUCH_Y8 GND

1MR1J R240 N/A TOUCH_Y11 11 10 TOUCH_Y10
13 12
13 12
FPC2
N/A 0R1J Unmount TOUCH_Y13 15 14 TOUCH_Y12
/@ TP_3V3 TOUCH_Y15 15 14 TOUCH_Y14
17 16
2
19 18
2
19 18
1 R241 TP_RESET# 1 R242 TP_RESET#_R TOUCH_Y19 TOUCH_Y18
Reset 7 TS_RESET#_3V3
N/A 0R1J
2
10KR1J
2
N/A TP_SDA N/A 1 2.2KR1J 2 R243 TOUCH_Y21
21
23
21
23
20
22
20
22 TOUCH_Y20
R244 TP_SCL N/A TOUCH_Y25 25 24 TOUCH_Y24
1 2.2KR1J 2 R245
Interrupt 7 TS_IRQ# 1 0R1J 2 N/A TP_INT# TOUCH_Y27
27
29
27
29
26
28
26
28 TOUCH_Y26
TP_INT# N/A 1 1MR1J 2 R246 TOUCH_Y29 31 30 TOUCH_Y28
31 30
R247
1 0R1J 2 N/A TP_SDA FPC_CON_31P
7 GEN2_I2C_SDA
1 2 TP_SCL 12018-00110000
7 GEN2_I2C_SCL 0R1J N/A
C N/A C
R248
EKTF3624_U_AVDD GND_TP
TOUCH_Y24 TOUCH_Y25 EKTF3624_U_V1P8
TOUCH_Y23 TOUCH_Y26 TOUCH_X1
TOUCH_Y22 TOUCH_Y27 TOUCH_X2
TOUCH_Y21 TOUCH_Y28 TP_3V3 1 2 C267 N/A TP_3V3 TOUCH_X3
1
TOUCH_Y20 TOUCH_Y29 0.1U6.3VX5RC1K TOUCH_X4
TOUCH_Y19 TOUCH_Y30 C265 C266 1 2 C268 /@ TOUCH_X5
TOUCH_Y31 1U6.3VX5RC2K 1U6.3VX5RC2K 0.1U6.3VX5RC1K TOUCH_X6
2
TOUCH_Y32 N/A N/A TOUCH_X7
GND_TP GND_TP
Unmount GND_TP GND_TP
GND_TP
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
50
49
48
47
46
45
44
43
42
41
40
39
38
37
GND
GND_TP
0224 change GND_TP to GND
GND2
GND1
TP17
TP16
TP15
TP14
TP13
TP12
TP11
TP10
TP9
TP8
TP7
TP6
TP5
TP4
GND2
GND1
DAVCC/AVCC2
DAGND/AGND2
TP24
TP23
TP22
TP21
TP20
TP19
TP18
VCC
VCC3IO
VCC3K
TOUCH_Y17 TP18 TP3 TOUCH_Y34
2 41
TOUCH_Y16 TP19 TP2 TOUCH_X8
3 40 GND_TP 1 36
TOUCH_Y15 TP20 TP1 TOUCH_M_CLK GND/JTAG_SEL/GNDIO TP17 TOUCH_X9
4 39 2 35
TOUCH_Y14 TP21 TP0 TOUCH_TX_DRIVE CLKI/PA6 TP16 TOUCH_X10
5 38 3 34
TOUCH_Y13 TP22 TX_DRIVE TOUCH_EXT_SYNC CLKO/PA7 TP15
6 37 1EKTF3624_JTAG_TMS 4 33 TOUCH_X11
TOUCH_Y12 TP23 EXT_SYNC TOUCH_SPI_MISO T8 /@ TP_SCL SPI_CS/PA0 TP14 TOUCH_X12
7 36 5
TOUCH_Y11 8
TP24
TP25 EKTH1036
SPI_SDO
SPI_SDI
35 TOUCH_SPI_MOSI TPC26B TP_SDA 6
SPI_SCK/SCL/PA1
SPI_SDI/SDA/PA2
EKTF3624 TP13
TP12
32
31 TOUCH_X13
TOUCH_Y10 9 34 TOUCH_SPI_SCK 1EKTF3624_JTAG_TDO 7 30 TOUCH_X14
TOUCH_Y9 TP26 SPI_SCK TOUCH_SPI_CS T9 /@ TP_RESET#_R SPI_SDO/PA3 TP11 TOUCH_X15
10 33 8 29
AGND/VSS/GND
SPI2_SDO/PA14
SPI2_SCK/PA12
TP27 SPI_CS RESETB TP10
DAGND/AGND1
SPI2_SDI/PA13
DAVCC/AVCC1
TOUCH_Y8 11 32 RESET#_1036 TPC26B TP_INT# 9 TOUCH_X16
SPI2_CS/PA11
28
TOUCH_Y7 TP28 RESETB TOUCH_M_CLK TOUCH_EXT_SYNC SCL/PA4 TP9 TOUCH_X17
12 31 10 27
TOUCH_Y6 TP29 CLKI 3624_RESET#_1036 EXT_SYNC/PA8 TP8 TOUCH_X18
VCI/AVDD
13 30 TP_3V3 11 26
TDO/PB0
TOUCH_Y5 TP30 VCCIO TOUCH_SENSOR_CONFIG EXTINT0/PA9 TP7 TOUCH_X19
14 29 12 25
TP31 VCC3K EXTINT1/PA10 TP6
VOUT
TP32
TP33
TP34
TP35
R249
C1N
C2N
C4P
C3P
C1P
C2P
TP1
TP2
TP3
TP4
TP5
VH
B B
U25 TP_3V3 1 10KR1J 2 N/A EKTF3624_TDO U26
EKTH1036BW EKTFQ3624-AS003BW
15
16
17
18
19
20
EKTH1036_C4P 21
EKTH1036_C3P 22
EKTH1036_C1N 23
EKTH1036_C1P 24
EKTH1036_C2P 25
EKTH1036_C2N 26
27
28
13
14
15
16
17
18
19
20
21
22
23
24
N/A N/A
TOUCH_SPI_CS TOUCH_X20
EKTF3624_UM_AVDD
TOUCH_Y4 GND_TP R250 N/A TOUCH_SPI_SCK TOUCH_X21
TOUCH_Y3 TP_3V3 1 100KR1J 2 TOUCH_SENSOR_CONFIG TOUCH_SPI_MOSI
EKTF3624_TDO
TOUCH_Y2 R252 TOUCH_SPI_MISO
TOUCH_Y1 EKTH1036_VCI 2 0R1J 1 N/A 1 2
R251 TOUCH_TX_DRIVE
100KR1J /@
1
C273 GND_TP
EKTH1036_VOUT 1 2 C272 N/A 1U6.3VX5RC2K Unmount 1 2 C274 N/A
1U25VX5RC3K N/A 4.7U6.3VX5RC2M
2
EKTH1036_VH 1 2 C275 N/A

1U25VX5RC3K GND_TP
GND_TP GND_TP
TP_3V3 1 2 C276 N/A EKTH1036_C1P

1U6.3VX5RC2K
1
1 2 C277 N/A C285 N/A

0.1U6.3VX5RC1K 1U10VX5RC2K
1 2 C278 N/A
2
0.1U6.3VX5RC1K EKTH1036_C1N
1 2 C280 /@
1
0.1U6.3VX5RC1K C281 N/A

1U25VX5RC3K
R253
2
GND_TP EKTH1036_VOUT 1 0R1J 2 EKTH1036_C3P

/@
A R254 A
1 0R1J 2 EKTH1036_C2P
/@
1
C282 N/A
Power & 1U10VX5RC2K
2
EKTH1036_C2N
Charge Pump
1
C283 N/A
1U25VX5RC3K
R255
2
1 0R1J
/@
2 EKTH1036_C4P
Title : Touch Sensor, Conn.
Unmount Size Project Name Rev
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
D D
C C
VDD_CELL_LCL
BAT_COINCELL 50
0804
1
C316
10U6.3VX5RC3M
2
N/A
B B
A A
Title :Coin Cell

B
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
Camera VDDIO 1.8V Camera AVDD Camera VCM Power
MAX77663 LDO5 R259 N/A

VDD_PMU_LDO5 1 0R2J 2 VDDIO_CAM
VDD_5V0_AC_BAT VDD_5V0_AC_BAT
VPH_PWR_CHGR AVDD_CAM1 VPH_PWR_CHGR AVDD_VCM
0226 U27 U28

6 1 6 1
D
VDDIO_CAM change to PMU LDO5 5
VIN
VSS2
VOUT
VSS1
2 5
VIN
VSS2
VOUT
VSS1
2 D
CAM1_AVDD_EN 4 3 VCM_AVDD_EN 4 3
6 CAM1_LDO_EN ON/OFF NC 6 CAM2_LDO_EN ON/OFF NC
1
S-1132B28-I6T2G C400 S-1132B28-I6T2G C399
Delete Q13, Q14, R258, R260, R263, C279
1
C397 R261 N/A 1U6.3VX5RC2K C398 R262 /@ 1U6.3VX5RC2K
1U6.3VX5RC2K 1MR1J N/A 1U6.3VX5RC2K 1MR1J /@
Change R259 from 1M -> 0ohm
2
N/A N/A /@ N/A
2
2
2
1201 1201
R3427 100K -> 1M R3428 100K -> 1M
VDDIO_CAM 1 2 C286 N/A

1U6.3VX5RC2K
1 2 C287 N/A
0.1U6.3VX5RC1K
MIPI
C
5M Camera (Rear) C
1.2M Camera (Front)
12018-00050000
/@ FPC_CON_24P
R264 1 15R1J 2 CAM_MCLK_R_5M 1 AVDD_CAM1
9 CAM_MCLK 1 AVDD_CAM1
2
2 VDDIO_CAM
VDDIO_CAM 3
3
1
C288 C289 4 25
10P50VNPOC1J 10P50VNPOC1J 4 SIDE1
5
23
24
/@ /@ 5 J4
Unmount Unmount 6 PWDN_2M 9
2
6 N/A
7
SIDE3
SIDE4
AVDD_CAM1 7
8 R265 1 15R1J 2 CAM_MCLK_R_1M2 1 2
8 9 CAM_MCLK 1 2
PWDN_5M_R 9 3 4
9 PWDN_5M 9 3 4
CAM_RST_5M_R 10 5 6 PWDN_2M_R
9 CAM_RST_5M 10 5 6
1
AVDD_VCM 11 7 8 CAM_RST_2M_R
11 7 8 CAM_RST_2M 12
12 C290 9 10
CSI_CLKAP CSI_CLKAP_R 12 10P50VNPOC1J 9 10 CAM_I2C_SCL 9,25,26,44
9 CSI_CLKAP 13 Unmount 11 12
2
CSI_CLKAN CSI_CLKAN_R 13 /@ 11 12 CAM_I2C_SDA 9,25,26,44
9 CSI_CLKAN 14 13 14
14 13 14
15 15 16 CSI_D1BP 9
CSI_D1AN CSI_D1AN_R 15 CSI_CLKBP 15 16
9 CSI_D1AN 16 9 CSI_CLKBP 17 18 CSI_D1BN 9
16 17 18
SIDE1
SIDE2
CSI_D1AP CSI_D1AP_R 17 CSI_CLKBN 19 20
9 CSI_D1AP 17 9 CSI_CLKBN 19 20
18
CSI_D2AN CSI_D2AN_R 18
9 CSI_D2AN 19 26
CSI_D2AP CSI_D2AP_R 19 SIDE2
9 CSI_D2AP 20
21
22
20
21
CAM_I2C_SCL_5R 21
22
9,25,26,44 CAM_I2C_SCL CAM_I2C_SDA_5R 22
23
9,25,26,44 CAM_I2C_SDA 23 12016-00100000
24
24 BTOB_CON_20P
CON3 N/A
/@
J4 2nd source
B PANASONIC/AXT520124 N/A
B
12G161H0020A PWDN_2M 1 1MR1J 2 R266
N/A
PWDN_5M_R 1 1MR1J 2 R267
GND
CSI_CLKBP CAM_I2C_SCL CSI_CLKAP

GND CSI_CLKBN CAM_I2C_SDA CSI_CLKAN
N/A
1
1
CAM_RST_2M 1 1MR1J 2 R268
C291 C292 C296 C293 C294 C295
N/A 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K
2
2
CAM_RST_5M_R 1 1MR1J 2 R269 /@ /@ /@ /@ /@ /@
GND
Unmount
GND
CSI_D2AN CSI_D1AN CSI_D1BP

CSI_D2AP CSI_D1AP CSI_D1BN
1
1
C297 C298 C299 C300 C301 C302
0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K 0.1U6.3VX5RC1K
2
2
/@ /@ /@ /@ /@ /@
Unmount
RF Requst
A A

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
HOT_RST# inverse for PMIC

VDD_5V0_AC_BAT MAX77663 SD2 (2A)
Reset Button
VPH_PWR_CHGR
VDD_1V8_PMU_DCDC2
VDD_1V8_GEN
SI2305DS 2nd Source
1
R276 07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2 R278
2
10KR1J 2 4.7KR1J SYS_RESET# to MAX77663 nRSTIO & T30 SYS_RESETn
N/A
S 07G005051310 P-MOSFET NTR2101PT1G SOT-23 N/A
Q15 07G00538101L P-MOSFET AP2305GN SOT-23 R312 N/A
2
D D
24 HOT_RST# 11 SI2305DS SYS_RESET#_SOURCE 1 0R1J 2 SYS_RESET# 6,20,50
G N/A D4 N/A
3 D
3
R277 N/A BAT54CW
1
RST_SW# 1 0R1J 2 HOT_RST_R1 2 C304
3 HOT_RST 5 Q8B 1000P25VX7RC1K
1
1 UM6K1N N/A
2
1
1
R279 PMU internal PD 200~400k N/A
C305 330KR1J R271
1U6.3VX5RC2K N/A 100KR1J
2
/@ N/A
2
2
Unmount
PWRON Key long press RESET for PMIC

VDD_5V0_AC_BAT FORCE_RECOVERY#
VPH_PWR_CHGR
+3VSUS
1
VDD_1V8_GEN
R270
Unmount
VDD_5V0_AC_BAT
1
10MR1J
Q16A N/A N/A VDD_5V0_AC_BAT R273
UM6K1N VPH_PWR_CHGR 100KR1J
2
1 6 PWR_SW#_DELAY_RC2 /@
1
VPH_PWR_CHGR
Q
2
1
C303 R274
1U6.3VX5RC2K R272 100KR1J
F_RECOVERY# 18,24
2
2
N/A 100KR1J 2
S N/A
2
N/A
6
Q23
2
PWR_SW# 4 3 PWR_SW#_RESET_DELAY 11 SI2305DS R275 N/A Q17A

33 PWR_SW# G N/A FORCE_R_Q1 1 2 FORCE_R_Q2 2 UM6K1N
C 3 D 0R1J N/A C
3
1
Q16B HOT_RST_R2
TF201 0901 modify
1
UM6K1N C333
1
N/A CW:T30 pull high 50~100K internally. Q17B 2.2U6.3VX5RC2M

R305 5 UM6K1N /@
6 VOL_UP_BUTTON
2
330KR1J N/A GND
4
N/A A B Q
SI2305DS 2nd Source
2
GND
07G005C69010 P-MOSFET EMF44P02J SOT-23 0 0 0
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2 GND Unmount
07G005051310 P-MOSFET NTR2101PT1G SOT-23 0 1 1
VOL_UP
H = 1.8V 1 0 1
L = 0V
1 1 1
B B
8pin Button Connector
CON4 N/A
FPC_CON_8P
33 PWR_SW#_CTL PWR_SW#_CTL R314 1 0R1J 2 N/A PWR_SW#_CTL_CONN /@ T10 1 PWR_SW#_CTL_CONN 8
/@ T11 PWR_SW#_BUTTON_CONN 8
1 7 10
PWR_SW#_BUTTON R315 1 0R1J PWR_SW#_BUTTON_CONN VOL_DWN_BUTTON_R 7 SIDE2
33 PWR_SW#_BUTTON 2 N/A /@ T12 1 6
/@ T14 KB_ROW0_SW 6
1 5
/@ T13 VOL_UP_BUTTON_R 5
1 4
VOL_DWN_BUTTON R297 1 0R1J 4
6 VOL_DWN_BUTTON 2 N/A VOL_DWN_BUTTON_R /@ T17 1 RST_SW#_BUTTON 3
VOL_UP_BUTTON R286 1 0R1J VOL_UP_BUTTON_R 3
6 VOL_UP_BUTTON 2 N/A 2 9
KB_ROW0 R280 1 0R1J KB_ROW0_SW 2 SIDE1
6,33 KB_ROW0 2 N/A 1
1
1
C306 12018-00210800
33P25VNPOC1J
/@
2
PWR_SW#_CTL_CONN 2 C307 N/A

Unmount Change Unmount RST SW 1
220P50VNPOC2J
RST_SW# R304 1 0R1J 2 N/A RST_SW#_BUTTON 07019-00010000
/@ C324 2 1 PWR_SW#_CTL Change PWR_SW#_BUTTON_CONN 1 2 C308 N/A
07019-00010000 07019-00010000
1
/@ C323 2 1 PWR_SW#_BUTTON C309 VOL_UP_BUTTON_R 1 2 C310 N/A

220P50VNPOC2J 220P50VNPOC2J 220P50VNPOC2J
07019-00010000 N/A 07019-00010000
2
/@ C325 2 1 VOL_DWN_BUTTON 07019-00010000 VOL_DWN_BUTTON_R 1 2 C311 N/A

07019-00010000 07019-00010000
/@ C329 2 1 VOL_UP_BUTTON KB_ROW0_SW 1 2 C312 N/A
220P50VNPOC2J GND 07019-00010000
07019-00010000 220P50VNPOC2J
/@ C322 2 1 KB_ROW0
A
07019-00010000 ESD A
220P50VNPOC2J Change
/@ C330
07019-00010000
2 1 RST_SW# C309 change to
220P50VNPOC2J
07019-00010000 ESD
ESD C307, C308, C310, C311, C312
change to 07019-00010000 change to 07019-00010000 Title : Buttons /Conn.
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
ACOK#_PMIC to MAX77663 ACOK, check Polarity(active Low) on PMU side
Power Button VPH_PWR_CHGR VDD_5V0_AC_BAT PWRBTN Logic VDD_5V0_AC_BAT
1
VPH_PWR_CHGR
6 PWR_SW#_BUTTON_R Page 32 VDD_1V8_GEN
R281
10KR1J DAU BD PWR_SW# BUTTON
Tegra KB COL0 N/A PR 0217
1
Q19A N/A Q19B N/A
1
UM6K1N UM6K1N R283
6,32 KB_ROW0 6 1 KB_ROW0_NMOS 4 3 PWR_SW#_BUTTON PWR_SW#_BUTTON 32 R282 10KR1J
2
1MR1J 2
S N/A
N/A Q20
Tegra KB ROW0
2
SI2305DS AP_ONKEY#
2
AP_ONKEY# 12
PWR_SW#_CTL
PWR_SW#_CTL 32
PWR_SW# 11 N/A
6
G R287 N/A
3 D
1
1KR1J Q21A
3
1
1
D D
R284 C313 R285 ONKEY_R1 1 2 ONKEY_R2 2 UM6K1N
0R1J 0.1U6.3VX5RC1K 1MR1J C314 N/A
1
1
N/A N/A N/A 0.1U6.3VX5RC1K
2
/@ R295
2
1230
2
PWR_SW#_CTL_0ohm 10KR1J SI2305DS 2nd Source
Unmount GND N/A
EMC add 07G005C69010 P-MOSFET EMF44P02J SOT-23
5
2
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
32 PWR_SW# 3 4
07G005051310 P-MOSFET NTR2101PT1G SOT-23
Q18B 07G00538101L P-MOSFET AP2305GN SOT-23
UM6K1N
N/A
BAT_LOW#
VDD_5V0_AC_BAT
PMU_ONKEY# PMU_ONKEY# 50 Signal to MAX77663
1
VPH_PWR_CHGR R289
220KR1J PMU_ONKEY# to MAX77663 EN0, check Polarity on PMU side
3
1 N/A Q21B
UM6K1N
2
R290 ONKEY_PMIC 5 N/A
Q22B 100KR1J
4
6
UM6K1N N/A
N/A
2
PWR_SW# 4 3 PWR_SW#_DELAY 2 Q22A

UM6K1N
1
N/A
5
VPH_PWR_CHGR
VDD_5V0_AC_BAT
1
2MR1J
R288
2
N/A
2
C 1 6 PWR_SW#_DELAY_RC1 C
Q18A
1
UM6K1N C315
N/A 2.2U6.3VX5RC2M
N/A
2
Charger Related Signals

VDD_5V0_AC_BAT
VDD_5V0_AC_BAT
VDD_1V8_GEN VPH_PWR_CHGR Battery Voltage Low Detection
1
VPH_PWR_CHGR
R298 R291
10KR1J 1MR1J VDD_1V8_GEN
Signal from SMB347
1
N/A D6 N/A
To Tegra3 RB520CS_30 3% Battry capacity : 3.4V R296
VBATT
2
2
AP_ACOK# 1 2 100KR1J 2
12 AP_ACOK# SMB347_ACOK# 49 S
N/A N/A Q27
R299 N/A U29 R300 N/A SI2305DS
2
RB520CS 2nd Source VBATT 1 10KR1J 2 RESET_IC 4 1 BAT_LOW#_R 1 0R1J 2 BAT_LOW# 11 N/A
VDD OUT G
3 2
07004-00030200 - SCHOTTKY BAT54TM SOD923 NC VSS 3 D R301 N/A
3
1
1
07G004045223 SCHOTTKY RB520CS-30 VMN2 [GA] ROHM C318 S-1000N34-I4T1G LL_BAT_R 1 1KR1J 2 LL_BAT_T30 LL_BAT_T30 6
C317 10U6.3VX5RC3M N/A
07G004250110 SCHOTTKY RB520G-30 SOD723 [GA] PANJIT
1
B B
0.1U6.3VX5RC1K N/A
2
N/A R302
Charger OD output (INOK/SYSOK, SMB347 E2 pin) R303 Signal to MAX77663 100KR1J
ACOK#_PMIC_R 1 0R1J 2 ACOK#_PMIC N/A
PU 1M (VPH_PWR) on charger page(p.49) N/A ACOK#_PMIC 50
2
preset to ACtive Low
L --> AC/USB IN
SI2305DS 2nd Source

VDD_1V8_GEN
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
1
R294
10KR1J Signal from SMB347
To Tegra3 N/A
2
AP_CHARGING# 1 0R1J 2 R292

12 AP_CHARGING# SMB347_STAT 49
N/A
Charger OD output (STAT, SMB347 F5 pin)

PU 1M (VPH_PWR) on charger page(p.49)
preset to ACtive Low
L --> charging
H --> other status
A A
6 SMB347_USB51HC 1 0R1J 2 R306

N/A SMB347_USB51HC_CHGR 49
From Tegra3 1 0R1J 2 R307

Signal to SMB347
6 SMB347_SUSP SMB347_SUSP_CHGR 49
N/A
ROW10, 11 for charger control

Title : T30 Core & Fuse
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
Unmount
CLIP1 CLIP2 CLIP3 CLIP4 CLIP5 CLIP6 CLIP7

1 1 1 1 1 1 1
GND1 GND1 GND1 GND1 GND1 GND1 GND1
2 2 2 2 2 2 2
3 3 3 3 3 3 3
4 4 4 4 4 4 4
5 5 5 5 5 5 5
SHIELDING_5P SHIELDING_5P SHIELDING_5P SHIELDING_5P SHIELDING_5P SHIELDING_5P SHIELDING_5P
13GOK0310M100-10 13GOK0310M100-10 13GOK0310M100-10 13GOK0310M100-10 13GOK0310M100-10 13GOK0310M100-10 13GOK0310M100-10
/@ /@ /@ /@ /@ /@ /@
D D
CLIP9 CLIP10
CLIP8 1 1
GND1 GND1
1 2 2
GND1 GND2 GND2
2 3 3
GND2 GND3 GND3
3 4 4
GND3 GND4 GND4
4 5 5
GND4 GND5 GND5
5
GND5 SHIELDING_5P SHIELDING_5P
SHIELDING_5P 13GOK0310M100-10 13GOK0310M100-10
13GOK0310M100-10 /@ /@
/@
Unmount
CLIP11 CLIP13
1 1
GND1 GND1
PTH NPTH 2
GND2
2
GND2
3 3
H1 H5 GND3 GND3
4 4
/@ /@ H9 GND4 GND4
1 1 5 5
/@ GND5 GND5
C138D75 C138D75 1
C59D59N SHIELDING_5P SHIELDING_5P
13GOK0310M100-10 13GOK0310M100-10
H2 H6 /@ /@
1 /@ 1 /@ H10
C138D75 C138D75 1 /@
C59D59N CLIP12 CLIP14
1 1
H3 H7 GND1 GND1
2 2
/@ /@ H11 GND2 GND2
1 1 3 3
/@ GND3 GND3
C C138D75 C138D75 1 4 4 C
GND4 GND4
C59D59N 5 5
GND5 GND5
H4 H8 SHIELDING_5P SHIELDING_5P
1 /@ 1 /@ H12 13GOK0310M100-10 13GOK0310M100-10
C138D75 C138D75 1 /@ /@ /@
C43D43N
GND GND
U61
N/A
1
1
EMI_SPRING_PAD
U62
N/A
1
1
EMI_SPRING_PAD
GND
B B
A A
Title : EMC, Screw hole

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
VDD_1V8_GEN
WIFI SDIO
Unmount
Unmount
1
15 SDMMC3_CLK SDMMC3_CLK
R4011 R4012 R4013 R4014 R4015 R4016 R4017 R4018
47KR1J 47KR1J 47KR1J 47KR1J 47KR1J 47KR1J 47KR1J 47KR1J CW/0318
1
C4001 /@ /@ /@ /@ /@ /@ /@ /@
8P25VNPOC1J Add EMI Cap.
2
Unmount /@
2
SDIO_CLK_SPI_CLK SDIO_DATA0_SPI_DO SDIO_DATA2_SPI_NC
1 0R1J 2 R4001 SDIO_CLK_SPI_CLK SDIO_CLK_SPI_CLK 41
1
D D
C4007 C4009 C4011
15 SDMMC3_CMD SDMMC3_CMD 1 0R1J 2 R4002 SDIO_CMD_SPI_DI SDIO_CMD_SPI_DI 41 100PF5VNPOC1J 100PF5VNPOC1J 100PF5VNPOC1J
/@ /@ /@
2
15 SDMMC3_DAT0 SDMMC3_DAT0 1 0R1J 2 R4003 SDIO_DATA0_SPI_DO SDIO_DATA0_SPI_DO 41
SDIO_CMD_SPI_DI SDIO_DATA1_SPI_IRQ SDIO_DATA3_SPI_CS
15 SDMMC3_DAT1 SDMMC3_DAT1 1 0R1J 2 R4004 SDIO_DATA1_SPI_IRQ SDIO_DATA1_SPI_IRQ 41
1
C4008 C4010 C4012
100PF5VNPOC1J 100PF5VNPOC1J 100PF5VNPOC1J
15 SDMMC3_DAT2 SDMMC3_DAT2 1 0R1J 2 R4005 SDIO_DATA2_SPI_NC SDIO_DATA2_SPI_NC 41 /@ /@ /@
2
15 SDMMC3_DAT3 SDMMC3_DAT3 1 0R1J 2 R4006 SDIO_DATA3_SPI_CS SDIO_DATA3_SPI_CS 41
CW/0228
Follow Cardhu, change to 0ohm.
WF_RST# WL_SHUTDOWN_N_RST_N WL_SHUTDOWN_N_RST_N 15,41

15,41 WF_RST#
WLAN_MAC_WAKEN WL_HOST_WAKE
12,41 WLAN_MAC_WAKEN WL_HOST_WAKE 12,41
CW/0322
6,41,43 CLK_32K_OUT CLK_32K_OUT WiFi_RTC_CLK 6,41,43 Add EMI VARISTOR.
1
C4002
100PF5VNPOC1J WL_EN
/@
2
1
Unmount D4003
TVL040201AB0
/@
15,41 WIFI_EN WL_EN 15,41
2
C C
BT remove FM
0502
12,41 BT_UART3_RXD BT_UART_TXD 12,41
12,41 BT_UART3_TXD BT_UART_RXD 12,41
12,41 BT_UART3_RTS# BT_UART_CTS_N 12,41
12,41 BT_UART3_CTS# BT_UART_RTS_N 12,41
BT_RST_N 1 2
1MR1J 1201 remove FM audio interface,
R4089
R4089 & R4090
GND
BT_WAKE
100K -> 1M
1 2
CW/0322 1MR1J
R4090
Add PD
GND
B B
12,41 BT_WAKEUP BT_WAKE BT_WAKE 12,41
12,41 BT_IRQ#
BT_HOST_WAKE
BT_HOST_WAKE 12,41
BT PCM 0502
12,41 BT_EN BT_RST_N BT_RST_N 12,41 12,41 DAP4_SCLK BT_PCM_CLK
BT_PCM_CLK 12,41
1
C4003
100PF5VNPOC1J 12,41 DAP4_FS BT_PCM_SYNC
BT_PCM_SYNC 12,41
/@
2
12,41 DAP4_DIN BT_PCM_OUT

BT_PCM_OUT 12,41
Unmount
12,41 DAP4_DOUT BT_PCM_IN BT_PCM_IN 12,41
GPS
0502
GPS_nCTS GPS_nCTS 12,43
12,43 GPS_UART2_RTS#
remove proximity to 3G path control 0609
12,43 GPS_UART2_CTS# GPS_nRTS
GPS_nRTS 12,43
GPS_TX
12,43 GPS_UART2_RXD GPS_TX 12,43
12,43 GPS_UART2_TXD GPS_RX GPS_RX 12,43
6,41,43 CLK_32K_OUT GPS_RTCCLK GPS_RTCCLK 6,41,43

A A
12,43 GPS_PWRON GPS_POWER_ON# GPS_POWER_ON# 12,43

1
C4004
100PF5VNPOC1J
/@
2
GPS_POWER_ON# 1 1MR1J 2 N/A

Unmount
CW/0322
R4091 Title : RF Interface
1201 GND Engineer: Richard Lin
Add PD ASUSTeK COMPUTER INC. EPAD
R4091 100K -> 1M
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
0221 ME370T
L4106 L4110 unmount
1.8V VDD_1V8_GEN 1 2 N/A WiFi_BT_VDDIO_1V8 RF solution R4105/R4110 0ohm
Main Ant
120Ohm
R4105
0825 2.7NH/300mA
U7912
R4104 10G212000004010 N/A
ANT_BT_WL_1 2 0R2J 1 ANT_BT_WL_3 2 1 ANT_BT_WL_4 1
N/A N/A 1
EMI_SPRING_PAD
2
L4102 60Ohm/100Mhz
N/A 1
D 3.3V +3VSUS 2 WiFi_BT_VCC_3V3
L4104 L4109 L4110
U7913
N/A
D
NBS_L0603_H39_000S $1.3NH $1.3NH 0.5pF/50V 1

10G213000003010 /@ /@ 11G23200R564320 1
Change /@
EMI_SPRING_PAD
1
WiFi_BT_VCC_3V3 L4102 change to 0ohm
WiFi_BT_VDDIO_1V8
1
1
C9719 C4138
C4143 10U6.3VX5RC3M 0.1U6.3VX5RC1K
0.1U6.3VX5RC1K N/A N/A
2
2
N/A
C4142
CLOSE PIN A2 4.7U6.3VX5RC2M
N/A
C
U4303 C
SR_PA_OUT 1 2 C4135 N/A

Azurewave AW-NH665 VDD1P2_LNLDO1_OUT 1 2 C4145 N/A
0.1U6.3VX5RC1K Close to A3 1
1U6.3VX5RC2K
2 C4136 N/A
0C011-00060000 Close to C2 1 2 C4150 N/A
4.7U6.3VX5RC2M
4.7U6.3VX5RC2M

VDD1P2_LNLDO1_OUT 1 2 C4146 N/A 0.1U6.3VX5RC1K
0.1U6.3VX5RC1K Close to H2
Close to J3
VDD_1P4 1 2 C4140 N/A

4.7U6.3VX5RC2M VDD1P2_LNLDO1_OUT WiFi_BT_VCC_3V3
Close to C1 1 2 C4149 N/A
0.1U6.3VX5RC1K SR_PA_OUT
1 2 C4144 N/A
0.1U6.3VX5RC1K ANT_BT_WL_1 WiFi_BT_VDDIO_1V8
VDD_2P5_OUT 1 2 C4147 N/A

1U6.3VX5RC2K
Close to B3 & B4
0.1U6.3VX5RC1K
H9
H8
H7
H6
H5
H4
H3
H2
H1
Close to B9
J9
J8
J7
J6
J5
J4
J3
J2
J1
WiFi_BT_VCC_3V3 U4303
A1
GND24
GND23
ANT_2G4
GND22
GND21
GND20
GND19
NC2
GND18
GND17
VDD_LN_IN
ANT_AUX_EN
ANT_MAIN_EN
VDDIO_RF
VDDIO
HSIC_STROBE
VDD_WL_PA_A_MODE
HSIC_DATA
GND1
A2
VBAT_IN
SR_PA_OUT A3 G9 WiFi_BT_VCC_3V3
SR_PA_OUT VDD_WL_PA
A4 G8
GND2 GND16 WL_UART_RX T4306 /@
A5 G7 1
ANT_FM_RX WL_UART_RX
A6
ANT_FM_TX GND15
G6 For Debug use only
A7 G5 BT_PCM_OUT BT_PCM_OUT 12
B FM_AUDIO_R BT_PCM_OUT BT_PCM_SYNC B
A8 G4 BT_PCM_SYNC 12
L4107 N/A FM_AUDIO_L BT_PCM_SYNC SDIO_CMD_SPI_DI
A9 G3 SDIO_CMD_SPI_DI 40
CBUCK_OUT GND3 SDIO_CMD_SPI_DI SDIO_DATA2_SPI_NC
VDD_1P4 2 1 B1 G2 SDIO_DATA2_SPI_NC 40
CBUCK_OUT SDIO_DATA2_SPI_NC SDIO_CLK_SPI_CLK
B2 G1 SDIO_CLK_SPI_CLK 40
GND4 SDIO_CLK_SPI_CLK
1
2.2UH VDD_2P5_OUT B3 F9
C4139 Irat=1.7A VOUT_2P5_OUT GND14 BT_UART_TXD
B4 F8 BT_UART_TXD 12
VOUT_2P5_IN BT_UART_TXD BT_UART_CTS_N
10U6.3VX5RC3M B5 F7 BT_UART_CTS_N 12
2
N/A GND5 BT_UART_CTS_N WL_HOST_WAKE

B6 F6 WL_HOST_WAKE 12
BT_HOST_WAKE BT_I2S_CLK WL_HOST_WAKE BT_PCM_CLK
12 BT_HOST_WAKE B7 F5 BT_PCM_CLK 12
BT_HOST_WAKE BT_PCM_CLK BT_PCM_IN
B8 F4 BT_PCM_IN 12
GND6 BT_PCM_IN SDIO_DATA3_SPI_CS
SR_PA_OUT B9 F3 SDIO_DATA3_SPI_CS 40
WL_SHUTDOWN_N_RST_N
VDD_BT_PA SDIO_DATA3_SPI_CS SDIO_DATA0_SPI_DO

VDD_1P4 C1 F2 SDIO_DATA0_SPI_DO 40
VIN_LDO SDIO_DATA0_SPI_DO SDIO_DATA1_SPI_IRQ
VDD1P2_LNLDO1_OUT C2 F1 SDIO_DATA1_SPI_IRQ 40
R4133 BT_SHUTDOWN_N VDD_LN_OUT SDIO_DATA1_SPI_IRQ
1 0R1J 2 C3
VDD1P2_CLDO_OUT
N/A BT_RST_N BT_SHUTDOWN_N

12,40 BT_RST_N C4
BT_RST_N
BT_UART_RTS_N
C5
GND7
BT_UART_RXD
WL_GPIO_6 C6
WL_UART_TX
WL_GPIO_6
C7
WL_GPIO_5
WL_GPIO_2
WL_GPIO_1
VDD_CORE
BT_I2S_DO
BT_I2S_WS
BT_I2S_DI
BT_WAKE C8
RTC_CLK
12,40 BT_WAKE BT_WAKE

C9
GND10
GND11
GND12
GND13
GND8
GND9
NC1
1
VDD1P2_LDO_OUT 1 2 C4366 N/A

4.7U6.3VX5RC2M R4132 AZWAVE/AW-NH665
D1
D2
D3
D4
D5
D6
D7
D8
D9
E1
E2
E3
E4
E5
E6
E7
E8
E9
Close to D1 0R1J 0C011-00060000

N/A N/A
2
VDD1P2_LDO_OUT 1 2 C4367 N/A

0.1U6.3VX5RC1K
Close to E2
R4136 1 0R1J 2 N/A VDD1P2_LDO_OUT

15,40 WL_EN
R4137
Unmount WL_EN_RST_N
15,40 WL_SHUTDOWN_N_RST_N 1 0R1J 2 /@
BT_UART_RXD BT_UART_RXD 12
A 6,40,43 WiFi_RTC_CLK R4131 1 0R1J 2 N/A RTC_CLK_EXT_WIFI A
/@ T4107 1 WL_UART_TX BT_UART_RTS_N BT_UART_RTS_N 12

1
C4117 For Debug use only

0.1U6.3VX5RC1K
/@
2
Unmount WL_EN_RST_N
1
R4138
1201 1MR1J
N/A
Title : Wifi/BT Combo
R4138 Engineer: Richard Lin
2

100K -> 1M Size Project Name Rev
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
02G561020900 C.S BCM4751IFBG FBGA100

02038-00010100 C.S BCM47511IFBG FBGA100 U4301 BCM4751 BCM47511
600Ohm/100Mhz 02G561020900 02038-00010100
L4309 N/A 09G061041350 SAW FILTER 1575.42MHZ
1 2 U7915 09G061041350 09G061226010
REG_1V8
ST Pre-LNA 09G061226010 SAW FILTER 1580MHZ
1
C7916
1000PF/25V
2
N/A U4302 N/A
7 U7915 /GPS C7925
L4303 GND2 GPS_BCM_IN2 9.1NH
1 6 1
VCC1 VCC2 Unbalance_port1
1
5.6NH N/A 2 5 N/A 4 GPS_IN_BCM2 1 2GPS_IN_BCM0
GPS_BCM_IN1
GND1 OUTPUT Unbalance_port2
2
GPS_BCM_ANT1 1 2GPS_BCM_ANT3 3 4 C7917 2
INPUT POWER_SAVE 1000PF/25V GND1 N/A BCM47511_VDD1P2_GRF
2
2
D D
R4306 N/A UPC8236T6N-E2-A (0201) 5 3
GND3 GND2
1
0R1J
1
L4302 (0201) 1580MHZ L4306 C4310
1
$4.7NH GPS_BCM_IN3 2 1 09G061041350 L4308 600Ohm/100Mhz 2.2U6.3VX5RC2M
2
/@ C7919 1PF/25V 1.8PF/50V N/A N/A
2
(0201) N/A
2
N/A
1
Unmount GPS_LNA_EN
/GPS
H10
J10
U4301
K7
K6
BCM4751IFBG
GPS_VDDPLL
GPS_VDDIF
VDD1p2_GRF
GPS_VDDLNA
GPS_IN_BCM0 K9
GPS_RFIP
REG_1V8
0221 ME370T C4306 N/A

2.2U6.3VX5RC2M J8
GPS_VSSIF
L4111 unmount 1 2 J9
GPS_VSSPLL GPS_AUXOP
J7
K8 RF
R4316/R4317 0ohm GPS_VSSLNA1
K10 H8
GPS_VSSLNA2 GPS_AUXON
E10
GNDIFP
X4301
10G212000004010 N/A 1 6
R4316 C7918 NC1/VCO/ENABLE/DISABLE# VCC
2 5 A4
2.4P50VNPOC2J 1000PF/50V NC2 NC3 BCM47511_TCXO_OUT_26M GPS_CAL
/@ 3 4 G10 B7
GND OUTPUT TCXO CAL_REQ
1
Ant_1 2 N/A 1 Ant_2 2 1 GPS_BCM_ANT1 BCM47511_RTCCLK_R K2
26MHZ /@ LPO_IN CLK IF
F10 H9
N/A C4315 ADCP VSSADC1
F8 F9
2
VDDADC VSSADC2
2
Unmount $0.22U6.3VX5RC2K G9
ADCN
L4111 L4112 K4 REG_1V8
8.2NH $1.3NH AUX_HI
/@ /@ 6,40,41 GPS_RTCCLK 1 2 SYS IF H6
0R1J R4302 VDD_AUX_O
1
C N/A A8 H7 GPS_VDD_BAT_3V3 C4311 C
1
GPS_SYNC/PPS_OUT VDD_AUX_IN 0.22U6.3VX5RC2K

Unmount N/A
A7 A6
2
R4305 N/A IF_VALID HOST_REQ
GPS_VDD_IO_1V8 1 100KR1J 2 BCM47511_RST# A5 B6 GPS_LNA_EN

RST_N LNA_EN
12,40 GPS_POWER_ON# J4 A3
REGPU C_GPIO_6
U7909 B5
C_GPIO_7 GPS_VDD_IO_1V8
H2
N/A TM1
1
1
K1
TM2 D_GPIO_5
A2 Unmount
B3 H1
TM3 D_GPIO_6
1
C4312 R4304
EMI_SPRING_PAD BCM47511_REF_CAP $100KR1J
J6 1 2
REF_CAP N/A /@
0.01U10VX7RC1K
U7908
N/A D2 E1 GPS_TX 12
2
SDA1 RART/I2C IF SCL2/UART_TX
1 C1 D1 GPS_RX 12
1 SCL1 SDA2/UART_RX
B2 GPS_nRTS 12
N/A 10G212000004010 UART_nRTS
A1 GPS_nCTS 12
EMI_SPRING_PAD C7920 R4317 UART_nCTS
U7930
1000PF/50V 2.4P50VNPOC2J
2 1 Ant_4 2 N/A 1 Ant_3 1 N/A F2 E5
1 XA_1 MEMORY XD_0
F7 B1
XA_2 XD_1
2
H3 E6
EMI_SPRING_PAD XA_3 XD_2
U7931 H4 D4
L4115 L4116 XA_4 XD_3
J2 C4
$1.3NH $1.3NH XA_5 XD_4
1 G8 E3
/@ /@ N/A 1 G7
XA_6 XD_5
F6
XA_7 XD_6
J1 E7
EMI_SPRING_PAD XA_8 XD_7
1
G6 C2
XA_9 XD_8
G4 D10
XA_10 XD_9
G1 B4
XA_11 XD_10
F1 A9
XA_12 XD_11
G5 A10
XA_13 XD_12
Unmount C10
XA_14 XD_13
B9
C8 C9
XA_15 XD_14
D5 B10
B XA_16 XD_15 B
GPS_VDD_BAT_3V3 D8 F5
XA_17 XCS_N
D6 E4
XA_18 XWE_N
D9 E2
XA_19 XOE_N
J5 PWR
VDD_BAT
1
C4309 BCM47511_VDD_PRE H5 E8
2.2U6.3VX5RC2M VDD_PRE NC
1
N/A E9 J3
C4308 VDDIFP AVSS1
G2 K3
2.2U6.3VX5RC2M VDDC1 AVSS2
C7
2
N/A VDDC2
C3
VDDC3
BCM47511_VDD1P2_CORE K5 G3
VDD1p2_CORE VSSC1
F4
VSSC2
1
GPS_VDD_IO_1V8 C6 B8
C4307 VDDIO1 VSSC3
D7 C5
2.2U6.3VX5RC2M VDDIO2 VSSC4
F3 D3
2
N/A VDDIO3 VSSC5
1
VDD_1V8_GEN GPS_VDD_IO_1V8 EP101 C4305
L4304 0.1U6.3VX5RC1K
2
1 2 GPS_VDDIO PR 0213 N/A
1
N/A
120Ohm C4314
2.2U6.3VX5RC2M
2
N/A
+3VSUS GPS_VDD_BAT_3V3
L4305
1 2 GPS_VDD_RF
1
A N/A A
120Ohm C4313
2.2U6.3VX5RC2M
2
N/A
CW/0228
Check VDD_BAT & VDDIO & RST_N sequence.
Title : GPS
remove proximity to 3G path control 0609 Size Project Name Rev
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
C3619
RX 2 1 RXV ANT Matching
2
VMID 1 2 1NF/25V
N/A R9814
1
R4451 N/A 2KOhm
C3620 1KOhm N/A
100NF10V UNMOUNT
1
N/A
/@ C3637
2 1
NFC_SDA_R 0R1J 1 2 R4401 N/A NFC_SDA
9,25,26,31 CAM_I2C_SDA
NFC_SCL_R 0R1J 1 2 R4402 N/A NFC_SCL R4452 18PF/50V UNMOUNT R4454
D 9,25,26,31 CAM_I2C_SCL C3631 U7921 D
NFC_IRQ_R 0R1J 1 2 R4403 N/A NFC_IRQ 0Ohm L4451 N/A 0Ohm N/A
13 NFC_IRQ_R NFC_GPIO4_R NFC_GPIO4 TX1
6 NFC_GPIO4_R
0R1J 1 2 R4404 N/A 1 N/A 2TX11 1 2 TX12 2 1 TX13 1 N/A 2 feed3 1
Feed3
NFC_VEN N/A 1
6 NFC_VEN
1
560NH 18PF/50V C3641
EMI_SPRING_PAD
1
10PF/50V C3638
R4405 C3607 N/A 10PF/50V
2
1MR1J 180pF/50V /@ C3640 /@
N/A N/A 2 1
18PF/50V
2
R4453 R4455
C3632 U7920
0Ohm L4452 N/A 0Ohm N/A
TX2 1 N/A 2TX21 1 TX22 TX23 1 N/A feed4 1
2 2 1 2
1 Feed4
1
560NH 18PF/50V
N/A C3634 C3639 EMI_SPRING_PAD
C3616 10PF/50V 10PF/50V
2
NFC_PVDD 1 2 C4401 N/A 180pF/50V N/A /@
1.8V VDD_1V8_GEN 1 R4411 2 N/A NFC_PVDD 1U6.3VX5RC2K N/A
0R2J 1 2 C4402 N/A
0.1U6.3VX5RC1K UNMOUNT C3642
39PF/50V
2 1
VDD_5V0_AC_BAT NFC_VBAT 1 2 C4403 N/A /@
1U6.3VX5RC2K C3635
VPH_PWR_CHGR 1 R4412 2 N/A NFC_VBAT 1 2 C4404 N/A 39PF/50V
0R2J 0.1U6.3VX5RC1K PF1 2 1
N/A
C3636
39PF/50V
PF2 2 1 N/A
U4401 C3643
NFC_VBAT D8 A6 NFC_PVDD 39PF/50V
VBAT TEST1
F8 B6 2 1
NFC_VCO VBAT2 TEST2 /@
D1 C5
NFC_VDHF VCO_VDD TEST3
C1 D5
VDHF TEST4
A8 E5
PMUVCC TEST5
1
C C4405 C4406 N/A G7 H2 C

0.1U6.3VX5RC1K 1UF6.3VX5RC2K PMU_GND TEST6
F6 F3
N/A VSS TEST7
G1 G2
2
NFC_AVDD AVDD_in TEST8

F2 G3
NFC_DVDD AVDD_out TEST9
A5 C6
DVDD TEST10
1
NFC_PVDD A4 E3
C4407 NFC_TVDD PVDD GPIO0
G8 D3
1UF6.3VX5RC2K TVDD GPIO1
F7 C3
2
TVDD_OUT GPIO2
1
N/A E8 C2 NFC_PVDD
C4408 C4409 NFC_VEN VEN_MON GPIO3 NFC_GPIO4
B7 B1
0.1U6.3VX5RC1K 1UF6.3VX5RC2K VEN GPIO4
E4 B2
2
IF0 GPIO5
1
N/A N/A NFC_IF1 B4 B3
NFC_SDA IF1 GPIO6 R4407
C4 A1
NFC_SCL IF2 GPIO7 100KR1J
D4 A7
NFC_IF1 NFC_IRQ IF3 RFU1 NFC_GPIO6 N/A
A3 E6
IRQ RFU2
C8 H1
2
SVDD RFU3
2
E7 A2
SIGIN IFSEL0
1
R4406 D7 F4 IF_SEL1
C4410 SIGOUT IFSEL1
0R1J B8 F5
N/A 0.1U6.3VX5RC1K SIMVCC IFSEL2
C7 H8
2
SWIO TVSS2
2
N/A D6 H5
1
TX1 EXT_SW_CTRL TVSS1 R4408

H6 B5
TX2 TX1 PVSS 0R1J
H7 D2
RX TX2 DVSS /@
H4 H3
VMID RX AVSS2
G4 E2
1
PF1 VMID AVSS1 NFC_XTAL1
G5
ANT1 XTAL1
E1 UNMOUNT
PF2 G6 F1 NFC_XTAL2
ANT2 XTAL2
PN65NET1/C205020
N/A
NFC_XTAL1
IF0(ADDR0)IF1(ADDR1) ADDRESS
0 0 28H N/A X4401
0 1 29H 27.12Mhz
1 0 2AH NFC_XTAL2 3 1
1 1 2BH
1
C4411 C4412
4
B B
N/A N/A
2
A A
Title : NFC
ASUSTeK COMPUTER INC. EPAD Engineer: Jamie Tseng
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
SYSTEM Power
Page.48 +3VSUS +3VSUS
D Page.48 VDD_5V0_SYS VDD_5V0_SYS D
Page.49 VBATT VBATT
Page.49 DOCK_5V SMB347_DC_IN
Page.49 VDD_USB1_VBUS VDD_USB1_VBUS
Page.49 VPH_PWR_CHGR VDD_AC_BAT
MAX77663 SD0(6A)
Page.51 VDD_CPU VDD_1V0_GEN
MAX77663 SD1(3A)
Page.51 VDD_CORE VDD_1V2_SOC
MAX77663 SD2 (2A)

Page.51 VDD_1V8_GEN VDD_1V8_GEN
MAX77663 SD3(2A)
Page.51 +1.35V +1.35V
C C
B B
A A
Title : BB-POWER I/F

C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
BAT=3V~4.2V +3VSUS POWER SUPPLY

VDD_AC_BAT +3VSUS_Iout = 2.5A Iq=50uA , Isd=1uA +3VSUS
+3VO
PL8201 N/A P_+3VSO_VIN
80Ohm/100Mhz
120mil 1 2 P_+3VSO_LX1_S
PL8200
1
2.2UH
2 P_+3VSO_LX2_S
120mil 1
PJP8201
2
120 mil
/@
Irat=2.75A N/A R0805
0.1UF/10V
22UF/6.3V
2
1
D D
4.4x4.2x1.2mm nbs_r0805_short_h28_000s
PC8211
PC8200
PC8205
22UF/6.3V
PJ8200
PC8209
22UF/6.3V
22UF/6.3V
22UF/6.3V
1
1
PU8200
PC8208
PC8212
SHORT_PIN
2
/@ 0805=>50mil
N/A N/A N/A 8 6
2
L1_1 L2_1
9 7
2
GND GND GND L1_2 L2_2 N/A N/A N/A
P_+3VSO_VIN_S 11
VIN2
2
10 4
PR8200 VIN1 VOUT_1 GND GND
5 GND
0Ohm P_+3VSO_EN_10 VOUT_2
12
PC8204 /@ EN P_+3VSO_FB_10 P_+3VSO_FB_R_10
3 1 2
0.1UF/10V FB N/A
1
1
P_+3VSO_VINA_10 VINA PR8202
1 2
N/A 14 P_+3VSO_PG_10 1MOHM
P_+3VSO_PS/SYNC_10 PG
13 1 2 2 1
GND PS/SYNC +3VO
15 PR8204 N/A PC8201 N/A
/@ PGND 68KOhm 4.7pF/50V
2
PR8211 0Ohm GND1
16 1 2
GND2 GND
10,21 EN_VDD_PNL 1 2 1 2
PR8206 /@
nbs_r0201_h10_000s TPS63020DSJR 1MOhm PR8203 N/A
N/A nbs_r0201_h12_000s 180KOhm GND
GND
1
PS/SYNC PR8201
Vo=0.5*(1+R1/R2)=3.28V
0Ohm
Power Save Mode GND (<0.4V) N/A
2
nbs_r0201_h10_000s
PWM Mode >1.2V
GND
External Sync. Mode External Clock
C PR8208 N/A C
1 2 P_+3VSO_EN_10
50 EN_3V3_SYS
PS/SYNC , EN 0Ohm
1
1
r0201 PC8207
Hi ----> over 1.2V PR8207 1000PF/50V
Low --> under 0.4V 100KOhm /@
2
r0201
/@
2
VDD_5V0_SYS
+5VSUS POWER SUPPLY

PJP8400 /@
+5VSUS_Iin = 1A /@
Iq=25uA , Isd=1uA 1
r0805_short_h28
2
5VO
PL8401 2.2UH
BAT=3V~4.2V PL8400 /@ 1 2 RT9276_SW PU8400
80Ohm/100Mhz 9 2 RT9276_VOUT
Irat=1.7A LX VOUT
VDD_AC_BAT 1 2 6
VBAT
2
2
3
FB/NC
1
RT9376_LBI 7
LBI
PR8403 2 PC8401 PC8403 PC8405
2
PC8400 4 1MR2F 10P25VNPOC1J 10U6.3VX5RC3M 0.1U6.3VX5RC1K
1
PR8400 LBO /@ /@ /@ /@
/@ 10 8
2
N/A 100KR1J PGND PGOOD#

1
/@ EN_5V0_SBY 1 5
EN GND1 RT9276_FB
11
1
GND2
2
RT9276GQW
2
/@ PR8404
PR8401 110KOHM
1MR1J /@
B B
/@
1
1
PR8405
1MR1J
RT9276_LBO_R 1 2 VDD_1V8_GEN
/@
7,29 EN_5V0_SBY
2
PR8402
1MR1J
N/A
1
A A
Title : 5V & 3.3V External

ASUSTeK COMPUTER INC. EPAD Engineer: Timmy Wu
C
ME370T 2.0
5 4 3 2 1
5 4 3 2 1
SMB347_VDDCAP PD8900
1 453R2F PR8905
3 SMB457_BOOT 2 1 N/A
SMB347_DC_IN from Docking Conn. 2 N/A
BAT CON
453R2F PR8904
SMB347_USB_IN SMB347_DC_IN BAT54CW
2 1 N/A
VBATT
SMB347_USB_IN from Micro USB Conn. PU8900 CON7312
A5 PC8917 10UF/16V 8 6
DCIN1 SIDE2 6
A4 1 2 N/A 5
VDD_USB1_VBUS MIDDCIN PC8918 10UF/16V 5 PWR_I2C_SCL
B5 4
R9947 DCIN2 4
A2 1 2 N/A 3 PWR_I2C_SDA
MIDUSBIN 3
1 N/A 2 A1 2
USBIN1 2
2
SMB347_DC_IN PC8916 22NF/16V 7 1
D
0Ohm N/A PD8901 SIDE1 1 D
B1 B2 1 2
USBIN2 BOOT WTOB_CON_6P
MMSZ5245B-7-F
PL8902 N/A N/A N/A
A3 P_CHG_SW 1 2
240 mil
1
SW1
1
PC8919 1U10VX5RC2K
1
PC8922 N/A B3 1UH

PC8923 N/A PC8921 N/A SMB347_VDDCAP SW2
0805 10UF/16V 1 2 C1
2
1U6.3VX5RC2K N/A VDDCAP
10UF/16V
2
nbs_c0402_h22_000s
T8900 D4
c0805 VSYS1 VDD_AC_BAT

1 USB1_ID F1
/@ OTG/ID
D5
VSYS2
For layout C2
FETDRV
4
3
2
1
PQ8902
S
F5 P261AFEA
33 SMB347_STAT STAT N/A
E4
CHGOUT1
D 5
E5
6
7
8
PR8907 0R2J CHGOUT2
VBATT 1 2 PC8911 N/A
1 2 SMB_I2C_SCL F2 SMB347_VDDCAP 22U6.3VX5RC5M
6,26,27,50 PWR_I2C_SCL
5
PR8908 0R2J SCL
1 2 SMB_I2C_SDA F3 PJP8901 SHORT_PIN VBATT VBATT 1 2 PC8902 N/A
6,26,27,50 PWR_I2C_SDA SDA
E3 1 2 VBATT 4.7UF6.3VX5RC2K
VBATT /@ 1 2 PC8904 N/A
0.1U6.3VX5RC1K
1
D3 VCHG PC8920
33 SMB347_SUSP_CHGR SUSP 47PF/50V PR8901
B4 2 1 N/A 10KR1J
VCHG N/A
E2
2
33 SMB347_ACOK# PR8902 100R1J INOK/SYSOK(CHG_DET_N)
N/A 2 1 USB1_D_FP_SMB347 E1 C3 SMB347_THRM
14,28 USB1_DP D+ THERM
PR8903 100R1J 1 2 PC8906 N/A
2
14,28 USB1_DN
N/A 2 1 USB1_D_FN_SMB347 D1 22U6.3VX5RC5M
D-
PR8906
C C
0Ohm VDD_AC_BAT 2 1 PC8907 N/A
nbs_r0201_h12_000s 0.1U6.3VX5RC1K
D2 N/A
33 SMB347_USB51HC_CHGR
1
USB5/1/HC(USB9/1.5/HC)
2 1 PC8908 N/A
SMB347_EN C4 1000P25VX7RC1K
EN
2
GND2
GND1
VDD_AC_BAT
PRT8900 1 2 PC8909 N/A
10KOHM 0.1U6.3VX5RC1K
SMB347ET1699Y N/A
Charger preset to LOW enable
F4
C5
N/A 1 2 PC8910 N/A
1
P_CHG_SW 1000P25VX7RC1K
1
PC8869 N/A
470PF/50V
nbs_c0603_h37_000s
2
VDD_AC_BAT VDD_AC_BAT VDD_AC_BAT
P_CHG_SNB_S
1
1
PR8804
PR9120 PR9127 PR9129 1Ohm
100KOhm 100KOhm 100KOhm N/A
5% N/A 5% 5% N/A
2
/@
2
SMB347_USB51HC_CHGR SMB347_EN SMB347_SUSP_CHGR

1
PR9121 PR9128 PR9130

B B
100KOhm 100KOhm 100KOhm
5% 5% N/A 5%
/@ /@
2
VDD_AC_BAT
Delete PR9131 because PU resistor is placed on

page33(R294)
SMB347_STAT
A A
Title : Charger SMB347

C
ME370T 2.0
5 4 3 2 1
Main PMIC Page 1 of 3 (DC I/P, Reset, GPIO & Crystals)
VDD_1V8_GEN
PU900C
1
PC9105 N/A 1/3
0.1UF/6.3V
nbs_c0201_h13_000s
2
G6
E3
GPIO_INA VDD_AC_BAT
INI2C
1
PC9110
PR9131 1 2 0R2J PMU_I2C_SDA F2 0.1UF/6.3V N/A
6,26,27,49 PWR_I2C_SDA SDA
PR9132 1 2 0R2J PMU_I2C_SCL E2 nbs_c0201_h13_000s
6,26,27,49 PWR_I2C_SCL
2
SCL
C3
VDD_AC_BAT MBATT
GPIO_INB
G5
VDD_1V8_GEN
1
PC9106 N/A
0.1UF/6.3V
1
nbs_c0201_h13_000s PC9111 N/A
2
0.1UF/6.3V
nbs_c0201_h13_000s
VDD_AC_BAT
2
VDD_1V8_GEN
1
A2
MON PR9109 PR9110
N/A 100KR1J 100KR1J N/A
1
nbs_r0201_h12_000s nbs_r0201_h12_000s
5% 5% PR9111
2
47KR1J
G7 N/A
GPIO0
EN_AVDD_USB from MAX77663 GPIO2, check PU resister in PMU side(100k PU to VPH_PWR_CHGR)
2
PR9107 H7
N/A GPIO1
BAT_COINCELL 1 0R1J 2 PMU_VBACKUP D10 G8 EN_AVDD_USB_PMIC PR9124 1 0R1J 2 N/A EN_AVDD_USB 14
30 BAT_COINCELL BBATT GPIO2 nbs_r0201_h12_000s
nbs_r0201_h12_000s H8 EN_3V3_SYS_R PR9125 1 0R1J 2 N/A
GPIO3 EN_3V3_SYS 48
1
PC9107 N/A nbs_r0201_h12_000s
Note: 1.1K is not needed for this battery
0.1UF/6.3V
MAX77663
nbs_c0201_h13_000s G3 PMU_CLK32K_OUT_GPIO4 PR9126 1 33R1J 2 N/A CLK_32K_IN CLK_32K_IN 6
2
GPIO4
H3 nbs_r0201_h12_000s
GPIO5
G4 CPU_PWR_REQ_PMU_GPIO PR9122 1 0R1J 2 N/A
GPIO6 CPU_PWR_REQ 6
A10 PWM, VRTC domain nbs_r0201_h12_000s
XGND_1
GPIO7
H4 ????
MAX_XTAL_IN B10
XIN 0229 EMI add
X3101
2
SYS_RESET# to MAX77663 nRSTIO & T30 SYS_RESETn, R278 PU 4.7K to VDD_1V8_GEN on page.32, delete PR9112
32.768khz
1
VDD_1V8_GEN PMU_CGND MAX_XTAL_OUT C10
XOUT NRST_IO
F9 SYS_RESET# SYS_RESET# 6,20,32
1
N/A PC9109
1
0.1UF/6.3V
PR9113 N/A C9 nbs_c0201_h13_000s
2
100KR1J XGND_2 /@
nbs_r0201_h12_000s
5% D9 PMU_CLK32K_OUT PR9117 1 33R1J 2 CLK_32K_IN
2
32K_OUT /@
Active Low
PMU_ONKEY#_R_PMIC C7 nbs_r0201_h12_000s
EN0
Active - High GPIOx Alternate Mode
PR9115 1 0R1J 2 N/A CORE_PWR_REQ_PMU C5 GPIO0 Low-Power Mode Control Input
6,14 CORE_PWR_REQ EN1
nbs_r0201_h12_000s GPIO1 Flexible Power Sequencer Output
PR9116 1 0R1J 2 N/A Active - High CPU_PWR_REQ_PMU C6 GPIO2 Flexible Power Sequencer Output
6 CPU_PWR_REQ EN2
nbs_r0201_h12_000s GPIO3 Flexible Power Sequencer Output
26 AP_OVERHEAT#
Active - Low E10 E4 GPIO4 32kHz Output (32K_OUT1)
SHDN GND_1
D5 GPIO5 SD0 Dynamic Voltage Scaling Input
GND_2
CORE_PWR_REQ to MAX77663 EN1, PU resister R14 in CPU side (100k PU to VDD_1V8_GEN), delete R9114 GND_3
D6 GPIO6 SD1 Dynamic Voltage Scaling Input
D7 GPIO7 Reference Output 1.25V buffered reference output.
GND_4
CPU_PWR_REQ to MAX77663 EN2, PD resister R15 in CPU side(100k PD), delete R9118 E5
LID GND_5
E6
Active High or Low GND_6
E7
33 ACOK#_PMIC C8 F3
ACOK GND(SNSN_SD4)
F4
GND(SNSP_SD4)
6 PWR_INT# D2 F5 FB_SD0 51
NIRQ GND(FB_SD4)
MAX77612AEMJ+
N/A
PJ9102
PJ9101
PR9114
SHORT_PIN N/A 1 2
1 2 PMU_ONKEY#_R 1 0R1J 2
33 PMU_ONKEY#
/@ nbs_r0201_h12_000s SHORT_PIN
R2613
1
/@ PC9108 PMU_CGND /@
26 THERMAL#_R 1 0R1J 2 0.1UF/6.3V
nbs_c0201_h13_000s
2
nbs_r0201_h12_000s /@
0229 EMI add
Title : PMIC 1/3

Custom
ME370T 2.0
Main PMIC Page 2 of 3 (Main DC/DC Converters)
VDD_AC_BAT
PU900A
VDD_AC_BAT 2/3 VDD_1V0_GEN
B2
AVSD
PJP9305 PL9304 1UH
/@ 1 2 VDD_AC_BAT_INA_SD0 H9 J7 LXA_SD0
INA_SD0(IN_SD4) LXA_SD0_1(LX_SD0) Irat=4.2A N/A
J9 J8
R0805 INA_SD0(IN_SD0) LXA_SD0_2(LX_SD0) PL9305 1UH
nbs_r0805_short_h28_000s 1 PC9302
LXB_SD0_1(LX_SD4)
J3 LXB_SD0
10UF/6.3V J4 Irat=4.2A N/A
LXB_SD0_2(LX_SD4)
1
N/A +
2
1
H6 PCE9301
PC9307
PC9308
22UF/6.3V
22UF/6.3V
6000mA PGA_SD0_1(PG_SD0)
VDD_AC_BAT PGA_SD0_2(PG_SD0)
J6 100UF/6.3V
1
remove and bypass the shunt after routing
2
H5 PJP9301 /@
PJP9306 PGB_SD0_1(PG_SD4)
J5 SHORT_PIN
/@ 1 VDD_AC_BAT_INB_SD0 PGB_SD0_2(PG_SD4) N/A N/A
2 H2 /@
INB_SD0_1(IN_SD4)
J2
R0805 INB_SD0_2(IN_SD4) GND
2
1
nbs_r0805_short_h28_000s PC9303
10UF/6.3V F6 FB_SD0 FB_SD0 50
N/A FB_SD0
2
F7 VDD_CPU_SENSE 5
SNSP_SD0
F8
SNSN_SD0 GND_CPU_SENSE 5
VDD_AC_BAT VDD_1V2_SOC
PJP9307 PL9306 1UH PJP9312
/@ 1 2 VDD_AC_BAT_IN_SD1 H10 G9 LX_SD1 VDD_PMU_1V2_DCDC1_RS 1 2 /@
IN_SD1_1 LX_SD1_1 Irat=4.2A N/A
J10 G10
R0603 IN_SD1_2 LX_SD1_2 R0805 nbs_r0805_short_h28_000s
1
PC9304
3000mA
10UF/6.3V
N/A
2
1
PC9309
22UF/6.3V
F10 PJP9302
PG_SD1
SHORT_PIN
2
/@
N/A
2
For layout
D8
FB_SD1
E9 VDD_CORE_SENSE 5
SNSP_SD1
E8 GND_CORE_SENSE 5
SNSN_SD1
VDD_AC_BAT
MAX77663
VDD_1V8_GEN
PJP9308 PL9303 PJP9309
/@ 1 2 VDD_AC_BAT_IN_SD2 H1 G1 LX_SD2 1 2 VDD_1V8_PMU_DCDC2 1 2 /@
IN_SD2_1 2000mA LX_SD2_1
J1 G2
R0603 IN_SD2_2 LX_SD2_2 1UH N/A R0805
1
1
PC9305 PC9310 PC9312 nbs_r0805_short_h28_000s
1
PC9317 N/A 10UF/6.3V 2520/2.3A 10UF/6.3V 10UF/6.3V remove and bypass the shunt after routing
E1
1U6.3VX5RC2K N/A PG_SD2_1 nbs_c0603_h37_000s nbs_c0603_h37_000s PJP9303
F1
2
2
nbs_c0402_h22_000s PG_SD2_2 N/A N/A SHORT_PIN
/@
2
D3 FB_SD2
FB_SD2
VDD_AC_BAT +1.35V
PJP9311 PL9302
/@ 1 2 VDD_AC_BAT_IN_SD3 B1 2000mA C1 LX_SD3 1 2
IN_SD3_1 LX_SD3_1
A1 C2
R0603 IN_SD3_2 LX_SD3_2 1UH N/A
1
1
PC9306
PC9311
22UF/6.3V
VDD_AC_BAT PC9318 N/A
1U6.3VX5RC2K
10UF/6.3V
N/A D1
2520/2.3A PJP9304
SHORT_PIN
2
2
PG_SD3
1
nbs_c0402_h22_000s /@
PR9151
0R1J N/A
2
N/A nbs_r0201_h12_000s nbs_c0805_h55_000s
2
MAX_D_SD3 D4 C4 FB_SD3
D_SD3 FB_SD3
1
PR9152
0R1J MAX77612AEMJ+
nbs_r0201_h12_000s N/A
2
/@
Unmount
D_SD3 Logic Level SD3 Default Voltage
MBATT (logic high) 1.35V
Unconnected 1.5V
GND (logic low) 1.2V
Title : PMIC 2/3

C
ME370T 2.0
Main PMIC Page 3 of 3 (LDO's)
PU900B
3/3
PR9210 N/A
B7 PMU_LDO_OUT_0 1 2 VDD_PMU_LDO0_1V0
OUT_LDO0 0R2J
1
150mA
nbs_r0402_h16_000s to T30 VDD_DDR_HS
PC9204 N/A
PR9205 N/A 1U6.3VX5RC2K
2
1 2 PMU_LDO_0_1_IN_1V35 B8 nbs_c0402_h22_000s
+1.35V 0R2J IN_LDO0_1
nbs_r0402_h16_000s
1
PC9213 N/A
1U6.3VX5RC2K B9 PMU_LDO_OUT_1 VDD_PMU_LDO1
2
nbs_c0402_h22_000s OUT_LDO1
1
150mA
no use
PC9205 N/A
1U6.3VX5RC2K
2
nbs_c0402_h22_000s
PR9206 N/A PR9212 N/A

1 2 PMU_LDO_2_IN_3V3 A6 B6 PMU_LDO_OUT_2 1 2
+3VSUS 0R2J IN_LDO2 OUT_LDO2 0R2J
VDD_PMU_LDO2_2V8
1
150mA
nbs_r0402_h16_000s nbs_r0402_h16_000s to T30 VDD_DDR_RX
1
PC9206 N/A
PC9214 N/A 1U6.3VX5RC2K
2
1U6.3VX5RC2K nbs_c0402_h22_000s
2
nbs_c0402_h22_000s
PR9213 N/A
A3 PMU_LDO_OUT_3 1 2 VDD_PMU_LDO3_2V8
OUT_LDO3 0R2J
2
300mA
PC9207 N/A nbs_r0402_h16_000s to eMMC Vcore(VCORE_EMMC_S)
2.2U6.3VX5RC2M
PR9207 N/A nbs_c0402_h22_000s
1
1 2 PMU_LDO_3_5_IN_3V3 A4
+3VSUS 0R2J IN_LDO3_5
nbs_r0402_h16_000s
1
PC9215 N/A
1U6.3VX5RC2K A5 PMU_LDO_OUT_5 VDD_PMU_LDO5
2
nbs_c0402_h22_000s OUT_LDO5
1
150mA
to Camera 1.8V
PC9208 N/A
1U6.3VX5RC2K
MAX77663
2
nbs_c0402_h22_000s
PR9215 N/A
B3 PMU_LDO_OUT_4 1 2 VDD_PMU_LDO4_1V2
OUT_LDO4 0R2J
1
150mA
nbs_r0402_h16_000s to T30 AVDD_DSI_CSI
PC9209 N/A
PR9208 N/A 1U6.3VX5RC2K
2
1 2 PMU_LDO_4_6_IN_VPH B4 nbs_c0402_h22_000s
VDD_AC_BAT 0R2J IN_LDO4_6
nbs_r0402_h16_000s
1
PC9216 N/A PR9216 /@

1U6.3VX5RC2K B5 PMU_LDO_OUT_6 1 2 VDD_PMU_LDO6_3V_1V8
2
nbs_c0402_h22_000s OUT_LDO6 0R2J
1
150mA
nbs_r0402_h16_000s to T30 VDDIO_SDMMC1 No use
PC9210 N/A
1U6.3VX5RC2K
2
nbs_c0402_h22_000s
PR9217 N/A
OUT_LDO7 0R2J
1
450mA
PR9209 N/A PC9211 N/A nbs_r0402_h16_000s to T30 AVDD_DSI_CSI
1 2 PMU_LDO_7_8_IN_1V35 A8 4.7U6.3VX5RC2M
+1.35V 0R2J IN_LDO7_8 nbs_c0402_h22_000s
2
nbs_r0402_h16_000s
1
PC9217 N/A
1U6.3VX5RC2K
2
nbs_c0402_h22_000s PR9218 N/A

300mA
OUT_LDO8 0R2J
2
PC9212 N/A nbs_r0402_h16_000s to T30 AVDD_PLLx

2.2U6.3VX5RC2M
MAX77612AEMJ+ nbs_c0402_h22_000s
1
N/A
Title : PMIC 3/3

C
ME370T 2.0

Esquema Elétrico Asus Nexus 7 ME370T

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5 4 3 2 1

Title : 01.Block Diagram

DRAM Chip 256Mb x8bits x4pcs

Title : 02.POWER TREE

EN_5V0_SBY(PMU GPIO0) 1.8V

<7>VDD_1V8_GEN P-MOS <5A>VDD_5V0_SBY

VCC2 SW2 <9>+1.2V

VCCIO SWIO <7>VDD_1V8_GEN VDD_1V8_GEN

LDO3 <OFF> VDDIO_SDMMC1

0720 NCT3521U N/A B17 1 2 C26 N/A

E14 M13 VDD_CORE

GND_118 N/A N/A

1.2V Remove AVDD_PLLX MAX77663 SD2 1.8V (VDD_1V8_PMU_DCDC2) to VDD_1V8_GEN

1.2V Remove AVDD_PLLM

Signal to & from MAX77663

C31 C34 for AVDD_PLLX & 1.2V N/A

1.2V 12P50VNPOC2J TXC/7V12000011

Title : 01.Block Diagram

1 2 C39 N/A U2D

AD11 DOWN 100K PD Disable Reset E6 NAND_ALE R43 N/A

AD15 None Z Disable Reset GMI_IORDY

A16 None Z Config. Hold F2 NAND_RE#

A19 None Z Config. Hold VDD_3V3_GMI VDD_3V3_GMI

WAIT UP 100K PU Disable Reset

Title : T30 GMI IF

VDDIO_DDR 1 2 C41 N/A 3.3V DDR_DM[3..0] 19

F15 DDR_BA0_N DDR_BA0_N 19 DDR_RESET_N 1 10KR1J 2 R48 /@

Title : T30 DDR

7/22 DSI & CSI PCLK DOWN 15K PD Disable Hold

PUPD PinState PUPD After Wake

0626 2.2KR1J 2.2KR1J

VDDIO_CAM_T30S AD9 1.8V AG5 CAM_I2C_SCL CAM_I2C_SCL 25,26,31,44

AF6 CAM_RST_5M CAM_RST_5M 31 CW/0228

1.8V VDD_1V8_GEN_CPU VDDIO_LCD 1.8V

AE15 LVDS_SHTDN# LVDS1_SHTDN*

Title : T30 LCD

All VDAC pins & powers leave NC

0818 NC son't support CEC

Title : T30 HDMI,VGA

U2S Note: 'EN_VDD_SDMMC1' reserved for power gating

不不不不不, 需需TX/RX GND

C71 W29 BT_UART3_CTS# PU2 None Z Disable Hold

GPIO_PU0 BT_WAKEUP BT_WAKEUP

Title : T30 BB,UART

1.8V VDD_1V8_GEN_CPU VDD_IO_AUDIO

C28 DAP2_SCLK_H R78 1 33R1J 2 N/A DAP2_SCLK 27

0229 EMI add

POR Deep Sleep

SPI2_CS1_N UP 100K PU Config. Hold

Title : T30 AUDIO

0229 EMI add

SI2305DS 2nd Source USB2_DN

T30 AVDD_USB_PLL 1.8V

VDD_1V8_GEN AVDD_USB_PLL AVDD_USB_PLL

SI2305DS C63 R62

N/A 100P25VNPOC1J 330R1J

EN_AVDD_USB_PLL__SWITCH_2 0.1U6.3VX5RC1K R5 SNN_USB3_VUS

R63 N/A Q3B

SDMMC4_CLK_T30 1 N/A 2 R32 SDMMC4_CLK

1.8V VDD_1V8_GEN_CPU VDDIO_SDMMC3

N/A 1 33.2R1F 2 N/A

Title : T30 SDMMC,eMMC

VDDIO_PEX_CTL AF24 AG24

AVDD_SATA SATA_L0_TXN 10G212000004010 PEX_L1_CLKREQ_N