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Cadence Simulation for PCB Design

A unified environment for PCB design, simulation, and analysis

On larger designs especially, PCB design teams need fast and reliable simulation to achieve
convergence. Cadence® simulation technology for PCB design offers a ­single, unified design
environment for both simulation and PCB design. With integrated analog and event-driven digital
simulation, teams benefit from improved speed without ­sacrificing accuracy. Using advanced
analysis capabilities, designers can automatically maximize the performance of circuits.

Cadence Simulation Simulink package in a powerful • Identifies and simulates functional


Technology for PCB design co-simulation environment (SLPS).­ blocks of complex circuitry
(See Figure 1.) using mathematical expressions,
Cadence simulation technology for PCB functions, and behavioral devices
design provides a full-featured analog
Benefits
simulator with support for digital • Determines which components are
­elements to help solve virtually any • Improves simulation times, reliability, overstressed using Smoke analysis
design challenge—from high-frequency and convergence on larger designs and by observing component yields
systems to low-power IC designs. The using Monte Carlo analysis
• Improves speed without loss of
powerful simulation engine integrates
­accuracy via integrated analog and
easily with Cadence PCB schematic Features
event-driven digital simulations
entry solutions, improving time to
Cadence simulation technology for
market and keeping operating costs • Explores circuit behavior using
PCB design integrates seamlessly with
in check. An interactive, easy-to- basic DC, AC, noise, and transient
the Cadence front-to-back PCB design
use graphical user interface ­provides analyses
flow, making it possible to have a
complete control over the design
• Allows system-level interfaces to be single, ­unified design environment for
process. Availability of resources such
tested with actual electrical designs both ­simulation and PCB design.
as models from many vendors, built-in
using SLPS
mathematical functions, and behav- Design entry and editing
ioral modeling techniques make for • Offers library selection of more than
Select from a library of more than
an efficient design process. Advanced 20,000 analog and mixed-signal
18,000 symbols and models for
analysis ­features (Sensitivity, Monte models
simulation to design with Cadence
Carlo, Smoke, and an optimizer with
• Allows for automatic identifi- PCB schematic design entry
multiple engines) are built on top of
cation of analog and digital signals technology. It provides many features
the simulator to improve design perfor-
and applies A-to-D and D-to-A that allow you to easily capture and
mance, cost-effetiveness, and reliability.
interfaces simulate analog designs. Both integra-
The products are tightly integrated tions include one-button simulation
• Explores design relationships
with Cadence Allegro ® Design Entry and cross-probing, and many other
with “what if” scenarios before
HDL and Cadence OrCAD® Capture. simulation utilities.
committing to hardware
The simulation technology can also
interface with MathWorks’ MATLAB • Maximizes circuit performance
automatically using Optimizer
Cadence Simulation for PCB Design

Stimulus creation
Device
Access built-in functions that can BSIM1, BSIM3,
AMS Simulator equations
Custom
Model Library semiconductor
be described parametrically or draw EKV models
models
Analog or
piecewise linear (PWL) signals freehand mixed-signal
Datasheet simulator with
with the mouse to create any shape specifications probe graphical Measurements
AMS Simulator
advanced analysis
post-processor
stimulus. Create digital stimuli for signals, - Smoke analysis
Parameters - Sensitivity analysis
clocks, and buses; click-and-drag to Vendor models
AMS Simulator
Model Editor
- Optimizer
- Monte Carlo analysis
introduce and move transitions.
Symbols Netlist, stimuli,
Circuit simulation Allegro Design Entry HDL from models,
bias info
simulation settings,
cross-probing

Users can easily set up and run simula- PCB layout


Part Manager
tions, and then cross-probe simulation Gerber/NC Drill,
Verified
results from Probe, an industry-standard Interface
DE-HDL netlists
GenCAM/GenCAD,
pick & place reports
to part data
waveform viewer. Support for multiple
Part Browser Variant Editor Purchasing/ Fabrication,
simulation profiles enables users to recall Part table file
Verified inventory Parts assembly & test
BOMs
and run different simulations on the same Place part

schematic. Simulation bias results can be Variant reports for board assembly and BOMs

Released BOMs
viewed directly on the schematic including MRP/ERP/PDM
system
node voltages, device power calculations,
and pin and subcircuit current. Support
for Checkpoint Restart allows designers to Figure 1: Cadence simulation technology for PCB design
reduce simulation times when the same
circuit is simulated multiple times with
The tools also enable users to measure • Digital primitives, including bi-directional
minor changes.
performance characteristics of a circuit transfer gates with analog I/O models
Mixed analog/digital simulation using built-in measurement functions
• Two battery models, which allow
and creation of custom measurements.
Integrated analog and event-driven digital ­accurate simulation of the discharge
For data display, additional capabilities
simulations improve speed without loss cycle and operating conditions
allow plotting of both real and complex
of accuracy. A single graphical waveform
functions of circuit voltage, current, and A device equations developer’s kit
analyzer displays mixed analog and digital
power consumption, including Bodé plots (DEDK) allows implementation of new
simulation results on the same time axis.
for gain and phase margin and derivatives internal model equations that can be
Digital functions support 5 logic levels
for small-signal characteristics. used with Allegro AMS Simulator and
and 64 strengths, load-dependent delays,
(See Figure 2.) PSpice simulation.
and hazard/race checking. Allegro AMS
Simulator and PSpice ® simulation also Models
feature propagation modeling for digital
Included are a large variety of accurate
gates and constraint checking (such as
internal models—which typically include
setup and hold timing).
temperature effects—that add flexibility
Analog analysis to simulations. Models are available with
R, L, C, and bipolar transistors plus:
Explore circuit behavior using DC, AC,
noise, transient, parameter sweeps, • Built-in IGBTs
Monte Carlo, and DC sensitivity analyses.
• Seven MOSFET models, including
Allegro AMS Simulator and PSpice
­industry-standard BSIM3v3.2 and
­technology include interactive simulation
the new EKV 2.6 model
controllers and two simulation solvers.
• Five GaAsFET models, including
Graphical results and data display
Parker-Skellern and TriQuint TOM-2,
Probe Windows allows users to choose TOM-3 models
from an expanded set of mathematical
• Nonlinear magnetic models complete
functions to apply to simulation output
with saturation and hysteresis Figure 2: Cadence simulation technology for
variables. Designers can create plot
PCB design provides a complete simulation
­window t­ emplates and use them to easily • Transmission line models that
environment including simulation waveform
make complex measurements by simply incorporate delay, reflection, loss, analysis with cross-probing and bias results
placing markers directly on the desired dispersion, and crosstalk displayed on the schematic
pins, nets, and parts in the schematic.

www.cadence.com 2
Cadence Simulation for PCB Design

Model library SLPS Advanced analysis capabilities


Users can select from more than 18,000 Cadence simulation technology and the Using advanced analysis capabilities,
analog and mixed-signal models of MathWorks’ MATLAB Simulink package designers can automatically maximize
devices made in North America, Japan, integrate two industry-leading simulation the performance of circuits. Four important
and Europe. Also included are more than tools into a powerful co-simulation capabilities—sensitivity analysis, optimi-
4,500 parameterized models for BJTs, ­environment (SLPS). Simulink is a platform zation, Smoke (stress analysis), and Monte
JFETs, MOSFETs, IGBTs, SCRs, magnetic for multi-domain simulation and model- Carlo (yield analysis)—enable engineers
cores and toroids, power diodes and based design of dynamic systems. The to create virtual prototypes of designs and
bridges, operational amplifiers, optocou- SLPS integration allows designers to maximize circuit performance automatically.
plers, regulators, PWM controllers, ­perform system-level simulations that Measurements across ­multiple simulation
­multipliers, timers, and sample-and-holds. include realistic electrical models of actual profiles can be ­processed together.
components. Design and integration
Model editing Sensitivity
problems can be discovered much
It’s easy to extract a model of a supported earlier in the design process, reducing The sensitivity option identifies which
device type—simply enter the required the n
­ umber of prototypes needed to component parameters are critical to
data from the device’s datasheet. execute the design. SLPS integration the goals of a circuit’s performance
also lets designers of electro-mechanical by examining how each component
Behavioral modeling systems—such as control blocks, affects circuit behavior by itself and in
Functional blocks are described using sensors, and power converters—perform comparison to the other components.
mathematical expressions and functions, integrated system and circuit simulation. It allows designers to identify sensitive
which allows designers to leverage a full (See Figure 3.) components and export them to the
set of mathematical operators, nonlinear optimizer to fine-tune circuit behavior.
Checkpoint restart
functions, and filters. Circuit behavior
Optimizer
can be defined in the time or frequency This feature allows designer to store
domain, by formula (including Laplace ­simulation states at various time-points The optimizer analyzes analog circuits
transforms), or by look-up tables. Error and then restart simulations from any of and systems, fine-tuning designs faster
and warning messages can be specified the simulation states, which saves time. than trial-and-error bench testing. It
in different conditions. Users can easily Designer can modify simulation settings helps find the best component values to
select parameters, which have been and design parameters before starting a meet performance goals and constraints.
passed to subcircuits in a hierarchy, and simulation from a pre-recorded time-state. Designers can use the optimizer to
insert them into transfer functions. New improve design performance, update
Auto-convergence option
behavioral capabilities include mathe- designs to meet new specifications,
matical functions like in(x), exp(x), and This option makes the simulator optimize behavioral models for top-down
sqrt(x). automatically change tolerances limits design and model generation, and tune a
of c­ onvergence to make the design circuit to match known results in the form
Magnetic parts editing
­converge. Designers can use this option of measurements or curves. The optimizer
The Magnetic Parts Editor helps designers to achieve convergence and then includes four engines: least squares
overcome issues involved in manually fine-tune simulations by further modifying quadratic (LSQ), modified LSQ, random,
designing transformers. Users can design simulator options. This option is recom- and discrete.
magnetic transformers and DC inductors, mended for power electronic designs.
and generate simulation models for trans-
formers and inductors that can then be
used in Allegro AMS Simulator circuits.
The Magnetic Parts Editor also allows
designers to generate data required P(u) SLPS -K- -K- 1 Scope1
0(P) = 2 s
for manufacturing the transformers or Polynomial Relay heater blower Gain1 Integrator
­inductors. The manufacturer’s report
-K-
that is generated by MagDesigner after
1/Req
the completion of the design process 50

contains the complete data required by average 5/9


outdoor temperature
a vendor to develop the transformer for Add1 Gain2

commercial use. daily temperature


32
variation constant
Encryption
The encryption feature allows models to Figure 3: SLPS integration allows designers to interface the Allegro AMS Simulator / PSpice
be encrypted using 56-bit DES algorithm. circuit with Simulink and then observe the waveforms after Simulink-Allegro AMS Simulator /
PSpice co-simulation

www.cadence.com 3
Cadence Simulation for PCB Design

Smoke Cadence Services and Support


The Smoke option warns of stressed • Cadence application engineers can
­components due to power dissipation, answer your technical questions by
increases in junction temperature, telephone, email, or Internet—they can
secondary breakdowns, or violations of also provide technical assistance and
voltage/current limits. Over time, these custom training
components can cause circuit failure.
• Cadence certified instructors teach
Designers can use Smoke to compare
more than 70 courses and bring
circuit simulation results to a compo-
their real-world experience into the
nent’s safe operating limits. If limits are
classroom
exceeded, Smoke ­identifies the problem
Figure 4: Smoke compares simulated values
parameters. It can also be used for with manufacturers’ limits to highlight devices • More than 25 Internet Learning
creating, modifying, and configuring operating outside safe operating rages. Series (iLS) online courses allow you
derate files for use with Smoke analysis. the flexibility of training at your own
(See Figure 4.) eters to be swept, displaying sweep computer via the Internet
results in spreadsheet format, allotting
Monte Carlo • Cadence Online Support gives you 24x7
measurement results in probe UI, and
online access to a knowledgebase of
Monte Carlo predicts the behavior of evaluating post-analysis measurement.
the latest solutions, technical documen-
a circuit statistically when part values
tation, software downloads, and more
are varied within their tolerance range. System Requirements
Monte Carlo also calculates yield,
• Pentium 4 (32-bit) equivalent or faster
which can be used for mass manufac-
turing predictions. Use Monte Carlo for • Windows XP Professional,
­calculating yield based on your specifica- Vista Enterprise
tions calculating statistical data, displaying
• Minimum 512MB (1G or more
results in a probability density histogram,
­recommended for XP and
and displaying results in a cumulative
Vista Enterprise requirements)
distribution graph.
• 300MB swap space (or more)
Parametric plotter
• DVD-ROM drive
Once a circuit is created and simulated,
the parametric plotter is used for • 65,000 color Windows display
­s weeping multiple parameters. Any with minimum 1024 x 768 (1280 x
­number of design and model param- 1024 recommended)
eters (in any combination) can be swept
and results viewed in tabular or plot
form. Designers can use the parametric
plotter for allowing device/model param-

Cadence is transforming the global electronics industry through a vision called EDA360.
With an application-driven approach to design, our software, hardware, IP, and services help
customers realize silicon, SoCs, and complete systems efficiently and profitably. www.cadence.com

©2012 Cadence Design Systems, Inc. All rights reserved. Cadence, the Cadence logo, Allegro, OrCAD, and PSpice are registered trademarks of
Cadence Design Systems, Inc. 20825 1/12 MK/DM/PDF

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