Study Material

Study material
Embedded Systems/Advance
Embedded uControllers/ RTOS
Contents
Section I
Basic Electronics and Circuits Pg.
 Power supplies 4
 Positive Regulated ICs 78XX 9
 Negative Regulated ICs 79XX 10
 Positive Variable Regulator LM317 11
 Negative Variable Regulator LM337 12
 Precision Temperature sensor LM35 13
 Operational Amplifiers 14
 IC555 Timers 17
 Relays 20
 Opto-Isolators 21
 ULN Drivers 22
 Combinational circuits- adders, subtractors, mux-demux etc. 23
 Sequential circuits, flip-flops, registers, counters 35
Section II
8 bit microcontrollers (8051)
 S/W Tool: Keil-uV3 49
 Introduction to 8051 58
 Architecture 59
 Register-sets 60
 Assembly language programming 68
 Addressing modes 81
 Programming 8051 in C 88
 I/O port programming 91
 Timers and counters 94
 Interrupts 108
 Serial communication 120
Section III
Peripheral interfacing with 8051
 LEDs 127
 7 segment display 128
 ADC(Analog to Digital converter) 131
 DAC (Digital to Analog converter) 133
 LCD 135
 Stepper motor 140
Prepared by: Vivek Joshi(08MTES17) 2
 Hex keypad 142
 PC Interfacing using RS232 146
 Top view simulator, Top view programmer 147
Section V
Introduction to advance microprocessors and controllers
 ARM 156
 SHARC 162
 PIC 165
 AVR 168
 MOTOROLA-68HC11 180
Section VI
Introduction to Real Time Operating Systems
 Introduction to RTOS 183
 uCOS-II 185
 VxWorks 186
 Symbian 186
 WinCE6.0. 188
References:
Embedded Systems by Dr. Rajkamal
Embedded Systems by Mazidi & Mazidi
Various internet sites.

Section I
I.1 Power Supplies
Overview
This section covers the design of basic unregulated DC power supplies.
Load Requirements
Before designing any power supply the load requirements must be known. It is
always a good idea to take the worstcase scenario when making this decision. For
example if your circuit is designed to draw 1 amp at 12 volts, assume that
component tolerances are 20% and design to meet these requirements with at least
20-50% reserve current, in this example I would design a power supply which could
safely deliver 12 volts at 1.5 amps without overheating.
Transformer Regulation and Efficiency
A transformer is very efficient at converting AC voltages and currents from one

value to another. In practice efficiencies of 98% may be achieved, the losses being
due to heating effects of the transformer core, winding loss and leakage flux.
Transformers have VA ratings which is simply the secondary voltage multiplied by
secondary current. Not often published are the regulation figures for a typical
transformer. A transformer rated at 20 V , 1 A secondary will only measure 20 volts
when it is actually delivering 1 A. The figures below show typical regulation figures
for some common VA rated transformers:-
VA Rating 6 12 20 50 100
% Regulation 25 12 10 10 10
For example a 12 VA rated transformer would have a no load voltage which is 12%
higher than the rated value. If the transformer was rated at 12 V, 1 A, then
measuring the secondary RMS voltage with a high impedance meter, you would
measure approximately 13.44 Volts.
Rectification
This is the process where alternating current is converted to direct current. There are
three main types of rectifier circuit, half wave, full wave and bridge.
Half-Wave:
The half wave rectifier circuit is shown in Fig. 1 below:
Fig. 1
The DC output is approximately:

1.41 x VAC - 0.7
where VAC is the RMS transformers secondary voltage and 0.7 the voltage drop
across the rectifier. A typical waveform is shown in Fig. 2 :
Fig. 2
Full-Wave:

The full wave rectifier circuit is shown in Fig. 3. This circuit uses a centre tapped
transformer, alternate diodes conducting for each half cycle.
Fig. 3

1.41 x VAC - 0.7
across the rectifier. There are twice the amount of "peaks" compared to the half
wave rectifier because alternate diodes conduct for each half cycle of the AC input.
A typical waveform is shown below (Fig. 4.):
Fig. 4
Bridge Rectifier:
The bridge rectifier is the most popular of rectifier circuits. It uses four diodes
arranged in a ring, but complete four terminal bridge rectifiers are also available.
The circuit is shown at Fig. 5 below:
Fig. 5

1.41 x VAC - (2 x 0.7)
across the rectifier.As there are two diodes conducting for each half cycle, then there
will be two rectifier voltage drops. This is around 0.7 volts but can rise to 1.1 volts
per diode for high current rectifier types. A typical waveform is shown in Fig. 6:
Fig. 6
Smoothing Capacitor(Filter):
The "raw" DC produced after rectification is OK to charge a battery or light a lamp
but any electronic circuit needs a smooth DC supply. In the case of audio circuits,
particularly amplifiers, any unfiltered DC will be heard as a "hum" in the
equipments loudspeakers. The hum is proportional to the AC power supplies

frequency. Smoothing is accomplished by placing a large value capacitor in parallel
with the load,as seen in Fig. 7 below.
Fig. 7
Fig. 8

I.2 Regulator ICs
I.2.1 Positive Voltage Regulator 78XX
Features
• Output Current up to 1A
• Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24
• Thermal Overload Protection
• Short Circuit Protection
• Output Transistor Safe Operating Area Protection
78xx Pin-out
The 78xx, 78Mxx, and 78Sxx regulators all have the pin-out shown in the left of
figure 1 and are normally supplied in a case style known as TO-220. The 78Lxx
series, shown in the right of figure 1, also has the same pin-out but has a case style
known as TO-92. They are all connected to the rest of the power supply in the
same way, as shown in figure 2.
Specifications
Output Current 100 mA

Output Voltage 5 Volt
Input Min Voltage 6.7, 7 Volt
Input Max Voltage 35 Volt

I.2.2 Negative Voltage Regulators
79XX Pin-out
Features
• Output Current in Excess of 1A

• Output Voltages of -5, -6, -8,-9,-10, -12,-15,-18 and -24V
• Internal Thermal Overload Protection
• Short Circuit Protection
• Output Transistor Safe Operating Area Compensation
Description
The MC79XX / MC79XXA/ LM79XX series of three
terminal negative regulators are available in TO-220
package and with several fixed output voltages, making
them useful in a wide range of applications. Each type
employs internal current limiting, thermal shut down and
safe operating area protection, making it essentially
indestructible.

I.2.3 Variable Voltage Regulators
A.
LM317
This is the standard part number for an integrated three-terminal adjustable linear
voltage regulator. LM317 is a positive voltage regulator supporting input voltage
of 3V to 40V and output voltage between 1.25V and 37V. A typical current rating
is 1.5A although several lower and higher current models are available. Variable
output voltage is achieved by using a potentiometer or a variable voltage from
another source to apply a control voltage to the control terminal.
LM317 also has a built-in current limiter to prevent the output
current from exceeding the rated current, and LM317 will
automatically reduce its output current if an overheat condition
occurs under load. LM317 is manufactured by many companies,
including National Semiconductor, Fairchild Semiconductor, and
STMicroelectronics.
LM317 is available in a wide range of package forms for different

applications including heatsink mounting and surface-mount
applications. Common form factors for high-current applications
include TO-220 and TO-3. LM317 is capable of dissipating a large
amount of heat at medium to high current loads and the use of a
heatsink is recommended to maximize the lifespan and power-
handling capability.
Specifications
Vout range 1.25V - 37V
Vin - Vout difference 3V - 40V
Operation ambient temperature 0 - 125°C
Output Imax <1.5A
Minimum Load Currentmax 10mA

B.
LM337
Negative Variable Voltage Regulator
Features
 Output voltage adjustable from -1.2V to -37V
 1.5A output current guaranteed, -55°C to +150°C
 Line regulation typically 0.01%/V
 Load regulation typically 0.3%
 Excellent thermal regulation, 0.002%/W
 77 dB ripple rejection
 Excellent rejection of thermal transients
 50 ppm/°C temperature coefficient
 Temperature-independent current limit
 Internal thermal overload protection
 P+ Product Enhancement tested
 Standard 3-lead transistor package
 Output is short circuit protected

Specifications
Output Current 1500 mA
Output Min -37 Volt
Input Min Voltage -50 Volt
Input Max Voltage -4.2 Volt
Adjustable Output Yes

I.3
Precision Centigrade Temperature Sensor
LM35
The LM35 series are precision integrated-circuit temperature sensors, whose output
voltage is linearly proportional to the Celsius (Centigrade) temperature.
Features
 Linear + 10.0 mV/°C scale factor
 Rated for full -55° to +150°C range
 Suitable for remote applications
 Low cost due to wafer-level trimming
 Operates from 4 to 30 volts
 Less than 60 µA current drain
 Low self-heating, 0.08°C in still air
 Low impedance output, 0.1 Ohm for 1 mA load
Specifications
Supply Min 4 Volt
Quiescent Current_ 56 uA
Temperature Min -40, 0, -55 deg C
Temperature Max 100, 110, 150 deg C
Sensor Gain 10 mV/Deg C
Pin-out diagram

I.4
Operational Amplifiers (Op-amps)
An operational amplifier, which is often called an op-amp, is a DC-coupled high-
gain electronic voltage amplifier with differential inputs and, usually, a single
output. Typically the output of the op-amp is controlled either by negative feedback,
which largely determines the magnitude of its output voltage gain, or by positive
feedback, which facilitates regenerative gain and oscillation. High input impedance
at the input terminals (ideally infinite) and low output impedance (ideally zero) are
important typical characteristics.
Non-inverting amplifier
An op-amp connected in the non-inverting amplifier configuration
The general op-amp has two inputs and one output. The output voltage is a
multiple of the difference between the two inputs (some are made with floating,
differential outputs):
G is the open-loop gain of the op-amp. The inputs are assumed to have very high
impedance; negligible current will flow into or out of the inputs. Op-amp outputs
have very low source impedance.

If the output is connected to the inverting input, after being scaled by a voltage
divider:
then:
, where G > 0
Solving for Vout / Vin, we see that the result is a linear amplifier with gain:
If G is very large, comes close to .
Inverting amplifier
Because it does not require a differential input, this negative feedback connection
was the most typical use of an op-amp in the days of analog computers. It remains
very popular, but many different configurations are possible, making it one of the
most versatile of all electronic building blocks.
An op-amp connected in the inverting amplifier configuration

By applying KCL at the inverting input,
However, because the input current into any operational amplifier is assumed to be
zero,
and so
By applying KVL at the output,
However, because the operational amplifier is in a negative-feedback

configuration, the inverting input v − can be assumed to match the non-inverting
input v + . In particular,
and so v − is a virtual ground. Therefore,
Comparator
In electronics, a comparator is a device which compares two voltages or currents

and switches its output to indicate which is larger.
A dedicated voltage comparator will generally be faster than a general-purpose op-

amp pressed into service as a comparator. A dedicated voltage comparator may also
contain additional features such as an accurate, internal voltage reference, an
adjustable hysteresis and a clock gated input.
When else 0
I.5
555 Timers
The 555 Timer IC is an integrated circuit
(chip) implementing a variety of timer and
multivibrator applications. The IC was designed
and invented by Hans R. Camenzind. It was designed in 1970 and introduced in
1971 by Signetics (later acquired by Philips). The original name was the
SE555/NE555 and was called "The IC Time Machine". The 555 gets its name from
the three 5-kohm resistors used in typical early implementations. It is still in wide
use, thanks to its ease of use, low price and good stability.
As of 2003, 1 billion units are manufactured every year.
The 555 has three operating modes:
• Monostable mode: in this mode, the 555 functions as a "one-shot".

Applications include timers, missing pulse detection, bouncefree switches,
touch switches, Frequency Divider,Capacitance Measurement, Pulse Width
Modulation (PWM) etc
• Astable - Free Running mode: the 555 can operate as an oscillator. Uses
include LED and lamp flashers, pulse generation, logic clocks, tone
generation, security alarms, pulse position modulation, etc.
• Bistable mode or Schmitt trigger: the 555 can operate as a flip-flop, if the
DIS pin is not connected and no capacitor is used. Uses include bouncefree
latched switches, etc.
Monostable mode

In the monostable mode, the 555 timer acts as a “one-shot” pulse generator. The
pulse begins when the 555 timer receives a trigger signal. The width of the pulse is
determined by the time constant of an RC network, which consists of a capacitor
(C) and a resistor (R). The pulse ends when the charge on the C equals 2/3 of the
supply voltage. The pulse width can be lengthened or shortened to the need of the
specific application by adjusting the values of R and C.
The pulse width of time t is given by
which is the time it takes to charge C to 2/3 of the supply voltage. See RC
circuit for an explanation of this effect.
Astable Mode
In astable mode, the 555 timer outputs a continuous stream of rectangular pulses
having a specified frequency. A resistor (call it R1) is connected between Vcc and
the discharge pin (pin 7) and another (R2) is connected between the discharge pin
(pin 7) and the trigger (pin 2) and threshold (pin 6) pins that share a common node.
Hence the capacitor is charged through R1 and R2, and discharged only through R2,
since pin 7 has low impedance to ground during output low intervals of the cycle,
therefore discharging the capacitor. The use of R2 is mandatory, since without it the
high current spikes from the capacitor may damage the internal discharge transistor.
In the astable mode, the frequency of the pulse stream depends on the values of R1,
R2 and C:
The high time from each pulse is given by

and the low time from each pulse is given by
Where R1 and R2 are the values of the resistors in ohms and C is the value of the
capacitor in farads.
Dual timer 556
The dual version is called 556. It features two complete 555s in a 14 pin DIL
package.
Quad timer 558
The quad version is called 558 and has 16 pins. To fit four 555's into a 16 pin
package the control voltage and reset lines are shared by all four modules. Also for
each module the discharge and threshold are internally wired together and called
timing.
I.6
Relays
A relay is an electrical switch that opens and closes under the control of another
electrical circuit. In the original form, the switch is operated by an electromagnet to
open or close one or many sets of contacts. It was invented by Joseph Henry in 1835.
Because a relay is able to control an output
circuit of higher power than the input circuit, it
can be considered to be, in a broad sense, a
form of an electrical amplifier.

A relay is used to isolate one electrical circuit from another. It allows a low current
control circuit to make or break an electrically isolated high current circuit path. One
example where a relay is useful in car audio is in the power antenna or remote output
of a head unit. We already said that the average remote lead can only handle about
one half of an amp of current. If a circuit with a large amount of current must be
controlled by the remote output lead of a head unit, a relay could be used to buffer
the remote output from the head unit. The basic relay consists of a coil and a set of
contacts. The most common relay coil is a length of magnet wire wrapped around a
metal core. When voltage is applied to the coil, current passes through the wire and
creates a magnetic field. This magnetic field pulls the contacts together and holds
them there until the current flow in the coil has stopped. The diagram below shows
the parts of a simple relay.
I.7
Opto-couplers/Opto-isolators
In electronics, an opto-isolator (or optical isolator, optocoupler, photocoupler, or
photoMOS) is a device that uses a short optical transmission path to transfer a
signal between elements of a circuit, typically a transmitter and a receiver, while
keeping them electrically isolated — since the signal goes from an electrical signal
to an optical signal back to an electrical signal, electrical contact along the path is
broken.
The opto-isolator is simply a package that contains both an infrared LED and a
photodetector such as silicon diode, transistor Darlington pair, or SCR. The wave-

length response of each device is tailored to be as identical as possible to permit the
highest measure of coupling possible.
A common implementation involves a LED and a phototransistor, separated so that

light may travel through a barrier but electrical current may not. When an electrical
signal is applied to the input of the opto-isolator, its LED lights, its light sensor
then activates, and a corresponding electrical signal is generated at the output.
Unlike a transformer, the opto-isolator allows for DC coupling and generally
provides significant protection from serious overvoltage conditions in one circuit
affecting the other. If high transmission ratio is required Darlington photo
transistor is used, however higher transmission ratio usually results in low noise
immunity and higher delay.
I.8
ULN Drivers
The ULN2803 is a small integrated circuit that contains 8 transistor driver channels.
Each channel has an input to a resistor connected to the base of a transistor and a 1
amp open collector output capable of handling up to about 30volts (if my memory is
correct). Each of the collectors has a reverse biased diode connected to a common
Vcc pin that provides inductive spike protection.

Typical uses are for micro-processor interfaces to relays, lamps, solenoids and small
motors. A 2803 with a set of relays is a simple and effective way of switching mains
voltages for example. They are used less commonly today but were once an almost
universal means of interfacing processors to power devices.
Features
 TTL, DTL, PMOS, or CMOS-
compatible Inputs
 Output Current to 500 mA
 Output Voltage to 95 V
 Transient-Protected Outputs
 Dual In-Line Plastic Package or Small-Outline IC Package
 Input Voltage, V IN ................................ 30 V
 Continuous Output Current,Io ................................................. 500 mA
 Continuous Input Current, Iin........... 25 mA
 Power Dissipation, Pd
 (one Darlington pair) ..................... 1.0 W
I.9
Combinational Logic
I.9.1 Logic Gates
Type Distinctive shape Rectangular shape Boolean algebra Truth table

between A & B
INPUT OUTPUT
A B A AND B
0 0 0
0 1 0
AND
1 0 0
1 1 1
INPUT OUTPUT
A B A OR B
0 0 0
0 1 1
OR A+B 1 0 1
1 1 1
INPUT OUTPUT
A NOT A
0 1
NOT
1 0
In electronics a NOT gate is more commonly called an inverter. The circle on the symbol is called
a bubble, and is generally used in circuit diagrams to indicate an inverted (active-low) input or
INPUT OUTPUT
output.[1]
A B A NAND B
0 0 1
0 1 1
1 0 1
NAND
1 1 0

INPUT OUTPUT
A B A NOR B
0 0 1
0 1 0
NOR
1 0 0
1 1 0
INPUT OUTPUT
A B A XOR B
0 0 0
0 1 1
XOR
1 0 1
1 1 0
INPUT OUTPUT
A XNOR
A B
B
0 0 1
XNOR 0 1 0
1 0 0
1 1 1

Logic ICs
74LS00 Quad NAND 74LS04 Hex Inverter
74LS02 Quad
NOR
74LS08 Quad AND

74LS86 Quad XOR 74LS32 Quad OR
I.9.2 Adders
For single bit adders, there are two general types.
A half adder has two inputs, generally labelled A and B, and two outputs, the sum
S and carry C. S is the two-bit XOR of A and B, and C is the AND of A and B.
Essentially the output of a half adder is the sum of two one-bit numbers, with C
being the most significant of these two outputs.
A full adder has three inputs - A, B, and a carry in C, such that multiple adders
can be used to add larger numbers. To remove ambiguity between the input and
output carry lines, the carry in is labelled Ci or Cin while the carry out is labelled Co
or Cout.
Half adder
A B C S
Half adder circuit diagram 0 0 0 0
A half adder is a logical circuit

0 1 0 1
that performs an addition operation
on two binary digits. The half
adder produces a sum and a carry 1 0 0 1
value which are both binary digits.
1 1 1 0

Full adder
Full adder circuit diagram
Input Output
A B Ci Co S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Schematic symbol for a 1-bit full adder
A full adder is a logical circuit that performs an addition operation on three binary
digits. The full adder produces a sum and carry value, which are both binary digits.
It can be combined with other full adders (see below) or work on its own.
Note that the final OR gate before the carry-out output may be replaced by an XOR
gate without altering the resulting logic. This is because the only difference
between OR and XOR gates occurs when both inputs are 1; for the adder shown
here, this is never possible. Using only two types of gates is convenient if one
desires to implement the adder directly using common IC chips.
A full adder can be constructed from two half adders by connecting A and B to the
input of one half adder, connecting the sum from that to an input to the second
adder, connecting Ci to the other input and OR the two carry outputs. Equivalently,
S could be made the three-bit xor of A, B, and Ci and Co could be made the three-
bit majority function of A, B, and Ci. The output of the full adder is the two-bit
arithmetic sum of three one-bit numbers.
Multiple-bit adders
It is possible to create a logical circuit using multiple full adders to add N-bit
numbers. Each full adder inputs a Cin, which is the Cout of the previous adder. This
kind of adder is a ripple carry adder, since each carry bit "ripples" to the next full
adder. Note that the first (and only the first) full adder may be replaced by a half
adder.

4-bit ripple carry adder circuit diagram
The layout of ripple carry adder is simple, which allows for fast design time;
however, the ripple carry adder is relatively slow, since each full adder must wait
for the carry bit to be calculated from the previous full adder. The gate delay can
easily be calculated by inspection of the full adder circuit. Following the path from
Cin to Cout shows 2 gates that must be passed through. Therefore, a 32-bit adder
requires 31 carry computations and the final sum calculation for a total of 31 * 2 +
1 = 63 gate delays.
Subtracter
Subtracter circuits take two binary numbers as input and subtract one binary
number input from the other binary number input. Similar to adders, it gives out
two outputs, difference and borrow (carry-in the case of Adder). There are two
types of subtracters.
• Half Subtracter.
• Full Subtracter.
The half-subtracter is a
combinational circuit which is used
to perform subtraction of two bits. It
has two inputs, X (minuend) and Y
(subtrahend) and two outputs D (difference) and B (borrow). The logic symbol
and truth table are shown below.

I.9.3 Multiplexers and De-multiplexers
In electronics, a multiplexer or mux (occasionally the term muldex or muldem[1] is

also found, for a combination multiplexer-demultiplexer) is a device that performs
multiplexing; it selects one of many analog or digital input signals and forwards the
selected input into a single line. A multiplexer of 2n inputs has n select bits, which
are used to select which input line to send to the output.
An electronic multiplexer makes it possible for several signals to share one device or
resource, for example one A/D converter or one communication line, instead of
having one device per input signal.
A 2-to-1 multiplexer has a Boolean equation where A and B are the two inputs, S is
the selector input, and Z is the output:
S A B Z
1 1 1
1 0 1
0
0 1 0
0 0 0
1 1 1 1

1 0 0
0 1 1
0 0 0
16-to-1 mux
8-to-1 mux
4-to-1 mux
The Boolean equation for a 4-to-1 multiplexer is:
Demultiplexer

In electronics, a demultiplexer (or demux) is a device taking a single input signal
and selecting one of many data-output-lines, which is connected to the single input.
A multiplexer is often used with a complementary demultiplexer on the receiving
end.
An electronic multiplexer can be considered as a multiple-input, single-output

switch, and a demultiplexer as a single-input, multiple-output switch. The schematic
symbol for a multiplexer is an isosceles trapezoid with the longer parallel side
containing the input pins and the short parallel side containing the output pin. The
schematic on the right shows a 2-to-1 multiplexer on the left and an equivalent
switch on the right. The sel wire connects the desired input to the output.
I.9.4
Encoder and Decoders

 Encoder
 2n inputs / n outputs
 Output is binary code for which input had a ‘1’
 Decoder
 n inputs / 2n outputs
 Output that gets ‘1’ determined by inputs; all others get ‘0’
Encoder Circuit
An encoder can be a device used to change a signal (such as a bitstream) or data

into a code. The code serves any of a number of purposes such as compressing
information for transmission or storage, encrypting or adding redundancies to the
input code, or translating from one code to another. This is usually done by means
of a programmed algorithm, especially if any part is digital, while most analog
encoding is done with analog circuitry.
Single bit 4 to 2 Encoder
An encoder has 2n input lines and n output lines.The output lines generate a binary
code corresponding to the input value. For example a single bit 4 to 2 encoder
Gate level circuit diagram of a single bit 4-to-2 line encoder
takes in 4 bits and outputs 2 bits. It is assumed that there are only 4 types of input
signals these are : 0001, 0010, 0100, 1000.
I3 I2 I1 I0 O1 O0
0 0 0 1 0 0
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 0 1 1
4 to 2 encoder
The encoder has the limitation that only one input can be active at any given time.
If two inputs are simultaneously active, the output produces an undefined
combination. To prevent this we make use of the priority encoder.
Decoders
Decoders are circuits with two or more inputs and one or more outputs, resulting by
combining various types of gates. Their basic function is to accept a binary word
(code) as an input and create a different binary word as an output. A typical decoder
is the so-called full adder (3 inputs-2 outputs) implementing the addition of two one-
digit numbers (Ai, Bi) taking into consideration the status of any previous carry (Ci-
1), resulting into the sum (Si), and generating a new carry (Ci). The addition of two 1-
digits numbers and the corresponding truth table of full adder are shown below:

N full adders can be cascaded to form a unit for the addition of two N-digits binary
numbers. Decoders with any type of truth table can be constructed by using simple
or complicated combinations of gates. Implementation of Bool’s algebra rules
generally simplifies the overall design. Simple and useful decoders are the so-called
“2-to-4” and “3-to-8” decoders.
I.10
Sequential Logic
I.10.1 Flipflops
In digital circuits, a flip-flop is a term referring to an electronic circuit (a bistable

multivibrator) that has two stable states and thereby is capable of serving as one bit
of memory. Today, the term flip-flop has come to mostly denote non-transparent
(clocked or edge-triggered) devices, while the simpler transparent ones are often
referred to as latches; however, as this distinction is quite new, the two words are
sometimes used interchangeably (see history).
A flip-flop is usually controlled by one or two control signals and/or a gate or clock
signal. The output often includes the complement as well as the normal output. As
flip-flops are implemented electronically, they require power and ground
connections.
Set–reset flip-flops (SR flip-flops)
The symbol for an SR latch.
The fundamental latch is the simple SR flip-flop , where S and R stand for set and
reset respectively. It can be constructed from a pair of cross-coupled NAND or
NOR logic gates . The stored bit is present on the output marked Q.
Normally, in storage mode, the S and R inputs are both low, and feedback
maintains the Q and Q outputs in a constant state, with Q the complement of Q. If
S is pulsed high while R is held low, then the Q output is forced high, and stays
high even after S returns low; similarly, if R is pulsed high while S is held low,
then the Q output is forced low, and stays low even after R returns low.
SR Flip-Flop operation (BUILT WITH NOR GATES)
Characteristic table Excitation table
SR Action Q(t) Q(t+1) S R Action
0 0 Keep state 0 0 0 X No change
0 1 Q=0 0 1 1 0 set
1 0 Q=1 1 0 0 1 reset

Unstable combination,
1 1 1 1 X 0 No change
see race condition
('X' denotes a Don't care condition; meaning the signal is irrelevant)
Toggle flip-flops (T flip-flops)
A circuit symbol for a T-type flip-flop, where > is the clock input, T is the toggle
input and Q is the stored data output.
If the T input is high, the T flip-flop changes state ("toggles") whenever the clock
input is strobed. If the T input is low, the flip-flop holds the previous value. This
behavior is described by the characteristic equation:
(or, without benefit of the XOR operator, the equivalent:

)
and can be described in a truth table:
T Flip-Flop operation [6]
T Q Qnext Comment Q Qnext T Comment
0 0 0 hold state(no clk) 0 0 0 No change
0 1 1 hold state(no clk) 1 1 0 No change
1 0 1 toggle 0 1 1 Complement

1 1 0 toggle 1 0 1 Complement
When T is held high, the toggle flip-flop divides the clock frequency by two; that
is, if clock frequency is 4 MHz, the output frequency obtained from the flip-flop
will be 2 MHz. This 'divide by' feature has application in various types of digital
counters. A T flip-flop can also be built using a JK flip-flop (J & K pins are
connected together and act as T) or D flip-flop (T input and Q previous is connected to
the D input through an XOR gate).
JK flip-flop
JK flip-flop timing diagram
The JK flip-flop augments the behavior of the SR flip-flop (J=Set, K=Reset) by

interpreting the S = R = 1 condition as a "flip" or toggle command. Specifically,
the combination J = 1, K = 0 is a command to set the flip-flop; the combination J =
0, K = 1 is a command to reset the flip-flop; and the combination J = K = 1 is a
command to toggle the flip-flop, i.e., change its output to the logical complement
of its current value. Setting J = K = 0 does NOT result in a D flip-flop, but rather,
will hold the current state. To synthesize a D flip-flop, simply set K equal to the
complement of J. The JK flip-flop is therefore a universal flip-flop, because it can
be configured to work as an SR flip-flop, a D flip-flop, or a T flip-flop. NOTE: The
flip flop is positive edge triggered (Clock Pulse) as seen in the timing diagram.
A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data
inputs, Q is the stored data output, and Q' is the inverse of Q.
The characteristic equation of the JK flip-flop is:

and the corresponding truth table is:
JK Flip Flop operation [6]
J K Qnext Comment Q Qnext J K Comment
0 0 hold state 0 0 0 X No change
0 1 reset 0 1 1 X Set
1 0 set 1 0 X 1 Reset
1 1 toggle 1 1 X 0 No change
D flip-flop
D flip-flop symbol
The Q output always takes on the state of the D input at the moment of a rising
clock edge (or falling edge if the clock input is active low).[7] It is called the D flip-
flop for this reason, since the output takes the value of the D input or Data input,
and Delays it by one clock count. The D flip-flop can be interpreted as a primitive
memory cell, zero-order hold, or delay line.
Truth table:
Clock D Q Qprev
Rising
0 0 X
edge
Rising
1 1 X
edge
Non-Rising X Qprev
('X' denotes a Don't care condition, meaning the signal is irrelevant)
I.10.2 Shift Register
In digital circuits, a shift register is a group of flip flops set up in a linear fashion
which have their inputs and outputs connected together in such a way that the data is
shifted down the line when the circuit is activated.
Shift registers can have both parallel and serial inputs and outputs. These are often
configured as serial-in, parallel-out (SIPO) or as parallel-in, serial-out (PISO).
There are also types that have both serial and parallel input and types with serial and
parallel output. There are also bi-directional shift registers which allows one to vary
the direction of the shift register. The serial input and outputs of a register can also
be connected together to create a circular shift register. One could also create
multi-dimensional shift registers, which can perform more complex computation.
Serial-in, parallel-out
This configuration allows conversion from serial to parallel format. Data is input
serially, as described in the SISO section above. Once the data has been input, it
may be either read off at each output simultaneously, or it can be shifted out and
replaced.

4-Bit SIPO Shift Register
Parallel-in, serial-out
This configuration has the data input on lines D1 through D4 in parallel format. To
write the data to the register, the Write/Shift control line must be held LOW. To
shift the data, the W/S control line is brought HIGH and the registers are clocked.
The arrangement now acts as a SISO shift register, with D1 as the Data Input.
However, as long as the number of clock cycles is not more than the length of the
data-string, the Data Output, Q, will be the parallel data read off in order.
I.10.3 Counters
In digital logic and computing, a counter is a device which stores (and sometimes
displays) the number of times a particular event or process has occurred, often in
relationship to a clock signal. In practice, there are two types of counters:

• up counters, which increase (increment) in value
• down counters, which decrease (decrement) in value
Asynchronous (ripple) counter
Asynchronous Counter created from JK flip-flops.
The simplest counter circuit is a single D-type flip-flop, with its D (data) input fed
from its own inverted output. This circuit can store one bit, and hence can count
from zero to one before it overflows (starts over from 0). This counter will
increment once for every clock cycle and takes two clock cycles to overflow, so
every cycle it will alternate between a transition from 0 to 1 and a transition from 1
to 0. Notice that this creates a new clock with a 50% duty cycle at exactly half the
frequency of the input clock. If this output is then used as the clock signal for a
similarly arranged D flip-flop (remembering to invert the output to the input), you
will get another 1 bit counter that counts half as fast. Putting them together yields a
two bit counter:
Cycle Q1 Q0 (Q1:Q0)dec
0 0 0 0
1 0 1 1
2 1 0 2
3 1 1 3
4 0 0 0

You can continue to add additional flip-flops, always inverting the output to its
own input, and using the output from the previous flip-flop as the clock signal. The
result is called a ripple counter, which can count to 2n-1 where n is the number of
bits (flip-flop stages) in the counter. Ripple counters suffer from unstable outputs
as the overflows "ripple" from stage to stage, but they do find frequent application
as dividers for clock signals, where the instantaneous count is unimportant, but the
division ratio overall is. (To clarify this, a 1-bit counter is exactly equivalent to a
divide by two circuit – the output frequency is exactly half that of the input when
fed with a regular train of clock pulses).
The use of flip-flop outputs as clocks leads to timing skew between the count data
bits, making this ripple technique incompatible with normal synchronous circuit
design styles.
Synchronous counter
A 4-bit synchronous counter using J-K Flip-flops

Where a stable count value is important across several bits, which is the case in
most counter systems, synchronous counters are used. These also use flip-flops,
either the D-type or the more complex J-K type, but here, each stage is clocked
simultaneously by a common clock signal. Logic gates between each stage of the
circuit control data flow from stage to stage so that the desired count behavior is
realized. Synchronous counters can be designed to count up or down, or both
according to a direction input, and may be presetable via a set of parallel "jam"
inputs. Most types of hardware-based counter are of this type. A simple way of
implementing the logic for each bit of an ascending counter (which is what is
shown in the image to the right) is for each bit to toggle when all of the less
significant bits are at a logic high state. For example, bit 1 toggles when bit 0 is

logic high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles when
bit 2, bit 1 and bit 0 are all high; and so on.
Synchronous counters can also be implemented with hardware finite state
machines, which are more complex but allow for smoother, more stable transitions.
Ring counter
Main article: Ring counter
A ring counter is a shift register (a cascade connection of flip-flops) with the

output of the last one connected to the input of the first, that is, in a ring. Typically
a pattern consisting of a single 1 bit is circulated, so the state repeats every N clock
cycles if N flip-flops are used. It can be used as a cycle counter of N states.
Johnson counter
A Johnson counter (or switchtail ring counter, twisted-ring counter, walking-ring

counter, or Moebius counter) is a modified ring counter, where the output from the
last stage is inverted and fed back as input to the first stage. A pattern of bits equal
in length to twice the length of the shift register thus circulates indefinitely. These
counters find specialist applications, including those similar to the decade counter,
digital to analogue conversion, etc.
Decade counter
A decade counter is one that counts in decimal digits, rather than binary. A decimal
counter may have each digit binary encoded (that is, it may count in binary-coded
decimal, as the 7490 integrated circuit did) or other binary encodings (such as the
bi-quinary encoding of the 7490 integrated circuit). Alternatively, it may have a
"fully decoded" or one-hot output code in which each output goes high in turn; the
4017 was such a circuit. The latter type of circuit finds applications in multiplexers
and demultiplexers, or wherever a scanning type of behaviour is useful. Similar
counters with different numbers of outputs are also common. The decade counter is
also known as a mod-10 counter.
Up–down counter
A counter that can change state in either direction, under control an up–down
selector input, is known as an up–down counter. When the selector is in the up
state, the counter increments its value; when the selector is in the down state, the
counter decrements the count.
Exercise

Select correct option from the following
1. What maximum efficiency that a transformer can offer?
a. 94% b. 92% c. 98% d. 0%
2. Transformer Power Rating is measured in
a. VA b. Watts c. Ampere d. Volts
3. Which of the following is the best rectifier?
a. Half wave b. Center tapped c.Bridge d. Transferred
4. Which of the following device is used as ripple filter?
a. Resistor b. Capacitor c. Flip-flop d. Transformer
5. To get +5V DC output which regulator IC must be used?
a. 7905 b. 31705 c. 7805 d. 2005
6. Which of the following IC will give -5V regulated?
a. 7905 b. 7805 c. LM35 d. 741
7. What is the output voltage range of LM317?
a. 0 to Vin b. Vin to Vcc c. 0 to 37V d. 1.25 to 37V
8. What is the correct pin configuration of IC78XX
a. IGO b. GIO c. OGI d. GOI
9. What is the correct pin configuration of IC79XX
a. IGO b. GIO c. OGI d. GOI
10. What is the correct pin configuration of LM317
a. IAO b. AIO c. OAI d. AOI
11. What is the correct pin configuration of LM337
a. IAO b. AIO c. OAI d. AOI

12. What is the scale factor of Temperature sensor LM35
a. 10V/0C b. 20V/0C c. 30V/0C d. 55V/0C
13. Which of the following IC is referred as Op-Amp
a. 555 b. 740 c. 741 d. 742
14. Which mode of IC555 timer is also referred as free running mode?
a. Bistable b. Monostable c. Astable d. Mode not possible
15. What are the three connecting terminal of a normal SPDT relay?
a. P-Vcc-Ground b. P-NC-NF c. P-NC-NO d. P-NO-Ground
16. Which of the following IC has 1 transistor and 1 LED integrated in it?
a. 7805 b. LM35 c. Opto-Isolator(4N26) d. 741
17. To interface microcontroller with high current devices like motors etc. we need
a. Connector b. Driver c. Relays d. High current wires
18. Which of the following gates are called universal gates?
a. AND/OR b. AND/NOT c. XOR/XNOR d. NAND/NOR
19. Match correct pairs
a. 74LS00 A. Quad AND
b.74LS02 B. Quad NAND
c. 74LS32 C. Quad XOR
d. 74LS04 D. Hex Inverter
e. 74LS08 E. Quad NOR
f. 74LS86 F. Quad OR
20. What are the boolean equations for sum and carry of a half adder circuit?
a. Sum=A.B, Carry=A xor B

b. Sum=A+B, Carry=A.B
c. Sum=A xor B, Carry=A.B
d. Sum=A.B, Carry=A+B
21. What are the boolean equations for sum and carry of a full adder circuit?
a. Sum=A.B.Cin, Cout=A xor B xor Cin
b. Sum=A+B+Cin, Cout=A.B.Cin
c. Sum=A xor B xor C, Cout=A.B.Cin
d. Sum=A xor B xor C, Cout=A.B+B.Cin+Cin.A
22. Which of the following digital circuit is referred as many to 1?
a. Demultiplexer b. Multiplexer c. Encoder d. Decoder
22. How many select lines will be there in an 8x1 mux?
a. 1 b. 2 c. 3 d. 4
24. Which of the following digital circuit is referred as many to 1?
a. Demultiplexer b. Multiplexer c. Encoder d. Decoder
23. If input of an 8x3 decoder is 00100000, what should be the output?
a. 101 b. 011 c. 110 d. 100
24. If input of the decoder is of 4 lines, how many lines will be at output?
a. 2 b. 4 c. 8 d. 16
25. Characteristic equation of D f/f is
a. Q+=D b. Q+=D’ c. Q+=D xor Q d. Q+=Q
26. Characteristic equation of S-R f/f is
a. Q+=S+R’Q b. Q+=S.R c. Q+=S xor R d. Q+=S.R’Q

27. Characteristic equation of J-K f/f is
a. Q+=JQ+KQ b. Q+=JQ’+K’Q c. Q+=J xor K d. Q+=Q
28. Characteristic equation of T f/f is
a. Q+=T b. Q+=T’ c. Q+=T xor Q d. Q+=Q.T
29. How many D f/f are required to design a mod-3 counter
a. 1 b. 2 c. 3 d. 4
30. How many count values will be there in mod-4 counter
a. 4 b. 8 c. 16 d. 64
Section II
II.1 Starting with Keil-uV3

Here are the steps to start programming in keil-uV3
1. First of all install keil uV3 from the CD provided.

2. Now run the software by double clicking the icon on your desktop or from
the start>All Programs>uV3
3. You will get this window in front of you
Now from Project menu select option New Project..
5. Give some name to your project…

6. As you click on Save button you will get the following window…
7
. Here
you
have
to
choose
device for
which
you need
to write
programs. As we are targeting programs to AT89C51/52(Commercial name
of 8051), we will select Atmel>AT89C51

8. Now your project has been created.
9. Select File>New.. to create a File.

10.Save the file with some name. Use .c extension if you are writing a C
program and use .asm if you are interested in assembly.
11.Now write your program.

12.Now right click on Target1>Source Group 1 and select “Add Files to Group
‘Source Group 1’” option.
13.Select the file you just created…i.e. First.c and click on Add button and then
on Close button.

14. Now your file has become a part of Project. Now to compile the file select
Project>Build target or press F7.
14.After doing so, you will find the summery of compilation (in the window
called output window just below the project window), i.e. whether there are
some bugs (error or warnings) or not. Program size with data and code size is
also displayed.

16. Now select the Options for Target from the tool indicated in figure.
17. In the Target tab write Xtal(MHz) as 11.0592. This is the crystal frequency of
8051.

18. In the Output tab, Check the Create HEX File check button and give some
name to hex file being created(by default it will take name of project) and click on
Ok Button.
19. Now compile your file again from the option Project>Rebuild all target files or
by pressing F7. You will find that in the output window summery, details of hex
file is also displayed. Now this hex file (First.hex) is ready to be burnt on to the
device (8051).

II.2
Introduction to 8051
The 8051 is an 8-bit microprocessor originally designed in the 1980's by Intel that
has gained great popularity since its introduction. Its standard form includes several
standard on-chip peripherals, including timers, counters, and UART ' s, plus 4kbytes
of on-chip program memory and 128 bytes (note: bytes, not Kbytes) of data
memory, making single-chip implementations possible. Its hundreds of derivatives,
manufactured by several different companies (like Philips) include even more on-
chip peripherals, such as analog-digital converters, pulse-width modulators, I2C bus
interfaces, etc. Costing only a few dollars per IC, the 8051 is estimated to be used in
a large percentage in all the embedded system products.
The 8051 memory architecture includes 128 bytes of data memory that are
accessible directly by its instructions. A 32-byte segment of this 128 byte memory
block is bit addressable by a subset of the 8051 instructions, namely the bit-
instructions. External memory of up to 64 Kbytes is accessable by a special "movx"
instruction. Up to 4 Kbytes of program instructions can be stored in the internal
memory of the 8051, or the 8051 can be configured to use up to 64 Kbytes of
external program memory The majority of the 8051's instructions are executed
within 12 clock cycles.

II.3 8051 Architecture

8051 Memory Map diagram
II.4 8051 Register set
The Accumulator (A)

If you’ve worked with any other assembly languages you will be familiar with the
concept of an Accumulator register.
The Accumulator, as its name suggests, is used as a general register to accumulate

the results of a large number of instructions. It can hold an 8-bit (1-byte) value and is
the most versatile register the 8051 has due to the shear number of instructions that
make use of the accumulator. More than half of the 8051s 255 instructions
manipulate or use the accumulator in some way.
For example, if you want to add the number 10 and 20, the resulting 30 will be
stored in the Accumulator. Once you have a value in the Accumulator you may
continue processing the value or you may store it in another register or in memory.

The "R" registers
The "R" registers are a set of eight registers that are named R0, R1, etc. up to and
including R7.
These registers are used as auxillary registers in many operations. To continue with
the above example, perhaps you are adding 10 and 20. The original number 10 may
be stored in the Accumulator whereas the value 20 may be stored in, say, register
R4. To process the addition you would execute the command:
ADD A,R4
After executing this instruction the Accumulator will contain the value 30.
You may think of the "R" registers as very important auxillary, or "helper", registers.
The Accumulator alone would not be very useful if it were not for these "R"
registers.
The "R" registers are also used to temporarily store values. For example, lets say you
want to add the values in R1 and R2 together and then subtract the values of R3 and
R4. One way to do this would be:
MOV A,R3 ;Move the value of R3 into the accumulator

ADD A,R4 ;Add the value of R4
MOV R5,A ;Store the resulting value temporarily in R5
MOV A,R1 ;Move the value of R1 into the accumulator
ADD A,R2 ;Add the value of R2
SUBB A,R5 ;Subtract the value of R5 (which now contains R3 + R4)
As you can see, we used R5 to temporarily hold the sum of R3 and R4. Of course,
this isnt the most efficient way to calculate (R1+R2) - (R3 +R4) but it does illustrate
the use of the "R" registers as a way to store values temporarily.
The "B" Register

The "B" register is very similar to the Accumulator in the sense that it may hold an
8-bit (1-byte) value.
The "B" register is only used by two 8051 instructions: MUL AB and DIV AB.
Thus, if you want to quickly and easily multiply or divide A by another number, you
may store the other number in "B" and make use of these two instructions.

Aside from the MUL and DIV instructions, the "B" register is often used as yet
another temporary storage register much like a ninth "R" register.
The Data Pointer (DPTR)
The Data Pointer (DPTR) is the 8051s only user-accessable 16-bit (2-byte) register.
The Accumulator, "R" registers, and "B" register are all 1-byte values.
DPTR, as the name suggests, is used to point to data. It is used by a number of

commands which allow the 8051 to access external memory. When the 8051
accesses external memory it will access external memory at the address indicated by
DPTR.
While DPTR is most often used to point to data in external memory, many
programmers often take advantge of the fact that its the only true 16-bit register
available. It is often used to store 2-byte values which have nothing to do with
memory locations.
The Program Counter (PC)
The Program Counter (PC) is a 2-byte address which tells the 8051 where the next
instruction to execute is found in memory. When the 8051 is initialized PC always
starts at 0000h and is incremented each time an instruction is executed. It is
important to note that PC isnt always incremented by one. Since some instructions
require 2 or 3 bytes the PC will be incremented by 2 or 3 in these cases.
The Program Counter is special in that there is no way to directly modify its value.
That is to say, you cant do something like PC=2430h. On the other hand, if you
execute LJMP 2430h youve effectively accomplished the same thing.
The Stack Pointer (SP)

The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1-byte)
value. The Stack Pointer is used to indicate where the next value to be removed from
the stack should be taken from.
When you push a value onto the stack, the 8051 first increments the value of SP and
then stores the value at the resulting memory location.
When you pop a value off the stack, the 8051 returns the value from the memory
location indicated by SP, and then decrements the value of SP.

This order of operation is important. When the 8051 is initialized SP will be
initialized to 07h. If you immediately push a value onto the stack, the value will be
stored in Internal RAM address 08h. This makes sense taking into account what was
mentioned two paragraphs above: First the 8051 will increment the value of SP
(from 07h to 08h) and then will store the pushed value at that memory address (08h).
SP is modified directly by the 8051 by six instructions: PUSH, POP, ACALL,

LCALL, RET, and RETI. It is also used intrinsically whenever an interrupt is
triggered (more on interrupts later. Don’t worry about them for now!).
What Are SFRs(Special Function Registers)?
The 8051 is a flexible microcontroller with a relatively large number of modes of

operations. Your program may inspect and/or change the operating mode of the
8051 by manipulating the values of the 8051's Special Function Registers (SFRs).
SFRs are accessed as if they were normal Internal RAM. The only difference is that
Internal RAM is from address 00h through 7Fh whereas SFR registers exist in the
address range of 80h through FFh.
Each SFR has an address (80h through FFh) and a name. The following chart
provides a graphical presentation of the 8051's SFRs, their names, and their address.
SFR Types
As mentioned in the chart itself, the SFRs that have a blue background are SFRs
related to the I/O ports. The 8051 has four I/O ports of 8 bits, for a total of 32 I/O
lines. Whether a given I/O line is high or low and the value read from the line are
controlled by the SFRs in green.
The SFRs with yellow backgrouns are SFRs which in some way control the
operation or the configuration of some aspect of the 8051. For example, TCON
controls the timers, SCON controls the serial port.
The remaining SFRs, with green backgrounds, are "other SFRs." These SFRs can be
thought of as auxillary SFRs in the sense that they don't directly configure the 8051
but obviously the 8051 cannot operate without them. For example, once the serial
port has been configured using SCON, the program may read or write to the serial
port using the SBUF register.
Programming Tip: The SFRs whose names appear in red in the chart
above are SFRs that may be accessed via bit operations (i.e., using the
SETB and CLR instructions). The other SFRs cannot be accessed using
bit operations. As you can see, all SFRs that whose addresses are
divisible by 8 can be accessed with bit operations.
SFR Descriptions
This section will endeavor to quickly overview each of the standard SFRs found in
the above SFR chart map. It is not the intention of this section to fully explain the
functionality of each SFR--this information will be covered in separate chapters of
the tutorial. This section is to just give you a general idea of what each SFR does.
P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of

this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of
port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send
a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low
level.
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and
P3), if your hardware uses external RAM or external code memory (i.e.,
your program is stored in an external ROM or EPROM chip or if you
are using external RAM chips) you may not use P0 or P2. This is
because the 8051 uses ports P0 and P2 to address the external memory.
Thus if you are using external RAM or code memory you may only use
ports P1 and P3 for your own use.
SP (Stack Pointer, Address 81h): This is the stack pointer of the microcontroller.
This SFR indicates where the next value to be taken from the stack will be read from
in Internal RAM. If you push a value onto the stack, the value will be written to the
address of SP + 1. That is to say, if SP holds the value 07h, a PUSH instruction will
push the value onto the stack at address 08h. This SFR is modified by all instructions
which modify the stack, such as PUSH, POP, LCALL, RET, RETI, and whenever
interrupts are provoked by the microcontroller.
Programming Tip: The SP SFR, on startup, is initialized to 07h. This

means the stack will start at 08h and start expanding upward in internal
RAM. Since alternate register banks 1, 2, and 3 as well as the user bit
variables occupy internal RAM from addresses 08h through 2Fh, it is
necessary to initialize SP in your program to some other value if you
will be using the alternate register banks and/or bit memory. It's not a
bad idea to initialize SP to 2Fh as the first instruction of every one of
your programs unless you are 100% sure you will not be using the
register banks and bit variables.

DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and
DPH work together to represent a 16-bit value called the Data Pointer. The data
pointer is used in operations regarding external RAM and some instructions
involving code memory. Since it is an unsigned two-byte integer value, it can
represent values from 0000h to FFFFh (0 through 65,535 decimal).
Programming Tip: DPTR is really DPH and DPL taken together as a

16-bit value. In reality, you almost always have to deal with DPTR one
byte at a time. For example, to push DPTR onto the stack you must first
push DPL and then DPH. You can't simply plush DPTR onto the stack.
Additionally, there is an instruction to "increment DPTR." When you
execute this instruction, the two bytes are operated upon as a 16-bit
value. However, there is no instruction that decrements DPTR. If you
wish to decrement the value of DPTR, you must write your own code to
do so.
PCON (Power Control, Addresses 87h): The Power Control SFR is used to
control the 8051's power control modes. Certain operation modes of the 8051 allow
the 8051 to go into a type of "sleep" mode which requires much less power. These
modes of operation are controlled through PCON. Additionally, one of the bits in
PCON is used to double the effective baud rate of the 8051's serial port.
TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control

SFR is used to configure and modify the way in which the 8051's two timers operate.
This SFR controls whether each of the two timers is running or stopped and contains
a flag to indicate that each timer has overflowed. Additionally, some non-timer
related bits are located in the TCON SFR. These bits are used to configure the way
in which the external interrupts are activated and also contain the external interrupt
flags which are set when an external interrupt has occured.
TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure
the mode of operation of each of the two timers. Using this SFR your program may
configure each timer to be a 16-bit timer, an 8-bit autoreload timer, a 13-bit timer, or
two separate timers. Additionally, you may configure the timers to only count when
an external pin is activated or to count "events" that are indicated on an external pin.
TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken

together, represent timer 0. Their exact behavior depends on how the timer is
configured in the TMOD SFR; however, these timers always count up. What is
configurable is how and when they increment in value.

TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken
together, represent timer 1. Their exact behavior depends on how the timer is
configured in the TMOD SFR; however, these timers always count up. What is
configurable is how and when they increment in value.
P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of

level.
SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR
is used to configure the behavior of the 8051's on-board serial port. This SFR
controls the baud rate of the serial port, whether the serial port is activated to receive
data, and also contains flags that are set when a byte is successfully sent or received.
Programming Tip: To use the 8051's on-board serial port, it is

generally necessary to initialize the following SFRs: SCON, TCON, and
TMOD. This is because SCON controls the serial port. However, in
most cases the program will wish to use one of the timers to establish
the serial port's baud rate. In this case, it is necessary to configure timer
1 by initializing TCON and TMOD.
SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and
receive data via the on-board serial port. Any value written to SBUF will be sent out
the serial port's TXD pin. Likewise, any value which the 8051 receives via the serial
port's RXD pin will be delivered to the user program via SBUF. In other words,
SBUF serves as the output port when written to and as an input port when read from.
P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of

level.
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and
P3), if your hardware uses external RAM or external code memory (i.e.,
your program is stored in an external ROM or EPROM chip or if you
are using external RAM chips) you may not use P0 or P2. This is
because the 8051 uses ports P0 and P2 to address the external memory.
Thus if you are using external RAM or code memory you may only use
ports P1 and P3 for your own use.

IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable
and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable
the specific interrupts, where as the highest bit is used to enable or disable ALL
interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled regardless of
whether an individual interrupt is enabled by setting a lower bit.
P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of

level.
IP (Interrupt Priority, Addresses B8h, Bit-Addressable): The Interrupt Priority

SFR is used to specify the relative priority of each interrupt. On the 8051, an
interrupt may either be of low (0) priority or high (1) priority. An interrupt may only
interrupt interrupts of lower priority. For example, if we configure the 8051 so that
all interrupts are of low priority except the serial interrupt, the serial interrupt will
always be able to interrupt the system, even if another interrupt is currently
executing. However, if a serial interrupt is executing no other interrupt will be able
to interrupt the serial interrupt routine since the serial interrupt routine has the
highest priority.
PSW (Program Status Word, Addresses D0h, Bit-Addressable): The Program

Status Word is used to store a number of important bits that are set and cleared by
8051 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag, the
overflow flag, and the parity flag. Additionally, the PSW register contains the
register bank select flags which are used to select which of the "R" register banks are
currently selected.
Programming Tip: If you write an interrupt handler routine, it is a very

good idea to always save the PSW SFR on the stack and restore it when
your interrupt is complete. Many 8051 instructions modify the bits of
PSW. If your interrupt routine does not guarantee that PSW is the same
upon exit as it was upon entry, your program is bound to behave rather
erradically and unpredictably--and it will be tricky to debug since the
behavior will tend not to make any sense.
ACC (Accumulator, Addresses E0h, Bit-Addressable): The Accumulator is one

of the most-used SFRs on the 8051 since it is involved in so many instructions. The
Accumulator resides as an SFR at E0h, which means the instruction MOV A,#20h is
really the same as MOV E0h,#20h. However, it is a good idea to use the first

method since it only requires two bytes whereas the second option requires three
bytes.
B (B Register, Addresses F0h, Bit-Addressable): The "B" register is used in two

instructions: the multiply and divide operations. The B register is also commonly
used by programmers as an auxiliary register to temporarily store values.
II.5
Assembly language programming

Instruction set
ACALL
Operation: ACALL
Function: Absolute Call Within 2K Block
Syntax: ACALL code address
Description: ACALL unconditionally calls a subroutine at the indicated code

address. ACALL pushes the address of the instruction that follows ACALL onto
the stack, least-significant-byte first, most-significant-byte second. The Program
Counter is then updated so that program execution continues at the indicated
address.
The new value for the Program Counter is calculated by replacing the least-
significant-byte of the Program Counter with the second byte of the ACALL
instruction, and replacing bits 0-2 of the most-significant-byte of the Program
Counter with 3 bits that indicate the page. Bits 3-7 of the most-significant-byte of
the Program Counter remain unchaged.
Example: ACALL Delay
ADD
Operation: ADD, ADDC
Function: Add Accumulator, Add Accumulator With Carry
Syntax: ADD A, operand
ADDC A, operand
Description: Description: ADD and ADDC both add the value operand to the
value of the Accumulator, leaving the resulting value in the Accumulator. The
value operand is not affected. ADD and ADDC function identically except that

ADDC adds the value of operand as well as the value of the Carry flag whereas
ADD does not add the Carry flag to the result.
Example: ADD A, R0
ADDC A,R0
AJMP
Operation: AJMP
Function: Absolute Jump Within 2K Block
Syntax: AJMP code address
Description: AJMP unconditionally jumps to the indicated code address. The new
value for the Program Counter is calculated by replacing the least-significant-byte
of the Program Counter with the second byte of the AJMP instruction, and
replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits
that indicate the page of the byte following the AJMP instruction. Bits 3-7 of the
most-significant-byte of the Program Counter remain unchaged.
Example: AJMP Label
ANL
Operation: ANL
Function: Bitwise AND
Syntax: ANL operand1, operand2
Description: ANL does a bitwise "AND" operation between operand1 and

operand2, leaving the resulting value in operand1. The value of operand2 is not
affected. A logical "AND" compares the bits of each operand and sets the
corresponding bit in the resulting byte only if the bit was set in both of the original
operands, otherwise the resulting bit is cleared.
Example: ANL A, R1
CJNE
Operation: CJNE
Function: Compare and Jump If Not Equal
Syntax: CJNE operand1,operand2,reladdr
Description: CJNE compares the value of operand1 and operand2 and branches to
the indicated relative address if operand1 and operand2 are not equal. If the two
operands are equal program flow continues with the instruction following the
CJNE instruction.
The Carry bit (C) is set if operand1 is less than operand2, otherwise it is cleared.
Example: CJNE R0, #34, Label
CLR
Operation: CLR
Function: Clear Register
Syntax: CLR register
Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the
register is a bit (including the carry bit), only the specified bit is affected. Clearing
the Accumulator sets the Accumulator's value to 0.
Example: CLR B
CPL
Operation: CPL
Function: Complement Register
Syntax: CPL operand
Description: CPL complements operand, leaving the result in operand. If operand

is a single bit then the state of the bit will be reversed. If operand is the
Accumulator then all the bits in the Accumulator will be reversed. This can be
thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator."
If the operand refers to a bit of an output Port, the value that will be complemented
is based on the last value written to that bit, not the last value read from it.
Example: CPL A
CPL P3.0
DA
Operation: DA
Function: Decimal Adjust Accumulator
Syntax: DA A
Description: DA adjusts the contents of the Accumulator to correspond to a BCD

(Binary Coded Decimal) number after two BCD numbers have been added by the
ADD or ADDC instruction. If the carry bit is set or if the value of bits 0-3 exceed
9, 0x06 is added to the accumulator. If the carry bit was set when the instruction
began, or if 0x06 was added to the accumulator in the first step, 0x60 is added to
the accumulator.
Example: DA A
8051 Instruction Set: DEC

Operation: DEC
Function: Decrement Register
Syntax: DEC register
Description: DEC decrements the value of register by 1. If the initial value of

register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). Note:
The Carry Flag is NOT set when the value "rolls over" from 0 to 255.
Example: DEC R0
DIV
Operation: DIV
Function: Divide Accumulator by B
Syntax: DIV AB
Description: Divides the unsigned value of the Accumulator by the unsigned value
of the "B" register. The resulting quotient is placed in the Accumulator and the
remainder is placed in the "B" register.
Example: DIV AB
DJNZ
Operation: DJNZ
Function: Decrement and Jump if Not Zero
Syntax: DJNZ register,reladdr
Description: DJNZ decrements the value of register by 1. If the initial value of

register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). If the
new value of register is not 0 the program will branch to the address indicated by
relative addr. If the new value of register is 0 program flow continues with the
instruction following the DJNZ instruction.
Example: DJNZ R0, Label

INC
Operation: INC
Function: Increment Register
Syntax: INC register
Description: INC increments the value of register by 1. If the initial value of

register is 255 (0xFF Hex), incrementing the value will cause it to reset to 0. Note:
The Carry Flag is NOT set when the value "rolls over" from 255 to 0.
In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is
incremented. If the initial value of DPTR is 65535 (0xFFFF Hex), incrementing the
value will cause it to reset to 0. Again, the Carry Flag is NOT set when the value of
DPTR "rolls over" from 65535 to 0.
Example: INC R0
JB
Operation: JB
Function: Jump if Bit Set
Syntax: JB bit addr, reladdr
Description: JB branches to the address indicated by reladdr if the bit indicated by

bit addr is set. If the bit is not set program execution continues with the instruction
following the JB instruction.
Example: JB P3.7, Label
JBC
Operation: JBC
Function: Jump if Bit Set and Clear Bit
Syntax: JB bit addr, reladdr
Description: JBC will branch to the address indicated by reladdr if the bit
indicated by bit addr is set. Before branching to reladdr the instruction will clear
the indicated bit. If the bit is not set program execution continues with the
instruction following the JBC instruction.
Example: JBC P3.7, Label
JC
Operation: JC

Function: Jump if Carry Set
Syntax: JC reladdr
Description: JC will branch to the address indicated by reladdr if the Carry Bit is
set. If the Carry Bit is not set program execution continues with the instruction
following the JC instruction.
Example: JC Label
JMP
Operation: JMP
Function: Jump to Data Pointer + Accumulator
Syntax: JMP @A+DPTR
Description: JMP jumps unconditionally to the address represented by the sum of

the value of DPTR and the value of the Accumulator.
JNB
Operation: JNB
Function: Jump if Bit Not Set
Syntax: JNB bit addr,reladdr
Description: JNB will branch to the address indicated by reladdress if the

indicated bit is not set. If the bit is set program execution continues with the
instruction following the JNB instruction.
Example: JNB P3.7, Label
JNC
Operation: JNC
Function: Jump if Carry Not Set
Syntax: JNC reladdr
Description: JNC branches to the address indicated by reladdr if the carry bit is
not set. If the carry bit is set program execution continues with the instruction
following the JNB instruction.
Example: JNC Label
JNZ
Operation: JNZ

Function: Jump if Accumulator Not Zero
Syntax: JNZ reladdr
Description: JNZ will branch to the address indicated by reladdr if the

Accumulator contains any value except 0. If the value of the Accumulator is zero
program execution continues with the instruction following the JNZ instruction.
Example: JNZ Label
JZ
Operation: JZ
Function: Jump if Accumulator Zero
Syntax: JNZ reladdr
Description: JZ branches to the address indicated by reladdr if the Accumulator

contains the value 0. If the value of the Accumulator is non-zero program
execution continues with the instruction following the JNZ instruction.
Example: JZ Label
LCALL
Operation: LCALL
Function: Long Call
Syntax: LCALL code addr
Description: LCALL calls a program subroutine. LCALL increments the program

counter by 3 (to point to the instruction following LCALL) and pushes that value
onto the stack (low byte first, high byte second). The Program Counter is then set
to the 16-bit value which follows the LCALL opcode, causing program execution
to continue at that address.
Example: LCALL Delay
LJMP
Operation: LJMP
Function: Long Jump
Syntax: LJMP code addr
Description: LJMP jumps unconditionally to the specified code addr.
Example: LJMP Label

MOV
Operation: MOV
Function: Move Memory
Syntax: MOV operand1,operand2
Description: MOV copies the value of operand2 into operand1. The value of
operand2 is not affected. Both operand1 and operand2 must be in Internal RAM.
No flags are affected unless the instruction is moving the value of a bit into the
carry bit in which case the carry bit is affected or unless the instruction is moving a
value into the PSW register (which contains all the program flags).
Example: MOV A, R0
MOVC
Operation: MOVC
Function: Move Code Byte to Accumulator
Syntax: MOVC A,@A+register
Description: MOVC moves a byte from Code Memory into the Accumulator. The
Code Memory address from which the byte will be moved is calculated by
summing the value of the Accumulator with either DPTR or the Program Counter
(PC). In the case of the Program Counter, PC is first incremented by 1 before being
summed with the Accumulator.
Example: MOVC A, @A+R0
MOVX
Operation: MOVX
Function: Move Data To/From External Memory (XRAM)
Syntax: MOVX operand1,operand2
Description: MOVX moves a byte to or from External Memory into or from the
Accumulator. If operand1 is @DPTR, the Accumulator is moved to the 16-bit
External Memory address indicated by DPTR. This instruction uses both P0 (port
0) and P2 (port 2) to output the 16-bit address and data. If operand2 is DPTR then
the byte is moved from External Memory into the Accumulator.
If operand1 is @R0 or @R1, the Accumulator is moved to the 8-bit External

Memory address indicated by the specified Register. This instruction uses only P0
(port 0) to output the 8-bit address and data. P2 (port 2) is not affected. If operand2

is @R0 or @R1 then the byte is moved from External Memory into the
Accumulator.
Example: MOVX @R0, 200H
MUL
Operation: MUL
Function: Multiply Accumulator by B
Syntax: MUL AB
Description: Multiples the unsigned value of the Accumulator by the unsigned

value of the “B” registers. The least significant byte of the result is placed in the
Accumulator and the most-significant-byte is placed in the "B" register.
The Carry Flag (C) is always cleared.
The Overflow Flag (OV) is set if the result is greater than 255 (if the most-
significant byte is not zero), otherwise it is cleared.
NOP
Operation: NOP
Function: None, waste time
Syntax: No Operation
Description: NOP, as it's name suggests, causes No Operation to take place for
one machine cycle. NOP is generally used only for timing purposes.
Absolutely no flags or registers are affected.
ORL
Operation: ORL
Function: Bitwise OR
Syntax: ORL operand1,operand2
Description: ORL does a bitwise "OR" operation between operand1 and operand2,
leaving the resulting value in operand1. The value of operand2 is not affected. A
logical "OR" compares the bits of each operand and sets the corresponding bit in
the resulting byte if the bit was set in either of the original operands, otherwise the
resulting bit is cleared.
Example: ORL A, R0

POP
Operation: POP
Function: Pop Value From Stack
Syntax: POP
Description: POP "pops" the last value placed on the stack into the iram addr
specified. In other words, POP will load iram addr with the value of the Internal
RAM address pointed to by the current Stack Pointer. The stack pointer is then
decremented by 1.
PUSH
Operation: PUSH
Function: Push Value Onto Stack
Syntax: PUSH
Description: PUSH "pushes" the value of the specified iram addr onto the stack.
PUSH first increments the value of the Stack Pointer by 1, then takes the value
stored in iram addr and stores it in Internal RAM at the location pointed to by the
incremented Stack Pointer.
RET
Operation: RET
Function: Return From Subroutine
Syntax: RET
Description: RET is used to return from a subroutine previously called by LCALL

or ACALL. Program execution continues at the address that is calculated by
popping the topmost 2 bytes off the stack. The most-significant-byte is popped off
the stack first, followed by the least-significant-byte.
RETI
Operation: RETI
Function: Return From Interrupt
Syntax: RETI
Description: RETI is used to return from an interrupt service routine. RETI first
enables interrupts of equal and lower priorities to the interrupt that is terminating.
Program execution continues at the address that is calculated by popping the
topmost 2 bytes off the stack. The most-significant-byte is popped off the stack
first, followed by the least-significant-byte.

RETI functions identically to RET if it is executed outside of an interrupt service
routine.
RL
Operation: RL
Function: Rotate Accumulator Left
Syntax: RL A
Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7)
of the Accumulator is loaded into bit 0.
RLC
Operation: RLC
Function: Rotate Accumulator Left Through Carry
Syntax: RLC A
Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7)
of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is
loaded into bit 0 of the Accumulator. This function can be used to quickly multiply
a byte by 2.
RR
Operation: RR
Function: Rotate Accumulator Right
Syntax: RR A
Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit
0) of the Accumulator is loaded into bit 7.
RRC
Operation: RRC
Function: Rotate Accumulator Right Through Carry
Syntax: RRC A
Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit
0) of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is
loaded into bit 7. This function can be used to quickly divide a byte by 2.
SETB
Operation: SETB
Function: Set Bit
Syntax: SETB bit addr
Description: Sets the specified bit.
SJMP
Operation: SJMP
Function: Short Jump
Syntax: SJMP reladdr
Description: SJMP jumps unconditionally to the address specified reladdr. Reladdr
must be within -128 or +127 bytes of the instruction that follows the SJMP
instruction.
SUBB
Operation: SUBB
Function: Subtract from Accumulator With Borrow
Syntax: SUBB A,operand
Description: SUBB subtract the value of operand from the value of the
Accumulator, leaving the resulting value in the Accumulator. The value operand is
not affected.
SWAP
Operation: SWAP
Function: Swap Accumulator Nibbles
Syntax: SWAP A
Description: SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of the
Accumulator. This instruction is identical to executing "RR A" or "RL A" four
times.
II.6
Addressing Modes
An "addressing mode" refers to how you are addressing a given memory location. In
summary, the addressing modes are as follows, with an example of each:
Immediate Addressing MOV A,#20h
Direct Addressing MOV A,30h
Indirect Addressing MOV A,@R0
External Direct MOVX A,@DPTR
Code Indirect MOVC A,@A+DPTR

Each of these addressing modes provides important flexibility.
Immediate Addressing
Immediate addressing is so-named because the value to be stored in memory

immediately follows the operation code in memory. That is to say, the instruction
itself dictates what value will be stored in memory.
For example, the instruction:
MOV A,#20h
This instruction uses Immediate Addressing because the Accumulator will be loaded
with the value that immediately follows; in this case 20 (hexidecimal).
Immediate addressing is very fast since the value to be loaded is included in the
instruction. However, since the value to be loaded is fixed at compile-time it is not
very flexible.
Direct Addressing
Direct addressing is so-named because the value to be stored in memory is obtained

by directly retrieving it from another memory location. For example:
MOV A,30h
This instruction will read the data out of Internal RAM address 30 (hexidecimal) and
store it in the Accumulator.
Direct addressing is generally fast since, although the value to be loaded isnt
included in the instruction, it is quickly accessable since it is stored in the 8051s
Internal RAM. It is also much more flexible than Immediate Addressing since the
value to be loaded is whatever is found at the given address--which may be variable.
Also, it is important to note that when using direct addressing any instruction which
refers to an address between 00h and 7Fh is referring to Internal Memory. Any
instruction which refers to an address between 80h and FFh is referring to the SFR
control registers that control the 8051 microcontroller itself.
The obvious question that may arise is, "If direct addressing an address from 80h
through FFh refers to SFRs, how can I access the upper 128 bytes of Internal RAM
that are available on the 8052?" The answer is: You cant access them using direct
addressing. As stated, if you directly refer to an address of 80h through FFh you will
be referring to an SFR. However, you may access the 8052s upper 128 bytes of
RAM by using the next addressing mode, "indirect addressing."
Indirect Addressing
Indirect addressing is a very powerful addressing mode which in many cases

provides an exceptional level of flexibility. Indirect addressing is also the only way
to access the extra 128 bytes of Internal RAM found on an 8052.
Indirect addressing appears as follows:
MOV A,@R0
This instruction causes the 8051 to analyze the value of the R0 register. The 8051
will then load the accumulator with the value from Internal RAM which is found at
the address indicated by R0.
For example, lets say R0 holds the value 40h and Internal RAM address 40h holds
the value 67h. When the above instruction is executed the 8051 will check the value
of R0. Since R0 holds 40h the 8051 will get the value out of Internal RAM address
40h (which holds 67h) and store it in the Accumulator. Thus, the Accumulator ends
up holding 67h.
Indirect addressing always refers to Internal RAM; it never refers to an SFR. Thus,
in a prior example we mentioned that SFR 99h can be used to write a value to the
serial port. Thus one may think that the following would be a valid solution to write
the value 1 to the serial port:
MOV R0,#99h ;Load the address of the serial port

MOV @R0,#01h ;Send 01 to the serial port -- WRONG!!
This is not valid. Since indirect addressing always refers to Internal RAM these two
instructions would write the value 01h to Internal RAM address 99h on an 8052. On
an 8051 these two instructions would produce an undefined result since the 8051
only has 128 bytes of Internal RAM.
External Direct
External Memory is accessed using a suite of instructions which use what I call
"External Direct" addressing. I call it this because it appears to be direct addressing,
but it is used to access external memory rather than internal memory.
There are only two commands that use External Direct addressing mode:
MOVX A,@DPTR
MOVX @DPTR,A
As you can see, both commands utilize DPTR. In these instructions, DPTR must
first be loaded with the address of external memory that you wish to read or write.
Once DPTR holds the correct external memory address, the first command will
move the contents of that external memory address into the Accumulator. The
second command will do the opposite: it will allow you to write the value of the
Accumulator to the external memory address pointed to by DPTR.
External Indirect
External memory can also be accessed using a form of indirect addressing which I
call External Indirect addressing. This form of addressing is usually only used in
relatively small projects that have a very small amount of external RAM. An
example of this addressing mode is:
MOVX @R0,A
Once again, the value of R0 is first read and the value of the Accumulator is written
to that address in External RAM. Since the value of @R0 can only be 00h through
FFh the project would effectively be limited to 256 bytes of External RAM. There
are relatively simple hardware/software tricks that can be implemented to access
more than 256 bytes of memory using External Indirect addressing; however, it is
usually easier to use External Direct addressing if your project has more than 256
bytes of External RAM.
Programming Examples
Prog.1 Putting data into registers A, B, R0 and R2.
ORG 0000H
MOV A, #10H
MOV B, #20
MOV R0, #30H
MOV R2, #40
END
Prog.2 To Put 10 + 19 and put the result in R0 register. 25 - 16 and put the result in
R1 register, 14 * 7 and put the result in R2 register and15 / 3 AND put the result in
R3 register.
ORG 0000H
MOV A,#10H
ADD A, #19H
MOV R0,A
MOV A,#25H
SUBB A,#16H
MOV R1,A
MOV A,#14H
MOV B,#7H
MUL AB
MOV R2,A
MOV A,#15H
MOV B,#3H
DIV AB
MOV R3,A
END
Prog.3 To add 22H, 44H, 88H and store the result in location 50H.
ORG 0000H
INI: MOV 40H,#22H

MOV 41H,#44H
MOV 42H,#88H
MOV A,40H
ADD A,41H
ADD A,42H
MOV 50H,A
END
Prog.4 To set/reset flag bits in PSW register.

ORG 0000H
MOV A,#0F0H
ADD A,#21H ; CY bit is SET
CLR C ; CY bit is RESET
MOV A,#0FH
ADD A, #03H ; AC bit is SET
CLR AC ; AC bit is RESET
MOV A,#60H
ADD A,#21H ; OV bit is SET
CLR OV ; OV bit is RESET
MOV A,#70H ; P bit is SET
CLR P ; CLR P does not RESET P bit.
MOV A,#03H ; P bit is RESET.
END
Using debugger in Keil

1. First write any assembly program, save as <filename>.asm, add to the project
and compile it.
2. Now select Debug>Start/Stop Debug session or press Ctrl+F5 or you may

click on the tool shown in figure.

3. Your window will look like this…on the left side you will see the register status.
4. Now press F11(or you may click on the tool shown in figure) and see the change
in the registers as per the program. In this program values of accumulator will
change after the execution of instructions 7, 8 and 9 of the program.
Exercise:
1. Write an assembly program to toggle P1.0 with certain amount of delay.
2. Write an assembly program to toggle all the bits of P0 with delay.
3. Write an assembly program to get data from P0 and put its complement on P1.
4. Write an assembly program to add all the data present at 40h to 45h.
5. Write an assembly program to find the factorial 5 and to show it on a port.
6. Write an assembly program to set all the bits of P2 one by one with delay.
7. Write an assembly program to put 0 to 255 on P3 with certain delay.
8. Write an assembly program to multiply accumulator with the data of P1.
9. Write an assembly program to find greater of two no.s of two ports.
10.Write an assembly program to perform BCD addition.
II.7
8051 Programming in C
C Modifications
The Keil C compiler has made some modifications to an otherwise ANSI-compliant
implementation of the C programming language. These modifications were made
solely to facilitate the use of a higher-level language like C for writing programs on
micro controllers.
Variable Types
The Keil C compiler supports most C variable types and adds several of its own.
Standard Types
The evaluation version of the Keil C compiler supports the standard ANSI C
variable types, with the exception of the floating-point types. These types are
summarized below.
Type Bits Bytes Range
char 8 1 -128 to +127
unsigned char 8 1 0 to 255
enum 16 2 -32,768 to +32,767
short 16 2 -32,768 to +32,767
unsigned short 16 2 0 to 65,535
int 16 2 -32,768 to +32,767
unsigned int 16 2 0 to 65,535
long 32 4 -2,1e10 to+2,1e10
unsigned long 32 4 0 to 4,294,697,295
Keil Types
To support a micro controller and embedded systems applications, Keil added
several new types to their compiler. These are summarized in the table below.
Type Bits Bytes Range
bit 1 0 0 to 1
sbit 1 0 0 to 1
sfr 8 1 0 to 255
sf16 16 2 0 to 65,535
A Basic C Program
To send 0 to 255 on port 0.
void main()
{
unsigned char i;
while (1)
{
for (i = 0; i <= 255; i++)
P0=i;
}
#Program to toggle P1.0 pin with certain delay

void delay(int);
sbit mybit=P1^0;
void main()
{
while(1)
{
mybit=1;
delay(500);
mybit=0;
delay(500);
}
}
void delay(int del)
{
for(i=0;i<=125;i++)
for(j=0;j<=del;j++);
}
Exercise
Write a C program to set all the bits of P2 one by one with delay.
Write a C program to find greater of two no.s of two ports.
Write a C program to perform BCD addition.
Data Serialization Using C

Serializing data is way of sending a byte of data one bit at a time through a single
pin of microcontroller. There are two ways to transfer a byte of data serially:
1. Using the serial port. When using the serial port, the programmer has very
limited control over the sequence of data transfer.
2. The second method of serializing data is to transfer data one bit a time and
control the sequence of data and spaces in between them. In many new generations
of devices such as LCD, ADC, and ROM the serial versions are becoming popular
since they take less space on a printed circuit board.
#Program to send out the value 56H serially one bit at a time via P1.0. The
LSB should go first.
sbit mybit=P1^0;
sbit reg=B^0;
void main()
{
unsigned char conbyte=0x56;
unsigned char x;
B=conbyte;
for(x=0;x<8;x++)
{
mybit=reg;
B=B>>1;
}

}
Exercise
Write a C program to send out the value 56H serially one bit at a time via P1.0.
The MSB should go first.
#Program to bring out the value serially one bit at a time via P1.0. The LSB
should come first.
sbit mybit=P1^0;
sbit reg=B^7;
void main()
{
unsigned char x;
for(x=0;x<8;x++)
{
Reg=mybit;
B=B>>1;
}
}
II.8
I/O Port Programming
Pin Description of 8051
 P1, P2, and P3 have internal pull-up resisters.

– P1, P2, and P3 are not open drain.
 P0 has no internal pull-up resistors and does not connects to Vcc inside the
8051.
– P0 is open drain.
– Compare the figures of P1.X and P0.X.
 However, for a programmer, it is the same to program P0, P1, P2 and P3.
 All the ports upon RESET are configured as output.
 EA pin 31external access

– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the code is stored
externally.
– /PSEN ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
 /PSEN npin 29program store enable
– This is an output pin and is connected to the OE pin of the ROM.
 ALE pin 30 address latch enable
– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
 I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.
Minimum circuit connection of 8051

Crystal Connection of 8051

Power-On RESET Circuit
Vcc
10 uF 31
EA/VPP
30 pF 19 X1
11.0592 MHz
8.2 K
X2
18
30 pF
9 RST
C2
XTAL2
30pF
C1
XTAL1
30pF
GND

II.9
Timers
The 8051 comes equipped with two timers, both of which may be controlled, set,
read, and configured individually. The 8051 timers have three general functions: 1)
Keeping time and/or calculating the amount of time between events, 2) Counting the
events themselves, or 3) Generating baud rates for the serial port.
The three timer uses are distinct so we will talk about each of them separately. The
first two uses will be discussed in this chapter while the use of timers for baud rate
generation will be discussed in the chapter relating to serial ports.
How does a timer count?
How does a timer count? The answer to this question is very simple: A timer always
counts up. It doesnt matter whether the timer is being used as a timer, a counter, or a
baud rate generator: A timer is always incremented by the microcontroller.
Programming Tip: Some derivative chips actually allow the program

to configure whether the timers count up or down. However, since this
option only exists on some derivatives it is beyond the scope of this
tutorial which is aimed at the standard 8051. It is only mentioned here in
the event that you absolutely need a timer to count backwards, you will
know that you may be able to find an 8051-compatible microcontroller
that does it.
USING TIMERS TO MEASURE TIME
Obviously, one of the primary uses of timers is to measure time. We will discuss this
use of timers first and will subsequently discuss the use of timers to count events.
When a timer is used to measure time it is also called an "interval timer" since it is
measuring the time of the interval between two events.
How long does a timer take to count?
First, its worth mentioning that when a timer is in interval timer mode (as opposed to
event counter mode) and correctly configured, it will increment by 1 every machine
cycle. As you will recall from the previous chapter, a single machine cycle consists
of 12 crystal pulses. Thus a running timer will be incremented:
11,059,000 / 12 = 921,583

921,583 times per second. Unlike instructions--some of which require 1 machine
cycle, others 2, and others 4--the timers are consistent: They will always be
incremented once per machine cycle. Thus if a timer has counted from 0 to 50,000
you may calculate:
50,000 / 921,583 = .0542
.0542 seconds have passed. In plain English, about half of a tenth of a second, or
one-twentieth of a second.
Obviously its not very useful to know .0542 seconds have passed. If you want to
execute an event once per second youd have to wait for the timer to count from 0 to
50,000 18.45 times. How can you wait "half of a time?" You cant. So we come to
another important calculation.
Lets say we want to know how many times the timer will be incremented in .05
seconds. We can do simple multiplication:
.05 * 921,583 = 46,079.15.
This tells us that it will take .05 seconds (1/20th of a second) to count from 0 to
46,079. Actually, it will take it .049999837 seconds--so were off by .000000163
seconds--however, thats close enough for government work. Consider that if you
were building a watch based on the 8051 and made the above assumption your
watch would only gain about one second every 2 months. Again, I think thats
accurate enough for most applications--I wish my watch only gained one second
every two months!
Obviously, this is a little more useful. If you know it takes 1/20th of a second to
count from 0 to 46,079 and you want to execute some event every second you
simply wait for the timer to count from 0 to 46,079 twenty times; then you execute
your event, reset the timers, and wait for the timer to count up another 20 times. In
this manner you will effectively execute your event once per second, accurate to
within thousandths of a second.
Thus, we now have a system with which to measure time. All we need to review is
how to control the timers and initialize them to provide us with the information we
need.
Timer SFRs
As mentioned before, the 8051 has two timers which each function essentially the
same way. One timer is TIMER0 and the other is TIMER1. The two timers share
two SFRs (TMOD and TCON) which control the timers, and each timer also has two
SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).
Weve given SFRs names to make it easier to refer to them, but in reality an SFR has
a numeric address. It is often useful to know the numeric address that corresponds to
an SFR name. The SFRs relating to timers are:
SFR Name Description SFR Address

TH0 Timer 0 High Byte 8Ch
TL0 Timer 0 Low Byte 8Ah
TH1 Timer 1 High Byte 8Dh
TL1 Timer 1 Low Byte 8Bh
TCON Timer Control 88h
TMOD Timer Mode 89h
When you enter the name of an SFR into an assembler, it internally converts it to a
number. For example, the command:
MOV TH0,#25h
moves the value 25h into the TH0 SFR. However, since TH0 is the same as SFR
address 8Ch this command is equivalent to:
MOV 8Ch,#25h
Now, back to the timers. First, lets talk about Timer 0.
Timer 0 has two SFRs dedicated exclusively to itself: TH0 and TL0. Without
making things too complicated to start off with, you may just think of this as the
high and low byte of the timer. That is to say, when Timer 0 has a value of 0, both
TH0 and TL0 will contain 0. When Timer 0 has the value 1000, TH0 will hold the
high byte of the value (3 decimal) and TL0 will contain the low byte of the value
(232 decimal). Reviewing low/high byte notation, recall that you must multiply the
high byte by 256 and add the low byte to calculate the final value. That is to say:
TH0 * 256 + TL0 = 1000

3 * 256 + 232 = 1000
Timer 1 works the exact same way, but its SFRs are TH1 and TL1.

Since there are only two bytes devoted to the value of each timer it is apparent that
the maximum value a timer may have is 65,535. If a timer contains the value 65,535
and is subsequently incremented, it will reset--or overflow--back to 0.
The TMOD SFR
Lets first talk about our first control SFR: TMOD (Timer Mode). The TMOD SFR is
used to control the mode of operation of both timers. Each bit of the SFR gives the
microcontroller specific information concerning how to run a timer. The high four
bits (bits 4 through 7) relate to Timer 1 whereas the low four bits (bits 0 through 3)
perform the exact same functions, but for timer 0.
The individual bits of TMOD have the following functions:
TMOD (89h) SFR

Bit Name Explanation of Function Timer
When this bit is set the timer will only run
when INT1 (P3.3) is high. When this bit is clear
7 GATE1 1
the timer will run regardless of the state of
INT1.
When this bit is set the timer will count events
6 C/T1 on T1 (P3.5). When this bit is clear the timer 1
will be incremented every machine cycle.
5 T1M1 Timer mode bit (see below) 1
When this bit is set the timer will only run
when INT0 (P3.2) is high. When this bit is clear
3 GATE0 0
the timer will run regardless of the state of
INT0.
When this bit is set the timer will count events
2 C/T0 on T0 (P3.4). When this bit is clear the timer 0
will be incremented every machine cycle.
As you can see in the above chart, four bits (two for each timer) are used to specify a
mode of operation. The modes of operation are:
TxM1 TxM0 Timer Mode Description of Mode
0 0 0 13-bit Timer.
0 1 1 16-bit Timer
1 0 2 8-bit auto-reload
1 1 3 Split timer mode
13-bit Time Mode (mode 0)
Timer mode "0" is a 13-bit timer. This is a relic that was kept around in the 8051 to
maintain compatability with its predecesor, the 8048. Generally the 13-bit timer
mode is not used in new development.
When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is
incremented from 31, it will "reset" to 0 and increment THx. Thus, effectively, only
13 bits of the two timer bytes are being used: bits 0-4 of TLx and bits 0-7 of THx.
This also means, in essence, the timer can only contain 8192 values. If you set a 13-
bit timer to 0, it will overflow back to zero 8192 machine cycles later.
Again, there is very little reason to use this mode and it is only mentioned so you
wont be surprised if you ever end up analyzing archaeic code which has been passed
down through the generations (a generation in a programming shop is often on the
order of about 3 or 4 months).
Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It functions
just like 13-bit mode except that all 16 bits are used.
TLx is incremented from 0 to 255. When TLx is incremented from 255, it resets to 0
and causes THx to be incremented by 1. Since this is a full 16-bit timer, the timer
may contain up to 65536 distinct values. If you set a 16-bit timer to 0, it will
overflow back to 0 after 65,536 machine cycles.
Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask? Simple.
When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself.
Thus, TLx starts counting up. When TLx reaches 255 and is subsequently
incremented, instead of resetting to 0 (as in the case of modes 0 and 1), it will be
reset to the value stored in THx.
For example, lets say TH0 holds the value FDh and TL0 holds the value FEh. If we
were to watch the values of TH0 and TL0 for a few machine cycles this is what wed
see:

Machine Cycle TH0 Value TL0 Value
1 FDh FEh
2 FDh FFh
3 FDh FDh
4 FDh FEh
5 FDh FFh
6 FDh FDh
7 FDh FEh
As you can see, the value of TH0 never changed. In fact, when you use mode 2 you
almost always set THx to a known value and TLx is the SFR that is constantly
incremented.
Whats the benefit of auto-reload mode? Perhaps you want the timer to always have a
value from 200 to 255. If you use mode 0 or 1, youd have to check in code to see if
the timer had overflowed and, if so, reset the timer to 200. This takes precious
instructions of execution time to check the value and/or to reload it. When you use
mode 2 the microcontroller takes care of this for you. Once youve configured a timer
in mode 2 you dont have to worry about checking to see if the timer has overflowed
nor do you have to worry about resetting the value--the microcontroller hardware
will do it all for you.
The auto-reload mode is very commonly used for establishing a baud rate which we
will talk more about in the Serial Communications chapter.
Split Timer Mode (mode 3)
Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it

essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0 and
Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits
that are related to Timer 1 will now be tied to TH0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into
modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since
the bits that do that are now linked to TH0. The real timer 1, in this case, will be
incremented every machine cycle no matter what.
The only real use I can see of using split timer mode is if you need to have two
separate timers and, additionally, a baud rate generator. In such case you can use the
real Timer 1 as a baud rate generator and use TH0/TL0 as two separate timers.

The TCON SFR
Finally, theres one more SFR that controls the two timers and provides valuable
information about them. The TCON SFR has the following structure:
TCON (88h) SFR

Bit
Bit Name Explanation of Function Timer
Address
Timer 1 Overflow. This bit is set by the
7 TF1 8Fh 1
microcontroller when Timer 1 overflows.
Timer 1 Run. When this bit is set Timer 1 is
6 TR1 8Eh 1
turned on. When this bit is clear Timer 1 is off.
Timer 0 Overflow. This bit is set by the
5 TF0 8Dh 0
microcontroller when Timer 0 overflows.
Timer 0 Run. When this bit is set Timer 0 is
4 TR0 8Ch 0
turned on. When this bit is clear Timer 0 is off.
As you may notice, weve only defined 4 of the 8 bits. Thats because the other 4 bits
of the SFR dont have anything to do with timers--they have to do with Interrupts and
they will be discussed in the chapter that addresses interrupts.
A new piece of information in this chart is the column "bit address." This is because
this SFR is "bit-addressable." What does this mean? It means if you want to set the
bit TF1--which is the highest bit of TCON--you could execute the command:
MOV TCON, #80h
... or, since the SFR is bit-addressable, you could just execute the command:
SETB TF1
This has the benefit of setting the high bit of TCON without changing the value of
any of the other bits of the SFR. Usually when you start or stop a timer you dont
want to modify the other values in TCON, so you take advantage of the fact that the
SFR is bit-addressable.
Initializing a Timer
Now that weve discussed the timer-related SFRs we are ready to write code that will
initialize the timer and start it running.

As youll recall, we first must decide what mode we want the timer to be in. In this
case we want a 16-bit timer that runs continuously; that is to say, it is not dependent
on any external pins.
We must first initialize the TMOD SFR. Since we are working with timer 0 we will
be using the lowest 4 bits of TMOD. The first two bits, GATE0 and C/T0 are both 0
since we want the timer to be independent of the external pins. 16-bit mode is timer
mode 1 so we must clear T0M1 and set T0M0. Effectively, the only bit we want to
turn on is bit 0 of TMOD. Thus to initialize the timer we execute the instruction:
MOV TMOD,#01h
Timer 0 is now in 16-bit timer mode. However, the timer is not running. To start the
timer running we must set the TR0 bit We can do that by executing the instruction:
SETB TR0
Upon executing these two instructions timer 0 will immediately begin counting,
being incremented once every machine cycle (every 12 crystal pulses).
Reading the Timer
There are two common ways of reading the value of a 16-bit timer; which you use
depends on your specific application. You may either read the actual value of the
timer as a 16-bit number, or you may simply detect when the timer has overflowed.
Reading the value of a Timer
If your timer is in an 8-bit mode--that is, either 8-bit AutoReload mode or in split
timer mode--then reading the value of the timer is simple. You simply read the 1-
byte value of the timer and youre done.
However, if youre dealing with a 13-bit or 16-bit timer the chore is a little more
complicated. Consider what would happen if you read the low byte of the timer as
255, then read the high byte of the timer as 15. In this case, what actually happened
was that the timer value was 14/255 (high byte 14, low byte 255) but you read
15/255. Why? Because you read the low byte as 255. But when you executed the
next instruction a small amount of time passed--but enough for the timer to
increment again at which time the value rolled over from 14/255 to 15/0. But in the
process youve read the timer as being 15/255. Obviously theres a problem there.
The solution? Its not too tricky, really. You read the high byte of the timer, then read
the low byte, then read the high byte again. If the high byte read the second time is
not the same as the high byte read the first time you repeat the cycle. In code, this
would appear as:
REPEAT: MOV A,TH0

MOV R0,TL0
CJNE A,TH0,REPEAT
...
In this case, we load the accumulator with the high byte of Timer 0. We then load
R0 with the low byte of Timer 0. Finally, we check to see if the high byte we read
out of Timer 0--which is now stored in the Accumulator--is the same as the current
Timer 0 high byte. If it isnt it means weve just "rolled over" and must reread the
timers value--which we do by going back to REPEAT. When the loop exits we will
have the low byte of the timer in R0 and the high byte in the Accumulator.
Another much simpler alternative is to simply turn off the timer run bit (i.e. CLR
TR0), read the timer value, and then turn on the timer run bit (i.e. SETB TR0). In
that case, the timer isnt running so no special tricks are necessary. Of course, this
implies that your timer will be stopped for a few machine cycles. Whether or not this
is tolerable depends on your specific application.
Detecting Timer Overflow
Often it is necessary to just know that the timer has reset to 0. That is to say, you are
not particularly interest in the value of the timer but rather you are interested in
knowing when the timer has overflowed back to 0.
Whenever a timer overflows from its highest value back to 0, the microcontroller
automatically sets the TFx bit in the TCON register. This is useful since rather than
checking the exact value of the timer you can just check if the TFx bit is set. If TF0
is set it means that timer 0 has overflowed; if TF1 is set it means that timer 1 has
overflowed.
We can use this approach to cause the program to execute a fixed delay. As youll
recall, we calculated earlier that it takes the 8051 1/20th of a second to count from 0
to 46,079. However, the TFx flag is set when the timer overflows back to 0. Thus, if
we want to use the TFx flag to indicate when 1/20th of a second has passed we must
set the timer initially to 65536 less 46079, or 19,457. If we set the timer to 19,457,
1/20th of a second later the timer will overflow. Thus we come up with the
following code to execute a pause of 1/20th of a second:
MOV TH0,#76;High byte of 19,457 (76 * 256 = 19,456)

MOV TL0,#01;Low byte of 19,457 (19,456 + 1 = 19,457)
MOV TMOD,#01;Put Timer 0 in 16-bit mode
SETB TR0;Make Timer 0 start counting
JNB TF0,$;If TF0 is not set, jump back to this same instruction
In the above code the first two lines initialize the Timer 0 starting value to 19,457.
The next two instructions configure timer 0 and turn it on. Finally, the last
instruction JNB TF0,$, reads "Jump, if TF0 is not set, back to this same instruction."
The "$" operand means, in most assemblers, the address of the current instruction.
Thus as long as the timer has not overflowed and the TF0 bit has not been set the
program will keep executing this same instruction. After 1/20th of a second timer 0
will overflow, set the TF0 bit, and program execution will then break out of the loop.
Timing the length of events
The 8051 provides another cool toy that can be used to time the length of events.
For example, let's say we're trying to save electricity in the office and we're
interested in how long a light is turned on each day. When the light is turned on, we
want to measure time. When the light is turned off we don't. One option would be to
connect the lightswitch to one of the pins, constantly read the pin, and turn the timer
on or off based on the state of that pin. While this would work fine, the 8051
provides us with an easier method of accomplishing this.
Looking again at the TMOD SFR, there is a bit called GATE0. So far we've always
cleared this bit because we wanted the timer to run regardless of the state of the
external pins. However, now it would be nice if an external pin could control
whether the timer was running or not. It can. All we need to do is connect the
lightswitch to pin INT0 (P3.2) on the 8051 and set the bit GATE0. When GATE0 is
set Timer 0 will only run if P3.2 is high. When P3.2 is low (i.e., the lightswitch is
off) the timer will automatically be stopped.
Thus, with no control code whatsoever, the external pin P3.2 can control whether or
not our timer is running or not.
USING TIMERS AS EVENT COUNTERS
We've discussed how a timer can be used for the obvious purpose of keeping track
of time. However, the 8051 also allows us to use the timers to count events.
How can this be useful? Let's say you had a sensor placed across a road that would
send a pulse every time a car passed over it. This could be used to determine the
volume of traffic on the road. We could attach this sensor to one of the 8051's I/O
lines and constantly monitor it, detecting when it pulsed high and then incrementing
our counter when it went back to a low state. This is not terribly difficult, but
requires some code. Let's say we hooked the sensor to P1.0; the code to count cars
passing would look something like this:
JNB P1.0,$ ;If a car hasn't raised the signal, keep waiting
;The line is high which means the car is on the sensor right
JB P1.0,$
now
INC COUNTER ;The car has passed completely, so we count it
As you can see, it's only three lines of code. But what if you need to be doing other
processing at the same time? You can't be stuck in the JNB P1.0,$ loop waiting for a
car to pass if you need to be doing other things. Of course, there are ways to get
around even this limitation but the code quickly becomes big, complex, and ugly.
Luckily, since the 8051 provides us with a way to use the timers to count events we
don't have to bother with it. It is actually painfully easy. We only have to configure
one additional bit.
Let's say we want to use Timer 0 to count the number of cars that pass. If you look
back to the bit table for the TCON SFR you will there is a bit called "C/T0"--it's bit
2 (TCON.2). Reviewing the explanation of the bit we see that if the bit is clear then
timer 0 will be incremented every machine cycle. This is what we've already used to
measure time. However, if we set C/T0 timer 0 will monitor the P3.4 line. Instead of
being incremented every machine cycle, timer 0 will count events on the P3.4 line.
So in our case we simply connect our sensor to P3.4 and let the 8051 do the work.
Then, when we want to know how many cars have passed, we just read the value of
timer 0--the value of timer 0 will be the number of cars that have passed.
So what exactly is an event? What does timer 0 actually "count?" Speaking at the
electrical level, the 8051 counts 1-0 transitions on the P3.4 line. This means that
when a car first runs over our sensor it will raise the input to a high ("1") condition.
At that point the 8051 will not count anything since this is a 0-1 transition. However,
when the car has passed the sensor will fall back to a low ("0") state. This is a 1-0
transition and at that instant the counter will be incremented by 1.
It is important to note that the 8051 checks the P3.4 line each instruction cycle (12
clock cycles). This means that if P3.4 is low, goes high, and goes back low in 6
clock cycles it will probably not be detected by the 8051. This also means the 8051
event counter is only capable of counting events that occur at a maximum of 1/24th
the rate of the crystal frequency. That is to say, if the crystal frequency is 12.000
Mhz it can count a maximum of 500,000 events per second (12.000 Mhz * 1/24 =
500,000). If the event being counted occurs more than 500,000 times per second it
will not be able to be accurately counted by the 8051.

Programming Timers in C
#C program to toggle all the bits of P1 continuously with some delay in

between. Use timer 0, 16-bit mode to generate the delay.
void Tdelay();
void main()
{
while(1)
{
P1=0x55;
Tdelay();
P1=0xAA;
Tdelay();
}
}
void Tdelay()
{
TMOD=0x01;
TL0=0x00;
TH0=0x35;
TR0=1;
while(TF0==0);
TR0=0;
TF0=0;
}
FFFFH-3500H=CAFFH=51967+1=51968
51968x1.085us=56.384 ms is the approximate delay.
#C program to toggle only bit P1.5 continuously every 50ms using Timer0,
mode1(16bit) to create delay.
void Tdelay();
sbit mybit=P1^5;
void main()
{
while(1)
{
mybit=~mybit;
Tdelay();
}
}
void Tdelay()
{
TMOD=0x01;
TL0=0xFD;
TH0=0x4B;
TR0=1;
while(TF0==0);
TR0=0;
TF0=0;
Exercise:
1. Write a C program to toggle all bits of P2 continuously every 500ms. Use
timer 1, mode 1 to create delay.
2. Write a C program to toggle pin1.5 continuously every 250ms. Use timer 0,
mode 2 (8 bit auto reload) to create delay.
3. Write a C program to create a square wave of 2500Hz at P2.7. Use timer 1,
mode 2.
Programming Timers as Counters

#External pulses are given at P3.5. C program for counter 1 in mode 2 to
count up and display the state of TL1 count on P1.
sbit T1=P3^5;
void main()
{
T1=1;
TMOD=0x60;
TH1=0;
while(1)
{
do
{
TR1=1;
P1=TL1;
}while(TF1==0);
TR1=0;
TF1=0;
}
}

Exercise
1. Write a C program to count the pulses at counter 0 and toggle P3.1 after every
10 pulses received.
2. Write a C program to count pulses at counter 1 and to display the complement
of count.
3. Write a C program which first reads the no. of counts from counter 1 and then
blinks P2.1 for the no. of counts.
II.10
Interrupts
As the name implies, an interrupt is some event which interrupts normal program
execution.
As stated earlier, program flow is always sequential, being altered only by those
instructions which expressly cause program flow to deviate in some way. However,
interrupts give us a mechanism to "put on hold" the normal program flow, execute a
subroutine, and then resume normal program flow as if we had never left it. This
subroutine, called an interrupt handler, is only executed when a certain event
(interrupt) occurs. The event may be one of the timers "overflowing," receiving a
character via the serial port, transmitting a character via the serial port, or one of two
"external events." The 8051 may be configured so that when any of these events
occur the main program is temporarily suspended and control passed to a special
section of code which presumably would execute some function related to the event
that occured. Once complete, control would be returned to the original program. The
main program never even knows it was interrupted.
The ability to interrupt normal program execution when certain events occur makes
it much easier and much more efficient to handle certain conditions. If it were not
for interrupts we would have to manually check in our main program whether the
timers had overflown, whether we had received another character via the serial port,
or if some external event had occured. Besides making the main program ugly and
hard to read, such a situation would make our program inefficient since wed be
burning precious "instruction cycles" checking for events that usually dont happen.
For example, lets say we have a large 16k program executing many subroutines
performing many tasks. Lets also suppose that we want our program to

automatically toggle the P3.0 port every time timer 0 overflows. The code to do this
isnt too difficult:
JNB TF0,SKIP_TOGGLE
CPL P3.0
CLR TF0
SKIP_TOGGLE: ...
Since the TF0 flag is set whenever timer 0 overflows, the above code will toggle
P3.0 every time timer 0 overflows. This accomplishes what we want, but is
inefficient. The JNB instruction consumes 2 instruction cycles to determine that the
flag is not set and jump over the unnecessary code. In the event that timer 0
overflows, the CPL and CLR instruction require 2 instruction cycles to execute. To
make the math easy, lets say the rest of the code in the program requires 98
instruction cycles. Thus, in total, our code consumes 100 instruction cycles (98
instruction cycles plus the 2 that are executed every iteration to determine whether
or not timer 0 has overflowed). If were in 16-bit timer mode, timer 0 will overflow
every 65,536 machine cycles. In that time we would have performed 655 JNB tests
for a total of 1310 instruction cycles, plus another 2 instruction cycles to perform the
code. So to achieve our goal weve spent 1312 instruction cycles. So 2.002% of our
time is being spent just checking when to toggle P3.0. And our code is ugly because
we have to make that check every iteration of our main program loop.
Luckily, this isnt necessary. Interrupts let us forget about checking for the condition.
The microcontroller itself will check for the condition automatically and when the
condition is met will jump to a subroutine (called an interrupt handler), execute the
code, then return. In this case, our subroutine would be nothing more than:
CPL P3.0
RETI
First, youll notice the CLR TF0 command has disappeared. Thats because when the
8051 executes our "timer 0 interrupt routine," it automatically clears the TF0 flag.
Youll also notice that instead of a normal RET instruction we have a RETI
instruction. The RETI instruction does the same thing as a RET instruction, but tells
the 8051 that an interrupt routine has finished. You must always end your interrupt
handlers with RETI.
Thus, every 65536 instruction cycles we execute the CPL instruction and the RETI
instruction. Those two instructions together require 3 instruction cycles, and weve
accomplished the same goal as the first example that required 1312 instruction
cycles. As far as the toggling of P3.0 goes, our code is 437 times more efficient! Not
to mention its much easier to read and understand because we dont have to
remember to always check for the timer 0 flag in our main program. We just setup
the interrupt and forget about it, secure in the knowledge that the 8051 will execute
our code whenever its necessary.
The same idea applies to receiving data via the serial port. One way to do it is to
continuously check the status of the RI flag in an endless loop. Or we could check
the RI flag as part of a larger program loop. However, in the latter case we run the
risk of missing characters--what happens if a character is received right after we do
the check, the rest of our program executes, and before we even check RI a second
character has come in. We will lose the first character. With interrupts, the 8051 will
put the main program "on hold" and call our special routine to handle the reception
of a character. Thus, we neither have to put an ugly check in our main code nor will
we lose characters.
What Events Can Trigger Interrupts, and where do they go?
We can configure the 8051 so that any of the following events will cause an
interrupt:
• Timer 0 Overflow.
• Timer 1 Overflow.
• Reception/Transmission of Serial Character.
• External Event 0.
• External Event 1.
In other words, we can configure the 8051 so that when Timer 0 Overflows or when
a character is sent/received, the appropriate interrupt handler routines are called.
Obviously we need to be able to distinguish between various interrupts and

executing different code depending on what interrupt was triggered. This is
accomplished by jumping to a fixed address when a given interrupt occurs.
Interrupt Flag Interrupt Handler Address

External 0 IE0 0003h
Timer 0 TF0 000Bh
External 1 IE1 0013h
Timer 1 TF1 001Bh
Serial RI/TI 0023h
By consulting the above chart we see that whenever Timer 0 overflows (i.e., the TF0
bit is set), the main program will be temporarily suspended and control will jump to

000BH. It is assumed that we have code at address 000BH that handles the situation
of Timer 0 overflowing.
Setting Up Interrupts
By default at powerup, all interrupts are disabled. This means that even if, for
example, the TF0 bit is set, the 8051 will not execute the interrupt. Your program
must specifically tell the 8051 that it wishes to enable interrupts and specifically
which interrupts it wishes to enable.
Your program may enable and disable interrupts by modifying the IE SFR (A8h):
Bit Name Bit Address Explanation of Function

7 EA AFh Global Interrupt Enable/Disable
6 - AEh Undefined
5 - ADh Undefined
4 ES ACh Enable Serial Interrupt
3 ET1 ABh Enable Timer 1 Interrupt
2 EX1 AAh Enable External 1 Interrupt
1 ET0 A9h Enable Timer 0 Interrupt
0 EX0 A8h Enable External 0 Interrupt
As you can see, each of the 8051s interrupts has its own bit in the IE SFR. You
enable a given interrupt by setting the corresponding bit. For example, if you wish to
enable Timer 1 Interrupt, you would execute either:
MOV IE,#08h
or
SETB ET1
Both of the above instructions set bit 3 of IE, thus enabling Timer 1 Interrupt. Once
Timer 1 Interrupt is enabled, whenever the TF1 bit is set, the 8051 will automatically
put "on hold" the main program and execute the Timer 1 Interrupt Handler at
address 001Bh.
However, before Timer 1 Interrupt (or any other interrupt) is truly enabled, you must
also set bit 7 of IE. Bit 7, the Global Interupt Enable/Disable, enables or disables all
interrupts simultaneously. That is to say, if bit 7 is cleared then no interrupts will
occur, even if all the other bits of IE are set. Setting bit 7 will enable all the
interrupts that have been selected by setting other bits in IE. This is useful in
program execution if you have time-critical code that needs to execute. In this case,
you may need the code to execute from start to finish without any interrupt getting in
the way. To accomplish this you can simply clear bit 7 of IE (CLR EA) and then set
it after your time-criticial code is done.
So, to sum up what has been stated in this section, to enable the Timer 1 Interrupt
the most common approach is to execute the following two instructions:
SETB ET1
SETB EA
Thereafter, the Timer 1 Interrupt Handler at 01Bh will automatically be called
whenever the TF1 bit is set (upon Timer 1 overflow).
Polling Sequence
The 8051 automatically evaluates whether an interrupt should occur after every
instruction. When checking for interrupt conditions, it checks them in the following
order:
• External 0 Interrupt
• Timer 0 Interrupt
• External 1 Interrupt
• Timer 1 Interrupt
• Serial Interrupt
This means that if a Serial Interrupt occurs at the exact same instant that an External
0 Interrupt occurs, the External 0 Interrupt will be executed first and the Serial
Interrupt will be executed once the External 0 Interrupt has completed.
Interrupt Priorities
The 8051 offers two levels of interrupt priority: high and low. By using interrupt
priorities you may assign higher priority to certain interrupt conditions.
For example, you may have enabled Timer 1 Interrupt which is automatically called
every time Timer 1 overflows. Additionally, you may have enabled the Serial
Interrupt which is called every time a character is received via the serial port.
However, you may consider that receiving a character is much more important than
the timer interrupt. In this case, if Timer 1 Interrupt is already executing you may
wish that the serial interrupt itself interrupts the Timer 1 Interrupt. When the serial
interrupt is complete, control passes back to Timer 1 Interrupt and finally back to the
main program. You may accomplish this by assigning a high priority to the Serial
Interrupt and a low priority to the Timer 1 Interrupt.

Interrupt priorities are controlled by the IP SFR (B8h). The IP SFR has the
following format:
Bit Name Bit Address Explanation of Function

7 - - Undefined
6 - - Undefined
5 - - Undefined
4 PS BCh Serial Interrupt Priority
3 PT1 BBh Timer 1 Interrupt Priority
2 PX1 BAh External 1 Interrupt Priority
1 PT0 B9h Timer 0 Interrupt Priority
0 PX0 B8h External 0 Interrupt Priority
When considering interrupt priorities, the following rules apply:
• Nothing can interrupt a high-priority interrupt--not even another high

priority interrupt.
• A high-priority interrupt may interrupt a low-priority interrupt.
• A low-priority interrupt may only occur if no other interrupt is already
executing.
• If two interrupts occur at the same time, the interrupt with higher
priority will execute first. If both interrupts are of the same priority the
interrupt which is serviced first by polling sequence will be executed first.
What Happens When an Interrupt Occurs?
When an interrupt is triggered, the following actions are taken automatically by the
microcontroller:
• The current Program Counter is saved on the stack, low-byte first.

• Interrupts of the same and lower priority are blocked.
• In the case of Timer and External interrupts, the corresponding interrupt
flag is cleared.
• Program execution transfers to the corresponding interrupt handler
vector address.
• The Interrupt Handler Routine executes.
Take special note of the third step: If the interrupt being handled is a Timer or
External interrupt, the microcontroller automatically clears the interrupt flag before

passing control to your interrupt handler routine. This means it is not necessary that
you clear the bit in your code.
What Happens When an Interrupt Ends?
An interrupt ends when your program executes the RETI (Return from Interrupt)
instruction. When the RETI instruction is executed the following actions are taken
by the microcontroller:
• Two bytes are popped off the stack into the Program Counter to restore
normal program execution.
• Interrupt status is restored to its pre-interrupt status.
Serial Interrupts
Serial Interrupts are slightly different than the rest of the interrupts. This is due to the
fact that there are two interrupt flags: RI and TI. If either flag is set, a serial interrupt
is triggered. As you will recall from the section on the serial port, the RI bit is set
when a byte is received by the serial port and the TI bit is set when a byte has been
sent.
This means that when your serial interrupt is executed, it may have been triggered
because the RI flag was set or because the TI flag was set--or because both flags
were set. Thus, your routine must check the status of these flags to determine what
action is appropriate. Also, since the 8051 does not automatically clear the RI and TI
flags you must clear these bits in your interrupt handler.
A brief code example is in order:
JNB
INT_SERIAL: ;If the RI flag is not set, we jump to check TI
RI,CHECK_TI
;If we got to this line, its because the RI bit
MOV A,SBUF
*was* set
CLR RI ;Clear the RI bit after weve processed it
;If the TI flag is not set, we jump to the exit
CHECK_TI: JNB TI,EXIT_INT
point
;Clear the TI bit before we send another
CLR TI
character
MOV SBUF,#A ;Send another character to the serial port
EXIT_INT: RETI

As you can see, our code checks the status of both interrupts flags. If both flags were
set, both sections of code will be executed. Also note that each section of code clears
its corresponding interrupt flag. If you forget to clear the interrupt bits, the serial
interrupt will be executed over and over until you clear the bit. Thus it is very
important that you always clear the interrupt flags in a serial interrupt.
Important Interrupt Consideration: Register Protection
One very important rule applies to all interrupt handlers: Interrupts must leave the
processor in the same state as it was in when the interrupt initiated.
Remember, the idea behind interrupts is that the main program isnt aware that they
are executing in the "background." However, consider the following code:
CLR C ;Clear carry

MOV A,#25h ;Load the accumulator with 25h
ADDC A,#10h ;Add 10h, with carry
After the above three instructions are executed, the accumulator will contain a value
of 35h.
But what would happen if right after the MOV instruction an interrupt occured.
During this interrupt, the carry bit was set and the value of the accumulator was
changed to 40h. When the interrupt finished and control was passed back to the main
program, the ADDC would add 10h to 40h, and additionally add an additional 1h
because the carry bit is set. In this case, the accumulator will contain the value 51h at
the end of execution.
In this case, the main program has seemingly calculated the wrong answer. How can
25h + 10h yield 51h as a result? It doesnt make sense. A programmer that was
unfamiliar with interrupts would be convinced that the microcontroller was damaged
in some way, provoking problems with mathematical calculations.
What has happened, in reality, is the interrupt did not protect the registers it used.
Restated: An interrupt must leave the processor in the same state as it was in when
the interrupt initiated.
What does this mean? It means if your interrupt uses the accumulator, it must insure
that the value of the accumulator is the same at the end of the interrupt as it was at
the beginning. This is generally accomplished with a PUSH and POP sequence. For
example:

PUSH ACC
PUSH PSW
MOV A,#0FFh
ADD A,#02h
POP PSW
POP ACC
The guts of the interrupt is the MOV instruction and the ADD instruction. However,
these two instructions modify the Accumulator (the MOV instruction) and also
modify the value of the carry bit (the ADD instruction will cause the carry bit to be
set). Since an interrupt routine must guarantee that the registers remain unchanged
by the routine, the routine pushes the original values onto the stack using the PUSH
instruction. It is then free to use the registers it protected to its hearts content. Once
the interrupt has finished its task, it pops the original values back into the registers.
When the interrupt exits, the main program will never know the difference because
the registers are exactly the same as they were before the interrupt executed.
In general, your interrupt routine must protect the following registers:
• PSW
• DPTR (DPH/DPL)
• PSW
• ACC
• B
• Registers R0-R7
Remember that PSW consists of many individual bits that are set by various 8051
instructions. Unless you are absolutely sure of what you are doing and have a
complete understanding of what instructions set what bits, it is generally a good idea
to always protect PSW by pushing and popping it off the stack at the beginning and
end of your interrupts.
Note also that most assemblers (in fact, ALL assemblers that I know of) will not
allow you to execute the instruction:
PUSH R0
This is due to the fact that depending on which register bank is selected, R0 may
refer to either internal ram address 00h, 08h, 10h, or 18h. R0, in and of itself, is not a
valid memory address that the PUSH and POP instructions can use.
Thus, if you are using any "R" register in your interrupt routine, you will have to
push that registers absolute address onto the stack instead of just saying PUSH R0.
For example, instead of PUSH R0 you would execute:
PUSH 00h
Of course, this only works if youve selected the default register set. If you are using
an alternate register set, you must PUSH the address which corresponds to the
register you are using.
Common Problems with Interrupts
Interrupts are a very powerful tool available to the 8051 developer, but when used
incorrectly they can be a source of a huge number of debugging hours. Errors in
interrupt routines are often very difficult to diagnose and correct.
If you are using interrupts and your program is crashing or does not seem to be
performing as you would expect, always review the following interrupt-related
issues:
• Register Protection: Make sure you are protecting all your registers, as
explained above. If you forget to protect a register that your main program is
using, very strange results may occur. In our example above we saw how
failure to protect registers caused the main program to apparently calculate
that 25h + 10h = 51h. If you witness problems with registers changing values
unexpectedly or operations producing "incorrect" values, it is very likely that
you've forgotten to protect registers. ALWAYS PROTECT YOUR
REGISTERS.
• Forgetting to restore protected values: Another common error is to
push registers onto the stack to protect them, and then forget to pop them off
the stack before exiting the interrupt. For example, you may push ACC, B,
and PSW onto the stack in order to protect them and subsequently pop only
ACC and PSW off the stack before exiting. In this case, since you forgot to
restore the value of "B", an extra value remains on the stack. When you
execute the RETI instruction the 8051 will use that value as the return
address instead of the correct value. In this case, your program will almost
certainly crash. ALWAYS MAKE SURE YOU POP THE SAME
NUMBER OF VALUES OFF THE STACK AS YOU PUSHED ONTO
IT.
• Using RET instead of RETI: Remember that interrupts are always
terminated with the RETI instruction. It is easy to inadvertently use the RET
instruction instead. However, the RET instruction will not end your
interrupt. Usually, using a RET instead of a RETI will cause the illusion of
your main program running normally, but your interrupt will only be
executed once. If it appears that your interrupt mysteriously stops executing,
verify that you are exiting with RETI.

Interrupt programming in C
8051 C interrupt numbers
Interrupt Name Numbers used by 8051 C
External Interrupt 0 INT0 0
Timer Interrupt 0 TF0 1
External Interrupt 1 INT1 2
Timer Interrupt 1 TF1 3
Serial Communication RI,TI 4
Timer 2(8052 only) TF2 5
#Program that continuously gets a single bit of data from P1.7 and sends it
to P1.0 while simultaneously creating a square wave of 200us period on pin
P2.5. Use timer 0 to create square wave.
Half period=100us
100/1.085=92 and TH0=256-92=164 or A4H
sbit SW=P1^7;
sbit IND=P1^0;
sbit Wave=P2^5;
void timer0() interrupt 1
{
Wave=~Wave;
}
void main()
{
SW=1;
TMOD=0x02;
TH0=0xA4;
IE=0x82;
while(1)
{
IND=SW;
}
}
Exercise
1. Write a C program to toggle all the bits of P1 and toggling should stop
whenever some interrupt comes at INT0.
2. Write a C program show 0 to 255 at P0…when ever an external switch is
pressed. Numbering should be reversed i. e. 255 to 0.
3. Write a C program to put a sequence 1, 2, 4, 8…at P0 simultaneously 1,3,
7, 15, 31… at P1 with delay of 500ms. Use timer 0, mode 1.
4. Write a C program to display the number on certain port for which the
controller was interrupted externally at INT1.
5. Write a C program to start P0 counting from 0 to 255 whenever first
external interrupt comes. And then P1 whenever second comes.
II.11
Serial Communication in 8051
One of the 8051s many powerful features is its integrated UART, otherwise known
as a serial port. The fact that the 8051 has an integrated serial port means that you
may very easily read and write values to the serial port. If it were not for the
integrated serial port, writing a byte to a serial line would be a rather tedious process
requring turning on and off one of the I/O lines in rapid succession to properly
"clock out" each individual bit, including start bits, stop bits, and parity bits.
However, we do not have to do this. Instead, we simply need to configure the serial
ports operation mode and baud rate. Once configured, all we have to do is write to
an SFR to write a value to the serial port or read the same SFR to read a value from
the serial port. The 8051 will automatically let us know when it has finished sending
the character we wrote and will also let us know whenever it has received a byte so
that we can process it. We do not have to worry about transmission at the bit level--
which saves us quite a bit of coding and processing time.
Setting the Serial Port Mode
The first thing we must do when using the 8051s integrated serial port is, obviously,
configure it. This lets us tell the 8051 how many data bits we want, the baud rate we
will be using, and how the baud rate will be determined.
First, lets present the "Serial Control" (SCON) SFR and define what each bit of the
SFR represents:
Bit Name Bit Explanation of Function

Addres
7 SM0 9Fh Serial port mode bit 0
6 SM1 9Eh Serial port mode bit 1.
Mutliprocessor Communications Enable (explained
5 SM2 9Dh
later)
Receiver Enable. This bit must be set in order to receive
4 REN 9Ch
characters.
3 TB8 9Bh Transmit bit 8. The 9th bit to transmit in mode 2 and 3.
2 RB8 9Ah Receive bit 8. The 9th bit received in mode 2 and 3.
Transmit Flag. Set when a byte has been completely
1 TI 99h
transmitted.
Receive Flag. Set when a byte has been completely
0 RI 98h
received.
Additionally, it is necessary to define the function of SM0 and SM1 by an additional

table:
SM0 SM1 Serial Mode Explanation Baud Rate

0 0 0 8-bit Shift Register Oscillator / 12
0 1 1 8-bit UART Set by Timer 1 (*)
1 0 2 9-bit UART Oscillator / 64 (*)
1 1 3 9-bit UART Set by Timer 1 (*)
(*) Note: The baud rate indicated in this table is doubled if PCON.7 (SMOD) is set.
The SCON SFR allows us to configure the Serial Port. Thus, well go through each
bit and review its function.
The first four bits (bits 4 through 7) are configuration bits.
Bits SM0 and SM1 let us set the serial mode to a value between 0 and 3, inclusive.
The four modes are defined in the chart immediately above. As you can see,
selecting the Serial Mode selects the mode of operation (8-bit/9-bit, UART or Shift
Register) and also determines how the baud rate will be calculated. In modes 0 and 2
the baud rate is fixed based on the oscillators frequency. In modes 1 and 3 the baud
rate is variable based on how often Timer 1 overflows. Well talk more about the
various Serial Modes in a moment.

The next bit, SM2, is a flag for "Multiprocessor communication." Generally,
whenever a byte has been received the 8051 will set the "RI" (Receive Interrupt)
flag. This lets the program know that a byte has been received and that it needs to be
processed. However, when SM2 is set the "RI" flag will only be triggered if the 9th
bit received was a "1". That is to say, if SM2 is set and a byte is received whose 9th
bit is clear, the RI flag will never be set. This can be useful in certain advanced serial
applications. For now it is safe to say that you will almost always want to clear this
bit so that the flag is set upon reception of any character.
The next bit, REN, is "Receiver Enable." This bit is very straightforward: If you
want to receive data via the serial port, set this bit. You will almost always want to
set this bit.
The last four bits (bits 0 through 3) are operational bits. They are used when actually
sending and receiving data--they are not used to configure the serial port.
The TB8 bit is used in modes 2 and 3. In modes 2 and 3, a total of nine data bits are
transmitted. The first 8 data bits are the 8 bits of the main value, and the ninth bit is
taken from TB8. If TB8 is set and a value is written to the serial port, the datas bits
will be written to the serial line followed by a "set" ninth bit. If TB8 is clear the
ninth bit will be "clear."
The RB8 also operates in modes 2 and 3 and functions essentially the same way as
TB8, but on the reception side. When a byte is received in modes 2 or 3, a total of
nine bits are received. In this case, the first eight bits received are the data of the
serial byte received and the value of the ninth bit received will be placed in RB8.
TI means "Transmit Interrupt." When a program writes a value to the serial port, a
certain amount of time will pass before the individual bits of the byte are "clocked
out" the serial port. If the program were to write another byte to the serial port before
the first byte was completely output, the data being sent would be garbled. Thus, the
8051 lets the program know that it has "clocked out" the last byte by setting the TI
bit. When the TI bit is set, the program may assume that the serial port is "free" and
ready to send the next byte.
Finally, the RI bit means "Receive Interrupt." It funcions similarly to the "TI" bit,
but it indicates that a byte has been received. That is to say, whenever the 8051 has
received a complete byte it will trigger the RI bit to let the program know that it
needs to read the value quickly, before another byte is read.
Setting the Serial Port Baud Rate

Once the Serial Port Mode has been configured, as explained above, the program
must configure the serial ports baud rate. This only applies to Serial Port modes 1
and 3. The Baud Rate is determined based on the oscillators frequency when in
mode 0 and 2. In mode 0, the baud rate is always the oscillator frequency divided by
12. This means if youre crystal is 11.059Mhz, mode 0 baud rate will always be
921,583 baud. In mode 2 the baud rate is always the oscillator frequency divided by
64, so a 11.059Mhz crystal speed will yield a baud rate of 172,797.
In modes 1 and 3, the baud rate is determined by how frequently timer 1 overflows.
The more frequently timer 1 overflows, the higher the baud rate. There are many
ways one can cause timer 1 to overflow at a rate that determines a baud rate, but the
most common method is to put timer 1 in 8-bit auto-reload mode (timer mode 2) and
set a reload value (TH1) that causes Timer 1 to overflow at a frequency appropriate
to generate a baud rate.
To determine the value that must be placed in TH1 to generate a given baud rate, we
may use the following equation (assuming PCON.7 is clear).
TH1 = 256 - ((Crystal / 384) / Baud)

If PCON.7 is set then the baud rate is effectively doubled, thus the equation
becomes:
TH1 = 256 - ((Crystal / 192) / Baud)
For example, if we have an 11.059Mhz crystal and we want to configure the serial
port to 19,200 baud we try plugging it in the first equation:
TH1 = 256 - ((Crystal / 384) / Baud)
TH1 = 256 - ((11059000 / 384) / 19200 )
TH1 = 256 - ((28,799) / 19200)
TH1 = 256 - 1.5 = 254.5
As you can see, to obtain 19,200 baud on a 11.059Mhz crystal wed have to set TH1
to 254.5. If we set it to 254 we will have achieved 14,400 baud and if we set it to
255 we will have achieved 28,800 baud. Thus were stuck...
But not quite... to achieve 19,200 baud we simply need to set PCON.7 (SMOD).
When we do this we double the baud rate and utilize the second equation mentioned
above. Thus we have:
TH1 = 256 - ((Crystal / 192) / Baud)

TH1 = 256 - ((11059000 / 192) / 19200)
TH1 = 256 - ((57699) / 19200)
TH1 = 256 - 3 = 253
Here we are able to calculate a nice, even TH1 value. Therefore, to obtain 19,200
baud with an 11.059MHz crystal we must:
1. Configure Serial Port mode 1 or 3.
2. Configure Timer 1 to timer mode 2 (8-bit auto-reload).
3. Set TH1 to 253 to reflect the correct frequency for 19,200 baud.
4. Set PCON.7 (SMOD) to double the baud rate.
Writing to the Serial Port
Once the Serial Port has been propertly configured as explained above, the serial
port is ready to be used to send data and receive data. If you thought that configuring
the serial port was simple, using the serial port will be a breeze.
To write a byte to the serial port one must simply write the value to the SBUF (99h)
SFR. For example, if you wanted to send the letter "A" to the serial port, it could be
accomplished as easily as:
MOV SBUF,#A
Upon execution of the above instruction the 8051 will begin transmitting the
character via the serial port. Obviously transmission is not instantaneous--it takes a
measureable amount of time to transmit. And since the 8051 does not have a serial
output buffer we need to be sure that a character is completely transmitted before we
try to transmit the next character.
The 8051 lets us know when it is done transmitting a character by setting the TI bit
in SCON. When this bit is set we know that the last character has been transmitted
and that we may send the next character, if any. Consider the following code
segment:
CLR TI ;Be sure the bit is initially clear

MOV SBUF,#A ;Send the letter A to the serial port
JNB TI,$ ;Pause until the TI bit is set.
The above three instructions will successfully transmit a character and wait for the
TI bit to be set before continuing. The last instruction says "Jump if the TI bit is not
set to $"--$, in most assemblers, means "the same address of the current instruction."
Thus the 8051 will pause on the JNB instruction until the TI bit is set by the 8051
upon successful transmission of the character.
Reading the Serial Port
Reading data received by the serial port is equally easy. To read a byte from the
serial port one just needs to read the value stored in the SBUF (99h) SFR after the
8051 has automatically set the RI flag in SCON.
For example, if your program wants to wait for a character to be received and
subsequently read it into the Accumulator, the following code segment may be used:
JNB RI,$ ;Wait for the 8051 to set the RI flag
MOV A,SBUF ;Read the character from the serial port
The first line of the above code segment waits for the 8051 to set the RI flag; again,
the 8051 sets the RI flag automatically when it receives a character via the serial
port. So as long as the bit is not set the program repeats the "JNB" instruction
continuously.
Once the RI bit is set upon character reception the above condition automatically
fails and program flow falls through to the "MOV" instruction which reads the
value.
Serial Communication using C
#Program to send letter ‘A’ serially at baud rate 4800 continuously. Use 8 bit
data and 1 stop bit.
void main()
{
TMOD=0x20;
TH1=0xFA;
SCON=0x50;
TR1=1;
vhile(1)
{
SBUF=’A’;
While(TI==0);
TI=0;
}
}
#Program to transfer “YES” message serially at 9600, 8bit,1 stop bit

continuously.
void main()
{
TMOD=0x20;
TH1=0xFD;
SCON=0x50;
TR1=1;
while(1)
{
SerTx(‘Y’);

SerTx(‘E’);
SerTx(‘S’);
}
}
void SerTx(unsigned char x)
{
SBUF=x;
While(TI==0);
TI=0;
}
#Program to receive byte of data serially and put them in P1. set baud rate of
4800, 8bit, 1 stop bit.
void main()
{
unsigned char mybyte;
TMOD=0x20;
TH1=0xFA;
SCON=0x50;
TR1=1;
vhile(1)
{
while(RI==0);
mybyte=SBUF;
P1=mybyte;
RI=0;
}
}
Exercise
1. Write a C program to send “SOEX” serially at the baud rate of 9600.

2. Write a C program to do the same thing while toggling P1.0 continuously. Use
interrupts.
3. Write a C program to send Two different messages “8051” and
“Microcontroller” serially at different speeds one at 28K and other at 56K.
Use concept of doubling the baud rate.

III
Peripherals interfacing with 8051
III.1 LED Interfacing
LED is a versatile semiconductor device used in many applications as it produces
light of different colors (depending upon the doping material). LEDs come in
different colors and sizes. Here to interface LED with 8051 we need LEDs, which
work at the current of 10-20mA as it is produced by microcontroller. Your testing
kits are provided with such LEDs. Red LEDs are chosen so as to give maximum
observability.
LEDs when interfaced with microcontroller are specially for the indication or for the
observation of input or output data to the microcontroller.
Your testing kit has been built with the 32 LEDs(8 LEDs each port), so that you can
test data of all ports.
As all ports have their own LEDs so you can program them as per your requirement.
Here is an example C program which will blink all the LEDs connected at P0.
void delay(int);
int i,j;
void main()
{
while(1)
{
P0=0;
delay(500);
P0=255;
delay(500);
}
}
void delay(int del)
{
for(i=0;i<=125;i++)
}
Exercise
1. Write a C program to toggle all the bits of P0 one by one.
2. Write a C program to send a series 1,3,5,7,15,31….on P1.
3. Write a C program to show BCDs of no. 0 to 99.
Note: To simulate the programs, please refer the Topview Simulator. How to
use the software is given at the end of this section.
III.2

Seven Segment Interfacing
A seven-segment display (abbreviation: "7-seg(ment) display"), less commonly
known as a seven-segment indicator, is a form of electronic display device for
displaying decimal numerals that is an alternative to the more complex dot-matrix
displays. Seven-segment displays are widely used in digital clocks, electronic
meters, and other electronic devices for displaying numerical information.
BCD to Seven-Segment Decoder

You are likely familiar - very familiar - with the idea of a seven-segment indicator
for representing decimal numbers. Each segment of a seven-segment display is a
small light-emitting diode (LED) or liquid-crystal display (LCD), and - as is shown
below - a decimal number is indicated by lighting a particular combination of the
LED's or LCD's elements:
Binary-coded-decimal (BCD) is a common way of encoding decimal numbers with

4 binary bits as shown below:
Decimal digit 0 1 2 3 4
BCD code 0000 0001 0010 0011 0100
Decimal digit 5 6 7 8 9
BCD code 0101 0110 0111 1000 1001
Your job for this lab is to design and test a circuit to convert a 4-bit BCD signal into
a 7-bit control signal according to the following figure and table:
74
LS
48
b3 b2 b1 b0 abcdefg
0000 0000001
0001 1001111
0010 0010010
0011 0000110
0100 1001100
0101 0100100
0110 0100000
0111 0001111
1000 0000000
1001 0000100
Notice that the truth-table corresponds to a seven-segment device whose display

elements are active low. That is, each element will be active when its corresponding
input is '0'.

#Program to display numbers 0-9 on single digit 7 segment module.
void delay(int);
sfr seg7=0x90;
int i,j,n;
void main()
{
while(1)
{
for(n=0;n<=9;n++)
{
seg7=n;
delay(500);
}
}
}
void delay(int del)
{
for(i=0;i<=125;i++)
}
Exercise
1. Write a C program to display 00 to 99 on seven segment display using two
different ports.
2. Write above program using single port.
3. Write above programs with delay given by timers.
4. Write above programs with the facility of switch so that counting can be
stopped and restarted using a single switch.
Note: Use Topview Simulator to simulate above programs.

III.3
ADC Interfacing
ADC0804
Pin Description
CS- Chip Select is an active low input used to activate the ADC0804 chip. To
access the ADC0804, this pin must be low.
RD(read)- This is an input signal and active low. The ADC converts the analog
input to its binary equivalent and holds it in an internal register. RD is used to get
the converted data out of the ADC0804 chip. When CS=0, if a high-to-low pulse
is applied to the RD pin, the 8 bit digital output shows up at the D0-D7 data pins.
The RD pin is also referred to as output enable(OE).
WR(write, better name “start of conversion)-This is an active low input used
to inform the ADC0804 to start the conversion process. If CS=0 when WR makes
a low to high transition, the ADC0804 starts converting the analog input value of
Vin to an 8-bit digital number. The amount of time it takes to convert varies
depending on the CLK IN and CLK R values explained below. When the data
conversion is complete, the INTR pin forced low by the ADC0804.
CLK IN and CLK R-CLK IN is an input pin connected to an external clock
source when an external clock is used for timing. However, the 0804 has an
internal clock generator. To use the internal clock generator(also called self-
clocking) of the ADC0804, the CLK IN and CLK R pins are connected to a
capacitor and a resistor, as shown in figure. In that case the clock frequency is
determined by the equation:
f=1/1.1RC
Typical values of R=10K and C=150pF.
INTR(interrupt; better name “end of conversion)-This is an output pin and
active low. It is a normally high pin and when the conversion is finished, it goes
low to signal the CPU that the converted data is ready to be picked up. After
INTR goes low, we make CS=0 and send s high-to-low pulse to the RD pin to get
data out of the ADC0804.
Vin(+) and Vin(-)-These are the differential analog inputs where Vin=Vin(+)-
Vin(-). Often the Vin(-) is connected to ground and the Vin(+) pin is used as the
analog input to be converted to digital.
Vcc-This is the +5V power supply. It is also used as a reference voltage when
Vref/2 input(pin9) is open(not connected).
Vref/2-Pin 9 is an input voltage used for the reference voltage. If this pin is
open(not connected), the analog input voltage for the ADC0804 is in the range of
0 to 5V(the same as the Vcc pin). However, there are many applications where
the analog input applied to Vin needs to be other than the 0 to +5V range. Vref/2
is used to implement analog input voltages other than the 0 to +5V range. For

example, if the analog input range needs to be 0 to 4 volts, Vref/2 is connected to
2 volts.
D0-D7-These are the digital data output pins since ADC0804 is a parallel ADC
chip. These are tri-state buffered and the converted data is accessed only when
CS=0 and RD is forced low. To calculate the output voltage, use the following
formula.
Dout=Vin/step size
Analog and Digital Ground-These are the input pins providing the ground for
both the analog and digital signals. Analog ground is connected to the ground of
the analog Vin while digital ground is connected to the ground of Vcc pin. The
reason for two separate ground is to isolate the analog Vin signal from transient
voltages caused by digital switching of the output D0-D7. Such isolation
contributes to the accuracy of the digital data output. In our case both are
connected to the same ground.

#Program to get digital data from ADC0804 at P1 and to display it at P2.
sfr adc=0x90;
sfr output=0xA0;
void main()
{
while(1)
{
output=adc;
}
}
Exercise
1. Write a C program to show the data from ADC to the seven segment display
2. Write a C program to get digital data corresponding to temperature of
surrounding and to display temperature on seven segment
3. What should be the step size and the Voltage at Vref/2 if one needs to convert
a voltage range of 0 to 3V into digital data.
III.4
DAC Interfacing
AD557
In electronics, a digital-to-analog converter

( DAC or D-to-A) is a device for converting a
digital (usually binary) code to an analog
signal (current, voltage or electric charge).

Digital Input Code Output
Binary Hex Decimal Voltage
0000 0000 00 0 0
0000 0001 01 1 0.010 V
0000 0010 02 2 0.020 V
0000 1111 0F 15 0.150 V
0001 0000 10 16 0.160 V
0111 1111 7F 127 1.270 V
1000 0000 80 128 1.280 V
1100 0000 C0 192 1.920 V
1111 1111 FF 255 2.55 V
Modes of operation
UNIPOLAR 0 V TO 2.56 V OUTPUT RANGE
Figure 2 shows the configuration for the 0 V to 2.56 V fullscale output range.
Because of its precise factory calibration, the AD557 is intended to be operated
without user trims for gain and offset; therefore, no provisions have been made for
such user trims. If a small increase in scale is required, however, it may be
accomplished by slightly altering the effective gain of the output buffer. A resistor in
series with VOUT SENSE will increase the output range. Note that decreasing the
scale by putting a resistor in series with GND will not work properly due to the code
dependent currents in GND. Adjusting offset by injecting dc at GND is not
recommended for the same reason.
BIPOLAR –1.28 V TO +1.28 V OUTPUT RANGE
The AD557 was designed for operation from a single power supply and is thus
capable of providing only a unipolar 0 V to 2.56 V output range. If a negative supply
is available, bipolar output ranges may be achieved by suitable output offsetting and
scaling. Figure 3 shows how a ± 1.28 V output range may be achieved when a –5 V
power supply is available. The offset is provided by the AD589 precision 1.2 V
reference which will operate from a 5 V supply. The AD711 output amplifier can
provide the necessary ±1.28 V output swing from ±5 V supplies. Coding is
complementary offset binary.
Exercise
1. Write a program to pass digital data to DAC AD557 via port1 and check the
output using multimeter.

III.5
16x2 LCD Interfacing
16x2 LCD Description
0x80
0xC0
1 Vss- Ground
2 Vcc - +5 Volt Supply
3 VEE- Power supply to control contrast
4 RS-Register Select, RS=0 to select command Register
RS=1 to select data register
5 R/W-Read/Write R/W=0 for write
R/W=1 for Read
6 E -I/O Enable
7-14- DB0-DB7 I/O The 8 bit data bus
15-16 Back light

LCD Command codes
Code(hex) Command
1 Clear display screen
2 Return home
3 Decrement cursor(shift cursor to left)
6 Increment cursor(shift cursor to right)
5 Shift display right
7 Shift display left
8 Display off, cursor off
A Display off, cursor on
C Display on, cursor off
E Display on, Cursor Blinking
10 Shift cursor position to left
14 Shift cursor position to right
18 Shift entire display to the left
1C Shift entire display to the right
80 Force cursor to the beginning of first line
C0 Force cursor to the beginning of second line
38 Refresh
#Program to send letters ‘A’, ‘B’ and ‘C’ to the LCD using delays.
sfr ldata=0x90;
sbit rs=P2^0;
sbit rw=P2^1;
sbit en=P2^2;
void delay(int);
void main()
{
lcdcmd(0x38);
delay(25);
lcdcmd(0x0e);
delay(25);
lcdcmd(0x01);
delay(25);
lcdcmd(0x86);
delay(25);
lcddata(‘a’);
delay(10);
lcddata(‘b’);
delay(25);
lcddata(‘c’);
delay(25);
}
void lcdcmd(unsigned char value)

{
ldata=value;
rs=0;
rw=0;
en=1;
delay(10);
en=0;
}
void lcddata(unsigned char value)
{
ldata=value;
rs=1;
rw=0;
en=1;
delay(10);
en=0;
}
void delay(int del)
{
for(i=0;i<=125;i++)
}
#Same program using busy flag method.

sfr ldata=0x90;
sbit rs=P2^0;
sbit rw=P2^1;
sbit en=P2^2;
sbit busy=P1^7;
void delay(int);
void main()
{
lcdcmd(0x38);
delay(25);
lcdcmd(0x0e);
delay(25);
lcdcmd(0x01);
delay(25);
lcdcmd(0x86);
delay(25);
lcddata(‘a’);
delay(10);
lcddata(‘b’);
delay(25);
lcddata(‘c’);
delay(25);
}
void lcdcmd(unsigned char value)

{
lcdready();
ldata=value;
rs=0;
rw=0;
en=1;
delay(10);
en=0;
}
void lcddata(unsigned char value)
{
lcdready();
ldata=value;
rs=1;
rw=0;
en=1;
delay(10);
en=0;
}
void lcdready()
{
busy=1;
rs=0;
rw=1;
while(busy==1)
{
en=0;
delay(10);
en=1;
}
}
void delay(int del)
{
for(i=0;i<=125;i++)
}
Exercise
1. Write a C program to display your name on LCD.
2. Write a C program to display “SOEX” Scrolling leftward on LCD.
3. Write a C program to display name of all your friends one by one. To change
the name, use a switch.
4. Write a C program to accept data from a port(say P1) and show its decimal,
hexadecimal octal and binary values on LCD.
5. Write a C program to display numbers from 00 to 99 one by one at same place
of LCD.

III.6
Stepper Motor Interfacing
A stepper motor (or step motor) is a brushless, synchronous electric motor that can
divide a full rotation into a large number of steps. The motor's position can be
controlled precisely, without any feedback mechanism (see open loop control).
Stepper motors are similar to switched reluctance motors (which are very large
stepping motors with a reduced pole count, and generally are closed-loop
commutated.)
There are many kind of stepper motors. Unipolar type, Bipolar type, Single-phase
type, Multi-phase type... Single-phase stepper motor is often used for quartz watch.
This section will explain the operation principle of the 2-phase unipolar PM type
stepper motor.
In the PM type stepper motor, a permanent magnet is used for rotor and coils are put
on stator. The stepper motor model which has 4-poles is shown in the figure on the
left. In case of this motor, step angle of the rotor is 90 degrees.
As for four poles, the top and the bottom and either side are a pair. coil, coil and
coil, coil correspond respectively. For example, coil and coil are put to the upper
and lower pole. coil and coil are rolled up for the direction of the pole to become
opposite when applying an electric current to the coil and applying an electric
current to the coil. It is similar about and , too.
The turn of the motor is controlled by the electric current which pours into , ,
and . The rotor rotational speed and the direction of the turn can be controlled by
this control.
Wave drive 4-step sequence

Step Winding A Winding B Winding C Winding D
1 1 0 0 0
2 0 1 0 0
3 0 0 1 0
4 0 0 0 1
#Program to rotate a stepper motor with constant speed.
void delay(int del);
int i,j,n=1;
sfr motor=0x90;
void main()
{
N=1;
while(1)
{
motor=n;
delay(100);
n=n*2;
if(n>8)
n=1;
}
}
void delay(int del)
{
for(i=0;i<=125;i++)
}
Exercise
1. Write a C program to rotate a motor clockwise as well as anticlockwise
2. Write a C program to control the speed of motor by an external switch.
3. Write a C program to rotate the motor control its speed and display the current
rpm on LCD display.

III.7
Hex Keypad Interfacing
These section demonstrates how to read a HEX keypad, these are a standard device
with 16 keys connected in a 4x4 matrix, giving the characters 0-9 and A-F. You can
also use a 4x3 keypad, which gives the numbers 0-9, * and #.
This is how the HEX keypad is connected, each square with

a number or letter in it is a push to make switch, which
connects the horizontal wires (rows) with the vertical wires
(columns). So if you press button 'A' it will connect COL1
with ROW4, or pressing button '6' will connect COL3 with
ROW2. For a numeric (4x3) keypad COL4 will be missing,
and 'A' and 'B' replaced with '*' and '#' but is otherwise the
same. The sample programs use a lookup table for the keys,
this would need to be changed to insert the correct values for
the non-numeric characters.
As the switches are all interconnected, we need a way to differentiate between the
different ones - the four resistors on the interface board pull lines COL1 to COL4
high, these four lines are the ones which are read in the program. So in the absence
of any switch been pressed these lines will all read high. The four ROW connections
are connected to output pins, and if these are set high the switches will effectively do
nothing - connecting a high level to a high level, results in a high level.
In order to detect a switch we need to take the ROW lines low, so if we take all
the ROW lines low - what happens?. Assuming we press button 1, this joins COL1
with ROW1, as ROW1 is now at a low level, this will pull COL1 down resulting in a
low reading on COL1. Unfortunately if we press button 4, this joins COL1 with
ROW2, as ROW2 is at a low level this also results in a low reading at COL1. This

would only give us four possible choices, where each four buttons in a COL do
exactly the same (e.g. 1, 4, 7, and A are the same).
The way round this is to only switch one ROW at a time low, so assuming we set
ROW1 low we can then read just the top row of buttons, button 1 will take COL1
low, button2 will take COL2 low, and the same for buttons '3' and 'F' in COL3 and
COL4. The twelve lower buttons won't have any effect as their respective ROW
lines are still high. So to read the other buttons we need to take their respective
ROW lines low, taking ROW2 low will allow us to read the second row of buttons
(4, 5, 6, and E), again as the other three ROW lines are now high the other 12
buttons have no effect. We can then repeat this for the last two ROW's using ROW3
and ROW4, so we read four buttons at a time, taking a total of four readings to read
the entire keypad - this is a common technique for reading keyboards, and is called
'Keyboard Scanning'.
One obvious problem is what happens if you press more than one key at a time?,
there are a number of ways to deal with this, one way would be to check for multiple
key presses and ignore them, a simpler way (and that used in the examples) is to
accept the first key you find which is pressed. You will find that various commercial
products deal with this situation in similar ways, some reject multiple key presses,
and some just accept the first one.
#Program to send the no. of pressed key on port 1.

#define COL P2
#define ROW P1
void delay(int del);
unsigned char keypad[4][4]={‘0’,’1’,’2’,’3’
‘4’,’5’,’6’,’7’
‘8’,’9’,’A’,’B’
‘C’,’D’,’E’,’F’};
void main()
{
unsigned char rowloc, colloc;
COL=0xFF;
while(1)
{
do
{
ROW=0x00;
colloc=COL;
colloc&=0x0F;

}while(colloc!=0x0F);
do
{
do
{
delay(20);
colloc=COL;
colloc&=0x0F;
}while(colloc==0x0F);
delay(20);
colloc=COL;
colloc&=0x0F;
}while(colloc==0x0F);
while(1)
{
ROW=0xFE;
colloc=COL;
colloc&=0x0F;
if(colloc!=0x0F)
{
rowlock=0;
break;
}
ROW=0xFD;
colloc=COL;
colloc&=0x0F;
if(colloc!=0x0F)
{
rowlock=1;
break;
}
ROW=0xFB;
colloc=COL;
colloc&=0x0F;
if(colloc!=0x0F)
{
rowlock=2;
break;
}
ROW=0xF7;
colloc=COL;
colloc&=0x0F;
rowlock=3;
break;
}
if(colloc==0x0E)
P1=keypad[rowloc][0];
if(colloc==0x0D)
if(colloc==0x0B)
if(colloc==0x07)
}
}
void delay(int del)
{
vor(i=0;i<=125;i++)
vor(j=0;j<=del;j++);
}
Exercise
1. Write a C program to manage the count of how many times a key is being pressed
2. Write a C program to display the pressed key on LCD.

III.8
PC Interfacing using RS232
In telecommunications, RS-232 (Recommended Standard 232) is a standard for
serial binary data signals connecting between a DTE (Data Terminal Equipment) and
a DCE (Data Circuit-terminating Equipment). It is commonly used in computer
serial ports. A similar ITU-T standard is V.24.
The RS232 connector was originally developed to use 25 pins. In this DB25
connector pinout provisions were made for a secondary serial RS232 communication
channel. In practice, only one serial communication channel with accompanying
handshaking is present. Only very few computers have been manufactured where
both serial RS232 channels are implemented. Examples of this are the Sun
SparcStation 10 and 20 models and the Dec Alpha Multia. Also on a number of
Telebit modem models the secondary channel is present. It can be used to query the
modem status while the modem is on-line and busy communicating. On personal
computers, the smaller DB9 version is more commonly used today. The diagrams
show the signals common to both connector types in black. The defined pins only
present on the larger connector are shown in red. Note, that the protective ground is
assigned to a pin at the large connector where the connector outside is used for that
purpose with the DB9 connector version.
The pinout is also shown for the DEC modified modular jack. This type of connector
has been used on systems built by Digital Equipment Corporation; in the early days
one of the leaders in the mainframe world. Although this serial interface is
differential (the receive and transmit have their own floating ground level which is
not the case with regular RS232) it is possible to connect RS232 compatible devices
with this interface because the voltage levels of the bit streams are in the same range.
Where the definition of RS232 focussed on the connection of DTE, data terminal
equipment (computers, printers, etc.) with DCE, data communication equipment
(modems), MMJ was primarily defined for the connection of two DTE's directly.

DB9 and DB25 pinouts
Programming is given in the section of Serial communication.

III.9
How to use Topview Simulator
1. First of all install the program from the CD provided and run it. You will get
the following window in front of you.
2. Now select the device(controller) for which you have written your programs.
Also change the Operating frequency to 11059200 HZ and click on OK.
Now select External module setting as shown in figure.

LED
3. If program is written for LED then select LED.

4. Now select the LEDs connected to ports for which program is written and their
activating levels too. Also select the color of LED. Don’t forget to check no Seven
Segment Display check box.
5. Now select View>External Modules>LED

6. You will get the following window showing selected LEDs.
7. Now select File>Load Program.

8. Now select the hex file which was created after you compiled your program.
9. You will get the details of hex file loaded.

Now click on ok.

10. Now select Run>Go and see the output.
Seven Segment
1. First select
File>External
Module
Setting>LED.
In the window
appears first
uncheck No
Seven
Segment
Display
chkbox.
Select Non-
multiplexed
radio button,
Color of
segment and
BCD option
as shown in
figure. And
click on
Selection of Port Lines and Number of Digits.

2. Now configure the segment as shown in following figure if program is for
single seven segment and P1 is used. Summery of your setting can be seen on the
right side. You may configure upto 8 seven segments as per the requirement.
4. Now select View>LED. Doing so you will get following window
5.
6. Now load the corresponding hex file and run the simulation as explained
before.
LCD
1. First select File>External Module Settings>LCD
2. Set the things as shown in figure and click on Port Line Selection.
3. Configure the LCD as shown in figure(i.e. as per your program) and click OK.

4. Now select View>External Module>LCD and you will see the following
window.
5.Now load the corresponding hex file as explained before.

6. Select Run>Go and see the output.

V
Advance Microprocessors and Controllers
V.1 ARM
The ARM architecture (previously, the Advanced RISC Machine, and prior to that
Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM
Limited that is widely used in a number of embedded designs. Because of their
power saving features, ARM CPUs are dominant in the mobile electronics market,
where low power consumption is a critical design goal.
Today, the ARM family accounts for approximately 75% of all embedded 32-bit
RISC CPUs, making it one of the most prolific 32-bit architectures in the world.
ARM CPUs are found in all corners of consumer electronics, from portable devices
(PDAs, mobile phones, media players, handheld gaming units, and calculators) to
computer peripherals (hard drives, desktop routers). Important branches in this
family include Marvell's XScale and the Texas Instruments OMAP series.
The ARM architecture includes the following RISC features:
• Load/store architecture
• No support for misaligned memory accesses (now supported in ARMv6 cores)
• Orthogonal instruction set
• Large 16 × 32-bit register file
• Fixed instruction width of 32 bits to ease decoding and pipelining, at the cost
of decreased code density
• Mostly single-cycle execution
To compensate for the simpler design, compared with contemporary processors like
the Intel 80286 and Motorola 68020, some unique design features were used:
• Conditional execution of most instructions, reducing branch overhead and

compensating for the lack of a branch predictor
• Arithmetic instructions alter condition codes only when desired
• 32-bit barrel shifter which can be used without performance penalty with most
arithmetic instructions and address calculations
• Powerful indexed addressing modes
• Simple, but fast, 2-priority-level interrupt subsystem with switched register
banks

Thumb
Newer ARM processors have a compressed instruction set, called Thumb, that
uses a 16-bit-wide instruction encoding (but still processes 32-bit data). In Thumb,
the smaller opcodes have less functionality. For example, only branches can be
conditional, and many opcodes cannot access all of the CPU's registers. However,
the shorter opcodes give improved code density overall, even though some
operations require more instructions. Particularly in situations where the memory
port or bus width is constrained to less than 32 bits, the shorter Thumb opcodes
allows greater performance than with 32-bit code because of the more efficient use
of the limited memory bandwidth. Typically embedded hardware has a small range
of addresses of 32-bit datapath and the rest are 16 bits or narrower (e.g. the Game
Boy Advance). In this situation, it usually makes sense to compile Thumb code and
hand-optimise a few of the most CPU-intensive sections using the (non-Thumb)
32-bit instruction set, placing them in the limited 32-bit bus width memory.
The first processor with a Thumb instruction decoder was the ARM7TDMI. All
ARM9 and later families, including XScale have included a Thumb instruction
decoder.
Jazelle
A technology called Jazelle DBX (Direct Bytecode eXecution) allows some ARM
architectures to execute Java bytecode in hardware as another execution state
alongside the existing ARM and Thumb states. It provides acceleration for some
bytecodes while calling out to special software for others.
The first processor with Jazelle technology was the ARM926EJ-S[6]: Jazelle being
denoted by the 'J' in the CPU name. It is used by mobile phone manufacturers to
speed up execution of Java ME games and applications.

RISC CISC
Fixed width instructions Variable length instructions
Few formats of instructions Several formats of instructions
Memory values can be used as

Load/Store Architecture
operands in instructions
Large Register bank Small Register Bank
Instructions are pipelinable

Cannot pipeline instructions
ARM Programmer Model-
♦ When writing user level programs only

– 15-general purpose 32-bit registers(r0-r14) &
– the Program Counter (r15) &
– the CPSR (Current Program Status Register) need to be considered
♦ The remaining registers are only for system level programming & for
handling exceptions
Register Windows
32 Registers, Procedure Entry & Exit
Advantage: Less Memory Accesses
In ARM Shadow Registers used to handle Exceptions are of similar concepts
Reason for Rejecting this feature:
Large Chip Area (Cost grounds)

CPSR
♦ In user level programs uses CPSR to store the condition code bits
– N Negative
– C Carry
– Z Zero
– V Overflow
♦ The bottom bits are protected by the user level program
– I, F, T, mode[4:0]
3 2 2
8 7 6 5 4 0
1 8 7
NZCV unused IF T mode
Memory System
♦ Memory may be viewed as linear array of bytes number from 0 to 2^32 –1
♦ Data Bytes may be 8-bit (B), 16-bit (HW), or 32-bit (W)
♦ Words are always aligned at 4-byte boundaries i.e least two bits are zero
♦ Half Words are aligned on even boundaries
Load/Store Architecture
♦ Data Processing Instructions

♦ Data Transfer Instructions
♦ Control Flow Instruction
ARM Instruction set

Arithmetic
ADD r0, r1, r2 r0 := r1 + r2
ADC r0, r1, r2 r0 := r1 + r2 + C
SUB r0, r1, r2 r0 := r1 - r2
SBC r0, r1, r2 r0 := r1 - r2 + C - 1
RSB r0, r1, r2 r0 := r2 – r1
RSC r0, r1, r2 r0 := r2 – r1 + C - 1
Bit wise logical
AND r0, r1, r2 r0 := r1 and r2

ORR r0, r1, r2 r0 := r1 or r2
EOR r0, r1, r2 r0 := r1 xor r2
BIC r0, r1, r2 r0 := r1 and (not) r2
Mov Instructions
MOV r0, r2 r0 := r2
MVN r0, r2 r0 := not r2
Compare Instructions
CMP r1, r2 set cc on r1 - r2

CMN r1, r2 set cc on r1 + r2
TST r1, r2 set cc on r1 and r2
TEQ r1, r2 set cc on r1 xor r2
• If we need to add constant

– ADD r3, r3, #1 ; r3 := r3 + 1
– AND r8, r7, #&ff ; r8 := r7[7:0]
• Second register operand is subjected to shift before it is combined with first
operand
ADD r3, r2, r1, LSL #3 ; r3 := r2 + (r1*8)
Shift Instructions
• LSL- Logical Shift Left

• LSR- Logical Shift Right
• ASL- Arithmetic Shift Left
• ASR- Arithmetic Shift Right
• ROR- Rotate Right
• RRX- Rotate Right Extended
• It is also possible to use a register value to specify the number of bits the
second operand should be shifted by:
ADD r5, r5, r3, LSL r2
r5: r5 + r3 * 2^r2
• MUL r4, r3, r2
• Some Rules
– Immediate second operand not supported
– The result register must not be the same as the first source register
Load/Store Instructions
LDR r0, [r1] r0 := mem32[r1]
STR r0, [r1] mem32[r1] := r0
V.2 SHARC(Super Harvard ARCitechture)

• The architectural features are different then that of ARM architecture
• Instructions written one per line.
• Each instruction terminated with a semicolon.
• A label begins with the first column and ends with a colon.
• Comments start with an exclamation mark.
• E.g. R1 = DM(M0,I0) , R2 = PM(M8, I8); ! Comment
• R3 = R1 + R2;
Memory Organization
• Uses different word sizes and address space sizes for instruction and data
• A Sharc instruction consists of 48 bits; and an address of 32 bits.
• Sharc family include significant amount of on-chip memory
• Internal memory is evenly divided between program memory and data
memory.
• More memory can be added off-chip.
Sharc supports following types of data:

- 32 bit IEEE single precision folating point
- 40-bit IEEE extended precesion floating point
- 32-bit integer.
Designed to perform floating poiunt intensive computations. As a result of

which many signal processing systems are easy to design and built when
arithmetic is performed in much large range provided by floating point.
Memory is organized internally as 32-bit words.
• Sharc is modified Harvard architecture that allows program memory to hold

both instructions and data. This facilitates us in two way - 1. Allow extra data
to be accommodated only within the pon-chip memory.
• 2. Also allows data to be fetched from both the memories in parallel.
• Sharc programming model:
• The programming model of Sharc is large and complex. The primary data
registers have two different names: They are known as R0 to R15 when used
for integer and f0 to f15 when used for floating point operations.
• All these registers are 40-bit registers to handle largest data type, the 40-bit
extended precession floating point value.
• When 32-bit data types are stored in registers then they are put in most
significant bits of the register.
• The CPU has three major functional units:
• An ALU, A Multiplier, and a shifter.
• They perfectly suits the microprocessor designed for numerically intensive
programs, by performing wide range of operations.
• The three most significant mode register for dfata operations are : arithmetic
status (ASTAT), stiky (STKY), and mode1 (MODE1).
• All the ALU operations sets various status bits in ASAT and STKY registers.

• Such as setting ASTAT register bits as AZ( ALU result Zero) , AN(ALU
result Negative), AV( ALU result Overflow), AC (ALU Fixed point carry),
and AI (ALU floating point invalid).
• STKY bits are set along with the ASTAT register bits, but are not cleared.
STKY bits are always remains set until cleared by an instruction.
• This allows programs to evaluate arithmetic problems after a sequence of
operations.
• The Sharc can perfrom saturation arithmetic on fixzed point values. IN the, an
overflow results in the maximum range value, not the result of wrapping
around the numeric range. This style of arithmetic is useful in signal
processing applications because it more closely approximates the results of
overloading physical systems. Saturation mode is controlled by ALUSAT bit
in the MODE1 register.
• There is a separate set of floating point operations provided by Sharc as the set
of integer operations. Refer Fig. 2-18, 2-19 and 2-20.
• Sharc does not have divide instruction. Program must computer the reciprocal
of a number and then multiplies to perform a division. Iterative algorithms are
used to computer both reciprocals and square roots. Some of the results of
floating point operations are integer values, such as extracting the exponent.
The rounding modes used for floating point arithmetic as controlled by two
bits in MODE1 register.
• Multiplication sets the MN(Multiply Result Negative), MV (Multiply
Overflow), MU (Multiply floating point underflow), and MI (Multiply
floating point invalid) operations bits in ASTAT register.
• The multiplier performs fixed point and floating pint multiplication. It can
also perform saturation, rounding and setting the result to 0. Fixed point
multiplication produces an 80-bit result, which can be stored in MR register
and manipulated there.
• Refer to the Fig. 2-21 for the Shifter operations. Logical shifts fills with zeros
while arithmetic shifts copy sign bits.
• The Sharc is load-store architecture- operands most be loaded into registers
before operating on them. But unlike many other architectures Sharc supplies
special registers are used to control loading and storing.
• The Sharc has two Data Address Generators to be used for this purpose – one
for data memory and other for program memory. As there are two DAGs, the
Sharc can perform two load-store operations per cycle.
• Several registers must be set up to perform a load or store; once the set up is
complete, the DAG hardware automatically updates their values so that a
series of accesses such as to a series of locations in an array, can be very
easily performed.
• This makes DAGs quite useful in sequential accesses founf in the array
arithmetic common to signal processing programs.
• Each DAG has 8 sets of primary registers
• Having several sets allows quicker access of multiple sets of data, such as is
required when multiplying two arrays.
• The registers numbered 0 through 7 belong to DAG1, while registers 8
through 15 belong to DAG2.
I0 M0 L0 B0 M8 B8
I8 L8
I1 M1 L1 B1 B9
I9 M9 L9
I2 M2 L2 B2 M1 B1
I3 I10 L10 0
M3 L3 B3 0 B1
I11 M1 L11 1
1
M1 B1
I4 M4 L4 B4 I12 L12
2 2
B1
I5 M5 L5 B5 I13 M13 L13 3
B1
I6 M6 L6 B6 I14 M14 L14 4
B1
I7 M7 L7 B7 I15 M15 L15 5
V.3 PIC
Microchip manufacture a series of microcontrollers called PIC. There are many
different flavours available, some basic low memory types, going right up through to
ones that have Analogue - To- Digital converters and even PWM built in. We are
going to concentrate on the 16F84 PIC. Once you have learnt how to program one
type of PIC, learning the rest is easy.
There are several ways of programming the PIC - using BASIC, C, or Assembly
Language. We are going to show you the Assembly Language. Don't be put off by
this. There are only 35 instructions to learn, and it is the cheapest way to program
the PICs, as you do not need any extra software other than the freebies.
The 16F84 Pins

Below is a diagram showing the pin-outs of the PIC 16F84. We will go through
each pin, explaining what each is used for.
RA0 To RA4
RA is a bidirectional port. That is, it can be configured as an input or an output.
The number following RA is the bit number (0 to 4). So, we have one 5-bit
directional port where each bit can be configured as Input or Output.
RB0 To RB7
RB is a second bidirectional port. It behaves in exactly the same way as RA, except
there are 8 - bits involved.
VSS And VDD

These are the power supply pins. VDD is the positive supply, and VSS is the
negative supply, or 0V. The maximum supply voltage that you can use is 6V, and
the minimum is 2V
OSC1/CLK IN And OSC2/CLKOUT

These pins is where we connect an external clock, so that the microcontroller has
some kind of timing.
MCLR
This pin is used to erase the memory locations inside the PIC (i.e. when we want to
re-program it). In normal use it is connected to the positive supply rail.
INT
This is an input pin which can be monitored. If the pin goes high, we can cause the
program to restart, stop or any other single function we desire. We won't be using
this one much.

T0CK1
This is another clock input, which operates an internal timer. It operates in isolation
to the main clock. Again, we won't be using this one much either.
The Registers
A register is a place inside the PIC that can be written to, read from or both. Think
of a register as a piece of paper where you can look at and write information on.
The figure below shows the register file map inside the PIC16F84. Don’t worry if
you haven’t come across anything like this before, it is only to show where the
different bits and pieces are inside the PIC, and will help explain a few of the
commands.
STATUS
To change from Bank 0 to Bank 1 we tell the STATUS register. We do this by

setting bit 5 of the STATUS register to 1. To switch back to Bank 0, we set bit 5 of
the STATUS register to 0. The STATUS register is located at address 03h (the ‘h’
means the number is in Hexadecimal).
TRISA and TRISB.
These are located at addresses 85h and 86h respectively. To program a pin to be an
output or an input, we simply send a 0 or a 1 to the relevant bit in the register. Now,
this can either be done in binary, or hex. We personally use both, as the binary does
help visualize the port. If you are not conversant with converting from binary to hex
and vice versa, then use a scientific calculator.
So, on Port A we have 5 pins, and hence 5 bits. If We wanted to set one of the pins
to input, We send a ‘1’ to the relevant bit. If We wanted to set one of the pins to an
output, We set the relevant bit to ‘0’. The bits are arranges in exactly the same way
as the pins, in other words bit 0 is RA0, bit 1 is RA1, bit 2 is RA2 and so on. Let’s
take an example. If We wanted to set RA0, RA3 and RA4 as outputs, and RA1 and
RA2 as inputs, We send this: 00110 (06h). Note that bit zero is on the right, as
shown:
Port A Pin RA4 RA3 RA2 RA1 RA0
Bit Number 4 3 2 1 0
Binary 0 0 1 1 0

The same goes for TRISB.
PORTA and PORTB
To send one of our output pins high, we simply send a ‘1’ to the corresponding bit
in our PORTA or PORTB register. The same format follows as for the TRISA and
TRISB registers. To read if a pin is high or low on our port pins, we can perform a
check to see if the particular corresponding bit is set to high (1) or set to low (0)
Before We give an example code, We need to explain just two more register – w and
f.
The W register is a general register in which you can put any value that you wish.
Once you have assigned a value to W, you can add it to another value, or move it. If
you assign another value to W, its contents are overwritten.
V.4 AVR
The Atmel AVRTM is a family of 8-bit RISC microcontrollers produced by Atmel.
The AVR architecture was conceived by two students at the Norwegian Institute of
Technology (NTH) and further refined and developed at Atmel Norway, the Atmel
daughter company founded by the two chip architects.
Memory
The memory of the Atmel AVR processors is a Modified Harvard architecture, in

which the program and data memory are on separate buses to allow faster access
and increased capacity. The AVR uses internal memory for data and program
storage, and so does not require any external memory.
The four types of memories in a Atmel AVR are:
• Data memory: registers, I/O registers, and SRAM

• Program flash memory
• EEPROM

• Fuse bits
All these memories are on the same chip as the CPU core. Each kind of memory is
separated from each other, in different locations on the chip. Address 0 in data
memory is distinct from address 0 in program flash and address 0 in EEPROM.
Program Memory
All AVR microcontrollers have some amount of 16 bit wide non-volatile flash
memory for program storage, from 1KB up to 256KB (or, 512-128K typical
program words). The program memory holds the executable program opcodes and
static data tables. Program memory is linearly addressed, and so mechanisms like
page banking or segment registers are not required to call any function, regardless
of its location in program memory.
AVRs cannot use external program memory; the flash memory on the chip is the
only program memory available to the AVR core.
The flash program memory can be reprogrammed using a programming tool, the
most popular being those that program the chip in situ and are called in-system
programmers (ISP). Atmel AVRs can also be reprogrammed with a high-voltage
parallel or serial programmer, and via JTAG (again, in situ) on certain chips. The
flash memory in an AVR can be re-programmed at least 10,000 times.
Many of the newer AVRs (MegaAVR series) have the capability to self-program
the flash memory. This functionality is used mainly by bootloaders.
Data Memory
Data Memory includes the registers, the I/O registers, and internal SRAM.
The AVR has thirty-two general purpose eight-bit registers (R0 to R31), six of
which can be used in pairs as sixteen-bit pointers (X, Y, and Z).
All AVR microcontrollers have some amount of RAM, from 32 bytes up to several
KB. This memory is byte addressable. The register file (both general and special
purpose) is mapped into the first addresses and thus accessible also as RAM. Some
of the tiniest AVR microcontrollers have only the register file as their RAM.
The data address space consists of the register file, I/O registers, and SRAM. The
working registers are mapped in as the first thirty-two memory spaces (000016-
001F16) followed by the reserved space for up to 64 I/O registers (002016-005F16).
The actual usable SRAM starts after both these sections (address 006016). (Note
that the I/O register space may be larger on some more extensive devices, in which
case the beginning address of SRAM will be higher.) Even though there are
separate addressing schemes and optimized opcodes for register file and I/O
register access, they can still be addressed and manipulated as if they were SRAM.
The I/O registers (and the program counter) are reset to their default starting values
when a reset occurs. The registers and the rest of SRAM have initial random
values, so typically one of the first things a program does is clear them to all zeros
or load them with some other initial value.
The registers, I/O registers, and SRAM never wear out, no matter how many times
they are written.
External Data Memory
Some of the higher pin-count AVR microcontrollers allow for external expansion
of the data space, addressable up to 64KB. When enabled, external SRAM is
overlaid by internal SRAM; an access to address 000016 in the data space will
always resolve to on-chip memory. Depending on the amount of on-chip SRAM
present in the particular AVR, anywhere from 512 bytes to several KB of external
RAM will not be accessible. This usually does not cause a problem.
The support circuitry required is described in the datasheet for any device that
supports external data memory, such as the Mega 162, in the "External Memory
Interface" section. The support circuitry is minimal, consisting of a '573 or similar
latch, and potentially some chip select logic. The SRAM chip select may be tied to
a logic level that permanently enables the chip, or it may be driven by a pin from
the AVR. For an SRAM of 32KB or less, one option is to use a higher-order
address line to drive the chip select line to the SRAM.
EEPROM Storage
Almost all AVR microcontrollers have internal EEPROM memory for non-volatile
data storage. Only the Tiny11 and Tiny28 have no EEPROM.
EEPROM memory is not directly mapped in either the program or data space, but
is instead accessed indirectly as a peripheral, using I/O registers. Many compilers
available for the AVR hide some or all of the details of accessing EEPROM. IAR's
C compiler for the AVR recognizes the compiler-specific keyword __eeprom on a
variable declaration. Thereafter, a person writes code to read and write that
variable with the same standard C syntax as normal variables (in RAM), but the
compiler generates code to access the EEPROM instead of regular data memory.

Atmel's datasheets indicate that the EEPROM can be re-written a minimum of
100,000 times. An application must implement a wear-leveling scheme if it writes
to the EEPROM so frequently that it will reach the write limit before it reaches the
expected lifetime of the device. AVRs ship from the factory with the EEPROM
erased, i.e. the value in each byte of EEPROM is FF16.
Many of the AVRs have errata about writing to EEPROM address 0 under certain
power conditions (usually during brownout), and so Atmel recommends that
programs not use that address in the EEPROM.
Fuse Settings
A Fuse is an EEPROM bit that controls low level features and pin assignments.
Fuses are not accessible by the program; they can only be changed by a chip
programmer. Fuses control features which must be set before the chip can come
out of reset and begin executing code.
The most frequently modified fuses include:
1. Oscillator/crystal characteristics, including drive strength and start-up time.

2. JTAG pins used for JTAG or GPIO
3. RESET pin used as a reset input, debugWire, or GPIO
4. Brown Out Detect (BOD) enable and BOD voltage trigger points
There is a also a fuse to enable serial in-system programming, which is set by

default. If it is set incorrectly, the only way to program the chip is by using a high-
voltage programmer, such as the STK-500, AVR Dragon, or third-party
programmer. A developer is therefore cautioned to be careful when manipulating
fuses.
Reset
The AVR's RESET pin is an active-low input that forces a reset of the processor
and its integrated peripherals. The line can be driven by an external power-on reset
generator, a voltage supervisor (which asserts RESET when the power supply
voltage drops below a predefined threshold), or another component in a larger
system. For example, if the AVR is managing a few sensors and servos as part of a
large integrated system, another controller might observe some condition that
justifies resetting the AVR; it could do so by asserting the AVR's RESET line.
AVRs also include a watchdog timer, which can reset the processor when it times
out. The watchdog timer must be reset periodically to prevent it from timing out.
Failure to reset the watchdog timer is usually an indication that the program code
has failed (locked up, entered an infinite loop, or otherwise gone astray), and the
processor should be reset. On some AVRs the watchdog can be programmed to
issue an interrupt instead of resetting the processor. This functionality can be used
to wake up the AVR from a sleep mode.
The RESET pin is used for in-system serial programming, as a GPIO, or for
debugWIRETM low pin count debugging, depending on the chip and the
programming of the fuse bits. If the reset functionality of that pin is disabled, it
cannot be recovered by in-system serial programming, and another method such as
high-voltage programming must be used.
Interrupts
AVRs support multiple interrupt sources, both internal and external. An interrupt
could be from an internal peripheral reaching a certain state (i.e. character received
on UART), or from an external event like a certain level on a pin. Each interrupt
source causes a jump to a specific location in memory. That location is expected to
contain either a RETI (Return from Interrupt) instruction to essentially ignore the
interrupt, or a jump to the actual interrupt handler.
Most AVRs have at least one dedicated external interrupt pin (INT0). Older AVRs
can trigger an interrupt on a high or low level, or on a falling edge. Newer AVRs
add more options, such as triggering on the rising edge or either edge.
Additionally, many of the newer AVRs implement pin-change interrupts for all
pins in groups of eight, eliminating the need for polling the pins. The pin-change
interrupt handler must examine the state of the pins that are associated with that
interrupt vector, and determine what action to take.
Due to button bounce issues, it is considered poor design to connect a push button
or other user input directly to an interrupt pin; some debouncing or other signal
conditioning must be interposed so that the signal from the button does not violate
the setup and hold times required on the interrupt pins.
General Purpose I/O Ports
General Purpose I/O, or GPIO, pins are the digital I/O for the AVR family. These
pins are true push-pull outputs. The AVR can drive a high or low level, or
configure the pin as an input with or without a pull-up. GPIOs are grouped into
"ports" of up to 8 pins, though some AVRs do not have enough pins to provide all
8 pins in a particular port, e.g. the Mega48/88/168 does not have a PortC7 pin.
Control registers are provided for setting the data direction, output value (or pull-
up enabled), and for reading the value on the pin itself. An individual pin can be
accessed using bitwise manipulation instructions.
Each port has 3 control registers associated with it, DDRx, PORTx, and PINx.
Each bit in those registers controls one GPIO pin, i.e. bit 0 in DDRA controls the
data direction for PortA0 (often abbreviated PA0), and bit 0 in PORTA will control
the data (or pullup) for PA0.
The DDR (Data Direction Register) controls whether the pin is an input or an
output. When the pin is configured as an output, the corresponding bit in the PORT
register will control the drive level to the pin, high or low. When the pin is
configured as an input, the bit in the PORT register controls whether a pull-up is
enabled or disabled on that pin. The PIN (Port Input) register was read-only on
earlier AVRs, and was used to read the value on the port pin, regardless of the data
direction. Newer AVRs allow a write to the PIN register to toggle the
corresponding PORT bit, which saves a few processor cycles when bit-banging an
interface.
Timer/Counters
All AVRs have at least one 8-bit timer/counter. For brevity, a timer/counter is
usually referred to as simply a timer.
Some of the Tiny series have only one 8-bit timer. At the high end of the Mega
series, there are chips with as many as six timers (two 8-bit and four 16-bit).
A timer can be clocked directly by the system clock, by a divided-down system

clock, or by an external input (rising or falling edge). Some AVRs also include an
option to use an external crystal, asynchronous to the system clock, which can be
used for maintaining a real-time clock with a 32.768KHz crystal.
The basic operation of a timer is to count up to FF16 (or FFFF16), roll over to zero,
and set an overflow bit, which may cause an interrupt if enabled. The interrupt
routine reloads the timer with the desired value in addition to any other processing
required.
The value of a timer can be read back at any time, even while it is running. (There
is a specific sequence documented in the datasheets to read back a 16-bit timer so
that a consistent result is returned, since the AVR can only move 8 bits at a time.)
A timer can be halted temporarily by changing its clock input to "disabled," then
resumed by re-selecting the previous clock input.
PWM
Many of the AVRs include a compare register for at least one of the timers. The
compare register can be used to trigger an interrupt and/or toggle an output pin (i.e.
OC1A for Timer 1) when the timer value matches the value in the compare
register. This may be done separately from the overflow interrupt, enabling the use
of pulse-width modulation (PWM).
Some AVRs also include options for phase-correct PWM, or phase- and
frequency-correct PWM.
The Clear Timer on Compare (CTC) mode allows for the timer to be cleared when
it matches a value in the compare register, before the timer overflows. Clearing the
timer prior to overflow manipulates the timer resolution, allowing for greater
control of the output frequency of a compare match. It can also simplify the
counting of an external event.
The ATtiny26 is unique in its inclusion of a 64MHz high-speed PWM mode. The
64MHz clock is generated from a PLL, and is independent of, and asynchronous
to, the processor clock.
Some AVRs also include complementary outputs suitable for controlling some
motors. A dead-time generator (DTG) inserts a delay between one signal falling
and the other signal rising so that both signals are never high at the same time. The
high-end AT90PWM series allows the dead time to be programmed as a number of
system clock cycles, while other AVRs with this feature simply use 1 clock cycle
for the dead time.
Output Compare Modulator
An Output Compare Modulator (OCM), which allows generating a signal that is

modulated with a carrier frequency. OCM requires two timers, one for the carrier
frequency, and the second for the signal to be modulated. OCM is available on
some of the Mega series.
Serial Communication
AVR microcontrollers are in general capable of supporting a plethora of serial

communication protocols and serial bus standards. The exact types of serial
communication support varies between the different members of the AVR
microcontroller family.
On top of support in hardware there is also often the option to implement a

particular serial communication mechanism entirely in software. Typically this is
used in case a particular AVR controller does not support some serial
communication mechanism in hardware, the particular hardware is already in use
(e.g. when two RS232 interfaces are needed, but only one is supported in
hardware), or the chip's hardware can't be used, because it shares pins with other
chip functions, and such a function is already in used for the particular hardware.
The latter often happens with the low-pincount AVRs in DIP packages.
Finally, there is also the possibility to use additional logic to implement a serial
communication function. For example, most AVRs don't support the USB bus
(some later ones do so, however). When using an AVR which doesn't support USB
directly, a circuit designer can add USB functionality with a fixed-function chip
such as the FTDI232 USB to RS232 converter chip, or a general-purpose USB
interface such as the PDIUSB11. Adding additional electronics is in fact necessary
for some supported communication protocols, e.g. standard-compliant RS232
communication requires adding voltage level converters like the MAX232.
The number of serial communication possibilities supported by a particular AVR

can be confusing at times, in particular if the pins are shared with other chip
functions. An intensive study of the particular AVR's datasheet is highly
recommended. The serial communication features most commonly to be found on
AVRs are discussed in the following sections.
Universal Synchronous Asynchronous Receiver Transmitter (USART)
Recent AVRs typically come with a Universal Synchronous Asynchronous

Receiver Transmitter (USART) built-in. A USART is a programmable piece of
hardware which is capable of generating and decoding various serial
communication protocols. USART is an acronym from the following words:
Universal
Can be used in a lot of different serial communication scenarios
Synchronous
Can be used for synchronous serial communication (sender and receiver are
synchronised by a particular clock signal)
Asynchronous
Can be used for asynchronous serial communication (sender and receiver are
not explicitly synchronised via a clock signal, but synchronise on the data
signal).
Receiver
The hardware in the AVR can receive serial data
Transmitter
The hardware can send serial data
Earlier AVRs had a UART that did not support synchronous serial communication,
hence the absence of the "S" in the acronym.

USARTs or UARTs work with logic voltage levels while e.g. the RS232 protocol
requires much different voltage levels than the 5V or 3.3V supplies found on AVR
circuits. The conversion from and to such voltage levels is performed by an
additional chip which is commonly called a line driver or line interface.
With the right line interface an AVR's USART can, for example, be used to
communicate with RS-232, RS-485, MIDI, LIN bus, or CANbus devices, to name
some of the popular protocols.
See Robotics: Computer Control: The Interface: Networks for more details.
RS-232 Signalling
The RS-232 specification calls for a negative voltage to represent a "1" bit, and a
positive voltage to represent a "0" bit. The spec allows for levels from +3 to +15V,
and -3 to -15V, but +/-12V is commonly seen. The AVR does not have the ability
to drive a negative output voltage on any GPIO pin, and so a level converter, such
as the MAX232, is used to talk to PCs and strict RS-232 devices. See Serial
Programming:RS-232 Connections for more detail on RS-232 wiring.
RS-232 has a relatively short maximum cable length. For longer cabling distances,
consider using RS-485 signaling on your USART.
Two Wire Interface
TWI is a variant of Phillips' I²C bus interface. I²C consists of two wires, known as
SDA (serial data) and SCL (serial clock), which use open-drain drivers and
therefore require pull-ups to a logic-1 state. I²C uses a common ground, so all
devices on the bus should be at the same ground potential to avoid ground loops.
TWI uses 7 bit addressing, which allows for multiple devices to connect to the bus.
Many TWI devices have at least the top four bits of the address hard-coded, and
the remaining bits configurable by some means such as connecting dedicated
address pins to power or ground; this often allows for only 2-8 model X devices on
the bus. The AVR's TWI hardware can act as Master or Slave, and can meet the
400Kbit/s spec.
Serial Peripheral Interface (SPI)
SPI, the Serial Peripheral Interface Bus, is a master-slave synchronous serial

protocol. This means that there is a clock line which determines where the pulses
are to be sampled, and that one of the parties is always in charge of initiating
communication. It uses at least three lines, which are called:
MISO
Master In Slave Out.
MOSI
Master Out Slave In.
SCK
Serial Clock.
Conceptually, SPI is a bidirectional shift register; as bits are shifted out on either
MISO or MOSI, bits are shifted in on the other line. The master always controls
the clock.
An SPI slave has a Slave Select (SS) signal, which signals to the slave that it
should respond to messages from the master. SS is almost always active-low. If
there is only one master and one slave, the slave's SS line could be tied low, and
the master would not need to drive it. If there are two or more slaves, then the
master must use a separate slave select signal to each slave. The downside of this
approach is that the master can only address as many slaves as it has extra outputs
(without the use of a separate decoder).
Hardware Implementation The larger AVR microcontrollers have built-in SPI

transceivers (from the ATMEGA8 upwards). The serial clock is derived from the
processor clock, with several divisors available. The data length is always 8 bits.
The clock polarity and phase may be configured, leading to four possible
combinations of when the data is clocked in and out of the chip. This interface is
very popular, and is widely available on a variety of other processors and
peripherals.
The pins used for the SPI bus are also used as a way of programming the chip via
ISP (In System Programming)(Except on the mega128).
Universal Serial Interface Some AVRs, particularly in the Tiny family, provide a
Universal Serial Interface (USI) instead of an SPI. The USI is capable of operating
as an SPI, but also as an I2C controller, and with a little extra effort, a USART.
The bit length of the transfer is configurable, as is the clock driver. The clock can
be driven by software, by the timer 0 overflow, or by an external source.
Software Implementation SPI can be implemented using bit-banging of the I/O

lines. An efficient implementation of a slave can be done by connecting SCLK to
an external interrupt source.
The datasheet for a particular AVR provides a block diagram of the SPI or USI
controller on that chip.

Protocol Issues
SPI, RS-232, I2C, and other serial interfaces only define the method by which bits
and bytes are transmitted; they correspond to layer 1 in the OSI model, the physical
layer. The bytes could be anything: temperature readings (in Centigrade or
Fahrenheit, depending on your sensor), readings from a pressure sensor, control
signals to turn off a pump, or the bytes of a JPEG image. Some of this meaning
may be assigned by the use of a serial communications protocol.
A serial protocol must handle a wide variety of usage conditions, as well as

provide for recovering from failures. For example, if two sensors are connected to
a single microcontroller (such as inside and outside temperature), the protocol
provides a way for the receiver on the other end of the serial line to discern which
reading belongs to which sensor. If a cable is unplugged during transmission, or a
byte is lost due to line noise, the protocol can provide a way to re-synchronize the
transmitter and the receiver.
The Serial Programming wikibook contains more discussion of serial protocols.
Analog Interfaces
[Analog to Digital
Analog to digital conversion uses digital number to represent the proportion of the
analog signal sampled. For example, by applying a 3V to the input of an ADC with
a full-scale range of 5 V, will result as a digital output of 60% of the full range of
the digital output. The digital number can be represented in 8 or 10 bits by the
ADC. An 8 bit converter will provide output from 0 to 28 − 1, or 255. 10 bits will
provide output from 0 to 210 − 1 = 1023.
10 bit sample: in ADCH:ADCL or
8 bit sample: in ADCL
Many AVRs include an ADC, specifically a successive-approximation ADC. The

ADC reference voltage (5V in the example above) can be an external voltage, an
internal fixed 1.1V reference.
AVRs with an ADC have several analog inputs which are connected to the ADC
via an analog multiplexer. Only one analog input can be converted at any given
time. The ADC controller provides a method for sequentially converting the inputs,
so that an AVR can easily cycle through multiple sources thousands of times a
second. AVRs can run ADC conversions continuously in the background, or use a
special "ADC sleep" mode to halt the processor while a conversion is taking place,
to minimize voltage disturbances from the rest of the MCU.
Analog Comparator Peripheral
Nearly all AVR microcontrollers feature an Analog Comparator which can be used
to implement an ADC on those AVRs which do not have an ADC, or if all of the
ADC inputs are already in use. Atmel provides sample code and documentation for
using the comparator as a low-speed ADC. The signal to be measured is connected
to the inverted input, and a reference signal is connected to the non-inverting input.
The AVR generates an interrupt when the signal falls below or rises above the
reference value.
A common use for the analog comparator is sensing battery voltage, to alert the
user to a low battery.
Other Integrated Hardware
Aside from what might be considered typical peripherals for a microcontroller

(UART, SPI, ADC), some AVRs include more specialized peripherals for specific
applications.
LCD Driver
In larger models like the ATMega169 (as seen in the AVR Butterfly), an LCD
driver is integrated. The LCD driver commandeers several ports of the AVR to
drive the column/row connections of a display. One particular trait of Liquid
Crystal that must be taken care of is that no DC bias is put through it. DC bias, or
having more electrons passing one way than the other when pumping AC,
chemically breaks apart the liquid crystal. The AVR's LCD module uses precise
timing to drive pixels forwards and backwards equally.
USB Interface
The AT90USB series includes an on-chip USB controller. Some models are
"function" only, while others have On-The-Go functionality to act as either a USB
host (for interfacing with other slave devices) or as a USB slave (for interfacing
with a USB master).
AVRs without built-in USB can use an external chip such as the PDIUSB12, or for
a low-speed and minimal functionality device, a firmware-only approach.
Two firmware-only USB drivers are obdev, which is available under an Open
Source compliant license with some restrictions, and USBtiny, which is licensed
under the GPL.
Although these software implementation provide a very cheap way to add USB
connectivity, they are limited to low-speed transfers, and tie up quite some AVR
resources. Other hardware ICs which translate USB signals to RS-232 (serial) for
the AVRs are available, from vendors such as FDTI. These ICs have the advantage
of offloading the strenuous task of managing the USB connection with the
disadvantage of being limited to the speed of the AVR's serial port.
Temperature Sensor
Some newer models have a built in temperature sensor hooked up to the ADC.
V.5
MOTOROL68HC11
• The 68HC11 is a powerful 8-bit controller.

• 16-bit address microcontroller from Motorola (Now Freescale) with an
instruction set that is similar to the older 68xx (6801, 6805, 6809) parts.
• Depending on the variety, the 68HC11 has built-in EEPROM/OTPROM,
RAM, digital I/O, timers, A/D converter, PWM generator, and
synchronous and asynchronous communications channels (RS232 and
SPI).
• Typical current draw is less than 10mA.
• Optimized for low power consumption and high-performance operation at
bus frequencies up to 4 MHz.
• The CPU has two 8 bit accumulators (A & B) that can be concatenated to
provide a 16 bit double accumulator (D).
• Two 16 bit index registers are present (X & Y) to provide indexing to
anywhere in the memory map.
• Having the two index registers means the 68HC11 is very good for
processing data.
Registers
• Hold Data
• Hold address
• Varies form uP to uP
Arithmetic Logic Unit (ALU)
• Gets data from Registers or Memory

• Performs computational and/or logic operations
• Gives results back to Registers or Memory
Control Unit
• Contains instruction logic

• Controls Program Counter (PC)
• All instructions/operations are synchronized to the system clock
• 68HC11 uses 2MHz clock as the system clock
• 2MHz = 500nS
Software
Can be written in high (C/C++) or low (assembly) languages
• Programs will be written in assembly language
• Assembly is a mnemonic representation of the instruction
• LDAA - “LoaD the Accumulator A”
• Assembly language is NOT portable to other processors!!
CPU Registers
• General purpose A and B
• 8 bit registers
• Most instruction deal with the A and B registers
• Can be “combined” to form the D register
• 16 bits
Index registers X and Y
• 16 bit registers
• Used mainly in addressing operations
• Used as pointers to memory
• Can be used for limited arithmetic operations
CPU Registers

• Stack Pointer (SP)
• 16 bit register
• Pointer to a “special” area of memory
• Program Counter (PC)

• 16 bit register
• Contains the address of the next instruction to be performed
• Is controlled by the Control Unit
• Condition Code Register (CCR)
• 8 bit register
• Keep track of the program execution status
• Negative, positive, zero, etc.
VI
RTOS (Real Time Operating System)
Features of RTOS
• Used for real time programming to meet hard and soft real time
constraints.

• Provides preemption points, user controlled dynamic priority
changes, fixed memory blocks, asynchronous I/Os user processes and
kernel space.
• Support to limited no. of tasks and threads.
• Task and Threads priorities are defined.
• Priority Inheritance feature.
• Task synchronization and IPC(Inter process communication
functions).
• Device imaging tools and device drivers.
• Fixed memory block allocation and de-allocation systems.
Inter-process Communication
Process
o Process is the set of executable programs state of which is controlled by
OS.
o State of process includes running, blocked, finished.
Thread
o Thread is a light weight process, i.e. its execution doesn’t depend upon
system resources.
o States include running, sleep, finished.
Task
o A term used in place of process, specially used in RTOSes.
o All properties are same as process.
IPC Functions
1. Semaphore
Used as a token to notify some events or occurrence of events. Also used
as acceptance of notice.
Types of semaphore are Binary semaphore, Counting Semaphore, Mutex
Semaphore, PV semaphore.
2. Queue
Another IPC function used to store a group of messages of message
pointers.
3. Mailbox
It is used to store a particular message for particular task. Pointer to the
message is stored in queue.
4. Pipe
Pipe is a virtual device between two interconnected tasks through which
tasks communicate with each other (unidirectional). Functions of pipe are
similar to files.
5. Socket
It is a bidirectional device for communication between two different tasks.
Protocols are used for the synchronization.
VI.2 uCOS-II (Microcontroller Operating System-II)

• Designed by Jean J. Labrosse in 1992.
• Preemptive RTOS
• Multitasking Deterministic
• Portable as ROM image.
• Full source code available at www.micrium.com
• Specially used in avionics, medical and nuclear system.
• Other applications include automotive, consumer electronics, military,
networking.
Additional support-
• uC/FL- Flash memory loader

• uC/FS- File System
• uC/GUI- GUI Platform
• uC/Probe- Real time monitoring tool
• uC/TCP- TCP/IP Protocol stack
• uC/CAN- Controller Area Network support
• uC/USB- USB support
Code Language: C is used for programmign uCOS-II.
Naming basics
Every function of macro related to operating system must be started with OS

prefix like OS_TASK_ERROR, OSInit(), OSTaskCreate() etc.
VI.3 VxWorks
Features
o High performance multitasking environment.

o Provided preemptive scheduling and round robin scheduling.
o Host-Target based development approach.
o Hard real time applications.
o More IPC functions than uCOS-II.
o No mailbox.
o Watchdog timers provided.
o Power management function.
o Applications include avionics, medical, networking, automotive etc.
VI.4
Symbian

Symbian OS v9, which has been recently announced, is a major evolution of the
Symbian platform and is a first step towards mass-market smartphones. The main
focus in this new release is :
more multimedia (more music, more imaging, more gaming)
more business
more security
more standard C++
more speed and battery life
less expensive phone
While all this sounds great, this is to the price of a little compromise: binary
compatibility has been broken. Which means that an existing application won't run
on Symbian OS v9 unless it has been specifically recompiled for this version (and
reciprocally: a Symbian OS v9 application must be recompiled using an older SDK
to be able to run on current phones).
Here are a few details we could get on Symbian OS v9. A lot more will probably be
announced next week at 3GSM in Cannes....
More Multimedia
The user interface framework has been enhanced to enable richer User Interface with
themes, animations, effects... The first snapshot we got from UIQ 3.0 looks really
promising and no doubt that Series 60 will also take benefit of this. The audio
capabilities are not left behind with the long awaited multi-channel audio support
and the stereo bluetooth headset support. Add the support of USB mass storage and
full OMA DRM 2.0, and you will get the ultimate phone for the music lover.
Imaging support has been enhanced and number of pixels of the camera is not more
limited.
More business
Enterprise users have not been left away. The new Symbian OS v9 incorporate
several new features of interest for big companies and operators.
The first one is the new device management framework. Whether you like it or
not, your boss may now be able to access and configure remotely your phone (over-
the-air diagnostics, re-programming, application installation/deinstallation).
Symbian OS v9 is compatible with core OMA Device Management v1.1.2 services
as well as OMA Client Provisionning v1.1.
IMAP mail support has been slightly enhanced, allowing you to filter and sort your
mail by name.
Calendaring application can now accept meeting invitations from MS Outlook and
Lotus Notes.
More Security
With the increasing popularity of the Symbian platform, the year 2004 has seen the
birth of wireless malware. While none of the Cabir, Skulls, Velasco where really
dangerous, Symbian Ltd has taken the threat seriously and introduced a new security
framework:
sensitive APIs are only available to certified applications
some APIs are available silently to certified applications but require manual user
confirmation for the others (ex "Do you allow the running application to send a SMS
?").
Most (60%) of the APIs remain freely accessible to every applications.
Technically speaking, each process will have a set of "Trusted Capabilities". Each of
these defining a access right granted to the application (access network, access user
personal data, access Bluetooth,...).
The second security feature is called data-caging. This prevents unauthorized access
to date written on the file system and will be implemented at two different levels:
system directories won't be accessible anymore to applications (unless you have
very high capabilities).
each application can create a secure directory to store its sensitive information
(registration information, credit card details,...) and other applications won't be able
to access it.
To develop applications that makes use of the protected APIs, one will need a
developer certificates that allow the application to access the APIs on a predefined
set of phones. This certificate is unfortunately not free (Symbian Lts is aiming at less
than 50 Euros but you also need a ACS Publisher Id which is 400$ / year]) :
hoobyists and students will probably have to stick to "free" APIs....
The move to this new security framework will not be totally transparent. And if
Symbian claims that 50% of the API have been untouched by this changed, that
leaves another 50%... According to Martin Grauballe, those changes will fall into
two categories. The first will be to replace APIs, such as the inter-process
communications API, which have been removed with secure alternatives. The
second will be smaller changes to account for the "securitization" of other APIs.
VI.5 WinCE (Windows for Consumer Electronics)

Features

o An operating system for handheld computers and mobile phones. It is
developed by Microsoft.
o Compact, connectable, compatible and efficient.
o Platform independent due to byte code concept like java.
o Subset of Win32 API.
o Multitasking and multithreading OS with low latencies.
o Suitable for touch-screen and small screen devices.
o Window like features.
o Power management features provided.
o Versions are WinCE 6.0(latest), WinCE Mobile(for mobile phones),
WinCE Automotive5.0 for automobiles.

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