Cristhian David Dorado Riveros

CC: 1022422743

Using your identification number you must selecting the digit of the half and make the analysis
of sequential logic in terms of truncated in the

respective combination.

You must present:

1. Analysis of timing diagrams with truncation of the Flip-Flop´s.

2. Schematic circuits with flip-flop´s and the NAND gate of truncation.