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Objectives:
1.To measure and plot ID vs VGS charactertics for given n-
MOS circuit.
2.To measure and plot ID vs VDS charactertics for given n-
MOS circuit for various values of VGS.
3.To measure and plot ID vs VSG charactertics for given p-
MOS circuit.
4.To measure and plot ID vs VSG charactertics for given p-
MOS circuit for various values of VSG.
5.Using a Triangle wave from Function Generator,apply
different frequency of voltages at the gate of CMOS
Inverter and plot the drain characterstics.
Experiment 1 :
ID vs VGS for MN1 for different values of VGS
15
10
5
0
0 0.5 1 1.5 2 2.5 3 3.5 4
Vgs
Experiment 2:
ID vs VDS for different values of VGS
10
8
6
4
2
0
0 2 4 6 8 10 12
Vds(V)
Experiment 3:
ID vs VSG for MP1 for different values of VSG
16
14
12
10
Id(mA)
0
0 1 2 3 4 5 6 7 8 9
Vsg
Experiment 4:
ID vs VSD different values of VSG
Vsd(V) R1(ohm) R2(ohm) Vsg(V) Id(mA)
6.75 470 470 4.02 11.5
3.65 1000 470 4.02 8.35
1.18 3000 470 4.02 3.306
0.83 4700 470 4.02 2.37
0.3 10000 470 4.02 1.17
8.8 470 1000 6.05 6.8
5.92 1000 1000 6.05 6.08
1.59 3000 1000 6.05 3.014
1.1 4700 1000 6.05 2.32
0.5 10000 1000 6.05 1.15
11.6 470 3000 9.07 1.56
11.2 1000 3000 9.07 1.42
8.98 3000 3000 9.07 1.34
7.8 4700 3000 9.07 1.22
4.23 10000 3000 9.07 0.964
11.7 470 4700 9.95 0.95
11.48 1000 4700 9.95 0.89
10.75 3000 4700 9.95 0.87
10.14 4700 4700 9.95 0.8
8.48 10000 4700 9.95 0.77
14
12
10
8
Id
0
0 2 4 6 Vsd 8 10 12 14
Experiment 5:CMOS Inverter
Frequency = 1KHz
Frequency at which sine wave(approximately) =
792.8KHz
Explanation for why quality of waveform degraded to a
sine wave at very high frequency:
At very high frequency(1MHz),the signal changes in a
period of 1 microsecond.This time is compared to the
Rise and fall time of CMOS inverter doesn’t get enough
time to adjust the voltage values and a curve like
sinewave is observed, which is a distortion to the
expected square wave.