Name: K LAXMI PRASANNA

Email id: laxmiprasanna2113@GMAIL.COM

Ph No: 8328108759
Career Objective
Seeking a position as Layout Design Engineer where I can contribute my skills for organization’s success and as
well as for my professional growth.

CMOS Layout Training

Company: S-micron VLSI Studies, Bangalore
Period: Oct 2017 to Mar 2018 (6 months)

Layout technical competency

 Familiar with Layout designing tool Cadence Virtuoso. Virtuoso XL and Verification tools Cadence
Assura & Mentorgraphics Calibre.
 Trained in Analog Layout methodologies.
 Development of layouts with given constraints.
 Proficient in DRC, ERC and LVS debugging.
 Good knowledge on Resistors, Capacitors, BJT and CMOS device fabrication.
 Implemented concepts: Matching, Shielding, Guard rings placement, etc...
 Theoretical knowledge on Antenna effect, ESD, Latchup and deep submicron effects
 Theoretical knowledge on Finfet, double patterning, metal grid routing etc …

Skills
➢ Operating Systems : Windows, Linux(Basics)
➢ Layout tools : Cadence Virtuoso
➢ Physical verification tools : Cadence Assura and Mentor Graphics Calibre

Educational Qualifications
 Bachelor’s of Electrical & Electronics Engineering from Rajamahendri Institute Of Engineering &
Technology (AP) in The Year Of 2016 with 70%
 Diploma in Electrical & Electronics Engineering from L.K.B. Polytechnic (AP) in The Year Of 2013 with
77%
 Passed High School from Sat Gyan High School in The Year Of 2010 With 75%

Projects done
➢
 Two – Stage operational Amplifier
○ Technology : 65nm
○ Tools used : Cadence Virtuoso, Cadence Assura and Mentor graphics Calibre
○ Description : Implemented layout design from scratch using pcells for
Two-stage op-amp block w.r.to all constraints. Done area estimation, placement, power
routing, signal routing and physical verification (DRC &LVS). Implemented analog layout
techniques like matching for critical devices (Diff pair & Current mirrors), shielding and
parasitic minimization. Followed DFM.

➢
 Bandgap Reference (BGR)
○ Technology : 65nm
○ Tools used : Cadence Virtuoso, Mentor Graphics Calibre
 Name: K LAXMI PRASANNA
Email id: laxmiprasanna2113@GMAIL.COM
Ph No: 8328108759
○ Description : Implemented layout design from scratch using pcells for BGR block
w.r.to all constraints. Done area estimation, placement, power routing, signal routing and
physical verification (DRC &LVS). Implemented analog layout techniques like matching for
MOS transistors, BJTs and resistors. Shielding for critical nets and parasitic minimization.
Implemented reliability techniques like electromigration and DFM.

 Standard cell layout for logic gates

○ Technology : 130nm
○ Tools used : Cadence Virtuoso and Mentor graphicsCalibre
○ Description : Done layouts logic gates (NAND, NOR, AOI) in standard cell methodology.
Followed all standard cell layout concepts. Area is the main constraint and DRC is challenging
factor.

Academic project
TITLE: Improving Power Quality By The Combination Of SHPF & TCR
DESCRIPTION:
This project proposes a combined system of FACTS controller i.e., thyristor controlled reactor (TCR) and a shunt
hybrid power filter (SHPF) for harmonic and reactive power compensation. The issue of reactive power is
resolved using SHPF and TCR with combination in the power system. Installing a SHPF for nonlinear loads
connected in power system helps in reducing the harmonic effect. The main emphasis of this combination is on
compactness of configurations, simplicity in control, reduction in rating of components, thus finally leading to
saving in overall cost. The simulation results of combination of SHPF with TCR are found to be quite satisfactory
to mitigate harmonic distortions and reactive power compensation, thereby improving the power quality at ac
mains.

Strengths
 Smart worker and a quick learner.
 Good soft skills and effective communicator.
 Easily Adaptable.
 Compatible to any circumstances.

Personal profile:
 Date of birth : 13-07-1994
 Gender : Female
 Nationality : Indian
 Languages known : English, Telugu, Hindi
 Address : D/O K. Venkata Rao,
4-37, Quthbullapur (village), Quthbullapur (man),
RangaReddy (dist), Hyderabad, Telangana -500055.

Declaration:
I declare that all the information given above are true and correct to the best of my knowledge and belief.
Place: Bangalore
Date: (K. Laxmi Prasanna )