1

Example 1:
d
A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a
2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.
 2

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
VB=5 Ω times 2A=10V
The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
 3

VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g
 4

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 (3f )  ( L )Dw w02  w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
 R 
dt Ceq
i  L w
dt 2 0
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
| V - V | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b  L C  2  2 � 2p f Lm  106
| VR | a Rb I a Rb a 2 Rb
106
Lm   3183.1H
2p
 5

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
 6

theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z

Thus
t -t 0
V V -( )
i (t )  m sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line
 7

Figure 2 shows the waveforms of

a) symmetrical ac component
b) dc offset current
c) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

1) dc offset current can be as high as the symmetrical ac peak
2) The dc offset current can be positive or negative (see fig2)
3) Dc offset current may be totally absent
eg. If   q , t 0  0
4) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

 8

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

 9

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt


t
f (t ) - f (0)  v
0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c
 10

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.
 11

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
 12

f dcmax
Core-oversizing factor = 1  max
f ac
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
1. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
2. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
3. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
4. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:
 13

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

1) Show the dotted terminals for correct secondary series connection

2) What is the VA of CT in fig (a) & (b) respectively?

1) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
2) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
3) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
6. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
 14

Turns ratio N = 300/5 = 60

I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 15

Lecture – 8

Examples
1. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 16

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 17

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

2. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(a) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(b) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(c) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 18

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 19

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 20

Example 1:
d
 21

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 22

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 23

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 24

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 25

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 26

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

d) symmetrical ac component
e) dc offset current
f) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 27

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

5) dc offset current can be as high as the symmetrical ac peak
6) The dc offset current can be positive or negative (see fig2)
7) Dc offset current may be totally absent
eg. If   q , t 0  0
8) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 28

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 29


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 30

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 31

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
5. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 32

6. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
7. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
8. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

3) Show the dotted terminals for correct secondary series connection

4) What is the VA of CT in fig (a) & (b) respectively?

4) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
5) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 33

6) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
7. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 34

Lecture – 8

Examples
3. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 35

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 36

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

4. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(d) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(e) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(f) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 37

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 38

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 39

Example 1:
d
 40

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 41

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 42

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 43

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 44

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 45

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

g) symmetrical ac component
h) dc offset current
i) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 46

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

9) dc offset current can be as high as the symmetrical ac peak
10) The dc offset current can be positive or negative (see fig2)
11) Dc offset current may be totally absent
eg. If   q , t 0  0
12) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 47

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 48


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 49

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 50

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
9. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 51

10. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
11. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
12. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

5) Show the dotted terminals for correct secondary series connection

6) What is the VA of CT in fig (a) & (b) respectively?

7) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
8) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 52

9) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
8. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 53

Lecture – 8

Examples
5. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 54

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 55

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

6. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(g) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(h) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(i) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 56

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 57

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 58

Example 1:
d
 59

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 60

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 61

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 62

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 63

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 64

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

j) symmetrical ac component
k) dc offset current
l) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 65

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

13) dc offset current can be as high as the symmetrical ac peak
14) The dc offset current can be positive or negative (see fig2)
15) Dc offset current may be totally absent
eg. If   q , t 0  0
16) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 66

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 67


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 68

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 69

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
13. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 70

14. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
15. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
16. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

7) Show the dotted terminals for correct secondary series connection

8) What is the VA of CT in fig (a) & (b) respectively?

10) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
11) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 71

12) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
9. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 72

Lecture – 8

Examples
7. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 73

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 74

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

8. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(j) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(k) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(l) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 75

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 76

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 77

Example 1:
d
 78

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 79

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 80

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 81

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 82

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 83

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

m) symmetrical ac component
n) dc offset current
o) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 84

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

17) dc offset current can be as high as the symmetrical ac peak
18) The dc offset current can be positive or negative (see fig2)
19) Dc offset current may be totally absent
eg. If   q , t 0  0
20) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 85

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 86


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 87

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 88

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
17. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 89

18. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
19. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
20. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

9) Show the dotted terminals for correct secondary series connection

10) What is the VA of CT in fig (a) & (b) respectively?

13) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
14) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 90

15) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
10. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 91

Lecture – 8

Examples
9. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 92

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 93

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

10. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(m)Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(n) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(o) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 94

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 95

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 96

Example 1:
d
 97

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 98

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 99

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 100

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 101

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 102

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

p) symmetrical ac component
q) dc offset current
r) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 103

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

21) dc offset current can be as high as the symmetrical ac peak
22) The dc offset current can be positive or negative (see fig2)
23) Dc offset current may be totally absent
eg. If   q , t 0  0
24) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 104

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 105


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 106

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 107

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
21. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 108

22. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
23. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
24. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

11) Show the dotted terminals for correct secondary series connection
12) What is the VA of CT in fig (a) & (b) respectively?

16) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
17) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 109

18) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
11. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 110

Lecture – 8

Examples
11. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 111

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 112

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

12. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(p) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(q) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(r) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 113

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 114

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 115

Example 1:
d
 116

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 117

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 118

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 119

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 120

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 121

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

s) symmetrical ac component
t) dc offset current
u) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 122

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

25) dc offset current can be as high as the symmetrical ac peak
26) The dc offset current can be positive or negative (see fig2)
27) Dc offset current may be totally absent
eg. If   q , t 0  0
28) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 123

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 124


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 125

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 126

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
25. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 127

26. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
27. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
28. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

13) Show the dotted terminals for correct secondary series connection
14) What is the VA of CT in fig (a) & (b) respectively?

19) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
20) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 128

21) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
12. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 129

Lecture – 8

Examples
13. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 130

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 131

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

14. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(s) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(t) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(u) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 132

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 133

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 134

Example 1:
d
 135

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 136

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 137

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 138

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 139

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 140

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

v) symmetrical ac component
w) dc offset current
x) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 141

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

29) dc offset current can be as high as the symmetrical ac peak
30) The dc offset current can be positive or negative (see fig2)
31) Dc offset current may be totally absent
eg. If   q , t 0  0
32) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 142

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 143


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 144

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 145

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
29. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 146

30. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
31. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
32. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

15) Show the dotted terminals for correct secondary series connection
16) What is the VA of CT in fig (a) & (b) respectively?

22) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
23) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 147

24) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
13. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 148

Lecture – 8

Examples
15. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 149

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 150

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

16. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(v) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(w) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(x) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 151

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 152

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 153

Example 1:
d
 154

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 155

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 156

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 157

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 158

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 159

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

y) symmetrical ac component
z) dc offset current
aa) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 160

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

33) dc offset current can be as high as the symmetrical ac peak
34) The dc offset current can be positive or negative (see fig2)
35) Dc offset current may be totally absent
eg. If   q , t 0  0
36) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 161

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 162


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 163

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 164

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
33. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 165

34. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
35. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
36. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

17) Show the dotted terminals for correct secondary series connection
18) What is the VA of CT in fig (a) & (b) respectively?

25) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
26) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 166

27) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
14. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 167

Lecture – 8

Examples
17. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 168

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 169

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

18. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(y) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(z) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(aa) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 170

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 171

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 172

Example 1:
d
 173

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 174

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 175

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 176

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 177

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 178

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

bb) symmetrical ac component
cc) dc offset current
dd) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 179

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

37) dc offset current can be as high as the symmetrical ac peak
38) The dc offset current can be positive or negative (see fig2)
39) Dc offset current may be totally absent
eg. If   q , t 0  0
40) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 180

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 181


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 182

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 183

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
37. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 184

38. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
39. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
40. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

19) Show the dotted terminals for correct secondary series connection
20) What is the VA of CT in fig (a) & (b) respectively?

28) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
29) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 185

30) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
15. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 186

Lecture – 8

Examples
19. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 187

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 188

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

20. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(bb) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(cc) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(dd) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 189

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 190

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 191

Example 1:
d
 192

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 193

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 194

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 195

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 196

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 197

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

ee) symmetrical ac component
ff) dc offset current
gg) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 198

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

41) dc offset current can be as high as the symmetrical ac peak
42) The dc offset current can be positive or negative (see fig2)
43) Dc offset current may be totally absent
eg. If   q , t 0  0
44) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 199

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 200


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 201

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 202

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
41. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 203

42. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
43. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
44. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

21) Show the dotted terminals for correct secondary series connection
22) What is the VA of CT in fig (a) & (b) respectively?

31) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
32) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 204

33) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
16. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 205

Lecture – 8

Examples
21. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 206

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 207

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

22. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(ee) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ff) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(gg) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 208

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 209

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 210

Example 1:
d
 211

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 212

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 213

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 214

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 215

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 216

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

hh) symmetrical ac component
ii) dc offset current
jj) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 217

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

45) dc offset current can be as high as the symmetrical ac peak
46) The dc offset current can be positive or negative (see fig2)
47) Dc offset current may be totally absent
eg. If   q , t 0  0
48) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 218

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 219


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 220

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 221

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
45. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 222

46. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
47. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
48. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

23) Show the dotted terminals for correct secondary series connection
24) What is the VA of CT in fig (a) & (b) respectively?

34) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
35) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 223

36) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
17. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 224

Lecture – 8

Examples
23. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 225

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 226

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

24. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(hh) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ii) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(jj) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 227

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 228

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 229

Example 1:
d
 230

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 231

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 232

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 233

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 234

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 235

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

kk) symmetrical ac component
ll) dc offset current
mm) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 236

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

49) dc offset current can be as high as the symmetrical ac peak
50) The dc offset current can be positive or negative (see fig2)
51) Dc offset current may be totally absent
eg. If   q , t 0  0
52) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 237

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 238


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 239

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 240

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
49. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 241

50. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
51. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
52. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

25) Show the dotted terminals for correct secondary series connection
26) What is the VA of CT in fig (a) & (b) respectively?

37) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
38) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 242

39) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
18. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 243

Lecture – 8

Examples
25. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 244

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 245

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

26. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(kk) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ll) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(mm) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 246

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 247

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 248

Example 1:
d
 249

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 250

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 251

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 252

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 253

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 254

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

nn) symmetrical ac component
oo) dc offset current
pp) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 255

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

53) dc offset current can be as high as the symmetrical ac peak
54) The dc offset current can be positive or negative (see fig2)
55) Dc offset current may be totally absent
eg. If   q , t 0  0
56) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 256

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 257


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 258

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 259

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
53. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 260

54. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
55. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
56. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

27) Show the dotted terminals for correct secondary series connection
28) What is the VA of CT in fig (a) & (b) respectively?

40) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
41) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 261

42) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
19. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 262

Lecture – 8

Examples
27. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 263

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 264

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

28. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(nn) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(oo) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(pp) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 265

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 266

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 267

Example 1:
d
 268

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 269

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 270

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 271

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 272

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 273

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

qq) symmetrical ac component
rr) dc offset current
ss) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 274

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

57) dc offset current can be as high as the symmetrical ac peak
58) The dc offset current can be positive or negative (see fig2)
59) Dc offset current may be totally absent
eg. If   q , t 0  0
60) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 275

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 276


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 277

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 278

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
57. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 279

58. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
59. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
60. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

29) Show the dotted terminals for correct secondary series connection
30) What is the VA of CT in fig (a) & (b) respectively?

43) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
44) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 280

45) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
20. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 281

Lecture – 8

Examples
29. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 282

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 283

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

30. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(qq) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(rr) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(ss)If the frequency drops from 50Hz to 47Hz, what would be the values of ratio
error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 284

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 285

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 286

Example 1:
d
 287

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 288

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 289

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 290

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 291

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 292

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

tt) symmetrical ac component
uu) dc offset current
vv) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 293

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

61) dc offset current can be as high as the symmetrical ac peak
62) The dc offset current can be positive or negative (see fig2)
63) Dc offset current may be totally absent
eg. If   q , t 0  0
64) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 294

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 295


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 296

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 297

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
61. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 298

62. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
63. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
64. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

31) Show the dotted terminals for correct secondary series connection
32) What is the VA of CT in fig (a) & (b) respectively?

46) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
47) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 299

48) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
21. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 300

Lecture – 8

Examples
31. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 301

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 302

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

32. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(tt) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(uu) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(vv) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 303

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 304

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 305

Example 1:
d
 306

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 307

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 308

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 309

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 310

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 311

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

ww) symmetrical ac component
xx) dc offset current
yy) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 312

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

65) dc offset current can be as high as the symmetrical ac peak
66) The dc offset current can be positive or negative (see fig2)
67) Dc offset current may be totally absent
eg. If   q , t 0  0
68) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 313

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 314


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 315

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 316

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
65. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 317

66. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
67. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
68. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

33) Show the dotted terminals for correct secondary series connection
34) What is the VA of CT in fig (a) & (b) respectively?

49) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
50) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 318

51) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
22. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 319

Lecture – 8

Examples
33. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 320

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 321

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

34. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(ww) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(xx) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(yy) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 322

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 323

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 324

Example 1:
d
 325

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 326

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 327

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 328

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 329

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 330

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

zz) symmetrical ac component
aaa) dc offset current
bbb) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 331

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

69) dc offset current can be as high as the symmetrical ac peak
70) The dc offset current can be positive or negative (see fig2)
71) Dc offset current may be totally absent
eg. If   q , t 0  0
72) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 332

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 333


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 334

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 335

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
69. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 336

70. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
71. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
72. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

35) Show the dotted terminals for correct secondary series connection
36) What is the VA of CT in fig (a) & (b) respectively?

52) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
53) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 337

54) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
23. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 338

Lecture – 8

Examples
35. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 339

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 340

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

36. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(zz) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(aaa) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(bbb) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 341

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 342

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 343

Example 1:
d
 344

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 345

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 346

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 347

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 348

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 349

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

ccc) symmetrical ac component
ddd) dc offset current
eee) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 350

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

73) dc offset current can be as high as the symmetrical ac peak
74) The dc offset current can be positive or negative (see fig2)
75) Dc offset current may be totally absent
eg. If   q , t 0  0
76) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 351

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 352


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 353

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 354

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
73. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 355

74. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
75. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
76. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

37) Show the dotted terminals for correct secondary series connection
38) What is the VA of CT in fig (a) & (b) respectively?

55) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
56) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 356

57) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
24. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 357

Lecture – 8

Examples
37. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 358

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 359

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

38. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(ccc) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ddd) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(eee) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 360

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 361

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 362

Example 1:
d
 363

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 364

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 365

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 366

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 367

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 368

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

fff) symmetrical ac component
ggg) dc offset current
hhh) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 369

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

77) dc offset current can be as high as the symmetrical ac peak
78) The dc offset current can be positive or negative (see fig2)
79) Dc offset current may be totally absent
eg. If   q , t 0  0
80) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 370

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 371


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 372

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 373

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
77. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 374

78. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
79. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
80. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

39) Show the dotted terminals for correct secondary series connection
40) What is the VA of CT in fig (a) & (b) respectively?

58) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
59) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 375

60) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
25. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 376

Lecture – 8

Examples
39. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 377

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 378

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

40. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(fff) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ggg) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(hhh) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 379

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 380

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 381

Example 1:
d
 382

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 383

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 384

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 385

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 386

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 387

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

iii) symmetrical ac component
jjj) dc offset current
kkk) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 388

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

81) dc offset current can be as high as the symmetrical ac peak
82) The dc offset current can be positive or negative (see fig2)
83) Dc offset current may be totally absent
eg. If   q , t 0  0
84) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 389

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 390


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 391

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 392

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
81. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 393

82. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
83. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
84. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

41) Show the dotted terminals for correct secondary series connection
42) What is the VA of CT in fig (a) & (b) respectively?

61) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
62) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 394

63) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
26. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 395

Lecture – 8

Examples
41. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 396

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 397

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

42. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(iii) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(jjj) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(kkk) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 398

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 399

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 400

Example 1:
d
 401

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 402

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 403

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 404

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 405

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 406

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

lll) symmetrical ac component
mmm) dc offset current
nnn) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 407

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

85) dc offset current can be as high as the symmetrical ac peak
86) The dc offset current can be positive or negative (see fig2)
87) Dc offset current may be totally absent
eg. If   q , t 0  0
88) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 408

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 409


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 410

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 411

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
85. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 412

86. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
87. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
88. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

43) Show the dotted terminals for correct secondary series connection
44) What is the VA of CT in fig (a) & (b) respectively?

64) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
65) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 413

66) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
27. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 414

Lecture – 8

Examples
43. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 415

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 416

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

44. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(lll) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(mmm) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(nnn) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 417

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 418

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 419

Example 1:
d
 420

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 421

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 422

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 423

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 424

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 425

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

ooo) symmetrical ac component
ppp) dc offset current
qqq) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 426

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

89) dc offset current can be as high as the symmetrical ac peak
90) The dc offset current can be positive or negative (see fig2)
91) Dc offset current may be totally absent
eg. If   q , t 0  0
92) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 427

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 428


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 429

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 430

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
89. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 431

90. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
91. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
92. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

45) Show the dotted terminals for correct secondary series connection
46) What is the VA of CT in fig (a) & (b) respectively?

67) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
68) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 432

69) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
28. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 433

Lecture – 8

Examples
45. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 434

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 435

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

46. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(ooo) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ppp) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(qqq) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 436

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 437

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 438

Example 1:
d
 439

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 440

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 441

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 442

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 443

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 444

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

rrr) symmetrical ac component
sss) dc offset current
ttt) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 445

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

93) dc offset current can be as high as the symmetrical ac peak
94) The dc offset current can be positive or negative (see fig2)
95) Dc offset current may be totally absent
eg. If   q , t 0  0
96) While, in above analysis, we have considered a single phase current, a 3 f fault on a 3
f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 446

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 447


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 448

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 449

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
93. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 450

94. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
95. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
96. Parallel of CT’s e.g. in differential protection, or with SLG fault can create significant
errors in CT performance. One should in general ascertain that magnetizing current is
kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

47) Show the dotted terminals for correct secondary series connection
48) What is the VA of CT in fig (a) & (b) respectively?

70) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
71) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 451

72) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
29. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 452

Lecture – 8

Examples
47. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 453

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 454

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

48. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(rrr) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(sss) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(ttt) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 455

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 456

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 457

Example 1:
d
 458

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 459

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 460

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 461

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 462

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 463

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

uuu) symmetrical ac component
vvv) dc offset current
www) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 464

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

97) dc offset current can be as high as the symmetrical ac peak
98) The dc offset current can be positive or negative (see fig2)
99) Dc offset current may be totally absent
eg. If   q , t 0  0
100) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 465

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 466


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 467

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 468

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
97. The CT rating and continuous load current should match. For example, if max load
current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 469

98. The maximum fault current should be less than 20 times the CT rated current. for
example 100:5 CT can be used, so long as burden on the CT & maximum primary fault
current is below 2000A.
99. The voltage rating of CT should be compatible. For example, 100:5 C100 would give
linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
100. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

49) Show the dotted terminals for correct secondary series connection
50) What is the VA of CT in fig (a) & (b) respectively?

73) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
74) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 470

75) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
30. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 471

Lecture – 8

Examples
49. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 472

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 473

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

50. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(uuu) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(vvv) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(www) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 474

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 475

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 476

Example 1:
d
 477

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 478

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 479

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 480

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 481

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 482

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

xxx) symmetrical ac component
yyy) dc offset current
zzz) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 483

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

101) dc offset current can be as high as the symmetrical ac peak
102) The dc offset current can be positive or negative (see fig2)
103) Dc offset current may be totally absent
eg. If   q , t 0  0
104) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 484

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 485


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 486

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 487

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
101. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 488

102. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
103. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
104. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

51) Show the dotted terminals for correct secondary series connection
52) What is the VA of CT in fig (a) & (b) respectively?

76) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
77) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 489

78) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
31. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 490

Lecture – 8

Examples
51. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 491

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 492

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

52. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(xxx) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(yyy) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(zzz) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 493

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 494

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 495

Example 1:
d
 496

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 497

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 498

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 499

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 500

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 501

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

aaaa) symmetrical ac component
bbbb) dc offset current
cccc) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 502

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

105) dc offset current can be as high as the symmetrical ac peak
106) The dc offset current can be positive or negative (see fig2)
107) Dc offset current may be totally absent
eg. If   q , t 0  0
108) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 503

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 504


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 505

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 506

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
105. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 507

106. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
107. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
108. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

53) Show the dotted terminals for correct secondary series connection
54) What is the VA of CT in fig (a) & (b) respectively?

79) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
80) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 508

81) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
32. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 509

Lecture – 8

Examples
53. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 510

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 511

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

54. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(aaaa) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(bbbb) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(cccc) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 512

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 513

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 514

Example 1:
d
 515

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 516

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 517

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 518

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 519

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 520

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

dddd) symmetrical ac component
eeee) dc offset current
ffff) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 521

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

109) dc offset current can be as high as the symmetrical ac peak
110) The dc offset current can be positive or negative (see fig2)
111) Dc offset current may be totally absent
eg. If   q , t 0  0
112) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 522

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 523


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 524

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 525

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
109. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 526

110. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
111. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
112. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

55) Show the dotted terminals for correct secondary series connection
56) What is the VA of CT in fig (a) & (b) respectively?

82) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
83) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 527

84) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
33. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 528

Lecture – 8

Examples
55. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 529

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 530

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

56. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(dddd) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(eeee) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(ffff) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 531

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 532

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 533

Example 1:
d
 534

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 535

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 536

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 537

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 538

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 539

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

gggg) symmetrical ac component
hhhh) dc offset current
iiii)total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 540

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

113) dc offset current can be as high as the symmetrical ac peak
114) The dc offset current can be positive or negative (see fig2)
115) Dc offset current may be totally absent
eg. If   q , t 0  0
116) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 541

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 542


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 543

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 544

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
113. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 545

114. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
115. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
116. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

57) Show the dotted terminals for correct secondary series connection
58) What is the VA of CT in fig (a) & (b) respectively?

85) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
86) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 546

87) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
34. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 547

Lecture – 8

Examples
57. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 548

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 549

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

58. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(gggg) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(hhhh) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(iiii) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 550

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 551

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 552

Example 1:
d
 553

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 554

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 555

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 556

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 557

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 558

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

jjjj)symmetrical ac component
kkkk) dc offset current
llll)total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 559

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

117) dc offset current can be as high as the symmetrical ac peak
118) The dc offset current can be positive or negative (see fig2)
119) Dc offset current may be totally absent
eg. If   q , t 0  0
120) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 560

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 561


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 562

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 563

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
117. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 564

118. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
119. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
120. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

59) Show the dotted terminals for correct secondary series connection
60) What is the VA of CT in fig (a) & (b) respectively?

88) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
89) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 565

90) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
35. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 566

Lecture – 8

Examples
59. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 567

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 568

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

60. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(jjjj) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(kkkk) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(llll) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 569

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 570

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 571

Example 1:
d
 572

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 573

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 574

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 575

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 576

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 577

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

mmmm) symmetrical ac component
nnnn) dc offset current
oooo) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 578

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

121) dc offset current can be as high as the symmetrical ac peak
122) The dc offset current can be positive or negative (see fig2)
123) Dc offset current may be totally absent
eg. If   q , t 0  0
124) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 579

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 580


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 581

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 582

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
121. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 583

122. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
123. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
124. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

61) Show the dotted terminals for correct secondary series connection
62) What is the VA of CT in fig (a) & (b) respectively?

91) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
92) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 584

93) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
36. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 585

Lecture – 8

Examples
61. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 586

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 587

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

62. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(mmmm) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(nnnn) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(oooo) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 588

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 589

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 590

Example 1:
d
 591

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 592

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 593

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 594

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 595

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 596

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

pppp) symmetrical ac component
qqqq) dc offset current
rrrr) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 597

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

125) dc offset current can be as high as the symmetrical ac peak
126) The dc offset current can be positive or negative (see fig2)
127) Dc offset current may be totally absent
eg. If   q , t 0  0
128) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 598

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 599


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 600

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 601

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
125. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 602

126. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
127. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
128. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

63) Show the dotted terminals for correct secondary series connection
64) What is the VA of CT in fig (a) & (b) respectively?

94) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
95) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 603

96) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
37. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 604

Lecture – 8

Examples
63. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 605

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 606

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

64. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(pppp) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(qqqq) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(rrrr) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 607

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 608

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 609

Example 1:
d
 610

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 611

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 612

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 613

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 614

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 615

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

ssss) symmetrical ac component
tttt)dc offset current
uuuu) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 616

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

129) dc offset current can be as high as the symmetrical ac peak
130) The dc offset current can be positive or negative (see fig2)
131) Dc offset current may be totally absent
eg. If   q , t 0  0
132) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 617

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 618


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 619

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 620

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
129. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 621

130. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
131. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
132. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

65) Show the dotted terminals for correct secondary series connection
66) What is the VA of CT in fig (a) & (b) respectively?

97) Electromechanical relays tend to saturate at high currents. This reduces the relay burden
on CT, and so that the CT performance at moderately high currents may be considered
better than at relay’s rated burden at 5A.
98) Use of instantaneous over current relays has the potential to overcome this problem of
saturation of CT’s
 622

99) Differential protection can operate on external faults due to the un equal saturation of
CT’s

Lecture-6
Examples
38. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 623

Lecture – 8

Examples
65. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 624

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 625

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

66. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(ssss) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(tttt) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(uuuu) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 626

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 627

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 628

Example 1:
d
 629

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 630

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 631

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 632

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 633

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 634

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

vvvv) symmetrical ac component
wwww) dc offset current
xxxx) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 635

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

133) dc offset current can be as high as the symmetrical ac peak
134) The dc offset current can be positive or negative (see fig2)
135) Dc offset current may be totally absent
eg. If   q , t 0  0
136) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 636

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 637


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 638

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 639

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
133. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 640

134. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
135. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
136. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

67) Show the dotted terminals for correct secondary series connection
68) What is the VA of CT in fig (a) & (b) respectively?

100) Electromechanical relays tend to saturate at high currents. This reduces the relay
burden on CT, and so that the CT performance at moderately high currents may be
considered better than at relay’s rated burden at 5A.
101) Use of instantaneous over current relays has the potential to overcome this
problem of saturation of CT’s
 641

102) Differential protection can operate on external faults due to the un equal
saturation of CT’s

Lecture-6
Examples
39. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 642

Lecture – 8

Examples
67. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 643

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 644

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

68. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(vvvv) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(wwww) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(xxxx) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 645

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 646

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 647

Example 1:
d
 648

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 649

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 650

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 651

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 652

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 653

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

yyyy) symmetrical ac component
zzzz) dc offset current
aaaaa) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 654

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

137) dc offset current can be as high as the symmetrical ac peak
138) The dc offset current can be positive or negative (see fig2)
139) Dc offset current may be totally absent
eg. If   q , t 0  0
140) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 655

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 656


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 657

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 658

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
137. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 659

138. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
139. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
140. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

69) Show the dotted terminals for correct secondary series connection
70) What is the VA of CT in fig (a) & (b) respectively?

103) Electromechanical relays tend to saturate at high currents. This reduces the relay
burden on CT, and so that the CT performance at moderately high currents may be
considered better than at relay’s rated burden at 5A.
104) Use of instantaneous over current relays has the potential to overcome this
problem of saturation of CT’s
 660

105) Differential protection can operate on external faults due to the un equal
saturation of CT’s

Lecture-6
Examples
40. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 661

Lecture – 8

Examples
69. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 662

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 663

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

70. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(yyyy) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(zzzz) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(aaaaa) If the frequency drops from 50Hz to 47Hz, what would be the values of
ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 664

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 665

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
 666

Example 1:
d
 667

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0Ω burden. Based on the accuracy classification, what is the maximum symmetrical
fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:
Based on the criteria that the CT can deliver 20 times rated secondary current
without exceeding a 10% ratio error, the maximum fault current will be 24000A.
However, with a 2.0Ω burden, this will result in a voltage below the knee point of the CT
and, as a practical matter, it will be within 10% accuracy at higher currents. This can only
be accurately determined from excitation or ratio correction curves and not from the
accuracy classification. For example, a CT with characteristics shown in above figure
will produce between 180-240A without exceeding the 10% ratio error, depending on the
power factor of the 2.0Ω burden.

Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary
burden that can be used and still maintain rated accuracy at 20 times rated symmetrical
secondary current?

Answer:
Since the secondary voltage capability is directly proportional to the connected tap, the
CT will support a voltage of 1000/1200  400V or 333V. Twenty times the rated
secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33 Ω

Example 3:

Assume that secondary burden in a relay circuit is 5Ω. The relay setting is 2A and the CT
ratio is 300/5. Using above figure, calculate the primary current required to operate the
relay?

Answer:
 668

VB=5 Ω times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.
I P  N ( I ST )

 N (I E  I S )

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.
Secondary burden is 3.5 Ω. What is the error for the CT shown in above figure?

Answer:
The total secondary fault current is (7000/600)  5=58A. Assume that exciting current is
negligible.
VS  I S ( R B  RS )

= 58(3.5+0.31)
= 221V
The exciting current will not be negligible, however, and the calculation will not be
iterated.

Lec – 7
N1 RI 0 Vm N1 R Vm Vm N1 N1 RI 0 -tt N1 I 0 -tt
fdcmax  t t  N1 Rt v2 (t ) 
dc
e i2  e
N 22 | Z line | N 22 | Z line | | Z line | N 22 N2 N2

t -t -t
1 N1 RI 0 t N1 RI 0
f (t ) - f (0)  t (1 - e ) f (t )  f (0)  t (1 - e t )
N2 �
v2 dt  2 2
0
N 2 N 2

Lec- 7
 669

Vm N1 d V2
v2ac (t )  R sin(wt  f - q ) jw f ac 
| Z line | N 2 dt jw N 2
RVm N1 p RVm N1
fac (t )  sin(wt  f - q - ) facmax 
w | Z line | N 2
2
2 w | Z line | N 22
Vm N1
Rt
RVm N1 N1 RVmt | Z line | N 22 wL X
facmax  fdcmax   2  1  1  wt  1  line  1  line
w | Z line | N 2 N 2 | Z line |
2
Vm N1 R Rline Rline
| Z line | N 2 w
2

X
 1
R
Lec-6

1000 400 1200

I S  20 �5  100 A RS  0.61 VS  �400 I max   153 A  153 �
1200 2.61 5
7000 6800
VS  2  (5  0.15)  10.3V I S  �5  58.33 A I S  �5  68 A
600 500
IE 6 300
VS  58(3.5  0.31)  58  3.81 �100  �100 R B  2.5 �2.04
IS 68 5
VS  68(2.5  0.25) RI  1 RS  0.51
i p  [ I 'sin(wt  d ) - I 'sin d e -g t ]u (t ) i p  [ I 'sin d (cos wt  e -g t )  I 'cos d sin wt ]u (t )
I 'cos d sin wt I 'cos d [-e-a t siny cosy  cosy sin(wt y )] I 'sin d cos wt
I 'sin d
I 'sin d [ -e -a t sin 2 y  cosy cos(wt y )] - I 'sin d - e -g t - (a e -a t - g e -g t )
a -g

Lec – 5
Ip Ip
- IS Ip IE - IS
N - I  I �100 N 98�45�
�100 N S E
IS �100
IS IS

Lec - 9
Vth - VT 1 1
�100 )Dw w02 
(3f )  ( L w02  1 LC < f Df  �3Hz
Vth w02
LC
1t di dv di 1 d 2i
v(t )  Ri  �
Ceq
-�
idt  L
dt dt
R 
dt Ceq
i  L 2 w0
dt
d 1 1 1
DVL - DVC  jI (w L - ) Dw  I (2  2 )Dw w02   I ( L  L )Dw
dw wCeq w0 Ceq LCeq
 670

| VL - VC | 2 LI Dw 2 LI 2 LDw
j 2 LI Dw (DVL - DVC ) tan b   2  2 2 � 2p f Lm  106
| VR | a Rb I a Rb a Rb
106
Lm   3183.1H
2p

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time t  t 0 . This can be simulated by closing the switch at t  t1
 671

R  jwL or Z q models the line impedance. The fault current in the line is given by
i (t )  0 0  t  t0

 t -t 0 
V sin(w t  f - q ) - 
t


t  t0
i (t )  m  I 0e  
|Z |

Where τ is the time constant of the line τ =L/R. The fault current has two components in
it. The first component models the steady state sinusoidal ac response while the second current
is the dc offset current due to the presence of inductive component in the circuit. Recall that
current in an inductance can not change instantaneously. As t  ∞, the instantaneous dc

current, a consequence of maintaining initial condition i (t 0- )  i (t 0 ) , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in
theory persist till infinity, it’s trace in the actual wave form would not be seen beyond a certain
-t
time constants. Table-I illustrates the values of e t up to 10 time constants.

Time t=0 t=τ t = 2τ t = 4τ t = 6τ t = 8τ t = 10τ

-t 1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004
et

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.
The value of I0 can be worked out by setting the current at t  t o to zero.
This implies that
Vm
I0  - sin(wt 0   - q )
Z
 672

Thus
t -t 0
Vm V -( )
i (t )  sin(wt  f - q ) - m sin(wt  f - q )e t
Z Z

fig.2

Clearly, the peak value of dc offset current depends upon

 Time at which fault strikes
 Phase angle f of ac voltage
 Z & q of transmission line

Figure 2 shows the waveforms of

bbbbb) symmetrical ac component
ccccc) dc offset current
ddddd) total current for various values of q , f & t 0

It can be seen that severity of dc offset component in fault current is maximum when
a) f  q
p
b) wt 0  
2
 673

p 1
For example, if angle of transmission line is 800, then with f = 800 & t 0  =
2  2p  50 200

V
sec = 5msec, the severity of dc offset current would equal I 0  Z , which is also the peak
m

value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

141) dc offset current can be as high as the symmetrical ac peak
142) The dc offset current can be positive or negative (see fig2)
143) Dc offset current may be totally absent
eg. If   q , t 0  0
144) While, in above analysis, we have considered a single phase current, a 3 f fault
on a 3 f transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation

We now plan to show that CT can saturate on dc offset current. Also, we plan to show
that the resulting distortions in the CT secondary current can be un-acceptably high. While
doing this analysis, we will neglect ac symmetrical component. In other words, we rest our
belief in superposition theorem atleast qualitatively and will finally evaluate effect using it
Notice that the current that we are dealing with is non-linear, a rigorous application of super
position theorem is simply out of question.
 674

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully
replicates primary current waveform on the secondary side. Hence, the secondary current
would be given by
-t
I0 t
i2 (t )  e
N
and the voltage developed across CT secondary would be given by
-t
RI N2
v 2 (t )  0 e t where N  N
N 1

Typical voltage waveform is shown in fig. (5)

For simplicity, let us assume that the initial flux in the transformer core at t=0 is zero
f ( 0 )  0 ; Then we can compute the flux in the transformer core by using faraday’s law

df
V2  N 2 ---------(2)
dt
 675


t
f (t ) - f (0)  v 0
2 dt

RI 0  
-t
 t 1- e t 
N2  
 
-t
LI 0
 (1 - e t )
N2
-t
LI 0
 f (t )  f (0)  (1 - e t )
N2
-t
LI 0
 (1 - e t ) ------- (3)
N2
as a consequence of dc offset current,
Thus, flux in the core increases exponentially to a peak value of

f dmax
c 
LI 0
N2
as t 
L Vm Vm
N Z Z
f dmax
c

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac
voltage induced flux has zero average value. However, dc offset induced does not have this
nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.
d
The ac flux in the CT core can be obtained by substituting operator by jw . Hence
dt

phasor relationship between phase V2 & f ac is given by

V2
f
jw N 2

If v2 (t )  Vm sin(wt  f ) , then
Vm p
f ac  sin(wt  f - )
wN 2 2
The peak value of ac flux is given by
 676

Vm
f acmax 
wN 2

However Vm  R2 I 0
max

R2 I 0max
Hence facmax 
wN 2
and peak value of the total flux is given by
Vm LI 0max
facmax f dcmax  
wN 2 N2

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core
will saturate.

As a consequence of CT core saturation, the secondary current would not faithfully replicate
the primary current. Infact, in practice it is observed that CT secondary current is clipped. The
clipping of CT current leads to “blinding” of the relay which cannot function further. Hence,
CT saturation in presence of dc offset current is a serious problem which relay designers have
to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time
constant ( t ). It is apparent that saturation should not occur immediately after the inception of
the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying
decision would be undertaken before the CT fully saturates. This is another important reason
for increasing the speed of relaying system. For bus-fault protection, where the dc saturation
due to dc offset current can be a significant contributing factor, quarter cycle operations *****
 677

specifically are imposed. Similarly, a distance relay is expected to operate within ½-1 cycle
time.
CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core cross

section such that f mac should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux (f acmax  f dcmax ) , the

(f acmax  f dcmax )
corresponding B is below the knee-point. Hence, the factor is called core-
f acmax
oversizing factor.
f dcmax
Core-oversizing factor = 1 
f acmax
LI o N 2
 1
RI 0 wN 2
wL
 1
R
X
 1
R
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R  10.
This would imply that transformer core should be oversized by a factor of 11. For a 400KV
line, typical value of X/R  20. This would imply an oversizing required of about 21 times the
usual design. Clearly this high amount of oversizing is not practical. Thus, the important
conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:
While choosing a CT for a particular application, it is necessary to observe following
precautions.
141. The CT rating and continuous load current should match. For example, if max
load current is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.
 678

142. The maximum fault current should be less than 20 times the CT rated current.
for example 100:5 CT can be used, so long as burden on the CT & maximum primary
fault current is below 2000A.
143. The voltage rating of CT should be compatible. For example, 100:5 C100 would
give linear response, upto 20 times rated current provided CT burden is kept
below(100/20*5=1 Ω). With 2 Ω burden, this CT can be used only if maximum current
is limited to 1000A.
144. Parallel of CT’s e.g. in differential protection, or with SLG fault can create
significant errors in CT performance. One should in general ascertain that magnetizing
current is kept much below the pick up value.
Following example, illustrates this point
Exercise problems:

If the current ratio is adequate for a protection, but CT burden is high; then the
performance of CT may deteriorate due to large magnetizing current and/or saturation problem.
The CT performance can be improved by connecting the CT’s in series.

71) Show the dotted terminals for correct secondary series connection
72) What is the VA of CT in fig (a) & (b) respectively?

106) Electromechanical relays tend to saturate at high currents. This reduces the relay
burden on CT, and so that the CT performance at moderately high currents may be
considered better than at relay’s rated burden at 5A.
107) Use of instantaneous over current relays has the potential to overcome this
problem of saturation of CT’s
 679

108) Differential protection can operate on external faults due to the un equal
saturation of CT’s

Lecture-6
Examples
41. If a 300:5 class C CT is connected to a meter with resistance R I 1 and
secondary current in the CT is 4.5A find out the primary current voltage
developed across the meter and % rate error. Lead wire resistance R L 0.02
secondary resistance RS of a 300/5 CT  0.15
Diagram
R I 1 , R L 0.02 RS  0.15 I S 4.5 A
Total secondary resistance RT  R I  R L  RS
1.17
Secondary voltage  I S RT
 4.5  1.17
 5.265V
From Fig 5.7,
Exciting current IE for 5.265V
= 0.03A
Turns ratio N = 300/5 = 60
I p N (I S I E )
= 60(4.5 + 0.03)
= 271.8A
Voltage across meter  I S R I
 4.5  1 = 4.5V
IE 0.03
Ratio error  100  100
IS 4.5
= 0.67%
Rb
 680

Lecture – 8

Examples
71. Design a CCVT for a 132kV transmission line using the following data.
Resistive Burden (3f )-150VA
Df 3Hz , phase angle error b = 40 min
Consider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV
Diagram 1 Diagram 2
Transmission line voltage V = 132kV. Suppose V 2 (P_N) be the voltage to be
produced by the capacitive potential divider with capacitance values C1 and C2
and L the value of tuning inductor. The standardized VT secondary voltage is 110
volts (L-L).
Here specification for phase angle error b is 40 minutes variation in frequency
can be upto Df 3Hz . Phase angle error for change in w by Dw in the above
equation circuit, is given by
1
( L 2 )Dw
w C
1
At tuning frequency w 2 
LC
Substituting w  1 LC
2

Phase angle error ( L L) Dw

2 LDw
2 LDw
% phase angle error b  2 --- (1)
a Rb
Using this equation the value L for different values of V2 is found out.
1) Let V2 be 33kV (L - N)
3V22
 150
Rb'
Rb' a 2 Rb 217.810 5 
Dw 2Df 23
40
b  40min   0.01164 rad
180 60
From eqn (1)
b Rb' 0.01164217.810 5
L 
2Dw 223
6722.2 H
1
C1 C 2  2 1.5110 -9 F 1.5110 -3 F
w L
2) V2 11kV ( L - N )
3 �(11�103 ) 2
Rb'   242 �104 
150
b �Rb' 0.01164 �242 �104
L 
2 �Dw 2 �2p �3
 681

747.2 H
1 1
C1 C 2  
w 2 L (3/ 4) 2 747.2
1.3610 -2 F
3) V2 6.6kV
3 �(6.6 �103 )2
Rb 
'

150
87.1210 4 
b �Rb' 0.01164 �87.12 �104
L 
2 �Dw 2 �2p �3
269H ,
C1 C 2 3.7710 -2 F
4) V2 3.3kV
3 �(3.3 �103 ) 2
Rb' 
150
21.7810 4 
b �Rb' 0.01164 �21.78 �104
L 
2 �Dw 2 �2p �3
67.25 H
C1  C2  0.151 F
The values of L, C1 C 2 for different values of V2 are tabulated below.
V2 L C1 C 2
33kV 6722.2H 0.00151 F
11kV 747.2H 0.0136 F
6.6kV 269H 0.0377 F
3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V 2, the smaller is the
value of L and higher the value of C 1 and C2 for tuning condition. If we select too low
value of V2 and L then capacitance values will be beyond available limits, and if we
select higher value of V2 and L, then CCVT and inductor will become bulky. So a
compromise is necessary and let us select V2 = 6.6kV
For V2 = 6.6kV
L = 269H
C1 C 2 0.0377 F
V C1 C 2
Now, 
V2 C1
13210 3 0.037710 -6

36.610 3
C1
0.0377 36.610 3 10 -6 F
C1 
13210 3
0.0033F
 682

C 2 0.0344F
In this design, we explained the basic concept for CCVT design and we assumed
the transformer to be ideal. But in actual design practice the value of magnetizing
impedance of transformer, resistance of reactor etc have to be taken into account,
as ratio error a and phase angle error b will also get affected by these values.

72. Diagram
The equivalent circuit of a CCVT is shown in fig 8.3. The values of C 1 and C2 are
0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of
497H and resistance of 4620  .
Xm of the 6.6kV VT is 1M  , core loss = 20 watts per phase, VA burden =
150VA per phase. Value of Cm for compensating the current drawn by m is equal
to 3.18310 -9 F .
(bbbbb) Verify the appropriateness of choice of L and Cm.
Ans: If C1 0.0018F and C 2 0.0186F then the value L of tuning inductor
is given by
1
L 2
w (C1 C 2 )
where w  2p f and f = tuning frequency
1
L
(2p �50) (0.0018  0.0186) �10-6
2

= 496.7H which is equal to the given value of L. Now X m 1�10 

6

1
Xm 
w Cm
1 1
Cm  
w X m (2p �50) �� 1 106
 3.183 �10-9 F
The value is also same as the selected value of Cm Hence the selection of both L
and Cm is appropriate.

(ccccc) Find out the nominal value of V/V2

V C1  C2 0.0018  0.0186
Ans:  
V2 C1 0.0018
= 11.33
132
V = 11.33 x 6.6  kV
3

(ddddd) If the frequency drops from 50Hz to 47Hz, what would be the
values of ratio error and phase angle error?
Ans: Core loss = 20w
V22
 20W
Rm
 683

V22 (6600) 2
Rm  
20 20
 2.18 �10 
6

VA burden = 150VA (resistive)

V22
 150
Rb
V22 (6600) 2
Rb  
150 150
 2.904 �10 5

The equivalent circuit can be represented as shown below.

Diagram 8.12
X m  106  at f = 50Hz
2p f Lm  106
106
Lm   3183.1H
2 �50
The frequency of interest is 47Hz. Hence values of X m and other impedance can
be calculated at 47Hz. The above circuit can be simplified as
Diagram 8.13
1 1 j 1
Where  -  jwCm 
Z Rm X m Rb
1 j 1
 -  j 2p �47 �3.183 �10-9 
2.18 �10 2p �47 �3183.1
6
2.904 �105
 0.459 �10-6 - j1.064 �10-6  j 0.94 �10 -6  3.44 �10-6
 (3.902 - j 0.124) �10-6  3.904 �10 -6 -1.82�
1
Z  256147.5 1.82� 
3.904 �10-6 -1.82
 256018.32  j8135.15
Vth
I th 
j
R  jw L - Z
wC
� �
� 6600 0 �
� �
j
� 4620  j 2p �47 �497 -  256018.32  j 8135.15 �
� 2p �47 �0.0204 �10-6 �
6600 0

[ 4620  j146768.9 - j165994  256018.32  j8135.15]
6600 0

260638.32 - j11089.84
 684

6600 0
 A
260874.14 -2.44�
VT  I th �Z
6600 0
 �256147.5 1.82�
260874.14 -2.44�
 6480.42 4.26�
(6600 - 6480.42)
Hence % ratio error  �100
6600
=1.81%
Phase angle error = 4.26�

V2  6.6kV
r  a w2 a 2
M

d 2i R di 1 1 R
t �t0 2
  i0 wn   2p �50 2 Iwn 
dt L dt LCeq LC L
d 2i
2
 2a wn  wn2i  0 a < 1
dt
Lec – 8
1
 2p �50 2zw  R d i  2zw  w 2i  0 z wn z < 1
2
wn 
LCeq n
L dt 2 n n

-t V
t I 0 - m sin(wt0  f - q ) f  q
e | Z line |
685