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5 4 3 2 1

PAGE TITLE
GA-880GM-UD2H 26 AUDIO JACK
PAGE TITLE Revision : 1.0 27 ITE 8720 JX ,Dual-BIOS

m
D
01 COVER SHEET 28 FAN/HWMO KB/USB D

co
02 BOM & PCB MODIFY HISTORY 29 ATX, FRONT PANEL

y si ial
03 BLOCK DIAGRAM 30 VCORE (PWMISL6324A+6612A)

a.
04 CPU HYPER TRANSPORT 31 POWER SEQUENCE ,EUP

op ne ent
05 CPU DDRIII MEMORY 32 NB/SB POWER, VCC12HT, VDDA25 ,VCC12_Dual
06 CPU CONTROL 33 DDR POWER, VCC18
07 CPU POWER & GND 34 REALTK RTL8111D

t C do id
C
08 DDRIII CHANNEL A 35 TI TSB43AB23 1394A C

no-in onf
09 DDRIII CHANNEL B
10 RS880 HT-LINK I/F
11 RS880 PCIE I/F

Do si e C
12 RS880 SYSTEM I/F
13 RS880 STRAP ,SPMEM
14
15
RS880 POWER & GND
RTM880T-792
kn y
t
gab
B B

16 ATI SB710 PCIE/PCI/CPU/LPC


i
17 ATI SB710 ACPI/USB/GPIO/AUDIO
18 ATI SB710 SATA/SPI/IDE/HWM
Gi

19 ATI SB710 POWER & GND


te

20 PCI EXPRESS x16 ,x1


21 PCI SLOT 1, 2
w.

22 RGB Connector
23 IDE ,FDD ,HDMI ,DVI Connector
ww

A A

24 COM/F_USB
25 ALC892R Title
COVER SHEET
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1

Model Name:GA-880GM-UD2H Circuit or PCB layout change for next version


Version: 1.0 Date Change Item Reason
Component value change history P-Code: U99004-0 2010.01.20 Rev0.1 Gerber-out Modify from GA-MA785GMT-US2H

m
D D

Date Change Item Reason 2010.02.11 Rev1.0 Gerber-out Change 5VSB Q31 to TO252

co
2010.01.21 0.1 New BOM Release. Modify from 9MMA785TS-00-11B 2010.02.11 Rev1.0 Gerber-out Share PCB with GA-880GM-US2H

y si ial
2010.02.12 1.0A BOM Release. Change 5VSB Q31 to TO252

Change 固固固固

a.
2010.02.12 1.0A BOM Release.

op ne ent
t C do id
C C

no-in onf
Do si e C
t
kn y
gab
B B
i
Gi
te
w.
ww

A A

Title
BOM & PCB HISTORY
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1

RS880 CUSTOMER DESKTOP REFERENCE DESIGN


DDRIII 1066,1333 UNBUFFERED UNBUFFERED
AMD DDRIII DIMM1
8
DDRIII DIMM3
8

128bit
AM3

m
D D
Clock
Generator AM3 SOCKET DDRIII 1066,1333 UNBUFFERED UNBUFFERED

co
DDRIII DIMM2 DDRIII DIMM4
RTM880T-792 15 4,5,6,7 9 9

y si ial
HyperTransport 16x16 DDRIII FIRST LOGICAL DIMM DDRIII SECOND LOGICAL DIMM

OUT
LINK

IN
DVI
23

a.
FRAME BUFFER
HDMI TMDS/HDMI ATI NB DDR3

op ne ent
23 RS880P(880G) 1Gbit / 64Mx16
Side-Port Memory
HyperTransport LINK0 CPU I/F 128MB
13
1 16X PCIE VIDEO I/F DESKTOP AM2/AM2g2 RS780 CORE & PCIE
POWER POWER
6 1X PCIE I/F
30 32
1 4X PCIE I/F WITH SB I2C I/F BOOTSTRAPS
VGA RGB

t C do id
ROM(NB)
CON 22 DX10 IGP 13
DDR2 MEMORY SB710 CORE & PCIE
PCIE SLOT 16X
POWER POWER
C 16X 20 33 32 C

no-in onf
1X PCIE INTERFACE

10,11,12,13,14

Do si e C
GIGABIT PCIE SLOT 4X
RTL8111D 34 1X 20 PCIE

ATI SB
USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 USB 2.0 SB710 ALC892R CODEC
HD AUDIO I/F
28 28 34 34 35 35 USB2.0

USB-6 USB-7 USB-8 USB-9


kn y
USB-10
t USB-11
SATA II
AZALIA
ATA 66/100/133
SATA II I/F
SATA#0
18
25, 26

SATA#1
18
SATA#2
18
SATA#3
18
SATA#4
18
SATA#5
35
gab
B B
24 24 24 24 24 24 ACPI
i
LPC I/F
ATA 66/100/133 I/F IDE
INT RTC 23
HW MONITOR
PCI BUS SPI
16,17,18,19 SPI I/F Dual-BIOS
Gi

18
te

TI TSB43AB23 PCI SLOT PCI SLOT


1394a 35 #1 21 #2 21
LPC BUS
SB_SPI_CS ITE_SPI_CS1/2
w.

ITE LPC SIO


IT8720 27
ww

A A

FLOPPY KBD HW
28 Title
MOUSE MONITOR
23 28 BLOCK DIAGRAM
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 3 of 35
5 4 3 2 1
L0_CADIN_L[0..15]

L0_CADIN_H[0..15]
L0_CADIN_L[0..15]

L0_CADIN_H[0..15]
10

10
CPU_VDD_RUN = VCORE
L0_CADOUT_L[0..15]
L0_CADOUT_L[0..15] 10 CPU_VDDA_RUN = VDDA25
L0_CADOUT_H[0..15]
L0_CADOUT_H[0..15] 10
VLDT_RUN = VCC12_HT

m
CPU_VDDIO_SUS = DDR15V

co
CPU_VDDR = CPU_VDDR12

y si ial
M2CPUA
VLDT_A = VCC12_HT

a.
HYPERTRANSPORT
L0_CLKIN_H1 N6 AD5 L0_CLKOUT_H1
10
10
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_L1
L0_CLKIN_H0
P6
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1) AD4 L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_H1
L0_CLKOUT_L1
10
10 VLDT_B = HT12B

op ne ent
10 L0_CLKIN_H0 N3 L0_CLKIN_H(0) L0_CLKOUT_H(0) AD1 L0_CLKOUT_H0 10
L0_CLKIN_L0 N2 AC1 L0_CLKOUT_L0
10 L0_CLKIN_L0 L0_CLKIN_L(0) L0_CLKOUT_L(0) L0_CLKOUT_L0 10
L0_CTLIN_H1 V4 Y6 L0_CTLOUT_H1
10 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H(1) L0_CTLOUT_H(1) L0_CTLOUT_L1 L0_CTLOUT_H1 10
10 L0_CTLIN_L1 V5 L0_CTLIN_L(1) L0_CTLOUT_L(1) W6 L0_CTLOUT_L1 10
L0_CTLIN_H0 U1 W2 L0_CTLOUT_H0
10 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H(0) L0_CTLOUT_H(0) L0_CTLOUT_L0 L0_CTLOUT_H0 10
10 L0_CTLIN_L0 V1 L0_CTLIN_L(0) L0_CTLOUT_L(0) W3 L0_CTLOUT_L0 10
L0_CADIN_H15 U6 Y5 L0_CADOUT_H15
L0_CADIN_L15 L0_CADIN_H(15) L0_CADOUT_H(15) L0_CADOUT_L15
V6 L0_CADIN_L(15) L0_CADOUT_L(15) Y4
L0_CADIN_H14 T4 AB6 L0_CADOUT_H14
L0_CADIN_H(14) L0_CADOUT_H(14)

t C do id
L0_CADIN_L14 T5 AA6 L0_CADOUT_L14
L0_CADIN_H13 L0_CADIN_L(14) L0_CADOUT_L(14) L0_CADOUT_H13
R6 L0_CADIN_H(13) L0_CADOUT_H(13) AB5
L0_CADIN_L13 T6 AB4 L0_CADOUT_L13
L0_CADIN_H12 L0_CADIN_L(13) L0_CADOUT_L(13) L0_CADOUT_H12
P4 L0_CADIN_H(12) L0_CADOUT_H(12) AD6
L0_CADIN_L12 P5 AC6 L0_CADOUT_L12
L0_CADIN_H11 L0_CADIN_L(12) L0_CADOUT_L(12) L0_CADOUT_H11
M4 L0_CADIN_H(11) L0_CADOUT_H(11) AF6
L0_CADIN_L11 M5 AE6 L0_CADOUT_L11
L0_CADIN_L(11) L0_CADOUT_L(11)

no-in onf
L0_CADIN_H10 L6 AF5 L0_CADOUT_H10
L0_CADIN_L10 L0_CADIN_H(10) L0_CADOUT_H(10) L0_CADOUT_L10
M6 L0_CADIN_L(10) L0_CADOUT_L(10) AF4
L0_CADIN_H9 K4 AH6 L0_CADOUT_H9
L0_CADIN_L9 L0_CADIN_H(9) L0_CADOUT_H(9) L0_CADOUT_L9
K5 L0_CADIN_L(9) L0_CADOUT_L(9) AG6
L0_CADIN_H8 J6 AH5 L0_CADOUT_H8
L0_CADIN_L8 L0_CADIN_H(8) L0_CADOUT_H(8) L0_CADOUT_L8
K6 L0_CADIN_L(8) L0_CADOUT_L(8) AH4

L0_CADIN_H7 U3 Y1 L0_CADOUT_H7
L0_CADIN_L7 L0_CADIN_H(7) L0_CADOUT_H(7) L0_CADOUT_L7
U2 L0_CADIN_L(7) L0_CADOUT_L(7) W1
L0_CADIN_H6 R1 AA2 L0_CADOUT_H6
L0_CADIN_L6 L0_CADIN_H(6) L0_CADOUT_H(6) L0_CADOUT_L6
T1 L0_CADIN_L(6) L0_CADOUT_L(6) AA3
L0_CADIN_H5 L0_CADOUT_H5

Do si e C
R3 L0_CADIN_H(5) L0_CADOUT_H(5) AB1
L0_CADIN_L5 R2 AA1 L0_CADOUT_L5
L0_CADIN_H4 L0_CADIN_L(5) L0_CADOUT_L(5) L0_CADOUT_H4
N1 L0_CADIN_H(4) L0_CADOUT_H(4) AC2
L0_CADIN_L4 P1 AC3 L0_CADOUT_L4
L0_CADIN_H3 L0_CADIN_L(4) L0_CADOUT_L(4) L0_CADOUT_H3
L1 L0_CADIN_H(3) L0_CADOUT_H(3) AE2
L0_CADIN_L3 M1 AE3 L0_CADOUT_L3
L0_CADIN_H2 L0_CADIN_L(3) L0_CADOUT_L(3) L0_CADOUT_H2
L3 L0_CADIN_H(2) L0_CADOUT_H(2) AF1
L0_CADIN_L2 L2 AE1 L0_CADOUT_L2
L0_CADIN_H1 L0_CADIN_L(2) L0_CADOUT_L(2) L0_CADOUT_H1
J1 L0_CADIN_H(1) L0_CADOUT_H(1) AG2
L0_CADIN_L1 K1 AG3 L0_CADOUT_L1
L0_CADIN_H0 L0_CADIN_L(1) L0_CADOUT_L(1) L0_CADOUT_H0
J3 L0_CADIN_H(0) L0_CADOUT_H(0) AH1
L0_CADIN_L0 J2 AG1 L0_CADOUT_L0

t
L0_CADIN_L(0) L0_CADOUT_L(0)
CPU-SK/941AM3/S/GF/[10SC1-A01941-01R]
kn y
gab
i
M2CPU

AM2RM/PP/BU/PB/[12KRC-04K812-12R]
Gi
te
w.
ww

Title
CPU HYPER TRANSPORT
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 4 of 35
M2CPUC
M2CPUB
MEMORY INTERFACE B
AJ19 AH13 MDB63
MEMORY INTERFACE A MB0_CLK_H(2) MB_DATA(63) MDB[0..63] 9
AG21 AE14 MDA63 AK19 AL13 MDB62
MA0_CLK_H(2) MA_DATA(63) MDA[0..63] 8 MB0_CLK_L(2) MB_DATA(62)
AG20 AG14 MDA62 A18 AL15 MDB61
MA0_CLK_L(2) MA_DATA(62) MDA61 MB0_CLK_H(1) MB_DATA(61) MDB60
G19 MA0_CLK_H(1) MA_DATA(61) AG16 A19 MB0_CLK_L(1) MB_DATA(60) AJ15
H19 AD17 MDA60 B11P DCLKB3 U31 AF13 MDB59
DCLKA3 MA0_CLK_L(1) MA_DATA(60) MDA59 9 DCLKB3 -DCLKB3 MB0_CLK_H(0) MB_DATA(59) MDB58
A11P 8 DCLKA3 U27 MA0_CLK_H(0) MA_DATA(59) AD13 B11N 9 -DCLKB3 U30 MB0_CLK_L(0) MB_DATA(58) AG13
A11N -DCLKA3 U26 AE13 MDA58 AL14 MDB57
8 -DCLKA3 MA0_CLK_L(0) MA_DATA(58) MB_DATA(57)
AG15 MDA57 -CSB1 AE30 AK15 MDB56
-CSA1 MA_DATA(57) MDA56 9 -CSB1 -CSB0 MB0_CS_L(1) MB_DATA(56) MDB55
AC25 AE16 AC31 AL16

m
8 -CSA1 MA0_CS_L(1) MA_DATA(56) 9 -CSB0 MB0_CS_L(0) MB_DATA(55)
-CSA0 AA24 AG17 MDA55 AL17 MDB54
8 -CSA0 MA0_CS_L(0) MA_DATA(55) MDA54 MODT_B0 AD29 MB_DATA(54) MDB53
MA_DATA(54) AE18 9 MODT_B0 MB0_ODT(0) MB_DATA(53) AK21
MODT_A0 AC28 AD21 MDA53 AL21 MDB52
8 MODT_A0 MA0_ODT(0) MA_DATA(53) MB_DATA(52)
AG22 MDA52 AL19 AH15 MDB51

co
MA_DATA(52) MDA51 MB1_CLK_H(2) MB_DATA(51) MDB50
AE20 MA1_CLK_H(2) MA_DATA(51) AE17 AL18 MB1_CLK_L(2) MB_DATA(50) AJ16
AE19 AF17 MDA50 C19 AH19 MDB49
MA1_CLK_L(2) MA_DATA(50) MDA49 MB1_CLK_H(1) MB_DATA(49) MDB48
G20 MA1_CLK_H(1) MA_DATA(49) AF21 D19 MB1_CLK_L(1) MB_DATA(48) AL20

y si ial
G21 AE21 MDA48 DCLKB0 W29 AJ22 MDB47
MA1_CLK_L(1) MA_DATA(48) 9 DCLKB0 MB1_CLK_H(0) MB_DATA(47)
A00P DCLKA0 V27 AF23 MDA47 B00P -DCLKB0 W28 AL22 MDB46
8 DCLKA0 -DCLKA0 MA1_CLK_H(0) MA_DATA(47) MDA46 9 -DCLKB0 MB1_CLK_L(0) MB_DATA(46) MDB45
A00N 8 -DCLKA0 W27 MA1_CLK_L(0) MA_DATA(46) AE23 B00N MB_DATA(45) AL24
AJ26 MDA45 AE29 AK25 MDB44
MA_DATA(45) 9 -CSB3 MB1_CS_L(1) MB_DATA(44)
AD27 AG26 MDA44 AB31 AJ21 MDB43
8 -CSA3 MA1_CS_L(1) MA_DATA(44) 9 -CSB2 MB1_CS_L(0) MB_DATA(43)

a.
AA25 AE22 MDA43 AH21 MDB42
8 -CSA2 MA1_CS_L(0) MA_DATA(43) MB_DATA(42)
AG23 MDA42 MODT_B2 AD31 AH23 MDB41
MA_DATA(42) 9 MODT_B2 MB1_ODT(0) MB_DATA(41)
MODT_A2 AC27 AH25 MDA41 AJ24 MDB40
8 MODT_A2 MA1_ODT(0) MA_DATA(41) MB_DATA(40)
MDA40 MDB39

op ne ent
MA_DATA(40) AF25 MB_DATA(39) AL27
AJ28 MDA39 -SCASB AC29 AK27 MDB38
MA_DATA(39) 9 -SCASB MB_CAS_L MB_DATA(38)
-SCASA AB25 AJ29 MDA38 -SWEB AC30 AH31 MDB37
8 -SCASA MA_CAS_L MA_DATA(38) 9 -SWEB MB_WE_L MB_DATA(37)
-SWEA AB27 AF29 MDA37 -SRASB AB29 AG30 MDB36
8 -SWEA -SRASA MA_WE_L MA_DATA(37) MDA36 9 -SRASB MB_RAS_L MB_DATA(36) MDB35
8 -SRASA AA26 MA_RAS_L MA_DATA(36) AE26 MB_DATA(35) AL25
AJ27 MDA35 SBAB2 N31 AL26 MDB34
SBAA2 MA_DATA(35) MDA34 9 SBAB2 SBAB1 MB_BANK(2) MB_DATA(34) MDB33
8 SBAA2 N25 MA_BANK(2) MA_DATA(34) AH27 9 SBAB1 AA31 MB_BANK(1) MB_DATA(33) AJ30
SBAA1 Y27 AG29 MDA33 SBAB0 AA28 AJ31 MDB32
8 SBAA1 MA_BANK(1) MA_DATA(33) 9 SBAB0 MB_BANK(0) MB_DATA(32)
SBAA0 AA27 AF27 MDA32 E31 MDB31
8 SBAA0 MA_BANK(0) MA_DATA(32) MDA31 CKEB1 MB_DATA(31) MDB30
MA_DATA(31) E29 9 CKEB1 M31 MB_CKE(1) MB_DATA(30) E30
CKEA1 L27 E28 MDA30 CKEB0 M29 B27 MDB29
8 CKEA1 MA_CKE(1) MA_DATA(30) 9 CKEB0 MB_CKE(0) MB_DATA(29)

t C do id
CKEA0 M25 D27 MDA29 A27 MDB28
8 CKEA0 MA_CKE(0) MA_DATA(29) MB_DATA(28)
C27 MDA28 MAAB15 N28 F29 MDB27
MAAA15 MA_DATA(28) MDA27 9 MAAB[0..15] MAAB14 MB_ADD(15) MB_DATA(27) MDB26
M27 MA_ADD(15) MA_DATA(27) G26 N29 MB_ADD(14) MB_DATA(26) F31
8 MAAA[0..15] MAAA14 N24 F27 MDA26 MAAB13 AE31 A29 MDB25
MAAA13 MA_ADD(14) MA_DATA(26) MDA25 MAAB12 MB_ADD(13) MB_DATA(25) MDB24
AC26 MA_ADD(13) MA_DATA(25) C28 N30 MB_ADD(12) MB_DATA(24) A28
MAAA12 N26 E27 MDA24 MAAB11 P29 A25 MDB23
MAAA11 MA_ADD(12) MA_DATA(24) MDA23 MAAB10 MB_ADD(11) MB_DATA(23) MDB22
P25 MA_ADD(11) MA_DATA(23) F25 AA29 MB_ADD(10) MB_DATA(22) A24

no-in onf
MAAA10 Y25 E25 MDA22 MAAB9 P31 C22 MDB21
MAAA9 MA_ADD(10) MA_DATA(22) MDA21 MAAB8 MB_ADD(9) MB_DATA(21) MDB20
N27 MA_ADD(9) MA_DATA(21) E23 R29 MB_ADD(8) MB_DATA(20) D21
MAAA8 R24 D23 MDA20 MAAB7 R28 A26 MDB19
MAAA7 MA_ADD(8) MA_DATA(20) MDA19 MAAB6 MB_ADD(7) MB_DATA(19) MDB18
P27 MA_ADD(7) MA_DATA(19) E26 R31 MB_ADD(6) MB_DATA(18) B25
MAAA6 R25 C26 MDA18 MAAB5 R30 B23 MDB17
MAAA5 MA_ADD(6) MA_DATA(18) MDA17 MAAB4 MB_ADD(5) MB_DATA(17) MDB16
R26 MA_ADD(5) MA_DATA(17) G23 T31 MB_ADD(4) MB_DATA(16) A22
MAAA4 R27 F23 MDA16 MAAB3 T29 B21 MDB15
MAAA3 MA_ADD(4) MA_DATA(16) MDA15 MAAB2 MB_ADD(3) MB_DATA(15) MDB14
T25 MA_ADD(3) MA_DATA(15) E22 U29 MB_ADD(2) MB_DATA(14) A20
MAAA2 U25 E21 MDA14 MAAB1 U28 C16 MDB13
MAAA1 MA_ADD(2) MA_DATA(14) MDA13 MAAB0 MB_ADD(1) MB_DATA(13) MDB12
T27 MA_ADD(1) MA_DATA(13) F17 AA30 MB_ADD(0) MB_DATA(12) D15
MAAA0 W24 G17 MDA12 C21 MDB11
MA_ADD(0) MA_DATA(12) MDA11 DQSB7 MB_DATA(11) MDB10

Do si e C
MA_DATA(11) G22 AK13 MB_DQS_H(7) MB_DATA(10) A21
DQSA7 AD15 F21 MDA10 -DQSB7 AJ13 A17 MDB9
-DQSA7 MA_DQS_H(7) MA_DATA(10) MDA9 DQSB6 MB_DQS_L(7) MB_DATA(9) MDB8
AE15 MA_DQS_L(7) MA_DATA(9) G18 AK17 MB_DQS_H(6) MB_DATA(8) A16
DQSA6 AG18 E17 MDA8 -DQSB6 AJ17 B15 MDB7
-DQSA6 MA_DQS_H(6) MA_DATA(8) MDA7 DQSB5 MB_DQS_L(6) MB_DATA(7) MDB6
AG19 MA_DQS_L(6) MA_DATA(7) G16 AK23 MB_DQS_H(5) MB_DATA(6) A14
DQSA5 AG24 E15 MDA6 -DQSB5 AL23 E13 MDB5
-DQSA5 MA_DQS_H(5) MA_DATA(6) MDA5 DQSB4 MB_DQS_L(5) MB_DATA(5) MDB4
AG25 MA_DQS_L(5) MA_DATA(5) G13 AL28 MB_DQS_H(4) MB_DATA(4) F13
DQSA4 AG27 H13 MDA4 -DQSB[0..8] -DQSB4 AL29 C15 MDB3
-DQSA4 MA_DQS_H(4) MA_DATA(4) MDA3 -DQSB[0..8] 9 DQSB3 MB_DQS_L(4) MB_DATA(3) MDB2
AG28 MA_DQS_L(4) MA_DATA(3) H17 D31 MB_DQS_H(3) MB_DATA(2) A15
-DQSA[0..8] DQSA3 D29 E16 MDA2 DQSB[0..8] DQSB[0..8] 9 -DQSB3 C31 A13 MDB1
-DQSA[0..8] 8 -DQSA3 MA_DQS_H(3) MA_DATA(2) MDA1 DQSB2 MB_DQS_L(3) MB_DATA(1) MDB0
C29 MA_DQS_L(3) MA_DATA(1) E14 C24 MB_DQS_H(2) MB_DATA(0) D13
DQSA[0..8] DQSA2 C25 G14 MDA0 MB_CK[0..8] -DQSB2 C23
MA_CK[0..8]

DMA[0:8]
DQSA[0..8]

MA_CK[0..8] 8

DMA[0..8] 8
8 -DQSA2
DQSA1
-DQSA1
DQSA0
-DQSA0
D25
E19
F19
F15
G15
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
kn y
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
t MA_DATA(0)

MA_DQS_H(8)
MA_DQS_L(8)

MA_DM(8)
J28
J27

J25
DQSA8
-DQSA8

DMA8
DMB[0..8]
MB_CK[0..8]

DMB[0..8] 9
9 DQSB1
-DQSB1
DQSB0
-DQSB0

DMB7
D17
C17
C14
C13

AJ14
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MB_DM(7)
MB_DQS_H(8)
MB_DQS_L(8)

MB_DM(8)

MB_CHECK(7)
J31
J30

J29

K29
DQSB8
-DQSB8

DMB8

MB_CK7
gab
DMA7 AF15 K25 MA_CK7 DMB6 AH17 K31 MB_CK6
DMA6 MA_DM(7) MA_CHECK(7) MA_CK6 DMB5 MB_DM(6) MB_CHECK(6) MB_CK5
AF19 MA_DM(6) MA_CHECK(6) J26 AJ23 MB_DM(5) MB_CHECK(5) G30
DMA5 AJ25 G28 MA_CK5 DMB4 AK29 G29 MB_CK4
DMA4 MA_DM(5) MA_CHECK(5) MA_CK4 DMB3 MB_DM(4) MB_CHECK(4) MB_CK3
AH29 G27 C30 L29
i
DMA3 MA_DM(4) MA_CHECK(4) MA_CK3 DMB2 MB_DM(3) MB_CHECK(3) MB_CK2
B29 MA_DM(3) MA_CHECK(3) L24 A23 MB_DM(2) MB_CHECK(2) L28
DMA2 E24 K27 MA_CK2 DMB1 B17 H31 MB_CK1
DMA1 MA_DM(2) MA_CHECK(2) MA_CK1 DMB0 MB_DM(1) MB_CHECK(1) MB_CK0
E18 MA_DM(1) MA_CHECK(1) H29 B13 MB_DM(0) MB_CHECK(0) G31
DMA0 H15 H27 MA_CK0
MA_DM(0) MA_CHECK(0) CPU-SK/941AM3/S/GF/[10SC1-A01941-01R]
CPU-SK/941AM3/S/GF/[10SC1-A01941-01R]
Gi

MEM CHB
te

MEM CHA
w.

CPU
CPU
ww

TO DIMMB0 & DIMMB1


TO DIMMA0 & DIMMA1 Title
CPU DDRIII MEMORY
B0 B1 Size Document Number Rev
A0 A1 Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 5 of 35
-CPURST

C1798
100P/4/NPO/50V/J

2.5V/0.5A

VDDA25 FB1 0/6


DDR15V

C3 C13 C4

m
4.7U/8/X5R/6.3V/K 0.22U/6/X7R/16V/K
3.3n/4/X7R/50V/K M2CPUD
SB600 DDR15V C10
MISC
R2555 R2557 R57

co
VDDA1
CPU_PWR / DDR18V CPUCLK0_H
3.9n/4/X7R/50V/K
C1 CLKIN_H
D10 VDDA2
1K/4/1 1K/4/1 300/4 3VDUAL
15 CPUCLK0_H
-CPURST R26 300/4 A8 CLKIN_H

y si ial
R5 B8
-LDT_STOP R36 300/4 CPUCLK0_L C2 169/4/1 CLKIN_L CLKIN_L R59
15 CPUCLK0_L
CPU_PWRGD C9 D2 8.2K/4/1
C61 150P/4/NPO/50V/J 3.9n/4/X7R/50V/K -LDT_STOP PWROK VID(5)
12,16 -LDT_STOP D8 LDTSTOP_L VID(4) D1
For AM2 CPU hang at E1/F2/F5 12,16 -CPURST -CPURST C7 C1 THERMTRIP_CPU_L
RESET_L VID(3) VID3 30 THERMTRIP_CPU_L 17

a.
R89 0/4/SHT/X E3
17 CPU_CRST- VID(2) VID2 30

3
CPU_PRESENT_L AL3 E2 Q9
3VDUAL VCC3 CPU_PRESENT_L VID(1) VID1 30
E1
R17 1K/4/1
* VID(0) VID0 30

op ne ent
DDR15V
R8 22/4/X SIC AL6 AK7 THERMTRIP_L MMBT2222A/SOT23/600mA/40
27 SI_CLK SIC THERMTRIP_L SOT23
R9 22/4/X SID AK6 AL7
27 SI_DAT

1
R2506 R2507 R19 300/4/X SID PROCHOT_L R176 1K/4/1 R175 1K/4/1
8.2K/4/1 8.2K/4/1
DDR15V
*
17 CPU_TDI
CPU_TDI AL10 TDI TDO AK10 CPU_TDO CPU_TDO 17
DDR15V

3
CPU_TRST- Q10
17 CPU_TRST- CPU_TCK
AJ10
AH10
TRST_L Erratum 133, Revision Guide for
DDR15V PWM_PWRGD 30 17 CPU_TCK TCK
17 CPU_TMS
CPU_TMS AL9 TMS AMD NPT 0Fh Processors
3

MMBT2222A/SOT23/600mA/40
Q309 Q310 C1752 CPU_DBREQ- A5 B6 CPU_DBRDY SOT23
17 CPU_DBREQ- CPU_DBRDY 17

1
D D 0.1u/4/Y5V/16V/Z/X DBREQ_L DBRDY R174 1K/4/1 DDR15V

t C do id
R2756 G2 AK11
G S G S 30 COREFB+ VDD_FB_H VDDIO_FB_H
300/4 G1 AL11
30,32 COREFB- VDD_FB_L VDDIO_FB_L DDR15V CPU_TEST26 R37 300/4/X
*
2

R1 1K/4/1 E12 F1 CPU_PSI- TP1


16 CPU_PG_SB VTT_SENSE PSI_L
2N7002/SOT23/25pF/5 VTT_SENSE AM3 only, may not use, like AM2 CPU_PRESENT_L R49 10K/4/1
MMBT2222A/SOT23/600mA/40 F12 V8 R53 44.2/4/1 R60 CPU_TEST25_H R42 510/4/1
CPU_M_VREF M_VREF HTREF1 VCC_SB
*

no-in onf
R11 39.2/4/1 AH11 V7 R54 44.2/4/1 300/4
DDR15V DDR15V M_ZN HTREF0 CPU_TEST25_L
R12 39.2/4/1 AJ11 R43 510/4/1
M_ZP
CPU_TEST25_H A10 C11 R55 80.6/4/1 -PROCHOT R190 -PROCHOT_CPU
0/4/SHT/X
TEST25_H TEST29_H -PROCHOT_CPU 16
CPU_TEST25_L B10 D11 CPU_TEST21 R47 300/4
R2754 R13 300/4 TEST25_L TEST29_L
F10 TEST19 Route as 80-Ohm differential impedance
300/4 R14 300/4 E9 Keep trace to resistor less than 1" from CPU pin
TEST18
CPU_PWRGD
AJ7
F6
TEST13 Erratum 133, Revision Guide for
TEST9
AMD NPT 0Fh Processors GND
3

D6 AK8 CPU_TEST24 DDR15V


Q355 C1790 TEST17 TEST24

Do si e C
E7 TEST16 TEST23 AH8
D 0.1u/4/Y5V/16V/Z/X R2725 300/4 CPU_TEST22 CPU_TEST27 R2728 300/4
F8 TEST15 TEST22 AJ9
R2726 300/4 C5 AL8 CPU_TEST21
G S R2727 300/4 TEST14 TEST21 CPU_TEST20 CPU_TEST20 R2729 300/4
AH9 TEST12 TEST20 AJ8
CPU_TEST22 R2730 300/4
2

E5 J10 CPU_TEST24 R2731 300/4


TEST7 TEST28_H
AJ5 TEST6 TEST28_L H9
2N7002/SOT23/25pF/5 AG9 AK9 CPU_TEST27
27 GNDA THERMDC TEST27 CPU_TEST26
27,28 TMPIN2 AG8 THERMDA TEST26 AK5
DDR15V GND
AH7 G7
CPUVREF AJ6
TEST3
TEST2
TEST10
TEST8 D4 M2CPUE AM3 only
INTERNAL MISC

40 MILS WIDTH
CPU_M_VREF
SR19
15/4/1
kn y
t CPU-SK/941AM3/S/GF/[10SC1-A01941-01R]
LAYOUT: Route trace 50 mils wide and
L25
L26
L31
L30
RSVD1
RSVD2
RSVD3
RSVD4
MA_RESET-
MB_RESET-

RSVD19
RSVD20
RSVD21
E20
B19

AL4
AK4
AK3
MA_RESET_L
MB_RESET_L

*
MA_RESET_L 8
MB_RESET_L 9
gab
500 to 750 mils long between these caps. AM3 only F2
RSVD22
M_VDDIO_PWRGD F3 M_VDDIO_PWRGD AM3 only
A10P DCLKA2 W26
i
8 DCLKA2 DCLKA2
1

SBC12 SBC31 A10N -DCLKA2 W25 G4


8 -DCLKA2 DCLKA2- COREFB_NB+
SC35 SR20 MODT_A3 AE27 G3
8 MODT_A3 MODT_A3 COREFB_NB-
1U/6/X7R/16V/K 15/4/1 A01P DCLKA1 U24 G5 CORE_TYPE_DET R2448 1K/4/1 DDR15V
8 DCLKA1
2

1N/4/X7R/50V/K -DCLKA1 DCLKA1 CORE_TYP_DET


A01N 8 -DCLKA1 V24 DCLKA1-
MODT_A1 AE28 AD25
8 MODT_A1 MODT_A1 RSVD27
RSVD28 AE24
RSVD29 AE25
0.1u/4/X7R/16V/K AJ18 AM2: high, AM2R2: low
RSVD30
Gi

AM3 only RSVD31 AJ20


Layout: Place within RSVD32 C18
B10P DCLKB2 Y31 C20 AM3 =>DRAM Thermal Event Status
500mils of the CPU socket. 9 DCLKB2
-DCLKB2 DCLKB2 RSVD33
B10N 9 -DCLKB2 Y30 DCLKB2- RSVD34 G24
te

MODT_B3 AG31 G25 R103 1K/4/1


9 MODT_B3 MODT_B3 RSVD35 DDR15V
B01P DCLKB1 V31 H25
9 DCLKB1 DCLKB1 RSVD36
B01N -DCLKB1 W31 V29 MB_EVENT_L Layout: Route as 60 ohms
9 -DCLKB1 MODT_B1 DCLKB1- MB_EVENT_L MA_EVENT_L MB_EVENT_L 9
9 MODT_B1 AF31 MODT_B1 MA_EVENT_L W30 MA_EVENT_L 8 with 5/10 W/S from CPU pins.
R102 1K/4/1 DDR15V
EVENT pins are for future AM3r2
w.
ww

Title
CPU CONTROL
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 6 of 35
VCORE_NB
VLDT_RUN_B is connected to the VLDT_RUN power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package. C1347 C1344 C1343 C1342 C1345 C1346
M2CPUF VCORE M2CPUI 22u/8/X5R/6.3V/M 0.1u/4/X7R/16V/K 180P/4/NPO/50V/J
VDD1 M2CPUG VCORE M2CPUH HT12B 22u/8/X5R/6.3V/M 1U/6/X7R/16V/K 0.01U/4/X7R/25V/K
A4 A3 VCC_SB

m
VDDIO
VDD1 VSS1
VCORE_NB A6 VDD2 VSS2 A7 VDD2 VDD3 AJ4 VLDT_A1 VLDT_B1 H6
AA8 A9 L14 AK20 AA20 N17 AJ3 H5 GND
VCORE VDD3 VSS3 VDD1 VSS1 VDD1 VSS1 VLDT_A2 VLDT_B2
AA10 A11 L16 AK22 AA22 N19 AJ2 H2 BC795
VDD4 VSS4 VDD2 VSS2 VDD2 VSS2 VLDT_A3 VLDT_B3 4.7U/8/X5R/6.3V/K
AA12 AA4 L18 AK24 AB13 N21 AJ1 H1

co
VDD5 VSS5 VDD3 VSS3 VDD3 VSS3 VCC_SB VLDT_A4 VLDT_B4 VCC_SB
AA14 VDD6 VSS6 AA5 M2 VDD4 VSS4 AK26 AB15 VDD4 VSS4 N23
AA16 VDD7 VSS7 AA7 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 D12 VDDR_4 VDDR_5 AG12
GND DDR15V
AA18 AA9 M7 AK30 AB19 P3 C12 AH12
VDD8 VSS8 VDD6 VSS6 VDD6 VSS6 VDDR_3 VDDR_6 BUTTOM SIDE

y si ial
AB7 VDD9 VSS9 AA11 M9 VDD7 VSS7 AL5 AB21 VDD7 VSS7 P8 B12 VDDR_2 VDDR_7 AJ12
AB9 AA13 M11 B4 AB23 P10 DDR15V A12 AK12
VDD10 VSS10 VDD8 VSS8 VDD8 VSS8 VDDR_1 VDDR_8
AB11 VDD11 VSS11 AA15 M13 VDD9 VSS9 B9 AC12 VDD9 VSS9 P12 VDDR_9 AL12
AC4 VDD12 VSS12 AA17 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 AB24 VDDIO1
AC5 AA19 M17 B14 AC16 P16 AB26 K24 SC2 SC4 SC5 SC6
VDD13 VSS13 VDD11 VSS11 VDD11 VSS11 VDDIO2 VSS1

a.
AC8 AA21 M19 B16 AC18 P18 AB28 K26 0.22U/6/X7R/16V/K 0.01U/4/X7R/25V/K
VDD14 VSS14 VDD12 VSS12 VDD12 VSS12 VDDIO3 VSS2 0.22U/6/X7R/16V/K 180P/4/NPO/50V/J
AC10 VDD15 VSS15 AA23 N8 VDD13 VSS13 B18 AC20 VDD13 VSS13 P20 AB30 VDDIO4 VSS3 K28
AD2 VDD16 VSS16 AB2 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AC24 VDDIO5 VSS4 K30

op ne ent
AD3 VDD17 VSS17 AB3 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AD26 VDDIO6 VSS5 L7
AD7 AB8 N14 B24 AD23 R9 AD28 L9 GND
VDD18 VSS18 VDD16 VSS16 VDD16 VSS16 VDDIO7 VSS6
AD9 VDD19 VSS19 AB10 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD30 VDDIO8 VSS7 L11
AE10 AB12 N18 B28 AF11 R13 AF30 L13 DDR15V
VDD20 VSS20 VDD18 VSS18 VDD18 VSS18 VDDIO29 VSS8
AF7 VDD21 VSS21 AB14 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 M24 VDDIO9 VSS9 L15
AF9 VDD22 VSS22 AB16 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M26 VDDIO10 VSS10 L17
AG4 VDD23 VSS23 AB18 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M28 VDDIO11 VSS11 L19
AG5 VDD24 VSS24 AB20 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M30 VDDIO12 VSS12 L21
AG7 AB22 P15 D18 N20 R23 P24 L23 SC9 SC10 SC7 SC8 SC31
VDD25 VSS25 VDD23 VSS23 VDD23 VSS23 VDDIO13 VSS13 22u/8/X5R/6.3V/M 4.7U/8/X5R/6.3V/K 180P/4/NPO/50V/J
AH2 VDD26 VSS26 AC7 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P26 VDDIO14 VSS14 M8
AH3 AC9 P19 D22 P21 T10 P28 M10 22u/8/X5R/6.3V/M 4.7U/8/X5R/6.3V/K
VDD27 VSS27 VDD25 VSS25 VDD25 VSS25 VDDIO15 VSS15

t C do id
B3 VDD28 VSS28 AC11 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P30 VDDIO16 VSS16 M12
B5 VDD29 VSS29 AC13 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 T24 VDDIO17 VSS17 M14
B7 AC15 R8 D28 T23 T16 T26 M16 GND
VCORE_NB VDD30 VSS30 VDD28 VSS28 VDD28 VSS28 VDDIO18 VSS18
VCORE C2 VDD31 VSS31 AC17 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T28 VDDIO19 VSS19 M18
C4 VDD32 VSS32 AC19 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T30 VDDIO20 VSS20 M20
C6 VDD33 VSS33 AC21 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 V25 VDDIO21 VSS21 M22
VCORE_NB C8 VDD34 VSS34 AC23 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V26 VDDIO22 VSS22 N4

no-in onf
VCORE D3 VDD35 VSS35 AD8 R18 VDD33 VSS33 F16 VSS33 U5 V28 VDDIO23 VSS23 N5
D5 VDD36 VSS36 AD10 R20 VDD34 VSS34 F18 VSS34 U7 V30 VDDIO24 VSS24 N7
D7 AD12 T2 F20 U9 Y24 N9
VCORE_NB D9
VDD37 VSS37
AD14 T3
VDD35 VSS35
F22
VSS35
U11 Y26
VDDIO25 VSS25
N11 VCORE BUTTOM SIDE
VDD38 VSS38 VDD36 VSS36 VSS36 VDDIO26 VSS26
VCORE E4 VDD39 VSS39 AD16 T7 VDD37 VSS37 F24 VSS37 U13 Y28 VDDIO27 VSS27 N13
E6 VDD40 VSS40 AD20 T9 VDD38 VSS38 F26 VSS38 U15 Y29 VDDIO28 VSS28 N15
E8 VDD41 VSS41 AD22 T11 VDD39 VSS39 F28 VSS39 U17
VCORE_NB E10 VDD42 VSS42 AD24 T13 VDD40 VSS40 F30 VSS40 U19
F5 AE4 T15 G9 U21 SC11 SC12 SC13 SC14 SC15
VCORE VDD43 VSS43 VDD41 VSS41 VSS41 GND
F7 AE5 T17 G11 U23 0.22U/6/X7R/16V/K 0.22U/6/X7R/16V/K 180P/4/NPO/50V/J
VDD44 VSS44 VDD42 VSS42 VSS42 0.22U/6/X7R/16V/K 0.01U/4/X7R/25V/K
F9 VDD45 T19 VDD43 VSS43 H8 VSS43 V2

Do si e C
VCORE_NB F11 VDD46 VSS46 AE11 T21 VDD44 VSS44 H10 VSS44 V3
VCORE G6 VDD47 VSS47 AF2 AE9 Missing pins on package U8 VDD45 VSS45 H12 VSS45 V10
G8 AF3 U10 H14 B2 V12 GND
VDD48 VSS48 and socket used for VDD46 VSS46 NB/RSVD VSS46
G10 AF8 U12 H16 V14
G12
VDD49 VSS49
AF10
mechanical keying. =>AM3 U14
VDD47 VSS47
H18 AM3 Only
VSS47
V16
VCORE_NB VDD50 VSS50 VDD48 VSS48 VSS48
VCORE H7 VDD51 VSS51 AF12 U16 VDD49 VSS49 V18
H11 VDD52 VSS52 AF14 U18 VDD50 VSS50 H24 H22 Missing pins on package H20 NP/VSS1 VSS50 V20
BUTTOM SIDE
H23 VDD53 VSS53 AF16 U20 VDD51 VSS51 H26 and socket used for AE7 NP/VSS2 VSS51 V22
J8 AF18 V9 H28 W9
J12
VDD54 VSS54
AF20 V11
VDD52 VSS52
H30
mechanical keying. =>AM3 VSS52
W11 VCORE
VDD55 VSS55 VDD53 VSS53 VSS53
J14 VDD56 VSS56 AF22 V13 VDD54 VSS54 J4 VSS54 W13
GND
J16 AF24 V15 J5 W15
J18
J20
J22
J24
K7
K9
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VSS57
VSS58
VSS59
VSS61
VSS62
VSS63
VSS64
AF26
AF28
AG10
AG11
AH14
AH16
V17
V19
V21
W4
W5
W8
kn y
t
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
J7
J9
J11
J13
J15
J17
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
W17
W19
W21
W23
Y8
Y10
SC16
22u/8/X5R/6.3V/M
SC17

22u/8/X5R/6.3V/M
SC18
22u/8/X5R/6.3V/M
SC19

22u/8/X5R/6.3V/M
SC20
22u/8/X5R/6.3V/M
SC21

22u/8/X5R/6.3V/M
SC22
22u/8/X5R/6.3V/M
SC23

22u/8/X5R/6.3V/M
gab
K11 VDD64 VSS65 AH18 W10 VDD62 VSS62 J19 VSS62 Y12
K13 AH20 W12 J21 W7 GND
VDD65 VSS66 VDD63 VSS63 VSS63 VCORE
K15 VDD66 VSS67 AH22 W14 VDD64 VSS64 J23 VSS64 Y20
K17 AH24 W16 K2 Y22
i
VDD67 VSS68 VDD65 VSS65 VSS65
K19 VDD68 VSS69 AH26 W18 VDD66 VSS66 K3
K21 VDD69 VSS70 AH28 W20 VDD67 VSS67 K8
GND
K23 VDD70 VSS71 AH30 Y2 VDD68 VSS68 K10
L4 AK2 Y3 K12 SC24 SC25 SC26 SC27 SC28 SC29 SC30
VDD71 VSS72 VDD69 VSS69 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
L5 VDD72 VSS73 AK14 Y7 VDD70 VSS70 K14
L8 AK16 Y9 K16 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
VDD73 VSS74 VDD71 VSS71
L10 VDD74 VSS75 AK18 Y11 VDD72 VSS72 K18
L12 VDD75 VSS240 Y14 Y13 VDD73 VSS73 K20
Gi

Y17 Y16 Y15 K22 GND


VDD150 VSS241 VDD74 VSS74
Y19 VDD151 Y21 VDD75 VSS75 Y18
GND
te

GND
1021 EMI

VCC_SB VCC_SB
VCC_SB

C1328 C1329 C1330 C1331 C1332 C1333


w.

4.7U/8/X5R/6.3V/K 0.22U/6/X7R/16V/K 180P/4/NPO/50V/J C1316 C1317 C1318 C1320 C1321 C1322 C1323 BC20 BC23 BC24 BC25
4.7U/8/X5R/6.3V/K 0.22U/6/X7R/16V/K 180P/4/NPO/50V/J 4.7U/8/X5R/6.3V/K
4.7U/8/X5R/6.3V/K
0.22U/6/X7R/16V/K 1N/4/X7R/50V/K
1N/4/X7R/50V/K 180P/4/NPO/50V/J
180P/4/NPO/50V/J 100P/4/NPO/50V/J 100P/4/NPO/50V/J 100P/4/NPO/50V/J/X
100P/4/NPO/50V/J/X

GND
GND
VCC_SB
ww

DDR15V

C1334 C1335 C1336 C1338 C1339 C1340 C1341


4.7U/8/X5R/6.3V/K
4.7U/8/X5R/6.3V/K
0.22U/6/X7R/16V/K 1N/4/X7R/50V/K
1N/4/X7R/50V/K 180P/4/NPO/50V/J
180P/4/NPO/50V/J
C1324 C1325 C1326 C1327 C1337 C1319 Title
4.7U/8/X5R/6.3V/K
4.7U/8/X5R/6.3V/K
0.22U/6/X7R/16V/K
0.22U/6/X7R/16V/K 0.22U/6/X7R/16V/K 0.22U/6/X7R/16V/K
CPU POWER & GND
GND Size Document Number Rev
Custom GA-880GM-UD2H 1.0
GND
Date: Monday, February 22, 2010 Sheet 7 of 35
8 7 6 5 4 3 2 1

DDRVTT DDRVTT
DDR3_1 DDR3_3

120 48 120 48
VTT FREE VTT FREE
240 49 240 49
VTT FREE MA_EVENT_L VTT FREE MA_EVENT_L
187 MA_EVENT_L 6 187 MA_EVENT_L 6
FREE FREE
2 198 2 198
VSS FREE VSS FREE
5 5
VSS VSS
8 79 8 79
VSS RSVD VSS RSVD
11 11
VSS MODT_A1 MODT_A[0..3] VSS MODT_A3
14 77 MODT_A1 6 MODT_A[0..3] 5,6 14 77 MODT_A3 6
VSS ODT1 MODT_A0 VSS ODT1 MODT_A2
17 195 MODT_A0 5 17 195 MODT_A2 5
VSS ODT0 -DQSA[0..8] VSS ODT0
20 -DQSA[0..8] 5 20
VSS VSS
23 68 23 68
VSS NC/PAR_IN DQSA[0..8] VSS NC/PAR_IN
26 53 DQSA[0..8] 5 26 53
VSS NC/ERR_OUT VSS NC/ERR_OUT
29 167 29 167
VSS NC/TEST4 DMA[0..8] VSS NC/TEST4
32 DMA[0..8] 5 32
VSS MA_CK0 VSS MA_CK0
35 39 35 39

m
VSS CB0 MA_CK1 MA_CK[0..7] VSS CB0 MA_CK1
38 40 MA_CK[0..7] 5 38 40
VSS CB1 MA_CK2 VSS CB1 MA_CK2
D 41 45 41 45 D
VSS CB2 MA_CK3 VSS CB2 MA_CK3
44 46 44 46
VSS CB3 MA_CK4 VSS CB3 MA_CK4
47 158 47 158
VSS CB4 MA_CK5 SMBDATA VSS CB4 MA_CK5
80 159 80 159
VSS CB5 VSS CB5

co
83 164 MA_CK6 SMBCLK 83 164 MA_CK6
VSS CB6 MA_CK7 VSS CB6 MA_CK7
86 165 86 165
VSS CB7 VSS CB7
89 89
VSS VSS
92 92
VSS DQSA0 C205 C206 VSS DQSA0

y si ial
95 7 95 7
VSS DQS0 -DQSA0 100p/4/NPO/50V/J/X 100p/4/NPO/50V/J/X VSS DQS0 -DQSA0
98 6 98 6
VSS DQS0* VSS DQS0*
101 101
VSS DQSA1 VSS DQSA1
104 16 104 16
VSS DQS1 -DQSA1 VSS DQS1 -DQSA1
107 15 107 15
VSS DQS1* VSS DQS1*
110 110
VSS DQSA2 VSS DQSA2
113 25 113 25

a.
VSS DQS2 -DQSA2 VSS DQS2 -DQSA2
116 24 116 24
VSS DQS2* VSS DQS2*
119 119
VSS DQSA3 VSS DQSA3
121 34 121 34
VSS DQS3 -DQSA3 VSS DQS3 -DQSA3
124 33 124 33
VSS DQS3* VSS DQS3*

op ne ent
127 127
VSS DQSA4 VSS DQSA4
130 85 130 85
VSS DQS4 -DQSA4 VSS DQS4 -DQSA4
133 84 133 84
VSS DQS4* VSS DQS4*
136 136
VSS DQSA5 VSS DQSA5
139 94 139 94
VSS DQS5 -DQSA5 DDR15V VSS DQS5 -DQSA5
142 93 142 93
VSS DQS5* VSS DQS5*
145 145
VSS DQSA6 VSS DQSA6
148
VSS DQS6
103 Trace min 10/10 148
VSS DQS6
103
151 102 -DQSA6 151 102 -DQSA6
VSS DQS6* R101 VSS DQS6*
154 154
VSS DQSA7 15/4/1 VREFDQ_A VSS DQSA7
157 112 157 112
VSS DQS7 -DQSA7 VSS DQS7 -DQSA7
160 111 160 111
VSS DQS7* VREFDQ_A VSS DQS7*
163 163
VSS DQSA8 VSS DQSA8
166 43 166 43
VSS DQS8 VSS DQS8

t C do id
199 42 -DQSA8 199 42 -DQSA8
VSS DQS8* R23 VSS DQS8*
202 202
VSS DMA0 15/4/1 VSS DMA0
205 125 205 125
VSS DM0/DQS9 VSS DM0/DQS9
208 126 208 126
VSS NC/DQS9* VSS NC/DQS9*
211 211
VSS DMA1 VSS DMA1
214 134 214 134
VSS DM1/DQS10 VSS DM1/DQS10
217 135 217 135
VSS NC/DQS10* VSS NC/DQS10*
220 220
C VSS DMA2 VSS DMA2 C
223 143 223 143

no-in onf
VSS DM2/DQS11 DDR15V VSS DM2/DQS11
226 144 226 144
VSS NC/DQS11* VSS NC/DQS11*
229 229
VSS DMA3 VSS DMA3
232 152 232 152
VSS DM3/DQS12 R24 VSS DM3/DQS12
235 153 235 153
VSS NC/DQS12* 15/4/1 VSS NC/DQS12*
239 239
VSS DMA4 VSS DMA4
203 203
DM4/DQS13 VREFCA_A DM4/DQS13
NC/DQS13*
204 Trace min 10/10 NC/DQS13*
204

51 212 DMA5 VREFCA_A 51 212 DMA5


VDD DM5/DQS14 VDD DM5/DQS14
54 213 54 213
VDD NC/DQS14* VDD NC/DQS14*
57 57
VDD DMA6 VDD DMA6
60 221 60 221
VDD DM6/DQS15 R2 VDD DM6/DQS15
62 222 62 222
VDD NC/DQS15* 15/4/1 VDD NC/DQS15*
65 65
VDD DMA7 VDD DMA7

Do si e C
66 230 66 230
DDR15V VDD DM7/DQS16 DDR15V VDD DM7/DQS16
69 231 69 231
VDD NC/DQS16* VDD NC/DQS16*
72 72
VDD DMA8 VDD DMA8
75 161 75 161
VDD DM8/DQS17 VDD DM8/DQS17
78 162 78 162
VDD NC/DQS17* VDD NC/DQS17*
170 170
VDD VDD
173 173
VDD MDA0 VDD MDA0
176 3 MDA[0..63] 5 176 3 MDA[0..63] 5
VDD DQ0 MDA1 VDD DQ0 MDA1
179 4 179 4
VDD DQ1 MDA2 VDD DQ1 MDA2
182 9 182 9
VDD DQ2 MDA3 VDD DQ2 MDA3
183 10 183 10
VDD DQ3 MDA4 VDD DQ3 MDA4
186 122 186 122
VDD DQ4 MDA5 VDD DQ4 MDA5
189 123 189 123
VDD DQ5 MDA6 VDD DQ5 MDA6
191 128 191 128
VDD DQ6 MDA7 VDD DQ6 MDA7
194 129 194 129

VCC3
C275

C277
C279
0.1u/4/X7R/16V/K

0.1u/4/X7R/16V/KVREFCA_A
0.1u/4/X7R/16V/KVREFDQ_A
197

236

67
1
VDD
VDD

VDDSPD

VREFCA
VREFDQ
kn y
t
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
12
13
18
19
131
132
137
138
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
VCC3

C278
C280
C276 0.1u/4/X7R/16V/K

0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
VREFCA_A
VREFDQ_A
197

236

67
1
VDD
VDD

VDDSPD

VREFCA
VREFDQ
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
12
13
18
19
131
132
137
138
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
gab
DQ15 MDA16 DQ15 MDA16
21 21
SMBCLK DQ16 MDA17 SMBCLK DQ16 MDA17
9,15,17,30 SMBCLK 118 22 9,15,17,30 SMBCLK 118 22
SMBDATA SCL DQ17 MDA18 SMBDATA SCL DQ17 MDA18
9,15,17,30 SMBDATA 238 27 9,15,17,30 SMBDATA 238 27
B SDA DQ18 MDA19 SDA DQ18 MDA19 B
237 28 VCC3 237 28
SA1 DQ19 MDA20 SA1 DQ19 MDA20
117 140 117 140
i
SA0 DQ20 MDA21 SA0 DQ20 MDA21
141 141
SBAA2 DQ21 MDA22 SBAA2 DQ21 MDA22
5 SBAA2 52 146 5 SBAA2 52 146
SBAA1 BA2 DQ22 MDA23 SBAA1 BA2 DQ22 MDA23
5 SBAA1 190 147 5 SBAA1 190 147
SBAA0 BA1 DQ23 MDA24 SBAA0 BA1 DQ23 MDA24
5 SBAA0 71 30 5 SBAA0 71 30
BA0 DQ24 MDA25 BA0 DQ24 MDA25
31 31
CKEA1 DQ25 MDA26 CKEA1 DQ25 MDA26
5 CKEA1 169 36 5 CKEA1 169 36
CKEA0 CKE1 DQ26 MDA27 CKEA0 CKE1 DQ26 MDA27
5 CKEA0 50 37 5 CKEA0 50 37
CKE0 DQ27 MDA28 CKE0 DQ27 MDA28
149 149
DQ28 MDA29 -CSA3 DQ28 MDA29
5 -CSA1 76 150 5 -CSA3 76 150
-CSA0 S1* DQ29 MDA30 -CSA2 S1* DQ29 MDA30
5 -CSA0 193 155 5 -CSA2 193 155
S0* DQ30 S0* DQ30
Gi

156 MDA31 156 MDA31


-DCLKA1 DQ31 MDA32 -DCLKA3 DQ31 MDA32
6 -DCLKA1 64 81 5 -DCLKA3 64 81
DCLKA1 CK1/NU* DQ32 MDA33 DCLKA3 CK1/NU* DQ32 MDA33
6 DCLKA1 63 82 5 DCLKA3 63 82
CK1/NU DQ33 MDA34 CK1/NU DQ33 MDA34
87 87
-DCLKA0 DQ34 MDA35 -DCLKA2 DQ34 MDA35
5 -DCLKA0 185 88 6 -DCLKA2 185 88
DCLKA0 CK0* DQ35 MDA36 DCLKA2 CK0* DQ35 MDA36
184 200 184 200
te

5 DCLKA0 CK0 DQ36 MDA37 6 DCLKA2 CK0 DQ36 MDA37


201 201
MAAA0 DQ37 MDA38 MAAA0 DQ37 MDA38
188 206 188 206
MAAA1 A0 DQ38 MDA39 MAAA1 A0 DQ38 MDA39
5 MAAA[0..15] 181 207 5 MAAA[0..15] 181 207
MAAA2 A1 DQ39 MDA40 MAAA2 A1 DQ39 MDA40
61 90 61 90
MAAA3 A2 DQ40 MDA41 MAAA3 A2 DQ40 MDA41
180 91 180 91
MAAA4 A3 DQ41 MDA42 MAAA4 A3 DQ41 MDA42
59 96 59 96
MAAA5 A4 DQ42 MDA43 MAAA5 A4 DQ42 MDA43
58 97 58 97
MAAA6 A5 DQ43 MDA44 MAAA6 A5 DQ43 MDA44
178 209 178 209
MAAA7 A6 DQ44 MDA45 MAAA7 A6 DQ44 MDA45
56 210 56 210
MAAA8 A7 DQ45 MDA46 MAAA8 A7 DQ45 MDA46
177 215 177 215
A8 DQ46 A8 DQ46
w.

MAAA9 175 216 MDA47 MAAA9 175 216 MDA47


MAAA10 A9 DQ47 MDA48 MAAA10 A9 DQ47 MDA48
70 99 70 99
MAAA11 A10/AP DQ48 MDA49 MAAA11 A10/AP DQ48 MDA49
55 100 55 100
MAAA12 A11 DQ49 MDA50 MAAA12 A11 DQ49 MDA50
174 105 174 105
MAAA13 A12 DQ50 MDA51 MAAA13 A12 DQ50 MDA51
196 106 196 106
MAAA14 A13 DQ51 MDA52 MAAA14 A13 DQ51 MDA52
172 218 172 218
MAAA15 A14 DQ52 MDA53 MAAA15 A14 DQ52 MDA53
171 219 171 219
A15 DQ53 MDA54 A15 DQ53 MDA54
224 224
MA_RESET_L 168 DQ54 MDA55 MA_RESET_L 168 DQ54 MDA55
6 MA_RESET_L 225 6 MA_RESET_L 225
-SCASA RESET* DQ55 MDA56 -SCASA RESET* DQ55 MDA56
5 -SCASA 74 108 5 -SCASA 74 108
-SRASA CAS* DQ56 MDA57 -SRASA CAS* DQ56 MDA57
192 109 192 109
ww

5 -SRASA -SWEA RAS* DQ57 MDA58 5 -SRASA -SWEA RAS* DQ57 MDA58
5 -SWEA 73 114 5 -SWEA 73 114
WE* DQ58 MDA59 WE* DQ58 MDA59
A 115 115 A
DQ59 MDA60 DQ59 MDA60
227 227
DQ60 MDA61 DQ60 MDA61
228 228
DQ61 MDA62 DQ61 MDA62
233 233
DQ62 MDA63 DQ62 MDA63
234 234
DQ63 DDR15V Decouple DQ63
DDRVTT Decouple
DDR3/240/BU/VA/D DDR3/240/WH/VA/D
DDR15V DDRVTT

BC2 BC7 DDRVTT


0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K

BC3 BC8
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K Title
BC152
BC6 BC9 4.7U/8/X5R/6.3V/K DDR III CHANNEL A
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 8 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DDR3_2
DDR3_4
DDRVTT 120 48
VTT FREE
240 49 DDRVTT 120 48
VTT FREE MB_EVENT_L VTT FREE
187 MB_EVENT_L 6 240 49
FREE VTT FREE MB_EVENT_L
2 198 187 MB_EVENT_L 6
VSS FREE FREE
5 2 198
VSS VSS FREE
8 79 5
VSS RSVD VSS
11 8 79
VSS MODT_B1 VSS RSVD
14 77 MODT_B1 6 11
VSS ODT1 MODT_B0 VSS MODT_B3
17 195 MODT_B0 5 14 77 MODT_B3 6
VSS ODT0 VSS ODT1 MODT_B2
20 17 195 MODT_B2 5
VSS VSS ODT0
23 68 20
VSS NC/PAR_IN VSS
26 53 23 68
VSS NC/ERR_OUT VSS NC/PAR_IN
29 167 26 53
VSS NC/TEST4 VSS NC/ERR_OUT
32 29 167
VSS MB_CK0 VSS NC/TEST4
35 39 32
VSS CB0 MB_CK1 -DQSB[0..8] VSS MB_CK0
38 40 35 39

m
VSS CB1 MB_CK2 -DQSB[0..8] 5 VSS CB0 MB_CK1
41 45 38 40
VSS CB2 MB_CK3 VSS CB1 MB_CK2
D 44 46 41 45 D
VSS CB3 MB_CK4 DQSB[0..8] VSS CB2 MB_CK3
47 158 DQSB[0..8] 5 44 46
VSS CB4 MB_CK5 VSS CB3 MB_CK4
80 159 47 158
VSS CB5 MB_CK6 VSS CB4 MB_CK5
83 164 80 159
VSS CB6 VSS CB5

co
86 165 MB_CK7 DMB[0..8] 83 164 MB_CK6
VSS CB7 DMB[0..8] 5 VSS CB6 MB_CK7
89 86 165
VSS VSS CB7
92 89
VSS DQSB0 MODT_B[0..3] VSS
95 7 MODT_B[0..3] 5,6 92
VSS DQS0 -DQSB0 VSS DQSB0

y si ial
98 6 95 7
VSS DQS0* VSS DQS0 -DQSB0
101 98 6
VSS DQSB1 MB_CK[0..7] VSS DQS0*
104 16 MB_CK[0..7] 5 101
VSS DQS1 -DQSB1 VSS DQSB1
107 15 104 16
VSS DQS1* VSS DQS1 -DQSB1
110 107 15
VSS DQSB2 VSS DQS1*
113 25 110
VSS DQS2 -DQSB2 VSS DQSB2
116 24 113 25

a.
VSS DQS2* VSS DQS2 -DQSB2
119 116 24
VSS DQSB3 VSS DQS2*
121 34 119
VSS DQS3 -DQSB3 VSS DQSB3
124 33 121 34
VSS DQS3* VSS DQS3 -DQSB3
127 124 33
VSS VSS DQS3*

op ne ent
130 85 DQSB4 127
VSS DQS4 -DQSB4 VSS DQSB4
133 84 130 85
VSS DQS4* VSS DQS4 -DQSB4
136 133 84
VSS DQSB5 VSS DQS4*
139 94 136
VSS DQS5 -DQSB5 VSS DQSB5
142 93 139 94
VSS DQS5* VSS DQS5 -DQSB5
145 142 93
VSS DQSB6 VSS DQS5*
148 103 145
VSS DQS6 -DQSB6 VSS DQSB6
151 102 148 103
VSS DQS6* VSS DQS6 -DQSB6
154 151 102
VSS DQSB7 VSS DQS6*
157 112 154
VSS DQS7 -DQSB7 VSS DQSB7
160 111 157 112
VSS DQS7* VSS DQS7 -DQSB7
163 160 111
VSS DQSB8 VSS DQS7*
166 43 163
VSS DQS8 -DQSB8 VSS DQSB8
199 42 166 43
VSS DQS8* VSS DQS8

t C do id
202 199 42 -DQSB8
VSS DMB0 VSS DQS8*
205 125 202
VSS DM0/DQS9 VSS DMB0
208 126 205 125
VSS NC/DQS9* VSS DM0/DQS9
211 208 126
VSS DMB1 VSS NC/DQS9*
214 134 211
VSS DM1/DQS10 VSS DMB1
217 135 214 134
VSS NC/DQS10* VSS DM1/DQS10
220 217 135
VSS DMB2 VSS NC/DQS10*
223 143 220
C VSS DM2/DQS11 VSS DMB2 C
226 144 223 143

no-in onf
VSS NC/DQS11* VSS DM2/DQS11
229 226 144
VSS DMB3 VSS NC/DQS11*
232 152 229
VSS DM3/DQS12 VSS DMB3
235 153 232 152
VSS NC/DQS12* VSS DM3/DQS12
239 235 153
VSS DMB4 VSS NC/DQS12*
203 239
DM4/DQS13 VSS DMB4
204 203
NC/DQS13* DM4/DQS13
204
DMB5 NC/DQS13*
51 212
VDD DM5/DQS14 DMB5
54 213 51 212
VDD NC/DQS14* VDD DM5/DQS14
57 54 213
VDD DMB6 VDD NC/DQS14*
60 221 57
VDD DM6/DQS15 VDD DMB6
62 222 60 221
VDD NC/DQS15* VDD DM6/DQS15
65 62 222
VDD DMB7 VDD NC/DQS15*
66 230 65
VDD DM7/DQS16 VDD DMB7

Do si e C
DDR15V 69 231 66 230
VDD NC/DQS16* VDD DM7/DQS16
72 69 231
VDD DMB8 VDD NC/DQS16*
75 161 72
VDD DM8/DQS17 VDD DMB8
78 162 DDR15V 75 161
VDD NC/DQS17* VDD DM8/DQS17
170 78 162
VDD VDD NC/DQS17*
173 170
VDD MDB0 VDD
176 3 173
VDD DQ0 MDB1 VDD MDB0
179 4 176 3 MDB[0..63] 5
VDD DQ1 MDB2 MDB[0..63] 5 VDD DQ0 MDB1
182 9 179 4
VDD DQ2 MDB3 VDD DQ1 MDB2
183 10 182 9
VDD DQ3 MDB4 VDD DQ2 MDB3
186 122 183 10
VDD DQ4 MDB5 VDD DQ3 MDB4
189 123 186 122
VDD DQ5 MDB6 VDD DQ4 MDB5
191 128 189 123
VDD DQ6 MDB7 VDD DQ5 MDB6
194 129 191 128
VDD DQ7 MDB8 VDD DQ6 MDB7
197 12 194 129

VCC3

C283
C285
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
VREFCA_A
VREFDQ_A
236

67
1
VDD

VDDSPD

VREFCA
VREFDQ
DQ8
DQ9
DQ10
DQ11
kn y
DQ12
DQ13
DQ14
DQ15
t
13
18
19
131
132
137
138
21
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
VREFCA_A
VCC3

C284
C286
0.1u/4/X7R/16V/K C282

0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
VREFCA_A
VREFDQ_A
197

236

67
1
VDD
VDD

VDDSPD

VREFCA
VREFDQ
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
12
13
18
19
131
132
137
138
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
gab
SMBCLK DQ16 MDB17 DQ15 MDB16
8,15,17,30 SMBCLK 118 22 VREFDQ_A 21
SMBDATA SCL DQ17 MDB18 SMBCLK DQ16 MDB17
8,15,17,30 SMBDATA 238 27 8,15,17,30 SMBCLK 118 22
SDA DQ18 MDB19 SMBDATA SCL DQ17 MDB18
237 28 8,15,17,30 SMBDATA 238 27
B SA1 DQ19 MDB20 SDA DQ18 MDB19 B
VCC3 117 140 237 28
SA0 DQ20 MDB21 SA1 DQ19 MDB20
141 117 140
i
SBAB2 DQ21 MDB22 VCC3 SA0 DQ20 MDB21
5 SBAB2 52 146 141
SBAB1 BA2 DQ22 MDB23 SBAB2 DQ21 MDB22
5 SBAB1 190 147 5 SBAB2 52 146
SBAB0 BA1 DQ23 MDB24 SBAB1 BA2 DQ22 MDB23
71 30 5 SBAB1 190 147
5 SBAB0 BA0 DQ24 MDB25 SBAB0 BA1 DQ23 MDB24
31 71 30
CKEB1 DQ25 MDB26 5 SBAB0 BA0 DQ24 MDB25
5 CKEB1 169 36 31
CKEB0 CKE1 DQ26 MDB27 CKEB1 DQ25 MDB26
5 CKEB0 50 37 5 CKEB1 169 36
CKE0 DQ27 MDB28 CKEB0 CKE1 DQ26 MDB27
149 5 CKEB0 50 37
-CSB1 DQ28 MDB29 CKE0 DQ27 MDB28
5 -CSB1 76 150 149
-CSB0 S1* DQ29 MDB30 -CSB3 DQ28 MDB29
5 -CSB0 193 155 5 -CSB3 76 150
S0* DQ30 MDB31 -CSB2 S1* DQ29 MDB30
156 5 -CSB2 193 155
DQ31 S0* DQ30
Gi

-DCLKB1 64 81 MDB32 156 MDB31


6 -DCLKB1 DCLKB1 CK1/NU* DQ32 MDB33 -DCLKB3 DQ31 MDB32
6 DCLKB1 63 82 5 -DCLKB3 64 81
CK1/NU DQ33 MDB34 DCLKB3 CK1/NU* DQ32 MDB33
87 5 DCLKB3 63 82
-DCLKB0 DQ34 MDB35 CK1/NU DQ33 MDB34
5 -DCLKB0 185 88 87
DCLKB0 CK0* DQ35 MDB36 -DCLKB2 DQ34 MDB35
5 DCLKB0 184 200 6 -DCLKB2 185 88
CK0 DQ36 MDB37 DCLKB2 CK0* DQ35 MDB36
201 184 200
te

MAAB0 DQ37 MDB38 6 DCLKB2 CK0 DQ36 MDB37


5 MAAB[0..15] 188 206 201
MAAB1 A0 DQ38 MDB39 MAAB0 DQ37 MDB38
181 207 5 MAAB[0..15] 188 206
MAAB2 A1 DQ39 MDB40 MAAB1 A0 DQ38 MDB39
61 90 181 207
MAAB3 A2 DQ40 MDB41 MAAB2 A1 DQ39 MDB40
180 91 61 90
MAAB4 A3 DQ41 MDB42 MAAB3 A2 DQ40 MDB41
59 96 180 91
MAAB5 A4 DQ42 MDB43 MAAB4 A3 DQ41 MDB42
58 97 59 96
MAAB6 A5 DQ43 MDB44 MAAB5 A4 DQ42 MDB43
178 209 58 97
MAAB7 A6 DQ44 MDB45 MAAB6 A5 DQ43 MDB44
56 210 178 209
MAAB8 A7 DQ45 MDB46 MAAB7 A6 DQ44 MDB45
177 215 56 210
MAAB9 A8 DQ46 MDB47 MAAB8 A7 DQ45 MDB46
175 216 177 215
A9 DQ47 A8 DQ46
w.

MAAB10 70 99 MDB48 MAAB9 175 216 MDB47


MAAB11 A10/AP DQ48 MDB49 MAAB10 A9 DQ47 MDB48
55 100 70 99
MAAB12 A11 DQ49 MDB50 MAAB11 A10/AP DQ48 MDB49
174 105 55 100
MAAB13 A12 DQ50 MDB51 MAAB12 A11 DQ49 MDB50
196 106 174 105
MAAB14 A13 DQ51 MDB52 MAAB13 A12 DQ50 MDB51
172 218 196 106
MAAB15 A14 DQ52 MDB53 MAAB14 A13 DQ51 MDB52
171 219 172 218
A15 DQ53 MDB54 MAAB15 A14 DQ52 MDB53
224 171 219
MB_RESET_L 168 DQ54 MDB55 A15 DQ53 MDB54
6 MB_RESET_L 225 224
-SCASB RESET* DQ55 MDB56 MB_RESET_L 168 DQ54 MDB55
5 -SCASB 74 108 6 MB_RESET_L 225
-SRASB CAS* DQ56 MDB57 -SCASB RESET* DQ55 MDB56
5 -SRASB 192 109 5 -SCASB 74 108
-SWEB RAS* DQ57 MDB58 -SRASB CAS* DQ56 MDB57
73 114 192 109
ww

5 -SWEB WE* DQ58 MDB59 5 -SRASB -SWEB RAS* DQ57 MDB58


115 5 -SWEB 73 114
DQ59 MDB60 WE* DQ58 MDB59
A 227 115 A
DQ60 MDB61 DQ59 MDB60
228 227
DQ61 MDB62 DQ60 MDB61
233 228
DQ62 MDB63 DQ61 MDB62
234 233
DQ63 DQ62 MDB63
234
DQ63
DDR3/240/BU/VA/D DDR15V Decouple DDRVTT Decouple
DDR3/240/WH/VA/D
DDR15V DDR15V

BC131 DDRVTT
0.1u/4/X7R/16V/K
BC148
BC10 BC11 BC12 BC13 BC129 0.1u/4/X7R/16V/K
1U/6/X7R/16V/K 1U/6/X7R/16V/K 1U/6/X7R/16V/K 1U/6/X7R/16V/K 0.1u/4/X7R/16V/K Title
BC149
BC125 0.1u/4/X7R/16V/K DDR III CHANNEL B
0.1u/4/X7R/16V/K Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 9 of 35
8 7 6 5 4 3 2 1
5 4 3 2 1

U3A
L0_CADOUT_H0 Y25 D24 L0_CADIN_H0 L0_CADIN_L[0..15]
HT_RXCAD0P HT_TXCAD0P L0_CADIN_L[0..15] 4
L0_CADOUT_L0 Y24 PART 1 OF 6 D25 L0_CADIN_L0
L0_CADOUT_H1 HT_RXCAD0N HT_TXCAD0N L0_CADIN_H1 L0_CADIN_H[0..15]
V22 HT_RXCAD1P HT_TXCAD1P E24 L0_CADIN_H[0..15] 4

m
D L0_CADOUT_L1 L0_CADIN_L1 D
V23 HT_RXCAD1N HT_TXCAD1N E25
L0_CADOUT_H2 V25 F24 L0_CADIN_H2
L0_CADOUT_L2 HT_RXCAD2P HT_TXCAD2P L0_CADIN_L2
V24 HT_RXCAD2N HT_TXCAD2N F25
L0_CADOUT_H3 U24 F23 L0_CADIN_H3

co
L0_CADOUT_L3 HT_RXCAD3P HT_TXCAD3P L0_CADIN_L3
U25 HT_RXCAD3N HT_TXCAD3N F22
L0_CADOUT_H4 T25 H23 L0_CADIN_H4 L0_CADOUT_L[0..15]
HT_RXCAD4P HT_TXCAD4P L0_CADOUT_L[0..15] 4
L0_CADOUT_L4 L0_CADIN_L4

y si ial
T24 H22

HYPER TRANSPORT CPU I/F


L0_CADOUT_H5 HT_RXCAD4N HT_TXCAD4N L0_CADIN_H5 L0_CADOUT_H[0..15]
P22 HT_RXCAD5P HT_TXCAD5P J25 L0_CADOUT_H[0..15] 4
L0_CADOUT_L5 P23 J24 L0_CADIN_L5
L0_CADOUT_H6 HT_RXCAD5N HT_TXCAD5N L0_CADIN_H6
P25 HT_RXCAD6P HT_TXCAD6P K24
L0_CADOUT_L6 P24 K25 L0_CADIN_L6

a.
L0_CADOUT_H7 HT_RXCAD6N HT_TXCAD6N L0_CADIN_H7
N24 HT_RXCAD7P HT_TXCAD7P K23
L0_CADOUT_L7 N25 K22 L0_CADIN_L7
HT_RXCAD7N HT_TXCAD7N

op ne ent
L0_CADOUT_H8 AC24 F21 L0_CADIN_H8
L0_CADOUT_L8 HT_RXCAD8P HT_TXCAD8P L0_CADIN_L8
AC25 HT_RXCAD8N HT_TXCAD8N G21
L0_CADOUT_H9 AB25 G20 L0_CADIN_H9
L0_CADOUT_L9 HT_RXCAD9P HT_TXCAD9P L0_CADIN_L9
AB24 HT_RXCAD9N HT_TXCAD9N H21
L0_CADOUT_H10 AA24 J20 L0_CADIN_H10
L0_CADOUT_L10 HT_RXCAD10P HT_TXCAD10P L0_CADIN_L10
AA25 HT_RXCAD10N HT_TXCAD10N J21
L0_CADOUT_H11 Y22 J18 L0_CADIN_H11
L0_CADOUT_L11 HT_RXCAD11P HT_TXCAD11P L0_CADIN_L11
Y23 HT_RXCAD11N HT_TXCAD11N K17
L0_CADOUT_H12 W21 L19 L0_CADIN_H12

t C do id
L0_CADOUT_L12 HT_RXCAD12P HT_TXCAD12P L0_CADIN_L12
C W20 HT_RXCAD12N HT_TXCAD12N J19 C
L0_CADOUT_H13 V21 M19 L0_CADIN_H13
L0_CADOUT_L13 HT_RXCAD13P HT_TXCAD13P L0_CADIN_L13
V20 HT_RXCAD13N HT_TXCAD13N L18
L0_CADOUT_H14 U20 M21 L0_CADIN_H14
L0_CADOUT_L14 HT_RXCAD14P HT_TXCAD14P L0_CADIN_L14
U21 HT_RXCAD14N HT_TXCAD14N P21

no-in onf
L0_CADOUT_H15 U19 P18 L0_CADIN_H15
L0_CADOUT_L15 HT_RXCAD15P HT_TXCAD15P L0_CADIN_L15
U18 HT_RXCAD15N HT_TXCAD15N M18

L0_CLKOUT_H0 T22 H24 L0_CLKIN_H0


4 L0_CLKOUT_H0 HT_RXCLK0P HT_TXCLK0P L0_CLKIN_H0 4
L0_CLKOUT_L0 T23 H25 L0_CLKIN_L0
4 L0_CLKOUT_L0 HT_RXCLK0N HT_TXCLK0N L0_CLKIN_L0 4
L0_CLKOUT_H1 AB23 L21 L0_CLKIN_H1
4 L0_CLKOUT_H1 HT_RXCLK1P HT_TXCLK1P L0_CLKIN_H1 4
L0_CLKOUT_L1 AA22 L20 L0_CLKIN_L1
4 L0_CLKOUT_L1 HT_RXCLK1N HT_TXCLK1N L0_CLKIN_L1 4
L0_CTLOUT_H0 M22 M24 L0_CTLIN_H0
4 L0_CTLOUT_H0 HT_RXCTL0P HT_TXCTL0P L0_CTLIN_H0 4
L0_CTLOUT_L0 M23 M25 L0_CTLIN_L0
4 L0_CTLOUT_L0 L0_CTLIN_L0 4

Do si e C
L0_CTLOUT_H1 HT_RXCTL0N HT_TXCTL0N L0_CTLIN_H1
4 L0_CTLOUT_H1 R21 HT_RXCTL1P HT_TXCTL1P P19 L0_CTLIN_H1 4
L0_CTLOUT_L1 R20 R18 L0_CTLIN_L1
4 L0_CTLOUT_L1 HT_RXCTL1N HT_TXCTL1N L0_CTLIN_L1 4
R267 301/4/1 HT_RXCALP C23 B24 HT_TXCALP R268 301/4/1
HT_RXCALN
HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25

RS880P/FCBGA528/A11/[10HB1-10S880-30R]

1
B
t NB_HS
B

1
kn y
gab
NB_HS/[12SP2-01A004-E1R_12SP2-01A004-E2R]

VCORE
i

22
C147 C148 C149 C150 C151
0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K
Gi

HT Link Stitching Caps


te

A A
w.

Title
RS880 HT-LINK I/F
Size Document Number Rev
B GA-880GM-UD2H 1.0
ww

Date: Monday, February 22, 2010 Sheet 10 of 35


5 4 3 2 1
5 4 3 2 1

EXP_A_RXP[0..15] EXP_A_TXP[0..15]
EXP_A_RXP[0..15] 20 EXP_A_TXP[0..15] 20
EXP_A_RXN[0..15] EXP_A_TXN[0..15]
EXP_A_RXN[0..15] 20 EXP_A_TXN[0..15] 20

U3B
EXP_A_RXP0 D4 A5 EXP_A_TXP0
EXP_A_RXN0 GFX_RX0P GFX_TX0P EXP_A_TXN0
EXP_A_RXP1
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
EXP_A_TXP1
A3 A4

m
EXP_A_RXN1 GFX_RX1P GFX_TX1P EXP_A_TXN1
D
B3 GFX_RX1N GFX_TX1N B4 D
EXP_A_RXP2 C2 C3 EXP_A_TXP2
EXP_A_RXN2 GFX_RX2P GFX_TX2P EXP_A_TXN2
C1 GFX_RX2N GFX_TX2N B2
EXP_A_RXP3 E5 D1 EXP_A_TXP3

co
EXP_A_RXN3 GFX_RX3P GFX_TX3P EXP_A_TXN3
F5 GFX_RX3N GFX_TX3N D2
EXP_A_RXP4 G5 E2 EXP_A_TXP4
EXP_A_RXN4 GFX_RX4P GFX_TX4P EXP_A_TXN4
G6 E1

y si ial
EXP_A_RXP5 GFX_RX4N GFX_TX4N EXP_A_TXP5
H5 GFX_RX5P GFX_TX5P F4
EXP_A_RXN5 H6 F3 EXP_A_TXN5
EXP_A_RXP6 GFX_RX5N GFX_TX5N EXP_A_TXP6
J6 GFX_RX6P GFX_TX6P F1
EXP_A_RXN6 J5 F2 EXP_A_TXN6
GFX_RX6N GFX_TX6N

a.
EXP_A_RXP7 J7 H4 EXP_A_TXP7
EXP_A_RXN7 GFX_RX7P GFX_TX7P EXP_A_TXN7
J8 H3

PCIE I/F GFX


EXP_A_RXP8 GFX_RX7N GFX_TX7N EXP_A_TXP8
L5 GFX_RX8P GFX_TX8P H1
EXP_A_RXN8 L6 H2 EXP_A_TXN8

op ne ent
EXP_A_RXP9 GFX_RX8N GFX_TX8N EXP_A_TXP9
M8 GFX_RX9P GFX_TX9P J2
EXP_A_RXN9 L8 J1 EXP_A_TXN9
EXP_A_RXP10 GFX_RX9N GFX_TX9N EXP_A_TXP10
P7 GFX_RX10P GFX_TX10P K4
EXP_A_RXN10 M7 K3 EXP_A_TXN10
EXP_A_RXP11 GFX_RX10N GFX_TX10N EXP_A_TXP11
P5 GFX_RX11P GFX_TX11P K1
EXP_A_RXN11 M5 K2 EXP_A_TXN11
EXP_A_RXP12 GFX_RX11N GFX_TX11N EXP_A_TXP12
R8 GFX_RX12P GFX_TX12P M4
EXP_A_RXN12 P8 M3 EXP_A_TXN12
EXP_A_RXP13 GFX_RX12N GFX_TX12N EXP_A_TXP13
R6 GFX_RX13P GFX_TX13P M1
EXP_A_RXN13 R5 M2 EXP_A_TXN13

t C do id
EXP_A_RXP14 GFX_RX13N GFX_TX13N EXP_A_TXP14
P4 GFX_RX14P GFX_TX14P N2
EXP_A_RXN14 P3 N1 EXP_A_TXN14
EXP_A_RXP15 GFX_RX14N GFX_TX14N EXP_A_TXP15
T4 GFX_RX15P GFX_TX15P P1
EXP_A_RXN15 T3 P2 EXP_A_TXN15
GFX_RX15N GFX_TX15N
C AE3 AC1 GPP_TX0P_C C127 0.1U/4/X7R/16V/K PLACE CAP CLOSE C
20 PCIE1_IP GPP_RX0P GPP_TX0P PCIE1_OP 20

no-in onf
AD4 AC2 GPP_TX0N_C C128 0.1U/4/X7R/16V/K TO CONNECTOR
20 PCIE1_IN GPP_RX0N GPP_TX0N PCIE1_ON 20
AE2 GPP_RX1P GPP_TX1P AB4
AD3 GPP_RX1N GPP_TX1N AB3
AD1 GPP_RX2P GPP_TX2P AA2
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 V1 GPP_TX5P_C C136 0.1U/4/X7R/16V/K
34 ML_IP GPP_RX5P GPP_TX5P ML_OP 34
U7 V2 GPP_TX5N_C C137 0.1U/4/X7R/16V/K
34 ML_IN ML_ON 34

Do si e C
GPP_RX5N GPP_TX5N
A_RX0P AA8 AD7 A_TX0P_C C138 0.1U/4/X7R/16V/K
16 A_RX0P SB_RX0P SB_TX0P A_TX0P 16
A_RX0N Y8 AE7 A_TX0N_C C139 0.1U/4/X7R/16V/K
16 A_RX0N SB_RX0N SB_TX0N A_TX0N 16
A_RX1P AA7 AE6 A_TX1P_C C140 0.1U/4/X7R/16V/K
16 A_RX1P SB_RX1P SB_TX1P A_TX1P 16
A_RX1N Y7 AD6 A_TX1N_C C141 0.1U/4/X7R/16V/K
16 A_RX1N SB_RX1N SB_TX1N A_TX1N 16
A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C142 0.1U/4/X7R/16V/K
16 A_RX2P SB_RX2P SB_TX2P A_TX2P 16
A_RX2N AA6 AC6 A_TX2N_C C143 0.1U/4/X7R/16V/K
16 A_RX2N SB_RX2N SB_TX2N A_TX2N 16
A_RX3P W5 AD5 A_TX3P_C C144 0.1U/4/X7R/16V/K
16 A_RX3P SB_RX3P SB_TX3P A_TX3P 16
A_RX3N Y5 AE5 A_TX3N_C C145 0.1U/4/X7R/16V/K
16 A_RX3N SB_RX3N SB_TX3N A_TX3N 16
NB_VCC
R210 1.27K/4/1
kn y
t
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
RS880P/FCBGA528/A11/[10HB1-10S880-30R]
AC8
AB8 R212 2K/4/1
gab
B B
i
Gi
te
w.
ww

A A

Title
RS880 PCIE I/F
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 11 of 35
5 4 3 2 1
5 4 3 2 1

NB_VCC NB_VCC

BC141
1u/4/X5R/6.3V/K

VCC3
VCC18

m
VCC18
SBC34
D D
1u/4/X5R/6.3V/K
BC143
1u/4/X5R/6.3V/K

co
y si ial
VCC18

VCC18 VCC18
BC139
1u/4/X5R/6.3V/K

a.
SBC36
1u/4/X5R/6.3V/K

op ne ent
VCC18 VCC18 VCC18 U3C
F12 A22 TXD0+ TXD0+ R242 110/4/1/X TXD0-
AVDD1(NC) TXOUT_L0P(NC) TXD0+ 23
E12 PART 3 OF 6 B22 TXD0- TXD1+ R243 110/4/1/X TXD1-
AVDD2(NC) TXOUT_L0N(NC) TXD0- 23
SBC28 SBC29 F14 A21 TXD1+ TXD2+ R244 110/4/1/X TXD2-
AVDDDI(NC) TXOUT_L1P(NC) TXD1+ 23
1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K G15 B21 TXD1-
AVSSDI(NC) TXOUT_L1N(NC) TXD1- 23
H15 B20 TXD2+ TXC+ R245 110/4/1/X TXC-
AVDDQ(NC) TXOUT_L2P(NC) TXD2+ 23
H14 A20 TXD2-
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) TXD2- 23
TXOUT_L3P(NC) A19
E17

CRT/TVOUT
B19

t C do id
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17 Y(DFT_GPIO2)
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18
TXOUT_U0N(NC) A18
22 DAC_RED
G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17
G17 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) B17
C
22 DAC_GREEN E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20 C

no-in onf
F18 GREENb(NC) TXOUT_U2N(NC) D21
22 DAC_BLUE E19 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) D18
F19 BLUEb(NC) TXOUT_U3N(NC) D19

R230-R232 PLACED SR3 SR2 SR1 DAC_HSYNC A11 B16 TXC+


13,22 DAC_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) TXC+ 23
WITHIN 1' OF NB 150/4/1 150/4/1 140/4/1 DAC_VSYNC B11 A16 TXC-
13,22 DAC_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) TXC- 23
22 DDCDATA DDCDATA E8 D16
DDCCLK DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) VCC18
22 DDCCLK F8 DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) D17

RS780 A13 Red DAC R132 715/4/1 G14 +12V


DAC_RSET(PWM_GPIO1) Q74
Output Imbalance A13 VCC18

Do si e C
NB_VCC VDDLTP18(NC) BC151

S
change to 140/4/1 A12 PLLVDD(NC) VSSLTP18(NC) B13 1 VCC18
VCC18 D14 3

LVTM
PLLVDD18(NC)

D
B12 A15 VDDLT18 0.1u/4/X7R/16V/K 2 R156 8.2K/4/1

PLL PWR
PLLVSS(NC) VDDLT18_1(NC)
B15

G
VCC18 VDDLT18_2(NC) P8503BMG/SOT23/450PF/85M
H17 VDDA18HTPLL VDDLT33_1(NC) A14
VDDLT33_2(NC) B14
VCC18 D7 VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
R270 0/4 D15 BC145 BC146
6,16 -CPURST VSSLT2(VSS)
16,27 -A_RST R269 0/4/X -NB_RST_C D8 C16 0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K
SYSRESETb VSSLT3(VSS)
NB_VCC
t
17,31 NB_PWROK
-LDT_STOP
A10
C10
POWERGOOD VSSLT4(VSS) C18
C20

PM
6,16 -LDT_STOP LDTSTOPb VSSLT5(VSS)
16 ALLOW_LDTSTOP C12 ALLOW_LDTSTOP VSSLT6(VSS) E20
kn y
VSSLT7(VSS) C22
15 NBHT_REFCLKP C25 HT_REFCLKP
R236 C24
15 NBHT_REFCLKN HT_REFCLKN
150/4/1
gab
E11

CLOCKs
B 15 OSC_14M_NB REFCLK_P/OSCIN(OSCIN) B
F11 REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) E9
LVDS_BLON(PCE_RCALRP) F7
i
15 NBSRC_CLKP T2 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) G12
R239 T1
15 NBSRC_CLKN GFX_REFCLKN
150/4/1
U1 GPP_REFCLKP
U2 GPP_REFCLKN

15 SBLINK_CLKP V4 GPPSB_REFCLKP(SB_REFCLKP)
V3
Gi

15 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
23 I2C_DATA I2C_DATA A9
I2C_CLK I2C_DATA TMDS_HPD
B9 D9
23 I2C_CLK
B8
I2C_CLK MIS. TMDS_HPD(NC)
D10
TMDS_HPD 23
te

DDC_DATA/AUX0P(NC) HPD(NC)
A8 DDC_CLK/AUX0N(NC)
B7 D12 -SUS_STAT
VCC3 AUX1P(NC) TVCLKIN(PWM_GPIO5) -SUS_STAT 17
A7 AUX1N(NC)
THERMALDIODE_P AE8
R265 8.2K/4/1 STRP_DATA B10 AD8
STRP_DATA THERMALDIODE_N
G11 D13 TEST_EN
RSVD TESTMODE
w.

13 RS740_DFT_GPIO1 C8 AUX_CAL(NC) R279


RS880P/FCBGA528/A11/[10HB1-10S880-30R] 1.8K/4/1
ww

A A

Title
RS880 SYSTEM I/F
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 12 of 35
5 4 3 2 1
5 4 3 2 1

U3D
PAR 4 OF 6
SPM_A0
SPM_A1
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18 SPM_DQ0
SPM_DQ1
RS740/RX780/RS780 STRAPSRS740/RX780/RS780: LOAD_EEPROM_STRAPS
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
SPM_A2 V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19 SPM_DQ2 Note: for RS780, change R232 to 150R as AUX_CAL, Selects Loading of STRAPS from EPROM
SPM_A3 AE15 Y19 SPM_DQ3 place close to pin C8 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
SPM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) SPM_DQ4
AA12 MEM_A4(NC) MEM_DQ4(NC) V17 0 : I2C Master can load strap values from EEPROM if connected, or use
SPM_A5 AB16 AA17 SPM_DQ5 R272 150/4/1
MEM_A5(NC) MEM_DQ5/DVO_D1(NC) 12 RS740_DFT_GPIO1 default values if not connected
SPM_A6 AB14 AA15 SPM_DQ6
SPM_A7 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) SPM_DQ7 RS740: pin DFT_GPIO1
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
SPM_A8 AD13 AC20 SPM_DQ8 Note: for RX780, R217 (RX780_DFT_GPIO1) to 3K accordinglyRX780: pin DFT_GPIO1

m
SPM_A9 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) SPM_DQ9
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19 RS780: pin SUS_STAT#

SBD_MEM/DVO_I/F
D D
SPM_A10 AC16 AE22 SPM_DQ10
SPM_A11 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) SPM_DQ11
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
SPM_A12 AC14 AB20 SPM_DQ12

co
MEM_A12(NC) MEM_DQ12(NC) SPM_DQ13
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
AC22 SPM_DQ14 RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
SPM_BA0 MEM_DQ14/DVO_D10(NC) SPM_DQ15
AD16 AD21

y si ial
SPM_BA1 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
AE17 MEM_BA1(NC)
SPM_BA2 AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17 SPM_DQS0P Enables the Test Debug Bus using GPIO and/or memory IO
W18 SPM_DQS0N R276 3K/4/1 VCC3 1 : Disable (RS740/RS780); Enable (RX780)
MEM_DQS0N/DVO_IDCKN(NC) 12,22 DAC_VSYNC
SPM_RAS- W12 AD20 SPM_DQS1P
MEM_RASb(NC) MEM_DQS1P(NC) 0 : Enable (RS740/RS780); Disable(RX780)

a.
SPM_CAS- Y12 AE21 SPM_DQS1N
SPM_WE- MEM_CASb(NC) MEM_DQS1N(NC) RS740: pin DFT_GPIO5
AD18 MEM_WEb(NC)
SPM_CS- AB13 MEM_CSb(NC) MEM_DM0(NC) W17 SPM_DM0 RX780: pin DFT_GPIO5
SPM_CKE AB18 AE19 SPM_DM1 RS780: pin VSYNC

op ne ent
SPM_ODT MEM_CKE(NC) MEM_DM1/DVO_D8(NC) VCC18
V14 MEM_ODT(NC) Note: for RX780, change following
AE23 NB_VCC pull-down resistor to 3K accordingly
SPM_CLKP IOPLLVDD18(NC)
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24
SPM_CLKN W14 R912 (RX780_DFT_GPIO5) RS740: STRAP_PCIE_SB/GPP_CFG[2:0] (Pins: RS740_DFT_GPIO[4:2])
MEM_CKN(NC) BC61
IOPLLVSS(NC) AD23
R301 40.2/4/1/X SPM_COMPP AE12 BC60 1u/4/X5R/6.3V/K These pin straps are used to configure PCI-E GPP mode.
R304 40.2/4/1/X SPM_COMPN AD12 MEM_COMPP(NC) SPM_VREF 1u/4/X5R/6.3V/K
VDD_MEM MEM_COMPN(NC) MEM_VREF(NC) AE18 111: register defined (register default to Config E) default
110: 4-0-0-0-0 Config A
RS880P/FCBGA528/A11/[10HB1-10S880-30R]
101: 4-4-0-0-0 Config B

t C do id
100: 4-2-2-0-0 Config C
011: 4-2-1-1-0 Config D
010: 4-1-1-1-1 Config E
U5 VDD_MEM others: register defined (default to Config E)
C SPM_VREF1 M8 E3 SPM_DQ2 C
VREFCA DQL0

no-in onf
SPM_VREF2 H1 F7 SPM_DQ1
VREFDQ DQL1 SPM_DQ5
DQL2 F2 RS780: STRAP_PCIE_GPP_CFG[2:0]
SPM_A0 N3 F8 SPM_DQ3 RX780: STRAP_PCIE_GPP_CFG[2:0] (Pins: RX780_DFT_GPIO[4:2])
A0 DQL3 (configure thru register setting)
SPM_A1 P7 H3 SPM_DQ7
SPM_A2 A1 DQL4 SPM_DQ0 BC72 R306 111: 1-1-1-1-1-1 Mode L default 1-1-1-1-1-1 Mode L default
P3 A2 DQL5 H8 Note: for RX780, change following
SPM_A3 N2 G2 SPM_DQ4 0.1u/4/Y5V/16V/Z/X 1K/4/1/X pull-down resistor to 3K accordingly 110: 1-1-1-1-1-1 Mode L 1-1-1-1-1-1 Mode L
SPM_A4 A3 DQL6 SPM_DQ6
P8 A4 DQL7 H7 101: 2-0-2-0-2-0 Mode C2 2-0-2-0-2-0 Mode C2
SPM_A5 P2 SPM_VREF R913 (RX780_DFT_GPIO4)
SPM_A6 A5 100: 2-0-2-0-1-1 Mode K 2-0-2-0-1-1 Mode K
R8 A6 R218 (RX780_DFT_GPIO3) 011: 2-0-1-1-1-1 Mode E 2-0-1-1-1-1 Mode E
SPM_A7 R2 D7 SPM_DQ13 R911 (RX780_DFT_GPIO2)
SPM_A8 A7 DQU0 SPM_DQ8 BC73 R307 010: 1-1-1-1-1-1 Mode L 1-1-1-1-1-1 Mode L
T8 C3

Do si e C
SPM_A9 A8 DQU1 SPM_DQ10 0.1u/4/Y5V/16V/Z/X 001: 4-0-0-0-1-1 Mode C 4-0-0-0-1-1 Mode C
R3 A9 DQU2 C8 1K/4/1/X
SPM_A10 L7 C2 SPM_DQ12 000: 4-0-0-0-2-0 Mode B 4-0-0-0-2-0 Mode B
SPM_A11 A10/AP DQU3 SPM_DQ15
R7 A11 DQU4 A7
SPM_A12 N7 A2 SPM_DQ11
A12/BC DQU5 SPM_DQ14
T3 A13 DQU6 B8
T7 A3 SPM_DQ9
NC1 DQU7 VDD_MEM
M7 NC2 RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
Enables Side port memory
SPM_BA0 M2 B2 VDD_MEM 1. Disable (RS740/RS780)
SPM_BA1 BA0 VDD#B2

SR296
SPM_CLKP
SPM_CLKN
SPM_BA2

100/4/1/X
J7
K7
N8
M3
BA1
BA2

CK
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
D9
G7
K2
K8
N1
N9
R1
kn y
t BC74
0.1u/4/Y5V/16V/Z/X
R308
1K/4/1/X

SPM_VREF1
12,22 DAC_HSYNC
R286

R285
3K/4/1/X

3K/4/1 VCC3
0 : Enable (RS740/RS780)
RS740: pin DFT_GPIO0
RS780: pin HSYNC
RX780: Not Appicable
gab
SPM_CKE CK VDD#R1
B
K9 CKE VDD#R9 R9 B
BC75 R309 RX780/RS780: STRAP_DEBUG_BUS_PCIE_ENABLE
i
SPM_ODT K1 A1 0.1u/4/Y5V/16V/Z/X 1K/4/1/X
ODT VDDQ#A1
SPM_CS- L2 CS VDDQ#A8 A8 Enables Test debug bus
SPM_RAS- J3 C1 Note: for RX780, change following using PCIE bus
SPM_CAS- RAS VDDQ#C1
K3 CAS VDDQ#C9 C9 pull-down resistor to 3K accordingly 1. Disable (can be enabled
SPM_WE- L3 D2
WE VDDQ#D2 thru nbcfg register)
VDDQ#E9 E9 R219 (RX780_DFT_GPIO0)
F1 VDD_MEM 0 : Enable
SPM_DQS0P VDDQ#F1
F3 H2 RX780: pin DFT_GPIO0
Gi

SPM_DQS1P DQSL VDDQ#H2


C7 DQSU VDDQ#H9 H9 RS780: configurable thru register
setting only
SPM_DM0 E7 A9 RS740: Not supported
te

SPM_DM1 DML VSS#A9


D3 DMU VSS#B3 B3
E1 BC76 R310
VSS#E1 0.1u/4/Y5V/16V/Z/X
VSS#G8 G8 1K/4/1/X
SPM_DQS0N G3 J2
SPM_DQS1N DQSL VSS#J2 SPM_VREF2
B7 DQSU VSS#J8 J8
VSS#M1 M1
VSS#M9 M9
P1 BC77 R311
w.

VSS#P1 0.1u/4/Y5V/16V/Z/X
17 DDR3_RST- T2 RESET VSS#P9 P9 1K/4/1/X
VSS#T1 T1
L8 ZQ VSS#T9 T9

R305 B1
243/4/1/X VSSQ#B1
VSSQ#B9 B9
VDD_MEM
ww

A
VSSQ#D1 D1 A

VSSQ#D8 D8
VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9
J9 G1 BC35 BC63 BC78 SBC80 SBC82
NC#J9 VSSQ#G1 10u/8/X5R/6.3V/K/X 1U/6/Y5V/10V/Z/X 0.1u/4/Y5V/16V/Z/X 0.1u/4/Y5V/16V/Z/X 0.1u/4/Y5V/16V/Z/X
L9 NC#L9 VSSQ#G9 G9
BC36 BC64 BC79 SBC81
10u/8/X5R/6.3V/K/X 1U/6/Y5V/10V/Z/X 0.1u/4/Y5V/16V/Z/X 0.1u/4/Y5V/16V/Z/X Title
SDRAM 512MB DDR3
DDR3/64Mx16b/128MB/[10HB3-713064-20R]/X RS880 STRAP
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 13 of 35
5 4 3 2 1
5 4 3 2 1
RS740/RX780/RS780 POWER DIFFERENCE TABLE
PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V

A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
U3F
VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

VDD18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V

m
VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V

PART 6/6
D D
GROUND VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

co
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V

VDD_MEM +1.8V NC +1.8V(DDR2) VDDLTP18 +1.8V NC +1.8V

y si ial
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
+1.5V(DDR3)

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC

a.
RS880P/FCBGA528/A11/[10HB1-10S880-30R]

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

op ne ent
Please use 1mm pad size,
place all ELT test pads
on bottom side only

t C do id
NB_VCC NB_VCC
U3E
C 1.1V J17 A6 1.1V C
VDDHT_1 VDDPCIE_1

no-in onf
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6
L16 VDDHT_3 VDDPCIE_3 C6
SBC19 SBC14 M16 D6 SBC27 SBC6 BC69 BC54 BC83 BC43 BC94
VDDHT_4 VDDPCIE_4 1u/4/X5R/6.3V/K
P16 VDDHT_5 VDDPCIE_5 E6
0.1u/4/X7R/16V/K R16 F6
0.1u/4/X7R/16V/K VDDHT_6 VDDPCIE_6 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
T16 VDDHT_7 VDDPCIE_7 G7
H8 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
1.1V VDDPCIE_8 0.1u/4/X7R/16V/K 10U/8/X5R/6.3V/K
H18 VDDHTRX_1 VDDPCIE_9 J9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
BC31 BC68 BC70 E21 L9

Do si e C
22u/8/X5R/6.3V/M VDDHTRX_4 VDDPCIE_12
D22 VDDHTRX_5 VDDPCIE_13 P9
0.1u/4/X7R/16V/K B23 R9
VCC_SB 0.1u/4/X7R/16V/K VDDHTRX_6 VDDPCIE_14
A23 VDDHTRX_7 VDDPCIE_15 T9
VDDPCIE_16 V9
1.2V AE25 U9 NB_VCC
VDDHTTX_1 VDDPCIE_17
AD24 VDDHTTX_2
AC23 K12 1.1V
BC32 BC91 SBC25 SBC18 SBC22 VDDHTTX_3 VDDC_1
AB22 VDDHTTX_4 VDDC_2 J14
10U/8/X5R/6.3V/K AA21 U16
VDDHTTX_5 VDDC_3 SBC10 SBC11 SBC8 SBC7 SBC4 SBC2
Y20 VDDHTTX_6 VDDC_4 J11
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 10U/8/X5R/6.3V/K

VCC18
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
kn y
t W19
V18
U17
T17
R17
P17
M17
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
POWER
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
K15
M12
L14
L11
M13
M15
N12
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
10U/8/X5R/6.3V/K
gab
VDDHTTX_13 VDDC_11
B VDDC_12 N14 B
J10 VDDA18PCIE_1 VDDC_13 P11
P10 VDDA18PCIE_2 VDDC_14 P13
i
BC33 BC37 BC58 SBC26 SBC23 SBC24 K10 P14 BC65 BC56 SBC16 SBC17
22u/8/X5R/6.3V/M 1u/4/X5R/6.3V/K VDDA18PCIE_3 VDDC_15 0.1u/4/X7R/16V/K
M10 VDDA18PCIE_4 VDDC_16 R12
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K L10 R15
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
H9 T15 0.1u/4/X7R/16V/K
VDDA18PCIE_7 VDDC_19 0.1u/4/X7R/16V/K
T10 VDDA18PCIE_8 VDDC_20 U12
R10 T14 0.1u/4/X7R/16V/K
VDDA18PCIE_9 VDDC_21 VDD_MEM
Y9 J16
Gi

VDDA18PCIE_10 VDDC_22
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
AE9 Y11
te

VCC18 VDDA18PCIE_14 VDD_MEM3(NC) BC84 SBC32 SBC33 BC55


U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
AB10 0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M/X
VDD_MEM5(NC) 0.1u/4/Y5V/16V/Z/X 0.1u/4/X7R/16V/K
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
G9 VDDG18_2(VDD18_2)
AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 VCC3
BC34 AD11 H12
1u/4/X5R/6.3V/K VDD18_MEM2(NC) VDDG33_2(NC)
RS880P/FCBGA528/A11/[10HB1-10S880-30R] BC53 SBC30
w.

1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K

VCC18
ww

A A
BC42
1u/4/X5R/6.3V/K

Title
RS880 POWER & GND
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 14 of 35
5 4 3 2 1
5 4 3 2 1
NB CLOCK INPUT TABLE
VCC3 NB CLOCKS RS740 RX780 RS780

HT_REFCLKP
66M SE(SE) 100M DIFF 100M DIFF
HT_REFCLKN NC 100M DIFF 100M DIFF
BC892 BC893 BC894 BC895 BC896 BC897 BC898 BC899 BC59 BC903
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M 0.1u/4/X7R/16V/K REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) 100M DIFF
REFCLK_N NC NC vref
100M DIFF
GFX_REFCLK* 100M DIFF 100M DIFF 100M DIFF

GPP_REFCLK NC 100M DIFF 100M DIFF(OUT)

m
D D
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF

1- PLACE ALL THE SERIES TERMINATION

co
RESISTORS AS CLOSE TO U800 AS * the GFX_REFCLK input is required for all cases
POSSIBLE

y si ial
2- ROUTE ALL SRCCLKTx AND SRCCLKCx
AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN

a.
U4

VCC3 1 VDDHTT CPUK8_0T 51 CPUCLK0_H 6

op ne ent
5 VDDREF CPUK8_0C 50 CPUCLK0_L 6
20 VDDSRC CPUK8_1T 47
21 VDDSRC CPUK8_1C 46
30 VDDSB
37 VDDATIG
42 VDD ATIG0T 41 NBSRC_CLKP 12
45 VDDA ATIG0C 40 NBSRC_CLKN 12
49 VDDCPU ATIG1T 39 SRCCLK_3GIO_A 20
9 VDD48 ATIG1C 38 -SRCCLK_3GIO_A 20
ATIG2T 35
ATIG2C 34

t C do id
6 GNDREF
12 GND48 SB_SRC0T 32
19 GNDSRC SB_SRC0C 31
22 GNDSRC SB_SRC1T 28 PCIE1_CLK 20
C 29 27 C
GNDSB SB_SRC1C -PCIE1_CLK 20
33 GNDATIG

no-in onf
36 GNDATIG
43 GND SRC0T 26
44 GNDA SRC0C 25
C9 22P/4/NPO/50V/J 48 24
GNDCPU SRC1T SRCCLK_LAN 34
54 GNDHTT SRC1C 23 -SRCCLK_LAN 34
SRC2T 18 SBSRC_CLKP 16
X7 9LPRS482 / RTM880T-792 17
SRC2C SBSRC_CLKN 16
SRC3T 16 SBLINK_CLKP 12
14.318M/16p/20ppm/49US/40/D 7 15
X1 SRC3C SBLINK_CLKN 12
C10 22P/4/NPO/50V/J 8 X2

Do si e C
HTT0T/66M 56 NBHT_REFCLKP 12
HTT0C/66M 55 NBHT_REFCLKN 12
8,9,17,30 SMBCLK 13
8,9,17,30 SMBDATA SMBCLK
14 SMBDAT
watch dog -- 48Mz_0 11 SIO_CLOCK_R R58 22/4
LPC48 27
RESTORE# 接 RESET 10 48M_USB_R R71 22/4
48Mz_1 USB48M 17
R62 1K/4/1 52
VCC3 *PD#
4 R73 1K/4/1
**SEL_HTT66/REF0 R68 1K/4/1/X
REF1 3
R63 22/4 53 2 R65 158/4/1
29,31 RESET *RESTORE# REF2 OSC_14M_NB 12
R64 1K/4/1/X

OSC_14M_NB
VCC3
kn y
t RTM880T-792_TSSOP56/[10HL6-1A0880-30R]
R66
90.9/4/1
gab
B B
RS740 3.3V 33R serial
RX780 1.8V 82.5R/130R
i
RS780 1.1V 158R/90.9R REF0/SEL_HTT66 HTT CLOCK
(Single-ended)
0 100.00 DIFFERENTIAL

1 66.66 SINGLE END


Gi

REF1/SEL_SATA SRC6/SATA
te

0 100.00 DIFFERENTIAL SPREADING SRC CLOCK

1 100.00 NON-SPREADING DIFFERENTIAL SATA CLOCK


w.

A A
ww

Title
RTM880T-792
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1

U2A
PLACE THESE PCIE AC COUPLING SB700
CAPS CLOSE TO U600 12,27 -A_RST R283 33/4 N2 P4
A_RST# PCICLK0 PCLK1 R251 33/4 LPC33
Part 1 of 5 P3 LPC33 27

PCI CLKS
C218 0.1U/4/X7R/16V/K PCICLK1 PCLK2 R160 22/4 PCICLK1 PCLK2 R126 8.2K/4/1
11 A_RX0P V23 P1 PCICLK1 21
C219 0.1U/4/X7R/16V/K PCIE_TX0P PCICLK2 PCLK3 R161 22/4 PCICLK2
11 A_RX0N V22 P2 PCICLK2 21
C220 0.1U/4/X7R/16V/K PCIE_TX0N PCICLK3 PCLK4 R252 33/4 1394CLK
11 A_RX1P V24 T4 1394CLK 35
C221 0.1U/4/X7R/16V/K PCIE_TX1P PCICLK4
11 A_RX1N V25 T3
C222 0.1U/4/X7R/16V/K PCIE_TX1N PCICLK5/GPIO41
11 A_RX2P U25
C224 0.1U/4/X7R/16V/K PCIE_TX2P
11 A_RX2N U24
C226 0.1U/4/X7R/16V/K PCIE_TX2N
11 A_RX3P T23
PCIE_TX3P

m
C227 0.1U/4/X7R/16V/K T22 N1 R165 33/4 -PPCIRST -PPCIRST 21,35 PCLK3 R124 8.2K/4/1
D 11 A_RX3N PCIE_TX3N PCIRST# D

PCI EXPRESS INTERFACE


S.B HEATSINK 11
11
A_TX0P
A_TX0N
U22
U21
PCIE_RX0P
PCIE_RX0N AD0
U2 AD0
AD[0..31] 21,35

co
11 A_TX1P U19 P7 AD1
PCIE_RX1P AD1 AD2
11 A_TX1N V19
PCIE_RX1N AD2
V4 PCLK2 PCLK3
11 A_TX2P R20 T1 AD3
PCIE_RX2P AD3 AD4

y si ial
11 A_TX2N R21 PCIE_RX2N AD4 V3 PULL WATCHDOG TIMER USE
R18 U1 AD5
11 A_TX3P PCIE_RX3P AD5 AD6 HIGH ON NB_PWRGD DEBUG
11 A_TX3N R17 V1
PCIE_RX3N AD6
1

V2 AD7 ENABLED STRAPS


SB_HS R226 562/4/1 AD7 AD8
T25 T2
1

PCIE_CALRP AD8

a.
VCC_SB R241 2.05K/4/1 T24 W1 AD9 PULL WATCHDOG TIMER IGNORE
PCIE_CALRN AD9 AD10
T9 ON NB_PWRGD DEBUG
P24
AD10
R6 AD11 LOW
VCC_SB PCIE_PVDD AD11 DISABLED STRAPS
AD12

op ne ent
R7
AD12 AD13 DEFAULT DEFAULT
P25 PCIE_PVSS AD13 R5
BC816 U8 AD14
10U/8/X5R/6.3V/K AD14 AD15
AD15 U5
Y7 AD16
AD16 AD17
AD17 W8
2

V9 AD18
AD18 AD19
Y8
2

AD19 AD20
AA8
SB_HS/[12SP2-030030-51R_12SP2-030030-52R_12SP2-030030-53R] AD20 AD21
AD21 Y4
Y3 AD22

t C do id
AD22 AD23
AD23 Y2
AA2 AD24 3VDUAL_SB
AD24 AD25
AD25 AB4
15 SBSRC_CLKP N25 AA1 AD26 LPC_CLK0 R123 8.2K/4/X BIOS after boot setting
PCIE_RCLKP/NB_LNK_CLKP AD26 AD27 R121 8.2K/4/1
15 SBSRC_CLKN N24 AB3
C PCIE_RCLKN/NB_LNK_CLKN AD27
AB2 AD28 EC AOD-ACC C
AD28 AD29
K23

no-in onf
NB_DISP_CLKP AD29 AC1

PCI INTERFACE
K22 AC2 AD30
NB_DISP_CLKN AD30 AD31
AD31 AD1
M24 W2 -C_BE0
NB_HT_CLKP CBE0# -C_BE0 21,35
M25 U7 -C_BE1 LPC_CLK1 R115 8.2K/4/1
NB_HT_CLKN CBE1# -C_BE1 21,35
AA7 -C_BE2
CBE2# -C_BE2 21,35
P17 Y1 -C_BE3
CPU_HT_CLKP CBE3# -C_BE3 21,35
M18 AA6 -FRAME
CPU_HT_CLKN FRAME# -FRAME 21,35
W5 -DEVSEL
DEVSEL# -DEVSEL 21,35
M23 AA5 -IRDY LPC_CLK0 LPC_CLK1
SLT_GFX_CLKP IRDY# -IRDY 21,35
M22 Y5 -TRDY Rev.A12
SLT_GFX_CLKN TRDY# -TRDY 21,35
U6 PAR

Do si e C
PAR PAR 21,35
J19 W6 -STOP PULL IMC CLKGEN
GPP_CLK0P STOP# -STOP 21,35
J18 W4 -PERR
GPP_CLK0N PERR# -SERR
-PERR 21,35 HIGH ENABLED ENABLED
V7 -SERR 21,35
SERR# -REQ0 AOD Extreme
L20 AC3 -REQ0 21
GPP_CLK1P REQ0# -REQ1
L19 GPP_CLK1N REQ1# AD4 -REQ1 21 PULL IMC CLKGEN
AB7 -REQ2
REQ2# -REQ2 21,35 LOW DISABLED DISABLED

CLOCK GENERATOR
M19 AE6 -REQ3
GPP_CLK2P REQ3#/GPIO70 -REQ3 21
M20 AB6 -REQ4 DEFAULT DEFAULT
GPP_CLK2N REQ4#/GPIO71 -REQ4 21
AD2 -GNT0
GNT0# -GNT0 21
N22 AE4 -GNT1
GPP_CLK3P GNT1# -GNT1 21
P22 AD5 -GNT2
kn y
t L18

J21
GPP_CLK3N

25M_48M_66M_OSC

25M_X1
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
AC6
AE5
AD6
V5

AD3
-GNT3
-GNT4

-PLOCK

-INTA
-GNT2 21,35
-GNT3 21
-GNT4 21

-PLOCK 21
gab
B INTE#/GPIO33 -INTA 21 B
AC4 -INTB
INTF#/GPIO34 -INTB 21
AE2 -INTC
INTG#/GPIO35 -INTC 21,35
J20 AE3 -INTD
25M_X2 INTH#/GPIO36 -INTD 21
i
LPCCLK0 G22 R253 22/4 LPC_CLK0 20mil 20mil
E22 R254 22/4 LPC_CLK1 Q4 RTCVDD
RTC_XI RTC_XI LPCCLK1 LAD0
A3 X1 LAD0 H24 LAD0 27 3VDUAL_SB
RTC XTAL

H23 LAD1 R163 1K/4/1


RTC_XO LAD1 LAD2 LAD1 27
J25 LAD2 27 27 VBAT
LAD2 LAD3 VBAT_2 RB 1K/4/1
J24
LPC

R166 RTC_XO LAD3 -LFRAME LAD3 27 BAT54C/SOT23/200mA BC783 BC22


Gi

B3 X2 LFRAME# H25 -LFRAME 27


20M/4 -LDRQ0 0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K
LDRQ0#
LDRQ1#/GNT5#/GPIO68
H22
AB8 -LDRQ1 R76
-LDRQ0 27
8.2K/4/X
VCC3
20mil
AD7 R2710 8.2K/4/1
BMREQ#/REQ5#/GPIO65 VCC3
R169 8.2K/4/1 SERIRQ
te

VCC18 SERIRQ V15 SERIRQ 27


CLR_CMOS
4

F23 RTCVDD
12 ALLOW_LDTSTOP ALLOW_LDTSTP

1
1 2 X4 -PROCHOT_CPU F24 C3 RTC_CLK
6 -PROCHOT_CPU PROCHOT# RTCCLK
32.768K/12.5p/20ppm/TF38/35K/D F22 C2 -INTR_ALERT R255 100K/4/1 RTCVDD BAT
6 CPU_PG_SB LDT_PG INTRUDER_ALERT#
CPU

RTC

-LDT_STOP G25 B2 RTCVDD BAT-SK/BK/P/S/D/SN PH/1*2/BK/2.54/VA/D


6,12 -LDT_STOP
3

-CPURST LDT_STP# VBAT


6,12 -CPURST G24
LDT_RST#
CLR_CMOS

2
C93 C92 Note: LDT_PG, LDT_STP# & LDT_RST# are OD BC21 CR2032 BAT
w.

15P/4/NPO/50V/J 15P/4/NPO/50V/J SB710/FCBGA528/A14/[10HB1-06B710-11R] 0.1u/4/X7R/16V/K CR2032


and require a PU to the CPU I/O rail. They are + SHORT CLEAR CMOS
also in the S5 domain to prevent glitching at
power up.
OPEN NORMAL

X4 NOT ADD ICT FOR RTCVDD PIN


A A
ww

SHW/D0.64*5.08*6.74
3VDUAL_SB

RTC_CLK R171 8.2K/4/1

Title
ATI SB710 PCIE/PCI/CPU/LPC
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 16 of 35
5 4 3 2 1
5 4 3 2 1

USB11 FRONT PANEL


-SLP_S5 R105 8.2K/4/X USB10 FRONT PANEL
U2D USB9 FRONT PANEL
SB_TEST2 R69 8.2K/4/1
SB_TEST1 R70 8.2K/4/1 Part 4 of 5 USB8 FRONT PANEL
SB_TEST0 R72 8.2K/4/1 E1
SB700
21,35 -PCIPME
-RI PCI_PME#/GEVENT4# USB7 FRONT PANEL
24 -RI E2 C8 USB48M 15
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC USB6 FRONT PANEL
H7
SLP_S2/GPM9# R67 11.8K/4/1
27,31,33 -SLP_S3 F5 G8 USB5 FRONT PANEL
SLP_S3# USB_RCOMP

USB MISC
-SLP_S5 G1
VCC3 R50 0/4/SHT/X -PWRBTN SLP_S5# USB4 FRONT PANEL

ACPI / WAKE UP EVENTS


27 -PSOUT H2
PWR_BTN# For USB eye

m
31 SB_PWROK H1 USB3 REAR PANEL
D -SUS_STAT R208 8.2K/4/1 -SUS_STAT PWR_GOOD D
12 -SUS_STAT K3
SMBCLK R78 1K/4/1 SB_TEST2 SUS_STAT# USB2 REAR PANEL
H5 E6
SMBDATA R79 1K/4/1 SB_TEST1 TEST2 USB_FSD13P
H4 E7 USB1 REAR PANEL
TEST1 USB_FSD13N

co
WD_PWRGD R81 8.2K/4/1 SB_TEST0 H3
TEST0 USB0 REAR PANEL

USB 1.1
27 A20GATE Y15 F7
GA20IN/GEVENT0# USB_FSD12P
27 -KBRST W15 KBRST#/GEVENT1# USB_FSD12N E8
-LPCPME

y si ial
27 -LPCPME K4 LPC_PME#/GEVENT3#
K24 H11 +USBP11
3VDUAL_SB 27 GP53 LPC_SMI#/EXTEVNT1# USB_HSD11P +USBP11 24
F1 J10 -USBP11
31 S3_STATE S3_STATE/GEVENT5# USB_HSD11N -USBP11 24
R164 22/4 J2
29 -SYS_RST SYS_RESET#/GPM7#
-RI R187 8.2K/4/1 -PCIE_WAKE H6 E11 +USBP10 either HWM inputs or PWR_GD signals
20,34 -PCIE_WAKE WAKE#/GEVENT8# USB_HSD10P +USBP10 24

a.
SMBCLK1 R173 2.2K/4/1 C108 22P/4/N/50V/X F2 F11 -USBP10
29 SB_BLINK BLINK/GPM6# USB_HSD10N -USBP10 24 can be used for power-up sequencer
SMBDATA1 R181 2.2K/4/1 THERMTRIP_CPU_L J6
6 THERMTRIP_CPU_L SMBALERT#/THRMTRIP#/GEVENT2#
-PCIPME R209 2.2K/4/1 R167 0/4/X WD_PWRGD W14 A11 +USBP9
12,31 NB_PWROK NB_PWRGD USB_HSD9P +USBP9 24
-PCIE_WAKE R211 2.2K/4/1 -USBP9

op ne ent
B11 -USBP9 24
-RSMRST USB_HSD9N 3VDUAL_SB
D3 RSMRST#
C10 +USBP8
USB_HSD8P +USBP8 24
D10 -USBP8 IMC_GPIO17 R112 2.2K/4/1
USB_HSD8N -USBP8 24
AE18 G11 +USBP7
SATA_IS0#/GPIO10 USB_HSD7P +USBP7 24
AD18 H12 -USBP7
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N -USBP7 24
AA19 SMATVOLT1/SATA_IS2#/GPIO4
SB_PWROK W17 E12 +USBP6
CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P +USBP6 24
V17 E14 -USBP6 IMC_GPIO16 R83 2.2K/4/1
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N -USBP6 24
W20

t C do id
C1064 SPKR CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 +USBP5
W21 C12

USB 2.0
29 SPKR SPKR/GPIO2 USB_HSD5P +USBP5 28
100P/4/NPO/50V/J/X SMBCLK AA18 D12 -USBP5
8,9,15,30 SMBCLK SCL0/GPOC0# USB_HSD5N -USBP5 28
SMBDATA W18 IMC_GPIO17 IMC_GPIO16
8,9,15,30 SMBDATA SDA0/GPOC1#
20 SMBCLK1 SMBCLK1 K1 B12 +USBP4
SCL1/GPOC2# USB_HSD4P +USBP4 28
20 SMBDATA1 SMBDATA1 K2 A12 -USBP4 ROM TYPE:
SDA1/GPOC3# USB_HSD4N -USBP4 28

GPIO
C AA20 C
SMBCLK DDC1_SCL/GPIO9 +USBP3 H, H = Reserved

no-in onf
23 P66DET Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 +USBP3 34
SMBDATA C1 G14 -USBP3
LLB#/GPIO66 USB_HSD3N -USBP3 34
Y19 H, L = SPI ROM DEFAULT
DDR3_RST- SMARTVOLT2/SHUTDOWN#/GPIO5 +USBP2
13 DDR3_RST- G5 H14 +USBP2 34
C1050 C1051 DDR3_RST#/GEVENT7# USB_HSD2P -USBP2
USB_HSD2N H15 -USBP2 34 L, H = LPC ROM
100P/4/N/50V/X 100P/4/N/50V/X
VDD_MEM A13 +USBP1 3VDUAL_SB L, L = FWH ROM
USB_HSD1P +USBP1 35
B13 -USBP1
USB_HSD1N -USBP1 35
R91 8.2K/4/1/X
DDR3_RST- D6
PCIE_RST- 20,27,34
B14 +USBP0
USB_HSD0P +USBP0 35
AZ_BIT_CLK CD4148WP/1206/300mA/X B9 A14 -USBP0
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N -USBP0 35
B8 R90 R95

Do si e C
USB_OC5#/IR_TX0/GPM5# IMC_DBREQ- 8.2K/4/1 8.2K/4/1
A8 A18

USB OC
C1063 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 IMC_DBRDY
A9 B18
22P/4/NPO/50V/J/X USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
34 -USBOC_R1 E5 F21
USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
F8 D21
USB_OC1#/GPM1# SCL2/IMC_GPIO11
24 -USBOC_F1 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
E20 DDR15V
R170 22/4 SCL3_LV/IMC_GPIO13
25 AZ_BIT_CLK M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
25 AZ_SDATA_OUT R184 22/4 M2 E19
AZ_SDOUT IMC_PWM1/IMC_GPIO15 IMC_GPIO16
AZ_RST# 25 AZ_SDATA_IN0 J7
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
D19
Rev.A12 J8 E18 IMC_GPIO17 R293

HD AUDIO
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 8.2K/4/1
PULL ENABLE PCI L8

-AZ_RST R77 8.2K/4/1 HIGH

PULL
MEM BOOT

DISABLE PCI
kn y
t 25 AZ_SYNC
25 -AZ_RST
R202
R204
22/4
22/4
M3
L6
M4
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
G20
G21
D25
IMC_CRST-

IMC_CRST-
2
3 CPU_CRST-
CPU_CRST- 6

INTEGRATED uC
L5 D24 1
AZ_DOCK_RST#/GPM8# IMC_GPIO21
LOW MEM BOOT IMC_GPIO22
C25
C24
AOD Extreme Q51
gab
IMC_GPIO23

SOT23
B DEFAULT B25 MMBT3904/SOT23/200mA/30 B
IMC_GPIO24
IMC_GPIO25 C23
IMC_TRST- DDR15V
i
B24
IMC_GPIO26 IMC_TDO
IMC_GPIO27 B23
3VDUAL_SB R82 20K/4/1 -RSMRST A23 IMC_TDI
-RSMRST 27 IMC_GPIO28
C22 IMC_TMS
IMC_GPIO29 IMC_TCK R287
IMC_GPIO30 A22
BC28 B22 8.2K/4/1
IMC_GPIO31
2.2U/6/X5R/6.3V/K B21
IMC_GPIO32
A21 2
IMC_GPIO33 CPU_TMS
Gi

H19 IMC_GPIO0 IMC_GPIO34 D20 3 CPU_TMS 6


R221 8.2K/4/1 IMC_TMS

INTEGRATED uC
VCC3 H20 IMC_GPIO1 IMC_GPIO35 C20 1
H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
R225 0/4/SHT/X IDE_RST F25 B20 Q49
23,27 -IDERST IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37

SOT23
MMBT3904/SOT23/200mA/30
te

IMC_GPIO38 B19
DDR15V DDR15V D22 A19
IMC_GPIO4 IMC_GPIO39
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 C18
IMC_GPIO6 IMC_GPIO41 DDR15V
D23 IMC_GPIO7
R240 R256
8.2K/4/1 8.2K/4/1

SB710/FCBGA528/A14/[10HB1-06B710-11R] R290
w.

2 2
3 CPU_DBREQ- 3 CPU_TRST- 8.2K/4/1
CPU_DBREQ- 6 CPU_TRST- 6
IMC_DBREQ- 1 IMC_TRST- 1
2
Q44 Q46 3 CPU_TCK
DDR15V CPU_TCK 6
SOT23

SOT23

MMBT3904/SOT23/200mA/30 MMBT3904/SOT23/200mA/30 IMC_TCK 1


A DDR15V DDR15V Q50 A

SOT23
MMBT3904/SOT23/200mA/30
ww

R264
8.2K/4/1
R248 R259
8.2K/4/1 8.2K/4/1 2
3 IMC_TDI
2 2 CPU_TDO 1
6 CPU_TDO Title
3 IMC_DBRDY 3 CPU_TDI
CPU_TDI 6
6 CPU_DBRDY
CPU_DBRDY 1 IMC_TDO 1 Q48
ATI SB710 ACPI/USB/GPIO/AUDIO
SOT23

MMBT3904/SOT23/200mA/30
Q45 Q47 Size Document Number Rev
Custom
SOT23

SOT23

MMBT3904/SOT23/200mA/30 MMBT3904/SOT23/200mA/30 GA-880GM-UD2H 1.0


Date: Monday, February 22, 2010 Sheet 17 of 35
5 4 3 2 1
5 4 3 2 1

SATA2_0 SATA2_1
SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B
1 7
SP_TX0P_C C1310 0.01U/4/X7R/25V/K GND GND C1307 0.01U/4/X7R/25V/K SP_RX1P_C
2 6
SP_TX0M_C C1309 0.01U/4/X7R/25V/K A+ B+ C1311 0.01U/4/X7R/25V/K SP_RX1M_C
3 5
A- B-
4 4
SP_RX0M_C C1308 0.01U/4/X7R/25V/K GND GND C1300 0.01U/4/X7R/25V/K SP_TX1M_C
5 3
SP_RX0P_C C1302 0.01U/4/X7R/25V/K B- A- C1286 0.01U/4/X7R/25V/K SP_TX1P_C
6 2
B+ A+
7 1
GND GND
1 7
SP_TX2P_C C1279 0.01U/4/X7R/25V/K GND GND C1284 0.01U/4/X7R/25V/K SP_RX3P_C
2 6
SP_TX2M_C C1278 0.01U/4/X7R/25V/K A+ B+ C1285 0.01U/4/X7R/25V/K SP_RX3M_C
3 5
A- B-

m
4 4
D SP_RX2M_C C1282 0.01U/4/X7R/25V/K GND GND C1281 0.01U/4/X7R/25V/K SP_TX3M_C D
5
B- A-
3 PLACE SATA AC COUPLING
SP_RX2P_C C1283 0.01U/4/X7R/25V/K 6 2 C1280 0.01U/4/X7R/25V/K SP_TX3P_C
B+ A+ CAPS CLOSE TO SB600
7 1
GND GND

co
SATA2_2 SATA2_3
SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B
U2B

y si ial
SP_TX0P_C AD9
SB700 AA24 PIORDY
SATA_TX0P IDE_IORDY PIORDY 23
SP_TX0M_C AE9 Part 2 of 5 AA25 IRQ14
SATA_TX0N IDE_IRQ IRQ14 23

a.
SATA2_4 Y22 PDA0
IDE_A0 PDA0 23
SATA2/7/BU/H/OP/VA/D/1/B SP_RX0M_C AB10 AB23 PDA1
SATA_RX0N IDE_A1 PDA1 23
1 GND SP_RX0P_C AC10 Y23 PDA2
SATA_RX0P IDE_A2 PDA2 23
SP_TX4P_C C97 0.01U/4/X7R/25V/K -PDDACK

op ne ent
2 AB24 -PDDACK 23
SP_TX4M_C C89 0.01U/4/X7R/25V/K A+ SP_TX1P_C IDE_DACK# PDDREQ
3 A- AE10 SATA_TX1P IDE_DRQ AD25 PDDREQ 23
4 SP_TX1M_C AD10 AC25 -PDIOR
GND SATA_TX1N IDE_IOR# -PDIOR 23
SP_RX4M_C C96 0.01U/4/X7R/25V/K 5 B- AC24 -PDIOW
IDE_IOW# -PDIOW 23
SP_RX4P_C C98 0.01U/4/X7R/25V/K 6 SP_RX1M_C AD11 Y25 -PCS1
B+ SATA_RX1N IDE_CS1# -PCS1 23
7 GND SP_RX1P_C AE11 Y24 -PCS3
SATA_RX1P IDE_CS3# -PCS3 23
SP_TX2P_C AB12 AD24 PDD0 PDD[0..15]
SATA_TX2P IDE_D0/GPIO15 PDD[0..15] 23
SP_TX2M_C AC12 AD23 PDD1
SATA_TX2N IDE_D1/GPIO16

ATA 66/100/133
AE22 PDD2
SP_RX2M_C IDE_D2/GPIO17 PDD3
AE12 AC22

t C do id
SP_RX2P_C SATA_RX2N IDE_D3/GPIO18 PDD4
AD12 SATA_RX2P IDE_D4/GPIO19 AD21
AE20 PDD5
SP_TX3P_C IDE_D5/GPIO20 PDD6
AD13 SATA_TX3P IDE_D6/GPIO21 AB20

SERIAL ATA
SATA5RXPC 0.01U/4/X7R/25V/K C165 SP_RX5P_C SP_TX3M_C AE13 AD19 PDD7
35 SATA5RXPC SATA_TX3N IDE_D7/GPIO22
SATA5RXNC 0.01U/4/X7R/25V/K C166 SP_RX5M_C AE19 PDD8
C 35 SATA5RXNC IDE_D8/GPIO23 C
SP_RX3M_C AB14 AC20 PDD9
SATA5TXNC 0.01U/4/X7R/25V/K C169 SP_TX5M_C SP_RX3P_C SATA_RX3N IDE_D9/GPIO24 PDD10
AC14

no-in onf
35 SATA5TXNC SATA_RX3P IDE_D10/GPIO25 AD20
SATA5TXPC 0.01U/4/X7R/25V/K C177 SP_TX5P_C AE21 PDD11
35 SATA5TXPC IDE_D11/GPIO26
SP_TX4P_C AE14 AB22 PDD12
SP_TX4M_C SATA_TX4P IDE_D12/GPIO27 PDD13
AD14 AD22
SATA_TX4N IDE_D13/GPIO28 PDD14
IDE_D14/GPIO29 AE23
SP_RX4M_C AD15 AC23 PDD15
SP_RX4P_C SATA_RX4N IDE_D15/GPIO30
AE15 SATA_RX4P
SP_TX5P_C AB16
SP_TX5M_C SATA_TX5P
AC16 SATA_TX5N
G6 SB_SPI_DI_R R97 22/4 SB_SPI_DI
SP_RX5M_C SPI_DI/GPIO12 SB_SPI_DO_R R100 22/4 SB_SPI_DO
AE16 D2

Do si e C
SP_RX5P_C SATA_RX5N SPI_DO/GPIO11 SB_SPI_CLK_R R92 22/4 SB_SPI_CLK VCC3
AD16 D1
SATA_RX5P SPI_CLK/GPIO47
F4

SPI ROM
R2194 1K/4/1 SATA_CAL SPI_HOLD#/GPIO31 -SB_SPI_CS R94 22/4 -SB_SPI_CS_ITE M_BIOS
PLACE SATA_CAL V12
SATA_CAL SPI_CS1#/GPIO32
F3 -SB_SPI_CS_ITE 27
RES VERY CLOSE SATA_X1 Y12 U15 -ITE_SPI_CS 1 8 BC203 0.1u/4/X7R/16V/K
SATA_X1 LAN_RST#/GPIO13 27 -ITE_SPI_CS CS# VDD
TO BALL OF U600 ROM_RST#/GPIO14 J1
SATA_X2 AA12 SB_SPI_DI 2 7 -SPI_HOLD0
SATA_X2 SO HOLD#
M8
-SATA_LED FANOUT0/GPIO3 -BIOS_WP SB_SPI_CLK
NOTE: 23 -SATA_LED W11
SATA_ACT#/GPIO67 FANOUT1/GPIO48
M5
M7
3
WP# SCK
6
FANOUT2/GPIO49 SB_SPI_DO
R650 IS 1K 1% FOR 25MHz 4 5
XTAL, 4.99K 1% FOR 100MHz t VCC_SB AA11 P5
VSS SI
MAIN BIOS

SATA PWR
PLLVDD_SATA FANIN0/GPIO50
FANIN1/GPIO51 P8
kn y
INTERNAL CLOCK VCC3 W12
XTLVDD_SATA FANIN2/GPIO52
R8 8M/SPI/SO8/200mil/S

C6
TEMP_COMM
B6
gab
B TEMPIN0/GPIO61 VDD_MEM_OV2 33 B
SATA_X2 A6
TEMPIN1/GPIO62 VCC_SB_OV2 32
R168 SATA_X1

HW MONITOR
TEMPIN2/GPIO63 A5 VCC_SB_OV1 32
10M/4 B5
VCC_SB TEMPIN3/TALERT#/GPIO64
i
VCC_SB VCC3
VIN0/GPIO53 A4 HDMI_DVI_BIOS 23
X6
VIN1/GPIO54 B4 VDD_MEM_OV1 33
BC124 BC123 1 2 C4 B_BIOS
VIN2/GPIO55 NB_VCC_OV2 32
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K D4
VIN3/GPIO56 NB_VCC_OV1 32
25M/20p/30ppm/49US/20/D D5 27 -ITE_SPI_CS1 -ITE_SPI_CS1 1 8
VIN4/GPIO57 DDR18V_OV4 33 CS# VDD
D6 DDR18V_OV3 33
VIN5/GPIO58 SB_SPI_DI -SPI_HOLD0
A7 DDR18V_OV2 33 2 7
C115 C119 VIN6/GPIO59 SO HOLD#
Gi

VIN7/GPIO60 B7 DDR18V_OV1 33
10P/4/NPO/50V/J 10P/4/NPO/50V/J -BIOS_WP 3 6 SB_SPI_CLK
WP# SCK
VCC3 VCC3 4 5 SB_SPI_DO
VSS SI
BACKUP BIOS
te

AVDD F6 3VDUAL_SB
BC112 BC110 G7 BC117 8M/SPI/SO8/200mil/S
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K AVSS BC119 1u/4/X5R/6.3V/K
0.1u/4/X7R/16V/K
SB710/FCBGA528/A14/[10HB1-06B710-11R]
VCC3

-SPI_HOLD0 R29 1K/4/1


w.

SB_SPI_DO R34 1K/4/X


-BIOS_WP R38 1K/4/1
SB_SPI_DI R39 1K/4/X

-ITE_SPI_CS R28 1K/4/1


A A
-ITE_SPI_CS1 R33 1K/4/1
ww

Title
ATI SB710 SATA/IDE/HWM/SPI
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 18 of 35
5 4 3 2 1
5 4 3 2 1

PLACE ALL THE DECOUPLING CAPS ON VCC_SB


THIS SHEET CLOSE TO SB AS POSSIBLE.
For SB700 A12
SBC67 SBC65 BC792
0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K 10U/8/X5R/6.3V/K

VCC3 U2C U2E

m
D SB700 D
L9
M9
VDDQ_1
Part 3 of 5
VDD_1
L15
M12
SB700 A2
VDDQ_2 VDD_2 VSS_1
T15 M14 A25
VDDQ_3 VDD_3 VSS_2

co
U9 N13 SBC54 SBC63 SBC64 B1

CORE S0
BC793 BC802 SBC68 SBC60 SBC48 SBC74 VDDQ_4 VDD_4 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 1U/6/X7R/16V/K VSS_3
U16 P12 D7
VDDQ_5 VDD_5 VSS_4

PCI/GPIO I/O
10U/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K U17 P14 T10 F20
VDDQ_6 VDD_6 AVSS_SATA_1 VSS_5

y si ial
V8 VDDQ_7 VDD_7 R11 U10 AVSS_SATA_2 VSS_6 G19
W7 VDDQ_8 VDD_8 R15 U11 AVSS_SATA_3 VSS_7 H8
Y6 T16 U12 K9
VDDQ_9 VDD_9 AVSS_SATA_4 VSS_8
AA4 VDDQ_10 V11 AVSS_SATA_5 VSS_9 K11
AB5 V14 K16
VDDQ_11 AVSS_SATA_6 VSS_10

a.
AB21 VDDQ_12 W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
Y11 AVSS_SATA_9 VSS_13 L10
VCC3

op ne ent
Y14 L11
AVSS_SATA_10 VSS_14
Y17 AVSS_SATA_11 VSS_15 L12
Y20 L21 VCC_SB AA9 L14
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_12 VSS_16
1.8V: Flash module mode AA21 L22 AB9 L16

IDE/FLSH I/O

CLKGEN I/O
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_13 VSS_17
3.3V: IDE mode AA22 L24 AB11 M6
BC796 SBC49 SBC47 VDD33_18_3 CKVDD_1.2V_3 BC776 AVSS_SATA_14 VSS_18
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB13 AVSS_SATA_15 VSS_19 M10
10U/8/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K AB15 M11
AVSS_SATA_16 VSS_20
AB17 AVSS_SATA_17 VSS_21 M13
AC8 M15
AVSS_SATA_18 VSS_22
AD8 AVSS_SATA_19 VSS_23 N4
AE8 N12

t C do id
AVSS_SATA_20 VSS_24
VSS_25 N14
3VDUAL_SB P6
POWER VSS_26
VSS_27 P9
P10
VSS_28
A15 AVSS_USB_1 VSS_29 P11
C P18 B15 P13 C
VCC_SB PCIE_VDDR_1 AVSS_USB_2 VSS_30
P19 SBC77 BC798

no-in onf
PCIE_VDDR_2 C14 AVSS_USB_3 VSS_31 P15
P20 1u/4/X5R/6.3V/K 10U/8/X5R/6.3V/K D8 R1

A-LINK I/O
BC773 BC771 SBC66 SBC62 BC93 PCIE_VDDR_3 AVSS_USB_4 VSS_32
P21 PCIE_VDDR_4 S5_3.3V_1 A17 D9 AVSS_USB_5 VSS_33 R2
10U/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K R22 A24 D11 R4
PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_6 VSS_34
R24 PCIE_VDDR_6 S5_3.3V_3 B17 D13 AVSS_USB_7 VSS_35 R9

GROUND
3.3V_S5 I/O
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D14 AVSS_USB_8 VSS_36 R10
S5_3.3V_5 J5 D15 AVSS_USB_9 VSS_37 R12
L1 E15 R14
S5_3.3V_6 SBC57 SBC78 SBC76 AVSS_USB_10 VSS_38
L2 F12 T11
S5_3.3V_7 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K AVSS_USB_11 VSS_39
F14 AVSS_USB_12 VSS_40 T12
G9 T14
AVSS_USB_13 VSS_41
AA14 H9 U4

Do si e C
VCC_SB AVDD_SATA_1 AVSS_USB_14 VSS_42
AB18 H17 U14
AVDD_SATA_4 AVSS_USB_15 VSS_43
AA15 J9 V6
AVDD_SATA_2 AVSS_USB_16 VSS_44

SATA I/O
BC772 SBC61 SBC52 SBC73 AA17 G2 VCC12_DUAL J11 Y21

CORE S5
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 10U/8/X5R/6.3V/K AVDD_SATA_3 S5_1.2V_1 AVSS_USB_17 VSS_45
AC18 G4 J12 AB1
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_18 VSS_46
AD17 AVDD_SATA_6 J14 AVSS_USB_19 VSS_47 AB19
AE17 AVDD_SATA_7 J15 AVSS_USB_20 VSS_48 AB25
K10 AVSS_USB_21 VSS_49 AE1
A10 VCC12_DUAL K12 AE24
USB_PHY_1.2V_1 AVSS_USB_22 VSS_50
B10 K14
USB_PHY_1.2V_2 AVSS_USB_23
K15 AVSS_USB_24
P23

3VDUAL_SB
kn y
t A16
B16
AVDDTX_0 V5_VREF
AE7 V5_VREF R88 1K/4/1 VCC H18
J17
PCIE_CK_VSS_1
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
R16
R19
T17
U18
U20
V18
gab
B AVDDTX_1 VCC3 PCIE_CK_VSS_2 PCIE_CK_VSS_15 B
C16 AVDDTX_2 AVDDCK_3.3V J16 Q8 J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
BC775 BC135 BC137 SBC79 SBC70 SBC71 D16 BC128 K25 V21
10U/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K AVDDTX_3 VCC_SB 1u/4/X5R/6.3V/K PCIE_CK_VSS_4 PCIE_CK_VSS_17
D17 K17 M16 W19

PLL
AVDDTX_4 AVDDCK_1.2V VCC3 PCIE_CK_VSS_5 PCIE_CK_VSS_18
i
E17 M17 W22
AVDDTX_5 PCIE_CK_VSS_6 PCIE_CK_VSS_19
USB I/O
F15 E9 3VDUAL_SB M21 W24
AVDDRX_0 AVDDC PCIE_CK_VSS_7 PCIE_CK_VSS_20
F17 AVDDRX_1 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
F18 BAT54C/SOT23/200mA
AVDDRX_2
G15 AVDDRX_3 F9 AVSSC AVSSCK L17
G17
AVDDRX_4 Part 5 of 5
G18
AVDDRX_5 SB710/FCBGA528/A14/[10HB1-06B710-11R]
Gi

SB710/FCBGA528/A14/[10HB1-06B710-11R] VCC3 VCC3

BC126
te

1u/4/X5R/6.3V/K

VCC12_DUAL
w.

BC794 BC811 SBC58 SBC59 SBC75 VCC_SB VCC_SB


10U/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K

BC127
1u/4/X5R/6.3V/K

A A
ww

3VDUAL_SB 3VDUAL_SB

Title
BC134
1u/4/X5R/6.3V/K
BC133
0.1u/4/X7R/16V/K
ATI SB710 POWER & GND
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 19 of 35
5 4 3 2 1
8 7 6 5 4 3 2 1

EXP_A_RXP[0..15] EXP_A_TXP[0..15] PCIE_RST-


EXP_A_RXP[0..15] 11 EXP_A_TXP[0..15] 11
EXP_A_RXN[0..15] EXP_A_TXN[0..15]
EXP_A_RXN[0..15] 11 EXP_A_TXN[0..15] 11
EXP_A_TXP0 C1644 0.1U/4/X7R/16V/K EXP_A_TXP0C
EXP_A_TXN0 C1645 0.1U/4/X7R/16V/K EXP_A_TXN0C C1643
+12V EXP_A_TXP1 C1646 0.1U/4/X7R/16V/K EXP_A_TXP1C 100P/4/N/50V/X
+12V 3GIO_*16 EXP_A_TXN1 C1647 0.1U/4/X7R/16V/K EXP_A_TXN1C
PCIEX16 EXP_A_TXP2 C1648 0.1U/4/X7R/16V/K EXP_A_TXP2C
B1 A1 EXP_A_TXN2 C1649 0.1U/4/X7R/16V/K EXP_A_TXN2C
12V PRSNT1* EXP_A_TXP3 C1650 0.1U/4/X7R/16V/K EXP_A_TXP3C
B2 12V 12V A2
B3 A3 EXP_A_TXN3 C1651 0.1U/4/X7R/16V/K EXP_A_TXN3C
RSVD 12V EXP_A_TXP4 C1652 0.1U/4/X7R/16V/K EXP_A_TXP4C
B4 GND GND A4
SMBCLK1 B5 A5 EXP_A_TXN4 C1653 0.1U/4/X7R/16V/K EXP_A_TXN4C

m
17 SMBCLK1 SMCLK JTAG2
D 17 SMBDATA1 SMBDATA1 B6 A6 EXP_A_TXP5 C1654 0.1U/4/X7R/16V/K EXP_A_TXP5C D
SMDAT JTAG3 EXP_A_TXN5 C1655 0.1U/4/X7R/16V/K EXP_A_TXN5C PCIE_RST-
B7 GND JTAG4 A7
B8 A8 EXP_A_TXP6 C1656 0.1U/4/X7R/16V/K EXP_A_TXP6C
VCC3 3.3V JTAG5
B9 A9 EXP_A_TXN6 C1657 0.1U/4/X7R/16V/K EXP_A_TXN6C

co
JTAG1 3.3V VCC3
3VDUAL B10 A10 EXP_A_TXP7 C1658 0.1U/4/X7R/16V/K EXP_A_TXP7C
-PCIE_WAKE 3.3VAUX 3.3V PCIE_RST- EXP_A_TXN7 C1659 0.1U/4/X7R/16V/K EXP_A_TXN7C C1746
17,34 -PCIE_WAKE B11 WAKE* PWRGD A11 PCIE_RST- 17,27,34
KEY EXP_A_TXP8 C1660 0.1U/4/X7R/16V/K EXP_A_TXP8C 100P/4/N/50V/X

y si ial
VCC3 EXP_A_TXN8 C1661 0.1U/4/X7R/16V/K EXP_A_TXN8C
B12 A12 EXP_A_TXP9 C1662 0.1U/4/X7R/16V/K EXP_A_TXP9C
RSVD GND EXP_A_TXN9 C1663 0.1U/4/X7R/16V/K EXP_A_TXN9C
B13 GND REFCLK+ A13 SRCCLK_3GIO_A 15
R2400 EXP_A_TXP0C B14 A14 EXP_A_TXP10 C1664 0.1U/4/X7R/16V/K EXP_A_TXP10C
HSOP0 REFCLK- -SRCCLK_3GIO_A 15
8.2K/4/1 EXP_A_TXN0C B15 A15 EXP_A_TXN10 C1665 0.1U/4/X7R/16V/K EXP_A_TXN10C
HSON0 GND

a.
B16 A16 EXP_A_RXP0 EXP_A_TXP11 C1666 0.1U/4/X7R/16V/K EXP_A_TXP11C
PE0_PRSNT- GND HSIP0 EXP_A_RXN0 EXP_A_TXN11 C1667 0.1U/4/X7R/16V/K EXP_A_TXN11C
B17 PRSNT2* HSIN0 A17
B18 A18 EXP_A_TXP12 C1668 0.1U/4/X7R/16V/K EXP_A_TXP12C
GND GND EXP_A_TXN12 C1669 0.1U/4/X7R/16V/K EXP_A_TXN12C

op ne ent
EXP_A_TXP13 C1670 0.1U/4/X7R/16V/K EXP_A_TXP13C
EXP_A_TXP1C B19 A19 EXP_A_TXN13 C1671 0.1U/4/X7R/16V/K EXP_A_TXN13C
EXP_A_TXN1C HSOP1 RSVD EXP_A_TXP14 C1672 0.1U/4/X7R/16V/K EXP_A_TXP14C
B20 HSON1 GND A20
B21 A21 EXP_A_RXP1 EXP_A_TXN14 C1673 0.1U/4/X7R/16V/K EXP_A_TXN14C
GND HSIP1 EXP_A_RXN1 EXP_A_TXP15 C1674 0.1U/4/X7R/16V/K EXP_A_TXP15C
B22 GND HSIN1 A22
EXP_A_TXP2C B23 A23 EXP_A_TXN15 C1675 0.1U/4/X7R/16V/K EXP_A_TXN15C
EXP_A_TXN2C HSOP2 GND
B24 HSON2 GND A24
B25 A25 EXP_A_RXP2
GND HSIP2 EXP_A_RXN2
B26 GND HSIN2 A26
EXP_A_TXP3C B27 A27
HSOP3 GND

t C do id
EXP_A_TXN3C B28 A28
HSON3 GND EXP_A_RXP3
B29 GND HSIP3 A29
B30 A30 EXP_A_RXN3
RSVD HSIN3
B31 PRSNT2* GND A31
B32 GND RSVD A32
C C
EXP_A_TXP4C B33 A33
HSOP4 RSVD

no-in onf
EXP_A_TXN4C B34 A34 3GIO_X1 +12V
HSON4 GND EXP_A_RXP4 +12V PCIEX1
B35 GND HSIP4 A35
B36 A36 EXP_A_RXN4
EXP_A_TXP5C GND HSIN4
B37 HSOP5 GND A37 B1 12V PRSNT1* A1
EXP_A_TXN5C B38 A38 B2 A2
HSON5 GND EXP_A_RXP5 12V 12V
B39 GND HSIP5 A39 B3 RSVD 12V A3
B40 A40 EXP_A_RXN5 B4 A4
EXP_A_TXP6C GND HSIN5 SMBCLK1 GND GND
B41 HSOP6 GND A41 17 SMBCLK1 B5 SMCLK JTAG2 A5
EXP_A_TXN6C B42 A42 SMBDATA1 B6 A6
HSON6 GND 17 SMBDATA1 SMDAT JTAG3
B43 A43 EXP_A_RXP6 B7 A7
GND HSIP6 EXP_A_RXN6 GND JTAG4
B44 GND HSIN6 A44 VCC3 B8 3.3V JYAG5 A8
EXP_A_TXP7C

Do si e C
B45 HSOP7 GND A45 B9 JTAG1 3.3V A9 VCC3
EXP_A_TXN7C B46 A46 B10 A10
HSON7 GND 3VDUAL 3.3VAUX 3.3V
B47 A47 EXP_A_RXP7 -PCIE_WAKE B11 A11 PCIE_RST-
GND HSIP7 EXP_A_RXN7 17,34 -PCIE_WAKE WAKE* PWRGD PCIE_RST- 17,27,34
B48 PRSNT2* HSIN7 A48
B49 GND GND A49 KEY
B12 RVSD GND A12
B13 GND REFCLK+ A13 PCIE1_CLK 15
11 PCIE1_OP B14 HSOP0 REFCLK- A14 -PCIE1_CLK 15
EXP_A_TXP8C B50 A50 B15 A15
HSOP8 RSVD 11 PCIE1_ON HSON0 GND
EXP_A_TXN8C B51 A51 B16 A16
HSON8 GND GND HSIP0 PCIE1_IP 11
B52 A52 EXP_A_RXP8 R35 8.2K/4/1PE1_PRSNT- B17 A17
GND HSIP8 VCC3 PRSNT2* HSIN0 PCIE1_IN 11
B53 A53 EXP_A_RXN8 B18 A18
EXP_A_TXP9C
EXP_A_TXN9C

EXP_A_TXP10C
EXP_A_TXN10C
B54
B55
B56
B57
B58
B59
GND
HSOP9
HSON9
GND
GND
HSOP10
HSON10
kn y
t HSIN8
GND
GND
HSIP9
HSIN9
GND
GND
A54
A55
A56
A57
A58
A59
EXP_A_RXP9
EXP_A_RXN9
GND

PCI-E/1X-36P/WH/OL
GND
gab
B EXP_A_RXP10 B
B60 GND HSIP10 A60
B61 A61 EXP_A_RXN10
EXP_A_TXP11C GND HSIN10
B62 HSOP11 GND A62
EXP_A_TXN11C B63 A63
i
HSON11 GND EXP_A_RXP11
B64 GND HSIP11 A64
B65 A65 EXP_A_RXN11
EXP_A_TXP12C GND HSIN11
B66 HSOP12 GND A66
EXP_A_TXN12C B67 A67
HSON12 GND EXP_A_RXP12
B68 GND HSIP12 A68
B69 A69 EXP_A_RXN12
EXP_A_TXP13C GND HSIN12
B70 HSOP13 GND A70
EXP_A_TXN13C B71 A71
HSON13 GND
Gi

B72 A72 EXP_A_RXP13


GND HSIP13 EXP_A_RXN13
B73 GND HSIN13 A73
EXP_A_TXP14C B74 A74
EXP_A_TXN14C HSOP14 GND
B75 HSON14 GND A75
te

B76 A76 EXP_A_RXP14


GND HSIP14 EXP_A_RXN14
B77 GND HSIN14 A77
EXP_A_TXP15C B78 A78
EXP_A_TXN15C HSOP15 GND
B79 HSON15 GND A79
B80 A80 EXP_A_RXP15
GND HSIP15 EXP_A_RXN15
B81 PRSNT2* HSIN15 A81
B82 RSVD GND A82
w.

PCI-E/16X-164P/BU/LOWR EJECTOR
A A
ww

+12V VCC3 3VDUAL +12V VCC3

1 1
BC833 BC834 BC835 BC836 BC838 BC839 BC837 BC840 + EC167 + EC3
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 270u/FP/D/16V/89/10m 560u/FP/D/6.3V/89/8m Title
PCI EXPRESS X 16 ,X1
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 20 of 35
8 7 6 5 4 3 2 1
5 4 3 2 1

AD[0..31]
PCI SLOT 1,2 16,35 AD[0..31]
VCC3 VCC3
PCICLK1 BC861 10P/4/N/50V/X
VCC3 VCC3
VCC -12V
PCI SLOT1 +12V VCC PCICLK2 BC862 10P/4/N/50V/X

VCC -12V
PCI SLOT2 +12V VCC
PCI1
B1 -12V TRST A1
PCI2 B2 A2

m
TCK +12V
D
B1 -12V TRST A1 B3 GND TMS A3 D
B2 TCK +12V A2 B4 TDO TDI A4
B3 GND TMS A3 B5 +5V +5V A5
B4 A4 B6 A6 -PPCIRST

co
TDO TDI +5V INTA -INTB 16
B5 +5V +5V A5 16,35 -INTC B7 INTB INTC A7 -INTD 16
B6 A6 B8 A8 C1745
+5V INTA -INTA 16 16 -INTA INTD +5V
B7 A7 B9 A9 100P/4/N/50V/X

y si ial
16 -INTB INTB INTC -INTC 16,35 PRSNT1 RESERVED
16 -INTD B8 INTD +5V A8 B10 RESERVED +5V A10
B9 PRSNT1 RESERVED A9 B11 PRSNT2 RESERVED A11
B10 RESERVED +5V A10 B12 GND GND A12
B11 PRSNT2 RESERVED A11 B13 GND GND A13

a.
B12 GND GND A12 B14 RESERVED 3.3V_AUX A14 3VDUAL
B13 GND GND A13 B15 GND RST A15 -PPCIRST 16,35
B14 RESERVED 3.3V_AUX A14 3VDUAL 16 PCICLK2 B16 CLK +5V A16
B15 A15 B17 A17 VCC3

op ne ent
GND RST -PPCIRST 16,35 GND GNT -GNT1 16
16 PCICLK1 B16 CLK +5V A16 16 -REQ1 B18 REQ GND A18
B17 A17 B19 A19 RN256 1 2 8.2K/8P4R/4
GND GNT -GNT0 16 +5V PME -PCIPME 17,35
B18 A18 AD31 B20 A20 AD30 -P2REQ64 3 4
16 -REQ0 REQ GND AD31 AD30
B19 A19 AD29 B21 A21 -ACK64 5 6
+5V PME -PCIPME 17,35 AD29 +3.3V
AD31 B20 A20 AD30 B22 A22 AD28 -P1REQ64 7 8
AD29 AD31 AD30 AD27 GND AD28 AD26
B21 AD29 +3.3V A21 B23 AD27 AD26 A23
B22 A22 AD28 AD25 B24 A24 -STOP RN257 1 2 8.2K/8P4R/4
AD27 GND AD28 AD26 AD25 GND AD24 -PLOCK
B23 AD27 AD26 A23 B25 +3.3V AD24 A25 3 4
AD25 B24 A24 B26 A26 AD23 -PERR 5 6
AD25 GND 16,35 -C_BE3 C/BE3 IDSEL
B25 A25 AD24 AD23 B27 A27 -SERR 7 8

t C do id
+3.3V AD24 AD22 AD23 +3.3V AD22
16,35 -C_BE3 B26 C/BE3 IDSEL A26 B28 GND AD22 A28
AD23 B27 A27 AD21 B29 A29 AD20 -FRAME RN258 1 2 8.2K/8P4R/4
AD23 +3.3V AD22 AD19 AD21 AD20 -IRDY
B28 GND AD22 A28 B30 AD19 GND A30 3 4
AD21 B29 A29 AD20 B31 A31 AD18 -TRDY 5 6
AD19 AD21 AD20 AD17 +3.3V AD18 AD16 -DEVSEL
B30 AD19 GND A30 B32 AD17 AD16 A32 7 8
C B31 A31 AD18 B33 A33 C
+3.3V AD18 16,35 -C_BE2 C/BE2 +3.3V

no-in onf
AD17 B32 A32 AD16 B34 A34 -INTD RN259 2 1 8.2K/8P4R/4
AD17 AD16 GND FRAME -FRAME 16,35
B33 A33 B35 A35 -INTC 4 3
16,35 -C_BE2 C/BE2 +3.3V 16,35 -IRDY IRDY GND
B34 A34 B36 A36 -INTA 6 5
GND FRAME -FRAME 16,35 +3.3V TRDY -TRDY 16,35
B35 A35 B37 A37 -INTB 8 7
16,35 -IRDY IRDY GND 16,35 -DEVSEL DEVSEL GND
B36 +3.3V TRDY A36 -TRDY 16,35 B38 GND STOP A38 -STOP 16,35
B37 A37 -PLOCK B39 A39 -GNT3 RN260 1 2 8.2K/8P4R/4/X
16,35 -DEVSEL DEVSEL GND LOCK +3.3V 16 -GNT3
B38 A38 B40 A40 -GNT2 3 4
GND STOP -STOP 16,35 16,35 -PERR PERR SDONE 16,35 -GNT2
-PLOCK B39 A39 B41 A41 -GNT0 5 6
16 -PLOCK LOCK +3.3V +3.3V SBO 16 -GNT0
B40 A40 B42 A42 -GNT1 7 8
16,35 -PERR PERR SDONE 16,35 -SERR SERR GND 16 -GNT1
B41 +3.3V SBO A41 B43 +3.3V PAR A43 PAR 16,35
B42 A42 B44 A44 AD15 -REQ3 RN261 1 2 8.2K/8P4R/4
16,35 -SERR 16,35 -C_BE1 16 -REQ3

Do si e C
SERR GND AD14 C/BE1 AD15 -REQ1
B43 +3.3V PAR A43 PAR 16,35 B45 AD14 +3.3V A45 16 -REQ1 3 4
B44 A44 AD15 B46 A46 AD13 -REQ0 5 6
16,35 -C_BE1 C/BE1 AD15 GND AD13 16 -REQ0
AD14 B45 A45 AD12 B47 A47 AD11 -REQ2 7 8
AD14 +3.3V AD12 AD11 16,35 -REQ2
B46 A46 AD13 AD10 B48 A48
AD12 GND AD13 AD11 AD10 GND AD9 R2745 8.2K/4/X
B47 AD12 AD11 A47 B49 GND AD9 A49 16 -REQ4
AD10 B48 A48
AD10 GND AD9 R2746 8.2K/4/1
B49 GND AD9 A49 16 -GNT4
AD8 B52 A52
AD8 C/BE0 -C_BE0 16,35
AD7 B53 A53
AD8 AD7 +3.3V AD6
B52 AD8 C/BE0 A52 -C_BE0 16,35 B54 +3.3V AD6 A54
AD7 AD5 AD4

AD5
AD3

AD1
B53
B54
B55
B56
B57
B58
B59
AD7
+3.3V
AD5
AD3
GND
AD1
+3.3V
AD6
AD4
GND
AD2
AD0
A53
A54
A55
kn y
A56
A57
A58
A59
t AD6
AD4

AD2
AD0
AD3

AD1

-ACK64
B55
B56
B57
B58
B59
B60
B61
AD5
AD3
GND
AD1
+5V
ACK64
AD4
GND
AD2
AD0
+5V
REQ64
A55
A56
A57
A58
A59
A60
A61
AD2
AD0

-P2REQ64
gab
-ACK64 +5V +5V -P1REQ64 +5V +5V
B
B60 ACK64 REQ64 A60 B62 +5V +5V A62 B
B61 +5V +5V A61
B62 A62 PCI/120/P/IV/VA
+5V +5V
i
IDSEL[AD23],
PCI/120/P/IV/VA
GNT/REQ[1],
IDSEL[AD22],
INT[B]
GNT/REQ[0],
INT[A]
Gi
te

VCC3 3VDUAL
+12V -12V
C1743 0.1u/4/X7R/16V/K/X
BC869 0.1u/4/X7R/16V/K
C1744 0.1u/4/X7R/16V/K/X
BC870 0.1u/4/X7R/16V/K/X
BC863 BC864 BC874 BC875
BC871 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X
w.

BC872 0.1u/4/X7R/16V/K/X VCC

BC873 0.1u/4/X7R/16V/K/X

BC878 0.1u/4/X7R/16V/K/X
EC11 560u/FP/D/6.3V/89/8m
1
ww
+

A A
BC865 0.1u/4/X7R/16V/K/X
EC13 560u/FP/D/6.3V/89/8m
1

BC866 0.1u/4/X7R/16V/K/X
+

BC867 0.1u/4/X7R/16V/K/X

BC868 0.1u/4/X7R/16V/K/X
Title
PCI SLOT 1,2
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 21 of 35
5 4 3 2 1
5 4 3 2 1

VCC

U13-1 14
1 DAC_HSYNC
DAC_HSYNC 12,13
HSYNC R2107 22/4 3
2
7
74HCT32DT/SO14

m
D U13-2 D
14
4 DAC_VSYNC
DAC_VSYNC 12,13
VSYNC R2108 22/4 6

co
5
7
74HCT32DT/SO14

y si ial
C1288

47P/4/N/50V/X U13-3 14
9
8

a.
C1287 10
47P/4/N/50V/X 7
74HCT32DT/SO14

op ne ent
U13-4 14
12
11
13 C1289
7 0.1u/4/X7R/16V/K

74HCT32DT/SO14

t C do id
VCC VCC
C C

no-in onf
R2120 R2121
4.7K/4 4.7K/4

12 DDCDATA DDCDATA R2113 33/4 VGADDCDATA

U10 U11

VGA_R 1 6 VGA_B HSYNC 1 6 VGADDCCLK

Do si e C
2 5 VCC 2 5 VCC

3 4 VGA_G VSYNC 3 4 VGADDCDATA


BC676 BC780
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
12 DDCCLK DDCCLK R2114 33/4 VGADDCCLK CM1293A-04SO/S CM1293A-04SO/S
kn y
t C1297 C1298
470P/4/X/25V/X 470P/4/X/25V/X
gab
B B
FUSEVCC

BC675
i
0.1u/4/X7R/16V/K

VGA_DVIA

V16
GND
Gi

V6
VGA_R V1 V11
V7
DAC_RED FB36 68nH/6/300mA/0.8/S VGA_R VGA_G V2 V12 VGADDCDATA
12 DAC_RED
te

DAC_GREEN FB37 68nH/6/300mA/0.8/S VGA_G V8


12 DAC_GREEN DAC_BLUE FB38 68nH/6/300mA/0.8/S VGA_B VGA_B HSYNC
12 DAC_BLUE V3 V13
V9
V4 V14 VSYNC
V10
V5 V15 VGADDCCLK

R32 R30 R25


w.

140/4/1 150/4/1 150/4/1 GND


VGA/DVID/BLUE/L/F/W/GF/RA/D

V17
C1290 C1291 C1292 C1293 C1294 C1295
10P/4/NPO/50V/J/X 10P/4/NPO/50V/J/X 10P/4/NPO/50V/J 10P/4/NPO/50V/J 10P/4/NPO/50V/J
10P/4/NPO/50V/J/X
A RS780 A13 Red DAC A
ww

Output Imbalance
change to 140/4/1

Title
RGB
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 22 of 35
5 4 3 2 1
8 7 6 5 4 3 2 1

FUSEVCC

VCC3 VCC3
D1 CLOSE HDMI CONNECTOR

3
B140/SMA/1A
VCC3SW C103 BC678
U8 0.1u/4/X7R/16V/K D Q13 0.1u/4/X7R/16V/K
2 38 SW_HDMI_TXD1+ G9131-15T73UF/SOT23/0.3A
VDD A0+ SW_HDMI_TXD1- G S
8 VDD A0- 37
16 SOT23 HDMI

1
BC719 BC299 BC300 BC301 VDD SW_HDMI_TXD2+
18 VDD A1+ 36 SHELL1 20
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 20 35 SW_HDMI_TXD2- VSS15 SW_HDMI_TXD2+ 1
VDD A1- D2+
30 2

m
VDD SW_HDMI_TXD0+ SW_HDMI_TXD2- D2 Shield
D 40 VDD A2+ 34 3 D2- SHELL3 22 D
42 33 SW_HDMI_TXD0- SW_HDMI_TXD1+ 4
VDD A2- D1+
5 D1 Shield
32 SW_HDMI_TXC+ C75 R3 SW_HDMI_TXD1- 6 24

co
TXD1+ A3+ SW_HDMI_TXC- 120/6 SW_HDMI_TXD0+ D1- SHELL5
12 TXD1+ 3 D0+ A3- 31 7 D0+
TXD1- 4 8
12 TXD1- D0- D0 Shield

PI3HDMI412FT-B
SW_HDMI_TXD0- 9 D0-

y si ial
TXD2+ 6 29 SW_DVI_TXD1+ 1u/4/X5R/6.3V/K SW_HDMI_TXC+ 10
12 TXD2+ D1+ B0+ CK+
TXD2- 7 28 SW_DVI_TXD1- 11
12 TXD2- D1- B0- CK Shield
SW_HDMI_TXC- 12
TXD0+ SW_DVI_TXD2+ CK-
12 TXD0+ 11 D2+ B1+ 27 13 CE Remote
TXD0- 12 26 SW_DVI_TXD2- 14 25
12 TXD0- D2- B1- NC SHELL6

a.
HDMI_DDC_CLK 15
TXC+ SW_DVI_TXD0+ HDMI_DDC_DATA DDC CLK
12 TXC+ 14 D3+ B2+ 25 16 DDC DATA
TXC- 15 24 SW_DVI_TXD0- VCC VCC 17 23
12 TXC- D3- B2- GND SHELL4

op ne ent
18 +5V
23 SW_DVI_TXC+ HDMI_HPD 19
VCC3 B3+ SW_DVI_TXC- HP DET
B3- 22 SHELL2 21
R2127 R2128
9 HDMI SW VSS15 4.7K/4 4.7K/4 R113 HDMI/19P/BK/S/RA/D
SEL 39.2K/4/1
VSS15 1
R321 5
1.8K/4/1 VSS15 I2C_CLK R2119 0/4/SHT/X R281 0/4/SHT/X
VSS15 10 12 I2C_CLK HDMI_DVI_BIOS 18
13 BC720 BC302
SW_SEL VSS15 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K DVI_HPD
VSS15 17
VSS15 19
3

t C do id
VSS15 21 SOT23
R322 39 R116
150K/4 VSS15 Q67 39.2K/4/1
43 VSS15PAD VSS15 41
R323 BAT54C/SOT23/200mA
8.2K/4/1 SOT23
2

C HDMI_HPD PI3HDMI412FT-BZHE/TQFN42/[10TA1-083412-10R] C

no-in onf
Q82 12 I2C_DATA I2C_DATA R2115 0/4/SHT/X
MMBT2222A/SOT23/600mA/40 R325 SEL="0"-->A-->HDMI;
1.5K/4/1
SEL="1"-->B-->DVI;(DEFAULT) TMDS_HPD R312 33/4 R337 4.7K/4
12 TMDS_HPD

2
D9 R331
3 100K/4/1

1
FUSEVCC

Do si e C
IDERST- R182 33/4 -RST1 VCC
LM385-2.5/SOT23/[10DZ2-130385-21R]

R183 4.7K/4 PIORDY VCC


VCC3
2
4
6
8

M1
RN3 R180 R224 VCC VCC
1K/8P4R/4 1K/4/1 1K/4/1 SHIELD1
R185 8.2K/4/1 IRQ14 Q84 VGA_DVIB
1
3
5
7

FDD 2N7002/SOT23/25pF/5 HDMI_DDC_CLK SW_DVI_TXD0- D17 TX0-


R189 8.2K/4/1 PDD7
t R2129 R2130 SW_DVI_TXD0+ D18 TX0+

3
R191 5.6K/4 PDDREQ 1 2 4.7K/4 4.7K/4 SW_DVI_TXD1- D9 TX1-
DENSEL- 27 TX1+ 17 9 1
R192 470/4/1 IDEPU0 Q55 SW_DVI_TXD1+
kn y
3 4 D10
P66DET D D SW_DVI_TXD2- TX2-
R194 15K/4/1 6 2N7002/SOT23/25pF/5 D1
7 8 SW_DVI_TXD2+ D2 TX2+
INDEX- 27 G S G S SHLD24
9 10 R327 D3
MOTEA- 27
gab
B 8.2K/4/1 SHLD13 B
11 12 D11

1
13 14 HDMI_HPD DVI_DDC_CLK D19 SHLD05
DRVA- 27 TX3-
15 16 D12
17 18 HDMI_DDC_DATA D13 TX3+
i
DIR- 27 TX4-
19 20 D4
PRIMARY IDE CONNECTOR STEP- 27

3
21 22 D5 TX4+
WDATA- 27 TX5-
23 24 Q56 D20
PDD[0..15] WGATE- 27 D TX5+
18 PDD[0..15] 25 26 TK00- 27 2N7002/SOT23/25pF/5 D21
27 28 DVI_DDC_CLK D6 DDCC
WPT- 27 G S DDCD
IDE 29 30 DVI_DDC_DATA D7
RDATA- 27 VDDC
31 32 SIDE1- 27 D14

1
-RST1 1 2 33 34 DVI_DDC_DATA D15 GND
DSKCHG- 27
Gi

PDD7 3 4 PDD8 D22 SHLDC


PDD6 5 6 PDD9 SW_DVI_TXC- D24 TXC-
PDD5 7 8 PDD10 BH/2*17K5/WH/SHN/2.54/VA/PA46 SW_DVI_TXC+ D23 TXC+
PDD4 9 10 PDD11 D8 VSYNC
HPD
te

PDD3 11 12 PDD12 DVI_HPD D16 24 16 8


PDD2 13 14 PDD13 VCC
PDD1 15 16 PDD14
PDD0 17 18 PDD15
19
PDDREQ 21 22 R196
18 PDDREQ
-PDIOW 23 24 1K/4/1
18 -PDIOW -PDIOR VCC IDERST-
18 -PDIOR 25 26
PIORDY 27 28 IDEPU0
w.

18 PIORDY
3

-PDDACK 29 30
18 -PDDACK
IRQ14 31 32 Q7
18 IRQ14
PDA1 33 34 P66DET R197 MMBT2222A/SOT23/600mA/40 SHIELD2
18 PDA1 PDA0 PDA2 P66DET 17
35 36 1K/4/1
18 PDA0 PDA2 18

M2
-PCS1 37 38 -PCS3 SOT23
2

18 -PCS1 -IDEACTP -PCS3 18


A 39 40 C111 A
0.047U/4/X7R/16V/K
3
ww

BH/2*20K20/WH/SHN/2.54/VA/PA46 Q6 VGA/DVID/BLUE/L/F/W/GF/RA/D
MMBT2222A/SOT23/600mA/40
D2 Close to connector SOT23
2

-IDEACTP 2 R200 8.2K/4/1


-HDLED 17,27 -IDERST
3 -HDLED 29
1 Title
18 -SATA_LED
C109 IDE ,FDD ,HDMI ,DVI CONNECTOR
SOT23

BAW56/SOT23/300mA 1000P/4/X/50V/X Size Document Number Rev


Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 23 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

AU1
19 2 NRIA- COM
27 RI1- RY1 RA1
18 3 NCTSA- NDCDA- NSINA
27 CTS1- RY2 RA2 1 2
17 4 NDSRA- NSOUTA NDTRA-
27 DSR1- RY3 RA3 3 4
NRTSA- NDSRA-
27 RTS1-
27 DTR1-
16
15
DA1
DA2
DY1
DY2
5
6 NDTRA-
NSINA
NRTSA-
NRIA-
5
7
6
8
NCTSA- FRONT SIDE USB1
27 RXD1 14 7
RY4 RA4 NSOUTA 9 10
27 TXD1 13 8
DA3 DY3 NDCDA- BH/2*5K10/IV/2.54/VA/COM
27 DCD1- 12 9
RY5 RA5
11 20 VCC
GND 5V
-12V 10 1 +12V
-12V 12V

ABC1 ABC2 ABC3

m
GD75232/TSSOP20 0.1U/4/Y5V/16V/Z/X 0.1U/4/Y5V/16V/Z/X FUSEVCC1
D D
0.1U/4/Y5V/16V/Z/X F1
SMD1812P160/8V UR1 5.1K/4/1
5VDUAL -USBOC_F1 17

co
UBC2
ACN1 ACN2 0.1u/4/X7R/16V/K UR2
NDCDA- 1 2 NRTSA- 1 2 10K/4/1

y si ial
NSOUTA 3 4 NDSRA- 3 4
NSINA 5 6 NCTSA- 5 6 F_USB1
NDTRA- 7 8 NRIA- 7 8 1 2
-USBP6 3 4 -USBP7
+USBP6 5 6 +USBP7
180P/8P4C/6/NPO/50V/K/X 180P/8P4C/6/NPO/50V/K/X 7 8

a.
10

PH/2*5K9/BU/2.54/VA/D
-RI
-RI 17

op ne ent
3
ESD1
Q110
D22 MMBT2222A/SOT23/600mA/40 -USBP6 1 6 -USBP7 -USBP6
17 -USBP6
2 +USBP6
R474 75K/4/1 17 +USBP6 -USBP7
3 2 5 FUSEVCC1 17 -USBP7

1
NRIA- 1 +USBP7
17 +USBP7
+USBP6 3 4 +USBP7
BAV70/SOT23/300mA R475 BC929
8.2K/4/1 BC27
0.1u/4/X7R/16V/K CM1293A-04SO/S
22u/8/X5R/6.3V/M/X

t C do id
C FRONT SIDE USB2 FRONT SIDE USB3 C

no-in onf
FUSEVCC2

FUSEVCC3
F2 F5
SMD1812P160/8V SMD1812P160/8V
5VDUAL 5VDUAL
1
+ UEC3 UBC6
560u/FP/D/6.3V/89/8m 0.1u/4/X7R/16V/K

UBC4

Do si e C
0.1u/4/X7R/16V/K F_USB3
F_USB2 1 2
1 2 -USBP10 3 4 -USBP11
-USBP8 3 4 -USBP9 +USBP10 5 6 +USBP11
+USBP8 5 6 +USBP9 7 8
7 8 10
10
PH/2*5K9/BU/2.54/VA/D
PH/2*5K9/BU/2.54/VA/D

ESD2 ESD3
kn y
t -USBP8

+USBP8
1

3
6

CM1293A-04SO/S
-USBP9

FUSEVCC2
+USBP9
17
17
17
17
-USBP8
+USBP8
-USBP9
+USBP9
-USBP8
+USBP8
-USBP9
+USBP9
-USBP11

+USBP11
1

CM1293A-04SO/S
6

4
+USBP10

-USBP10
FUSEVCC3
17
17
17
17
-USBP10
+USBP10
-USBP11
+USBP11
-USBP10
+USBP10
-USBP11
+USBP11
gab
B B
i
FUSEVCCKB FUSEVCC

F8 SMD1812P160/8V
Gi

5VDUAL F6 SMD1812P260/6V

1
+ UEC5 BC92
560u/FP/D/6.3V/89/8m 0.1u/4/X7R/16V/K
te
w.
ww

A A

Title
COM/F_USB
Size Document Number Rev
C GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 24 of 35
8 7 6 5 4 3 2 1
5 4 3 2 1

AZALIA CODEC ALC892R/ALC889/ Colay


ALC892R ALC889 ALC889A ALC888 ALC892
26 CEN
26 LFE
CR2 20K/4/1
SURR_R 26 CR16 X X O X X
26 S_SURR_L SURR_L 26 CR24 X X O X X
26 S_SURR_R
CBC24 470P/4/X7R/50V/K
CR25 X O O O X
26 SPDIFI
CBC42 10uF/X5R X X X 10uF/X5R

m
D D
CBC1
47P/4/NPO/50V/J CR34 0/4/X
VOCR 26
CR2 20K/1% 20K/1% 20K/0.1% 20K/1% 20K/1%

co
26 SPDIF
AVDD CR9 O O X X O

y si ial
CR5 5.1K/4/1
S_SURR_JD 26 CR10 X X O O X
CR6 10K/4/1
CEN_JD 26
CR7 2.2/8
CBC2
0.1u/4/X7R/16V/K CR32 47/4/1 FAUDIO_JD
CBC10/CBC11/CBC12/ 4.7uF 10uF 4.7uF 4.7uF 4.7uF
VCC3 CBC13/CBC44/CBC45

a.
/X5R /X5R /X5R /X5R /X5R

48
47
46
45
44
43
42
41
40
39
38
37
CU1
CBC48 CBC20 CR4/CR8/CR18/CR23/ 66 ohm

SPDIFO

SURBACK-R/XTALSEL
SURBACK-L/JD0 GPIO0

JDREF (NC)/JD3
AVSS2

SURR-L
AVDD2
LINE1-VREFOR/VREFO3
LFE
SPDIF/EAPD

CEN

SURR-R
22u/8/X5R/6.3V/M ALC880/CMI9880 1N/4/X7R/50V/K

op ne ent
CR11/CR12/CR28/CR29/ or
26 SPDIFO2_HDMI
CBC42 10u/8/X5R/6.3V/K 1 36
CR49/CR50/CR43/CR44/ 75 ohm lower 75 ohm 75 ohm 75 ohm
DVDD1 FRONT-R LINE_O_R 26 CR45/CR48/CR59/CR60
CR16 8.2K/4/1/X 2 35
GPIO0/XTALI FRONT-L LINE_O_L 26
CR24 8.2K/4/1/X 3 34
CR25 0/4/X GPIO1/XTALO SENSE B (JD2)/FMIC1
4 DVS1 DCVOL/VREFVOUT2 33
VODR
CR33/CD1/CD2/CD3/CQ4/
17 AZ_SDATA_OUT
CR14 22/4
5
6
SDATA_OUT MIC1-VREFO-R/FMIC2 32
31
CR13 8.2K/4/1
LINE2_VREFO
MIC22 26 CBC25 O O O O X
17 AZ_BIT_CLK BIT_CLK LINE2-VREFO/JD4
7 30 MIC2_VREFO CR34/CR66/CBC43/CD4
DVSS2 MIC2-VREFO/AFILT2
CR15 22/4 CR33 0/4
X X X X O

SENSE A(JD1)/PHONE JD5


17 AZ_SDATA_IN0 8 SDATA-IN LINE1-VREFO-L/AFILT1 29 VOCR 26

t C do id
9 28 VOBR CR17 8.2K/4/1
DVDD2 MIC1-VREFO-L/VREFOUT MIC11 26
17 AZ_SYNC 10 SYNC VREF 27
11 26 AVDD CR66 0/6/X 5VDUAL
17 -AZ_RST

MIC2-R/JD1 GPIO1
RESET# AVSS1
12 PC_BEEP AVDD1 25

LINE2-R/AUX-R
LINE2-L/AUX-L

MIC1-R/MIC2
CBC5 CBC6 CBC43

1
C C

MIC1-L/MIC1
MIC2-L/JD2
CBC4 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M/X CD4

CD_GND

no-in onf
LINE1-R
22p/4/NPO/50V/J CBC7 CBC8 AZ2225-01L/SOD323/X

LINE1-L
CD_R
0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M

CD_L
FRONT_JD CR19 5.1K/4/1 ALC892R-GR/LQFP48
26 FRONT_JD

13
14
15
16
17
18
19
20
21
22
23
24
LINE1_JD CR20 10K/4/1
26 LINE1_JD
MIC1_JD CR21 20K/4/1
26 MIC1_JD
CBC10 4.7u/8/X5R/6.3V/K
LINE_IN_R 26
SURR_JD CR22 39.2K/4/1
26 SURR_JD
CBC11 4.7u/8/X5R/6.3V/K

Do si e C
LINE_IN_L 26
CBC12 4.7u/8/X5R/6.3V/K
MIC2 26
LINE2_L CBC13 4.7u/8/X5R/6.3V/K
MIC1 26
LINE2_R CBC14 0.1U/4/X7R/16V/K
CD_R 26
Can Support Amp Out
MIC2_L CBC15 0.1U/4/X7R/16V/K
CDGND 26
MIC2_R CBC16 0.1U/4/X7R/16V/K
CD_L 26
kn y
t
gab
B B
i
SOT23

INTEL FRONT AUDIO


CQ8 CR74 8.2K/4/1
LINE2_VREFO
CR75 8.2K/4/1
SOT23

Gi

BAT54A/SOT23/200mA

CQ9 CR76 8.2K/4/1


VCC3
te

MIC2_VREFO
CR77 8.2K/4/1
CR47 22K/4
BAT54A/SOT23/200mA
CR46 22K/4 CR78
F_AUDIO 8.2K/4/1
MIC2_L CBC45 4.7u/8/X5R/6.3V/K CR4 75/4/1 1 2
MIC2_R CBC44 4.7u/8/X5R/6.3V/K CR8 75/4/1 3 4 -AZ_DET
w.

LINE2_R CEC9 100u/OS/D/16V/66/24m


CR18 75/4/1 5 6 BACK_R CR79 20K/4/1
1

FAUDIO_JD
+

7
LINE2_L CEC10 100u/OS/D/16V/66/24m
CR23 75/4/1 BACK_L CR80 39.2K/4/1
1

9 10
+

PH/2*5K8/GED/2.54/VA/D
A A
ww

PH/2*5K8/[11NH2-000205-K1]

CC1 CC2 CC3 CC4


180P/4/NPO/50V/J 180P/4/NPO/50V/J
180P/4/NPO/50V/J 180P/4/NPO/50V/J
Title
ALC892R CODEC
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 25 of 35
5 4 3 2 1
5 4 3 2 1

LINE OUT
SPDIF
CR26
FRONT OUT

0/6/X SPDIF_IO
VCC CR3 0/4 1
CR10 0/4/X 3 4
25 SPDIF SPDIFI 25 AJ_B5
CR9 0/4 5 6 CEC17 + 10u/FP/S/10V/45/220m CR59 75/4/1
25 SPDIFO2_HDMI 25 LINE_O_R
CEC19 + 10u/FP/S/10V/45/220m CR60 75/4/1 AJ_B2
25 LINE_O_L
CBC34 PH/2*3K2/WH/2.54/VA/D
+12V 100p/4/NPO/50V/J

m
D
AVDD CQ4 D

4
78L05/SOT89/0.1A
CD1 CBC21 CBC22
CD4148WP/1206/300mA 180P/4/NPO/50V/J 180P/4/NPO/50V/J

co
1
2
3
5VDUAL

y si ial
CD2 FUSEVCC
LINE-IN
CD4148WP/1206/300mA CBC25
CBC47 1U/6/X7R/16V/K
1

7
22u/8/X5R/6.3V/M CD3

a.
G

NC
1 OPTICAL
2 CR11 75/4/1 LINE_IN_RR
25 LINE_IN_R

V
AZ2225-01L/SOD323 3

SOT23
25 SPDIF

In

NC
CR12 75/4/1 LINE_IN_LL
For ESD PROTECT DIODE

op ne ent
25 LINE_IN_L

6
CQ1
CR41 8.2K/4/1
CBC26 CBC27
25 VOCR
CR42 8.2K/4/1 180P/4/NPO/50V/J 180P/4/NPO/50V/J
FR/5P/BK/T/D/S(GY)

BAT54A/SOT23/200mA

t C do id
MIC

C CR28 75/4/1 MIC22 C


25 MIC2

no-in onf
CR29 75/4/1 MIC11
25 MIC1
CD IN
25 MIC22
CBC28
CD_IN 180P/4/NPO/50V/J CBC29
25 MIC11
180P/4/NPO/50V/J
25 CD_L 1
2
3
25 CD_R 4

SURROUND

Do si e C
25 CDGND
SHR/1*4/BK/P/2.54/VA/D

CEC30 100u/OS/D/16V/66/24mCR43 75/4/1 BJ_C5

1
25 SURR_R

+
CR51 CR52 CR53
8.2K/4/1 8.2K/4/1 8.2K/4/1 CEC31 100u/OS/D/16V/66/24mCR44 75/4/1 BJ_C2

1
25 SURR_L

+
USB_1394_ESATA
USB_LAN CBC32 CBC33
kn y
t 180P/4/NPO/50V/J 180P/4/NPO/50V/J
gab
B B
For Audio precision test CEN/LFE
CBC19 0.01u/4/X7R/25V/K
i
CEC34 100u/OS/D/16V/66/24mCR45 75/4/1 BJ_B5

1
25 LFE

+
CEC35 100u/OS/D/16V/66/24mCR48 75/4/1 BJ_B2

1
25 CEN

+
CBC36 CBC37
AUDIOA
Gi

180P/4/NPO/50V/J 180P/4/NPO/50V/J
AUDIOB

LINE1_JD
A3 A3 CEN_JD
D3 D3 Orange
25 LINE1_JD A2 A2 BLUE 25 CEN_JD D2 D2 SURR BACK
te

LINE_IN_RR A4 BJ_B5 D4 CEN/LFE


A4 D4
LINE-IN
LINE_IN_LL A1 A1 GND
BJ_B2 D1 D1 GND
ALC880 - SURROUND
CMI9880 - Back SURR 25 S_SURR_R
CEC38 + 10u/FP/S/10V/45/220m CR49 75/4/1 BJ_A5
LINE-IN REAR
B3 B3 E3 E3
FRONT_JD B2 SURR_JD E2 CEC39 + 10u/FP/S/10V/45/220m CR50 75/4/1 BJ_A2
25 FRONT_JD AJ_B5 B2 25 SURR_JD BJ_C5 E2 25 S_SURR_L
B4 B4 GREEN E4 E4 Black
w.

AJ_B2 B1 B1 GND LINE-OUT BJ_C2 E1 E1 GND Back side


Speaker CBC40 CBC41
LINE-OUT CEN Azalia Port G 180P/4/NPO/50V/J 180P/4/NPO/50V/J
C3 C3 F3 F3
MIC1_JD S_SURR_JD F2
25 MIC1_JD MIC22
C2 C2 25 S_SURR_JD BJ_A5 F2 Gray
A C4 C4 PINK F4 F4
Left & Right Side
A

MIC11 C1 MIC-IN BJ_A2 F1 Speaker


ww

C1 GND F1 GND
C0 C0 MIC-IN F0 F0 SIDE
G1 G1 CMI9880 - Side SURR
G4 G4 G2 G2
G3 G3

2X3RP/26P/OR,BK,GY,BU,GE,PK/RA 2X3RP/26P/OR,BK,GY,BU,GE,PK/RA Title


AUDIO JACK
A3RJ/13P/B/[11NR6-403006-01_11NR6-403006-02] A3RJ/13P/OBG/[11NR6-403006-71] Size Document Number Rev
3RJ+15F/[11NR6-403004-11] 3RJ+15F/[11NR6-403004-31] Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 26 of 35
5 4 3 2 1
8 7 6 5 4 3 2 1

LANCON_DET
34 LANCON_DET

R7 8.2K/4/1 -SIOIDERST
VCC3
R10 8.2K/4/1 -PCIE_RST JP2 RTS1-
R15 8.2K/4/1 -THRMO 24 RTS1- DSR1-
R20 8.2K/4/1 DBIOS_RST- 24 DSR1- TXD1
24 TXD1 JP3
R22 8.2K/4/1 GP53 RXD1
24 RXD1 DTR1-
24 DTR1- JP4
DCD1-
24 DCD1- RI1-
24 RI1-

LPT port pin just NC if no use---ITE<Tom>

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

m
9
8
7
6
D U182 D

STB#/GP87/SMBC_M

INIT#/GP85/SMBD_M
RI1#
DCD1#
DTR1#/JP4
SIN1
SOUT1#/JP3
DSR1#
RTS1#/JP2
FAN_CTRL4/VID_TURBO/GB_O0
GP65/VDDA_EN/GB_O1
GP66/VLDT_EN/GB_O2
GP67/CPU_PG/GB_O3

PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70

ERR#

ACK#/GP83
GNDD

AFD#/GP86/SMBC_R

SLIN#/GP84/SMBD_R
32 5

co
ITE24 Tom
CTS1-recommand CTS1# BUSY/GP82
33 PSI_L/FAN_CTL5/CIRRX2/GP16 PE/GP81 4
VCC R21 8.2K/4/1 34 3 VCC
SVD/PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 VCC
VCC 35 VCC AVCC 2 VCC

y si ial
36 1 VIN0
VCORE_EN/VID7/GP64 VIN0 VIN0 28
37 128 VIN1
VCORE_GOOD/VID6/GP63 VIN1 VIN1 28
FANIO_1 38 127 VIN2 BC180 BC181
28 FANIO_1 FAN_TAC1 VIN2 VIN2 28
FANPWM_1 39 126 PWOK BC183 1U/6/X7R/16V/K 1U/6/X7R/16V/K
28 FANPWM_1 FAN_CTL1 VIN3/ATXPG PWOK 29,31
FANIO_2 40 125 VIN4 1U/6/X7R/16V/K Power issue Power issue
28 FANIO_2 FAN_TAC2/GP52 VIN4/VLDT_12 VIN4 28

a.
FANPWM_2 41 124 VIN5 Power issue 0415
28 FANPWM_2 FAN_CTL2/GP51 VIN5/VDDA_25 VIN5 28
R118 8.2K/4/1
0415 0415
42 FAN_TAC3/GP37 VIN6/VDIMM_STR 123 VCC
FANPWM3 43 122 Close to super i/o
28 FANPWM3 FAN_CTL3/GP36 VREF VREF 28
BC26 2.2n/4/X7R/50V/K

op ne ent
44 VID5/GP35 TMPIN1 121 TMPIN1 28
45 VID4/GP34 TMPIN2 120 TMPIN2 6,28
46 GNDD TMPIN3 119 TMPIN3 28
IO_VID3 47 118 R478 0/6S/X CPU Thermal Diode Differential Pair
30 IO_VID3 VID3/GP33 TSD- GNDA 6
IO_VID2 48 117 I_GNDA R479 0/6S/X
30
30
IO_VID2
IO_VID1
IO_VID1
IO_VID0
49
50
VID2/GP32
VID1/GP31 IT8720F ( GB ) RSMRST#/CIRRX1/GP55
GNDA
116
115
R2415 0/4/X
-THRMO
-RSMRST 17
Other Signal

30 IO_VID0 VID0/GP30 PCIRST3#/GP10/VDIMM_STR_EN


51 114 MCLK R61 8.2K/4/1 VCC3 15mil
VIDO5/GP27/SIN2 MCLK/GP56 MDAT R80 8.2K/4/1 TMPIN3+
52 VIDO4/GP26/SOUT2 MDAT/GP57 113 10mil
FANIO_4 53 112 KCLK
28 FANIO_4 VIDO3/FAN_TAC4/GP25/DSR2# KCLK/GP60 KDAT KCLK 28 TMPIN3- 12mil
54 VIDO2/FAN_TAC5/GP24/RTS2# KDAT/GP61 111 KDAT 28 10mil

t C do id
EUP_N 55 110 GP40
33 EUP_N -OFF_LAN GP23/SI 3VSBSW#/GP40 DBIOS_RST-
R40 0/4/X 56 109 ITE COMMENTS 15mil
34 ISOLATEB GP22/SCK PWROK2/GP41 DBIOS_RST- 29 Other Signal
57 108 GP53
VIDO1/GP21/DCD2# SUSC#/GP53 GP53 17
58 VIDO0/GP20/CTS2# PSON#/GP42 107 -ATX_PSON 29
59 VIDO6/GP17/RI2# PANSWH#/GP43 106 -PWRBTSW 29

SST/AMDTSI_D/PECI_AVA/MTRB#
C JP6 JP6 60 105 C
-ITE_SPI_CS R117 22/4 VIDO7/JP6/DTR2# GNDD
18 -ITE_SPI_CS 61 RESETCON#/CIRTX1/CE_N PME#/GP54 104 -LPCPME 17

no-in onf
62 SVC/PECI_RQT/GP14 PWRON#GP44 103 -PSOUT 17
63 PWROK1/GP13 SUSB# 102 -SLP_S3 17,31,33
R2596 0/4/SHT/X -PCIE_RST 64 101 BEEP- C204 RTCVDD

PECI/AMDTSI_C/DRVB#
17,20,34 PCIE_RST- PCIRST1#/GP12 GP46/IRRX BEEP- 29
-IDERST R2561 0/4/X -SIOIDERST 65 100 1U/6/X7R/16V/K
17,23 -IDERST PCIRST2#/GP11 VBAT COPEN- VBAT 16 COPEN-
VCC 66 99 R223 1M/4
VCC COPEN# 29 COPEN-
67 98 IO_VCCH BC177 R75
VCC3 VIDVCC VCCH
-A_RST 68 97 8.2K/4/X
12,16 -A_RST LRESET# IRTX/GP47/CE2_N/JP7

KRST#/GP62
-LDRQ0 JP1 69 96 1U/6/X7R/16V/K
16 -LDRQ0 LDRQ#/JP1 DSKCHG# BC182 C174
LFRAME#

DENSEL#
GA20/JP5

SO/GP50

WGATE#
WDATA#

RDATA#
HDSEL#
SERIRQ

BC178 4.7U/8/X5R/6.3V/K 0.01U/4/X/50V/X

INDEX#
PCICLK

MTRA#

DRVA#

STEP#

TRK0#
CLKIN
GNDD

WPT#
3.9N/4/X7R/50V/K/X 3VDUAL
LAD0
LAD1
LAD2
LAD3

DIR#
Power issue

Do si e C
VCC
0415 IT8720F-S-JX(GB)/QFP128/[10HP2-118720-80R]
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
CEB_N R104 22/4 -ITE_SPI_CS1
VCC3 -ITE_SPI_CS1 18
BC890
DSKCHG- 23
VCC3 R483 1K/4/1 0.1u/4/X7R/16V/K
WPT- 23
LAD0
LAD1
LAD2
LAD3

INDEX- 23
R2430 1K/4/1 -KBRST
16 SERIRQ TK00- 23 IO_VCCH R136 0/6/SHT/X5VSB
16 -LFRAME RDATA- 23
LAD[0..3] WGATE- 23
16 LAD[0..3] SIDE1- 23

17 -KBRST
17 A20GATE
16 LPC33
18 -SB_SPI_CS_ITE
15 LPC48
JP5
kn y
t
-SB_SPI_CS_ITE
SI_CLK

SI_DAT
STEP- 23
DIR- 23
WDATA- 23
SI_CLK 6
DRVA- 23
SI_DAT 6
MOTEA- 23
gab
B B
DENSEL- 23
C207
10P/4/N/50V/X
i
IT8720GB Power On Strapping Options
Symbol value Description
JP1
Pin 69
Gi

JP2 1 Disable VID output pins


VIDO_EN Normal Media
Pin 25 0 Enable VID output pins R275 1K/4/1
VCC
te

R107 GP40 R108


VCC3
JP3 1 Disabled. JP2 RTS1- R246 680/4/X 8.2K/4/1/X 8.2K/4/1
Flashseg1_EN 放放放放放放放放
Pin 27 0 Flash I/F Address Segment 1 is enabled
R247 1K/4/1
VCC
JP4 1 K8 power sequence disabled TXD1
K8PWR_EN JP3 R280 680/4/X
Pin 29 0 K8 power sequence enabled O: EN SPI, I:DIS SPI
w.

11 Half Run Default value of EC Index 15h/16h/17h is 40h R271 1K/4/1


VCC
JP3 & DTR1-
10 No Run Default value of EC Index 15h/16h/17h is 7Fh JP4 R277 680/4/X
JP5 FAN_CTL_SEL
Pin 27 & 01 Full Run Default value of EC Index 15h/16h/17h is 00h
R284 1K/4/1
A
Pin 77 VCC3 A
00 75% Run Default value of EC Index 15h/16h/17h is 20h A20GATE
JP5 R278 680/4/X
ww

JP5 1 Disable WDT to rest PWROK


WDT_EN
Pin 77 0 Enable WDT to rest PWROK R129 1K/4/1
VCC3
JP6
JP6 1 Disable SVID Function JP6 R122 1K/4/X
SVID_EN Title
Pin 60 0 Enable SVID Function
R111 1K/4/1
JP7 1 Enable Dual BIOS Function for GigaByte Only
JP7 VCC3 ITE 8720 LPC IO ,Dual-BIOS
Dual_BIOS_EN CEB_N R109 1K/4/X Size Document Number Rev
Pin 97 0 Disable Dual BIOS Function for GigaByte Only Custom GA-880GM-UD2H 1.0
Date: Thursday, February 25, 2010 Sheet 27 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCORE DDR15V VCC3 +12V


Hardware Monitor circuits CURRENT_OUT_V 32

R18
27 VREF 8.2K/4/1 R195 R198 R199
8.2K/4/1 8.2K/4/1 24.3K/4/1
R203 R205 R2253 R2569
10K/4/1 10K/4/1 30K/4/X VIN0 10K/4/1
FOR 8716 N/A 27 VIN0 VIN1

m
27 TMPIN1 27 VIN1 VIN2
D D
27 VIN2 VIN4
27 TMPIN3 27 VIN4 VIN5
27 VIN5

co
6,27 TMPIN2
C1306 BC111 BC114 BC113 BC115 R201 R2570 BC122

y si ial
C1080 3.3N/4/X7R/50V/K/X 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 8.2K/4/1 10K/4/1
C113 C114 R206 RS1 SRS2 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1U/4/Y5V/16V/Z/X
1U/6/X7R/16V/K 0.1u/4/X7R/16V/K 8.2K/4/X 10K/1/4/S 10K/1/4/S

a.
SYSTEM CPU
Thermister Thermister

op ne ent
KB & USB FUSEVCCKB

t C do id
KB_MS_USB
U5 U1
-USBP4 U6 U2 -USBP5
17 -USBP4 1 3 57 -USBP5 17
+USBP4 U7 U3 +USBP5
17 +USBP4 +USBP5 17
C VCC U8 U4 C
+12V 2 4 68
SYSTEM FAN FUSEVCCKB

no-in onf
USB
SYSFAN_VCC R2750 KBDATA 1
+12V R2212 8.2K/4/1 8.2K/4/1 +12V KB 4
2
VCC KBCLK 5
R2213 6 3 BC121 BC120
8.2K/4/1 U145A 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
8

KB/USB/A/PC99(DUAL)/GF/2/RA/D
R2215 3 R2216
+
1K/4/1 R2219 1 S G 0/6/X
3

1
FANPWM_2 2
27 FANPWM_2 -
22K/4 LM358DR/SO8 KDAT R46 82/4 KBDATA

Do si e C
27 KDAT
4

R2220 D
BC787 5.1K/4/1 R2221 3.3K/4/1 KCLK R48 82/4 KBCLK
2

27 KCLK
2.2U/6/X5R/6.3V/K Q298
SYSFAN_VCC R2222 15K/4/1 FANIO_2
FANIO_2 27
PA102FDG/TO252/115m/430
R2218
6.2K/4/1 C1303 FUSEVCCKB
+

1
2
3
4
NB FAN +12V 100u/OS/D/16V/66/24m EC15 3.3N/4/X7R/50V/K
C7 C8
BC788 R51 8.2K/4/1 KCLK 180P/4/NPO/50V/J 180P/4/NPO/50V/J
0.1u/4/X7R/16V/K/X
G
V
S
C
R404
3.3K/4/1
kn y
t SYS_FAN
FAN/1*4/WH/A3/PA66
R52 8.2K/4/1 KDAT

ESD4
gab
B B
-USBP5 1 6 -USBP4

+12V R412 15K/4/1 FANIO_4 2 5 FUSEVCCKB


i
FANIO_4 27
R418 +USBP5 3 4 +USBP4
6.2K/4/1
1
2
3

C193
3.3N/4/X7R/50V/K CM1293A-04SO/S
C
V
S

NB_FAN
Gi

FAN/1*3/WH/A3/PA66

CPU FAN +12V


te

BC105
0.1u/4/X7R/16V/K +12V
CPUFAN_VCC
R2224 8.2K/4/1
VCC U145B
R2226 +12V
8.2K/4/1
8

R2229 5 R2230
w.

+
1K/4/1 R2232 7 S G 0/6/X
3

FANPWM_1 6
27 FANPWM_1 -
LM358DR/SO8
22K/4
4

R2233 D
BC789 5.1K/4/1 R2234 3.3K/4/1
2

A A
2.2U/6/X5R/6.3V/K Q299
CPUFAN_VCC R2235 15K/4/1 FANIO_1
ww

FANIO_1 27
PA102FDG/TO252/115m/430
VCC R2231
6.2K/4/1
1
2
3
4

C1304
R340 3.3N/4/X7R/50V/K
+

100u/OS/D/16V/66/24m EC16 BC790 8.2K/4/1


0.1u/4/X7R/16V/K/X R342 100/4/1 Title
G
V
S
C

FANPWM3 27
CPU_FAN
FAN/1*4/WH/A3/PA66 FAN/HWMO KB/USB
C225 Size Document Number Rev
3.3N/4/X7R/50V/K/X Custom GA-880GM-UD2H 1.0
Date: Thursday, February 25, 2010 Sheet 28 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCC
VCC 3VDUAL_SB

R463 R471
R446 BC171 INTEL FRONT PANEL 330/6 5VSB 1K/4/1 R41 0/4 DBIOS_RST- 27
330/6 0.01U/4/X7R/25V/K Q350
F_PANEL R2705 33/4
+HD +MPD1 17 -SYS_RST RESET
1 HD+ MSG/PD+ 2 RESET 15,31
R449
-HDLED 3 4 -MPD1 8.2K/4/1

m
23 -HDLED HD- MSG/PD-
D BAT54C/SOT23/200mA C199 D
5 6 -PWRBTSW 0.01U/4/X7R/16V/K/X
GND PW+ -PWRBTSW 27
RESET 7 8

co
RESET PW- C200
9 0.01U/4/X7R/25V/K
CI-

y si ial
COPEN- 11 Q97
27 COPEN- CI+
3

BAV99/SOT23/300mA -MPD1
SP+ 14 VCC

3
Q99

1
BAV99/SOT23/300mA +MPD1 15 16 5VSB Q106
PWR+ NC

a.
MMBT2222A/SOT23/600mA/40
2

5VSB -MPD1 17 18
PWR- NC SOT23

1
-MPD1 -SP

op ne ent
19 PWR- SP- 20

BH/2*10K10,12,13/WH/2.54/VA/PA

R466 1K/4/1
SB_BLINK 17

VCC

-SP
SOT23

t C do id
D20
1N4148W/SOD123/300mA
S

Q98 1
R455 75/6/1 3
D

C R456 75/6/1 2 R457 1K/4/1 C


SPKR 17
G

no-in onf
2N7002/SOT23/25pF/5
3

Q108
VCC MMBT2222A/SOT23/600mA/40

R460 1K/4/1 SOT23


2

1
3

R461

Do si e C
8.2K/4/1

SOT23
2

COUPON1 COUPON1 1 2 COUPON/X


27 BEEP- VCC
Q107 COUPON2 COUPON2 1 2 COUPON/X
MMBT2222A/SOT23/600mA/40

ATX POWER CONNECTOR


t MH3 MH7
MH8

2
6
3

2
6
3
5VSB -12V VCC3 VCC3
kn y

2
6
3
ATX 8 4 8 4
13 3.3V 3.3V 1 12 5 12 5 8 4
7 1 7 1 12 5
gab
B R416 BC154 B
14 -12V 3.3V 2 7 1
22K/4 0.1u/4/X7R/16V/K HOLE_3/X HOLE_3/X

9
11
10

9
11
10
15 3 HOLE_3/X

9
11
10
GND GND
i
-ATX_PSON 16 4
27 -ATX_PSON PSON 5V VCC
17 GND GND 5
BC155
0.1u/4/X7R/16V/K 18 6 VCC
GND 5V MH1 MH2 MH4
19 GND GND 7

2
6
3

2
6
3

2
6
3
Gi

20 8 PWOK 8 4 8 4 8 4
-5V POK PWOK 27,31
12 5 12 5 12 5
VCC 21 9 5VSB 7 1 7 1 7 1
5V 5VSB
te

VCC 22 10 +12V HOLE_3/X HOLE_3/X HOLE_3/X

9
11
10

9
11
10

9
11
10
5V 12V
23 5V 12V 11
BC160 BC164 BC166 C189
10U/8/X5R/6.3V/K 24 12 0.1U/4/Y/25V/X 0.1u/4/X7R/16V/K 0.1U/4/Y/25V/X
GND 3.3V
BC159 BC163 BC165 BC167 MH5 MH6
0.1U/4/Y/25V/X APW/2*12/IV/VA/SN/2SHK/PA66 0.1U/4/Y/25V/X 0.1u/4/X7R/16V/K 0.1U/4/Y/25V/X

2
6
3

2
6
3
K1 K2 K3
w.

VCC3 8 4 8 4
12 5 12 5
5VSB 7 1 7 1

K1_ICT/X K1_ICT/X K1_ICT/X HOLE_3/X HOLE_3/X

9
11
10

9
11
10
1

1
A A
C190
10U/8/X5R/6.3V/K R2771 R2772 K4 K5 K6
ww

510/6/X 510/6/X

K1_ICT/X K1_ICT/X K1_ICT/X


For Seasonic 900W
1

1
Title
Power supply ATX, FRONT PANEL
cant Boot issue Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 29 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

AM2: high, AM2R2: low VIN12

ATX_12V_2X4 VIN12 VIN12

1 5
GND +12V

1 1 1 DBC24
2 6 + DEC1 + DEC2 + DEC11 DBC21 1U/8/Y5V/16V/Z
GND +12V 1U/8/Y5V/16V/Z

2
270u/FP/D/16V/89/10m 270u/FP/D/16V/89/10m
270u/FP/D/16V/89/10m DQ2
3 7 2SK3918/TO252/1300pF/7.5m
GND +12V
DL3 VCORE

3
UGATE1 DR132 2.2/6 0.6u/40A/IMD129/W/D

m
4 8 DR179 10K/6
D GND +12V PHASE1 D

2
BC841

co
0.1u/4/X7R/16V/K DQ3 DR138 1 1
APW/2*4/IV/OC/P/4.2/VA/SN/OH::Location ATX_12V_2X4 DQ9 2.2/6 + +
DR58 0/4/SHT/X 6323_EN DR1 300/4
31 CPUVDD_EN
* DR140 DR166 DEC6 DEC7

y si ial
VID1 0/4/SHT/X 0/4/SHT/X

3
DC57
1N/4/X7R/50V/K 820u/FP/D/2.5V/68/7m
VCC LGATE1 820u/FP/D/2.5V/68/7m
VIN12 2SK3919/TO252/2050pF/5.6m
2SK3919/TO252/2050pF/5.6m

a.
PH1
PWROK ( SVI ) EN rising edge : DR62
Low : "metal VID" Hi : PVI mode 2.2/6 DBC26 ISEN1
VIN12 1U/8/Y5V/16V/Z
High : running protocol Low : SVI mode

op ne ent
Pin 34 Input, Pin 37 Output V6323 DBC12 1U/6/X7R/16V/K

2
DQ4
VCC3 U1 DR63 2SK3918/TO252/1300pF/7.5m
0.8V on

10
ISL6324ACRA/QFN48 2.2/6
29 DBC13 0.22u/6/X7R/16V/K DL4

VCC

3
6323_EN PVCC1_2 UGATE2 DR142 2.2/6 0.6u/40A/IMD129/W/D
24
DC23 DR175 EN DR67 2.2/6 DR181 10K/6
31
0.1u/4/X7R/16V/K/X 8.2K/4/1 PWM_PWRGD BOOT1 PHASE2
6 PWM_PWRGD 34
PWROK UGATE1 DC24
32
UGATE1

2
31 VCORE_PWOK VCORE_PWOK DC25 37 33 PHASE1 0.1U/6/X7R/25V/K
DR71 3.48K/4/1 3.3N/4/X7R/50V/K VDDPWRGD PHASE1 LGATE1 DQ5 DQ11 DR148 1 1
30
VCORE_NB DC27 LGATE1 2.2/6 + +

t C do id
DR72 51/4/1 680P/4/X7R/50V/K DC28 100P/4/NPO/50V/J 48 DR150 DR168
COMP_NB DR73 0/6 ISEN1 DEC8 DEC9
20 0/4/SHT/X 0/4/SHT/X

3
DR74 357/4/1 ISEN1+
1 21
DR75 FB_NB ISEN1- DC31 DC29 LGATE2 DC59
0/6S/X PH1 DR76 9.31K/6/1 0.1U/6/X7R/25V/K 2SK3919/TO252/2050pF/5.6m 1N/4/X7R/50V/K 820u/FP/D/2.5V/68/7m
0.1U/6/X7R/25V/K VIN12 820u/FP/D/2.5V/68/7m
27 DR78 2.2/6 2SK3919/TO252/2050pF/5.6m PH2
BOOT2
C C

no-in onf
DR108 0/4 3 26 UGATE2 DC33 ISEN2
8,9,15,17 SMBDATA DC35 RGND_NB UGATE2 PHASE2 0.1U/6/X7R/25V/K DBC27
25
PHASE2 LGATE2
for 6324 DR80 DR81 2K/4/1 0.033u/4/X7R/16V/K
LGATE2
28 1U/8/Y5V/16V/Z
100/4/1/X

2
DC36 150p/4/NPO/50V/J 18
COMP DR82 0/6 ISEN2 DQ6
22
VCORE ISEN2+ 2SK3918/TO252/1300pF/7.5m
23
FB ISEN2- DC38 DC37
32 FB 17
DC40 DC39 FB PH2 DR85 9.31K/6/1 0.1U/6/X7R/25V/K DL5
DR86

3
0.1U/6/X7R/25V/K DR90 2.26K/4/1 0.027u/4/X7R/16V/K 15 35 PWM3 0.1U/6/X7R/25V/K UGATE3 DR151 2.2/6 0.6u/40A/IMD129/W/D
100/4/1 DC41 RCOMP PWM3 PWM4 DR182 10K/6
36
DR87 470/4/X 1N/4/X7R/50V/K/X PWM4 PHASE3

2
13 44 DR89 0/6 ISEN3
DR91 412/4/1 VSEN ISEN3+ DC42 DQ7 DQ13
43

Do si e C
32 VSEN ISEN3- 1 1
12 PH3 DR92 9.31K/6/1 DC43
DC44 0.1u/4/X7R/16V/K/X RGND DR94 0/6 ISEN4 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K DR154 DR155 DR169 + +
46
DR126 100/4/1 VSEN ISEN4+ ISEN4- DC51 2.2/6
45 0/4/SHT/X 0/4/SHT/X

3
6 COREFB+ DR96 DC47 ISEN4- PH4 DR93 9.31K/6/1 DC54 DEC10 DEC12
19
DC46 4.99K/4/1 APA 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K LGATE3
42
DR128 0/4/SHT/X 1N/4/X7R/50V/K/X 0.1u/4/X7R/16V/K PVCC_NB DBC15 1U/6/X7R/16V/K 2SK3919/TO252/2050pF/5.6m
6,32 COREFB-
DC48 0.1u/4/X7R/16V/K/X OFF_SET 14 DR98 2.2/6 VIN12 2SK3919/TO252/2050pF/5.6m DC60 820u/FP/D/2.5V/68/7m
DR99 75K/4/1 OFS VIN12 1N/4/X7R/50V/K 820u/FP/D/2.5V/68/7m
V6323 16
DR100 RSET PH3
100/4/1 DC45 PWM_VID0 4
1N/4/X7R/50V/K VID0/VFIXEN DR101 2.2/6 DC49 0.1U/6/X7R/25V/K ISEN3
40
PWM_VID1 BOOT_NB DBC28
5
VID1/SEL 1U/8/Y5V/16V/Z

t
PWM_VID2 6 39 UGATE_NB

2
VID2/SVD UGATE_NB PHASE_NB
38
PWM_VID3 PHASE_NB LGATE_NB DQ19
7 41
VID3/SVC LGATE_NB
kn y
2SK3918/TO252/1300pF/7.5m
for 6324 8
VID4
2 DR187 0/6 ISEN_NB DL6

3
DR109 0/4 OFF_SET ISEN_NB+ UGATE4 DR152 2.2/6 0.6u/40A/IMD129/W/D
8,9,15,17 SMBCLK 9
VID5 DR104 6.3K/4/X DR183 10K/6
47
gab GND

ISEN_NB- PHASE4
11
FS

2
DR103 DR106 9.31K/6/1 DC50 0.1U/6/X7R/25V/K DC61
B B
10K/4/X 0.1U/6/X7R/25V/K DQ20 DQ24
49

DR107 PH_NB 1
i
100K/4/1 DR156 DR157 DR176 +
2.2/6 0/4/SHT/X 0/4/SHT/X

3
DEC13
LGATE4
BOTTOM PAD CONNECT 2SK3919/TO252/2050pF/5.6m
2SK3919/TO252/2050pF/5.6m DC62 820u/FP/D/2.5V/68/7m
TO GND THROUGH 8 VIA
1N/4/X7R/50V/K
DRN8 DRN9 PH4
1 2 PWM_VID0 PWM_VID3 1 2 IO_VID3 27
6 VID0
3 4 PWM_VID1 PWM_VID2 3 4 IO_VID2 27 ISEN4
Gi

6 VID1
5 6 PWM_VID2 PWM_VID1 5 6 IO_VID1 27
6 VID2
7 8 PWM_VID3 PWM_VID0 7 8 IO_VID0 27
6 VID3
1K/8P4R/4
0/8P4R/4/SHT/X
te

VIN12
VIN12

DR115 2.2/6 DC52 0.1U/6/X7R/25V/K


DR116
w.

2.2/6 DU3 DBC19


2

2 1 UGATE3
BOOT UGATE PHASE3 DQ15 1U/8/Y5V/16V/Z
7 8
PVCC PHASE
6
DBC17 PWM3 VCC 2SK3918/TO252/1300pF/7.5m
3
PWM LGATE3
4 5
1

0.22u/6/X7R/16V/K GND LGATE UGATE_NB DR141 2.2/6 VCORE_NB


ISL6612ACBZ-T/SO8 DR180 10K/6
PHASE_NB DL15 0.6u/40A/IMD129/W/D
2
ww

A DQ16 A
DR146 1 1
VIN12 2.2/6 DR149 DR167 + +
0/4/SHT/X 0/4/SHT/X
1

DEC3 DEC4
DR124 2.2/6 DC53 0.1U/6/X7R/25V/K LGATE_NB
DR123 2SK3919/TO252/2050pF/5.6m DC58
2.2/6 DU4 1N/4/X7R/50V/K 820u/FP/D/2.5V/68/7m
2 1 UGATE4 820u/FP/D/2.5V/68/7m
BOOT UGATE PHASE4 PH_NB
7 8
PVCC PHASE
6
DBC18 PWM4 VCC ISEN_NB
3
PWM LGATE4 Title
4 5
0.22u/6/X7R/16V/K GND LGATE
ISL6612ACBZ-T/SO8 VCORE (PWM ISL6324A+6612A)
Size Document Number Rev
C GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 30 of 35
8 7 6 5 4 3 2 1
5 4 3 2 1

5VSB
DDR18V_EN
DDR18V_EN 33

3
R382
1K/4/1 D
Q78
G S 2N7002/SOT23/25pF/5

m
2

1
D D
NB_VCC_EN 32

3
5VSB

co

3
Q71 Q72

SOT23 SOT23 D Q279


2

y si ial
R380 8.2K/4/1 2N7002/SOT23/25pF/5
27,29 PWOK G S
R343
8.2K/4/1

1
MMBT2222A/SOT23/600mA/40 MMBT2222A/SOT23/600mA/40

a.
R381 8.2K/4/1
17 S3_STATE

3
SB_VCC_EN 32
Q58

op ne ent
MMBT2222A/SOT23/600mA/40

3
SOT23

1
R346 1K/4/1 D Q278
30 VCORE_PWOK
2N7002/SOT23/25pF/5
G S
C163

1
0.1u/4/X7R/16V/K

t C do id
C C
VCC18

no-in onf
R361
8.2K/4/1
3VDUAL_SB
NB_PWROK 12,17
EUP 5VSB
KQ1

3
3
3VDUAL_SB 4 2 KR6
+

301/4/1 KEC1 D Q356

Do si e C
1
100u/OS/D/16V/66/24m 2N7002/SOT23/25pF/5
L1117LG/N/SOT223/1A G S

1
KBC1 Q357
KR5 0.1u/4/X7R/16V/K
510/4/1
RESET 15,29

3VDUAL_SB BAT54C/SOT23/200mA

5VSB
kn y
t R360
8.2K/4/1
R359
8.2K/4/1

SB_PWROK 17
gab
B B

3
3
D
Q64
i
Q63 2N7002/SOT23/25pF/5
G S
VCC MMBT2222A/SOT23/600mA/40

1
SOT23

1
VCC_SB R347 1K/4/1
R335
8.2K/4/1
C164
Gi

5VSB 4.7u/8/X5R/6.3V/K PWOK > NB_PWRGD / SB_PWRGD


CPUVDD_EN 30
3

( 1.8V , 1.2V , 1.1V ) > NB_PWRGD 前 1ms


D
te

R334
8.2K/4/1 Q431 C152
G S 2.2U/6/X5R/6.3V/K
D46
2

15,29 RESET 2
3

3
Q54 1
17,27,33 -SLP_S3
MMBT2222A/SOT23/600mA/40 For ACC Function
R333 2N7002/SOT23/25pF/5
w.

SOT23
SOT23 BAT54A/SOT23/200mA
27,29 PWOK
2

8.2K/4/1
VCC18_EN 33
3

A
Q59 A
MMBT2222A/SOT23/600mA/40 D
Q432
ww

SOT23 G S
2

DDR15V R31 1K/4/1


2

C154
0.1u/4/X7R/16V/K
2N7002/SOT23/25pF/5 Title
POWER SEQUENCE ,EUP
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 31 of 35
5 4 3 2 1
5 4 3 2 1

VCC3 1.1V@4A

VCC3

BC39 L27 1
0.1u/4/X7R/16V/K 1.2uH/20A/PMU109/W/D + EC27
560u/FP/D/6.3V/89/8m

m
D D

0.047u/4/X7R/16V/K 1 1 EC35

2
C1394 R3197 20K/4/1 D BC40 + EC34 + 560u/FP/D/6.3V/89/8m

co
U97 1U/6/X7R/16V/K 560u/FP/D/6.3V/89/8m
C1395 8 1 Q22
10p/4/NPO/50V/J PHASE BOOT 2SK3918/TO252/1300pF/7.5m

y si ial
7 2 R2763 2.2/6 NBVCCU_G G S
31 NB_VCC_EN

3
COMP/SD UG
6 FB GND 3
R3198 C1397
+12V R2773 2.2/6 5 4 8.2K/4/1 0.1u/6/X7R/25V/K L2 NB_VCC
VCC LG/OCSET

a.
25V 2uH/20A/IEP109/D
ISL6545CBZ/S NBVCCPHASE 1.2V@15.8A
BC931
0.1u/6/X7R/25V/K R2774 1 1 EC21

op ne ent
2
4.7K/4 D R2775 + EC36 + 560u/FP/D/6.3V/89/8m
2.2/6 R2778 560u/FP/D/6.3V/89/8m
2K/4/1 +12V
C1398 DYNAMIC CURRENT OC
R2774 Adj OCP protect point,4.7K is 25A~28A G S 1n/4/X7R/50V/K

3
NBVCCL_G

4
VREF IS 0.6v DU6D
Q23 BC906 12 LM324DR/SO14
+
2SK3918/TO252/1300pF/7.5m R2783 0.1u/4/X7R/16V/K 14
2K/4/1 13 -

t C do id
DR159

4
D40 47K/4/1 DU6A DU6B

11
4
R3199 8.66K/4/1 2 3 LM324DR/SO14 LM324DR/SO14
18 NB_VCC_OV1 30 VSEN + FB 30
3 1 5 +
R3200 4.12K/4/1 1 2 7
C
18 NB_VCC_OV2 0.6*(1+2K/2K)=1.20V 6,30 COREFB- -
6 C
-
DR158

11
no-in onf

4
SOT23
BAT54A/SOT23/200mA 5.1K/4/1 DU6C
1.2V for RS880P (880G)

11
DR162 10 LM324DR/SO14
+
DR161 10K/4/1 8
40.2K/4/1 DR160 5.1K/4/1 9 -
DR163 DR178

11
453K/4/1 10K/4/1

CURRENT_OUT_V 28
DR165
453K/4/1

Do si e C
VCC3

3VDUAL_SB
For 1.2V Dual_Power.
BC202
1U/6/X7R/16V/K
BC96 L28
0.1u/4/X7R/16V/K 1.2uH/20A/PMU109/W/D
Q73 VCC12_DUAL
3 600mA MAX
t VCC12_DUAL 4 2
1
VCC12_DUAL

7
5
3
1
kn y
RN264

+
0.047u/4/X7R/16V/K 1 AZ1117H-1.2TR/SOT223/1A BC692 BC17 EC29 47/8P4R/6/X
2

C155 R3178 20K/4/1 D BC97 + EC38 1U/6/X7R/16V/K 100u/OS/D/16V/66/24m/X

8
6
4
2
U198
gab
B 1U/6/X7R/16V/K 560u/FP/D/6.3V/89/8m 22u/8/X5R/6.3V/M B
C157 8 1 Q429
10p/4/NPO/50V/J PHASE BOOT 2SK3918/TO252/1300pF/7.5m
7 2 R3179 2.2/6 VCCSBU_G G S
i
31 SB_VCC_EN
1

COMP/SD UG
6 3 VCC
FB GND R3180 C156
+12V R3181 2.2/6 5 4 8.2K/4/1 0.1u/6/X7R/25V/K L29 VCC_SB
VCC LG/OCSET 25V 2uH/20A/IEP109/D
ISL6545CBZ/S VCCSBPHASE 1.2V@1.69A 1.2V@1.3A
BC101 BC132
2

0.1u/6/X7R/25V/K R3182 D 1 1 0.1u/4/X7R/16V/K


Gi

10K/4/1 R3183 + EC39 + EC25 1


2.2/6 R3184 560u/FP/D/6.3V/89/8m 560u/FP/D/6.3V/89/8m + EC2
2.1K/4/1 560u/FP/D/6.3V/89/8m Q62 250mA
G S C158 3 VDDA25
1

3
te

VCCSBL_G 1n/4/X7R/50V/K 4 2
VDDA25
1
L1117LG/N/SOT223/1A
VREF IS 0.6v Q430 BC18
2SK3918/TO252/1300pF/7.5m R3185 1.25*(1+100/100)=2.5V 22u/8/X5R/6.3V/M
R394

+
2K/4/1 100/4/1 BC136 EC32
D42 0.1u/4/X7R/16V/K 100u/OS/D/16V/66/24m/X
R3203 8.66K/4/1 2
w.

18 VCC_SB_OV1
3
R3204 4.12K/4/1 1
18 VCC_SB_OV2 0.6*(1+2.1K/2K)=1.23V R395
BC144 100/4/1
SOT23

BAT54A/SOT23/200mA 0.1u/4/X7R/16V/K/X
A A
ww

Title

NB/SB POWER,VCC12HT,VDDA25,VCC12Dual
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Thursday, February 25, 2010 Sheet 32 of 35
5 4 3 2 1
5 4 3 2 1

3VDUAL
5VDUAL

5VSB +12V
5VDUAL 3VDUAL

R341
8.2K/4/1 2SK3918/TO252/1300pF/7.5m

8
U9A
R344 8.2K/4/1 Q30 5VDUAL C234

m
VCC 3 +
1 1 0.1u/4/X7R/16V/K
D D
2 - 2
R349 C176 KA393D/SO8 3
VCC 1
12.1K/4/1 1U/6/X7R/16V/K 3

4
+

co
2 C236 EC40
R2853 P2003ED/P/TO252/30m 1 R1735 560u/FP/D/6.3V/89/8m
R2854 8.2K/4/X Q31 301/4/1
R351 10K/4/1 1K/4/1 P_GATE 1 0.1u/4/X7R/16V/K
5VSB

y si ial
5VSB 2 Q36
3 L1085DG/TO252/5A
R339 C172 5VSB
10K/4/1 1U/6/X7R/16V/K 1 1 R1737
U9B + EC31 + EC24 510/4/1 1.25*(1+510/301)=3.36V

8
100u/OS/D/16V/66/24m 560u/FP/D/6.3V/89/8m

a.
R345 8.2K/4/1 5
+12V +
7
6 -
R353 C173 KA393D/SO8

op ne ent
2.74K/4/1 0.1u/6/X7R/25V/K

4
5VDUAL_GATE

3
5VSB

D
R366
1K/4/1 G S
SOT23 Q34

1
3

2N7002/SOT23/25pF/5 +12V VCC3


VDD_MEM
5VSB BC106

t C do id
Q35 C180 0.1u/4/X7R/16V/K
1n/4/X7R/50V/K/X 2_5LEVEL DDR15V
SOT23
2

R350 8.2K/4/1 MMBT2222A/SOT23/600mA/40 R529 C217


17,27,31 -SLP_S3

2
220/6 U149B 1U/6/X7R/16V/K
2_5LEVEL R515 BC98 BC102
2_5LEVEL 2.2K/4/1

8
C D72 1.5V Q330 0.1u/4/X7R/16V/K 4.7U/8/X5R/6.3V/K C

no-in onf
BAT54C/SOT23/200mA Q14 1 2SK3918/TO252/1300pF/7.5m/X DDR15V
EUP 5

3
+ + 3VDUAL
1 BAW56/SOT23/300mA EC33 7 R510 100/4/1/X VDD_MEM
3 5VSB 1 P_GATE Q96 100u/OS/D/16V/66/24m 6 U199
27 EUP_N - 1
2 3 AP431N/SOT23/150mA LM358DR/SO8
3

2 R514 BC107 + EC41 1 8

4
R2855 3.4K/4/1 0.1u/4/X7R/16V/K 560u/FP/D/6.3V/89/8m/X R3186 VIN VREF2

A
5VSB 8.2K/4/1 Q358 1K/4/1 2 7
MMBT2907A/SOT23/-600mA/50 GND ENABLE
R2858 1K/4/1 SOT23 D47 DDR_VTTREF 3 6
2

VREF1 VCNTL
3

R518 13.7K/4/1/X 2
18 VDD_MEM_OV1
R2856 3 R517 1K/4/1/X 4 5

GND
68K/4/1 5VSB R520 7.15K/4/1/X 1 R3187 DDRVTT VOUT BOOT_SEL
18 VDD_MEM_OV2
3V 1K/4/1 BC99
SOT23 VCC18 VDD_MEM

Do si e C
2

9
SOT23
BAT54A/SOT23/200mA/X W83310DG/SOP8 0.1u/4/X7R/16V/K
R2857 C216 Q361 R531 0/6 1
100K/4/1 1U/6/X7R/16V/K MMBT2222A/SOT23/600mA/40 + EC43
BC100 560u/FP/D/6.3V/89/8m
5VDUAL
4 VIA to GND
0.1u/4/X7R/16V/K

5VDUAL
kn y
t BC29
0.1u/4/X7R/16V/K
L3
gab
1.2uH/20A/PMU109/W/D

B B

0.047u/4/X7R/16V/K
i
C1401 R2794 20K/4/1 ATI for vcc3/vcc18 power ramp-up 2.1V
10p/4/NPO/50V/J C1402 1 1
2

D BC44 + EC44 + EC45


U99 1U/6/X7R/16V/K 560u/FP/D/6.3V/89/8m 560u/FP/D/6.3V/89/8m VCC3
8 1 Q25
PHASE BOOT 2SK3918/TO252/1300pF/7.5m
7 2 PWM18_1 2.2/6 DDR18VU_G G S VCC18
31 DDR18V_EN
1

COMP/SD UG
6 3 R2799 U148
Gi

FB GND

2
C1404 DDR15V BAV99/SOT23/300mA
+12V R2802 5 4 R2803 0.1u/6/X7R/25V/K L4 VCC3
VCC LG/OCSET 8.2K/4/1 25V 2uH/20A/IEP109/D 1.6V@20A
2.2/6 ISL6545CBZ/S DDR18V_PHASE Default: 1.6V, from AMD
5VDUAL BC933 2_5LEVEL
te 2

BAT54C/SOT23/200mA 0.1u/6/X7R/25V/K R2804 D 1 1 1 +12V

3
Q394 12K/4/1 R2805 R2806 + EC46 + EC47 + EC48 BC919

2
Q26 2.2/6 1.69K/4/1 1U/6/X7R/16V/K
2SK3918/TO252/1300pF/7.5m WC18 R525
G S 2.2K/4/1
1

8
DDR18VL_G C1405 1.8V U149A Q329
1n/4/X7R/50V/K 0.01U/4/X7R/25V/K 2SK3918/TO252/1300pF/7.5m
VREF IS 0.6v 31 VCC18_EN 3

3
+
560u/FP/D/6.3V/89/8m 1 R511 100/4/1 VCC18
R2810 560u/FP/D/6.3V/89/8m 2 - 1
1K/4/1 560u/FP/D/6.3V/89/8m
w.

R524 BC108 LM358DR/SO8 + EC28

4
5.76K/4/1 0.1u/4/X7R/16V/K 560u/FP/D/6.3V/89/8m
D44 0.6*(1+1.69K/1K)=1.6V
R3207 13K/4/1 2
18 DDR18V_OV1
3
R3208 7.15K/4/1 1 R521 1K/4/1
18 DDR18V_OV2
SOT23

ww

BAT54A/SOT23/200mA
A A

D45
R3209 3.48K/4/1 2
18 DDR18V_OV3
3
R3210 1.6K/4/1 1
18 DDR18V_OV4
SOT23

BAT54A/SOT23/200mA

Title
DDRII POWER , VCC18
Size Document Number Rev
C GA-880GM-UD2H 1.0
Date: Wednesday, February 24, 2010 Sheet 33 of 35
5 4 3 2 1
5 4 3 2 1

PCIE-1G LAN 3VDUAL

3VDUAL

1
+ LEC7 LBC35 LBC36 LBC51
XTALI_P 100u/OS/D/16V/66/24m0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
LX1
XTALO_P

25M/20p/30ppm/49US/20/D

m
D D
LBC61 LBC62 LC2 LC1
0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M 27p/4/NPO/50V/J 27p/4/NPO/50V/J

co
LED_ACT_TXRX VDD18

y si ial
1U/6/X7R/16V/K LBC39 LED_LINK100
0.1u/4/X7R/16V/K LBC40
LED_LINK1000
1
LR16 OGPIO LR20 10/4/X +
LANCON_DET 27

a.
2.49K/4/1 LBC49
FOR DSM MODE 22u/8/X5R/6.3V/M

XTALO_P
XTALI_P

AVDD33

AVDD33
VDD18

VDD18

VDD18
(DEEP SLUMBER MODE) Dual Color LED

op ne ent
RSET
LBC45 LBC46 LBC47 LBC48 LBC50
D4 D3 LBC44 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
Green
LU1 64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
VCTRL15
D4 D3
CKTAL2
CKTAL1
AVDD33
VDD15
LED0
LED1
LED2
LED3
VDD33
VDD15

VDD15
RSET

GVDD

NC
NC
Orange 3VDUAL AVDD33

CTRL18 1 48
VCTRL18 EESK

t C do id
AVDD33 2 47 EEDI LR19 3.6K/4/1 LFB6 0/8/SHT/X
P_MDI0+ AVDD33 EEDI 3VDUAL 3VDUAL
3 MDIP0 VDD33 46
P_MDI0- 4 MDIN0 EEDO 45 Single Color LED LBC65
FB12 5 44 LBC53 0.1u/4/X7R/16V/K
AVDD18 EECS VCC3
P_MDI1+ 6 MDIP1 VDD15 43 VDD18 D2 D1 0.1u/4/X7R/16V/K
C P_MDI1- 7 42 C
MDIN1 NC
VDD18 8 AVDD18 VDD1 41 Yellow

no-in onf
P_MDI2+ 9 40
P_MDI2- MDIP2 NC LR17
10 MDIN2 NC 39
VDD18 11 38 VDD18 1K/4/1 CHOKE4U7-500MA
P_MDI3+ AVDD18 VDD15 3VDUAL
12 MDIP3 VDD33 37
P_MDI3- 13 36 ISOLATEB
MDIN3 ISOLATEB ISOLATEB 27
VDD18 LR32 LL1
VDD18
14
15
AVDD18 NC 35
34
P35-152-19W9 0/6/SHT/X 4.7uH/0.5A/2520/S
LANWAKEB

VDD15 NC
REFCLK_N
REFCLK_P

3VDUAL 16 33 LR18 FB12 CTRL18


VDD33 VDD15
PERSTB

EVDD18

EVDD18

15K/4/1
VDD15

VDD15
EGND

EGND

HSON
EGND
HSOP
HSIN
HSIP
NC
NC

Do si e C
65

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

9 VIAs under GND pad. RTL8111D-VB-GR/S LBC63 LBC64


0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M
U4 U3 U2 U1
VDD18

VDD18
VDD18

VDD18

U8 U7 U6 U5 VDD18

-PCIE_WAKE VDD18
17,20 -PCIE_WAKE L1 L3 L5 L7 L9
PCIE_RST-
17,20,27 PCIE_RST- L2 L4 L6 L8 L10 LBC54 LBC55 LBC56 LBC57 LBC59 LBC58

11 ML_OP
11 ML_ON
15 SRCCLK_LAN
15 -SRCCLK_LAN
ML_OP
ML_ON
SRCCLK_LAN
-SRCCLK_LAN
kn y
t D1 D2 D3 D4
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 4.7U/8/X5R/6.3V/K
gab
B B
ML_IP LC3 0.1U/4/X7R/16V/K
11 ML_IP
ML_IN LC4 0.1U/4/X7R/16V/K
11 ML_IN YELLOW ORANGE GREEN
i
(+,-) (-,+)
CLOSE LAN CHIP
-PCIE_WAKE LBC34 100p/4/NPO/50V/J/X
Gi

RTL8101E :L1+L10-->AVDD18+0.1U(BIOS DISABLE MDI-X FUNCTION)


USB_LAN CONNECTOR RTL8101E:LR38/LC5/LR43/LC6-->O USB_LAN
RTL8102E:LC5/LC6-->O 1G :USB+LAN/1G/GO,Y/OS/RA/D/1
RTL8111C:LC6-->O 100M:USB+LAN/100/GO,Y/OS/RA/D/1 FUSEVCC
te

3VDUAL
R3161 150K/4
-USBOC_R1 17
LR28 1
EMI +
USB_LAN LFB4 EC49 R3162
0/6/SHT/X 100u/OS/D/16V/66/24m 270K/4
LC5 0.01U/4/X7R/25V/K L1 D1 LED_ACT_TXRX
P_MDI0+ 0/6/SHT/M/X
L2
w.

P_MDI0- L3 D2 LR13 150/6


P_MDI1+ L4
P_MDI1- L5 -USBP2
P_MDI2+ LED_LINK100 17 -USBP2 +USBP2
L6 D3 LR14 150/6/X LBC33
17 +USBP2
P_MDI2- L7 0.1u/4/X7R/16V/K/X -USBP3
P_MDI3+ LED_LINK1000 17 -USBP3 +USBP3
L8 D4 LR15 150/6/X
A 17 +USBP3 A
P_MDI3- L9 RTL8111D -->N/A
LC6 0.01U/4/X7R/25V/K L10 U1
ww

FUSEVCC
U2 -USBP2 ESD5
U3 +USBP2 FUSEVCC
UP U4 LBC26 -USBP2 1 6 -USBP3
U5 0.1u/4/X7R/16V/K
U6 -USBP3 2 5 FUSEVCC
U7 +USBP3 1
+
DOWN U8 LEC4
560u/FP/D/6.3V/89/8m
+USBP2 3 4 +USBP3 Title
REALTK RTL8111D
USB+LAN/1G/GO,Y/OS/RA/D/8C CM1293A-04SO/S Size Document Number Rev
要要要USB_PORT的
EC要 的FUSEVCC Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 34 of 35
5 4 3 2 1
8 7 6 5 4 3 2 1

TI_DVDD
IFB1 0/8/SHT/X
IR29 0/6/SHT/X TI_PLLVDD
VCC3 TI_DVDD

4
INTEL CONNECTOR BUSVCC1
IQ1
IBC1 IBC8 IBC12 IBC5 IBC3 IBC15 IBC11
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 1U/6/X7R/16V/K 0.01u/4/X7R/25V/K TI_VDDP +12V_BUS F_1394_1
TPA1+ 1 2 TPA1-

1
2
3
1394 FOR ESD AD[0..31] 3 4 BC41
1394 FOR ESD AD[0..31] 16,21
TPB1+ 5 6 TPB1- 0.1u/4/X7R/16V/K
78L05/SOT89/0.1A BUSVCC1 7 8 BUSVCC1
TI_VDDP TI_DVDD IBC27 10
22u/8/X5R/6.3V/M

m
D
TI_DVDD TI_VDDP BH/2*5K9/GY/2.54/VA D

co
TPB1- IR15 56.2/4/1 IR16 5.11K/4/1

116

111
123

103
IBC14 IBC6 IBC9 IBC4 IBC7 IBC2 IBC13 IBC10 TPB1+ IR17 56.2/4/1

16
30
46

19
27
40
56
65

68

70
72
81
85
90
93
98
3

7
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K IC5 220p/4/NPO/50V/J

y si ial
VDDP1
VDDP2
VDDP3
VDDP4
VDDP5

DVDD1
DVDD2
DVDD3
DVDD4
DVDD5
DVDD6
DVDD7
DVDD8

AVDD1
AVDD2
AVDD3
AVDD4
AVDD5
AVDD6
AVDD7
PHY_TEST_MA
PLLVDD
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K TPA1- IR18 56.2/4/1 TPBIAS1
105 IC12 12p/4/NPO/50V/J TPA1+ IR19 56.2/4/1
XI IC6
1U/6/X7R/16V/K

a.
AD0 52 IX1
AD1 PCI_AD0 IC13 12p/4/NPO/50V/J
N/A EEPROM 50 PCI_AD1
BUSVCC0 AD2 49
AD3 PCI_AD2 24.576M/20P/30PPM/49US/40/D

op ne ent
48 PCI_AD3 XO 106
IF1 +12V_BUS +12V AD4 47
AD5 PCI_AD4 -PPCIRST
1 2 45 PCI_AD5 G_RST 110
ID1 AD6 44
BUSVCC1 B320B/SMB/3A AD7 PCI_AD6
42 PCI_AD7
SMD1812P150/12V AD8 39 IC14
IF2 AD9 PCI_AD8 1n/4/X7R/50V/K/X
38 PCI_AD9
1 2 SDA AD10 37
1 SCL AD11 PCI_AD10
35 PCI_AD11
+ IEC1 AD12 34 99 IR28 6.34K/4/1
SMD1812P150/12V 270u/FP/D/16V/89/10m IR30 IR31 AD13 PCI_AD12 R1
33 PCI_AD13

t C do id
220/4 220/4 AD14 31
AD15 PCI_AD14
29 PCI_AD15 R0 100
AD16 14
AD17 PCI_AD16 TPBIAS0
13 PCI_AD17 TPBIAS0 79
AD18 11 78 TPA0+
C AD19 PCI_AD18 TPA0+ TPA0- C
10 PCI_AD19 TPA0- 77
AD20 9 75 TPB0+
PCI_AD20 TPB0+

no-in onf
AD21 8 74 TPB0-
AD22 PCI_AD21 TPB0- TPBIAS1
6 PCI_AD22 TPBIAS1 88
SESD6 AD23 5 87 TPA1+
AD24 PCI_AD23 TPA1+ TPA1-
128 PCI_AD24 TPA1- 86
+USBP0 1 6 -USBP1 AD25 127 83 TPB1+
AD26 PCI_AD25 TPB1+ TPB1-
125 PCI_AD26 TPB1- 82
2 5 FUSEVCC AD27 124 96
AD28 PCI_AD27 TPBIAS2
122 PCI_AD28 TPA2+ 95
-USBP0 3 4 +USBP1 AD29 121 94
AD30 PCI_AD29 TPA2-
120 PCI_AD30 TPB2+ 92
AD31 118 91
-USBP0 CM1293A-04SO/S PCI_AD31 TPB2-

Do si e C
17 -USBP0 +USBP0 CPS
41 69 IR12 390K/4 +12V_BUS
17 +USBP0 16,21 -C_BE0 PCI_C/BE0 CPS
-USBP1 28
17 -USBP1 +USBP1 16,21 -C_BE1 PCI_C/BE1 CYCLEIN
15 55 IR6 8.2K/4/1
17 +USBP1 16,21 -C_BE2 PCI_C/BE2 CYCLEIN TI_DVDD
16,21 -C_BE3 2 PCI_C/BE3
PC0 64 TI_DVDD
16,21 PAR 26 PCI_PAR PC1 63
16,21 -FRAME 17 PCI_FRAME PC2 62
16,21 -IRDY 18 PCI_IRDY
20 54 IR9 220/4
16,21 -TRDY PCI_TRDY CYCLEOUT
16,21 -DEVSEL 21 PCI_DEVSEL REG_EN 107
ESATA_1394_USB 22 108 IR25 8.2K/4/1

FUSEVCC
-USBP0
+USBP0
U1
U2
U3
U4
VCC
D0-
D0+
GND
1

5
USBx2
2

6
3

7
4

8
VCC
D1-
D1+
GND
U5
U6
U7
U8
-USBP1
+USBP1
FUSEVCC
kn y
t 16,21 -STOP

16,21
16,21
16,21
16,21
-REQ2
-GNT2
-PERR
-SERR
AD30 4

115
114
24
25
PCI_STOP
PCI_IDSEL

PCI_REQ
PCI_GNT
PCI_PERR
PCI_SERR
PCI_CLKRUN

REG18_1
REG18_2

GPIO2/TEST0
GPIO3/TEST1
61
126

58
57
IC1
IC10

IR1
IR2
0.1u/6/X7R/25V/K
0.1u/6/X7R/25V/K

220/4
220/4
gab
B BC5 B

0.1u/4/X7R/16V/K 112 101 IC11 0.1u/6/X7R/25V/K


1394 16 1394CLK PCI_PCLK FILTER0
T2 TPB0- 102
TPB- TPB0+ FILTER1
T1 T5
i
BUSVCC0 V12 2 4 6 TPB+
53 67 IR10 8.2K/4/1
16,21 -PPCIRST PCI_RST CNA TI_DVDD
BC4 T3 TPA0- 109
1 3 5 TPA- 16,21 -INTC PCI_INTA
0.1u/4/X7R/16V/K T4 T6 TPA0+ IR27 0/4/X 117 60 SDA
GND TPA+ 17,21 -PCIPME PCI_PME SDA
59 SCL
SCL
DGND10

eSATA IC2 IC9 PLLGND


REQ/GNT[2]
DGND1
DGND2
DGND3
DGND4
DGND5
DGND6
DGND7
DGND8
DGND9

AGND1
AGND2
AGND3
AGND4
AGND5
AGND6
AGND7
7 6 5 4 3 2 1 P1
GND INT[C]
18 SATA5RXNC P5 RX- TX+ P2 SATA5TXPC 18 IDSEL[AD30]
Gi

P6 P3 1n/4/X7R/50V/K/X 22p/4/NPO/50V/J/X
18 SATA5RXPC RX+ TX- SATA5TXNC 18
P7 P4 IU2
1
12
23
32
36
43
51
66
113
119

104

71
73
76
80
84
89
97
GND GND
V16
V15
V14
V13

TSB43AB23PDT/S
te
G4
G3
G2
G1

USB+1394+eSATA/8P+6P+7P/YL/OS/RA/D/GF::Location ESATA_1394_USB
w.

TPB0- IR7 56.2/4/1 IR8 5.11K/4/1


TPB0+ IR11 56.2/4/1
IC3 220p/4/NPO/50V/J
UR4
EMI
TPA0- IR13 56.2/4/1 TPBIAS0
A A
TPA0+ IR14 56.2/4/1
IC4
ww

1U/6/X7R/16V/K 0/6/SHT/M/X

Title
TI TSB43AB23 1394A
Size Document Number Rev
Custom GA-880GM-UD2H 1.0
Date: Monday, February 22, 2010 Sheet 35 of 35
8 7 6 5 4 3 2 1

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