Linear and Digital IC Applications

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LECTURE NOTES
ON
LINEAR AND DIGITAL IC APPLICATIONS
III B.Tech I semester (JNTUH-R13)
ELECTRONICS AND COMMUNICATION ENGINEERING
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Syllabus:
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD
L T/ /P/D C
III Year B.Tech. ECE -I Sem 4-/-/-4
LINEAR AND DIGITAL IC APPLICATIONS
UNIT – I
OPERATIONAL AMPLIFIER: Ideal and Practical Operational amplifier, Op-Amp characteristics - DC and AC.
Features of IC741 Op-Amp, Modes of operation-Inverting and Non-inverting, Differential, Instrumentation amplifier,
AC amplifier, Integrator and Differentiator, Comparators, Schmitt trigger, Introduction to Voltage Regulators, features
of IC 723 general purpose regulator, Three Terminal Voltage Regulators.
UNIT – II
OP-AMP, IC-555 & IC 565 Applications: Introduction to Active Filters characteristics of low pass and high pass
filters, band pass, band reject and all pass filters. Analysis of 1st order LPF & HPF Butterworth filters, waveform
generators-Triangular, saw tooth and square wave generators. Introduction to IC 555 timer, functional diagram,
monostable and astable operations and applications, PLL - introduction, basic principle, phase detector/comparator,
Voltage Controlled Oscillator (IC 566), low pass filter, monolithic PLL and applications of PLL.
UNIT – III
DATA CONVERTERS: Introduction, basic DAC techniques, Different types of DACs-weighted resistor DAC, R-2R
ladder DAC, inverted R-2R DAC, Different types of ADCs- parallel comparator type ADC, counter type ADC,
successive approximation ADC and dual slope ADC, DAC and ADC Specifications
UNIT – IV
DIGITAL INTERAGETED CIRCUITS: Classification of IC’s, Comparison of various logic families, CMOS
Transmission Gate, IC Interfacing –TTL Driving CMOS & CMOS Driving TTL, Combinational Logic ICs-
Specifications and Applications of TTL-74XX & CMOS 40XX Series ICs. Code Converters, Decoders, Demultiplexers,
LED & LCD Decoders with Drivers, Encoders, Priority Encoders, Multiplexers, Demultiplexers, Parity
Generators/Checkers, Parallel Binary Adder/Subtractor, Magnitude Comparators.
UNIT – V
SEQUNTIAL LOGIC ICS AND MEMORIES: Familiarity with commonly available 74XX & CMOS 40XX series
ICs- All types of Flip Flops (IC 7474, IC 7473), Synchronous counters, Decade Counters, Shift Registers, Universal
Shift Register(IC 74194).
Memories – ROM Architecture, Types of ROMS & applications, RAM Architecture, Static and Dynamic RAMs.
Text Books:
1 Op-Amps & Linear ICs, Ramakanth A, Gayakwad , PHI.
2 Linear Integrated Circuit, D. Roy Choudhury 4th edition, New Age International Pvt. Ltd.
3 Digital Fundamentals- Floyd and Jain, Pearson Education.
Reference Books:
1 Op-Amps & Linear ICs- concepts and applications James M. Flore, Cengage Learning / Jaico, 2009.
2 Operational Amplifiers & linear integrated circuits by K. Lal Kishore- Pearson, 2009.
3 Linear integrated circuits and Applications- Salivahana, TMH.
4 Modern Digital Electronics- RP Jain- 4/e- TMH, 2010.
5 Digital Design Principles and Practices- John. F. Wakerly 3/e, 2005.
6 Operational Amplifiers with linear integrated circuits, 4/e William D. Stanley, Pearson Education India, 2009.
UNIT-I
OPERATIONAL AMPLIFIER
THE OPERATIONAL AMPLIFIER:
An operational amplifier is a direct-coupled high-gain amplifier usually consisting of one or

more differential amplifiers and usually followed by a level translator and an output stage. An
operational amplifier is available as a single integrated circuit package.
The operational amplifier is a versatile device that can be used to amplify dc as well as ac input
signals and was originally designed for computing such mathematical functions as addition,subtraction,
multiplication, and integration. Thus the name operational amplifier stems from its original use for these
mathematical operations and is abbreviated to op-amp. With the addition of suitable external feedback
components, the modern day op-amp can be used for a variety of applications, such as ac and dc signal
amplification, active filters, oscillators, comparators,regulators, and others.
The ideal op-amp:
An ideal op-amp would exhibit the following electrical characteristics:
1. Infinite voltage gain

2. Infinite input resistance so that almost any signal source can drive it and there is no loading
on the preceding stage.
3. Zero output resistance Ro so that output can drive an infinite number of other devices.
4. Zero output voltage when input voltage is zero.
5. Infinite bandwidth so that any frequency signal from 0 to ∞Hz can be amplified without
attenuation.
6. Infinite common mode rejection ratio so that the output common-mode noise voltage is zero.
7. Infinite slew rate so that output voltage changes occur simultaneously with input voltage
changes.
8.
1.3.2 Equivalent circuit of an opamp:
Fig. 1.1 shows an equivalent circuit of an op-amp. V1 and V2are the two input voltage voltages. Ri
is the input impedance of OPAMP. Ad Vdis an equivalent Thevenin’s voltage source and RO is the
Thevenin’s equivalent impedance looking back into the terminal of an op-amp.
Fig. 1.1 Equivalent circuit of OP-AMP
This equivalent circuit is useful in analysing the basic operating principles of op-amp and
in observing the effects of standard feedback arrangements.
VO = Ad (V1-V2) = AdVd.
This equation indicates that the output voltage Vo is directly proportional to the algebraic difference
between the two input voltages. In other words the opamp amplifies the difference between the two input
voltages. It does not amplify the input voltages themselves. The polarity of the output voltage depends on
the polarity of the difference voltage Vd.
1.3.3.Ideal Voltage Transfer Curve:
Fig. 1.2 Ideal voltage transfer curve
The graphic representation of the output equation is shown infig.1.2 in which the output voltage Vo is
plotted against differential input voltage Vd, keeping gain Ad constant.
The output voltage cannot exceed the positive and negative saturation voltages. These saturation voltages
are specified for given values of supply voltages. This means that the output voltage is directly proportional
to the input difference voltage only until it reaches the saturation voltages and thereafter the output voltage
remains constant.
Thus curve is called an ideal voltage transfer curve, ideal because output offset voltage is assumed to be
zero. If the curve is drawn to scale, the curve would be almost vertical because of very large values of Ad.
1.4 INTERNAL CIRCUIT
The operational amplifier is a direct-coupled high gain amplifier usable from 0 to over 1MHz to
which feedback is added to control its overall response characteristic i.e. gain and bandwidth. The op-amp
exhibits the gain down to zero frequency.
The internal block diagram of an opamp is shown in the fig 1.3. The input stage is the dual input
balanced output differential amplifier. This stage generally provides most of the voltage gain of the
amplifier and also establishes the input resistance of the op-amp. The intermediate stage is usually another
differential amplifier, which is driven by the output of the first stage. On most amplifiers, the intermediate
stage is dual input, unbalanced output. Because of direct coupling, the dc voltage at the output of the
intermediate stage is well above ground potential. Therefore, the level translator (shifting) circuit is used
after the intermediate stage downwards to zero volts with respect to ground. The final stage is usually a
push pull complementary symmetry amplifier output stage. The output stage increases the voltage swing
and raises the ground supplying capabilities of the op-amp. A well designed output stage also provides low
output resistance.
Fig.1.3 Block Diagram of OP-AMP
1.4.1. Differential amplifier
Fig. 1.4 Differential Amplifier
Differential amplifier is a basic building block of an op-amp. The function of a differential amplifier is to
amplify the difference between two input signals. The two transistors Q1 and Q2 have identical
characteristics. The resistances of the circuits are equal, i.e. RE1 = R E2, RC1 = R C2 and the magnitude of
+VCC is equal to the magnitude of -VEE. These voltages are measured with respect to ground.
To make a differential amplifier, the two circuits are connected as shown in fig. 1.4. The two +VCC and -VEE
supply terminals are made common because they are same. The two emitters are also connected and the
parallel combination of RE1 and RE2 is replaced by a resistance RE. The two input signals v1& v2 are applied
at the base of Q1 and at the base of Q2. The output voltage is taken between two collectors. The collector
resistances are equal and therefore denoted by RC = RC1 = RC2.
Ideally, the output voltage is zero when the two inputs are equal. When v1 is greater then v2 the output
voltage with the polarity shown appears. When v1 is less than v2, the output voltage has the opposite
polarity.
The differential amplifiers are of different configurations.
Fig1.5. Dual input, balanced output differential amplifier.Fig.1.6. Dual input, unbalanced output differential amplifier.
Fig.1.7.Single input, balanced output differential amplifierFig.1.8.Single input, unbalanced output differential amplifier
The four differential amplifier configurations are following:
1. Dual input, balanced output differential amplifier.

2. Dual input, unbalanced output differential amplifier.
3. Single input balanced output differential amplifier.
4. Single input unbalanced output differential amplifier.
These configurations are shown in fig(1.5,1.6,1.7, 1.8), and are defined by number of input signals used and
the way an output voltage is measured. If use two input signals, the configuration is said to be dual input,
otherwise it is a single input configuration. On the other hand, if the output voltage is measured between
two collectors, it is referred to as a balanced output because both the collectors are at the same dc potential
w.r.t. ground. If the output is measured at one of the collectors w.r.t. ground, the configuration is called an
unbalanced output.
A multistage amplifier with a desired gain can be obtained using direct connection between successive
stages of differential amplifiers. The advantage of direct coupling is that it removes the lower cut off
frequency imposed by the coupling capacitors, and they are therefore, capable of amplifying dc as well as
ac input signals.
1) Dual Input, Balanced Output Differential Amplifier:
The circuit is shown in fig.1.10V1 and V2 are the two inputs, applied to the bases of Q1 and Q2 transistors. The
output voltage is measured between the two collectors C1 and C2, which are at same dc potentials.
D.C. Analysis:To obtain the operating point (ICQ and VCEQ) for differential amplifier dc equivalent
circuit is drawn by reducing the input voltages V1 and V2 to zero as shown in fig1.9
Fig.1.9Differential Amplifier
The internal resistances of the input signals are denoted by RS because RS1= RS2. Since both emitter biased
sections of the different amplifier are symmetrical in all respects, therefore, the operating point for only
one section need to be determined. The same values of ICQ and VCEQ can be used for second transistor Q2.
Applying KVL to the base emitter loop of the transistor Q1.
The value of RE sets up the emitter current in transistors Q1 and Q2 for a given value of V EE. The emitter
current in Q1 and Q2 are independent of collector resistance RC.
The voltage at the emitter of Q1 is approximately equal to -VBE if the voltage drop across R is negligible.
Knowing the value of IC the voltage at the collector VCis given by
Fig.1.10 Differential Amplifier
VC =VCC- IC RC
and VCE = VC- VE
= VCC - IC RC + VBE
VCE = VCC + VBE - ICRC (E-2)
From the two equations VCEQ and ICQ can be determined. This dc analysis is applicable for all types of
differential amplifier.
A.C. Analysis :
The circuit is shown in fig.1.10 V1 and V2 are the two inputs, applied to the bases of Q1 and Q2 transistors.
The output voltage is measured between the two collectors C1 and C2, which are at same dc potentials.
In previous lecture dc analysis has been done to obtain the operating point of the two transistors.To
find the voltage gain Ad and the input resistance Ri of the differential amplifier, the ac equivalent circuit is
drawn using r-parameters as shown infig1.11. The dc voltages are reduced to zero and the ac equivalent of
CE configuration is used.
Fig.1.11Differential Amplifier A/C Analysis
Since the two dc emitter currents are equal. Therefore, resistance r'e1 and r'e2 are also equal and designated
by r'e . This voltage across each collector resistance is shown 180° out of phase with respect to the input
voltages v1 and v2. This is same as in CE configuration. The polarity of the output voltage is shown in
Figure. The collector C2 is assumed to be more positive with respect to collector C1 even though both are
negative with respect to ground.
Applying KVL in two loops 1 & 2.
Substituting current relations,
Again, assuming RS1 /β and RS2 /β are very small in comparison with RE and re' and therefore neglecting these
terms,
Solving these two equations, ie1 and ie2 can be calculated.
The output voltage VO is given by
Substituting ie1, & ie2 in the above expression
Thus a differential amplifier amplifies the difference between two input signals. Defining the
difference of input signals as Vd =V1-V2 the voltage gain of the dual input balanced output differential
amplifier can be given by
(E-2)
Differential Input Resistance:
Differential input resistance is defined as the equivalent resistance that would be measured at either
input terminal with the other terminal grounded. This means that the input resistance Ri1 seen from the input
signal source V1 is determined with the signal source V2 set at zero. Similarly, the input signal V1
set at zero to determine the input resistance Ri2 seen from the input signal source V2. Resistance RS1 and RS2
are ignored because they are very small.
Substituting ie1,
Similarly
The factor of 2 arises because the re' of each transistor is in series.To get very high input impedance
with differential amplifier is to use Darlington transistors. Another ways is to use FET.
Output Resistance:
Output resistance is defined as the equivalent resistance that would be measured at output terminal
with respect to ground. Therefore, the output resistance RO1 measured between collector C1 and ground is
equal to that of the collector resistance RC. Similarly the output resistance RO2 measured at C2 with respect
to ground is equal to that of the collector resistor RC.
(E-
RO1 = RO2 = RC 5)
The current gain of the differential amplifier is undefined. Like CE amplifier the differential amplifier is
a small signal amplifier. It is generally used as a voltage amplifier and not as current or power amplifier.
2) Dual Input, Unbalanced Output Differential Amplifier:
Fig. 1.12Differential Amplifier
In this case, two input signals are given however the output is measured at only one of the two-
collector w.r.t. ground as shown infig1.12. The output is referred to as an unbalanced output because the
collector at which the output voltage is measured is at some finite dc potential with respect to ground.
In other words, there is some dc voltage at the output terminal without any input signal applied. DC
analysis is exactly same as that of first case.
AC Analysis:
The output voltage gain in this case is given by
The voltage gain is half the gain of the dual input, balanced output differential amplifier. Since at the
output there is a dc error voltage, therefore, to reduce the voltage to zero, this configuration is normally
followed by a level translator circuit.
1.4.2. Level Translator:
Because of the direct coupling the dc level at the emitter rises from stages to stage. This increase in
dc level tends to shift the operating point of the succeeding stages and therefore limits the output
voltage swing and may even distort the output signal.
To shift the output dc level to zero, level translator circuits are used. An emitter follower with
voltage divider is the simplest form of level translator as shown
Thus a dc voltage at the base of Q produces 0V dc at the output. It is decided by R1 and R2. Instead
of voltage divider emitter follower either with diode current bias or current mirror bias as shown in
fig 1.14may be used to get better results.
In this case, level shifter, which is common collector amplifier, shifts the level by 0.7V. If this shift
is not sufficient, the output may be taken at the junction of two resistors in the emitter leg.
Fig1.14 Common collector Amplifier
Fig.1.15 shows a complete opamp circuit having input different amplifiers with balanced output,
intermediate stage with unbalanced output, level shifter and an output amplifier.
Fig.1.15 Circuit Diagram of OP-AMP
1.5 OP-AMP CHARACTERISTICS
1. 5.1 DC CHARACTERISTICS:
a)Input offset voltage:

Input offset voltage Vio is the differential input voltage that exists between two input terminals of an
op-amp without any external inputs applied. In other words, it is the amount of the input voltage that should
be applied between two input terminals in order to force the output voltage to zero. Let us denote the output
offset voltage due to input offset voltage Vio as Voo. The output offset voltage Voo is caused by mismatching
between two input terminals. Even though all the components are integrated on the same chip, it is not
possible to have two transistors in the input differential amplifier stage with exactly the same characteristics.
This means that the collector currents in these two transistors are not equal, which causes a differential
output voltage from the first stage. The output of first stage is amplified by following stages and possibly
aggravated by more mismatching in them.
Fig 1.16input offset voltage in opamp Fig 1.17 Output offset voltage in opamp
Fig 1.18.Op-Amp with offset voltage compensating network
The op-amp with offset-voltage compensating network is shown in Figure1.18.

The Compensating network consists of potentiometer Ra and resistors Rb and Re.
To establish a relationship between Vio, supply voltages, and the compensating components,
firstThevenize the circuit, looking back into Ra from point T. The maximum Thevenin’s equivalentresistance
Rmax, occurs when the wiper is at the center of the Potentiometer, as shown in Figure.
Rmax =(R a /2)||(R a /2)
Supply voltages VCCand -VEEare equal in magnitude therefore; let us denote their magnitude byvoltage V.
Thus Vmax= V
where V2 has been expressed as a function of maximum Thevenin‘s voltage Vmax and
maximum Thevenin‘s resistance, But the maximum value of V2 can be equal to Vio since V1
— V2 = Vio. Thus Equation becomes
Assume Rb >Rmax >Rc, where Rmax = Ra/4. Using this assumption Rmax+Rb+Rc=Rb
Therefore
Let us now examine the effect of Vio in amplifiers with feedback. The non-inverting and inverting
amplifiers with feedback are shown in Figure.1.19To determine the effect of Vio, in each case, we have to
reduce the input voltage vin to zero.
Fig 1.19 Closed loop non inverting or inverting Amp
With vin reduced to zero, the circuits of both non-inverting and inverting amplifiers are the sameas the
circuit in Figure. The internal resistance Rin of the input signal voltage is negligibly small.In the figure, the non-
inverting input terminal is connected to ground; therefore, assume voltageV1 at input terminal to be zero. The
voltageV2 at the inverting input terminal can be determinedby applying the voltage-divider rule:
b) Input offset voltage

A small voltage applied to the input terminals to make the output voltage as zero
when the two input terminals are grounded is called input offset voltage
c)Input bias current
Input bias current IB as the average value of the base currents entering into terminal of an op-
amp
Obtaining the expression for the output offset voltage caused by the inputbias current IB in the
inverting and non-inverting amplifiers and then devise some scheme toeliminate or minimize it.
Fig 1.20 Op-Amp
In the figure, the input bias currents ‘81 and 1 are flowing into the non-inverting and invertinginput
leads, respectively. The non-inverting terminal is connected to ground; therefore, thevoltage V1 = 0 V. The
controlled voltage source A Vio =0 V since Vio= 0 V is assumed. Withoutput resistance Ro is negligibly small,
the right end of RF is essentially at ground potential; thatis, resistors R1, and RF are in parallel and the bias
current I, flows through them. Therefore, thevoltage at the inverting terminal is
d)Thermal Drift:
Bias current, offset current and offset voltage change with temperature. A circuit carefully nulled at
o o
25 c may not remain so when the temperature rises to 35 c. This is called drift
a) Slew rate
b) Frequency Response
Need for frequency compensation in practical op-amps:
Frequency compensation is needed when large bandwidth and lower closed loop gain is desired.
Compensating networks are used to control the phase shift and hence to improve the stability
Frequency compensation methods :
a)Dominant- pole compensation
b)Pole- zero compensation
a)Slew Rate
The slew rate is defined as the maximum rate of change of output voltage caused by a step input voltage.
An ideal slew rate is infinite which means that op-amp’s output voltage should change instantaneously in
response to input step voltage.
The symbolic diagram of an OPAMP is shown in fig1.21
Fig.1.21 Op-Amp Symbol
741c is most commonly used OPAMP available in IC package. It is an 8-pin DIP chip.
1.5.3.Parameters of OPAMP:
The various important parameters of OPAMP are follows:
1.Input Offset Voltage:
Fig. 1.22input 0ffset voltage
If no external input signal is applied to the op-amp at the inverting and non-inverting terminals the output
must be zero. That is, if Vi=0, Vo=0. But as a result of the given biasing supply voltages, +V cc and –Vcc, a
finite bias current is drawn by the op-amps, and as a result of asymmetry on the differential amplifier
configuration, the output will not be zero. This is known as offset. Since Vo must be zero when Vi=0 an
input voltage must be applied such that the output offset is cancelled and Vo is made zero. This is known as
input offset voltage. Input offset voltage (Vio) is defined as the voltage that must be applied between the two
input terminals of an OPAMP to null or zero the output voltage. Fig 1.22, shows that two dc voltages are
applied to input terminals to make the output zero.
Vio = Vdc1- Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the source resistance. Vio is the difference of Vdc1 and Vdc2. It
may be positive or negative. For a 741C OPAMP the maximum value of V io is 6mV. It means a voltage ± 6
mV is required to one of the input to reduce the output offset voltage to zero. The smaller the input offset
voltage the better the differential amplifier, because its transistors are more closely matched
2.Input offset Current:
Though for an ideal op-amp the input impedance is infinite, it is not so practically. So the IC draws current
from the source, however smaller it may be. This is called input offset current Iio. The input offset current Iio
is the difference between the currents into inverting and non-inverting terminals of a balanced amplifier as
shown in fig 1.22.
Iio = | IB1- IB2 |
The Iio for the 741C is 200nA maximum. As the matching between two input terminals is improved, the
difference between IB1 and IB2 becomes smaller, i.e. the Iio value decreases further.For a precision
OPAMP 741C, Iio is 6 nA
3.Input Bias Current:
The input bias current IB is the average of the current entering the input terminals of a balanced amplifier
i.e.
IB = (IB1 + IB2 ) / 2
For ideal op-amp IB=0. For 741C IB(max) = 700 nA and for precision 741C IB = ± 7 nA
4. Differential Input Resistance: (Ri)
Ri is the equivalent resistance that can be measured at either the inverting or non-inverting input terminal
with the other terminal grounded. For the 741C the input resistance is relatively high 2 MΩ. For some
OPAMP it may be up to 1000 G ohm.
5. Input Capacitance: (Ci)
Ci is the equivalent capacitance that can be measured at either the inverting and noninverting terminal with
the other terminal connected to ground. A typical value of Ci is 1.4 pf for the 741C.
6. Offset Voltage Adjustment Range:
741 OPAMP have offset voltage null capability. Pins 1 and 5 are marked offset null for this purpose. It can
be done by connecting 10 K ohm pot between 1 and 5 as shown
By varying the potentiometer, output offset voltage (with inputs grounded) can be reduced to zero volts.
Thus the offset voltage adjustment range is the range through which the input offset voltage can be
adjusted by varying 10 K pot. For the 741C the offset voltage adjustment range is ± 15 mV.
7. Input Voltage Range :
Input voltage range is the range of a common mode input signal for which a differential amplifier
remains linear. It is used to determine the degree of matching between the inverting and non-inverting input
terminals. For the 741C, the range of the input common mode voltage is ± 13V maximum. This means that
the common mode voltage applied at both input terminals can be as high as +13V or as low as -13V.
8. Common Mode Rejection Ratio (CMRR).
CMRR is defined as the ratio of the differential voltage gain Ad to the common mode voltage gain ACM
CMRR = Ad / ACM.
For the 741C, CMRR is 90 dB typically. The higher the value of CMRR the better is the matching between
two input terminals and the smaller is the output common mode voltage
9. Supply voltage Rejection Ratio: (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change in power supply
voltages. This is expressed inΔV / V or in decibels, SVRR can be defined as
SVRR =ΔVio / ΔV
Where ΔV is the change in the input supply voltage and ΔVio is the corresponding change in the
offset voltage.
For the 741C, SVRR = 150 µ V / V.
For 741C, SVRR is measured for both supply magnitudes increasing or decreasing simultaneously, with
R3= 10K. For same OPAMPS, SVRR is separately specified as positive SVRR and negative SVRR.
10. Large Signal Voltage Gain:
Since the OPAMP amplifies difference voltage between two input terminals, the voltage gain of the
amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gain is commonly called large
signal voltage gain. For 741C is voltage gain is 200,000 typically.
11. Output voltage Swing: The ac output compliance PP is the maximum unclipped peak to peak output
voltage that an OPAMP can produce. Since the quiescent output is ideally zero, the ac output voltage can
swing positive or negative. This also indicates the values of positive and negative saturation voltages of the
OP-AMP. The output voltage never exceeds these limits for a given supply voltages +VCC and -VEE. For
a 741C it is ± 13 V.
12. Output Resistance: (RO)
RO is the equivalent resistance that can be measured between the output terminal of the OPAMP and the
ground. It is 75 ohm for the 741C OPAMP.
13. Output Short circuit Current :
In some applications, an OPAMP may drive a load resistance that is approximately zero. Even its output
impedance is 75 ohm but cannot supply large currents. Since OPAMP is low power device and so its
output current is limited. The 741C can supply a maximum short circuit output current of only 25mA.
14. Supply Current :
IS is the current drawn by the OP-AMP from the supply. For the 741C OPAMP the supply current is 2.8 m A.
15. Power Consumption:
Power consumption (PC) is the amount of quiescent power (Vin= 0V) that must be consumed by the
OPAMP in order to operate properly. The amount of power consumed by the 741C is 85 m W.
16. Gain Bandwidth Product:
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage gain is reduced to 1.
From open loop gain vs frequency graph At 1 MHz shown in.fig.1.24,it can be found 1 MHz for the 741C
OPAMP frequency the gain reduces to 1. The mid band voltage gain is 100, 000 and cut off frequency is 10Hz.
Fig.1.24 Band width of OP-AMP
17. Slew Rate:
Slew rate is defined as the maximum rate of change of output voltage per unit of time under large signal
conditions and is expressed in volts / µsecs.
If 'i' is more, capacitor charges quickly. If 'i' is limited to Imax, then rate of change is also limited.Slew rate
indicates how rapidly the output of an OP-AMP can change in response to changes in the input frequency
with input amplitude constant. The slew rate changes with change in voltage gain and is normally specified at
unity gain.
If the slope requirement is greater than the slew rate, then distortion occurs. For the 741C the slew rate is
low 0.5 V / µS. which limits its use in higher frequency applications.
18. Input Offset Voltage and Current Drift:
It is also called average temperature coefficient of input offset voltage or input offset current. The input
offset voltage drift is the ratio of the change in input offset voltage to change in temperature and expressed
in ΔV /° C. Input offset voltage drift = ( ΔVio /ΔT).
Similarly, input offset current drift is the ratio of the change in input offset current to the change in
temperature. Input offset current drift = ( ΔIio / ΔT).
For 741C,
ΔVio / ΔT = 0.5 V / C.
Iio/ ΔT = 12 pA / C.
1.6 PIN DIAGRAM OF 741-OP AMP
1.7 FEATURES OF 741 OP-AMP:
1. No External frequency compensation is required
2. Short circuit Protection
3. Off Set Null Capability
4. Large Common mode and differential Voltage ranges
5. Low Power Dissipation
6. No-Latch up Problem
7.741 is available in three packages :- 8-pin metal can, 10-pin flat pack and 8 or 14-pin DI.
1.8. MODES OF OPERATION OF OP-AMP
There are 2 modes in which an op-amp operates:
1. open loop mode

2. closed loop mode
1.8.1 Open loop OPAMP mode:
In the case of amplifiers the term open loop indicates that no connection exists between input and
output terminals of any type. That is, the output signal is not fedback in any form as part of the input signal.
In open loop configuration, The OPAMP functions as a high gain amplifier. There are three open loop
OPAMP configurations.
1. The Differential Amplifier:
Fig. 1.26, shows the open loop differential amplifier in which input signals vin1 and vin2 are applied
to the positive and negative input terminals.
Since the OPAMP amplifies the difference the between the two input signals, this configuration is
called the differential amplifier. The OPAMP amplifies both ac and dc input signals. The source resistance
Rin1 and Rin2 are normally negligible compared to the input resistance Ri. Therefore voltage drop across these
resistances can be assumed to be zero.
Therefore
v1 = vin1 and v2 = vin2.
vo = Ad (vin1- vin2 )
where, Ad is the open loop gain.
2. The Inverting Amplifier:
If the input is applied to only inverting terminal and non-inverting terminal is grounded then it is
called inverting amplifier.This configuration is shown
v1= 0, v2 = vin.
vo = -Ad vi
The negative sign indicates that the output voltage is out of phase with respect to input 180 ° or is
of opposite polarity. Thus the input signal is amplified and inverted also.
3 .The non-inverting amplifier:
In this configuration, the input voltage is applied to non-inverting terminals and inverting terminal is
ground as shown in fig.1.28
v2 =
v1 = +vin , 0
vo = +Ad vin
This means that the input voltage is amplified by Ad and there is no phase reversal at the output.
Fig.1.28 Non Inverting Amplifier
In all there configurations any input signal slightly greater than zero drive the output to saturation
level. This is because of very high gain. Thus when operated in open-loop, the output of the OPAMP is
either negative or positive saturation or switches between positive and negative saturation levels. Therefore
open loop op-amp is not used in linear applications.
1.8.2. Closed Loop mode:
The Open Loop Gain of an ideal operational amplifier can be very high, as much as 1,000,000
(120dB) or more. However, this very high gain is of no real use to us as it makes the amplifier
both unstable and hard to control as the smallest of input signals, just a few micro-volts, (μV)
would be enough to cause the output voltage to saturate and swing towards one or the other of the
voltage supply rails losing complete control of the output.
As the open loop DC gain of an operational amplifier is extremely high we can therefore afford to
lose some of this high gain by connecting a suitable resistor across the amplifier from the output
terminal back to the inverting input terminal to both reduce and control the overall gain of the
amplifier. This then produces and effect known commonly as Negative Feedback, and thus produces
a very stable Operational Amplifier based system.
Negative Feedback is the process of "feeding back" a fraction of the output signal back to the input,
but to make the feedback negative, we must feed it back to the negative or "inverting input" terminal
of the op-amp using an external Feedback Resistor called Rƒ. This feedback connection between
the output and the inverting input terminal forces the differential input voltage towards zero.
This effect produces a closed loop circuit to the amplifier resulting in the gain of the amplifier now
being called its Closed-loop Gain. Then a closed-loop inverting amplifier uses negative feedback
to accurately control the overall gain of the amplifier, but at a cost in the reduction of the amplifiers
bandwidth.
This negative feedback results in the inverting input terminal having a different signal on it than the
actual input voltage as it will be the sum of the input voltage plus the negative feedback voltage
giving it the label or term of a Summing Point. We must therefore separate the real input signal
from the inverting input by using an Input Resistor, Rin.
As we are not using the positive non-inverting input this is connected to a common ground or zero
voltage terminal as shown below, but the effect of this closed loop feedback circuit results in the
voltage potential at the inverting input being equal to that at the non-inverting input producing a
Virtual Earth summing point because it will be at the same potential as the grounded reference
input. In other words, the op-amp becomes a "differential amplifier".
1.2.8.1 Inverting Amplifier Configuration
Fig 1.29 inverting amplifier with feedback.
In this Inverting Amplifier circuit the operational amplifier is connected with feedback to produce a
closed loop operation. For ideal op-amps there are two very important rules to remember about
inverting amplifiers, these are: "no current flows into the input terminal" and that "V1 equals V2",
(in real world op-amps both of these rules are broken).
This is because the junction of the input and feedback signal ( X ) is at the same potential as the
positive ( + ) input which is at zero volts or ground then, the junction is a "Virtual Earth". Because
of this virtual earth node the input resistance of the amplifier is equal to the value of the input
resistor, Rin and the closed loop gain of the inverting amplifier can be set by the ratio of the two
external resistors.
We said above that there are two very important rules to remember about Inverting Amplifiers
or any operational amplifier for that matter and these are.
 1. No Current Flows into the Input Terminals

 2. The Differential Input Voltage is Zero as V1 = V2 = 0 (Virtual Earth)
Then by using these two rules we can derive the equation for calculating the closed-loop gain of
an inverting amplifier, using first principles.
Current ( i ) flows through the resistor network as shown.
Then, the Closed-Loop Voltage Gain of an Inverting Amplifier is given as.
and this can be transposed to give Vout as:
The negative sign in the equation indicates an inversion of the output signal with respect to the
o
input as it is 180 out of phase. This is due to the feedback being negative in value.
1.8.2.2 The Non-inverting Amplifier
The second basic configuration of an operational amplifier circuit is that of a Non-inverting
Amplifier. In this configuration, the input voltage signal, ( Vin ) is applied directly to the non-
inverting ( + ) input terminal which means that the output gain of the amplifier becomes "Positive"
in value in contrast to the "Inverting Amplifier" circuit we saw in the last tutorial whose output gain
is negative in value. The result of this is that the output signal is "in-phase" with the input signal.
Feedback control of the non-inverting amplifier is achieved by applying a small part of the output
voltage signal back to the inverting ( - ) input terminal via a Rƒ - R2 voltage divider network, again
producing negative feedback. This closed-loop configuration produces a non-inverting amplifier
circuit with very good stability, a very high input impedance, Rin approaching infinity, as no
current flows into the positive input terminal, (ideal conditions) and a low output impedance, Rout
as shown below.
Non-inverting Amplifier Configuration
Fig 1.30 Non-inverting amplifier with feedback.
As said in theInverting Amplifierthat "no current flows into the input" of the amplifier and that "V1
equals V2". This was because the junction of the input and feedback signal ( V1 ) are at the same
potential. In other words the junction is a "virtual earth" summing point. Because of this virtual
earth node the resistors, Rƒ and R2 form a simple potential divider network across the non-inverting
amplifier with the voltage gain of the circuit being determined by the ratios of R2 and Rƒ as shown
below.
Equivalent Potential Divider Network
Fig 1.31 potential divider in non-inverting op-amp
From the fig 1.31 using the formula to calculate the output voltage of a potential divider network,
we can calculate the closed-loop voltage gain ( A V ) of the Non-inverting Amplifier as follows:
Then the closed loop voltage gain of a Non-inverting Amplifier is given as:
We can see from the equation above, that the overall closed-loop gain of a non-inverting amplifier will
always be greater but never less than one (unity), it is positive in nature and is determined by the ratio of
the values of Rƒ and R2. If the value of the feedback resistor Rƒ is zero, the gain of the amplifier will be
exactly equal to one (unity). If resistor R2 is zero the gain will approach infinity, but
in practice it will be limited to the operational amplifiers open-loop differential gain, ( Ao ).
Voltage Follower (Unity Gain Buffer)
If we made the feedback resistor, Rƒ equal to zero, (Rƒ = 0), and resistor R2 equal to infinity,
(R2 = ∞) as shown in fig 1.32, then the circuit would have a fixed gain of "1" as all the output
voltage would be present on the inverting input terminal (negative feedback). This would then
produce a special type of the non-inverting amplifier circuit called a Voltage Follower or also called
a "unity gain buffer".
As the input signal is connected directly to the non-inverting input of the amplifier the output signal
is not inverted resulting in the output voltage being equal to the input voltage, Vout = Vin. This then
makes the voltage follower circuit ideal as a Unity Gain Buffer circuit because of its isolation
properties as impedance or circuit isolation is more important than amplification while maintaining
the signal voltage. The input impedance of the voltage follower circuit is very high, typically above
1MΩ as it is equal to that of the operational amplifiers input resistance times its gain ( Rin x Ao ).
Also its output impedance is very low since an ideal op-amp condition is assumed.
Fig 1.32 voltage follower
In this non-inverting circuit configuration, the input impedance Rin has increased to infinity and the
feedback impedance Rƒ reduced to zero. The output is connected directly back to the negative
inverting input so the feedback is 100% and Vin is exactly equal to Vout giving it a fixed gain of 1 or
unity. As the input voltage Vin is applied to the non-inverting input the gain of the amplifier is
given as:
Therefore,
One final thought, the output voltage gain of the voltage follower circuit with closed loop gain is Unity,
the voltage gain of an ideal operational amplifier with open loop gain (no feedback) is Infinite. Then by
carefully selecting the feedback components we can control the amount of gain produced by
an operational amplifier anywhere from one to infinity.
INSTRUMENTATION AMPLIFIER:
In many industrial and consumer applications the measurement and control of physical conditions are very
important.For example measurements of temperature and humidity inside a dairy or meat plant permit the
operator to make necessary adjustments to maintain product quality.Similarly,precise temperature control of
plastic furnace is needed to produce a particular type of plastic.
Fig.2.1 Instrumentation Amplifier
The transducer is a device that converts one form of energy into another. For example a strain gage when
subjected to pressure or force undergoes a change in its resistance (electrical energy).An instrumentation
system is used to measure the output signal produced by a transducer and often to control the physical signal
producing it.
Above fig shows a simplified form of such a system.The input stage is composed of a pre-amplifier and some sort of
transducer,depending on the physical quantity to be measured..The output stage may use devices such as
meters,oscilloscopes,charts,or magnetic records.
In Figure 2.1 the connecting lines between the blocks represent transmission lines, used especially when the
transducer is at a remote test site monitoring hazardous conditions such as high temperatures or liquid levels of
flammable chemicals. These transmission lines permit signal transfer from unit to unit. The length of the
transmission lines depends primarily on the physical quantities tobe monitored and on system requirements.
The signal source of the instrumentation amplifier is the output of the transducer. Although some transducers
produce outputs with sufficient strength to per- m.; their use directly, many do not. To amplify the low-level
output signal of the transducer so that it can drive the indicator or display is the major function of the
instrumentation amplifier. In short, the instrumentation amplifier is intended for precise, low-level signal
amplification where low noise, low thermal and time
drifts, high input resistance, and accurate closed-loop gain are required. Besides, low power consumption, high
common-mode rejection ratio, and high slew rate are desirable for superior performance.
There are many instrumentation operational amplifiers, such as the /LA 725, ICL7605, and LH0036, that make
a circuit extremely stable and accurate. These
ICs are, however, relatively expensive; they are very precise special-purpose circuits in which most of the
electrical parameters, such as offsets, drifts, and power consumption, are minimized, whereas input resistance,
CMRR, and supply range are optimized. Some instrumentation amplifiers are even available in modular form
to suit special installation requirements.
Obviously, the requirements for instrumentation op-amps are more rigid than those for general-purpose
applications. However, where the requirements are not too strict, the general-purpose op-amp can be employed
in the differential mode.
We will call such amplifiers differential instrumentation amplifiers. Since most instrumentation systems use a
transducer in a bridge circuit, we will consider a simplified differential instrumentation system arrangement using a
transducer bridge circuit.
2.1.1.Instrumentation Amplifier Using Transducer Bridge
Figure 2.2 shows a simplified differential instrumentation amplifier using a transducer bridge. A resistive transducer
whose resistance changes as a function of some physical energy is connected in one arm of the Bridge with a small
circle around it and is denoted by (RT± R), where RTis the resistance of the transducer and R the change in resistance
RT.
The bridge is balanced initially at a desired reference condition. However, as the physical quantity
to be measured changes, the resistance of the transducer also changes, which causes the bridge to
unbalance. The output voltage of the bridge can be expressed as a function of the change in
resistance of the transducer, as described next.
Fig.2.2Circuit Diagram of Instrumentation Amplifier
Before proceeding with specific bridge applications, let us briefly

consider the important characteristics of some, resistive types of transducers.
In these resistive types of transducers the resistance of the transducer
changes as a function of some physical quantity. Thermistors,
photoconductive cells, and strain gages are some of the most commonly
used resistive transducers; hence they will be further discussed here.
Thermistors are essentially semiconductors that behave as resistors, usually with a

negative temperature coefficient of resistance. That is, as the temperature of a thermistor
increases, its resistance decreases. The temperature coefficient of resistance is expressed
2.2 AC AMPLIFIER
Fig 2.2.1(a) AC Inverting Amplifier (b)AC Non Inverting Amplifier
2.3 .V to I Converter:
Fig.2.3, shows a voltage to current converter in which load resistor RL is floating (not connected to
ground). The input voltage is applied to the non-inverting input terminal and the feedback voltage
across R drives the inverting input terminal. This circuit is also called a current series negative
feedback, amplifier because the feedback voltage across R depends on the output current iL and is
in series with the input difference voltage Vd.
Writing the voltage equation for the input loop.
vin = vd + vf
But vd » since A is very large,therefore,
vin = vf
vin = R iin
iin = v in / R.
and since input current is zero.
iL = iin = vin ./ R
The value of load resistance does not appear in this

equation. Therefore, the output current is
independent of the value of load resistance.
Thus the input voltage is converted into
current, the source must be capable of Fig.2.3 Circuit Diagram of V to I Converter supplying this
load current.
2.3.1Grounded LoadV to I Converter:
If the load has to be grounded, then the above circuit cannot be used. The modified circuit is shown
in fig.2.4.
Since the collector and emitter currents are equal to a close

approximation and the input impedance of OPAMP is very high,the
load current also flows through the feedback resistor R. On account of
this, there is still current feedback, which means that the load current
is stabilized.
Since vd= 0
v2 = v1 = vin
iout = (vCC- vin ) / R
Thus the load current becomes nearly equal to iout. There is a limit to
the output current that the circuit can supply. The base current in the
transistor equals iout / dc. Since the op-amp has to supply this base
current iout /dc must be less than Iout (max) of the op-amp, typically 10
to 15mA.
There is also a limit on the output voltage, as the load resistance

increases, the load voltage increases and then the transistor goes into
saturation. Since the emitter is at Vin w. r. t. ground, the maximum load
voltage is slightly less than Vin. Fig.2.4Circuit Diagram of V to I
ConverterGrounded load
In this circuit, because of negative feedback VBEis automatically adjusted. For instance, if the load resistance decreases the load
current tries to increase. This means that more voltage is feedback to the inverting input, which decreases VBE just enough to almost
completely nullify the attempted increase in load current. From the output current expression it is clear that as Vin increases the load
current decreases.
2.5 SAMPLE AND HOLD CIRCUITS:
The sample and hold circuit ,as its name implies samples an i/p signal and holds on to it last sampled
value until the i/p is sampled again.Below fig shows a sample and hold circuit using an op-amp with an E-
MOSFET.In this circuit the E-MOSFET works as a switch that is controlled by the sample and control
voltage Vs,and the capacitor C serves as a storage element.
The analog signal Vin to be sampled is applied to the drain, and sample and hold control voltage Vs
is applied to the gate of the E-MOSFET.During the positive portion of the Vs, the EMOSFET conducts and
acts as a closed switch.This allows i/p voltage to charge capacitor C.In other words input voltage appears
across C and in turn at the o/p as shown in above fig.2.9.On the other hand,when Vs is zero,the EMOSFET
is off and acts as open switch.The only discharge path for C is, through the op-amp.However the i/p
resistance of the op-amp voltage follower is also very high; hence the voltage across C is retained.
The time periods Ts of the sample-and-hold control voltage Vs during which the voltage across the
capacitor is equal to the i/p voltage are called sample periods.The time periods TH of Vs during which the
voltage across the capacitor is constant are called hold periods.The o/p of the op-amp is usually
processed/observed during hold periods.To obtain the close approximation of the i/p waveform,the
frequency of the sample-and-hold control voltage must be significantly higher than that of the i/p
Fig.2.8 sample and hold circuit Fig2.9 I/P and O/P wave forms
2.6 DIFFERENTIATOR
A circuit in which the output voltage waveform is the differentiation of input voltage is called
differentiator as shown infig.2.10.
Fig.2.10 Circuit Diagram of Differentiator
The expression for the output voltage can be obtained from the Kirchoff's current equation written at node
v2.
Thus
the output vo is equal to the RC times the negative instantaneous rate of change of the input voltage vin with time. A cosi
Fig.2.11 Circuit Diagram of Differentiator produces sine output. fig.2.10 also shows the output waveform for different input
The input signal will be differentiated properly if the time period T of the input signal is larger than
or equal to Rf C.
As the frequency changes, the gain changes. Also at higher frequencies the circuit is highly
susceptible at high frequency noise and noise gets amplified. Both the high frequency noise and
problem can be corrected by adding, few components. as shown in fig.2.11.
2.7 Integrator:
A circuit in which the output voltage waveform is the integral of the input voltage waveform is
called integrator. Fig.2.12, shows an integrator circuit using OPAMP.
Fig.2.12 Circuit Diagram of Integrator
Here, the feedback element is a capacitor. The current drawn by OPAMP is zero and also the V2 is
virtually grounded.
Therefore, i1 = if and v2 = v1 = 0
Integrating both sides with respect to time from 0 to t, we get
The output voltage is directly proportional to the negative integral of the input voltage and
inversely proportional to the time constant RC.
If the input is a sine wave the output will be cosine wave. If the input is a square wave, the
output will be a triangular wave. For accurate integration, the time period of the input signal T must
be longer than or equal to RC.
Fig.2.13, shows the output of integrator for square and sinusoidal inputs.
Fig.2.13 Input and Out put wave forms
2.8 COMPARATOR:
Voltage comparator circuit.
Voltage comparator is a circuit which compares two voltages and switches the output to either high or low state
depending upon which voltage is higher. A voltage comparator based on opamp is shown here. Fig2.14 shows a
voltage comparator in inverting mode and Fig shows a voltage comparator in non inverting mode.
Fig2.14Circuit Diagram of Comparator
2.8.1.Non inverting comparator.
In non inverting comparator the reference voltage is applied to the inverting input and the voltage
to be compared is applied to the non inverting input. Whenever the voltage to be compared (Vin)
goes above the reference voltage , the output of the opamp swings to positive saturation (V+) and
vice versa. Actually what happens is that, the difference between Vin and Vref, (Vin – Vref) will
be a positive value and is amplified to infinity by the opamp. Since there is no feedback resistor Rf,
the opamp is in open loop mode and so the voltage gain (Av) will be close to infinity. So the output
voltage swings to the maximum possible value ie; V+. Remember the equation Av = 1 + (Rf/R1).
When the Vin goes below Vref, the reverse occurs.
2.8.2.Inverting comparator.
In the case of an inverting comparator, the reference voltage is applied to the non inverting input
and voltage to be compared is applied to the inverting input. Whenever the input voltage (Vin) goes
above the Vref, the output of the opamp swings to negative saturation. Here the difference between
two voltages (Vin-Vref) is inverted and amplified to infinity by the opamp. Remember the equation
Av = -Rf/R1. The equation for voltage gain in the inverting mode is Av = -Rf/R1.Since there is no
feedback resistor, the gain will be close to infinity and the output voltage will be as negative as
possible ie; V-.
2.8.3.Practical voltage comparator circuit.
A practical non inverting comparator based on uA741 opamp is shown below. Here the reference
voltage is set using the voltage divider network comprising of R1 and R2. The equation is Vref =
(V+/ (R1 + R2)) x R2. Substituting the values given in the circuit diagram into this equation
gives Vref = 6V. Whenever Vin goes above 6V, the output swings to ~+12V DC and vice versa.
The circuit is powered from a +/- 12V DC dual supply.
Fig2.15 Circuit diagram of Practical voltage comparator.
2.8.4.Op-amp voltage comparator
Figure 2.16 OP-AMP voltage comparator input and out put wave forms(a,b,c)
2.9 SCHMITT TRIGGER:
Below fig shows an inverting comparator with +ve feed back. This ckt converts an irregular shaped
wave forms to a square wave form or pulse.The ckt is known as schitt trigger or squaring
circuit.The i/p voltage being triggers the o/p Vo every time it exceeds certain voltage levels called
the upper threshold voltage Vut and lower threshold voltage Vlt as shown in fig2.17 (b).In
fig2.17(a) these thresold voltages are obtained by using the voltage divider R1,R2,whrere the
voltage across R1 is F/B to +ve i/p.The voltage across R1 is a variable refference,thershold voltage
that dependens on the value and polarity of the out put voltageVo.when Vo=+Vsat,the voltage
across R1 is called the uper thershold voltage,Vut.
The input voltage Vin must be slightly more positive then Vut in order to cause the out put Vo to
switch from +Vsat to –Vsat.as long as Vin less then Vut,Vo is at +Vsat.using the voltage divider
rule,
On the other hand,when Vo=-Vsat, the voltage across R1 is referred to as the lower threshold
voltage,Vlt.Vin must be slightly more negative than Vlt.in order to cause Vo to switch from-Vsat
to +Vsat.in other words,for Vin values greater than Vlt,Vo is at –Vsat.Vlt is given by the following
equation;
Thus if the threshold voltages Vut and Vlt are made large than the input noise voltages, the positive
fed back will eliminate the false output transitions.Also the +ve feedback because of its
regenerative action will make Vo switch faster between +Vsat and –Vsat.
Figure2.17 Monostable Multivibrator and input-out put waveforms(a,b,c,d)
Now if Vt ,a –ve trigger of amplitude Vt is applied to the non-inverting terminal,so that

the effective voltage at this terminal is less than 0.7V than the output of th e op-amp changes it‘s
state from +Vsat to –Vsat.The diode is now reverse biased and the capacitor starts charging
exponentionally to –Vsat through the resistance R.The time constant of this charging is г= RC.
2.11. INTRODUCTION TO VOLTAGE REGULATORS:
An unregulated power supply consists of a transformer (step down), a rectifier and a filter. These
power supplies are not good for some applications where constant voltage is required irrespective of
external disturbances. The main disturbances are:
1. As the load current varies, the output voltage also varies because of its poor regulation.
2. The dc output voltage varies directly with ac input supply. The input voltage may vary over a wide
range thus dc voltage also changes.
3. The dc output voltage varies with the temperature if semiconductor devices are used.
An electronic voltage regulator is essentially a controller used along with unregulated power supply
to stabilize the output dc voltage against three major disturbances
a. Load current (IL)

b. Supply voltage (Vi)
c. Temperature (T)
Fig.2.18, shows the basic block diagram of voltage regulator. where
Vi = unregulated dc voltage.
Vo = regulated dc voltage.
Fig.2.18 Block Diagram of voltage regulator
Since the output dc voltage VLo depends on the input unregulated dc voltage Vi, load current IL and
the temperature t, then the change ΔVo in output voltage of a power supply can be expressed as
follows
VO = VO(Vi, IL, T)
Take partial derivative of VO, we get,
SV gives variation in output voltage only due to unregulated dc voltage. RO gives the output voltage
variation only due to load current. ST gives the variation in output voltage only due to temperature.
The smaller the value of the three coefficients, the better the regulations of power supply. The input
voltage variation is either due to input supply fluctuations or presence of ripples due to inadequate
filtering. A voltage regulator is a device designed to maintain the output voltage of power supply
nearly constant. It can be regarded as a closed loop system because it monitors the output voltage
and generates the control signal to increase or decrease the supply voltage as necessary to
compensate for any change in the output voltage. Thus the purpose of voltage regulator is to
eliminate any output voltage variation that might occur because of changes in load, changes in
supply voltage or changes in temperature.
Zener Voltage Regulator:
The regulated power supply may use zener diode as the voltage controlling device as shown in
fig.2.19. The output voltage is determined by the reverse breakdown voltage of the zener diode. This
is nearly constant for a wide range of currents. The load voltage can be maintained constant by
controlling the current through zener.
Fig.2.19Circuit diagram of Zener voltage regulator
The zener diode regulator has limitations of range. The load current range for which regulation is
maintained, is the difference between maximum allowable zener current and minimum current
required for the zener to operate in breakdown region. For example, if zener diode requires a
minimum current of 10 mA and is limited to a maximum of 1A (to prevent excessive dissipation),
the range is 1 - 0.01 = 0.99A. If the load current variation exceeds 0.99A, regulation may be lost.
Emitter Follower Regulator:
To obtain better voltage regulation in shunt regulator, the zener diode can be connected to the base
circuit of a power transistor as shown in fig.2.20. This amplifies the zener current range. It is also
known as emitter follower regulation.
Fig.2.20Circuit diagram of Emitter follower voltage regulator
This configuration reduces the current flow in the diode. The power transistor used in this
configuration is known as pass transistor. The purpose of CL is to ensure that the variations in one of
the regulated power supply loads will not be fed to other loads. That is, the capacitor effectively
shorts out high-frequency variations.
Because of the current amplifying property of the transistor, the current in the zenor dioide is small.
Hence there is little voltage drop across the diode resistance, and the zener approximates an ideal
constant voltage source.
Operation of the circuit:
The current through resistor R is the sum of zener current IZ and the transistor base current IB( = IL
/ β ).
IL = IZ + IB
The output voltage across RL resistance is given by
VO = VZ - VBE
Where VBE 0.7 V
Therefore, VO= constant.
The emitter current is same as load current. The current IR is assumed to be constant for a given
supply voltage. Therefore, if IL increases, it needs more base currents, to increase base current Iz
decreases. The difference in this regulator with zener regulator is that in later case the zener current
decreases (increase) by same amount by which the load current increases (decreases). Thus the
current range is less, while in the shunt regulators, if IL increases by ΔIL then IB should increase by
ΔIL / β or IZ should decrease by ΔIL / β. Therefore the current range control is more for the same
rating zener.
The simplified circuit of the shunt regulator is shown in fig.2.21
Fig.2.21 Circuit diagram of Zener Shunt regulator
In a power supply the power regulation is basically, because of its high internal impedance. In the
circuit discussed, the unregulated supply has resistance RS of the order of 100 ohm. The use of
emitter follower is to reduce the output resistance and it becomes approximately.
RO = ( Rz + hie ) / (1 + hfe)
Where RZ represents the dynamic zener resistance. The voltage stabilization ratio SV is
approximately
SV = ∂ Vo / ∂ VI = Rz / (Rz + R)
SV can be improved by increasing R. This increases VCE and power dissipated in the transistor.
Other disadvantages of the circuit are.
No provision for varying the output voltage since it is almost equal to the zener voltage. Change in VBEand
Vz due to temperature variations appear at the output since the transistor is connected in series with load, it is
called series regulator and transistor is allow series pass transistor.
Series regulator with Current Pre-regulator
The circuit of fig.2.22 is an improved version of series voltage regulator discussed in previous lecture. Besides
Q1 being replaced with a current regulator circuit. The function of D2, R6, R7, and Q3 is to establish and
maintain a constant I1.
Fig.2.22 Circuit diagram of Series voltage regulator
The circuit works this way :- I1 is the collector current of Q3, and hence it is also approximately equal to IE3. The
voltage at the base of Q3 relative to V1 is held at a constant level by D2; current through R6 is selected to keep D2
in breakdown and to yield the proper temperature coefficient. Should I1 rise, IE3 will also rise, increasing the
voltage across R1. This reduces VEB3, which in turn reduces IE3 and I1. Thus I1 is regulated and remains fairly
constant even if there are changes in the unregulated input.
One disadvantage of this circuit is that a larger input voltage is required to supply the various voltage drops
between Vi and Vo. In this case Vi must supply Vo plus the two VEB drops of Q11 and Q12 (which takes us to
point A), plus the collector-base bias for Q3 (which takes us to the base Q3), plus the Zener voltage for D2.
Power Supply Using IC Regulator (Three-Terminal Regulator)
Monolithic integrated circuits have greatly simplified the design of a wide variety of power supplies. Using a
single IC regulator and a few external components, we can obtain excellent regulation (on the order of 0.01%)
with good stability and reliability and with overload protection.
IC regulators are produced by a number of manufacturers. The IC regulator improves upon the
performance of the Zener diode regulator. It does this by incorporating an operational amplifier. In this section,
we present basic design considerations for IC regulators. These techniques are useful in the design of power
supplies for a variety of low power applications. We consider the internal theory of operation of these and other
three-terminal voltage regulators in the current section. These products vary in the amount of output current.
The most common range of output current is 0.75 A to 1.5 A (depending on whether a heat sink is used).
Fig.2.23 Circuit diagram of Series voltage regulator
The functional block diagram of fig.2.23 illustrates the method of voltage regulation using this series regulator.
The name series regulator is based on the use of a pass transistor (a power transistor) which develops a variable
voltage which is in "series" with the output voltage. The voltage across the pass transistor is varied in such a
manner as to keep the output voltage constant.
A reference voltage, VREF, which is often developed by a Zener diode, is compared with the voltage divided
output, vout. The resulting error voltage is given by
The error voltage v e is amplified through a discrete amplifier or an operational amplifier and used to change the
voltage drop across the pass transistor. This is a feedback system which generates a variable voltage across the pass
transistor in order to force the error voltage to zero. When the error voltage is zero, we obtain the desired equation
by solving equation (Equ-1) for vout .
Thermal shutdown and current-limit circuitry exists between the error amplifier and the pass transistor. This
circuitry protects the regulator in case the temperature becomes too high or an inadvertent short circuit exists at
the output of the regulator.
The maximum power dissipated in this type of series regulator is the power dissipated in the internal
pass transistor, which is approximately (VS max - Vout) IL max. Hence, as the load current
increases, the power dissipated in the internal pass transistor increases. If ILoad exceeds 0.75 A, the
IC package should be secured to a heat sink. When this is done, ILoad can increase to about 1.5 A.
We now focus our attention on the 78XX series of regulators. The last two digits of the IC par
number denote the output voltage of the device. Thus, for example, a 7808 IC package produces a
8V regulated output. These packages, although internally complex, are inexpensive and easy to use.
There are a number of different voltages that can be obtained from the 78XX series 1C; they are 5,
6, 8, 8.5, 10, 12, 15, 18, and 24 V. In order to design a regulator around one of these ICs, we need
only select a transformer, diodes, and filter. The physical configuration is shown in fig.2.24(a). The
ground lead and the metal tab are connected together. This permits direct attachment to a heat sink
for cooling purposes. A typical circuit application is shown in fig.2.24(c).
(a) (b)
(c)
Fig.2.24Three terminal IC voltage regulator(a,b,c)
The specification sheet for this IC indicates that there must be a common ground between the input
and output, and the minimum voltage at the IC input must be above the regulated output. In order to
assure this last condition, it is necessary to filter the output from the rectifier. The CF in fig.2.24(b)
performs this filtering when combined with the input resistance to the IC. We use an n:1 step down
transformer, with the secondary winding center-tapped, to drive a full-wave rectifier.
The minimum and maximum input voltages for the 78XX family of regulators are shown in Table-
2.1.
Type Min Max
7805 7 25
7806 8 25
7808 10.5 25
7885 10.5 25
7810 12.5 28
7812 14.5 30
7815 17.5 30
7818 21 33
7824 27 38
Table -2.1
We use Table -2.1 to select the turns ratio, n, for a 78XX regulator. As a design guide, we will take
the average of Vmax and Vmin of the particular IC regulator to calculate n. For example, using a
7805 regulator, we obtain
The center tap provides division by 2 so the peak voltage out of the rectifier is 115 √2 / 2n = 16.
Therefore, n = 5. This is a conservative method of selecting the transformer ratio. The filter
capacitor, CF, is chosen to maintain the voltage input range to the regulator as specified in Table 2.1.
The output capacitor, CLoad, aids in isolating the effect of the transients that may appear on the
regulated supply line. CLoad should be a high quality tantalum capacitor with a capacitance of 1.0
µF. It should be connected close to the 78XX regulator using short leads in order to improve the
stability performance.This family of regulators can also be used for battery powered systems.
Fig.2.24(c) shows a battery powered application. The value of CF is chosen in the same manner as
for the standard filter. The 79XX series regulator is identical to the 78XX series except that it
provides negative regulated voltages instead of positive.
2.12 FEATURES OF IC 723:
1.Input and out put short circuit protection provided.
2.Positive or negative supply operation

Linear and Digital IC Applications - UNIT-1

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III B.Tech I semester (JNTUH-R13)

ELECTRONICS AND COMMUNICATION ENGINEERING

III Year B.Tech. ECE -I Sem 4-/-/-4

LINEAR AND DIGITAL IC APPLICATIONS

An operational amplifier is a direct-coupled high-gain amplifier usually consisting of one or

The ideal op-amp:

An ideal op-amp would exhibit the following electrical characteristics:

1. Infinite voltage gain

1.3.2 Equivalent circuit of an opamp:

Fig. 1.1 Equivalent circuit of OP-AMP

1.3.3.Ideal Voltage Transfer Curve:

Fig. 1.2 Ideal voltage transfer curve

1.4 INTERNAL CIRCUIT

Fig.1.3 Block Diagram of OP-AMP

1.4.1. Differential amplifier

Fig. 1.4 Differential Amplifier

The differential amplifiers are of different configurations.

The four differential amplifier configurations are following:

1. Dual input, balanced output differential amplifier.

1) Dual Input, Balanced Output Differential Amplifier:

Applying KVL to the base emitter loop of the transistor Q1.

Fig.1.10 Differential Amplifier

and VCE = VC- VE

VCE = VCC + VBE - ICRC (E-2)

Fig.1.11Differential Amplifier A/C Analysis

Applying KVL in two loops 1 & 2.

Substituting current relations,

Solving these two equations, ie1 and ie2 can be calculated.

The output voltage VO is given by

Substituting ie1, & ie2 in the above expression

2) Dual Input, Unbalanced Output Differential Amplifier:

Fig. 1.12Differential Amplifier

The output voltage gain in this case is given by

1.4.2. Level Translator:

Fig1.14 Common collector Amplifier

Fig.1.15 Circuit Diagram of OP-AMP

1.5 OP-AMP CHARACTERISTICS

a)Input offset voltage:

Fig 1.18.Op-Amp with offset voltage compensating network

The op-amp with offset-voltage compensating network is shown in Figure1.18.

Rmax =(R a /2)||(R a /2)

Fig 1.19 Closed loop non inverting or inverting Amp

b) Input offset voltage

c)Input bias current

Fig 1.20 Op-Amp

Need for frequency compensation in practical op-amps:

Frequency compensation methods :

a)Dominant- pole compensation

b)Pole- zero compensation

The symbolic diagram of an OPAMP is shown in fig1.21

Fig.1.21 Op-Amp Symbol

The various important parameters of OPAMP are follows:

1.Input Offset Voltage:

Fig. 1.22input 0ffset voltage

Vio = Vdc1- Vdc2

2.Input offset Current:

Iio = | IB1- IB2 |

3.Input Bias Current:

4. Differential Input Resistance: (Ri)

5. Input Capacitance: (Ci)

6. Offset Voltage Adjustment Range: