950 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO.
7, JULY 2016
A 2.2 μW, −12 dBm RF-Powered Wireless
Current Sensing Readout Interface IC With
Injection-Locking Clock Generation
Fu-To Lin, Student Member, IEEE, Shao-Yung Lu, Student Member, IEEE, and Yu-Te Liao, Member, IEEE
Abstract—This paper presents a wireless-powering curren-
t-sensing readout system on a CMOS platform for portable elec-
trochemical measurement. The wireless sensing system includes
energy-efficient power management circuitry, a sensor readout
interface, and a backscattering wireless communication scheme.
For power-and-area-constrained bio-sensing applications, the
proposed readout circuitry incorporates an ultra-low-power po-
tentiostatic system that generates a current according to the elec-
trochemical reaction, as well as an oscillator-based time-to-digital
converter instead of a voltage-domain analog-to-digital converter.
To avoid a bulky battery and power-hungry clock reference, the
chip is wirelessly powered and injection-locked by the modulated
radio waves, which includes a 918 MHz carrier signal mixed
with a 3.2 MHz modulated signal. The chip, implemented using
a 0.18-μm CMOS process, occupies a silicon area of 1 mm2 . The
proposed design achieves a sensitivity of 289 Hz/nA and an R2
linearity of 0.997 over a current range of 200 nA while consuming
2.2 μW at a supply voltage of 0.8 V. The chip, integrated with
a PCB antenna, has minimum sensitivities of −12 dBm and
−25 dBm for RF-powering and injection-locking mechanisms,
respectively.
Index Terms—Electrochemical sensing, reference-free, temper-
ature stabilization.
I. I NTRODUCTION
E LECTROCHEMICAL analysis has been tailored for use
in many biomedical applications, ranging from disease
diagnostics to forensics. Accurately monitoring metabolic pa-
rameters in bloodstreams, such as pH value [1], glucose [2],
and lactose [3], is essential for disease diagnosis, tracking,
and treatment. Recently, with the increasing needs of patient-
centric healthcare, a portable electrochemical sensor system
with fast and reliable diagnosis has become necessary to elim-
inate the bulky and expensive optical instrumentation required
in fluorescence-based sensing assays. To be widely deployed at
Manuscript received November 14, 2015; revised February 19, 2016;
accepted March 22, 2016. Date of publication June 21, 2016; date of current
version July 22, 2016. This work was supported by the Ministry of Science
and Technology, Taiwan under Grant 100-2218-E-009-030-MY3 and 102-
2221-E-009-193-MY3. Chip fabrication was supported by the National Chip
Implementation Center, Taiwan. This paper was recommended by Associate
Editor A. Mazzanti.
The authors are with the Department of Electrical and Computer Engineer-
ing, National Chiao-Tung University, Hsinchu 300, Taiwan (e-mail: yudoliao@
nctu.edu.tw).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TCSI.2016.2546398
1549-8328 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
a point of care, these devices need to be capable of portable
biomedical analysis at a low cost. With the advent of CMOS
technology, an electrochemical sensor array can be integrated
on a single silicon chip [4] for bio-implants and wearables.
The dense sensing array, small form factor, and reduced long
external connections of these microsystems extend the limit
of detection resolution by improving the signal-to-noise ratio
and reducing environmental interference coupling. The de-
velopment of a CMOS-based electrochemical platform would
enable a new breed of highly valuable biological research and
applications. However, despite the extreme potential of CMOS
electrochemical sensors, portable biomedical analysis is still
limited to the complexity of the associated interfaces and bulky
energy storage components.
Many CMOS potentiostats and electrochemical impedance
spectroscopy circuits have been reported in the literature
[4]–[10]. An active CMOS sensor array [5], which is integrated
with potentiostats, a controlled amplifier, and dual-slope ADCs,
performs biomolecular detection by accessing the current flow
from the biochemical reaction on a gold electrode surface.
The design complexity of using ADCs and precise clock gen-
eration increases the power consumption, which makes the
sustainability of long-term operation using a miniature battery
challenging. In addition, low-power wireless communication
capability is necessary in point-of-care applications. Electro-
chemical sensing of glucose levels in human tears using an
active contact lens was demonstrated at a total power consump-
tion of 3 μW [6]. However, the sensing data were processed in
the analog domain without digitization. Therefore, the design
is susceptible to environmental interference, process variations,
and noise coupling.
In this paper, an RF-powered wireless current-sensing system
without a bulky battery and crystal clock reference is presented.
The paper is organized as follows. Section II describes the
proposed architecture of the wireless current sensing chip. The
circuit design is shown in Section III. Section IV illustrates
the implementation and experimental results of the proposed
wireless current sensor system. Finally, a brief conclusion is
addressed in Section V.
II. A RCHITECTURE OF THE P ROPOSED W IRELESS
C URRENT R EADOUT I NTERFACE
Fig. 1 depicts the system block diagram of the proposed
RF-powered wireless electrochemical readout chip, in which
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC
Fig. 1. System architecture of the proposed wireless current sensing IC.
an RF-power harvester, power management units, a current
readout interface, a data encoder, and a modulator are mono-
lithically integrated. In this design, RF-powering and injection-
locking techniques are used to avoid a bulky battery and crystal
oscillator. The energy and clock reference signals are transmit-
ted as electromagnetic waves from an external interrogator. In
the energy path, the carrier signal (918 MHz) is rectified to a
DC voltage and stored in the on-chip capacitor. To suppress the
supply voltage variations due to RF-power fluctuations, a low
quiescent current output capacitor-less regulator is employed
following the rectifier. A nanowatt CMOS-only bandgap refer-
ence design is proposed, providing an area-efficient, high power
supply rejection (PSR) and temperature-stabilized reference
voltage for the entire system. In the clock path, the modulated
signal (3.2 MHz) passes through an on-chip band-pass filter,
attenuating the carrier signals before locking the ring oscillator
to generate precise clock signals for the chip. Instead of using
the carry frequency as the injection signal [11], this method
can reduce the power dissipation of the front-end amplifier that
is used to improve sensitivity. The injection-locking technique
also offers clock and data synchronization between the sensor
nodes and the reader.
Amperometric detection is widely used in electrochemical
sensors because of its effectiveness and well-established funda-
mentals compared to other methods, such as resistance and ca-
pacitance detection [12]. The current sensing readout circuitry
consists of a potentiostat, a current-to-frequency converter, a
time-to-digital converter, and a data encoder. The potentiostat
provides an accurate voltage to the reference electrode (RE)
using a feedback topology. The voltage defines the potential
electrochemical reaction to expedite and stabilize the chemical
process. Due to the power-and-area constraints, the design
adopts an oscillator-based current-to-digital conversion instead
of voltage-domain ADC. The digitized sensing data are en-
coded with the header bits, and the load of the impedance
matching network is modulated to reflect the incoming RF
signals. The reflection amplitudes of the RF signals represent
the data “0” and “1.” Without an active transmitter, the design
can save power. The details of each circuit block are discussed
as follows.
951
III. C IRCUIT D ESIGN
A. Cross-Coupled Rectifier
A differential cross-coupled full-wave rectifier is adopted
in this work [13]. The rectifier converts RF power to DC
voltage stored in the on-chip capacitors. Compared to the
diode-connected rectifier, the MOS transistors act as switches,
resulting in smaller turn-on resistance and lower conduction
loss. An eight-stage rectifier is used to increase the output
voltage and improve RF-to-DC conversion sensitivity.
B. CMOS-Only Low-Power Bandgap Reference
A high-precision, low-power voltage reference with low
sensitivity to the power supply, temperature, and process is
critical for a precise amplifier and signal processing analog
front ends. Compared to a conventional BJT-based bandgap
reference, the CMOS-only implementation [14], [15] provides
a more area-efficient, lower-cost, and lower-voltage solution
for on-chip voltage reference generation. To lower the power
consumption, MOS transistors, operating in the subthreshold
region, offer a BJT-like current characteristic and negative
temperature coefficients at a low supply voltage. In addition, to
further reduce the silicon area, a CMOS-only bandgap design
[16], [17] is created without passive components. However,
subthreshold transistors usually suffer from serious process
variations, thereby limiting the potential for large volumes of
production. To address process variations, a new low-voltage
CMOS-only bandgap reference is proposed. Fig. 2 shows the
schematic of the proposed bandgap reference. To overcome the
process variations, temperature-dependent voltages are gener-
ated by the relative ratio between two transistors instead of
using the absolute value of a single transistor. The current of
the subthreshold transistor can be expressed as follows:
W VGSnV−Vth
I = μCox nVt2 e t (1)
L
where μ is the mobility of the carriers in the channel, Cox is the
oxide capacitance per unit area, Vth is the threshold voltage,
952 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO. 7, JULY 2016
Fig. 2. Schematic of the proposed CMOS-only bandgap.
Fig. 3. Simulated temperature-dependent voltage of stacked thin and thick
transistors and their sum results.
Vt is the thermal voltage, VGS is the gate-source voltage of
the transistor, and W and L are the gate width and length,
respectively. The gate-source voltage difference between two
transistors operating in the subthreshold at the same bias current
can be derived from (1)
Vxy (T ) = VGSx (T ) − VGSy (T )
 
nkT (μCox )y Wy Lx
= ln + ΔVth
q (μCox )x Wx Ly
where the temperature-dependent threshold voltage is
Vth = Vth0 − α · T (α > 0)
and the subtraction of the threshold voltages between two
transistors can be represented by
ΔVth = ΔVth0 − (αx − αy ) · T.
In (2), the first term is a proportional to absolute temperature
(PTAT) voltage, and the second term is a complementary to
absolute temperature (CTAT) voltage. First, assuming two tran-
sistors with the same length and gate thickness, the threshold
voltage is equal. Therefore, the gate-source voltage difference
creates a PTAT voltage reference. While using two different
transistor gate thicknesses, VGSx − VGSy becomes a CTAT
voltage reference since ΔVth becomes dominant. Fig. 3 shows
the simulated temperature-caused voltage deviations between
thin and thick gate oxide transistors at the same bias current.
In this design, to ensure the same bias current, the transistors
are stacked to generate the temperature-dependent voltage.
Moreover, thin-thickness transistors, M5 and M6 , are used for
the PTAT voltage reference; a thin-thickness transistor (M2 )
and a thick-thickness transistor (M1 ) create a CTAT voltage
Fig. 4. VGS variations of thin and thick gate oxide and the difference between
them at five process corners.
Fig. 5. Output voltage versus temperature over five process corners.
(2) Fig. 6. Distribution of the output voltage from a Monte Carlo simulation of
200 runs.
reference. By summing the two voltages, the temperature-
(3) independent voltage can be attained as follows:
   
nkT W5 L6 nkT (μCox )2 W2 L1
VREF = ln + ln +ΔVth .
q W6 L5 q (μCox )1 W1 L2
(5)
(4)
From (5), since the temperature-dependent coefficient of the
bandgap reference is related to the difference between two
transistors, the mobility and size deviations can be cancelled.
Fig. 4 shows the simulation results of the VGS variations of a
single transistor and after subtraction over corners. The voltage
deviations of a single transistor can be larger than ±10%;
when the voltage difference is used, the voltage deviations
are reduced to ±3.5%. The simulation results of the output
voltage versus over five typical process corners of the proposed
voltage reference circuit from −30 ◦ C to 130 ◦ C are shown in
Fig. 5. In addition, from (5), VREF does not depend on the
supply voltage (Vdd), and thus this architecture can achieve
high power-supply rejection. Fig. 6 shows the Monte Carlo
simulation results. Among 200 runs, the standard deviation of
the voltage deviations from the average voltage (310 mV) is
about 4.8%.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC
Fig. 7. Schematic of (a) a potentiostat and (b) a current-to-frequency oscillator.
C. Potentiostat
A conventional electrochemical sensor converts the product
of biochemical reactions to an electrical current, which can
be analyzed using electronic signal conditioning and process-
ing devices. Generally, an electrochemical sensor consists of
three electrodes: a working electrode (WE) for an oxidation
or reduction process, a reference electrode (RE) for providing
reference potentials, and a counter electrode (CE) for electrical
current collection. The electrodes require a potentiostat inter-
face, which is used to sense the current from the sensor and to
provide a stable potential difference between the RE and WE by
injecting the proper current into the counter electrode according
to the biochemical reaction for charge balance.
A transimpedance amplifier is one of the common current
readout circuit topologies [18]. However, transimpedance am-
plifiers use a large amount of power and large silicon areas due
to the use of two operational amplifiers and resistors, which
always occupy a large area, especially in a low-power design.
To achieve area-and-power efficiency, a current-mirror-based
topology [19] is employed in this design.
Fig. 7(a) shows the schematic of the current-mirror-based
potentiostat. A voltage feedback loop is employed to force and
stabilize the voltage difference across the WE and RE. The
reaction current through the CE is collected by a pass transistor
(Mp1 ), and then mirrored to a demodulator for digitization and
decoding. The current mirror herein provides isolation between
the sensor electrodes and the demodulator, thereby reducing
the coupling effects. The reference voltage (0.4 V) is divided
from the regulated supply voltage using pseudo-resistors [20],
which are built with reversely-biased transistors to save power
and area.
D. Current-to-Frequency Converter
Instead of converting the current to voltage for digitization,
this design adopts a frequency/time domain digitization ar-
chitecture for lower power consumption and a smaller area.
For counter-based time-to-digital converter (TDC), according
to [21], the frequency noise can be expressed as
∞
Δωn.,rms = Sφ (ω) · (jω)2 |HLPF (ω)|2 dω
2
(6)
0
where SΦ(ω) is the SSB phase noise of the oscillator and
HLPF (ω) is the transfer function due to the averaging function
953
of the counter. Since the frequency counter filters out high-
frequency noise, the noise is mainly contributed by the low-
frequency fluctuation and clock noise.
Fig. 7(b) shows the schematic of the proposed charge-based
oscillator. An offset cancellation technique [22] is applied by
switching the inputs of the comparator in each half period
to eliminate the period fluctuation. In the first half cycle, the
positive input of the comparator is connected to the reference
voltage, and the other side is connected to the capacitor (C1 ),
which is charged by the sensing current from the output of the
potentiostat until the voltage reaches VREF . In the next half
cycle, this capacitor (C1 ) is discharged to ground, and the other
capacitor (C2 ) begins to be charged until its voltage reaches
VREF . The offset voltage of the comparator is presented in each
half cycle, thereby leading to a constant period. The half period
(Tφ=1 , Tφ=0 ) can be calculated as follows:
CVREF CVOS
Tφ=1 = + +tdelay (7)
IPTAT + ISense IPTAT + ISense
CVREF CVOS
Tφ=0 = − +tdelay (8)
IPTAT + ISense IPTAT + ISense
where C is the capacitance of C1 and C2 , IPTAT is the biased
current, ISense is the sensing current from the potentiostat,
VREF is the reference voltage, VOS is the offset voltage of the
comparator, and tdelay is the delay time of the Schmitt trigger
and inverters. The Schmitt trigger is used to improve the noise
tolerance of the oscillator. By taking the sum of (7) and (8), the
period of the oscillator can be derived
 
CVREF
T=2 + tdelay (9)
IPTAT + ISense
where T is the period generated by the oscillator. From (9), the
offset voltage of the comparator has no effect on the period,
resulting in stable frequency outputs. Moreover, the frequency
stability is mainly dominated by the stability of VREF . To
improve the stability, the reference voltage (VREF ) is created
by the voltage division from the stable regulator output, which
follows the on-chip bandgap voltage reference. The voltage di-
vider is implemented using reversely-biased transistors to save
area. The PTAT current is used to compensate for the frequency
drifts due to temperature variations. For further cancellation of
low-frequency drifts, the measurement is switched between the
954 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO. 7, JULY 2016
reference current and sensing current. The recorded frequencies
of each measurement are
IPTAT
fREF = (10)
2CVREF
IPTAT + ISense
fSense = (11)
2CVREF
where fREF and fSense are the frequency of the reference
mode and sensing mode, respectively. By reading frequency
differences between two measurements, the effects of process
variation and low-frequency temperature-caused drifts are
eliminated.
E. Injection-Locking and Clock Generation
A precise clock is essential for high-resolution frequency-to-
digital conversion [23]. Crystal oscillators have been optimized
for low-power, high-performance clock generation in many
applications, such as wireless and wired communication, high-
precision analog-to-digital convertors, and digital processors.
However, their bulky size makes it difficult to integrate them
into size-constrained sensor nodes. To address the size issue,
on-chip clock generation using a microelectromechanical sys-
tems (MEMS) resonator [24] and complicated compensation
schemes for process and temperature variations have been
explored to achieve the required performance in many applica-
tions. However, the power consumption of these architectures is
higher than hundreds of microwatts. Power-efficient injection-
locking techniques have been used to generate RF carriers in
wireless sensor applications [25]–[27]. Injection-locking clock
generation provides low jitter performance and low frequency
drifts since the clock tracks the external RF reference. The
injection locking range can be expressed by
ω0 Iinj
ωL ≈ · (12)
2Q IOSC
where ωL is defined as a half of the locking range, ωo is the
free-running frequency of the oscillator, Q is the quality factor
of the oscillator, IOSC is the current of the ring oscillator, and
Iinj is the current of the injection signal. The injection signal
should be large enough to extend the locking range over process
variations. However, the high operational frequency causes high
power dissipation in the amplifier stage and the oscillator. To
save power and area, the design adopts an on-chip injection-
locked ring oscillator for 3.2 MHz clock signal generation
instead of GHz signals.
Fig. 8 shows the schematic of the injection-locking ring
oscillator. A resistor-feedback preamplifier offers high gain and
bandpass filtering, where the high-pass frequency corner is
defined by the bypass capacitor and input resistance, and the
low-pass frequency corner is defined by the output resistance
and capacitance. Therefore, the out-of-band interference can be
rejected in the first order. From the simulation, the rejection of
918 MHz carrier signals is about 41 dB. In the future, a multi-
order filter design can be implemented for better interference
rejection. The amplified signal is injected into the high imped-
ance node of the three-stage current-starved inverter chain to
lock the oscillator. The bias current comes from a constant-gm
bias circuit with PTAT temperature coefficients to reduce the
Fig. 8. Schematic of the injection-locking oscillator.
effects of temperature and supply variations. To decrease the
contribution of 1/f noise in the ring oscillator design, a symmet-
ric current starving oscillator is adopted. All of the transistors
are operated in the deep subthreshold region, where the 1/f
noise is much lower than in the strong inversion region [28],
[29]. The voltage supply is regulated (0.8 V) to suppress
noise coupling; in addition, the high output swings (0.6 V) are
required to lower the 1/f noise contribution [30] by reducing
voltage drops across the current sources. Furthermore, the clock
frequency is divided by D-flip-flop-(DFF)-based dividers for
the required clock signals, sensor readout circuits, frequency-
to-digital converter, and data modulator.
F. Counter-Based Demodulator and Data Modulator
In this design, the sensing signals are digitized through a
counter-based time-to-digital converter (TDC). Fig. 9(a) shows
the block diagram of the proposed TDC and data modulator.
The edge of the sensing output signals is counted by a 12-bit
counter until the most significant bit (MSB) of the reference
9-bit counter, which counts the edge of the injection-locked
signal, changes from “0” to “1.” The frequency range of the
TDC is derived as
1 2sen_bits
fREF · < f < fREF · (13)
2ref_bits 2ref_bits
where fREF is the frequency of injection-locked oscillator,
and ref_bits and sen_bits are the bit numbers of the reference
counter and sensing counter, respectively. In this design, the
reference clock is 50 kHz, giving a frequency resolution of
97 Hz/bit. Finally, the value of the 12-bit counter is stored in
auxiliary registers for data modulation and transmission.
In this design, an NMOS transistor is employed as a load
modulator that changes the impedance matching between the
antenna and the rectifier. For data “1,” a large reflection signal
is observed in the reader, thereby leading to small incident
RF power to the chip. Thus, to avoid large voltage drops in
the small on-chip storage capacitor, which may inactivate the
function of the chip, two dummy bits “0s” are inserted between
two data bits, and the header bits are transmitted before data
communication starts.
The counter-based conversion provides a low-pass fil-
tering function to remove high-frequency noise. However,
environment-caused frequency inaccuracy still affects the sens-
ing oscillator. Therefore, sensing mode and reference mode data
are transmitted intermittently for calibration in the reader.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC
Fig. 9. (a) Block diagram and (b) flowchart of the time-to-digital converter.
Fig. 10. Simulated power breakdown of each functional block.
The power breakdown of the proposed system is shown in
Fig. 10. The greatest amount of power is consumed by the
regulator to provide a sufficient bandwidth and load current
range to the system.
G. PCB Antenna Design
The reactance at the input of a rectifier is usually capacitive,
thereby requiring an inductive impedance to achieve conjugate
955
Fig. 11. Profile of the split-ring loop antenna.
matching for maximum power transfer. A loop antenna is an
applicable antenna type with inductive impedance, and it is
widely used in RFID antenna design to provide a wide range of
impedances in a small area. In this paper, a split-ring-type loop
antenna is adopted for area-and-radiation-efficient design [31].
In addition, the split-ring antenna area can be further reduced
by using inductive coupling between multiple rings. In this
design, a three split-ring loop antenna is used and a silicon chip
and electrode are directly attached to the backside of the PCB
to reduce the magnetic coupling between the antenna and the
electrodes. Fig. 11 shows the schematic and design parameters
of the split-ring loop antenna. The outer loop is a curved dipole
antenna, which is designed to operate at the half wavelength (λ)
of the circumference with a related radius (a) close to λ/12.
The design also needs to meet the criteria of an electrically
small antenna
2π
a ≤ 0.5. (14)
λ
A 3.7-cm radius of the outer ring is used in the design to offer
a resonant frequency of 918 MHz. In addition to the radius of
the outer ring, the other parameters are used to define the real
and imaginary impedance of the antenna. Fig. 12 shows the
simulated |S11| and radiation pattern at 918 MHz. The design
achieves an |S11| of −16 dB and a radiation efficiency of 75%.
The radiated signals are transmitted vertically from the plane
of the antenna. The bandwidth, where the reflection is less than
−6 dB, is around 30 MHz.
IV. E XPERIMENTAL R ESULTS
Fig. 13 shows the chip micrograph of the proposed wireless
electrochemical readout IC. The proposed system is fabricated
in a 0.18 μm CMOS process and occupies an area of 1 mm2 .
The chip is first assembled on a PCB to characterize its func-
tionality and performance.
A. Bias Circuitry and Power Management
Fig. 14 shows the measured output voltage of the differential
crossed-coupled rectifier and the regulator. In this design, a
956 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO. 7, JULY 2016
Fig. 12. Simulation results of (a) |S11| and (b) the radiation pattern at
918 MHz.
Fig. 13. Chip micrograph of the proposed readout IC.
Fig. 14. Measured output voltage of the rectifier and regulator.
918 MHz ISM band is used for wireless data communication.
The minimum RF power to operate the system is −12 dBm,
regulating the supply voltage to 0.8 V. Using a 1 W equiv-
alent isotropically radiated power (EIRP) from a reader, the
Fig. 15. Measured output voltage versus temperatures.
Fig. 16. Measured power supply rejection of the bandgap reference.
Fig. 17. Distribution of the output voltage of 26 samples.
Fig. 18. Measured Allan deviations of the free-running and injection-locked
oscillators at 100 kHz.
communication distance is about 3 m. Fig. 15 shows the
measured output voltage of the proposed bandgap reference at
a temperature range of 0–100 ◦ C. The measured temperature
coefficient is 30 ppm/◦ C from an average output of 0.3 V at a
1 V supply. The measured power rejection is shown in Fig. 16.
The design achieves a PSR of −56 dB at low frequency while
only consuming 160 nW. The standard deviation of the output
voltage is 6.5 mV among 26 samples fabricated in the same
wafer. The result is illustrated in Fig. 17.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC
Fig. 19. Measured results of (a) output frequency versus the supply voltage
and (b) output frequency versus temperatures of the current readout circuit.
Fig. 20. Measured Allan deviation of the sensing oscillator at a central fre-
quency of 2 kHz.
Fig. 21. Measured result of the readout circuitry within the current range from
0 to 200 nA.
B. Clock Generation
The on-chip ring oscillator is locked by a 3.2 MHz modulated
signal on a 918 MHz carrier frequency. The 100 kHz clock
signal of the time-to-digital converter is generated by dividing
down the locked signal. The minimum RF power for injection
locking is −25 dBm. Therefore, the sensitivity of the proposed
system is limited by the power path. The measured Allan
deviations of the injection-locked and free-running signals at
100 kHz are shown in Fig. 18. The measured Allan deviations
957
Fig. 22. Measured response of continuous current flow.
Fig. 23. Assembled PCB of antenna and the wireless current readout IC (front
and back sides).
Fig. 24. Measured output digital codes of the modulator.
of the frequency of the injection-locked oscillator and free-
running oscillator are 8 μHz and 0.7 Hz, respectively, at a
one-second integral window. Compared to the free-running
signal, the locked signal, following the injected signal from
external reader, reduces the in-band frequency inaccuracy. The
precise clock can improve the resolution of the time-to-digital
converter.
C. Current Readout
The current readout circuitry converts the sensing current
to a frequency change by the charge-based oscillator. The
supply voltage of the sensing oscillator is regulated by on-chip
linear regulator, suppressing the voltage fluctuation from the RF
power. Fig. 19(a) shows the measured output frequency changes
due to supply variations. The sensing oscillator is operated at
1.95 kHz and only varies by 40 Hz over a supply voltage range
958 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO. 7, JULY 2016
TABLE I
P ERFORMANCE C OMPARISON
from 1 V to 2.6 V, giving a supply sensitivity of 0.96%/V.
Fig. 19(b) shows the measured frequency drifts of the sensing
oscillator from temperature changes. The frequency drifts over
the range of 0–100 ◦ C are about 100 Hz. Fig. 20 shows
the measured Allan deviations of the sensing oscillator. The
minimum residual frequency noise is about 0.9 Hz at a one-
second integral time window.
To mimic the current changes of the electrochemical sensor,
the widely-used resistor model from [19] is adopted. The cur-
rent injected to the readout circuits is changed by adjusting the
resistor (WE) and the voltage across WE is fixed at 0.4 V by
the potentiostat. Fig. 21 shows the measured output frequency
of the charge-based oscillator versus the injected current. The
measured R2 linearity is 0.9975, and the conversion gain is
0.289 kHz/nA in the current range of 200 nA. In this design,
the minimum detectable current is 3 pA (0.9 Hz/289 Hz/nA).
Fig. 22 shows the results of continuous current flow measure-
ment. The current flow is injected to the readout circuitry with
increments of 10 nA. Finally, the converted current is digitized
by the frequency counter and encoded with the header to drive
the load modulator.
D. System
Fig. 23 shows the photos of the assembled PCB of the
antenna and the wireless current readout chip. The chip is
placed on the one side of the PCB and the antenna is fabricated
on the other side to avoid the strong coupling between the
two. Fig. 24 depicts the measured output digital codes from the
modulator when an injection current of 100 nA is applied. In a
half period of 10.9 ms, the output frequency of the free-running
oscillator is transmitted, and then in the next half cycle, the
sensing data are transmitted for data extraction and calibration.
Table I shows the performance summary and the comparisons
with state-of-the-art RF-powered wireless current readout cir-
cuitry. Compared to other works, this design achieves low
power consumption and high-precision current sensing without
a bulky crystal oscillator and battery.
V. C ONCLUSION
This paper presents an RF-powered, wireless current sensing
readout IC with an injection locking clock generation. The
carrier signal of 918 MHz radio waves is rectified for DC power
generation and the periodical 3.2 MHz modulation signal is
extracted for an injection-locked clock reference. Temperature-
stable CMOS-only bias circuitry and compensation schemes
are used to reduce the low-frequency drifts caused by envi-
ronmental variations. A 160-nW on-chip CMOS-only bandgap
reference provides a stable output voltage of 0.3 V with a
temperature coefficient of 30 ppm/◦ C over a temperature range
of 0–100 ◦ C and a PSR of −56 dB while the standard deviation
is 6.5 mV over 26 sample measurements. The design achieves
a current-to-frequency conversion gain of 0.289 kHz/nA and
an R2 linearity of 0.9975 while only consuming 2.2 μW.
The chip can be wirelessly powered by −12 dBm incident
RF power and only occupies 1 mm2 silicon area without any
bulky crystal reference or battery. The design offers a power-
and-area-constrained solution for wearable and implantable
electrochemical sensing applications.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC
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Fu-To Lin (S’14) received B.S. degree in the De-
partment of Electrical Engineering from the Na-
tional Chung-Cheng University, Taiwan, in 2014.
Currently, he is working toward the M.S. degree in
the Institute of Biomedical Engineering of National
Chiao Tung University, Taiwan.
His research interests include low-power circuits
for biomedical devices.
Shao-Yung Lu (S’14) received the B.S degree in
electrical engineering from National Chiao-Tung
University, Hsinchu, Taiwan, in 2015. He is currently
working toward the M.S. degree in the Department
of Electrical and Computer Engineering, National
Chiao-Tung University.
His current research focuses on low-power tech-
niques for biomedical circuits and systems.
Yu-Te Liao (S’03–M’11) received the B.S. degree
in electrical engineering from National Cheng-Kung
University, Tainan, Taiwan, in 2003, the M.S. degree
in Electronics Engineering from National Taiwan
University, Taipei, in 2005, and the Ph.D. degree in
electrical engineering from the University of Wash-
ington, Seattle, WA, USA, in 2011.
In August 2011, he joined the Electrical Engineer-
ing Department, National Chung Cheng University,
Chiayi, Taiwan, as an Assistant Professor. Currently,
he is an Assistant Professor at the Department of
Electrical and Computer Engineering, National Chiao-Tung University. His
research interests are the design of low power RF integrated circuits, integrated
sensors, and biomedical circuits and systems.