Power-on self-test

Power-on self-test (POST) is the common term for a computer, router or printer's pre-boot sequence.
The same basic sequence is present on all computer architectures. It is the first step of the more general
process called initial program load (IPL), booting, or bootstrapping. The term POST has become
popular in association with and as a result of the proliferation of the PC. It can be used as a noun when
referring to thecode that controls the pre-boot phase or when referring to the phase itself. It can also be
used as a verb when referring to the code or the system as it progresses through the pre-boot phase.
Alternatively, this may be called "POSTing."
For embedded systems power-on self-test (POST) refers to the testing sequence that occurs when a
system is first powered on. POST is software written to initialize and configure a processor and then
execute a defined series of tests to determine if the computer hardware is working properly. Any errors
found during the self-test are stored or reported through auditory or visual means, for example through
a series of beeps, flashing LEDs or text displayed on a display. Once the POST sequence completes,
execution is handed over to the normal boot sequence which typically runs a boot loader or operating
system. POST for embedded systems has been around since the earliest days of computer systems.

Contents
• 1 General internal workings
• 2 Fundamental structure
• 3 Error reporting
o 3.1 Original IBM POST beep codes
o 3.2 POST AMI BIOS beep codes
o 3.3 POST beep codes on CompTIA A+ Hardware Core exam
o 3.4 IBM POST diagnostic code descriptions
• 4 Macintosh POST
o 4.1 Old World Macs (until 1998)
o 4.2 New World Macs (1998-1999)
o 4.3 New World Macs (1999 onward) and Intel-based Macs
• 5 Amiga POST
o 5.1 POST Sequence of Amiga
o 5.2 Sequence for all main Amiga models
o 5.3 Amiga Color Screens Scheme
o 5.4 Sequence for A4000
§ 5.4.1 Correct Tests Color Sequence Scheme
§ 5.4.2 Failed Tests Color Scheme
o 5.5 Amiga Keyboard LED error signals
General internal workings
On power up, the main duties of POST are handled by the BIOS, which may hand some of these duties
to other programs designed to initialize very specific peripheral devices, notably for video
and SCSI initialization. These other duty-specific programs are generally known collectively asoption
ROMs or individually as the video BIOS, SCSI BIOS, etc.
The principal duties of the main BIOS during POST are as follows:
§ verify the integrity of the BIOS code itself
§ find, size, and verify system main memory
§ discover, initialize, and catalog all system buses and devices
§ pass control to other specialized BIOSes (if and when required)
§ provide a user interface for system's configuration
§ identify, organize, and select which devices are available for booting
§ construct whatever system environment that is required by the target OS
The BIOS will begin its POST duties when the CPU is reset. The first memory location the CPU tries
to execute is known as the reset vector. In the case of a hard reboot, the northbridge will direct this
code fetch (request) to the BIOS located on the system flash memory. For a warm boot, the BIOS will
be located in the proper place in RAM and the northbridge will direct the reset vector call to the RAM.
During the POST flow of a contemporary BIOS, one of the first things a BIOS should do is determine
the reason it is executing. For a cold boot, for example, it may need to execute all of its functionality.
If, however, the system supports power savings or quick boot methods, the BIOS may be able to
circumvent the standard POST device discovery, and simply program the devices from a preloaded
system device table.
The POST flow for the PC has developed from a very simple, straightforward process to one that is
complex and convoluted. During POST, the BIOS must integrate a plethora of competing, evolving,
and even mutually exclusive standards and initiatives for the matrix of hardware and OSes the PC is
expected to support. However, the average user still knows the POST and BIOS only through its simple
visible memory tests and setup screen.

Fundamental structure
In the case of the IBM PC compatible machines, the main BIOS is divided into two basic sections. The
POST section, or POST code, is responsible for the tasks mentioned above, and the environment POST
constructs for the OS is known as the runtime code, the runtime BIOS, or the runtime footprint.
Primarily these two divisions can be distinguished in that POST code should be flushed from memory
before control is passed to the target OS while the runtime code remains resident in memory. This
division may be a misleading oversimplification, however, as many Runtime functions are executed
while the system is POSTing.

Error reporting

The original IBM BIOS reported errors detected during POST by outputting a number to a fixed I/O
port address, 80. Using a logic analyzer or a dedicated POST card, an interface card that shows port 80
output on a small display, a technician could determine the origin of the problem. (Note that once an
operating system is running on the computer, the code displayed by such a board is often meaningless,
since some OSes, e.g. Linux, use port 80 for I/O timing operations.) In later years, BIOS vendors used
a sequence of beeps from the motherboard-attached loudspeaker to signal error codes. Some vendors
have developed proprietary variants or enhancements, such as MSI's D-Bracket.

Original IBM POST beep codes

§ 1 short beep - Normal POST - system is OK
§ 2 short beeps - POST error - error code shown on screen
§ No beep - Power supply, system board problem, disconnected cpu, or disconnected
speaker,
§ Continuous beep - Power supply, system board, or keyboard problem
§ Repeating short beeps - Power supply or system board problem or keyboard
§ 1 long, 1 short beep - System board problem
§ 1 long, 2 short beeps - Display adapter problem (MDA, CGA)
§ 1 long, 3 short beeps - Enhanced Graphics Adapter (EGA)
§ 3 long beeps - 3270 keyboard card

POST AMI BIOS beep codes

§ 1 - Memory refresh timer error
§ 2 - Parity error in base memory (first 64 KiB block)
§ 3 - Base memory read/write test error
§ 4 - Mother board timer not operational
§ 5 - Processor failure
§ 6 - 8042 Gate A20 test error (cannot switch to protected mode)
§ 7 - General exception error (processor exception interrupt error)
§ 8 - Display memory error (system video adapter)
§ 9 - AMI BIOS ROM checksum error
§ 10 - CMOS shutdown register read/write error
§ 11 - Cache memory test failed
Reference: AMIBIOS8 Check Point and Beep Code List, version 2.0, last updated 10 June 2008

POST beep codes on CompTIA A+ Hardware Core exam

These POST beep codes are covered specifically on the CompTIA A+ Core Hardware Exam:

Beeps Meaning
Steady, short
Power supply may be bad
beeps

Long
continuous Memory failure
beep tone

Steady, long
Power supply bad
beeps

No beep Power supply bad, system not plugged in, or power not turned on

If everything seems to be functioning correctly there may be a problem

No beep
with the 'beeper' itself. The system will normally beep one short beep.

One long, two

Video card failure
short beeps

POST diagnostic code descriptions

§ 100 to 199 - System boards
§ 200 to 299 - Memory
§ 300 to 399 - Keyboard
§ 400 to 499 - Monochrome display
§ 500 to 599 - Color/graphics display
§ 600 to 699 - Floppy-disk drive or adapter
§ 700 to 799 - Math coprocessor
§ 900 to 999 - Parallel printer port
§ 1000 to 1099 - Alternate printer adapter
§ 1100 to 1299 - Asynchronous communication device, adapter, or port
§ 1300 to 1399 - Game port
§ 1400 to 1499 - Color/graphics printer
§ 1500 to 1599 - Synchronous communication device, adapter, or port
§ 1700 to 1799 - Hard drive and/or adapter
§ 1800 to 1899 - Expansion unit (XT)
§ 2000 to 2199 - Bisynchronous communication adapter
§ 2400 to 2599 - EGA system-board video (MCA)
§ 3000 to 3199 - LAN adapter
§ 4800 to 4999 - Internal modem
§ 7000 to 7099 - Phoenix BIOS chips
 § 7300 to 7399 - 3.5-inch disk drive
§ 8900 to 8999 - MIDI adapter
§ 11200 to 11299 - SCSI adapter
§ 21000 to 21099 - SCSI fixed disk and controller
§ 21500 to 21599 - SCSI CD-ROM system

Macintosh POST
Apple's Macintosh computers also perform a POST after a cold boot. In the event of a fatal error, the
Mac will not make its startup chime.
Old World Macs (until 1998)
Macs made after to 1987 but prior to 1998, upon failing the POST, will immediately halt with a "death
chime," which is a sound that varies by model; it can be a beep, a car crash sound, the sound of
shattering glass, a short musical tone, or more. On the screen will be the Sad Macicon, along with two
hexadecimal strings, which can be used to identify the problem. Macs made prior to 1987 crashed with
the hexadecimal string and a sad mac icon silently.
New World Macs (1998-1999)
When Apple introduced the iMac in 1998, it was a radical departure from other Macs of the time. The
iMac began the production of New World Macs, as they are called; New World Macs, such as
the iMac, Power Macintosh G3 (Blue & White), Power Mac G4 (PCI Graphics),PowerBook G3
(bronze keyboard), and PowerBook G3 (FireWire), load the Mac OS ROM from the hard drive. In the
event of a fatal error, they give these beeps:[1]
§ 1 beep = No RAM installed/detected
§ 2 beeps = Incompatible RAM type installed (for example, EDO)
§ 3 beeps = No RAM banks passed memory testing
§ 4 beeps = Bad checksum for the remainder of the boot ROM
§ 5 beeps = Bad checksum for the ROM boot block
New World Macs (1999 onward) and Intel-based Macs
The beep codes were revised in October 1999,[2] and have been the same since. In addition, on some
models, the power LED would flash in cadence.
§ 1 beep = no RAM installed
§ 2 beeps = incompatible RAM types
§ 3 beeps = no good banks
§ 4 beeps = no good boot images in the boot ROM (and/or bad sys config block)
§ 5 beeps = processor is not usable
Amiga POST
Amiga historical line of computers, from A1000 to 4000 present an interesting POST sequence that
prompts the user with a sequence of flashing screens of different colors (rather than audibile beeps as in
other systems) to show if various hardware POST tests were correct or else if they failed:
POST Sequence of Amiga
The Amiga system performs the following tests at boot:
§ Step 1 - Delays beginning the tests a fraction of a second to allow the hardware to
stabilize.
§ Step 2 - Jumps to ROM code in diagnostic card (if found)
§ Step 3 - Disables and clears all DMA and interrupts.
§ Step 4 - Turns on the screen.
§ Step 5 - Checks the general hardware configuration.
If the screen remains a light gray colors and the tests continue, the hardware is OK. If an error occurs,
the system halts.
§ Step 6 - Performs checksum test on ROMs.
If the system fails the ROM test, the screen display turns red and the system halts.
Sequence for all main Amiga models
Almost all Amiga models present the same color sequence when turned on:
Black screen, dark gray, light gray color screens filling all monitor screen in a rapid sequence (Amigas
taken up usually 2, or at least max 3 seconds to turn on and boot).
Amiga Color Screens Scheme
§ Red = Bad ROM
§ Yellow = CPU Exception Before Bootstrap Code is Loaded
§ Green = Bad Chip RAM or fail of Agnus Chip (check seating of Agnus
§ Black = No CPU
§ White = Expansion passed test successfully
§ Grey = CPU Passed
§ Constant White = Failure of CPU
Sequence for A4000
Correct Tests Color Sequence Scheme
A4000 presents just a light gray screen during its boot time (it just occurs in 2 or max 3 seconds)
§ Light Gray
§ = Initial hardware configuration tests passed
§ = Initial system software tests passed)
§ = Final initialization test passed
Failed Tests Color Scheme
§ Red = ROM Error - Reset or replace
§ Green = CHIP RAM error (reset AGNUS and re-test)
§ Blue = Custom Chip(s) Error
§ Yellow = 68000 detected error before software trapped it (GURU)
Amiga Keyboard LED error signals
The keyboards of historical Amiga models are not proprietary as it happened in early computer ages,
but more pragmadically it was based on international standard ANSI/ISO 8859-1. The keyboard itself
was an intelligent device and had its own processor and 4 kilobytes of RAM for keeping a buffer of the
sequence of keys that were being pressed, thus can communicate with the user if a fault is found by
flashing its mainLED in sequence:
§ One Blink = ROM Checksum failure
§ Two Blinks = RAM test failed
§ Three Blinks = Watchdog timer failed
§ Four Blinks = A shortcut exists between two row lines or one of the seven special keys
(not implemented)