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Learning Outcome
(4) Able to:
• Analyze and design a basic two-transistor
MOSFET
MOSFET current-source circuit with additional
MOSFET devices in the reference portion of
the circuit to obtain a given bias current.
4.0) FET Integrated Circuit Biasing 4.1) Basic Two-Transistor MOSFET Current Source
• Field-effect transistor (FET) ICs are biased with 4.1.0) The Circuit
current sources in the same way as bipolar
circuits.
Problem-Solving Technique
• Analyze the reference side of the circuit to determine
gate-to-source voltages. Using these gate-to-source
voltages, determine the bias current in terms of the
Figure 10.2: Basic
reference current.
two-transistor BJT
• To find the output resistance, place a test voltage at the
current source.
output node and analyze the small-signal equivalent circuit.
Keep in mind that the reference current is constant, which Fig 10.16: Basic two-
may make some of the gate voltages constant or at ac transistor N-MOSFET
ground.
current source
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
• If M1 and M2 are identical transistors, then • The relationship between IO and IREF changes
if the width-to-length ratios, or aspect ratios, of
VTN 1 = VTN 2 the 2 transistors change.
and K n1 = K n 2 • If the transistors are matched except for the
aspect ratios, then
Thus, I O = I REF (10.44)
IO =
(W / L )2 I (10.45)
• Since there is NO GATE CURRENT in
MOSFETS, the induced load current is identical to
(W / L )1 REF
the reference current, provided the two • This provides designers versatility in their
transistors are matched. circuit designs.
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
• Stability of IO as a function of VDS is an important • Since transistors in the current mirror are
consideration in many applications. processed on the same IC, all physical
• Taking into account the finite output resistance parameters, such as VTN, µn, Cox, and , are
of both transistors, i.e. 0: essentially identical for both devices.
• Therefore, taking ratio of IO to IREF will
I O = K n 2 (VGS − VTN 2 ) (1 + λ2VDS 2 )
2
(10.46(a)) produce
IO
=
(W / L )2 ⋅ (1 + λVDS 2 ) (10.47)
and
I REF = K n1 (VGS − VTN1 ) (1 + λ1VDS1 ) (10.46(b))
2 I REF (W / L )1 (1 + λVDS1 )
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1.3) Reference Current, IREF (Cont) 4.1.3) Reference Current, IREF (Cont)
• Use current mirror in Figure 10.17 • From the circuit, can be seen:
• Transistors M1 and M3 are in series.
Assuming = 0: VGS1 + VGS 3 = V + − V −
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1.3) Reference Current, IREF (Cont) 4.1.3) Reference Current, IREF (Cont)
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1.3) Reference Current, IREF (Cont) 4.1.3) Reference Current, IREF (Cont)
Solution: With VDS2(sat) = 0.4 = VGS2 – 0.4, The reference current is given by
then VGS2 = 0.4 + 0.4 = 0.8 V = VGS1 kn' W
I REF = ⋅ (VGS1 − VTN )2
W IO 2 L
Therefore, =
1
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.1) Basic Two-Transistor MOSFET Current Source (Cont)
4.1.3) Reference Current, IREF (Cont) 4.1.4) Using N-MOSFET and P-MOSFET
4.2.1) Cascode Current Mirror (Cont) 4.2.1) Cascode Current Mirror (Cont)
• To determine output resistance at the drain of
M4, use the small-signal equivalent circuit.
• The small-signal resistance looking Fig 10.19: Equivalent circuits of the MOSFET
into the drain of M2 is rO2. cascode current mirror for determining RO
4.2.1) Cascode Current Mirror (Cont) 4.2.1) Cascode Current Mirror (Cont)
4.2.1) Cascode Current Mirror (Cont) 4.2.1) Cascode Current Mirror (Cont)
• Normally g m ro 4 >> 1 g m ro 4 ro 2 >> ro 4 Example 10.9
4.2.2) Wilson Current Mirror (Cont) 4.2.2) Wilson Current Mirror (Cont)
• Fig 10.20(a) is MOSFET Wilson current mirror. • In modified MOSFET Wilson current mirror:
Add transistor M4
• Note: VDS1 = VGS2 + VGS3 • For a constant IREF, VDS of M1, M2 and M4 are
VDS2 = VGS2 held constant
VDS1 VDS2 VDS of M1 and M2 are equal (VDS1 = VDS2)
a) Simple two-transistor CM
4.2.3) Wide-Swing Current Mirror (Cont) 4.2.3) Wide-Swing Current Mirror (Cont)
4.2.3.1) Minimum output voltage swing, VO(min) 4.2.3.1) Minimum output voltage swing, VO(min)
4.2.3) Wide-Swing Current Mirror (Cont) 4.2.3) Wide-Swing Current Mirror (Cont)
4.2.3.1) Minimum output voltage swing, VO(min) 4.2.3.2) VO(min) of Wide-swing cascode CM
4.2.3) Wide-Swing Current Mirror (Cont) 4.2.3) Wide-Swing Current Mirror (Cont)
4.2.3.2) VO(min) of Wide-swing cascode CM (Cont) 4.2.3.2) VO(min) of Wide-swing cascode CM (Cont)
CMCM VO(min) = 1.00V above V_ • Circuit design in which the load current
_ is essentially independent of the bias is
WSCCM VO(min) = 0.50V above V
shown in Figure 10.22, with width-to-
length ratios given.
k n' W
For M1: I D1 = (VGS1 − VTN )2
2 L 1
'
k W
For M2: I D2 = n
(VGS 2 − VTN )2
2 L 2
KVL for M1, VGS 2 = VGS1 − I D 2 R
M2 and R
R=
1
1−
(W / L )1
Solving for R:
k n1 I D1 (W / L )2
Figure 10.22: Bias-independent MOSFET current mirror.
4.4.1) DC Analysis: MOSFET Active Load Circuit 4.4.1) DC Analysis: MOSFET Active Load Circuit (Cont)
Larger circuits
4.1) Basic Two-Transistor MOSFET Current Source (Cont) 4.2.1) Cascode Current Mirror
4.1.3) Reference Current, IREF
Fig 10.20:
(a) MOSFET
Wilson CS,
(b) Modified
Fig 10.19: Equivalent circuits of the MOSFET MOSFET
cascode current mirror for determining RO Wilson CS.
Fig 10.21:
A wide-swing
MOSFET
cascode
current mirror.