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Power

Electronics
ELECTENG 734

Dr. Duleepa J Thrimawithana


Dept. of Electrical and Computer Engineering
Building 903, Room 444
Phone : (64) 923 9634
Email : d.thrimawithana@auckland.ac.nz
Control of PE Converters
• The output of a power converter needs to be regulated
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

to be within a specified band in response to


– Changes in load
– Changes in input voltage
• PE circuits employ negative feedback controllers
– Output is measured and compared with a reference
(2013)

– Error is used to derive a PWM signal to drive the converter


• Feedback controllers require compensation
– To achieve desired response
• Needs to know small signal transfer function
– Bode plots can be used to design the compensation network
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Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

Control of PE Converters

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State-Space Averaging
• A technique used to derive the small signal transfer
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

~ ~
function vo( s ) d ( s )
– v~o ( s ) represents a perturbation in the output voltage
~
– d ( s ) represents a perturbation in the duty cycle
• During each state of the circuit (on and off) the
(2013)

circuit is described in terms of its state variables x


– Currents in inductors and voltages across capacitors are
taken as state variables
– During on time => dTs => x! = A1x + B1vin & vo = C1x
– During off time => (1-d).Ts => x! = A 2 x + B 2vin & vo = C2 x
– A1 and A2 are the state matrices
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Example : Buck Converter with
losses
• Small signal transfer function
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

SW x1 L rL
R
Vin D x2 C vo
rC

v~o ( s ) 1 + srC C
(2013)

~ = T p ( s ) = Vin
d (s) {
LC s 2 + s[1 RC + (rC + rL ) L] + 1 LC }
ω02 s + ωz
= Vin
ω z s 2 + 2ξω0 s + ω02
1 1 RC + (rC + rL ) L 1
where ω0 = ;ξ = ; ωz =
LC 2ω0 rC C 5
Example : Buck Converter
• Small signal transfer function of a buck converter has a
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

Im{s}

ωo

ωz Re{s}
ωo
(2013)

Decreasing ξ

– Fixed low frequency gain


– Gain begins to drop with a slope of -40 dB/decade after
resonant frequency (ωo) and phase tends towards -1800
– Beyond the zero frequency (ωz) the gain drops with a slope of
-20 dB/decade phase tends towards -900 6
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

Example : Buck Converter

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Transfer Functions
• For lossless converters
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

v~o ( s ) ω02 s + ωz
~ = T p(s) = G
d ( s) ω z s 2 + 2ξω0 s + ω02

Converter G ωo ωz ξ
(2013)

Vo 1 1 L
Buck ∞
D LC 2R C

Vo 1− D (1− D)2 R 1 L
Boost
1− D LC L 2 R(1 − D ) C
Vo 1− D (1− D)2 R 1 L
Buck-Boost
D(1 − D )2 LC DL 2 R(1 − D ) C
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Voltage Mode Control of PE
Converters
• Direct-duty cycle voltage mode controllers
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– A control voltage vc is derived by subtracting actual output


from the reference voltage
– vc is compared with a fixed frequency sawtooth waveform
to directly control duty-cycle D of the switch
– D adjust average inductor voltage and hence the inductor
(2013)

current and eventually brings the output close to reference

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Compensation
• Overall open-loop transfer function TOL(s) = Tc(s)Tm(s)Tp(s)
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

• For given Tm(s) and Tp(s), Tc(s) must be chose so that


TOL(s) meets the performance requirements of the
power converter
– High low frequency gain to reduce steady-state error
(2013)

– Gain crossover frequency (ωcross) at about 1/10 of the


switching frequency allowing to respond faster to changes
– A phase margin of about 450-600
– In case of converters with RHP zeros,
either the zero can be filtered or a
complex Tc(s) can be used
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Compensated Error Amp.
• Tc(s) can be realized using the error amplifier
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

v~c( s ) 1 s + ωz
Tc( s ) = ~ =
(
vo( s ) R1C2 s s + ω p )
1 C + C2
where ω z = ; ωp = 1
R2C1 R2C1C2 11
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

Controller : SG3524
A Typical Voltage Mode

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A Typical Voltage Mode
Controller : SG3524
• Setting up the oscillator
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Decide on a CT value to achieve acceptable dead-time


– Lookup the RT value from graph for desired fsw
(2013)

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A Typical Voltage Mode
Controller : SG3524
• Setting up the error amplifier
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Internal ref. with an ext. voltage divider used to establish a


ref. for error amp.
– Output sampled using R1 & R2 and fed to error amp.
– Error amp. is transconductance with a gain of Av = gm x ZL = 2
mΩ-1 x ZL and thus can be compensated by connecting a series
(2013)

resistor (Rf)and a
Capacitor (Cf) from output
to ground to introduce
an integrator and a zero
i.e. Av = gm(Rf+1/sCf)
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A Typical Voltage Mode
Controller : SG3524
• A typical setup
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

Output
2.5 V reference
(2013)

Compensation

Oscillator

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Current Mode Control of PE
Converters
• Current mode controllers
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Inner control loop directly controls the inductor current


– Control voltage vc derived from the error amp. sets the
current limit to reduce error in output voltage
– Simplify the design of controllers
– Helps current sharing and to avoid saturation of magnetics
(2013)

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Current Mode Control
• Tolerance band control
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Inductor current controlled


to stay within a band set by vc
– Variable switching frequency
• Constant off time control
(2013)

– Once IL reaches a threshold


switch held off for a fixed time
– Variable switching frequency
• Constant frequency control
– Turn-on is clocked
– Peak or average IL controlled 17
Small Signal Model of a Current
Mode Controlled Converter
• Inductor of the converter can be treated as a error-
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

voltage controlled current-source


• Thus the two-pole (formed by inductor and output
capacitor) small-signal response of these converters
reduces to a single-pole (formed by load resistor and
output capacitor) response
(2013)

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Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

Controller : UC1842
A Typical Peak Current Mode

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A Typical Peak Current Mode
Controller : UC1842
• Under-voltage lockout
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Supply voltage Vcc to the controller should be more than VON


for start-up and should not fall below VOFF during operation
– Vcc should never exceed the abs. max. supply voltage rating
of the controller (30 V)
(2013)

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A Typical Peak Current Mode
Controller : UC1842
• Setting up the oscillator
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Decide on a CT value to achieve acceptable dead-time


– Lookup the RT value from graph for desired fsw
(2013)

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A Typical Peak Current Mode
Controller : UC1842
• Setting up current control loop
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Current sensed through pin 3 and when pin 3 rises above 1 V


the switch is turned-off
– At the end of the period switch is turned on again
– An RC filter with a time constant much less than 1/10th of fsw
used to filter spikes due to reverse recovery
(2013)

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A Typical Peak Current Mode
Controller : UC1842
• Setting up the error amplifier
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Output voltage fed to pin 2 is compared with 2.5 V internal


reference
– The error voltage generated by the amplifier is used to
reduce the 1 V limit on the current sense pin
– A compensation network ZF needs to be added between pin
(2013)

1 and 2 to improve the dynamic response of the converter

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A Typical Peak Current Mode
Controller : UC1842
• Rf and Cf are chosen to remove the effect of LHP zero
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

introduced by the ESR of output capacitor


• Rf/R`i sets the low frequency gain and is set as high as
possible while ensuring ωcross < fsw/10
• A filter formed by Rp and Cp is used to filter RHP zero
(2013)

found in some converters

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A Typical Peak Current Mode
Controller : UC1842
• Shut down by pulling down pin 1 or pulling up pin 3
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland
(2013)

• Totem pole output suitable for directly driving a FET

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Slope Compensation
• In peak current mode controllers
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

– Average IL varies with input voltage


– Exhibit instability and sub-harmonic oscillations if D
exceeds 0.5
(2013)

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Slope Compensation
• Performance of a peak current mode controller can
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

be improved using slope compensation


– A ramp can be introduced in Ve so that it compensates for
the peak to average current difference
– The slope of this compensating ramp has to be about 0.5-
0.75 of the down-slope of the inductor current
(2013)

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Slope Compensation
• In practice, a portion of the oscillator waveform is
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

added to the current sense input


– R1 and R2 form a voltage divider adding a portion of the ramp
generated by the oscillator to the current waveform
– The compensated voltage at current sense pin VRAMP can be
calculated using superposition
(2013)

V( S L ) R2 V( SOSC ) R1
VRAMP = +
R1 + R2 R1 + R2

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Slope Compensation
• The value of R2 can be calculated for a given amount of
Prepared by Dr. D J Thrimawithana, Dept. of ECE, University of Auckland

slope compensation, M
dVosc
R1 dt
R2 =
M r di L
sense ×
dt
• Alternatively an emitter follower circuit can be used
(2013)

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