360 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO.

3, DECEMBER 2017

A Hybrid Si IGBT and SiC MOSFET Module

Development
Puqi Ning, Member, IEEE, Lei Li, Xuhui Wen, Member, IEEE and Han Cao

TABLE I
Abstract—A compact wirebond packaged phase-leg SiC/Si
PRICE COMPARISON OF SIC AND SI DISCRETE DEVICES
hybrid module was designed, developed, and tested. Details of the
Part number Type & voltage Rated current Price
layout and gate drive designs are described. The IC chip for gate ST 1200 V 65 A @ 25°C 35.13 $ for 1 pc.
drive is carefully selected and compared. Dual pulse test SCT50N120 SiC MOSFET 50 A @ 100°C 30.95 $ for 25 pc.
confirmed that, the switching loss of hybrid module is close to IXYS 1200 V 68 A @ 25°C 109 $ for 1 pc.
pure SiC MOSFET module, and it is much less than pure Si IGBT IXFN70N120SK SiC MOSFET 48 A @ 100°C 99.14 $ for 25 pc.
device. The cost of hybrid module is closer to Si IGBT. CREE 1200 V 90 A @ 25°C 69.8 $ for 1 pc.
C2M0025120D SiC MOSFET 60 A @ 150°C 67.12 $ for 100 pc.
Index Terms—Gate drive design, hybrid module, SiC device. Rohm 1200 V 72 A @ 25°C 44.21 $ for 1 pc.
SCT3030KL SiC MOSFET 51 A @ 150°C 39.52 $ for 25 pc.
Microsemi 1200 V 56 A @25°C 78.36 $ for 1 pc.
APT80SM120J SiC MOSFET 40 A @125°C 66.49 $ for 100 pc.
I. INTRODUCTION Infineon 1200 V 100 A @25°C 7.12 $ for 1 pc.

I
IGW60T120FKS Si IGBT 60 A @100°C 5.33 $ for 100 pc.
N recent years, the silicon carbide (SiC) power A1
semiconductor has emerged as an attractive alternative that IXYS 1200 V 160 A @25°C 13.44 $ for 1pc.
IXYH82N120C3 Si IGBT 82 A @110°C 8.52 $ for 1000pc.
pushes the limitations of junction temperature, power rating,
and switching frequency of silicon (Si) devices [1-3]. Some Reference [5], reported the development of a 1200 kV/880A
manufactures have successfully fabricated SiC MOSFETs SiC module which can handle megawatt. The cost was
which demonstrated these advantages. SiC MOSFETs have estimated close to 2500$. Reference [6] presented the design
very low on-state voltage drop and faster switching speed and development of a HP1 package based SiC three-phase
compared to Si devices. However, the price of SiC MOSFET is module, and the power rating is 1200 V/ 300A for each
commonly 3 to 5 times of the same rating Si IGBT device. phase-leg. There were 36 SiC MOSETs and 36 SiC diodes in
Table I shows the comparison between some discrete SiC the module, which makes the cost for each module close to
MOSFETs and some discrete Si IGBT [4]. 7000 $. An Int-A-Pak version module was also presented in [6].
Although the advanced properties of SiC MOSFET will lead Without any SiC diode, the cost is cut to 5000$. All these
converters to higher power density [3], some issues still need to modules are too expensive for regular industrial applications.
be resolved to take full advantage of SiC. For example, almost TABLE II
all the SiC modules are still using Si device based conventional PRICE COMPARISON OF SIC AND SI MODULES
packages. These packaging structures have large parasitic Manufacture and Part Rated voltage
Topology Price (US dollar)
number and current
parameters (15~70 nH) and limit the operation temperature Infineon SiC MOSFET 1200 V Boost 119.04 $ for 1 pc.
(less than 150°C). Furthermore, most of these SiC modules are DF11MR12W1M1_B11 50 A module 107.88 $ for 25 pc.
lack of reliability testing data. Unfortunately, these modules are Rohm SiC MOSFET 1200 V Phase-leg 506.97 $ for 1 pc.
BSM180D12P3C007 180 A module 476.42 $ for 5 pc.
very expensive and some product modules are listed in Table II Rohm SiCMOSFET 1200 V Phase-leg 668.18 $ for 1 pc.
[4]. BSM300D12P2E001 300 A module 654.43 $ for 5 pc.
CREE/ Wolfspeed SiC 1200 V Phase-leg 330 $ for 1 pc.
CAS120M12BM2 193 A module
Infineon Si IGBT 1200 V Phase-leg 145.33 $ for 1 pc.
FF400R12KT3 580 A module 136.38 $ for 25 pc.
This work is supported by The National key research and development Microsemi 1200 V Phase-leg 184.36$ for 100 pc.
program of China (2016YFB0100600), the Key Program of Bureau of Frontier APTGLQ400A120T6G 625 A module
Sciences and Education, Chinese Academy of Sciences
(QYZDBSSW-JSC044), and the National Natural Science Foundation of China Because of bipolar carriers and long tail current at turn-off
(No. 51507166). phase, IGBTs can’t switch over 20kHz generally. On the
Puqi Ning is with the Institute of Electrical Engineering, Chinese Academy
of Sciences , Beijing, 100190 China and Collaborative Innovation Center of
contrary, MOSFETs have no tail current but the rated currents
Electric Vehicles in Beijing (e-mail: npq@ mail.iee.ac.cn). become too small when the voltage is over 900 V. In many
Lei Li is with the Institute of Electrical Engineering, Chinese Academy of future applications, for example, Wireless power transmission
Sciences , Beijing, 100190 China (e-mail: lilei@ mail.iee.ac.cn).
Xuhui Wen is with the Institute of Electrical Engineering, Chinese Academy
(WPT) for Electric Vehicle (EV), more electric aircraft (MOA)
of Sciences , Beijing, 100190 China (e-mail: wxh@ mail.iee.ac.cn). and solid state transformer (SST), the converter requires high
Han Cao is with the Institute of Electrical Engineering, Chinese Academy of speed switching, medium/high power, low on-resistance and
Sciences , Beijing, 100190 China (e-mail: chan@ mail.iee.ac.cn).
NING et al. : A HYBRID SI IGBT AND SIC MOSFET MODULE DEVELOPMENT 361

reasonable price. In many countries, the line frequency of WPT Based on datasheets, the conduction performance of hybrid
of EV is set to 85 kHz in standards, which bring a tough module is shown in Fig.2. The conduction loss of hybrid
challenge to develop a 30 kW WPT fast charging converter. module is very close to Si IGBT, while the cost is also close to
To overcome the challenges, the combination of IGBT and Si IGBT.
MOSFET devices was investigated by compensating
disadvantages [7]. Among them, hybrid switches based on Output Characteristics
parallel connection between Si IGBT and SiC MOSFET were 350
350

studied [8-10]. In these paper, the losses and costs of hybrid 300
300
250
switches have been investigated and verified. In [11], to further 250
200
200
reduce the switching loss, the switching pattern using

Current (A)
150
150
commutation was analyzed in detail. 100
100
Most of these papers focus on discrete device hybrid, which 5050
SiC MOS Si IGBT Hybrid

brings in large inductance in the circuit. They didn’t 00

demonstrate any larger current case (none is over 100 A). This 0 0.5 1 1.5
1.5 2 2.5
2.5 33 3.5
3.5

paper evaluates the performance of a 1200 V/200A hybrid Voltage(V)

phase-leg module. The detailed packaging, module Conduction performance comparison

development, gate drive circuit design, and performance
comparison are presented. It gives an novel approach of hybrid
switches used for over 10 kW applications.

II. HYBRID MODULE DEVELOPMENT

The design target is a 1200 V/200 A hybrid phase-leg
module. To evaluate the paralleling possibility of devices in
hybrid module, each leg includes two same rating Si IGBTs,
one SiC MOSFET and one Si Diode. To reduce the parasitic
parameters and prevent interference from the main power,
Kelvin source pin of gates (Gates1 and Gates2) are added to Cost comparison
both legs. The circuit of the hybrid module is shown in Fig.1. Fig. 2. Conduction performance and cost comparison.

The module packaging design target is reliable 175°C

operation and possible 200°C operation. Based on a
comprehensive survey and lab evaluation, materials for each
part of the power module package were compared and selected.
The final materials selection is listed in Table IV. Since high
speed switching is required for this module, power terminals
and gate signal terminals are bonded to DBC with ultrasonic
bonding methods to reduce parasitic parameters.

TABLE IV
MATERIAL SELECTION FOR 200 ºC MODULE.
Baseplate Aluminum Silicon Carbide (AlSiC), 3 mm thick
Substrate Aluminum nitride (AlN) direct bond copper (DBC) with
15 mils thick AlN, 8 mils thick copper
Fig. 1. Hybrid module circuit. Die attachment Au-Sn solder (280ºC melting point)
Wirebond 6 mils aluminum wire for gate pads
Some high performance dies are chosen for this module, and 15 mils aluminum wire for other pads
the properties are listed in Table III. Based on the safe operation Encapsulant Nusil R-2188
suggestion from [11], the total current of SiC MOSFETs and Si Power terminal 0.8 mm thick copper terminal
Signal terminal 1 mm diameter copper pin
IGBTs are selected as maximum 1:4 matching.
Table III The next step is layout design, and a genetic algorithm (GA)
PROPERTIES OF SIC/SI DEVICES
Device SiC Si IGBT Si Diode
based layout optimization in [12] is utilized to generate a high
MOSFET performance design. The design space of the module layout is
Part number CPM2-1200- IRG8CH97K10F IRD3CH82DB6 fully searched. By considering the reduction of the parasitic
0025B parameters, minimizing the footprint, and balancing the
Rated voltage (V) 1200 1200 1200
Rated current (A) 90@25°C 100@175°C 150@175°C thermal dissipation path, the decoupling gate paths, and the
50@150°C power paths, devices are placed and routed on the substrate.
Dimensions 4.04 mm × 10.5 mm × 9.07 mm× The compact layout is shown in Fig.3, and the fabricated
6.44 mm 9.3 mm 9.07 mm
Cost 75$ 8.26$ 4.96$ prototype is shown in Fig.4.
362 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, DECEMBER 2017
Fig. 3. Hybrid module layout design.
Fig. 4. Hybrid module prototype.
III. GATE DRIVE DESIGN WITHOUT MILLER CLAMP
To eliminate large switching loss in Si IGBT, SiC MOSFET
is turn-on earlier than Si IGBT. Then, Si IGBT will be turn-off
prior to SiC MOSFET. It is also expected to realize zero voltage
switching (ZVS) for IGBT for both turn-on and turn-off phase.
The gate signal pattern (delay 1 and delay2) will affect the total
loss of the hybrid switch. The gate drive signal (pulse1 and
pulse2) and turn on/off voltage are shown in Fig.5.
Fig.5. Gate drive time delay.
Delay 1 and Delay2 can be controlled in the circuit. Delay 3
and Delay 4 will change with DC bus voltage, current and
temperature. The value can’t be directly tested.
The gate drive conceptual diagram is shown in Fig.6. In this
paper, Delay1 is fixed to zero, and the value of Delay 3 can be
estimated by datasheets of IGBTs and MOSFETs. Delay 2 is
implemented by a simple analog circuit with Schmitt inverters.
The length of Delay 2 can be adjusted by C1, R1 and R2. In fact,
the length is adjusted and optimized during experiments. Since
the turn-off delay of IGBTs is larger than those of MOSFETs,
Delay 2 should be long enough to ensure the full turn-off of
IGBTs before the beginning of MOSFETs’ turn-off. In this
paper, Delay 2 is finally set to 2 μs.
Fig. 6. Gate drive conceptual diagram (without miller clamp).
The performance of this gate drive is evaluated by a dual
pulse test setup. The dual pulse test is a classical experiment
test for power semiconductor modules. Most characteristics of
switches and diodes within the power modules can be obtained
by the dual pulse test. The test principle and diagram are
illustrated in Fig.7. The test setup is shown in Fig.8.
Fig. 7. Dual pulse test circuit and principle.
The test waveform is shown in Fig.9. During the turn-off
phase, a miller effect can be clearly found from the figure. For
fast switching of SiC MOSFET, high dv/dt will bring electrical
interference to Si IGBT drive path. A Miller current appears
and the gate voltage of Si IGBT device (VGE) increases. This
NING et al. : A HYBRID SI IGBT AND SIC MOSFET MODULE DEVELOPMENT
voltage exceeds the threshold voltage of VGE and a fault
re-turn-on happens (shown in Fig.7). Si IGBTs share part of
current from SiC MOSFET, and the tail current happens again.
The same phenomenons can be found from [9] and [11].
Fig. 8. Double Pulse Test Setup.
It means that, IGBT chips are turned on in ZVS mode, but
not fully ZVS in turn off phase. Although the length of the tail
current is shorter than the conventional IGBT module, the
power loss is much larger than that of a pure SiC MOSFET
turn-off. The detailed comparison is listed in Section 3.
(a) Turn off at 600V/ 200 A
(b) Turn on at 600V/ 200 A
Fig. 9. Hybrid module without miller clamp.
363
IV. GATE DRIVE DESIGN WITH MILLER CLAMP
Negative off-state gate voltage is generally used to prevent
the Miller effect [13]. However, in each leg of this hybrid
module, the SiC MOSFET and Si IGBTs shares the same
ground. SiC MOSFET can only accept a -5 V negative off gate
voltage. While -5 V can’t fully mitigate the miller effect and tail
current. At the same time, additional isolated DC source should
be added to the gate drive, which increase the complexity and
the total cost.
Fig. 10. Function block diagram of ACPL-332J.
In [13], commercial chips ACPL-332J with built-in
turn-on/turn-off path separators were utilized. When IGBT is
off, a low-impedance path is established inside the gate drive
chips and the gate voltage spikes can be reduced. The function
block diagram of ACPL-332J is depicted in Fig.10. During
turn-off, the gate voltage is monitored and the low impedance
path is activated when the gate voltage goes below 2V.
For Si IGBT gate, the gate drive chip HCNW3120 is
changed to A332J to overcome the miller effect. HCNW3120 is
still used for SiC MOSFET gate to reduce the complexity and
cost. The gate drive conceptual diagram is shown in Fig.11.
Fig. 11. Gate drive conceptual diagram (with miller clamp).
The improved gate drive circuit was evaluated to compare
the switching losses. The hybrid module was tested up to 600
364 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, DECEMBER 2017

V/200 A. The gate resistor of SiC MOSFET is 47Ω, and the
gate resistor of Si IGBT is 15Ω. The experimental results are
shown in Fig.12. It is noticed that the miller effect is mitigated
within an acceptable range and the induced gate voltage of Si
IGBT didn’t pass the threshold voltage. Thus no obvious tail
current was found in the tests.
To compare the hybrid module performance, a 1200 V/150 A
prototype was fabricated with the same package, which is
shown in Fig.14. The module was tested up to 600 V/ 150 A by
the same dual pulse test setup. One of experimental waveform
is shown in Fig.15.

Turn off at 600V/ 200 A Fig. 14. 1200 V 150 A SiC MOSFET module.

The gate resistor was also adjusted for pure SiC MOSFET
module. Test results of 15 Ω set and 10 Ω set are listed in Table
5. Lower speed drive (15 Ω set) has larger power loss during
turn on and turn off (close to 4 times), but smaller overshoot
voltage (about 60 V).

Turn on at 600V/ 200 A

Fig. 12. Hybrid module with miller clamp.
The gate resistor was also adjusted to increase the turn on/off
speed of SiC MOSFET. When gate resistor is reduced to 15Ω, a
clear vibration is noticed, as shown in Fig.13. During the turn
off phase, SiC MOSFET is operated 3 times larger of the rated
current. It is very close to the safe operation area (SOA) (a) Turn off at 600V/150A
boundary. A over speed gate drive may induce an unreliable
switching.

(b) Turn on at 600V/ 150 A

Fig. 15. SiC MOSFET module switching.
Fig. 13. Hybrid module vibrates with over speed turn-off.
NING et al. : A HYBRID SI IGBT AND SIC MOSFET MODULE DEVELOPMENT 365

TABLE V V. SUMMARY AND CONCLUSION

DOUBLE PULSE TEST RESULTS COMPARISON
Hybrid Hybrid Hybrid In order to better utilize the advantages of SiC devices, this
module module module SiC SiC paper presents a systematic design procedure. With the details
Item without with with only MOSFET MOSFET in packaging design, layout design, and gate drive design, a
miller miller IGBT module module
clamp clamp operated compact hybrid module is obtained. The promising results of
VCC (V) 600 600 600 600 600 dual pulse tests validated the design methods and demonstrated
IC (A) 200 200 200 150 150 a reasonable operation. Together with the parameter adjustment,
L (uH) 50 50 50 50 50
Vge_on MOS 20 MOS 20 MOS 0 20 20
some practical considerations in the gate drive development are
(V) IGBT 15 IGBT 15 IGBT 15 presented.
Vge_off 0/0 0/0 0/0 -5/-5 -5 The hybrid module combines low conduction loss of Si
(V)
Rg_ext MOS 5 MOS 47 IGBT 15 15 10
IGBT and low switching loss of SiC MOSFET, and the cost is
(Ω) IGBT 15 IGBT 15 closer to Si IGBT.The proved high performances of SiC/Si
trv(ns) 296.8 120 400 130.8 48 hybrid power module will result in considerable achievement to
tfi(ns) 104.8 200 83 104 36 enhance power density of a converter system.
toff(ns) 537.6 460 1861 613.6 304
Eoff(mJ) 34.11 11.03 40.26 14.3 3.4
VCEpk(V) 676 664.81 676 666 730
tri(ns) 68 100 62 160 46 REFERENCES
tfv(ns) 72.8 120 207 214.4 84
ton(ns) 134.4 160 307 322.8 78 [1] C J. Rabkowski, D.Peftitsis, H. Nee, "Silicon Carbide power transistors:
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Fig. 16. Time related parameter definition in Table V.
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Method", in IEEE proc. ECCE2015, pp.4132-4237.
The time related parameters in table 5 is defined in Fig.16. It
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Because of the propagation delay difference and the pcb Puqi Ning received his Ph.D. degree from
layout design, Eon of hybrid module with miller clamp is little electrical engineering of Virginia Tech,
larger than that of hybrid module without clamp. When Blacksburg, US in 2010. He is full
choosing gate drive ICs with miller clamps, small propagation professor in Institute of Electrical
delay and large supply current is preferred. Engineering, Chinese Academy of
In the next step, the module will be evaluated by dual pulse Sciences. Dr. Ning has been involved in
test under 175°C and 200°C. A converter over 30 kW will be high temperature packaging and high
developed based on hybrid modules. This converter can help to density converter design for more than 10
investigate the continuous performance of hybrid modules. years.
366 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, DECEMBER 2017

Lei Li is a Ph.D. student in Institute of

Electrical Engineering, Chinese Academy
of Sciences. He has been involved in
power device modeling and high density
converter design for 3 years.

Xuhui Wen received her B.S, M.S and

PhD degree in electrical engineering from
Tsinghua University in 1984, 1989, 1993
respectively. She is full professor in
Institute of Electrical Engineering,
Chinese Academy of Sciences. Dr. Wen
has been involved in high power density
electrical drive and generation especially
for electric vehicle application for more than 20 years.

Han Cao is a Master student in Institute of

Electrical Engineering, Chinese Academy
of Sciences. He has been working on
power device modeling and high density
converter design for 1 year.