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• 3 DSP
• FPGA A + FPGA BC for
Layer 1 Processing
• P4080 for Layer 2
processing
• 8 cores in P4080
• 1 pair of cores per Cell
better handling of cell reset
• Up to 3 cells per bCEM
54 users
eCEM 10MHz
200 54 users 54 users
eCEM 10MHz bCEM 20MHz
users
eCEM 10MHz 200 250 bCEM 10MHz 250
users users users
eCCM eCCM750 users
Capacity monitoring (hourly monitoring):
RRC.Conn.Max maximum number of simultaneous user
RRC.Conn.cum/events average number of simultaneous users
VS.CACFailure.LackOfNbOfUserPerCell/LackOfNbOfUserPerEnb
Multi-core architecture allows further enhancement on bCEM;
COPYRIGHT © 2011 ALCATEL-LUCENT. ALL RIGHTS RESERVED.
bCEM will support increase capacity features for the next release
ALCATEL-LUCENT — CONFIDENTIAL — SOLELY FOR AUTHORIZED PERSONS HAVING A NEED TO KNOW — PROPRIETARY — USE PURSUANT TO COMPANY INSTRUCTION
159512 bCEM paging capacity increase
• Feature embedded in the baseline (no activation flag)
• Paging records from 1 to 6 to support higher paging rate
• bCEM LA6 is equivalent to eCEM LA5 paging capacity
Metrics LA4 LA5 (eCEM)
/ LA6 (bCEM)
Max # of UEs per paging occasion 1 6
Paging occasion 1 per frame
UE Page record buffer size 200 500
Maximum paging rate 100 per second 600 per second
Feature tuning:
• numberRBNotForPaging: [0, 100]; maximum remaining PRBs which can be used for paging
• pagingForceMCSMin: [-1, 9]; specifies the MCS used for paging.
Value -1 to use MCS0
Feature monitoring:
• VS_S1PageAttemptsFromMMEs
• VS_S1PageAttemptsDiscarded