Question Bank for CMOS VLSI

Chapter 1
1. For a n-channel MOSFET draw- a)a basic small signal model b) small signal model considering
channel length modulation effect c) small signal model considering body effect
2. Explain Supply independent references in detail
3. Explain in detail how to generate temperature independent references.
4. Discuss drawback of basic current mirror. Explain how Cascode current mirror overcomes it.
5. Explain Supply independent references in detail

Chapter 2
1. In following fig. M1 is biased in saturation region. The current source Is=0.75I1. Calculate Voltage
gain equation for the circuit.

2. Explain White & Flicker noise in MOSFET. Derive equation for output and input referred noise
voltage of CS stage
3. Discuss drawback of basic current mirror. How cascode current mirror overcomes it?
4. Explain CD stage with diode connected load and derive voltage gain equation for it.
5. Derive expression for Voltage gain Av and output resistance Ro of Source follower stage
6. Perform high frequency analysis of CS stage
7. Derive expression for Voltage gain Av and output resistance Ro of Source follower stage
8. Find voltage gain AV for following circuit

9. Find drain current of M4 in the following circuit if all the transistors are in saturation
 1. Calculate small signal Voltage gain equation of the circuit shown in Fig. below

Chapter 3
1. Perform qualitative analysis of differential pair
2. The following circuit uses a resistor rather than a current source to define a tail current of 1mA.

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3. Assume (W/L) 1, 2=25/0.5, µn Cox=50µA/V2, VTH=0.6V, λ=0, VDD=3V
(a)What is the required input CM for which Rss sustains 0.5V
(b)Calculate RD for a differential gain of 5
(c) What happens at the output if input CM level is 50mV higher than the value calculated in (a).
4. Analyze following circuit to get voltage gain equation if M2 is twice wide as that of M1 and
Vin1=Vin2
 5. Explain common mode response of differential pair with necessary derivations
6. Write a short note on Gilbert Cell
7. Derive voltage gain equation of CS stage with source degeneration resistor

Chapter 4
1. If KN’=100μA/V2, KP’= 20μA/V2, VTN = |VTP| = 0.5V, λN = 0.06V-1, and λP = 0.08V-1, design a two-
stage, CMOS op amp that meets the following specifications.
Av > 3000V/V VDD =2.5V GB = 5MHz, SR > 10V/μs, 60° phase margin, 0.5V< Vout
range<2V,ICMR = 1.25V to 2V,Pdiss ≤2mW.
Assume the channel length is to be 0.5μm and the load capacitor is CL = 10pF.
Verify that the designed circuit meets required Voltage Gain and Power Dissipation
specifications.
2. Explain input range limitations in OPAMP
3. Explain importance of Miller Theorem
4. Design two stage Operational Amplifier (OTA) to meet following specifications-.
Av > 4000 V/V , VDD =2.5V, Vss=-2.5V GBW = 6MHz, CL =10pF, SR > 10V/μs, 60° phase
margin, -2V≤ Vout range≤2V, ICMR = -1.125V to 2V, Pdiss ≤2.5mW
Use, KN’=110μA/V2, KP’= 50μA/V2, VTN = |VTP| = 0.7V, λN = 0.04V-1, and λP = 0.05V-1,
Cox=2.47fF/µm2. Verify that the designed circuit meets required Voltage Gain and Power
Dissipation specifications.
5. Compare various OPAMP topologies
6. Explain Telescopic and folded cascade op amps

Chapter 5
1. Explain important performance parameters of VCO
2. Explain input output characteristics of phase detector (PD) circuit
3. Explain concept of switched capacitor circuits and hence explain switched capacitor amplifiers in
detail
4. Explain in detail basic charge pump PLL
5. Explain the concept of switched capacitor circuits. Also explain switched capacitor integrator in
detail.
6. Explain why single common-source stage does not oscillate if it is placed in a unity gain loop
7. Derive expression for time constant of unity gain sampler in sampling and amplification mode
8. Explain Ring oscillator in detail. What is gain and oscillation frequency of 3 stage ring oscillator?

Chapter 6
1. Explain System on Chip and System in Package
2. Write a short note on: i)Full custom design flow ii)Semi custom design`
3. Explain use of multiple finger transistor in analog layout
4. Draw and explain AMS design flow
5. Explain Antenna effect