A 3GHz to 7GHz Fast-Hopping Frequency

Synthesizer for UWB

Christoph Sandner, Andreas Wiesbauer
Infmeon Technologies AG, Development Center Villach, Austria

Christian Grewing, KayWinterberg, Stefan van Waasen, Martin Friedrich, Giuseppe Li Puma
Infineon Technologies AG, Development Center Diisseldorf, Germany

Abstract rate data communications link. In contrast to current

A 3 to 7GHz fast-hopping frequency synthesizer for
ultra-widehand (UWB) applications, realized in a standard
digital 0 . 1 3 p CMOS copper technology is presented. The
synthesizer is based on single-sideband (SSB) up or
downconversion of a low frequency (LF) input by means of
an integrated LC-VCO used as local oscillator (LO). Two
LOS are selectable to achieve the large output frequency
range with reduced LF bandwidth requirements. This select
multiplexer can also be used to pulse the output frequency of
the synthesizer with switching times less than Insec.
Operating from a 1.SV supply the LO leakage and
sideband suppression is better than -2SdBc for downcon-
version and <-l(ldBc for upconversion, which is sumcient for
UWB applications. Measured output frequency range is 3.3
to 6.1GHz, limited by measurement equipment. Power
consumption is 95mW and module area 0.7mm’ including
pads.
1. Introduction
UWB is an upcoming standard for short-range, high-
standards like Wireless-LAN the signal spectrum is much
wider, at reduced total signal power.
Currently there is no agreement on a final standard for
UWB in the 3 to IOGHz band. But regardless of the final
UWB standard a frequency synthesizer will always be
required.
The synthesizer presented in this paper is suitable for
multi-band OFDM (orthogonal eeqnency division multi-
plexing), as well as DS-CDMA (direct sequence code
division multiple access) approaches, both currently under
discussion for standardization in the IEEE workgroup
802.15 [2]. Both concepts require a synthesizer with wide
range in output frequency, covering basically the whole
frequency band of the UWB transceiver. In contrast to
classical synthesizer design, most UWB concepts require a
very fast-hopping output frequency. Hop-time may be quite
stringent, especially for non-OFDM based systems it must
he in the nsec-range. With classical PLL stroctures such fast
hop-times are impossible to achieve.
With a mixer it is basically possible to implement fast-
hopping operation by switching one of the frequency inputs

LF-I

$2
select

LF-Q
Figure 1: Fast-hopping Wideband Synthesizer Block Diagram

0-7803-8373-7/04/$20.00 02004 IEEE - 405 -

of the mixer. Well known structures from mnsceiver With this concept a multiplexer is needed to switch
design like direct upconversion can be applied to solve between the two LO frequencies. This multiplexer mainly
this problem [ 11. What is different to the current state-of- determines the fast hopping properties, i.e. the switching
the-art is the wideband characteristic of LO, LF input and speed of the synthesizer. In addition it can easily be
RF output paths, which is required for generating all extended by a third input that can be set to a DC value.
needed frequencies for UWB. Especially the wideband LF When selecting this DC value the LO is switched off. If the
path poses a challenge to the suppression of spurious DC value is zero the output of an ideal mixer is zero as well,
falling into the RF output signal band. thus enabling a pulsed operation of the synthesizer. Since the
With the concept described in this paper both require- LO path has very wide bandwidth the pulse switching can be
ments, wideband operation as well as fast hopping, can be performed very fast. Another advantage of this concept is
fulfilled. The next chapter gives an overview about the that LO leakage is drastically reduced during off-time of the
synthesizer topology. Next we present circuit details, pulses. Figure 2 shows an example for a pulsed synthesizer
followed by measurement results of a testchip imple- output waveform, as it is required for DS-CDMA. During
mented in a 0 . 1 3 ~digital CMOS technology with time Tp a frequency fI is transmitted. Next the LO is
copper metallization and no special RF features. switched off for a given time before switching to another
fiequency $2, and so on. The different frequencies are
2. Fast-Hopping Synthesizer Concept generated by changing LF frequency and/or LO frequency
during the pulse break.
The basic concept of the fast-hopping synthesizer is
shown in Figure 1. Core of the synthesizer is a mixer with fi fz
low frequency (LF) and local oscillator (LO) inputs. Since
one sideband must be suppressed a single-sideband (SSB)
mixer topology is chosen. Therefore both LF and LO
inputs consist of I and Q (0 and 90deg) signal compo-
nents. The desired sideband (upper or lower) can be
selected e.g. by switching polarity on one LF input.
Basic source for the LF signal can be a rectangular
signal or clock, as proposed in [2]. Advantage is the
simple generation of multiple fixed LF frequencies by
7
dividing down from the LO clock source. However, there Figure 2 : Pulsed Synthesizer Output Waveform
are two major drawbacks with this solution. First is the
restriction to fixed frequency ratios, leading to an Figure 3 shows an example frequency spectrum, which
inflexible clock generation system. Secondly the corresponds to the waveform given above. With each LO
rectangular waveform shows large harmonics (-10.5dBc four sub-band frequencies can be generated by applying the
for the 3'' hannonic of an ideal rectangular signal), which correct LF frequency to the mixer. For this example LF
exceeds even the relaxed requirements for UWB and must frequencies are 125OMHz and zk750MHz. The RF output
be reduced by means of additional adaptive lowpass center frequency then yields
filtering in the LF path. An alternative to rectangular
f,=fUl+fLF (1)
signals for the LF path is to apply a sinewave signal for
improved spurious performance. In case of a digitally To achieve SOOMHz bandwidth for each sub-band the
generated sinewave combined with digital-analog pulse width is around 4nsec, with pulse breaks of 6nsec.
converters (DAC) again a lowpass filter is required to
filter out DAC images, but with relaxed requirements.
This will be investigated on a future testchip.
On the LO side two LC-VCOs are used to split the
whole frequency band into 2 parts. Compared to using
only one LO the required bandwidth of the LF path is
halved, leading to much relaxed design and power
constraints for the LF part, at the cost of additional power 4 GHz 6 GHz
for the second LO. It also gives the choice to add some
oversampling if a DAC is used as LF source, in order to Figure 3: Multiband Frequency Spectrum
ease filtering of the DAC image. For a final implementa-
The next chapter focuses on the most important design
tion the LOS must be locked to some reference phase, e.g.
blocks of the synthesizer.
by means of a phase locked loop.

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3. Design For the testchip implementation an additional differential
pair is needed on the LF inputs to be able to connect 50ohm
As core for the mixer stage a classical Gilbert cell [3] voltage sources. This again causes additional distortion.
was chosen, as shown in Figure 4. depending on the LF input signal level.
In Figure 5 the output cwents of two mixer stages are
combined to get a SSB mixer shucture with I and Q mixet
stages. A resistor combined with inductive peaking for
bandwidth enhancement acts as load to the mixer. A similar
load is used for the testchip output buffer, formed by a
simple differential pair.
As LO source there are two LC-VCOs implemented on
this testchip, combined with 2:l CML prescalers they
generate the required 4 clock phases for IQ operation on the
I I 6- SSB mixer. The VCO structure is shown in Figure 6 and
described inmore detail in [4].

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Figure 4: Simplified Mixer Circuit with Predistortion
BfAs
OUT .5-2 ,OUTQ

The large signal behavior of the LF input differential

stage of the Gilbert cell is given by the NMOS operating
TUNEP I t+++H
in strong inversion, so the drain output current is in first
order proportional to the square-root of the input voltage. TUNEN
This nonlinearity leads to distortion in the output signal of
the mixer. To compensate for that an NMOS diode is
used, having a square relationship fiom input current to
output voltage. In ideal case this compensation works fine.
Unfortunately it is quite sensitive to mismatch between the
two diodes, finally causing additional LO leakage on the
mixer output. For that reason a resistor was put in parallel -
to the diode. By choosing the resistance a tradeoff Figure 6 Differentially Tuned LC-VCO Structure
between 31d order distortion and LO leakage is possible.

I
Figure 5: SSB Mixer with output Buffer ;
, . , . .~
.................... : .......................................

Figure 7: Layout Plot

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 The center frequency of the VCOs was designed for
8GHz and lZGHz respectively. Due to layout parasitics
not taken into account in simulations the 12GHz VCO
shows a max. frequency of llGHz on Silicon. As a
consequence all measurements were done with this VCO
tuned to 10.8GHz. The LO multiplexer consists of PMOS
switch transistors, selecting one of the inputs and
connecting it to a current mode logic (CML) buffer stage
with resistive load only.
Figure 7 shows a layout plot of the testchip. on the left
side there are the two coils for the LC-VCOs. On the right
side one can identify the coils for the SSB mixer as well
as the output buffer.
4. Measurement Results
For measurements a testchip was fabricated in 0 . 1 3 ~
CMOS technology. The testchip is directly mounted on
Rogers R04003 substrate (Figure 8). Direct bonding is
used to keep bondwire lengths minimum. On the board all
RF lines are carried out as single ended or differential
50ohm microstrip lines and connected by SMA plugs. The
RF output is measured on a 26GHz Agilent E444A
Spectrum analyzer. Since no wideband 180" hybrid was
available all measurements were camed out on a single
output only, leading to 3dB loss in signal power compared
to differential outputs. LO frequencies are tuned to 4GHz
and 5.4GHz, respectively. A standard 2 channel Agilent
81110 pattern generator is used as LF signal source,
providing IQ rectangular signals. The maximum output
frequency is 660MHz, thus limiting also the synthesizer
range to this value.
Figure 8: Board Photograph
Figure 9 shows a wideband output spectrum with span
from loMHz to 10GHz. LO frequency is 5.4GHz, LF is
IOOMHz, thus the RF output frequency is 5.3GHz (lower
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hand is selected in SSB mixer). LO leakage is at -36dBc,
upper sideband suppression is -34dBc. As can be expected
with a rectangular signal source the dominant spur is the 3d
harmonic of the LF mixed to 5.7GHz, yielding -10.5dBc
only. Since this is too large spurious power even for UWB
application, additional measures are needed for an integrated
solution, either filtering in the LF part, or different LF signal
generation, e.g. by using a sinewave generated by DAC.
Mk! E.388 GHi
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Figure 9: Wideband Output Spectrum: L02=5.4GHz,
LF=lOOMHz, lower sideband, span=lOGHz
Figure 10 shows the same setup, but with larger LF of
600MHz. LO leakage as well as sideband suppression are
still very good, at -37dBc and -3OdBc, respectively. The 3''
harmonic drops to -1ZdBc due to limited bandwidth in the
LF signal path.
Figure 10: Wideband Output Spectrum: L02=5.4GHz,
LF=600MHz, lower sideband, span=lOGHz
In Figure 11 the complete output frequency range of the
synthesizer is exploited. A sweep of the LF input frequency
is performed, as well as a proper selection of upper or lower
sideband and LO1 or LO2. For LF frequencies below
4.66GHz LO14GHz is selected, for all higher frequencies
L02=5.4GHz. On the x-axis the resulting RF frequency is
shown. On the y-axis the RF signal power, as well as
spurious power for LO leakage, unwanted sideband (LSB)
and 31dorder distortion (HD3)____________
are plotted in dBm.
_ - l _ _ ~
Figure 12 shows the spurious power for LOI, Figure 13
for LO2. If taking the lower sideband operation only (left
half of diagrams) the spurious performance for LO leakage
and unwanted sideband suppression (LSB) is always betta

~ ~ 8 e nm
. 1a SPUIIOU. Powwidemi than -25dBc (compared to -18dBc for upper and lower
0.0I sideband operation), fitting well to UWB requirements. The
'I 3;5 ? 4/5 5 5(5 p worse performance for HD3 is due to the use of rectangular
LF signal without dedicated filtering.

The last figure shows a time domain measurement of a

pulsed RF output signal. Since our fastest oscilloscope has
an analog bandwidth of 1.5GH2, the 4.4GHz RF signal was
mixed with 3.6GHz down to a band of 800MHz.Even with
this non-optimum measurement setup the switching time is
less than lnsec.
Il-Nou~OI
16:18.08

Figure 11: FW power vs. output frequency

One can see that the (single ended) RF output power

vanes from -8 to -17dBm. As conclusion an UWB
transceiver will require some kind of adaptive output
power regulation loop to compensate for that.
For the spurious performance the distance to the

Figure 14: Fast-hopping operation: 4usec on time, 6usec

off time. L01=4GHz, LF400MHz

5. Acknowledgements
The authors thank M. Tiebout, C. Kienmayer and P.
Schreilechner for support with the board, D. Draxelmayr, F.
Kuttner, Y.Rashi, E. Shmon for fruitful discussions, and A.
Santner, M. Burian and G. Rauter for layout work.

Figure 12: Spurious power for LO1=4.0GHz 6. References

[I] E. Razavi, "W Microelectronics", PrenticeHall. 1998. p. 151.
[Z] G. Shor et a/, "TG3a-Wisair contribution on multi band
implementation", h ~ : l l ~ u ~ e r . i e e e . o r ~ ~ o u v ~May
~ O2003.
2ll5,
[3] E. Gilbert, "A precise four-quadrant multiplier with
subnanosecondresponse", lEEE Joumal ofSolidState Cimils, Vol.
SC-3, No. 4,pp. 365-73, Dec. 1968.
141N. Da Dalt; C. Sandner, "A subpicosecondjitter PLL for clock
generation in 0.12 pm digital CMOS': IEEE Joumal ofSolid-Sfate
Circuits,July2003,pp. 1275 -1278.

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Figure 13: Spurious power for L02=5.4GHz

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