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ELECTRIC CIRCUITS
R1
I
VR1
VS VR2 R2
A
Figure 1.15. Series resistance circuit
From Ohm’s law,
VR1 I R 1 and VR 2 I R 2 (16)
Substituting these two equations into equation (15) gives
VS I R 1 I R 2 0 (17)
and solving for I yields
VS
I (18)
R1 R 2
Note that, if we had a single resistor of value R 1+R2, we would have the same result.
Therefore resistors in series add and the equivalent resistance of a series resistance circuit is
R1 R 2
R eq R 1 R 2 (19)
By applying KVL to capacitor and inductor circuits, it can be shown that two capacitors in
series combine as
C1 C2 C1 C 2
C eq (21)
C1 C 2
In general, for N resistor connected in series with a total applied voltage of VS, the voltage VRi
across any resistor Ri is
Ri R
VRi VS N i VS
R eq (24)
R j
j1
I
A
I1 I2
VS R1 R2
where Geq is the equivalent conductance and Req is the equivalent resistance. By comparing
the right-hand side of this equation to Equation (27), we get
1 1 1
(30)
R eq R 1 R 2
or
R 1R 2
R eq (31)
R1 R 2
R1
Req
R2
or
1
R eq N
1 (33)
R
i 1 i
By applying KVL to capacitor and inductor circuits, it can be shown that two
capacitors in parallel add:
C eq C1 C 2 (34)
C1
Ceq
C2
Leq
L2
EXAMPLE
As an example of how the tools presented in the previous sections apply to a nontrivial circuit,
consider the following network, where the goal is to find I out and Vout. At any node in the
circuit, such as the one labeled by Vout, the voltage is defined with respect to the ground
reference denoted by the ground symbol ┴. Voltage differences between any two points can
be obtained by taking the difference between the ground-referenced values at the points.
Iout Vout
R3 = 3 kΩ
R1 =1 kΩ V1 = 10 V R5 = 5 kΩ R6 = 6 kΩ
V2 = 20 V
The first step is to combine resistor clusters between and around the sources (V1 and
V2) and the branches of interest (those dealing with Iout and Vout) using the series and parallel
resistance formulas (Equation 19 and 22). The resultant resistances for the equivalent circuit
that follow are
R2 R4 R3
R 234 2.00 kΩ
R2 R4 R3
R5 R6
R 56 2.73 kΩ
R5 R6
+ V234 -
R234
Iout Vout
I234
R1 V1 R56
V2
Applying KVL to the left loop gives
V1 I out R 1
so
V1 10 V
I out 10 mA
R 1 1 kΩ
Note that since V234 was found to be negative, the actual flow of current through R234 would be
in the opposite direction from that assumed in this solution.
Rout
output impedance
Vout
VS
Ideal voltage source
Iout
Rout
IS
output impedance
Ideal current source
ideal ammeter
Iin VR
I
Rin
input impedance
input
impedance
Vin Rin ideal V
voltmeter
EXAMPLE
VS R1 R2 Vm
If the source and meter were both ideal, the measured voltage Vm would be equal to VS and
voltage meter Vm
VS Req Vm
However, if the source has output impedance Zout and the meter has input impedance Zin, the
“real” circuit actually looks like this:
Zout
Zin Vm
Req
real VS
voltage
source real voltmeter
The parallel combination of Req and Zin yields the following circuit (a). Zout and the parallel
combination of Req and Zin are now effectively in series since no current flows into the ideal
meter Vm. Thus, the total equivalent resistance shown in circuit (b) is
R eq Z in
R 'eq Z out
R eq Z in
(b)
(a)
Note that R’eq defined in the previous equation approaches Req as Zin approaches 0. From
voltage division in circuit (a), the voltage measured by the actual meter would be
R eq Z in
R eq Z in R 'eq Z out
Vm VS VS
R eq Z in R 'eq
Z out
R eq Z in
The measured voltage Vm equals VS for Zin = ∞ and Zout = 0, but with a real source and real
meter, the measured voltage could differ appreciably from the expected ideal result. For
example, if R1 = R2 = 1 kΩ,
1.1
R eq k Ω 0.5 k Ω
11
And if Zin= 1 MΩ and Zout = 50 Ω,
0.5 . 1000
R 'eq 0.05 k Ω 0.550 k Ω
0.5 1000
Therefore, if VS = 10 V,
0.550 0.05
Vm 10 V 9.09 V
0.550
This differs substantially from the result that would be expected (10 V) with an ideal source
and meter.