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MAR EPHRAEM

COLLEGE OF ENGINEERING & TECHNOLOGY


Malankara Hills, Elavuvilai– 629171

SCHOOL OF MECHANICAL ENGINEERING


LABORATORY MANUAL
ME6712 - MECHATRONICS LABORATORY

NAME : ____________________________________________________________________________
ROLL NO : ____________________________________________________________________________
REGISTER NUMBER : _____________________________________________________________________________
BRANCH : _____________________________________________________________________________
YEAR : _____________________________________________________________________________

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ME6712 MECHATRONICS LABORATORY

OBJECTIVES:

To know the method of programming the microprocessor and also the design,
modeling & analysis of basic electrical, hydraulic & pneumatic Systems which enable the
students tounderstand the concept of mechatronics.

LIST OF EXPERIMENTS:
1. Assembly language programming of 8085 – Addition – Subtraction – Multiplication –
Division – Sorting – Code Conversion.
2. Stepper motor interface.
3. Traffic light interface.
4. Speed control of DC motor.
5. Study of various types of transducers.
6. Study of hydraulic, pneumatic and electro-pneumatic circuits.
7. Modelling and analysis of basic hydraulic, pneumatic and electrical circuits using
Software.
8. Study of PLC and its applications.
9. Study of image processing technique.

TOTAL : 45 PERIODS

2
CONTENTS
Expt.
Title of the Experiment Page No. Signature
No
1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

11.

12.

13.

14.

15.

16.

3
CYCLE OF EXPERIMENTS

CYCLE 1:

1. Arithmetic operation - addition using 8085


2. Arithmetic operation – subtraction using 8085
3. Arithmetic operation - multiplication using 8085
4. Sorting the numbers using 8085
5. Hexadecimal to decimal conversion
6. Stepper motor controller
7. Interfacing traffic light controller

CYCLE 2:

1. Experiment to determine force exerted by the pneumatic piston at various pressures


2. Experiment to determine velocity of the piston operated by compressed air
3. Sequencing of two pneumatic cylinders using manually operated directional control
valve
4. Sequencing of two pneumatic cylinders using electro pneumatic trainer kit (without
timer)
5. Sequencing of two pneumatic cylinders using electro pneumatic trainer kit (with
timer)
6. Sequencing of two pneumatic cylinders using PLC
7. Design a pneumatic two-cylinder sequencing circuit using automation studio
software
8. Design a pneumatic three-cylinder sequencing circuit using automation studio
software

STUDY EXPERIMENTS:

1. Sequencing of two pneumatic cylinders using tech-soft software


2. Design a pneumatic two-cylinder sequencing circuit using pneumosim software
3. Study on Image Processing

4
5
Experiment No: ARITHMETIC OPERATION - ADDITION USING 8085

AIM:
To write Assembly Language Program to add two 8-bit numbers in various
addressing modes using 8085

8 BIT ADDITION - IMMEDIATE ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry (Commonly C register is used).
2. Get the immediate values in any standard registers (A, B, D....).
3. Perform addition by adding A with other operand which is stored in any
registers & result is stored default in A register.
4. Check if carry flag is set; then increment the C value & store both the values
(A & C) in any memory location. Go to step 6.
5. Otherwise store the value of C & A in any memory location.
6. Execute stop instruction.

MNEMONICS:
MVI C, 00H
MVI A, A6H
MVI B, B6H
ADD B
JNC L1
INR C
L1: STA memory location.
MOV A, C
STA next memory location.
HLT

8 BIT ADDITION-DIRECT ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry.
2. Load the accumulator with the value stored in the memory location.
3. Move the data in accumulator to some other register.
4. Again, load the accumulator with the value stored in the next memory
location.
5. Add values in accumulator and predefined register value.
6. Check if carry flag is set; then increment the C value & store both the values
(A &C) in any memory location. Go to step 8.
7. Otherwise store the value of A & C in any memory location.

6
8. Execute stop instruction.

MNEMONICS:
MVI C, 00
LDA memory location
MOV B, A
LDA next memory location
ADD B
JNC L1
INR C
L1: STA next memory location.
MOV A, C
STA next memory location.
HLT

8 BIT ADDITION- IN DIRECT ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry.
2. Get the memory location in 16-bit register.
3. Move the data in that memory location to the Accumulator.
4. Then, increment the memory location.
5. Add the data in the location with the accumulator value
6. Check if carry flag is set, then increment the C value & store both the values
(A & C) in any memory location. Go to step 8.
7. Otherwise store the value of C & A in any memory location.
8. Execute stop instruction.

MNEMONICS:
MVI C, 00
LXI H, memory location
MOV A, M
INX H
ADD M
JNC L1
INR C
L1: STA next memory location.
MOV A, C
STA next memory location.
HLT

16-BIT ADDITION WITHOUT USING DAD INSTRUCTION


ALGORITHM:
Steps:

7
1. Clear any register for carry
2. Get the 16-bit data & store it in any memory location.
3. Using any two 8-bit register add the lower order bytes & store it in memory
locations.
4. Add the higher order bytes with previous carry & store it in next memory
locations.
5. Check if carry flag is set, then increment the carry register & store the value
in next memory location.
6. Execute stop instruction.

MNEMONICS:
MVI A, 00H
STA memory location (SAY 4300)
LXIH, memory location (SAY430)
MOV C, M
INX H
MOV B, M
INX H
MOV E, M
INX H
MOV D, M
MOV A, E
ADD C
MOV L, A
MOV A, D
ADC B
MOV H, A
JNC L1
MVI A, 01H
STA memory location (SAY 4300)
STA memory location (SAY 4301)
HLT

16-BIT ADDITION USING DAD INSTRUCTION


ALGORITHM:
Steps:
1. Clear any register for carry
2. Load the 16-bit data & store it in any 16-bit register.
3. Directly add the two 16-bit data using DAD instruction.
4. Check if carry flag is set, then increment the carry register & store both the
value in any memory location. Go to step 6.
5. Otherwise store the value of C & A in any memory location.
6. Execute stop instruction

MNEMONICS:

8
LXI D, FFFF
LXI H, 1111
MVI C, 00H
DAD D
JNC L1
INR C
L1: SHLD memory location.
MOV A, C
STA next two memory location
HLT

RESULT:

9
10
Experiment No: ARITHMETIC OPERATION – SUBTRACTION USING 8085

AIM:
1. To write Assembly Language Program to subtract two 8-bit numbers in
various addressing modes using 8085
2. To write Assembly Language Program to subtract two 16-bit numbers

8 BIT SUBTRACTION - IMMEDIATE ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry (Commonly C register is used).
2. Get the immediate values in any standard registers (A, B, D....).
3. Perform subtraction by subtracting A with other operand which is stored in
any registers & result is stored default in A register.
4. Check if carry flag is set; then increment the C value & store both the values
(A & C) in any memory location. Go to step 6.
5. Otherwise store the value of C & A in any memory location.
6. Execute stop instruction.

MNEMONICS:
MVI C, 00H
MVI A, A6H
MVI B, B6H
SUB B
JNC L1
INR C
L1: STA memory location.
MOV A, C
STA next memory location.
HLT

8 BIT SUBTRACTION-DIRECT ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry.
2. Load the accumulator with the value stored in the memory location.
3. Move the data in accumulator to some other register.
4. Again, load the accumulator with the value stored in the next memory
location.
5. Subtract the values in accumulator and predefined register value.
6. Check if carry flag is set; then increment the C value & store both the values
(A &C) in any memory location. Go to step 8.
7. Otherwise store the value of A & C in any memory location.
8. Execute stop instruction.

11
MNEMONICS:
MVI C, 00
LDA memory location
MOV B, A
LDA next memory location
SUB B
JNC L1
INR C
L1: STA next memory location.
MOV A, C
STA next memory location.
HLT

8 BIT SUBTRACTION- IN DIRECT ADDRESSING MODE


ALGORITHM:
Steps:
1. Clear any register for carry.
2. Get the memory location in 16-bit register.
3. Move the data in that memory location to the Accumulator.
4. Then, increment the memory location.
5. Subtract the data in the location with the accumulator value
6. Check if carry flag is set, then increment the C value & store both the values
(A & C) in any memory location. Go to step 8.
7. Otherwise store the value of C & A in any memory location.
8. Execute stop instruction

MNEMONICS:
MVI C, 00
LXI H, memory location
MOV A, M
INX H
SUB M
JNC L1
INR C
L1: STA next memory location.
MOV A, C
STA next memory location.
HLT

16-BIT SUBTRACTION
ALGORITHM:
Steps:
1. Clear any register for carry
2. Get the 16-bit data & store it in any memory location.

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3. Using any two 8-bit register add the lower order bytes & store it in memory
locations.
4. Subtract the higher order bytes with previous carry & store it in next memory
locations.
5. Check if carry flag is set, then increment the carry register & store the value
in next memory location.
6. Execute stop instruction.

MNEMONICS:
MVI A, 00H
STA memory location (SAY 4300)
LXIH, memory location (SAY430)
MOV C, M
INX H
MOV B, M
INX H
MOV E, M
INX H
MOV D, M
MOV A, E
SUB C
MOV L, A
MOV A, D
SBB B
MOV H, A
JNC L1
MVI A, 01H
STA memory location (SAY 4300)
STA memory location (SAY 4301)
HLT

16-BIT ADDITION USING DAD INSTRUCTION


ALGORITHM:
Steps:
1. Clear any register for carry
2. Load the 16-bit data & store it in any 16-bit register.
3. Directly add the two 16-bit data using DAD instruction.
4. Check if carry flag is set, then increment the carry register & store both the
value in any memory location. Go to step 6.
5. Otherwise store the value of C & A in any memory location.
6. Execute stop instruction

MNEMONICS:
LXI D, FFFF
LXI H, 1111

13
MVI C, 00H
DAD D
JNC L1
INR C
L1: SHLD memory location.
MOV A, C
STA next two memory location
HLT

RESULT:

14
15
Experiment no: ARITHMETIC OPERATION - MULTIPLICATION USING 8085

AIM:
To write Assembly Language Programs
1. To perform 8 bit/16bit multiplication by using repeated addition method.
2. To perform 8 bit/16bit division by using repeated subtraction method.

8-BIT MULIPLICATION BY REAPEATED ADDITION


ALGORITHM:
Steps:
1. Clear accumulator & any register for carry
2. Get 2 data & consider one as count.
3. Add the second data to the accumulator with carry & simultaneously
decrement the count register.
4. Check if the count is equal to zero then, store the accumulator value & the
carry register value. Stop the execution.
5. Else repeat the steps from 3.

MNEMONICS:
LDA memory location
MOV C, A
LDA next memory location
MOV B, A
MVI A, 00H
MVI D, 00H
L2: ADD B
JNC L1
INR D
L1: DRC C
JNZ L2
STA next memory location
MOV A, D
STA next memory location
HLT

8-BIT DIVISION BY REPEATED SUBTRACTION


ALGORITHM
Steps:
1. Clear any register for carry.
2. Get a data in accumulator and another data in any other reg.
3. Compare both the data.
4. If carry is set, go to step 6.
5. Else subtract the numbers & increment carry reg.Go to step 3.
6. Store the quotient (carry register) & remainder (accumulator) in some
memory location.

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7. Execute stop instruction.

MNEMONICS:
MVI C, #00
MVI A, #15
MVI B, #03
L1: CMP B
JC L2
SUB B
INRC
JMP L1
L2: STA next memory location
MOV A, C
STA next memory location
HLT

16-BIT MULTIPLICATION BY REPEATED ADDITION


ALGORITHM:
Steps:
1. Clear any register for carry.
2. Get the 16-bit data & consider one as count.
3. Using DAD instruction, add the second data to the accumulator with carry &
simultaneously decrement the count reg.
4. Check if count is equal to zero then, store the accumulator value & the carry
register value. stop the execution
5. Else repeat the steps from 3
6. Execute stop instruction.

MNEMONICS:
LXI B, 0000
LXI D, FFFF
LXI SP, 1111
LXI H, 0000
L2: DAD SP
JNCL1
INX B
L1: DCX D
MOV A, D
ORA E
JNZ L2
SHLD memory location
MOV A, C
STA next two memory location
MOV A, B
STA next memory location

17
HLT

16-BIT DIVISION BY REPEATED SUBTRACTION


ALGORITHM:
Steps:
1. Clear any register for storing remainder.
2. Get the two 16-bit data
3. Get a LSB 8-bit data in accumulator and another data in other reg
4. Compare both the data.
5. If carry is set, go to step 7.
6. Else subtract the numbers & increment carry reg. Go to step 4.
7. Store the quotient (carry register) & remainder (accumulator) in some
memory location.
8. Get the MSB 8-bit data & continue the steps 4 to 7.
9. Execute stop instruction.

MNEMONICS
LXI BC,0000
LXI HL,#16 BIT DATA
LXI DE, #16 BIT DATA
MOV A,H
L2 CMP D
JC L1
MOV A,L
SUB E
MOV L,A
MOV A,H
SBB D
MOV H,A
INX B
JMP L2
L1 SHLD 16 BIT ADDRESS
MOV A,B
STA NEXT ADDRESS
MOV A,C
STA NEXT ADDRESS
HLT

RESULT:

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Experiment No: SORTING THE NUMBERS USING 8085

AIM:
To write Assembly Language Program using 8085
1. To sort the given numbers in ascending order.
2. To sort the given numbers in descending order

ASCENDING ORDER
ALGORITHM:
Steps:
1. Get the no. of data as count. Initialize the pointer value
2. Get the array of data
3. Compare the first 2 data
4. Place the smallest number in the accumulator
5. Decrement the count. Check if count = 0 then go to step 7
6. Get the data & compare with accumulator. Go to step4
7. Decrement the pointer Assign the value to count
8. Check if pointer value is not equal to zero, then go to step 3
9. Stop the execution.

MNEMONICS:
LXI H, memory location
MVI C, 05H
DCR C
L4: MOV D, C
L2: MOV A, M
INX H
MOV B, M
CMP B
JNC L1
L3: DCR C
JNZ L2
LXI H, memory location
MOV C, D
DCR C
JNZ L4
JMP L5
L1: MOV A, B
DCX H
MOV B, M
MOV M, A
INX H
MOV M, B
JMP L3
L5: HLT

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DESCENDING ORDER
ALGORITHM:
Steps:
1. Get the no. of data as count. Initialize the pointer value
2. Get the array of data
3. Compare the first 2 data
4. Place the largest number in the accumulator
5. Decrement the count. Check if count = 0 then go to step 7
6. Get the data & compare with accumulator. Go to step4
7. Decrement the pointer Assign the value to count
8. Check if pointer value is not equal to zero, then go to step 3
9. Stop the execution.

MNEMONICS:
LXI H, memory location
MVI C, 05H
DCR C
L4: MOV D, C
L2: MOV A, M
INX H
MOV B, M
CMP B
JC L1
L3: DCR C
JNZ L2
LXI H, memory location
MOV C, D
DCR C
JNZ L4
JMP L5
L1: MOV A, B
DCX H
MOV B, M
MOV M, A
INX H
MOV M, B
JMP L3
L5: HLT
RESULT:

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Experiment No: HEXADECIMAL TO DECIMAL CONVERSION

AIM:
To write an assembly language program to convert hexadecimal to decimal data
using 8085-microprocessor kit. & Decimal to Hexadecimal Conversion

APPARATUS REQUIRED:
8085 Microprocessor Kit
Power Chord

PROCEDURE:
Step1: Start the program.
Step2: Load data from memory to accumulator and move the data 00 to D and E
registers.
Step3: Compare the accumulator data with the data 64.
Step4: If carry=0 jump to Step 6 else jump to Step 5.
Step5: Jump to Step 10. Step6: Subtract accumulator data by 64.
Step6: Increment the content of D register once.
Step7: If carry=0 jump to Step 6 else jump to Step 9.
Step8: Decrement the content of D register once and add data 64 with accumulator.
Step9: Subtract accumulator data by 0A and Increment E register content once.
Step10: If carry=0 jump to Step 10 and Decrement E register content once.
Step11: Add data 64 with accumulator and move it to C register.
Step12: Move E register content to accumulator.
Step13: Rotate the accumulator content 4 tines by left.
Step14: Add C register content with accumulator content.
Step15: Store data in accumulator pair to specified memory
Step16: Move D register content to accumulator
Step17: Store data in accumulator pair to specified memory.
Step18: End.

HEXADECIMAL TO DECIMAL CONVERSION:


MNEMONICS
MVI C,004
MOV B,C
LXI H,4300
MOV A,M
CPI 64
JC L1
SUI 64
INR C
JMP L3
CPI 0A
JC L2
SUI 0A

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INR B
JMP L1
INX H
MOV M,C
INX H
MOV M,B
INX H
MOV M,A
HLT

DECIMAL TO HEXADECIMAL CONVERSION


MNEMONICS:
LXI H 4300
MOV A, M
MOV B, M
ANI 0F
MOV C, A
MOV A, B
RRC
RRC
RRC
RRC
ANI 0F
MOV B, A
XRA A
CMP B
JC L1
ADI OA
DCR B
JNZ L2
ADD C
INX H
MOV M , A
HLT

RESULT:

22
Experiment No: STEPPER MOTOR CONTROLLER

AIM:
To write a program for interfacing stepper motor and to run the motor in different
directions and in different speeds.

ALGORITHM:
Step1: Start the program.
Step2: Load HL register pair with memory address at look up.
Step3: Move the contents of HL pair to accumulator.
Step4: Out the contents of accumulator to run the motor.
Step5: Decrease b register. If register content is not zero then rotate the motor
continuously.
Step6: If zero then move to the Beginning of the program.
Step7: Stop the process.

PROGRAM:
START: LXI H,LOOK UP
MVI B, 04
REPT: MOV A,M
OUT 0C0H
LXI D, 0303H
DELAY NOP
DCX D
MOV A,E
ORA D
JNZ DELAY
INX H
DCR B
JNZ REPT
JMP START
LOOK UP: DB 09 05 06 0A

RESULT:

23
Experiment No: INTERFACING TRAFFIC LIGHT CONTROLLER

AIM:
To interface a traffic light controller with microprocessor 8085 and to control the
flow of traffic at a four-way junction.

APPARATUS REQUIRED:
Microprocessor kit 8085
+5V supply
Traffic Light Controller Interfacing Kit.

INTRODUCTION:
The board is a simple contraption of a traffic control system wherein the
signalling lights are simulated by the blinking ON-OFF control of light emitting
diodes. The signalling lights for the pedestrian crossing are simulated by the ON-OFF
control of dual colour light emitting diodes.
A model of four road lane junction, the board has green, yellow and red LED
which are the green, orange and red signals of the actual system. Twenty LEDs are
used on the board. In addition, eight dual colour LEDs are used which can be made
to change either to red or to green.

CIRCUIT DESCRIPTION:
The control of the LED is as follows:
The board communicates with the microprocessor trainer by means of a 26
core cable which is connected to the output of any parallel port of V1 range of
trainers
The outputs are the input to buffers 7406 whose outputs drive LEDs. The
buffered output applied to the anode of the LEDs decides whether it is ON or OFF.
The figure below shows the LED positions and the port lines which control
the LED.

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PROGRAM:
ORG 4100H
CNT EQU 0FH
APRT EQU 0CH
BPRT EQU 0DH
CPRD EQU 0EH
START: LXI H, DATA
MVI C, 0C
MOV A, M
OUT CNT
INX H
LOOP1: MOV A,M
OUT APRT
INX H
MOV A,M
OUT BPRT
CALL DELAY
INX H
DCR C
JNZ LOOP1
JMP START
DELAY: PUSH B
MVI C, 05
LOOP3: LXI D, FFFF
LOOP2: DCX D
MOV A,D
ORA E
JNZ LOOP2
DCR C
JNZ LOOP2
POP B
RET

4500 80 1A A1 64 DATA DB 80, 1A, A1, 64


4504 A4 81 5A 64 A4, 81, 5A, 64
4508 54 8A B1 A8 DB 54, 8A, B1, A8
450C B4 88 DA 68 B4, 88, DA, 68
4510 D8 1A E8 46 DB D8, 1A, E8, 46
4514 E8 83 78 86 74 E8, 83, 78, 86, 74

RESULT:

25
Experiment No: EXPERIMENT TO DETERMINE FORCE EXERTED BY THE
PNEUMATIC PISTON AT VARIOUS PRESSURES

AIM:
To determine experimentally the force exerted by the piston at various pressures
and verify the same with the theoretical value calculated.

APPARATUS REQUIRED:
Double Acting Pneumatic Cylinder
Flow Control Valve
Weights and Pulley
Filter-Regulator-Lubricator Unit
Polyurethane Tubes

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Adjust the FRL and set the pressure as 3 bars.
3. Operate the directional control valve so that the cylinder extends.
4. Add 1Kg weight to the hanger attached to the piston rod of cylinder and lift it by
retracting the cylinder by operating the directional control valve.
5. Add more weights and observe the maximum weight the piston can lift
corresponding to the pressure set.
6. Repeat the above procedure and take readings at pressure at 4, 5 and 6 bars and
tabulate the readings.
7. Draw the graph between pressure and force exerted.

FORMULA:
Theoretical Force = Pressure applied (N/m2) X Area of the piston (m2)

Actual Force = Mass (kg) X Acceleration due to gravity (m/s 2)

% Difference = (Theoretical Force- Actual Force) / Theoretical Force

26
CIRCUIT:

TABULATION:

Mass of
S. Pressure Theoretical Actual Force %
Weights
No. in Bars Force (N) (N) Difference
(kg)

Diameter of the cylinder, D=32mm


Diameter of the piston, d=12mm

RESULT:

27
Experiment. No: EXPERIMENT TO DETERMINE VELOCITY OF THE PISTON
OPERATED BY COMPRESSED AIR

AIM:
To determine experimentally the Velocity of the piston operated by Compressed air,
for various flow rate of the air.

APPARATUS REQUIRED:
Double Acting Pneumatic Cylinder
Flow Control Valve
Timer setup
Filter-Regulator-Lubricator Unit
Polyurethane Tubes
Proximity Sensors

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Keep the flow control valve slightly open.
3. Operate the directional control valve so that the cylinder extends and reaches the
puter most position.
4. Now reset the timer unit.
5. Once again operate the directional control valve.
6. Note down the time taken by the return stroke.
7. Measure the distance between the two sensors.
8. Now open the flow control valve more and repeat the above procedure.
9. Repeat the same and take 3 or 4 sets of reading and tabulate the observed values.
10. Use the formulae and calculate the velocity for various openings.
11. Draw the graph between pressure and velocity.

TABULATION:
Distance between the Proximity Sensors = ________ mm.

Pressure Time taken Velocity


S. No.
in Bars (Secs) (m/s)

28
CIRCUIT:

FORMULA:
Velocity = Distance travelled (m) / Time taken (sec)

RESULT:

29
Experiment No: SEQUENCING OF TWO PNEUMATIC CYLINDERS USING MANUALLY
OPERATED DIRECTIONAL CONTROL VALVE

AIM:
To perform sequencing of two pneumatic cylinders (A and B) in the order of A +B+A-
B- using manually operated directional control valves.

APPARATUS REQUIRED:
FRL Unit
Flow Control valve
5/3 manually operated directional control Valve
Pilot Operated 5/2 directional control Valve
3/2 Poppet Valve with roller lever
Double Acting Pneumatic Cylinder
Polyurethane Tubes

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Adjust the FRL and set the pressure as 6 bars.
3. Operate the 5/3 valve from neutral position such that A+ occurs.
4. Observe that the cam releases the lever of the poppet valve 1 as soon as cylinder A
extends.
5. When A+ is completed, the cam presses the lever of poppet valve 2 giving air supply
to cylinder B and it extends to complete B +
6. Now operate the 5/3 valve so that B- occurs.
7. Observe how the cam operates now to complete A- automatically.

30
CIRCUIT:

RESULT:

31
Experiment No: SEQUENCING OF TWO PNEUMATIC CYLINDERS USING ELECTRO
PNEUMATIC TRAINER KIT (WITHOUT TIMER)

AIM:
To perform sequencing of two pneumatic cylinders (A and B) in the order of A +B+A-B-
using electro pneumatic trainer kit.

APPARATUS REQUIRED:
FRL Unit
Flow Control valve
5/3 solenoid operated directional control Valve
5/2 solenoid directional control Valve
Electro pneumatic trainer
Double Acting Pneumatic Cylinder
Polyurethane Tubes and Electrical wires

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Give connections from 24V DC supply to relays and solenoids as shown in figures.
3. Adjust the FRL and set the pressure as 6 bars.
4. Switch on the electric supply.
5. Observe the sequencing of cylinders being carried out automatically.

32
CIRCUIT:

RESULT:

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Experiment No: SEQUENCING OF TWO PNEUMATIC CYLINDERS USING ELECTRO
PNEUMATIC TRAINER KIT (WITH TIMER)

AIM:
To perform sequencing of two pneumatic cylinders (A and B) in the order of A +B+
and B-A- after 5 seconds using timer incorporated electro pneumatic trainer kit.

APPARATUS REQUIRED:
FRL Unit
Flow Control valve
5/3 solenoid operated directional control Valve
5/2 solenoid directional control Valve
Electro pneumatic trainer
Double Acting Pneumatic Cylinder
Polyurethane Tubes and Electrical wires

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Give connections from 24V DC supply to relays and solenoids as shown in figures.
3. Adjust the FRL and set the pressure as 6 bars.
4. Switch on the electric supply.
5. Observe the sequencing of cylinders being carried out automatically.

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CIRCUIT:

RESULT:

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Experiment No: SEQUENCING OF TWO PNEUMATIC CYLINDERS USING PLC

AIM:
To perform sequencing of two pneumatic cylinders (A and B) in the order of A +B+ A-
B using PLC.
-

APPARATUS REQUIRED:
FRL Unit
Flow Control valve
5/3 solenoid operated directional control Valve
5/2 solenoid directional control Valve
PLC pneumatic trainer
Double Acting Pneumatic Cylinder
Polyurethane Tubes and Electrical wires

PROCEDURE:
1. Connect the FRL unit, Control valves, directional control valves and cylinders as
shown in the circuit.
2. Draw the functional block diagram using PLC software and save it in the computer.
3. Give connections between PLC and PC using USB port and download the program to
the PLC.
4. Give connections from the reed switches to the PLC input and from the PLC output to
the respective solenoid valves.
5. Adjust the FRL and set the pressure as 6 bars.
6. Switch on the electric supply.
7. Execute the program from the PLC and observe the sequencing of cylinders being
carried out automatically.

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EVENT TABLE:

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CIRCUIT:

RESULT:

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Experiment No: DESIGN A PNEUMATIC TWO CYLINDER SEQUENCING CIRCUIT
USING AUTOMATION STUDIO SOFTWARE

AIM:
To design a circuit for the sequence A+B+A-B- using Automation Studio software.

REQUIREMENTS:
Personal Computer
AUTOMATION STUDIO Software

PROCEDURE:
1. Open the software in the personal computer.
2. Select the new file in it.
3. Click on the supply elements and then select, copy, paste the compressor.
4. Click and then select, copy, paste the single and double acting cylinder.
5. Then select, copy, paste the 3/2, 5/2 single and double solenoid valve.
6. Connect all the components.
8. Start and simulate the single, double acting cylinders.

CIRCUIT:

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RESULT:

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Experiment No: DESIGN A PNEUMATIC THREE CYLINDER SEQUENCING CIRCUIT
USING AUTOMATION STUDIO SOFTWARE

AIM:
To design a circuit for the sequence A+B+C+A-B-C- using Automation Studio
software.

REQUIREMENTS:
Personal Computer
AUTOMATION STUDIO Software

PROCEDURE:
1. Open the software in the personal computer.
2. Select the new file in it.
3. Click on the supply elements and then select, copy, paste the compressor.
4. Click and then select, copy, paste the single and double acting cylinder.
5. Then select, copy, paste the 3/2, 5/2 single and double solenoid valve.
6. Connect all the components.
8. Start and simulate the single, double acting cylinders.

CIRCUIT:

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RESULT:

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Experiment No: SEQUENCING OF TWO PNEUMATIC CYLINDERS USING TECH-SOFT
SOFTWARE

AIM:
To perform sequencing of two pneumatic cylinders (A and B) in the order of A +B+ B-
A- using tech- soft software and verify it by simulation and to prepare function block
diagram and event table.

APPARATUS REQUIRED:
Personal Computer
Tech-Soft Software

PROCEDURE:
1. Open the Tech-Soft software in the system.
2. Select Hydraulic circuit design option.
3. Enter the details of force required, velocity, pressure etc..,
4. Next enter the events one by one. Events are entered by indicating the position of
reed switches.
5. Now, go the animation tab, run the animation and verify the sequence of operation.

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CIRCUIT:

RESULT:

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Experiment No: DESIGN A PNEUMATIC TWO CYLINDER SEQUENCING CIRCUIT
USING PNEUMOSIM SOFTWARE

AIM:
To design a circuit for the sequence A+B+A-B- using pneumosim software.

REQUIREMENTS:
Personal Computer
Pneumosim Software

PROCEDURE:
1. Open the software in the personal computer.
2. Select the new file in it.
3. Click on the supply elements and then select, copy, paste the compressor.
4. Click and then select, copy, paste the single and double acting cylinder.
5. Then select, copy, paste the 3/2, 5/2 single and double solenoid valve.
6. Connect all the components.
8. Start and simulate the single, double acting cylinders.

CIRCUIT:

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RESULT:

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Experiment No: STUDY ON IMAGE PROCESSING

AIM:
At the end of the lab session, students will have the information’s on image, digital
image, and the processing techniques. Image
An image may be defined as a two dimensional function f(x,y), where ‘x’ and ‘y’ are
spatial coordinates, and the amplitude of ‘f’ at any pair of coordinates x,y is called intensity
or gray level of the image at that point.

DIGITAL IMAGE:
‘x’, ’y’ and the amplitude ‘f’ are all finite and discrete quantities means then the
image is called as digital image.

DIGITAL IMAGE PROCESSING:


The field of digital image processing refers to processing of digital images by a
digital computer. Each object has finite number of pixels or pels or image elements or
picture elements.

IMAGE RESOLUTION:
Image resolution is defined as the number of pixels that can be accommodated in a
unit area. Image resolution depends on number of values for N and number of bits used in a
gray level (m). If N and ‘m’ is high, then the resolution will be more.

HUE:
Hue is an attribute associated with the dominant wavelength in a mixture of light
waves. Thus hue represents dominant color as perceived by an observer eg., red, yellow.
Saturatio
It refers to relative purity or the amount of white light mixed with the hue. The pure
spectrum colors are fully saturated (RGB).Color such as pink and lavender are less
saturated. ie., The degree of saturation being inversely proportional to the amount of white
light added. Hue and saturation taken together are called chromoticity.

IMAGE HISTOGRAM:
An image histogram is a type of histogram that acts as a graphical representation of
the tonal distribution in a digital image. It plots the number of pixels for each tonal value.
The left side of the horizontal axis represents the black and dark areas, the middle
represents medium grey and the right hand side represents light and pure white areas. The
Vertical axis represents the size of the area that is captured in each one of these zones. The
histogram for the very dark image will have the majority of its data points on the left side
and centre of the graph. The histogram for the very bright image with few dark areas is
shadows will have most of its data points on the right side and the centre of the graphs.

FFT TRANSFORM:
Typically, 2-D-Fourier transform (2-D-FT) is used as the representation of complex
SAR images. However, the energy of the coefficients of 2-D FT on the complex SAR image

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distributes in the whole frequency domain. Generally, the frequency signals are divided into
real and imaginary parts, and quantized with Lloyd-Max quantizer However, the
compression ratios of the frequency domain compression algorithms are almost limited in
10.4:1o r 9.8:1, which are not very high. Wavelet transform can locally analyze time and
frequency in multiscale and shows very strong decorrelation ability. As it is particularly
suitable for nonstationary signal processing, wavelet transform has been applied to
complex SAR image compression currently; most compression algorithms of complex SAR
image adopt the traditional wavelet transform. However, for the complex SAR images,
which are rich in edges and texture, traditional wavelet transform does not show efficient
representation. proposed an algorithm which extracted edges of SAR image with wedge let
transform and encoded the edges and texture separately. used 2-D oriented wavelet
transform for remote sensing compression.
The SAR images used in are not complex SAR images. To the best of our knowledge,
directional wavelet transform has not be applied to the compression of complex SAR
images. Directional wavelet transform achieves the direction extraction while keeping the
property of multiscale analysis of discrete wavelet transform (DWT). Directional wavelet
transform can be divided into two classes:
Frequency-domain transform and spatial-domain transform.
The frequency-domain directional wavelet transform, such as contour let which
continuously performs directional filter on the high-frequency sub bands of wavelet
transform, gives an efficient representation of the edges at the cost of high
redundancy.
The spatial-domain directional wavelet, such as directional lifting wavelet transform
(DLWT), employs direction prediction for wavelet decomposition, which adapts the wavelet
transform direction to the image edges. DLWT integrates spatial direction prediction into
the wavelet transform lifting framework, provides an efficient representation of edges
along multiple directions of images, and thus reduces the energy of high-frequency bands
and achieves more energy clustering.
As the real parts and imaginary parts of complex SAR image as well as the real image
of fast FT (FFT) are rich in edges, two complex SAR image coding schemes using DLWT are
proposed. Fourier Transform (FT) with its fast algorithms (FFT) is an important tool for
analysis and processing of many natural signals. FT has certain limitations to characterise
many natural signals, which are nonstationary (e.g. speech).
Wavelet compression system consists of several components:1) filters and
algorithms for performing wavelet decomposition and reconstruction, 2) a bit allocation
strategy, and 3) quantizers. In order to minimize algorithm complexity and to reduce
susceptibility to channel errors, the quantizer output is not encoded with an entropy or
arithmetic coder. Side information concerning normalization and bit allocation can be
coded in only a few bits for an entire image.
The wavelet transform is a relatively new technique for decomposition of a data set with
orthogonal (ornonorthogonal) basis functions and is becoming widely used in image
compression. The orthogonal wavelet decomposition provides a multi resolution
representation of a signal over an orthonormal basis. It offers several advantages for SAR
data compression:

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1. The decomposition of an image into a representation selective both in frequency
and spatial orientation allows allocation of quantization bits to "important" components.
2. Algorithms for performing a wavelet decomposition and reconstruction are
recursive, computationally efficient, and easily implemented in hardware. The computation
of a wavelet transform, as described by Mallat, has a computational burden on the order of
& V' Fast wavelet transform algorithms can reduce the computational burden
3. The decomposition of an image into a pyramid of detail images results in a set of
coefficients that have reduced dynamic range compared to the original image. This is
particularly important for compression of SAR imagery due to its very large dynamic range.
4. A wavelet multiscale decomposition of an image is convenient for progressive
image transmission. A coarse resolution image can be selected from a sensor or database,
and then a) browsed at coarse resolution for data quality, data validation, correct location,
etc. and or processed by algorithms which require only coarse resolution input data, or b) a
subset of the image can be transmitted and displayed at the finest available resolution.

RESULT:

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