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An Example
HOW is it done?
1. Consider each current and voltage in the circuit as the sum of two parts: R
vin
a BIAS (or QUIESCENT) component, and a SIGNAL component
V D + vd
VIN ID + id
2. Analyse the circuit in two stages, considering first the bias components
and then the signals. These separately satisfy Kirchhoff’s Laws:
FULL CIRCUIT
Full Circuit in Full Circuit Small-Signal
Quiescent state with Signals Equivalent Circuit
I1 I2 + i2 I1 + i1 i1
I2 i2
R R
rd = VT/ID
I4 I4 + i4 i4 VIN vin vd
I3 I3 + i3 i3 VD
ID id
In = 0 and (In + in ) = 0 in = 0
BIAS CIRCUIT SMALL-SIGNAL
EQUIVALENT CIRCUIT
3. At each stage, use suitable approximations to describe non-linear circuit
elements: • KVL in BIAS CCT gives:
e.g. id = gdvd for a forward biased diode and we also know that id = vd/rd, so
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 1 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 2
Small-Signal Equivalent Models
Small-Signal Equivalent Models
2-Terminal Devices
2-Terminal Devices
• DYNAMIC RESISTANCE
I = const
DC current source
For 2-Terminal devices where the I-V relationship depends only on the rd open-circuit
instantaneous values of I and V, the SSEM is a resistor with value rd,
where:
Resistor V=IR
rd = [dV/dI]OP (2.3) R rd = R
Here []OP indicates that the derivative is evaluated at the operating point Junction diode I = I0 exp(V/VT)
(forward biased)
rd = VT /I
Examples: resistor (rd = R), diode at low frequency
Capacitor Q=CV
• DYNAMIC CAPACITANCE
C cd = C
For devices where the current depends on the rate of change of the
voltage across the terminals, we can describe this dependence in terms NB Second order and high frequency effects neglected
of a dynamic capacitance cd:
cd = [dQ/dV]OP (2.4)
This is similar to the usual capacitor equation (i.e. C = Q/V), except that
we are now allowing the stored charge Q to be a non-linear function of
the applied voltage
Examples: capacitor (cd = C), diode at high freq (cd appears in parallel
with rd)
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 3 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 4
Small-Signal BJT Model - 1 Small-Signal BJT Model - 2
(VCCS version, neglecting ro) (ICCS version, neglecting ro)
• Need an SSEM to describe the relationship between the signals ib, ic, vbe • Often we will want to express ic in terms of ib, using a current-controlled
and vce in active mode current source (ICCS):
Given large-signal relationships:
IC = IS exp(VBE/VT) ib ic
B ib ib C
IB = IC / = (IS /) exp(VBE/VT) rbe
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 5 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 6
Small-Signal BJT Model - 3 C-E Amplifier Revisited
The Early Effect Quiescent Analysis
• For a real transistor, IC does show some dependence on VCE:
IC
VCC VCC
IC VBIAS = VCC RB2
_________
(RB1 + RB2 )
RC RC
RB1 RB = (RB1 //RB2 )
VCE
COUT RB
VBE CIN
incr
VBE V IN VOUT
RB2 VBIAS
RE CE RE
VCE
0 FULL CIRCUIT BIAS CIRCUIT
-VA
• All curves, when extrapolated, cross the VCE axis at roughly the same • CIN, COUT and CE open-circuit at DC omit from bias CCT
point (-VA, 0). VA is the EARLY VOLTAGE, which normally lies in the
range 50 to 100 V
• KVL on input side of bias CCT gives:
• Equation 1.2 becomes:
VBIAS = IB RB + VBE + IE RE
IC = IS.exp(VBE/VT).(1 + VCE/VA) (2.10)
VBE 0.7 V, IE = (1 + )IB
• Finite slope of the IC-VCE curve represents a SMALL-SIGNAL IE (VBIAS - 0.7)/[RE + RB/(1 + )] (2.12)
OUTPUT RESISTANCE ro:
ro = [VCE/IC]OP VA/IC (2.11) NOTE: IE now shows some dependence on as a result of the finite
source impedance of VBIAS. However, we can minimise this by making
RB << (1 + )RE.
• So SSEM becomes:
B gmvbe
C gm = IC /VT • As before:
rbe
IC = IE
vbe ro ro = VA /IC
rbe = /gm and the quiescent voltages at the transistor terminals are:
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 7 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 8
C-E Amplifier Revisited C-E Amplifier Revisited
Small-Signal Analysis - 1 Small-Signal Analysis - 2
• Assume capacitors are so large that they are effectively short-circuit at Small-Signal response can be characterised by three parameters:
signal frequencies:
• VOLTAGE GAIN:
VCC
Av = - gm (RC//ro) (2.14)
RC
RB1
[since vout = -gmvbe(RC//ro), and vbe = vin ]
O/P
I/P COUT
CIN Similar to Equn 1.10, except that we are now taking the finite output
resistance of the transistor into account
RB2 e.g. If VA = 100 V and IC = 1 mA, then ro = VA /IC = 100 K. In this case
RE CE
the voltage gain with RC = 10 K is reduced from 400 (assuming ro
infinite) to 364
FULL CIRCUIT
• INPUT RESISTANCE:
Ri tells us about the loading effect imposed by the amplifier on the input
gmvbe
CIN COUT signal source. Usually it is dominated by the transistor input resistance
vbe rbe ro rbe
RB1 RB2 RC
vin vout • OUTPUT RESISTANCE:
RE CE Ro = (RC//ro) (2.16)
Also of interest:
gmvbe
• CURRENT GAIN Ai, which is the ratio of the short-circuit output
vbe rbe ro
current to the input current. This can be deduced from Av, Ri and Ro:
RB1 RB2 RC
vin vout
Ai = AvRi/Ro
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 9 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 10
Emitter Degeneration - 1 Emitter Degeneration - 2
• Overall Ri now given by:
What happens if we leave out the bypass capacitor?
Ri = RB//[rbe + (1 + ) RE] (2.19)
VCC
• and vout = - ibRC, so Av given by:
RC
RB1 Av = - RC /[rbe + (1 + ) RE] (2.20)
vin = [rbe + (1 + ) RE] ib (2.18) • Improves linearity (only a fraction of the input voltage appears
across the base-emitter junction)
So, RE increases the apparent input resistance at the base of the
transistor from rbe to [rbe + (1 + ) RE] • Improves the high-frequency performance of the amplifier
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 11 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 12
Amplifier Macromodels
• Given Av, Ri and Ro, we can replace an entire amplifier by its Small-
Signal Equivalent Model:
Ro
Input vin Ri Av vin ~ Output
• We can use the macromodel to determine how the amplifier will interact
with other circuits at its input or output. e.g.
RS Ro
vS ~ vin Ri Av vin ~ RL vL
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 13 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 14
AC- and DC-Coupled Circuits - 1 AC- and DC-Coupled Circuits - 2
• Stages inside chip are DC-COUPLED, so their bias conditions are CIN(RS + Ri ) = 1
interrelated
NB LOG-LOG plot
• Bias condition for entire circuit is established by external negative
feedback COUT(Ro + RL) = 1
Cont’d ...
EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 15 EE1&ISE1 Analogue Electronics 2008/2009 - Part 2 ASH 16
ANALOGUE ELECTRONICS
PROBLEMS 2
1. You are asked to analyse a circuit containing a BJT with a of 200 and an Early voltage
of 100 V. Bias analysis shows that the transistor is in active mode, and that the quiescent
collector current is 2 mA. Draw a small-signal equivalent model of the device, and assign
values to the parameters rbe, gm and ro.
2. (a) Calculate the collector bias current and the quiescent output voltage for the amplifier
in Figure Q2.
(b) Draw a small-signal equivalent circuit for the amplifier, and determine the small-
signal parameters Ri (input resistance), Ro (output resistance) and Av (voltage gain).
+5V
3 k
430 k
O/P
I/P = 100
VA = 120 V
Figure Q2
3. The figure below shows a common-emitter amplifier with a bypassed emitter resistor.
The transistor has a of 50 and an Early voltage of 100 V. Calculate the quiescent output
voltage VOUT, and the small-signal voltage gain vout/vin for this circuit. You may assume
that the bypass capacitor C is effectively short-circuit at signal frequencies.
+ 20 V
3.3 k
VOUT + vout
vin ~
4V 1.1 k C
(b) Draw a small-signal equivalent circuit of the amplifier, and determine the parameters
Ri, Ro and Av, assuming the transistor has infinite small-signal output resistance.
+20 V
10 k
330 k
O/P
I/P
= 200
43 k
1.5 k
Figure Q4
5. To achieve a higher voltage gain, two amplifier stages similar to the one in Question 4 are
cascaded as shown below. Coupling capacitors are used to provide DC isolation between
the signal source and the first stage, and between the two stages.
C1 C2
Stage 1 Stage 2
Draw a small-signal equivalent circuit for the two-stage amplifier, in which each stage is
represented by a macromodel. Hence calculate the overall small-signal voltage gain
vout/vin, assuming the coupling capacitors are effectively short-circuit at signal
frequencies.
NOTE: fc is the frequency at which the low-freq and high-freq asymptotes of the
frequency response meet.
R1 C
vi R2 vo
Figure Q6
Using the above result, calculate the cut-off frequencies associated with the coupling
capacitors in the amplifier of Question 5, assuming C1 = 47 nF and C2 = 220 nF. Hence
sketch the variation of the overall voltage gain with frequency in the low-frequency and
mid-band regions.
7. Show that the small-signal voltage gain of the amplifier below is given by:
Av = - (gm - 1/RB).(RC//ro//RB)
VS
RC
RB O/P
I/P