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74
VHF COM MUNICATIONS 2/97
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A ze ro-If PSK rece iver incl udes a transceiver for 23cm. Th e 23cm band
quad rature mixer that provides two offers suff icient bandw idth for 1.2 Mbit!
o utput signals I' and Q' with the same 50 operation. Further, the who le trans-
ban dwidth as in a di rect-conversion RX. ceiver can be buill on conventional,
The s ignals r and Q' conta in all of the inexpensive g fassfibre-epoxy lam inate
in form ation of tbc input RF signal, but FR4. Finally, the prop agation losses
they do not represent the demodulated without optical visibility arc sma ller in
signa l yet. the 23cm band than at higher microwave
frequencies .
S ince the zero- lf' RX contains a trcc-
running LO, its phase is certa inly not A direct-co nversion I)SK transcei ver for
matched 10 the transmitter. Further, if 23cm proved very simple. The signal
the re is a difference between the fre- and error amplifiers used j ust one
quc nci cs of the transmitter and o f the LM311 voltage comparator each. ooerar-
recei ver. the phasor represented hy the 109 as a limiting ampl ifier. The only
I' and Q' signals will rotat e 'II a rate limitation of this tran sceiver was the
corresponding to the difference orthe VCX O ,
two fre quencies.
Due to th e unde fined dynam ic respons e
1'0 d emod ulate the information. the I' o f the VCXO, the capturing range or the
and Q ' signals have to be fed to a phase Costas-loop KX was only about ~ 1i-5
shifter to counter-rotate the phasor. The kHz. Further, even this Fig.ure was
phase shifter is kept synchronised to the hard ly reprod ucible, since even two
correc t phase and rate by a Cos tas-loop crystals from the same manufacturing
feedba ck. Since the who le Costas-loop batch had a quite d ilfcrcnt dynamic
demodulator operat es at high signa l response in the VC XO .
leve ls and at relat ively low frequencies,
A zero-IF 23cm ?SK transceiver rc-
it ca n be built with ine xpensive
sultcd slightly more complex. due to the
74HCxxx logic circuits thai require no
linear IF amplificat ion with AGC and
tunin g at all !
the add itional Co stas-loo p demod ulator.
A zero-IF PSK receiver requires linear O n the other hand, the zero-Itt 23cm
ampli fication of the r and Q ' signa ls. I)SK transceiv er res ulted fully reproduc-
Limitin g of the rand Q' signals is very ible, since there are no crit ical parts or
harm ful to the overa ll signa l-to-no ise unstable circuits built in.
rat io. If the zero-It' amplifiers arc AC
Since the addi tional comple xity of the
coup led . data randomisat ion (scram-
zero-If tran sceiver is in the IF part,
hling) is required. On the other hand, a
using on ly cheap components and no
zero-If PSK transceiver docs not in-
tuning points, it docs not add much to
cl ude any critical stages or unstable
the overall comp lexity of th e trans-
rc-edb ack loops and is th erefore easily cerver.
reproduc ible.
Search ing for a simple PSK transce iver
design , I attempted to build both a
direct-c onversion and a zero -If I)SK
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VHF CO MMUNICAT IONS 2/97
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VHF COMMUNICATIONS 2197
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Fig.7: 1270 ,' III L r SK Modulator r e o - ac tua l size 120 \ -mmm
O.Rmm double-sided F lU
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PSK
.
82
of the 23cm PSK trans-
o °
-r0r- ° ceiver. shown in Fig.9. ·
includes a 'I X power am-
p lifi e r w ith a C LYS
power GaA sFET to boost
the T X o utput power to
°
,..:--:- abou t I W (-30 dBm). a
PIN diode antenna switch
( B AR 6 3 ·0 3 W a nd
BARXO) and a receive
J'ig. IO: RF Front End I'en - actua l site SO.\ 401Jl1ll
RF am p li fie r with a
u.Smm double-sid ed FR4
UfP [8 1. T he latte r has
about 15dB gain. but the
following 1.27 Gl lz BPJ.'
has about 3dB passband
loss. The RF front end is
also buill as a microstrip
A,m~ circuit em <I double-sided
I"
IX
... PC B .... shew n ill Fig. tu
an d Fig . l l .
the quad rature I/Q m ixer
for 1270 Mll z, sho....n in
Hg. 12, includes an addi-
tional gain slage at 1.27
_.
0 117 (2f,dB M M IC INA-
03 1!~.1 ). two bandpass fil-
ters at 1.27 (J llz (3dB
A,nGIh. ' 10 . ~il\:. insertion loss each), a
H4d,I", /lIT quadrature hybrid for the
PI< (ma..TX)
RF signal at 1.27 G117,
on in-phase power splitter
F ig. l l : I~ F Frun t l':1It1 C om ponent Overlay
for the 1.0 signal at 635
serv e as a groundplanc for the micros - MI ll, two ident ical sub-
tri p ci rcuit. The RF signa l lm ses in the harmonic mixer s (two HATl 4-099R -
FR4 la minate are rather high at 1.'27 Schottky quads) and two identical IF
G llz. For example. the 1.27 G Hz BPF preamplifiers (two 11 (7 199).
has a passband insertion loss o f about Since the termination impedan ces o f the
5dB. On the other hand . a ll of the sub-harmonic mixers depend on the LO
micro strip bandpass fillers are designed signa l power I the d ifference ports of
for a bandwidth o f more than I O~/o of both the quadrature (RF) and in-phase
the ce ntre fre quency and therefore re- (LO) power splitters have to be termi-
quire no tuning considering the laminate nated to ensure the correct phase and
and etc hing tolerances.Th e RF front end
83
VHF COMMUNICATIONS 2/97
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VHF COMMUNICATIONS 2/97
amplit u de relationships. Consi dering the AC-coupl ed stages has to be set suffi -
manufact uring tolerances of the micros- ciently low. At a data rate of 1.2 M bit/s.
trip PCB shown in Fig.13 and Fig.l4, the a convenient choice is a lower frequency
amplitude matching is usua lly w ithin 5% limit of l kl lz. The latter allows all of
and the phase shin is within +/- Sde- the lime co nstants in the range of l ms
grees fr om the nominal 90 degrees . (IX/RX switc hing time!) and ca uses a
distortion of about 4% of the amplitude
A zero-IF receiver requires a dua l IF
of the IF signal.
am plifier with two identical ampl ifica-
tion c hannels I but a single. common Of course, th e AGC time constant
AGC . Since De -coupled amplifie rs can should also be in the same range around
not be built the lower frequency limit o f
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1ms. Such a fast AGC can on ly be
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Fig.l3 : Quadrature Mixer P('H ~ actual sixe 120 x 4Umm
OJllllm double-sided FR4
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applied to low gain stages to avoid the input (that define the receiver band-
unwanted feedback. A simple technical width) and two phase inversion stages
solutio n is to use more than one AGC in on the output to obtain a four-phase
the IF amplifier chain. The T/Q dual output signal (+ 1, +Q, -I and -Q) to
amplifier shown in Fig. 15 has three drive the following phase shifter. The
identical dual amplifier stages and each l/Q dual amplifier is bu ilt on a single-
of the se dual stages has its own AGe sided PCB as shown in Fig. 16 and
circuit using MOS trans istors (4049 UB) Fig.l7 .
as vari able resistors.
T he Costas-loop 1/Q PSK demodulator
The I/Q dual amplifier module also is built entirely using cheap 741IC.x.\.\
includ es two identical lowpass filters on logie as shown in Fig.] R. The four-
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VHF CO MMUNICATIONS 2/97
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phase input signal (... 1. +Q, .J and -Q) Both the signa l and error are firs t fed
feeds a resistor networ k that generates a through two lowp ass filte rs (10 suppress
muhiphase system with a large numbe r the 74HC4067 switching transients) and
(16) o f phases. Two 74 HC·W67 ana- fi nally to two LM3 11 vo ltage compa ra-
101::ue switches are then used to select tors to ob tain TTL-l evel signa ls. Th e
the de sired signal phase . T he inputs of signal and err or arc then multiplied in
the two analog ue "electors are o ffset by all EXOR gate and fee d a d igital yeo.
4 to prov ide the required 90 degree Th e d igital VCO includes a 6 . 144 MH".
phase shift between the signal and err or clock osci llato r and two 74 HC 19 1 up!
ou tputs. down cou nters.
89
VHF COMMUNICAT ION S 2/ 97
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Th e up/down co ntrol is used as the lind Fig .20 . Th e circuit includes ils own
veo cantrilI input. I f the latter is at a +5 V regulator and an output stage
log ical ZERO, the up/do wn co unter ca pable (If feeding a 7511 cable with the
rotates the two 74HC4067 switches l•'modulated I{X data.
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T X ou tput power (usually
2/3 of the full scale).
92
VHF CO MMUNICATIONS 2197
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VHF COMMUNICATIONS 2197
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A21(8t)
AlO (lO)
rig.25: Dem PSI( Tran ctiu 'r !oihiddt"d .\ 1od ulc- J:ncl O'lu n:
although it will probably work with EXO R gales. The scrambling polyno-
other serial HDLe controllers as wel l. mial is the same as the one used in
The circuit includes an interpolation K9NGlG3RUH modems:
DPLL that only req uires an !:I-limes
I+X· · 12+X· · 17
higher clock frequency (9.830 " Mll z),
a lthough provides the reso lution o f a Due to the redundancy in the AX.25
1256 conventional OPLL with a 315 data stream (zero insertion and dele-
MHz clock . tion ), a simple po lynomial scramble r is
com pletely sufficient to overcome the
The scremblcrzdescra mblcr uses a Ylift
AC coup ling limitation of the described
register "iib a linear feed back with
PSK transceivers.
94
I VHF COMMUNICATIONS 2197
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• 95
VHF COMMUNICATIONS 2/97
i"ig.27: Hi t-Sy nchru nlse r/S cra mhler PCU - actua l slze 120 \ 60mm
1.6mm single-sid ed FlU
The interface c ircuit also includes 75!l transmitter. The polarity of the clock
line drivers and receiver s. if the PSK signal can be selected with a j umper .
transce iver is insta lled at some d istance When using the 1 8530 TransceiverC or
from the interface. However, connec- TRxC cloc k inputs, this jumper should
tions have to be kept short on the side be connected to ground .
tow ards the computer serial port. The
The bit-syn chronisatiou'scra nsblcr circu it
described interface only provides one
is built on a single-sided pen as shown
cloc k signal. since it is intended for
in Fig.27 and Fig.28. It only requires
simplex operation with the described
one adjustment, the DeD threshold, and
PSK transceiver. Of course the DPL L is
the latter can only be performed when
d isabled during transmission. so that the
noise is present on the RXf\.1 input
circ uit supplies a stable clock to the
96