COV ER FE ATURE

Doherty’s Legacy

Raymond Pengelly, Christian Fager,

and Mustafa Özen

William H. Doherty

W
illiam H. Doherty was an American electrical engineer,
best known for his invention of the Doherty amplifier. Born
in Cambridge, Massachusetts, in 1907, Doherty attended
Harvard University, where he received his bachelor’s degree
in communication engineering (1927) and his master’s degree
in engineering (1928). He then joined the American Telegraph and Telephone
Company Long Lines Department in Boston. He remained there for a few

Raymond Pengelly (raypengelly@gmail.com) is with Prism Consulting NC, Hillsborough,

North Carolina, United States. Christian Fager (christian.fager@chalmers.se )
image licensed by graphic stock

and Mustafa Özen (mustafa.ozen@chalmers.se) are with Chalmers University

of Technology, Gothenburg, Sweden.

Digital Object Identifier 10.1109/MMM.2015.2498081

Date of publication: 14 January 2016

February 2016 1527-3342/16©2016IEEE 41

In Doherty’s day, within the Western
Electric product line, this “namesake”
electronic device was operated as a
linear amplifier with a driver that
was modulated.
months before joining the National Bureau of Standards,
where he researched radio phenomena. Doherty joined
Bell Telephone Laboratories (now Bell Labs) in 1929 and,
while there, worked on the development of high power
radio transmitters that were used for transoceanic radio
telephones and broadcasting.
The Doherty Approach and Its Evolution
Doherty invented his unique amplifier approach
in 1936. (“Doherty’s Invention in His Own Words”
reproduces an excerpt from the original description
of the device published by Bell Laboratories as “A
New High-Efficiency Power Amplifier for Modulated
Waves.”) This device, which greatly improved the effi-
ciency of RF power amplifiers (PAs), was first used in
a 500-kW transmitter that the Western Electric Com-
pany designed for WHAS, a radio station in Louisville,
Kentucky. Western Electric went on to incorporate
Doherty amplifiers into at least 35 commercial radio
stations worldwide by 1940 and into many other sta-
tions, particularly in Europe and the Middle East, in
the 1950s [1].
The Doherty amplifier is a modified class-B RF am-
plifier. In Doherty’s day, within the Western Electric
product line, this namesake electronic device was oper-
ated as a linear amplifier with a driver that was modu-
lated. In the 50-kW implementation, the driver was a
complete 5-kW transmitter that could, if necessary, be
operated independently of the Doherty amplifier; the
Doherty amplifier was used to raise the 5-kW level to
the required 50-kW level.
The amplifier was usually configured as a grounded-
cathode, carrier-peak amplifier using two vacuum tubes
in parallel connection, one as a class-B carrier tube and
the other as a class-B peak tube (i.e., power transistors,
in modern implementations). The tubes’ source (driver)
and load (antenna) were split and combined through
+ and - 90° phase shifting networks. Alternate con-
figurations included a grounded-grid carrier tube and a
grounded-cathode peak tube, whereby the driver power
was effectively passed through the carrier tube and was
added to the resulting output power—but this benefit
was more appropriate for the earlier and less efficient
triode implementations rather than the later and more
efficient tetrode implementations.
As a successor to its Western Electric application
for radio broadcast transmitters, the Doherty concept
was considerably refined by Continental Electronics
Manufacturing Company of Dallas, Texas. Early Con-
42 February 2016
tinental Electronics designs, by JamesWeldon and oth-
ers [2], retained most of the characteristics of Doherty’s
amplifier but added medium-level screen-grid modu-
lation of the driver. The ultimate refinement was the
high-level screen-grid modulation scheme invented by
Joseph Sainton [3]. Sainton’s transmitter consisted of
a class-C carrier tube in a parallel connection with a
class-C peak tube.
The tubes’ source (driver) and load (antenna) were
split and combined through + and - 90° phase-shifting
networks, as in a Doherty amplifier. The unmodulated
RF carrier was applied to the control grids of both tubes.
Carrier modulation was applied to the screen grids of
both tubes, but the screen grid bias points of the car-
rier and peak tubes were different and were established
such that 1) the peak tube was cut off when modula-
tion was absent and the amplifier was producing rated
unmodulated carrier power and 2) both tubes were
conducting and each tube was contributing twice the
rated carrier power during 100% modulation (because
four times the rated carrier power is required to achieve
100% modulation). As both tubes were operated in class-
C, a significant improvement in efficiency was achieved
in the final stage. In addition, because the tetrode car-
rier and peak tubes required very little drive power, a
significant improvement in efficiency within the driver
was achieved as well.
The commercial version of the Sainton amplifier
employed a cathode-follower modulator, not the push-
pull modulator disclosed in the patent, and the entire
50-kW transmitter was implemented using only nine
total tubes of four tube types, all of these being general-
purpose—a remarkable achievement, given that the
transmitter’s most significant competitor, from RCA,
was implemented using 32 total tubes of nine tube
types, nearly one-half of these being special-purpose.
The approach was not only used by such lead-
ing companies as Continental but also Marconi [3],
with functional installations up to the late 1970s. The
Institute of Radio Engineers [4] recognized Doherty’s
important contribution to the development of more
efficient RF PAs with the 1937 Morris N. Liebmann
Memorial Award [5].
The Basic Architecture
Figure 1 shows the basic Doherty PA (DPA) architec-
ture. Extensive descriptions of DPAs have been given
by Cripps [6], so this article includes only a basic expla-
nation. The Doherty block diagram (Figure 1) is nota-
ble for its elegance and simplicity and is specifically
associated with modern solid-state transistor designs.
What may not be apparent is that details of the
design can result in large differences in performance.
Operation is strongly influenced by the coupling
factor of the input divider/coupler and by the bias-
ing of the carrier and peaking amplifier stages. The
“turn-on” of the peaking amplifier is dependent on
 Doherty’s Invention in His Own Words
“A new form of linear power amplifier has been
developed which removes the limitation of low
efficiency inherent in the conventional circuit,
permitting efficiencies of 60 to 65 per cent to be
realized, while retaining the principal advantages
associated with low-level modulation systems and
linear amplifiers, namely, the absence of any high-
power audio equipment, the ease of adding linear
amplifiers to existing equipment to increase its power
output, and the adaptability of such systems to types
of transmission other than the carrier-and-double-side-
band transmission most common at present.
“Under these conditions the plate efficiency is
proportional to the amplitude of the radio-frequency
plate voltage. It is possible to obtain large outputs from
tubes with radio-frequency plate voltage amplitudes
of 0.85 to 0.9 of the applied d-c potential, i.e., with
the plate voltage swinging down to a minimum value presence of the other tube. The same load impedance
as low as 10 to 15 per cent of the d-c potential. R/2 is used in the new circuit, but between the load
The corresponding plate efficiency for the tube and and one of the tubes (Tube 1) there is interposed a
its tuned circuit is approximately 67 per cent. This network which simulates a quarter-wave transmission
condition, however, prevails only at the peak output line at the frequency at which the amplifier is operated.
of the amplifier, and since the amplitude of the plate “It is a well-known property of quarter-wave
voltage wave, in a transmitter capable of 100 per cent transmission lines and their equivalent networks that
modulation, is only half as great for the unmodulated their input impedance is inversely proportional to the
condition as for the peaks of modulation, the efficiency terminating impedance. The network of [Figure S1], in
with zero modulation in the conventional amplifier does particular, presents to Tube 1 an impedance of
not exceed half this peak value, or about 33 per cent. R ohms when its effective terminating impedance is
“In order to improve this situation it is necessary also R ohms, that is, when half of the power in the load
to devise a system in which the amplitude of is being furnished by Tube 2; but should Tube 2 be
the alternating plate voltage wave is high for the removed from the circuit, or prevented from contributing
unmodulated condition, and in which the increased to the output, the terminating impedance of the network
output required for the positive swings of modulation would be reduced to R/2 ohms, with a consequent
is obtained in some other manner than by an increase in the impedance presented to Tube 1 from R
increase in this voltage. to 2R ohms. Under this condition Tube 1 could deliver
“A simple and fundamental means is available for the carrier power E 2 /2R at its maximum alternating
achieving this result. One embodiment of the scheme plate voltage E and consequently at high efficiency.”
is illustrated in [Figure S1]. Each of the two tubes
shown in this figure is designed to deliver a peak
power of E 2 /R watts into an impedance of R ohms.
The total peak output of the two tubes being 2E 2 /R jR
Tube 1 Tube 2
watts, the tubes are suitable for use in an amplifier R
whose carrier output is one-fourth of this value, or -j R -j R
2
E 2 /2R watts. If the tubes were to be connected in
parallel in a conventional amplifier circuit the load
impedance used would be R/2 ohms, and each tube
would work effectively into R ohms by virtue of the Figure S1. Form of high-efficiency circuit.

both input power level and gate bias voltage, which high input levels of short duration by amplifying the
in turn sets the low-power efficiency and peak-power signal peaks and dynamically changing the loading
capability of the configuration. The peaking ampli- on the main amplifier. The specific class of operation
fier allows the Doherty amplifier to respond to the (class-A/B, class-B, class-C, class-F, inverse class-F,

February 2016 43
 Carrier Amplifier Table 1. Doherty-based AM transmitters 1937–1979.
(Class-A/B)
Hybrid Installation
Coupler Year Frequency Power Level Territory

Input 0° 90° Phase 1936–1940 AM, 30 kHz to 50 kW (500 United

Shift 3 MHz kW total) States
90°
Output 1953 AM, 30 kHz to 500 kW (1 Europe
Matching 300 kHz MW total) (Voice of
Peaking Amplifier Section
America)
(Class C)
1956 AM, 30 kHz to 1 MW East Asia
300 kHz (Voice of
Figure 1. The basic Doherty amplifier configuration.
America)

1978 AM, 300 kHz 150 kW (5 United

etc.) of each amplifier is also important. The two basic
to 3 MHz MW total) Kingdom
considerations for each stage are the bias conditions
(BBC)
(biased on, or pinched off, and to what degree) and the
fundamental and harmonic impedance terminations 1979 AM, 300 kHz 2 MW (16 Middle East
presented to the transistors. to 3 MHz MW total)

Early DPAs
Although it was invented in 1936, the first U.S. patent
[7] for the DPA was not granted until 1940. The original
application for the new high-efficiency configuration
was for high-power amplitude-modulated (AM) radio
transmitters. By adopting the Doherty architecture dc-
to-RF conversion efficiencies were increased by a fac-
tor of two to over 60% [8]. The DPA soon became a de
facto standard for AM transmitters adopted by Western
Electric, Continental, Marconi, and RCA (Figures  2
and 3). In subsequent years, DPAs continued to be used
in a number of medium- and high-power, low-fre-
quency (LF) and medium-frequency (MF) vacuum-tube
AM transmitters [2], [9].
In late 1953, a 1-MW vacuum-tube transmitter oper-
ating in the long-wave band began regular operation
in Europe where the outputs of the two 500-kW DPAs
were joined in a bridge-type combiner. The DPAs had
also been considered for use in solid-state MF and
high-frequency (HF) systems, as well as in high-power
ultrahigh-frequency (UHF) transmitters [10], [11]. The
practical implementation of a classical triode-based
Doherty scheme was restricted by its substantial non-
linearity for both linear amplification of AM signals
and grid-type signal modulation, which required com-
plicated envelope correction and feedback linearization
circuits.
At the same time, the DPAs employing tetrode trans-
mitting tubes could improve their overall performance
when the modulation was applied to the screen grids
of both the carrier and peaking tubes, while the control
grids of both tubes were fed by an essentially constant
level of RF excitation [12]. This resulted in the peaking
tube being modulated upwards during the positive
half of the modulating cycle and the carrier tube being
modulated downwards during the negative half of the
modulating cycle.
Table 1 summarizes the significant AM transmitters
built around the Doherty concept between 1936 and 1979.
Some tube-based AM transmitters are still in use today.
The DPA still remains in use in very high-power AM
transmitters; for lower-power AM transmitters, how-
ever, vacuum-tube amplifiers were eclipsed in the 1980s
by solid-state PAs due to the advantages they offered of
smaller size and cost, lower operating voltages, higher

Figure 2. The 1938 50-kW Doherty AM transmitter at Figure 3. A 1978 150-kW Doherty AM transmitter at the
WHAS in Kentucky. BBC in the United Kingdom.

44 February 2016
reliability and greater physical ruggedness, insensitiv-
ity to mechanical shock and vibration, and the possibil-
ity of using fully automated manufacturing processes
and high levels of integration. In addition, both bipolar
and field-effect transistors are generally characterized
by significant nonlinearities in their transfer character-
istics and intrinsic capacitances that require complex
linearization schemes. Those schemes could only be
implemented using analog techniques in the 1980s, lim-
iting the use of DPAs.
Interest in DPAs was later revived, owing to signifi-
cant progress in radio communication systems based
on complex digital modulation schemes such as World-
wide Interoperability for Microwave Access (WiMAX),
orthogonal frequency-division multiplexing (OFDM)
systems, code-division multiple access (CDMA) 2000 and
wideband CDMA (W-CDMA), and long-term evolution
(LTE) enhancements to the Universal Mobile Telecom-
munications System wireless standard, where the sum
of several constant-envelope signals creates an aggre-
gate AM signal with high peak-to-average ratios (PARs).
The complex digital modulation schemes used in these
modern wireless communication standards require even
higher levels of linearity.
Different circuit design techniques have, therefore,
been proposed to improve the linearity of DPAs, such
as optimal biasing of carrier and peaking cells for
intermodulation cancellation and optimized uneven
power splitting for proper load modulation and thus
higher linearity [13], [14]. Furthermore, it has been
proven that the effect of nonlinear output capacitance
on the load modulation is circumvented using simple
Different circuit design techniques
have been proposed to improve
the linearity of DPAs.
to reduce DPA distortion. Recently, DPAs of different
architectures have found widespread application in cel-
lular base-station transmitters operating at gigahertz
frequencies.
Digital Radio and Television
Broadcast Transmitters
The main motivation for high-efficiency PAs for mod-
ern digital radio and television transmitters is to reduce
operational costs [15]. Operational costs have always
been a key issue for broadcasters, and a substantial part
of these costs is due to the electricity required to run a
transmission network, which can account for over 75%
of the total electricity used by a broadcaster (Figure 4).
Since higher efficiency PAs consume lower power and
create less heat, they also provide overall reliability
improvements. Further, increasing government legisla-
tion is forcing energy users into action to improve their
environmental (“green”) credentials. Figure 4 shows
the average electricity costs in the United Kingdom (as-
suming 12 pence per kWh) for 8-, 16-, 24-, and 32-kW
Model MRF6VP3450 Doherty
60
55
50
Efficiency (%)

offset line structures [14]. However, complex lineariza-

45
tion schemes are still required to meet the stringent
40
linearity requirements of modern wireless communi-
35 714 MHz
cation systems. Both digital pre-distortion and circuit
30 719 MHz
design techniques have been very successfully applied 724 MHz
25
20
0
30
60
90

150
180
210
240
270
300
330
360
390
420
450
480
510
0
12

350
Typical Pout(W)
Total
300 Efficiency
RF Power
Range of
Output from Figure 5. The efficiency of a Freescale LDMOSFET DVB
[Cost per Year (£k)]

250 Current
RF PA Electricity

Transmitter Doherty amplifier as a function of backed-off power.

Products
200 32 kW
24 kW
150
16 kW
100
8 kW
50

-
0% 20% 40% 60%
PA Efficiency
at 12 p/kWh

Figure 4. Average electricity costs in the United Kingdom

for DVB transmitters as a function of PA efficiency. Figure 6. A 1-kW output power DVB DPA for 714–724 MHz.

February 2016 45
 transmitters as a function of overall
PA efficiency [15]. For example, in-
creasing efficiency from 20% to 40%
reduces cost per year from £170,000 to
£80,000.
Significantly, both Freescale [15]
and NXP [16] have demonstrated
DPA reference designs configured
into multikilowatt transmitters for
digital video broadcast (DVB) appli-
cations where overall transmitter
efficiencies have been doubled using
silicon laterally diffused metal-oxide-
semiconductor field-effect transistors
(LDMOSFETs) compared with older
tube-based designs (including induc-
tive-output tubes). Suppliers such as
(a)
Rohde and Schwarz [17] have used
Pout (dBm) Third- and such solid-state technology to pro-
and Doherty Module Performance Fifth-Order IM
vide a range of VHF and UHF trans-
Efficiency (%) (dBc)
45 0
mitters that are liquid-cooled.
Figure 5 shows the efficiency of a
40 -5
Pout DPA employing Freescale LDMOS-
35 - 10
FETs as a function of output power
30 - 15
over 714–724 MHz. Efficiency is
25 - 20
PAE maintained at greater than 53% over
20 - 25 a 3-dB back-off range. Figure 6 shows
IM3
15 - 30 four DPAs combined in a prototype
10 - 35 system offering over 1-kW output
IM5
5 - 40 power with an overall improvement
0 - 45 in efficiency by 40% compared with a
-15 - 10 -5 0
conventional (non-DPA) system.
Pin (dBm)
(b)
Handset Transmitters
DPAs are used in many digital radio
Figure 7. (a) A two-way balanced DPA used in Motorola Iridium handsets.
and TV transmitters as well as in
(b) The output power, PAE, and intermodulation (IM) products versus input
cellular base-station applications but
power for a dual DPA.
have been less popular in handset
applications where envelope-track-
ing (ET) techniques have recently begun to domi-
nate [18]. However, the Doherty approach was used
in L-band Iridium satellite handset PAs produced by
Motorola in the mid-1990s. This approach was taken
as a way to conserve battery life as well as to reduce
heat dissipation [19], in particular because the trans-
mitted power levels from the handsets were several
watts (much more than required in a land-based cel-
lular system). The two-way balanced DPAs used gal-
lium arsenide (GaAs) pseudomorphic high-electron
mobility transistor (pHEMT) technology incorpo-
rated into hybrid “chip-and-wire” circuits (Figure 7),
achieving power-added efficiencies (PAEs) of 37% at
output powers of approximately 2 W (approximately
5 dB backed off from peak power to achieve the
required linearity).
Figure 8. A photograph depicting an InGaP/GaAs HBT More recently, DPAs have been employed in a
MMIC DPA for 1.6–2.1 GHz handset applications. number of handset applications using 0.25- and

46 February 2016
0.15-μm GaAs pHEMT processes being deployed at
17 and 20 GHz, respectively, for digital satellite
systems. Monolithic-microwave integrated-circuit
(MMIC) DPAs using 0.13-μm RF complementary–
metal-oxide-semiconductor (CMOS) processes have
been deployed at 60 GHz for wireless personal net-
work transceivers. However, MMIC DPAs for 900-,
1,800-, 2,140-MHz, and higher handset applications
are more difficult to design because of the need for
low-cost-requiring chip-size constraints. Moreover,
another important requirement with handset PAs is
multimode, multiband operation, which is challeng-
ing to achieve in DPA designs without using tunable
components in the output and input networks [20].
The most popular processes being used are CMOS
and heterojunction bipolar transistor (HBT) together
with the use of lumped elements and novel circuit
approaches to reduce size [21]. Novel circuit approaches
used to produce small handset DPAs have been
recently extended to provide solutions for LTE appli-
cations across bandwidths of 1.6–2.1 GHz. The MMICs
use low-Q quarter-wave transformers, lumped-element
phase compensation networks on the input, and tran-
sistor output capacitances into phase compensation net-
works on the output. The MMICs employed an indium
gallium phosphide (InGaP)/GaAs 2-μm HBT process,
and off-chip bond wires were used for critical induc-
tors (Figure 8) [22]. The reported gain was greater than
28 dB at an average output power of 27.5 dBm (using a
10-MHz bandwidth LTE signal with a 7.5-dB PAR). Lin-
earity was measured using the error vector magnitude
method at 3.8%, with an accompanying adjacent chan-
nel power ratio (ACPR) of -32 dBc.
In [23], a 1.85-GHz linearity improved dual-mode
InGaP/GaAs MMIC handset DPA is presented. In this
Doherty design, the gate bias voltages of the PA cells
and the input power splitting ratio are optimized for a
low level of third-order intermodulation products. The
reported ACPR was -37 dBc with related PAE of 42%
using a 10-MHz LTE signal with a 7.5-dB PAR.
DPAs have become the de facto
standard approach for achieving
high-efficiency PAs in a mix of cellular
infrastructure equipment ranging
from “small-cell” to “macro-cell”
applications.
43%. It uses a pair of NXP LDMOSFETs in a symmetric
configuration. It can be seen that the input matching
for the peaking PA is somewhat different than for the
carrier PA because they are operating at different qui-
escent drain current levels. As instantaneous/video
bandwidths increase, coupled with carrier aggrega-
tion for next-generation cellular systems, the intrinsic
narrow-band nature of conventional DPAs becomes
a challenge. However, a number of techniques that
can extend the bandwidth of DPAs are available, as
described in the following section. These techniques
are particularly relevant to lower average power archi-
tectures such as “small-cells,” and it is likely that fifth-
generation (5G) and later systems will employ much
higher numbers of such low-power “distributed”
transmitters.
Modern Trends
DPAs are far from a past or “fading” high-efficiency
PA approach. The attraction of DPAs is that, even
with added complexities for the previously discussed
application extensions, they are well proven and reli-
able approaches. Advances in solid-state technology
and compact hybrid and MMIC approaches as well
as recent low-cost analog and digital predistortion
techniques have shown that DPAs will not disappear
from the two main application areas in the near term:

Cellular Infrastructure Transmitters

DPAs have become the de facto standard approach
for achieving high-efficiency PAs in a mix of cellular
infrastructure equipment ranging from “small-cell”
to “macro-cell” applications, where average transmit-
ted powers are from a few watts to hundreds of watts
respectively. The majority of those applications today
employ silicon LDMOSFET transistors in the driver
and output stages, but gallium nitride (GaN) HEMT
transistors have become increasingly used for the
latest base-station equipment owing to their higher
gains, power densities, bandwidths, operating fre-
quencies, and efficiencies [24].
One example of a DPA produced by Nokia is shown
in Figure 9 which produces 60 W of average power at Figure 9. An example of a 2.1-GHz DPA, produced by Nokia,
2,100 MHz with an overall transmitter efficiency of for base-station applications with an average power of 60 W.

February 2016 47
 Modern Trends for DPAs
• A wealth of semiconductor technologies is being • Multiband (dual and triband), broadband
used (e.g., Figures S2–S5): • Reconfigurable using switched sections or
• RF CMOS, GaAs pHEMT, InGaP/GaAs HBT, silicon varactor tuning
LDMOSFET, and GaN HEMT
• A range of frequencies and power levels is being
covered:
• UHF to 60 GHz, hundreds of milliwatts to multi-
kilowatts
• A variety of circuit techniques is being adopted:
• Classical, inverted, asymmetric; unequal
power division to carrier and peaker, different
sized transistors for carrier and peaker, and
combinations of both
• N-way to increase backed-off (linear) power
range for high efficiency
(a)
• Use of different classes of amplifiers in carrier
Four-Stage
g DA
and peaker
Three-Stage
g DA

Efficiency
fficiency (%) Two-Stage DA
80

60

40
Asymmetric
20 Four-Way
DA
Class B PA
0
-24 -18 -12 -6 0
Back off Power Level (dB)
(b)

Figure S4. (a) An example of a 2.14-GHz four-way DPA

Figure S2. An example of a 2.11–2.14-GHz
LDMOSFET asymmetric DPA from Freescale: carrier,
140 W; two peakers, 280 W; average power of 75 W
at 8-dB back-off with 46% efficiency.
using 25-W GaN HEMTs and a W-CDMA signal with (b)
6.5-dB PAR and average power of 20 W with 61% drain
efficiency (from Bell Labs, Alcatel, and Lucent).

Figure S5. An example of a 1.9–2.6-GHz

Figure S3. An example of a 2.5–2.7-GHz GaN HEMT reconfigurable DPA using MEMS switches: average
asymmetric DPA from Cree: carrier, 150 W; peaker, power of 2 W at 9-dB back-off with efficiencies of
300 W; average power of 80 W at 8-dB back-off with 60% at 1.9 GHz, 61% at 2.14 GH z, and 64% at
49% efficiency. 2.6 GHz [20].

48 February 2016
present and future digital radio/television transmis-
sion and cellular communications. P1dB
As summarized in “Modern Trends for DPAs,” a 60
wealth of semiconductor technologies is being used Doherty
50 Control
to implement new DPAs—including RF CMOS, GaAs
pHEMT, InGaP/GaAs HBT, silicon LDMOSFET, and

Efficiency (%)
40
GaN HEMT—covering a wide range of frequencies from
30
UHF to 60 GHz at power levels from hundreds of milli-
watts to multi-kilowatts. Various new circuit techniques 20
have also been adopted to further improve the perfor-
mance of DPAs. One of the main research areas has 10
been extending the efficiency range of DPAs for ampli-
0
fication of very high (8–12 dB) peak-to-average power - 10 - 5 0 5 10 15 20 25 30
ratio (PAPR) signals. There have been also significant Pout (dBm)
efforts in recent years to improve the RF bandwidth for
broadband applications. Further, reconfigurable DPAs Figure 10. The collector efficiency of a 900-MHz InGaP/
for the realization of multiband, energy-efficient PAs GaAs asymmetrical DPA [29].
have also been extensively studied.
This section reviews the modern trends in DPA credited for realization of the first experimental dem-
development, including references to representative onstrator through a 950-MHz 27.5 dBm asymmetrical
research works. More comprehensive reviews are pre- DPA, which was realized in an InGaP/GaAs process.
sented in [1] and [25]. It is not our intention to go into As seen from Figure 10, the prototype exhibits a very
great detail regarding each DPA variant, but rather to distinct efficiency peak at 10-dB back-off power level,
provide an overview of recent research on DPAs. De- thereby fully proving the feasibility of the concept.
sign guidelines and in-depth mathematical analysis Asymmetrical DPAs are well adopted by the in-
of different DPA variants can be found in [6], [26], and dustry and very commonly used as micro and macro
[27]. Our review will start with extended efficiency base-station PAs. Currently, LDMOS is the preferred
range (26 dB) DPAs, move on to
broadband and reconfigurable
PAs, and finally present an out-
Zm Za
look on the role of the DPA in Lossy
and Reciprocal
next-generation communication Im Ia Aux.
Main
systems operating at millime- Class B Class C
ter-wave frequencies. Two-Port
+ +
Vi P1 (Z2P) P2 AVie-ji
Vm Va
Extended-Efficiency-
Range DPAs - -
The classical Doherty con-
figuration provides efficiency (a)
enhancement for an output Lossless
power dynamic range of 6 dB. and Reciprocal
Raab has, however, theoreti-
cally shown the possibility of
extending the efficiency range P1 P2
P3
of DPAs by making the peak- (Z2P- A) (Z2P- B)
ing cell larger than the carrier
cell [28]. Such a modification R
enables a higher modulation
ratio and, thus, a higher back-
off efficiency range to be
(b)
achieved. This variant of DPAs
is commonly referred as asym-
Figure 11. (a) A schematic used for the derivation of the two-port combiner network
metrical DPA and uses the parameters of a symmetrical DPA. Z m and Z a denote the fundamental tone impedances
same load network topology as experienced by the transistors, where n is the harmonic index. Vm, Va and I m, I a denote
the classical configuration but the fundamental tone component of the drain voltage and current waveforms. (b) This
with different circuit element intermediate network later converted to a three-port lossless network terminated with
values. Iwamoto et al. [29] are the load [38], [39].

February 2016 49
 technology for realization of asymmetrical DPAs for
100 base-station applications [30]–[32]. GaN HEMT asym-
h metrical DPAs are, however, also being studied for fu-
Efficiency, PAE (%)
80
PAE ture systems [33]–[35]. Among the best results, a drain
60 efficiency of 60% with 8.3 PAPR signals at 2.6  GHz
was shown in a 51-dBm GaN HEMT prototype [36].
40
The measured PAE, however, was only 49% due to
20 low gain, which is somewhat typical in asymmetrical
DPAs [35], [37]. The peaking amplifier is much larger
0
31 33 35 37 39 41 43 45 than the carrier amplifier in asymmetrical DPAs. The
Output Power (dBm) overall gain is therefore dominated by the low gain of
(a) the class-C biased peaking amplifier and, thus, lower
Power Spectral Density (dB/Hz)

than in symmetrical DPAs.

0 The use of a very large class-C cell also causes prac-
- 10 tical limitations on realization of the analog input sig-
- 20 nal splitter [13].
- 30 Recently, there has been an interest in extending the
efficiency range of symmetrical DPAs by modification
- 40
of the combining network. Özen et al. [38], [39] have
- 50
demonstrated the existence of a class of symmetrical
- 60 DPAs having efficiency peaks also for back-off levels
3.3 3.35 3.4 3.45 3.5 3.55 3.6 3.65 3.7
Frequency (GHz) larger than 6 dB while maintaining full voltage and
(b) current swings of both the carrier and peaking tran-
sistors. The design technique is based on an analytical
Figure 12. (a) The measured static PAE and drain efficiency derivation of the combiner network parameters from
results of an extended-efficiency-range symmetrical DPA at the desired boundary conditions required for high effi-
3.5 GHz. (b) The modulated measurement results without ciency operation, and its practical realization is derived
(blue) and with (green) digital predistortion (DPD) using from the desired boundary conditions required for
carrier-aggregated 100-MHz OFDM signals [38]. high-efficiency operation. The derived combiner, there-
fore, integrates the matching networks, offset lines, and
impedance inverter. A schematic used for the deriva-
100
tions is shown in Figure 11.
80 This new symmetrical DPA has the advantages
Efficiency (%)

of increased gain and cost reduction due to the use

60
of symmetrical devices. Furthermore, design and
40 realization of the input power splitter are simplified
due to less uneven power splitting compared to the
20
conventional asymmetrical DPA case. These distinct
0 advantages enabled a 100-MHz instantaneous band-
-30 -25 - 20 - 15 - 10 -5 0
width 3.5-.GHz symmetrical DPA which provides a
Normalized Output Power (dB)
record high PAE of 52% with 9-dB PAPR LTE signals.
Static and modulated measurement results are shown
Figure 13. The efficiency of asymmetrical (blue) and three-
in Figure 12.
way DPAs (red) versus normalized output power.
The N-way DPA approach is
another way of extending the effi-
Main ciency range. In this configuration
Upconverter the number of efficiency peaks
xm RF
DAC LPF PA is equal to number of branches.
The main advantage of N-way
Upconverter RF
yd DSP xp RF Output DPAs compared to asymmetrical
DAC LPF PA DPAs is that, theoretically, less ef-
Unit
ficiency drop occurs between the
Downconverter Peaking
y efficiency peaks. This is illustrat-
DAC LPF
ed in Figure  13 for the three-way
Doherty case. However, in such
Figure 14. A block diagram of a dual-input DPA transmitter architecture. DSP: realizations the signal distribution
digital signal processor; LPF: lowpass filter. and combining networks become

50 February 2016
significantly more complex compared to conventional
DPAs. Due to these complications, practical N-way
DPAs often do not meet the expected theoretical per-
formance [40]–[45]. It should also be mentioned that, so
far, the focus in this field has been limited mainly to
realization of three-way DPAs due to practical issues.
DPAs with Individual RF
Input Signal Control
The conventional, analog-splitter-based DPA has
a great advantage in its simplicity and as a direct
class-A/B PA replacement. However, significant
improvements achieved in energy consumption of
digital-to-analog converters (DACs) and digital circuits
with aggressive CMOS scaling over the last decade are
making DPAs with individually controlled carrier and
peaking amplifier input signals interesting, particu-
larly for base-station applications [46], [47].
A block diagram of a dual-input Doherty transmitter
architecture is shown in Figure 14. In contrast to a con-
ventional class-B/C Doherty system, no power is wasted
in dual-input DPAs when the carrier cell is turned off,
which improves the gain and PAE. Furthermore, in [48]
the authors proposed to dynamically vary the phase-
offset between the branches to enhance the load modula-
tion in dual-input DPAs. Experimental results show that
a significant PAE enhancement can be achieved between
the efficiency peaks (see Figure 15). It should also men-
tioned that, very interestingly, individual control of the
input signals also provides important possibilities for
bandwidth enhancement [49], [50] and for frequency
reconfigurable PAs, as described in later sections.
Interest in DPAs was later revived,
owing to significant progress in
radio communication systems
based on complex digital
modulation schemes.
Pelk et al. [51] proposed a three-way Doherty with
individual control of each branch signal in the digital
domain to overcome the implementation issues faced
in the analog realization. A GaN HEMT demonstra-
tor was built for experimental verification, which pro-
vided a record high PAE of 64% at 12-dB back-off (see
Figure 16). However, very high complexity and the
high cost of such approach is, unfortunately, hamper-
ing its widespread adoption by the industry.
An interesting research topic related to multi-in-
put DPA architectures is how to find optimal signal
designs that maximize high efficiency and linear-
ity. A common approach is to characterize the PA
with continuous wave signals to identify optimal
signal combinations for the best efficiency versus
back-off. In this way a static inverse model of the PA
is constructed and used for constellation mapping
70
60
50
PAE (%)

40

30

20
Adaptive Phase Alignment On (PAE) Three-Way GaN Doherty, Profile 1
10
Adaptive Phase Alignment Off (PAE) Three-Way GaN Doherty, Profile 2
Single Class-B GaN Amplifier
0
80 - 20 -15 -10 -5 0
Pout (dB Relative to Pmax)

70
Figure 16. The measured single-tone PAE of a three-way
DPA versus the output power back-off for different drive
profiles [51].
60
PAE (%)

50
Static Splitter Main PA
xm
fm
40 a
y
DPD
ydesired
xp y
30 fp
18 20 22 24 26 28 30
Input Power (dBm) Peaking PA

Figure 15. The efficiency of a dual-input DPA with and Figure 17. The conventional scheme used for linearization
without adaptive phase alignment [48]. of a dual-input DPA.

February 2016 51
 Efficiency- and
Output-Power-
Reconfigurable DPAs
So far we have reviewed
DPAs that are optimized
for a certain output power
Harmonic level and for a signal with
Tuning fixed statistics (i.e., PAPR).
VGS Main
Main Input However, base stations and,
Network in particular, handset PAs
One Switch are not always operated at
RF Out full power. The RF output
Output power can be reduced when
Network Two
Switches the data traffic is low or
when the distance between
Aux In the mobile terminal and the
MEMS Ground base station is short. Accu-
Switch
VGS Aux
rate output power control is
Control Lines
for Different also necessary in the hand-
P
VGS in-avg Settings sets to maximize the system
Variable
Auxillary throughput and battery
Gate Bias lifetime. In such cases, it is
highly desirable to have a
(a) DPA with a reconfigurable
output power level to main-
Pout = 21 dBm tain efficient operation.
hD Pout = 16 dBm Mohamed et al. [20] have
80 shown that it is possible to re-
PAE Pout = 11 dBm
configure the output power
70
level of DPAs by incorporat-
60 ing microelectromechanical
systems (MEMS) switches
Efficiency (%)

50 in the load network. A photo

of the fabricated 2.6-GHz
40
GaN HEMT demonstrator
30 and the measurement re-
sults of the prototype are
20 shown in Figure 18. Fur-
ther, the authors showed the
10
feasibility of reconfiguring
0 the efficiency range using
18 20 22 24 26 28 30 32 34 36 38 40 MEMS switches in the load
Output Power (dBm) network [53].
(b) Gustafsson et al. [50],
[54] have proposed a modi-
Figure 18. (a) A photo of the fabricated MEMS-based reconfigurable peak power GaN HEMT fied DPA targeting wide-
DPA demonstrator. (b) The measured efficiency results versus the output power for three band applications (see the
different power modes [20]. next section) but have also
shown that the back-off
of branch signals according to the desired output efficiency range can be reconfigured by varying the
signal. Thereafter, residual nonlinearities and mem- supply voltage of the carrier cell and the current pro-
ory effect are corrected with a DPD block before the file (gate bias) of the peaking cell. Such an approach
static inverse model, as shown in Figure 17. On the is favorable, especially when there are no good tun-
other hand, more advanced signal design algorithms able components available in the semiconductor pro-
are also being developed to achieve even better ef- cess used.
ficiency–linearity compromise in multi-input PA ar- In [55], a 1.95-GHz GaN HEMT output power re-
chitectures [52]. configurable DPA is presented, where the power

52 February 2016
adaptation is achieved by changing the drain
and gate bias voltages. Carrier 100 X
m/4 70.7 X
PA
Wideband DPAs m/4
Pin out P
With an increasing number of frequency bands
Peaking 50 X
allocated for wireless communication, there 50 X 70.7 X
has been intense research targeting wideband PA
DPAs. It has been recognized that the m/4 im- m/4 m/4 100 X
pedance inverter of the original Doherty to- 50 X
pology is limiting the theoretical efficiency (a)
enhancement bandwidth to roughly 30%, but
90

Output Power (dBm) and Efficiency (%)

the bandwidth is, in practice, further limited Saturated Output Power
by the device parasitics. Qureshi et al. have ex- 80 Efficiency at Saturated Output Power
Efficiency at 6 dB of Power Back-Off
plored the possibility of absorbing the carrier
70
and peaking device output capacitances into
the impedance inverter for a wideband LDMOS 60
based DPA [56]. Guolin and Jansen presented a
more generic approach in [57], where a simpli- 50
fied real-frequency technique is applied with a
40
comprehensive optimization scheme to derive
carrier, peaking, and load matching networks 30
that together approximate the optimum load-
20
pull based carrier and peaking transistor im- 1,000 1,200 1,400 1,600 1,800 2,000 2,200 2,400 2,600
pedances across a wide bandwidth. Frequency (MHz)
Recently, several researchers have recog- (b)
nized that the bandwidth of the DPA can be
increased significantly by augmenting the Figure 19. (a) A DPA topology with the combiner modified for
network connected to the peaking transis- improved bandwidth [62]. (b) The measured drain efficiency and
tor output [58]–[63]. Abadi et al. introduced a output power for a 1.2–2.6-GHz wideband GaN DPA based on the
resonant-shunt LC network at the peaking PA topology in (a) [58].
output that simultaneously offers convenient
biasing, linearity, and harmonic tuning efficiency fre et al. used the same technique to achieve a record
[59]. By instead adding a two-section impedance 1.0–2.6-GHz bandwidth DPA with 6-dB back-off effi-
transformer to the peaking device, a more wideband ciency 235% across the band [58] [see Figure 19(b)].
back-off efficiency characteristic is obtained. This The approach is also suited for wideband high-power
technique, which is shown in Figure 19(a), was origi- commercial applications, as recently demonstrated by
nally explored in a dual-band class-E DPA [62]. Gio- Freescale [61] and NXP [60]. The wideband DPA in [60]

60 0
PAEavg (%) and Pout,avg (dBm)

NMSE (dB) and ACPR (dBc)

PAEavg
50 Pout,avg - 10
NMSE
40 ACPR - 20

30 - 30

20 - 40

10 - 50

0 - 60
5.5 6 6.5 7 7.5 8 8.5 9 9.5
Frequency (GHz)
(a) (b)

Figure 20. (a) A fully integrated 5.8–8.8-GHz GaN MMIC DPA (2.9 mm by 2.9 mm) based on a modification of the
impedance-inverter impedance for improved bandwidth and efficiency reconfigurability [54]. (b) The measured average efficiency
(PAEavg) and output power (Pout,avg) for a 20-MHz 256-QAM signal. A vector-switched digital predistortion algorithm [87]
enabled excellent linearity, characterized by the normalized mean square error and ACPR.

February 2016 53
 nals. The modified DPA architecture
Quad-Band has been demonstrated by a fully
Biasing integrated 5.8–8.8-GHz GaN MMIC
Network
targeting point-to-point radio links
Quad-Band [see Figure 20(a)] [54].
Output Load IIN
Input Impedance As shown in Figure  20(b), an
Matching Network Transformation
Network excellent average PAE of 32%–41%
Broadband and linearity are obtained across the
Broadband IPS Impedance band when tested with a 20-MHz,
Transformer
8.5-dB PAR 256 [20] quadrature
Quad-Band Input Output Load amplitude modulation (QAM) signal.
Phase Impedance Transformation
Compensation Matching Network As described previously, the back-off
Network Network efficiency can also be reconfigured
Quad-Band in this topology, which means that a
Biasing wide range of wireless standards in a
Network wide frequency range can be ampli-
fied efficiently with the same circuit.

Figure 21. A quad-band (950/1500/2140/2650 MHz) DPA [69]. IPS: input phase Multiband DPAs
splitter; IIN: impedance inverter network.
For cost and complexity reasons, it
is highly desirable that the same PA
has also been used by He et al. as the basis for realiz- be able to cover as many frequency bands as possible.
ing a wideband push-pull DPA in [64]. The push-pull Unfortunately, the wideband approaches presented
operation enables, in theory, an independent control previously present an inevitable performance degrada-
of the fundamental and second-harmonic impedances tion as the bandwidth increases to cover more bands.
and thereby improved efficiency. The performance This has motivated significant research on multiband
is, in practice, limited by the balun performance and, DPAs that utilize the fact that the commonly used fre-
in particular its common mode parasitic coupling to quency bands are typically widely separated. Opti-
ground [65]. mized DPA designs targeting specific bands, rather
Gustafsson et al. [50] and Wu and Boumaiza [66]
have, independently, proposed a modified DPA in which
the impedance of the m/4 impedance inverter is set to
match the PA load impedance. In contrast to conven- Phase-Shifting Auxiliary Amplifier
tional DPAs, this eliminates any band limiting imped- Preamplifier
ance transformation at back-off and, thus, a significantly
IAux
larger efficiency bandwidth for realistic modulated sig-
Input Output
ZMain
VMain L = m/4 RLoad

Clock VDD IMain Z0 = 2·RLoad

Main Amplifier
(a)
Control Bits

40
Carrier

Measurement
Simulation
.. .

30
DE, PAE (%)

PAE
m/4
20 DE
Delay VDD
10
Control Bits
Peaking

0
4 6 8 10 12 14 16 18
Pout (dBm)
.. .

(b)

Figure 23. (a) A block diagram of an active phase-shift

DPA. (b) The measured efficiency of a 45-nm SOI CMOS
Figure 22. The schematic for an RF-DAC based DPA. active phase-shift DPA at 45 GHz [79].

54 February 2016
than a generic wide-frequency coverage, are therefore
expected to perform better.
Saad et al. [67] have described the design of a dual-
band GaN-based DPA, operating at 1.8 and 2.4 GHz.
The DPA utilizes a dual-band design technique for
the power splitter, phase shifter, matching net-
works, and impedance inverter [68]. When tested at
1.8 GHz with 7.5 dB PAR LTE signals and at 2.4 GHz
with 8.5 dB PAR WiMAX signals, the manufactured
PA demonstrates an average PAE of 54% and 45%,
respectively. Ngiem et al. [69] have presented tri- and
even quad-band DPA designs covering 950, 1,500,
2,140, and 2,650 MHz (see Figure 21). A clear Doherty
efficiency behavior is reported in each band with PAE
at 6-dB output power back-off ranging from 43% at
the lower band but decreasing to 26% at 2.65 GHz.
The circuit complexity and size increase rapidly with
the number of bands covered, and the advantage of
a multiband versus a broadband design approach
diminishes in practice.
Special care needs to be taken when transmitting
concurrent signals in multiple bands. In particular, the
linearity in each band is degraded. Dedicated concur-
rent dual- and triple-band DPD algorithms have been
proposed in [59] and [70], [72]. Gustafsson et al. have
shown that the fundamental DPA load modulation is
affected by the concurrent multiband operation and
that the behavior of the impedance inverter, also at
interband mixing frequencies (i.e., f2 - f1 and f1 + f2 ),
will degrade the efficiency enhancement if not prop-
erly handled [73].
Multiple frequency bands can also be covered
by using reconfigurable elements in the DPA archi-
tecture. In [74], Mohamed et al. presented a tri-band
1900/2140/2600-MHz DPA that was implemented
using MEMS switches in the combiner and input
matching networks. Based on the same principle,
the authors also presented a combined multimode,
multiband DPA in [75]. Andersson et al. have dem-
onstrated a continuously reconfigurable 1–3-GHz
transmitter [49]. A fixed hardware is used, but a
continuum between outphasing and DPA solutions
is used as a basis to show that a digital reconfigura-
tion of the control schemes to the two RF inputs can
be used to enhance the back-off efficiency across a
record wide frequency range. It should be stressed
that these reconfigurable DPAs do not support con-
current transmission in multiple bands.
RF-DAC Based DPAs
A very active research field in the wireless industry
is digitally intense transmitters for further integration
and performance improvement. In digital transmitters,
the signal generation and modulation are done using
digital only blocks in CMOS and eventually completely
integrated with the baseband processor. One digital
technique studied for amplitude modulation is to oper-
February 2016 55
Advances in solid-state technology and
compact hybrid and MMIC approaches
as well as recent low-cost analog and
digital predistortion techniques have
shown that DPAs will not disappear
in the near term.
ate the PA as a multibit DAC. The output amplitude con-
trolled by regulating the number of active transistors
in the PAs. In conventional RF-DAC circuits, however,
the transistor cells load-pull each other in an undesired
way, causing severe efficiency degradation at back-off.
However, by combining the output of two RF-DACs
with a Doherty combiner network, proper load modu-
lation may be enabled. A generalized schematic of an
RF-DAC based DPA is shown in Figure 22.
In [76], Gaber et al. demonstrated a 2.4-GHz,
25-dBm RF-DAC–based DPA in 90-nm CMOS technol-
ogy. Tuning capacitors at the output were also utilized
to further improve the load modulation. Song et al.
have demonstrated a 3.7-GHz, 27-dBm RF-DAC DPA
in 65-nm CMOS, using transformer-based passives
for the input power divider and output combiner net-
works to minimize losses in the passives [77].
The RF-DAC–based DPA architecture enables indi-
vidual control of the current profiles of the carrier
and peaking PAs. In [78], Song et al. explored this for
antenna mismatch correction. It was shown that the
high-efficiency Doherty operation can be maintained
for a wide range of load impedances by reconfiguring
the digital control bits.
Millimeter-Wave DPAs for 5G
The wireless industry is planning to exploit millimeter
bands in 5G systems to augment the currently satu-
rated 700-MHz–3.5-GHz radio spectrum bands. Inter-
est in millimeter-wave, high-efficiency transmitter
architectures is, therefore, rapidly growing [79], [80].
There are, however, a number of challenges ahead that
M
2
Main Amplifier
(Class AB) Lp
2
COut
Input COut
M RL
2 Ls
Lp
Auxiliary 2
Amplifier COut
(Class C)
Figure 24. The schematic illustration of a voltage-
combined DPA [86].
Recent developments of the Doherty
concept make it one of the most
attractive candidates for realizing
energy-efficient wireless systems
into the future.
have to be solved for successful realization of millime-
ter-wave DPAs:
•• At millimeter wave frequencies, the devices typi-
cally provide very low gain for class-C operation.
This fact may severely limit the PAE of millime-
ter-wave DPAs.
•• Metallic losses become more prominent at high
frequencies. Low-loss realization of the quarter-
wavelength inverter and phase shifter networks
has to be studied.
•• Due to low output power levels, digital predis-
tortion is not feasible for millimeter-wave appli-
cations. Millimeter-wave DPAs should therefore
provide a good analog linearity for successful real-
ization 5G base-station transmitters.
Some of these problems have already been
addressed in recent publications. In [79], Agah et al.
have realized a 45-GHz active phase-shift DPA in
45-nm silicon-on-insulator (SOI) CMOS. The authors
proposed to replace the quarter-wavelength input
phase shifter with an extra predriver amplifier to
improve the PAE. A block diagram of the concept is
shown in Figure 23. The prototype presents peak and
6-dB back-off efficiencies of 20% and 21%, respectively.
Further, the authors also studied the use of slow-wave
coplanar waveguides (CPWs) for realization of the
impedance inverter to minimize the metallic losses. It
was shown that the slow-wave CPW structure yields
42% more PAE at 6-dB back-off compared to the con-
ventional CPW structure.
In [81], Kaymaksut et al. proposed the voltage-com-
bined DPA concept, which enables compact integrated
realizations. The idea originates from the principle of
distributed active transformer PAs [82]. In this topol-
ogy, the voltages of the differential carrier and peaking
PA cells are summed using transformers (see Figure 24).
Neither a quarter-wavelength inverter nor an input
phase shifter is needed in such an approach, which
makes it very suitable for handset and millimeter-wave
base-stations applications. In fact the topology is already
studied in various publications for realizing S-band
handset DPAs [83]–[85]. The first millimeter-wave
realization, however, was presented in [86]. A 77-GHz,
21-dBm voltage-combined DPA was implemented in a
40-nm CMOS process. An on-chip envelope detector
was also implemented for dynamic biasing of the peak-
ing cell. In this way the carrier device can be biased
in class-A/B operation at peak power and below the
gate threshold for lower signal envelopes. The class-C
56 February 2016
operation mode and its associated low gain are thereby
avoided. The PAE at peak power and 6-dB back-off is
13.6% and 7%, respectively.
Finally, it should also be mentioned that the net-
work synthesis methodology in [38] and [39] enables
the functionality of the matching networks, offset
lines, and impedance inverter to be realized with
a network that consists of only five reactive compo-
nents. Such a high level of integration may create new
opportunities for research and development of inte-
grated handset and millimeter-wave DPAs with high
performance.
Conclusions
Eighty years ago, William Doherty invented a PA archi-
tecture that has played—and will continue to play—an
important role in the development of energy-efficient
radio transmitters for a variety of wireless communica-
tion applications. Although the original concept is still
equally valid, the development of new semiconductor
processes and digital signal processing techniques has
served as a basis for an evolution of the DPA topology
into the 21st century. The need for energy-efficient
power amplification will be further emphasized in
future wireless systems (5G and beyond) through the
projected exploration of dense-antenna arrays and
millimeter-wave frequencies. Recent developments of
the Doherty concept make it one of the most attractive
candidates for realizing energy-efficient wireless sys-
tems into the future.
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