Power Converter Analysis and Design

Dr.
Huang-Jen Chiu
Dept. of Electronic Engineering
National Taiwan University of
Science and Technology
Office: EE 706-1
Tel: 02-2737-6419
E-mail: hjchiu@mail.ntust.edu.tw
http:// 140.135.13.125
台科大電力電子研究室
Outlines
z Fundamental Topologies of SPS

z Current-Mode and Current-Fed Topologies
z Transformer and Magnetics Design
z Power Transistor Drive Circuits
z Magnetic-Amplifier Postregulators
z Power Factor Correction Techniques
z High Frequency Power Sources for Fluorescent Lamps
z Telecom Power Supply
z Introduction to EMC
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The Series-Pass Linear Regulator

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z Poor efficiency, narrow input voltage range and very low hold-up time.
z Bulky and expensive heat sinks and cooling fans are needed, and large 60Hz
isolation transformers are used to step down the ac input voltage.
z Tight regulation band along with very low output noise and ripple.
Linear Regulator Efficiency & Output Voltage
1 + 0.01T 1 − 0 .01T Vo
Vdc (max) = (Vo + 2.5 + Vr / 2) Efficiency = ( )
1 − 0.01T 1 + 0 .01T V o + 2 .5 + V r / 2
Switching Power Supplies
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z Compact, lightweight power supplies, with high power densities.

z Very wide input voltage range, 90 to 260Vac.
z Very good hold-up time.
z High output noise and ripple, EMI generation, and higher design
complexity.
The Voltage Doubler Technique
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z Input circuit capable of accepting all world voltages,

normally 90 to 130Vac or 180 to 260Vac.
z Both ends of the switch have to be accessible on the
outside of the supply which is a safety hazard.
Input Rectifiers
z Maximum forward rectification current capability, at least twice the

steady-state current capacity of the calculated value.
z Peak inverse voltage (PIV) blocking capability, normally 600V or more.
z High surge current capabilities to withstand the peak currents associated
with turn-on.
Input Protective Devices
z The Thermistor Technique

z The Resistor-Triac Technique
NTC thermistor’s resistance drops drastically as the temperature increases
Microsoft
PowerPoint 簡報
Input Transient Voltage Protection

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z High voltage spikes to be induced, caused by nearby inductive switching

or lightning.
z The most common suppression device is the metal oxide varistor (MOV).
z Choose the ac voltage rating of the MOV to be about 10 to 20% greater
than the maximum steady-state value.
z Estimate the maximum transient energy that the circuit may experience.
z Make sure that the maximum peak surge current of the device will be
properly rated.
Input Filter Capacitors
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z The selection will influence the low-frequency ripple and the hold-up
time.
z High-grade electrolytic capacitors with low ESR are used.
z The formula to calculate the filter capacitor is given by
It
C =
ΔV
I：load current, A
t：hold-up time, ms
ΔV：allowable peak-to-peak ripple, V
Design Example
z Calculate the value of the input filter capacitors of a 50W

switching power supply working at 115Vac, 60Hz.
Pout 50
Pin = = = 71.5W
η 0.7
Pin 71 . 5
I = = = 0 . 22 A
E 320
It 0 . 22 ( 8 × 10 − 3 )
C = = = 58 μ F
ΔV 30
Choose a standard value of 50μF.

Since in the voltage doubler configuration, then C1=C2=100μF
Buck (Step-Down) Regulator
z The output voltage is always lower than the input voltage.

z Main application is in regulated dc power supplies and dc motor
speed control.
z Discontinuous switching current causes EMI problems.
Buck Regulator and Critical Waveforms
Buck (Step-Down) Regulator
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z In steady-state operation, the integral of the inductor

voltage over one time period must be zero.
(V d − V o ) T on = V o T off
Vo T
= on = δ < 1
Vd T
δ is the duty cycle
Design Example
A 48V to 24V converter Nominal load 150W

Switching frequency 100kHz Inductor current ripple <25%
Output voltage ripple <1%
z Duty cycle, δ=Vo/Vin=24/48=0.5

z Output load current, Io=Po/Vo=150W/24V=6A
z Ripple current, ΔiL=0.25×6=1.5A
z Switch peak current, Isw=IL+ΔiL=7.5A
z Switch peak voltage, Vsw=Vin=48V
z Inductor, L=(Vin-Vo)×δ×Ts/(2×ΔiL)=40μH
z Capacitor, C=ΔiL×Ts/(8×ΔVo)=7.8μF
Choose 22μF or higher
C=ΔiL×Ts/(8×ΔVo)
Basic Buck Regulator from L.T. Inc.
Internal Circuitry of LT1074
Buck Regulator
Buck Regulator Efficiency
LT1376-5 High-Efficiency
Buck Regulator
High Efficiency 5V to 3.3V Step-Down
Step-Down Switching Regulators
3.3V/1.8V Dual Buck Regulator
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Boost (Step-Up) Regulator
z The output voltage is always greater than the input voltage.

z Main application is in regulated dc power supplies and the
regenerative braking of dc motors.
z Discontinuous diode current causes high output noise and ripple.
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Boost (Step-Up) Regulator

V d T on = (V o − V d ) T off
Vo 1
= >1
Vd 1−δ
Design Example
A 6V to 48V converter Nominal load 180W

Switching frequency 100kHz Inductor current ripple <10%
Output voltage ripple <1%
z Duty cycle, δ=(Vo-Vin)/Vo=(48-6)/48=0.875
z Output load current,
Io=Po/Vo=180W/48V=3.75A
z Input ripple current, ΔiL=0.1×(180/6)=3A
z Switch peak current, Isw=IL+ΔiL=33A
z Switch peak voltage, Vsw=Vo=48V
z Inductor, L=Vin×δ×Ts/(2×ΔiL)=8.75μH
z Capacitor, C=Vo×δ×Ts/(2×ΔVo×R)=34.2μF
C=Vo×δ×Ts/(2×ΔVo×R) Choose 100μF or higher
Basic Boost Regulator from L.T. Inc.
Internal Circuitry of
LT1170 Boost Regulator
Step-Up Switching Regulators
Additional LTC High-Power
Boost Regulators
Layout Guidelines Acrobat 文件
z Using low EMI inductors

Bad layout example z Using a low value ceramic input filter
capacitor
z Using surface mount components
z PCB can often be used as the heat sink
z Power traces as short and thick as possible
(minimum of 15mil/A)
z Using one standard via per 200mA
Good layout example
Buck-Boost Regulator
z The output voltage can be either higher or lower than the input voltage.
z Main application is in regulated dc power supplies, where a negative-polarity
output may be desired.
z High output noise and ripple, EMI generation.
Buck-Boost Regulator

V d T on = V o T off
Vo δ
=
Vd 1−δ
’Cuk Regulator
z The output voltage can be either higher or lower than the input voltage.
z Main application is in regulated dc power supplies, where a negative-polarity
output may be desired.
z Ripples free output, leading to lower external filtering requirements.
’Cuk Regulator
’Cuk Regulator
V in T on = ( V C 1 − V in )T off
V C1 1
=
V in 1−δ
( V C 1 − V o ) T on = V o T off
Vo
= δ
V C1
Vo δ
⇒ =
V in 1−δ
’Cuk Regulator
z The output current ripple could be

eliminated by using the coupled inductor.
Sheppard-Taylor Regulator
z The topology is ideal for high frequency applications (above 100kHz).

z A reservoir capacitor can be used to increase hold-up time.
Forward Power Converter
z Output power under 150W to 200W

z Maximum DC input voltage is in the range of 60V to 200V
z The reset winding and diode D1 provide the transformer
demagnetization
Forward Power Converter
z Maximum off-voltage stress in power transistor is 1.3(2VDC,max)

Multiple-Output Forward Converter
z The forward converter may also be used to derive multiple output

voltage, although this circuit requires an extra diode and choke in each
derived voltage.
z A negative-feedback loop is closed around the master and controls the
Q1 so as to keep Vom constant against line and load changes.
Double-Ended Forward Converter
z Both transistors are subjected to only the DC input voltage rather

than twice that as in the single-ended converter
z At turnoff, there is no leakage inductance spike
Interleaved Forward Converter
z There are two pulses per period and each

converter supplies half the total output power
z Interleaved converter will generate less EMI.
Flyback Power Converter
z The major advantage is that the output inductors are not required.
z Widely used for high output voltages at relatively low power.
(<5kV, at <15W).
z It also be used at powers of up to 150W if DC supply voltages are high
enough.
Flyback Power Converter
z A core with a relatively large volume and air gap must be used.
z A more usual gapped core is the MPP or molypermalloy powder core.
z A small inductor may be necessary between the rectifier and the output
capacitor in order to suppress high- frequency switching noise spikes
Multiple-Output Flyback Converter
z It is a frequent choice for a supply with many output voltages in

the region of 50W to 150W.
z The better tracking is due to the absence of output inductors.
Double-Ended Flyback Converter
z Diodes D1 and D2 acts as clamping diodes restricting the

maximum collector voltage of the transistors to Vin
Interleaved Flyback Converter
z A single DCM flyback at the 300W level is impractical because of the

high peak primary and secondary currents.
z The much larger primary inductance makes the CCM a less desirable
choice.
Hysteresis Loop Core Characteristics
A typical magnetic core (gapless) A core with an air gap
Bmax：the maximum flux density

Bres：the residual magnetic flux, when the magnetizing force is zero
Hc： the coercive force necessary to reduce the residual induction to zero
Push-Pull Power Converter
z The transformer will use both halves of the B-H curve.

z The volume of the core will be halved.
Push-Pull Power Converter
z The voltage rating of the transistors should handle twice the input
voltage plus any spike that might result because of transformer leakage
inductance.
z The second problem is the transformer core saturation.
Limitations of the Push-Pull Circuit
Half-Bridge Power Converter
z It subjects the off transistor to only Vdc and not twice that as do the
push-pull and singled forward converter.
z The transformer voltage has been reduced to Vdc/2, the transistor
working current will double.
z Peak primary current determines the practical maximum available output
power (400 to 500W) for a half bridge.
The Series Coupling (Blocking) Capacitor
z To balance the volt-second integral automatically in order to avoid core

saturation by inserting a capacitor in series with the transformer primary.
z The coupling capacitor is normally a film type nonpolar capacitor with lower
ESR.
fR：resonant frequency
1 fS：switching frequency
fR =
2π LR C C：coupling capacitance
LR： reflected filter inductance
NP 2 NP/NS：transformer turns ratio
LR = ( ) L
NS
1
C=
4π 2 f R2 ( N P / N S ) 2 L
f R = 0.25 f S
Find the coupling capacitance of a converter working at 20kHz, which

has an output inductance of 20μH and a transformer turns ratio of 10.
NP 2
LR = ( ) L = 10 2 ( 20 × 10 − 6 ) = 2 mH
NS
1
C= 2 3 2 −3
= 0.5μF
4(3.14) (5 × 10 ) (2 × 10 )
z Another important aspect relating to the value of the coupling

capacitor is its charging voltage. If this voltage is excessive, it
interferes with the converter regulation at low line.
z The charging voltage VC must have a reasonable value between 10 to

20 percent of Vin/2; that is ,if Vin/2=160V nominal, then 16≤VC≤32
It
ΔV =
C
I：average primary current

t：charging interval
ΔV：arbitrary number from 16 to
32V
Find the coupling capacitance of a converter working at 20kHz,

which has an output inductance of 20μH and a transformer turns
ratio of 10.
3 Pout 3 ( 200 )
I C = 1 .2 × = 1 .2 × = 2 .3 A
V in 320
It 2 . 3 ( 20 × 10 − 6 )
ΔV = = = 90 V
C 0 . 5 × 10 − 6
−6
2 . 3 ( 20 × 10 )
C = = 1 .5 μ F
30
Practical capacitor voltage rating of 200V are more commonly used for
safety purposes.
Commutating Diodes
z When the transistor turns off, the communicating diode steers

transformer leakage inductance energy back to the main dc bus. Thus
high-energy leakage inductance spikes are not present.
z The communicating diode prevents the collector of the on transistor
from swing negative in respect to its emitter in the event of a sudden
off-load situation due to an increase in transformer flux.
z The communicating diodes must be fast-recovery types with a blocking
voltage capability of at least twice the transistor off voltage.
z In practice, diodes with a reverse blocking voltage of 450V are commonly
used.
Double-Ended Forward vs. Half Bridge
z Both candidates for power supplies to be used in the European

market where the prime power is 220VAC.
z Half bridge secondary provides a full-wave output , so the square-
wave frequency in the half bridge secondary is twice that in the
forward converter, and hence the output LC inductor and capacitor
are smaller with the half bridge.
z There are twice as many turns on the forward converter primary as
on the half bridge. The fewer turns on the half bridge primary may
reduced its winding cost and result in lower parasitic capacitors.
Full-Bridge Power Converter
z The transistors never see a collect off-voltage of more than Vin.

z Also, the current through them is half of an equivalent half-bridge
circuit.
z The full bridge can deliver twice the output of the half bridge with
transistors of identical voltage and current ratings.
~
MOSFET Ringing Choke Converter
z Its regulation is good enough for many applications.
Voltage-Mode Regulated Converters
Current-Mode Regulated Converters
Current-Mode Control Scheme
z Automatic feed-forward improves line regulation.

z Automatic current-limiting control, due to the sampling technique
used.
z Automatic symmetry correction, due to peak sensing, makes this
scheme suitable to push-pull converters.
z Simple loop compensation.
z Improved transient response.
z Outputs of more than one converter may be easily paralleled while
maintain equal current sharing.
z Noise sensitivity.
z Loop instability above 50 percent duty cycle.
Current-Mode Deficiencies and Problems
UC 3842 Current Mode Controller
Voltage-Fed Full-Bridge Converter
Deficiencies of Voltage-Fed, Full-Bridge
z Output Inductor Problems.

z Turn-on Transient Problems.
z Turn-off Transient Problems.
z Flux-Imbalance Problems.
Buck-Voltage-Fed Full-Bridge Converter
Ns
V om = V 2 ×
Np
z Elimination of Output Inductors.

z Elimination of Bridge Transistor Turn-on Transients.
z Decrease of Bridge Turn-off Dissipation.
Drawbacks in Buck-Voltage-Fed
Full-Bridge Converter
z The added cost, volume, and power dissipation of the buck transistor and
LC filter.
z The losses, cost, and required space of the snubbers in the buck transistor
is still a drawback.
z Turn-off transient losses are still significant.
z Under fault conditions (unusually long storage time at high temperature and
low load or low line conditions), the low source impedance of the buck filter
capacitors and momentary short circuit across the supply bus, this will
cause immediate failure.
Buck-Current-Fed Full-Bridge Converter
Ns 2
C 1V = C 2 × ( )
Np
Overlapping On Time of
Bridge Transistors
Buck-Current-Fed Full-Bridge
z Z1, D8 constitute an upper clamp to limit V2 when the previously on

transistor turn off
z Energy stored in leakage inductance is fed to the load via the
transformer instead of being returned to the input bus
z Only two turnoff snubbers are required
Turn-on Snubber Eliminating
Turn-on Dissipation in Q5
PD turnon = V1 I L t r / 2Ts
L 2 = V1t r / I L
VQ 5( MAX ) = V1 + Rc I L
. 1 2
PDsnubber = L2 I p / Ts
2
Lossless Turn-on Snubber 台科大電力電子研究室
Buck-Current-Fed Bridge Topology
Buck-Current-Fed Push-Pull Topology
z The topology can be used to greatest advantage in supplies of 2

to 5kW and especially if there are multiple outputs or at least
one high voltage output.
Flyback-Current-Fed Push-Pull Topology
Nonoverlapping Mode
NP N
(Vin − Vo )t on = LP Vo t off
NS N LS Narrow Commutation Spikes
2Vin T at the Output
⇒ Vo = δ, ( = t on + t off )
N 2 台科大電力電子研究室
Overlapping Mode
NP
Vin t on = ( Vo − Vin )t off
NS
Vin T
⇒ Vo = , ( = t on + t off )
2 N1 (1 − δ ) 2 台科大電力電子研究室
Design Example
z Output voltage: 48V

z DC input voltage: nominal, 160V; minimum, 100V
V 160 2[ N 1 (V o + V d ) − V dc (min) ]
N1 = dcn = = 3.27 N2 =
Vo + Vd 48 + 1 Vo + Vd
2[( 3 .2 )( 49 ) − 100 ]
2 N1 (Vo + Vd ) − Vdc = = 2 .46
Vdc < Vdcn ⇒ D = 49
2 N1 (Vo + Vd )
V
(Overlapping ) = 1 − dc
320.5
0.5 N 2Vo
Vdc > Vdcn ⇒ D =
Vdc − Vo ( N1 − N 2 )
59
( Nonoverlap ping ) =
V dc − 38 . 9 台科大電力電子研究室
Low Output Power “Housekeeping” or
“Auxiliary” Topologies
Flyback Housekeeping Power Supply
Flyback Housekeeping Power Supply
Characteristics of Magnetic Material
Ferrite Si-Fe MPP Powdered

Flux Density, B 4600~5100 16000 7000 9000
Permeability, μ 750~15000 4000 14~550 22~90
Temp. 125°C 300 °C 200 °C 200 °C
Core Losses low high medium high
Cost medium medium high low
Characteristics of High Frequency,
Low-loss Core Material
Core Loss for Various Peak Flux Densities
Various Core Geometries
for Power Transformers
Comparisons of Various Core Geometries
Pot DS,RM E EC,ETD PQ EP Toroid
Core Cost high high low medium high medium very low
Bobbin Cost low low low medium high high none
Winding Cost low low low low low low high
Assembly simple simple simple medium simple simple none
Heat Dissipation poor good excellent good good poor good
EMI/ RFI excellent good poor poor fair excellent good
American Wire Gauge (AWG)
Skin Effect in Copper Wire
z Rather than using a single large-diameter wire, a number of paralleled

smaller-diameter wires with a total equal circular-mil areas are used.
1
s=
πfμσ
AC/DC Resistance Ratio for Round Wires
AC/DC Resistance Ratio for
Square-Wave Currents
Proximity Effect in Adjacent Coil Layers
AC/DC Resistance Ratio
due to Proximity Effect
Layer Sequencing in
Push-Pull Transformer
Correct Incorrect
Output Power Relations
for Forward Topology
f：Switching Frequency
Bmax：Peak Flux Density
0.0005 fBmax Ae Ab
Pout = Ae：Core Area
Dcma Ab：Bobbin Winding Area
Dcma：Current Density
Output Power Relations for
Push-Pull Topology
0.001 fBmax Ae Ab
Pout =
Dcma
Output Power Relations for
Half-Bridge Topology
0.0014 fBmax Ae Ab
Pout =
Dcma
Design of Power Transformer
for Half-Bridge Converter
z Design a 100W power transformer to be used in a 20kHz half-

bridge, PWM converter which operates from 90 to 130 and 180 to
260Vac mains and produces 5V at 20A output.
Step1：Choose the Ferroxcube pot-core of 3C8 material.

Step 2：Choose a working Bmax, we take Bmax at 90Vac to be 1600G.
This choice guarantees that Bmax will stay below 3300G at 130Vac,
thus the transformer will not saturate.
Step3：Find the maximum working primary current.
3Pout 3 × 100
IP = = = 1.19 A
Vin. min 2 × 90 × 2
Step 4：Determine core and bobbin size. Choose the 3622-PL00-

3C8 Ferroxcube pot core and the 3622FID bobbin. From the
manufacturer’s data we get Ae=2.02cm2, Ab=0.748cm2，yielding
AeAb=1.5cm4，This value more than adequate for the transformer
design.
(0.68Pout D)103 0.68 ×100 × 400 ×103

Ae Ab = = = 0.85cm 4
fBmax 20 ×103 ×1600
Step 5：Calculate wire size and primary number of turns.

Since we chose 400c. m./A to be the wire current density for
this design, the primary winding requires a wire size of 476c.m.,
which corresponds to no. 23AWG. From the Ferroxcube
catalog, the turns per bobbin graph of the 3622F1D bobbin
shows that approximately 180 turns of no.23 wire are required
to fill the bobbin. Assuming that the primary winding fills 30
percent of the bobbin winding area, if the primary turns are
calculated to be 60 turns or less, then the core and bobbin
choice is correct.
• Taking the worst case operating condition of 90V, Vp,min=90×1.4-20=107V, The

primary number of turns is calculated.
(V p ,min )δ maxT 108

NP =
2 Bmax Ae
107 × 0.5 ×108
= = 41.3turns
2 ×1600 × 20 ×10 × 2.02
3
• We round off the number of turns to 40.
Step 6：Check Bmax at Vin,max=130×1.4+20V=202V.
(V p , max )δ max T 10 8 202 × 0 .5 × 10 8

B max = = = 3125 G
2 N P Ae 2 × 40 × 20 × 10 × 2 .02
3
• The value is below the specified saturation flux density of the

Ferroxcube 3C8 material, which is specified as Bsat≥4400G at
25°C and Bsat≥3300G at 100°C.
Step 7：Calculate the secondary winding wire size and number of

layers. Take the current density at 400c.m./A, then for each half
of secondary winding we need 10×400=4000c.m., which corresponds
to no. 14 AWG, or four wires of 2000c.m., which corresponds to no.
17 AWG.
Vs 10
Ns = N p = 40 = 3.74turns
V p ,min 107
• We will use 4 turns in the secondary.
Faraday Shield
for Flyback Converter
z Design a 100W power transformer to be used in a 20kHz flyback

PWM converter which operates from 90 to 130Vac mains and
produces 5V at 20A output.
Step1：Choose the Ferroxcube pot-core of 3C8 material.

Step 2：Choose a working Bmax, we take Bmax at 90Vac to be 1600G.
This choice guarantees that Bmax will stay below 3300G at 130Vac,
thus the transformer will not saturate.
Step3：Find the maximum working primary current.
2 Pout 2 ×100
IP = = = 4.15 A
Vin ,minδ max (90 × 2 − 20) × 0.45
Step 4：Calculate transformer primary

inductance.
Vin ,minδ max 100 × 0.45

LP = = = 540 μH
IP f 4.15 × 20 × 103
• Choose 400c. m./A to be the wire current density for this design,
then primary winding requires a wire size of 4.15×400=1550c.m.
The value corresponds to no.18 AWG, which has a diameter of
0.044in..
Step 5：Select core and bobbin size. Choose the EC70-3C8 core
and the 70PTB bobbin. From the manufacturer’s data we get
Ae=2.79cm2, Ab=4.77cm2，yielding AeAb=13.3cm4，This value is
much higher than the required one.
(25.32 LP I P D 2 )108
Ae Ab =
Bmax
25.32 × 540 × 10 −6 × 4.15 × 0.044 2 ×108

= = 6.7cm 4
1650
Step 6：Calculate the air gap length and the secondary winding
wire size. Take the current density at 400c.m./A, then for the
secondary winding we need 20×400=8000c.m., which corresponds to
using four no. 17 AWG wires in parallel.
(0.4πLP I P )108
2
lg = 2
Ae Bmax
11.66 × 105
= = 1.5mm
75.96 × 105
Step 7：Calculate transformer primary and secondary number of

turns
( L P I P )10 8 0 .54 × 10 − 3 × 4 .15 × 10 8
NP = = = 47 .68 turns
Ae B max 2 .79 × 1650
• We will use 48 turns.
N P (V out + V D )(1 − δ , max ) 48 ( 5 + 1)(1 − 0 .45 )

NS = = = 3 .52 turns
Vin , min δ max 100 × 0 .45
• We will use 4 turns.

Output Power Inductor Design
Vout toff
L=
0.25 I out
z Design the output inductor L using a ferrite core for a 100W, 20kHz half-
bridge, power supply which has an output of 5V at 20A.
Step 1：Calculate the required inductor value L

Vout toff 5 ×12 μ
L= = = 12μH
0.25 I out 0.25 × 20
Step 2：Choose a current density of 400c.m./A. Then for 20A,

the wire is 20×400=8000c.m., which corresponds to no.11 AWG
wire, with a maximum diameter of 0.0948in. or use eight no.20
AWG wires in parallel.
Step 3：Select the minimum size of core
(5.067 LI out D 2 )108

Ae Ab =
KBmax
5.067 ×12 ×10 −6 × 20 × 0.09482 ×108

= = 0.683cm 4
0.8 × 2000
• From ferrite catalogs the 3019 pot core has

AeAb=1.38×0.587=0.81cm4 .
Step 4：Calculate the length of the air gap and the number of turns
( 0 .4π LI out )10 8

2
lg = 2
= 0 .746 mm
Ae B max
Bmax l g
N= = 5.94
0.4πI out
• We will use six turns. Using six no.20 wire conductors in

parallel, the equivalent of 36 turns would be required. The
3622 bobbin and pot core is good choice for this design.
z Design the output inductor L using a MPP core for a 100W, 20kHz half-
bridge, power supply which has an output of 5V at 20A.
Step 1：Calculate the required inductor value L
Vout toff 5 ×12 μ

L= = = 12μH
0.25 I out 0.25 × 20
Step 2：Calculate the product of LIout2.
LI out = (12 μ H )( 20 ) 2 = 4 .8
2
Step 3：Select core size
Step 4：Calculate the number of turns to obtain the required inductance.
L 0 .012
N = 1 .2 × 1000 = 1 .2 × 1000 = 12
L1000 127
Step 5：Calculate the wire size. Take the current density at 400c.m./A,
then a 20×400=8000c.m. wire is needed. This corresponds to no. 11 AWG
wire or four no. 17 AWG wires in parallel will be used, the equivalent of
12×4=48 turns. of single no. 17 wire. To check for fit , 48 turns of no.17
wire (2050c.m.) equals 98,400c.m. The 55548 family of MPP cores has a
total windows area of 577,600 cm. Therefore, the winding factor is equal
to 0.17.
Step 6：Calculate the dc magnetizing force and check

permeability reduction.
H = 0 . 154 × 12 × 20 = 36 . 98 Oe
N 2 12 2
L=( ) ( L1000 ) = ( ) (88 .5 ) = 12 .74 μ H
1000 1000
Postregulators
z The magnetic amplifier post-regulator is a better approach than a buck

regulator at currents over 1.5A and credible alternative at lower
currents.
Magnetic Amplifier
Vos N s t f
=
Vdc N p T
Vom N sm t h
=
Vin Np T
Magnetic Amplifier Regulation
( Bs − B1 ) −8
tb = N m Ae 10
Vsp
Core Losses for 1-, ½-mil
Square Permalloy Tapes
Core Losses
for Amorphous Core Materials
BH Loop and Coercive Force for Square
Permalloy and Amorphous Core
Core Loss for 1-, ½-mil Square
Permalloy and Amorphous Core
Total Flux Change and Temperature
Rise versus Core Loss
Magnetic Amplifier for Push-Pull Output
Magnetic Amplifier Controlled
Switching Regulator
( Bs − Bo ) −8
ton = N g Ae 10
1.6
Optimum Base Current Waveforms
Transistor Anti-saturation Circuits
Baker Clamping Darlington Transistors
Proportional Base Drive
ic Nb
= = β
ib Nc
Widely used for high output power or power transistor

currents over about 5 to 8A.
Wood Base Drive Circuit
Base Drive to Upper and
Lower Transistors in Bridge Topology
Direct Coupling from Emitter
of Output Transistor in PWM Chip
Design Considerations
for Driving the Power MOSFET
z A MOSFET is used which has an input capacitance Ciss=500pF,

resistor R1=150Ω. What will be the rise time of the driving
waveform.
t r = 2.2 R1Ciss
= (2.2)(150)(500 × 10 −12 ) = 165ns
• To prevent the transistor from oscillating, minimize gate lead

length or use a small resistor R1 or a ferrite bead in series with
the MOSFET.
Design Considerations
for Driving the Power MOSFET
z A power MOSFET driven from 10VDC generator is switching

320VDC of supply voltage. Given that the MOSFET has a
C1=500pF and C2=100pF, find the total gate current Ig required
to switch the transistor on within 20ns.
dv 320
I m = C2 = 100( ) = 1.6 A
dt 20n
dv 7
I C = C1 = 500( ) = 0.175 A
dt 20n
I g = I m + I c = 1 .775 A
PWM Chip with Totem-Pole Outputs
MOSFET Gate Drive Circuit
Bootstrapping Drive Circuit
• Capacitor C must be made large

enough to sustain this charge, and a
good first approximation is to choose
C>10Ciss
IC Driver (TLP 250)
IC Driver (IR 2110)
• Voffset=600V, Vo=10-20V, Io=2A, tr=120ns
Paralleling MOSFETs
Scheme to avoid using body diode

Flux-Imbalance Correction
in MOSFET Push-Pull Circuit
Gate Drive Requirement of the GTO
• High blocking voltage capabilities, in

excess of 1500V, and also high over-
current capabilities.
• It also exhibits very low saturation
voltage even at high current.
• The GTO is turned on by applying a
positive gate current, and it is
turned off by applying negative
gate-cathode voltage.
Turn-off Snubbers
vls = 2Vdc + ( I P / 2) ( Ll / C1 )
Reduction of Leakage Inductance Spike to Avoid Breakdown
Design Example of Turn-off Snubbers
I C (t r + t f ) ton
C= , R=
VCE 3C
VCE
I dis = (<0.25IC)
R
1
PR = CVCE
2
f
2
tr：Maximum collector voltage rise time

tf：Maximum collector current fall time
Design Example
z Consider a switching transistor used in a half-bridge converter where

VCE=200V, tf=2μs, and tr=0.5μs. The converter is working at 20kHz, and
the transistor collector current is Ic=2A. Calculate the resistance R and
the capacitance C of the snubber network.
I C (t r + t f ) 2(0.5 + 2) × 10 −6 t on 20 × 10 −6
C= = = 25nF ≈ 22nF R= = = 303Ω ≈ 300Ω
VCE 200 3C 3 × 0.22 × 10 −9
VCE 200 VCE 200

I dis = = = 0.67 A > 0.25I C ⇒R= = = 400Ω ≈ 430Ω
R 300 0.25 I C 0.25 × 2
1 2 ( 0 . 022 × 10 − 6 )( 200 ) 2 ( 20 × 10 3 )
PR = CV CE f = = 1W
2 2
Turn-off Snubbers
RCD Snubber Returned to Positive Supply Rail
Nondissipative Snubber
Transformer-Aided Snubber
Power Rectifier Characteristics
Reverse-Recovery Characteristics
a: Schottky barrier rectifier

b: Ultra fast recovery rectifier
c: Conventional fast recovery rectifier
Transient Overvoltage Suppression
Rectifier Diode Peak Current Capability
z Calculate the output rectifier peak forward current rating

which may be used in a 100W flyback converter, providing 5V
at 20A output, working with a duty factor δmax=0.45, at a
frequency of 20kHz.
2 I out
I FM = = 3.6 I out = 72 A
1 − δ max
Rectifier Diode Peak Current Capability
z Calculate the rectifier and the flywheel maximum forward current

rating for a 100W forward converter, providing 5V at 20A output,
working over an input voltage range of 90V to 130V with a duty
factor δmax=0.45, at a frequency of 20kHz.
Rectifier diode I FM = I out δ max = 20 ( 0 . 45 ) = 9 A

V in , min
δ DF = 1− δ min = 1− δ max ( ) = 0 . 76
V in , max
Vin,min=90×1.4-20=106V≅100V
Vin,max=130×1.4=182V≅190V
Flywheel diode I FM = I out δ max = 20 ( 0 . 76 ) = 15 . 2 A
Current Sharing of Rectifier Diodes
Synchronous Rectifiers
Synchronous Rectifiers
Integrated PWM Control Circuit
TL494 PWM Controlled Circuit
UC1846 Current-Mode Controller
Current Sensing Circuits
Self-Bias Technique
Isolation Techniques of
Switching Regulator Systems
Isolation Techniques of Switching
Regulator Systems
Soft-Start Circuit
Current Limit Circuits
Current limit circuits utilizing

Current limit circuits for primary- base driver
referenced direct drive
Current limit circuit utilizing

Current limit circuits utilizing CT one-shot multivibrator
MC3423 OVP Circuit
R1
Vtrip = 2.6(1 + )
R2
MC3425 Sensing Circuit
Feedback-Loop Stabilization
F co Fp
K = =
Fz F co
F co Fp
K = =
Fz F co
−1 −1 1
θ total lag = 270 ° − tan K + tan
K
Compensator Design Example
z Vo 5V
z Io(nom) 10A
z Io(min) 1A
z Switching frequency 100kHz
z Minimum output ripple 50mVP-P
3V o T 3 × 5 × 10 × 10 − 6
Lo = = = 15 μ H
I on 10
dI 2
C o = 65 × 10 − 6 = 65 × 10 − 6 × = 2600 μ F
V or 0 . 05
1 1 1
Fo = = 806 Hz F esr = = = 2 . 5 kHz
−6
2π LoC o 2 π R esr C o 2 π × 65 × 10
0 . 5 (V sp − 1) 0 . 5 × (11 − 1)
Gm = = = + 4 . 5 dB
3 3
2 .5
G m + G s = 4 . 5 + 20 log( ) = 4 . 5 − 6 = − 1 . 5 dB
5
1
F co = F s = 20 kHz
5
R 2 = R1 × 100 ( 40 dB ) = 1k × 100 = 100 k Ω

F co 20 k
= = 8 ⇒ lag = 97 °
F esr 2 .5 k
EA lag = 360 − 45 − 97 = 218 ° ⇒ K = 4
F co 20 1
Fz = = = 5 kHz ⇒ C 1 = = 318 pF
K 4 2 π (100 k )( 5 k )
1
F p = K × F co = 4 × 20 = 80 kHz ⇒ C 2 = = 20 pF
2 π (100 k )( 80 k )
Power Factor Correction
P I S 1, rms
PF = = cos θ
S I S , rms
Commonly Used Control Schemes
z Average Current Control

z Peak Current Control
z Hysteresis Current Control
Basic Configuration of PFC Circuit
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UC3854 Controlled PFC Circuit
Design Procedure Summary
Specifications:
z Pout(max): 1.5kW
z Vin range: 80-270Vac
z Switching frequency: 100kHz
z Line frequency range: 47-65Hz
z Output voltage: 400Vdc
Boost Inductor and Output Capacitor
2 × Pin 1.414 × 1500

Ip = = = 26.5 A
Vin (min) 80
Δ I = 0 .2 × I p = 0 .2 × 26 .5 = 5 . 3 A
Vo − Vin , min( peak ) 400 − 113

δ= = = 0.71
Vo 400
Vin , min( peak ) × δ 113 × 0.71

L= = ≈ 150μH
f s × ΔI 100 × 10 3 × 5.3
2 × Po × Δt 2 × 1500 × 34m
Co = = ≈ 3300μF
2
Vo − V1
2
400 2 − 360 2
Current Sensing Resistor and
Oscillator Frequency
ΔI 5 .3
I p (max) = I p + = 26 . 5 + ≈ 30 A
2 2
V rs 1
Rs = = = 0 . 03 ≈ 0 . 04 Ω
I p (max) 30
V rs (max) = I p (max) × R s = 30 × 0 . 04 = 1 . 2V
1 . 25 1 .25
CT = = ≈ 1 .2 nF
R set × f s 10 K × 100 K
Peak Current Limit
V rs ( ovld ) = I p ( ovld ) × R s
= 36 × 0 .04 = 1 .44 V
V rs ( ovld ) × R pk 1
R pk 2 =
V ref
1 . 44 × 10 K
= = 1 .9 K Ω ≈ 2 K Ω
7 .5
Experimental Waveforms
Smr.ddb
Current Transformers
Used with Negative Output
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UC3852 Controlled Adobe Acrobat
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Power Factor Correction Circuit

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Experimental Results
← vs
is →
Switch-Mode Rectifiers
L is
D1 + + +
L
is
L
is + vL − +
Da Dc D1 D2 vs
+ + vμ
+ vL − + + vL − +
−
vs vμ
−
S1 E vs vμ
−
E −
− C − C
Db Dd S1 S2
− Da Db − diL v v −v V sin θ − vu
= L = s u = s
(a) (b) dθ ωL ωL ωL
+ S1 S3 I s sinθ
D2 +
i S1 is
E L D1 D3 s2
L
s
C +
− + vL − +
vs vμ E s1
+ + vL − + + 2Δ I
D1 − C
−
vs S2 E
vμ C S2 S4
− − θ X θ'
− − D2 D4
Δθ
(c) (d)
The Current Slope Map
m +
+E
ω L m 0
I
di L v v − v u V s sin θ − v u com
= L = s = m c
θ
dθ ωL ωL ωL 0 π 2π
m −
_
E
ωL
state vμ slope 1-switch 2-switch half-bridge 4-switch
1 −E m+ ⎯ ⎯ S2 S2, S3
positive
half 2 0 m0 Da, S1, Dd S1, Db ⎯ S2, D4 or D1, S3
cycle
3 +E m− Da, D1, Dd D1, Db D2 D1, D4
4 +E m− ⎯ ⎯ S1 S1 , S4
negative
half 5 0 m0 Dc, S1, Db D2, Da ⎯ S4, D2 or D3, S1
cycle
6 −E m+ Dc, D1, Db S2, Da D1 D3, D2
The Current Distortion in
Switch-Mode Rectifiers
m0
mc m+
π+α π+α '

θ
0 α α' π 2π
m− ⎛ ω LI s ⎞ ⎛ ωLI s ⎞
α = tan −1 ⎜⎜ ⎟
⎟ α' = 2 tan −1 ⎜⎜ ⎟
⎟
⎝ Vs ⎠ ⎝ Vs ⎠
m+
mc
β β'
0 θ
π 2π
m−
E
β = sin −1 [ ]+ α E < V s2 + ( ω LI s ) 2
V + ( ω LI s )
s
2 2
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Zero Voltage Transition (ZVT) Technique
UC3855 Controlled PFC Circuit
ZVS Technique
I p × Lr π
t ZVT = + Lr C r
Vo 2
ZVS and Current Sensing Circuits
Efficiency Comparison
Vds Vgs
Single-Stage Asymmetrical
Half-Bridge Converter
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Equivalent Circuits for
Switching States
Simulation and Experimental Results
← vs
is →
On-Line UPS Topology
Block Diagram of TMS320C240
Controlled On-Line UPS System
TMS320C2407A Controlled PFC Stage
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Fluorescent Lamp Types
Rapid-Start Fluorescent Lamp
Lamp Waveforms
Distribution of Energy
in Fluorescent Lamp
Block Diagram of Fluorescent Lamp
Light Source
Usual Topologies
Current–Fed Push-Pull Topology
Voltage–Fed Push-Pull Topology
Current–Fed Half-Bridge Topology
Voltage–Fed Half-Bridge Topology
Cold-Cathode Fluorescent Lamp
(CCFL) Ballast
Cold-Cathode Fluorescent Lamp
Acrobat 文件
(CCFL) Ballast Adobe Acrobat

Document
Dual Channel CCFL Ballast
Telecom Power Supply
z Switch mode technology with soft switching and high switching

frequency is used to minimize volume and weight, and to obtain fast
output voltage regulation.
z The modules accept large variations on the input voltage and draws
sinusoidal current with soft start power up.
z When working in parallel, with the control and monitoring unit,

provide active current sharing.
z Conform to all standards necessary.
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z Input Voltage:
Range: 230Vac nominal -20%/+20% (180Vac-275Vac)
Low voltage 100Vac-185Vac: Linear output power reduction
0-100Vac: No output power
High voltage 275Vac-300Vac: Full power, reduced power factor
>300Vac: No output power
z Input Current:
Nominal: 20Arms and 230Vac at full load
Max. inrush current <28Apeak
THD <8%
Input harmonic current: In accordance with EN 61000-3-2
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Electrical Specification Example

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z Output Voltage:
Version: 48V/75Ac nominal 53.5V (40V-58V adjustable)
Static regulation: 0.5% for load 100%-0%
Dynamic regulation: 1% (<10ms) for load step 10%-90%
Hold up time >10ms, full load
Ripple and noise voltage<100mVp-p
z Output Current:
Current share tolerance: 2.5% of rated output
z Efficiency>91% at 230Vac input, 53.3V output and 100% load
z EMI: EN50081
z Immunity: EN50082
A Full Bridge Soft Switched Power Supply
with Current Doubler
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z Devices turn on after anti-

paralleled diode are conducting:
zero-voltage turn-on →Low
switching loss
z Reduced conduction period with
negative current and positive
voltage →Loss of duty cycle
z Unnecessary circulation current
→Increased conduction loss
z Large leakage inductance is
needed to achieve ZVS with a
wide range load →Large overshoot
voltage 台科大電力電子研究室
Full Bridge Topology
and Conventional PWM Waveforms
Phase Shifted PWM Control Waveforms
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Full-Wave Rectifier
Current Doubler Rectifier Adobe Acrobat
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Smr.ddb
Four Basic EMC Problems
z Those required by governmental agencies

z Those imposed by the product manufacturer
Frequency Range of EMC Requirements
Federal Communications Commission (FCC)
z Class A – for use in a commercial, industrial or

business environment
z Class B – for use in a residential environment
Open Area Test Site
Chamber for Measurement of
Radiated Emissions
Radiated EMI Test Setup
Antennas
Conducted EMI Test Setup
Line Impedance Stabilization Network
(LISN)
CISPR Bandwidth Requirements
Common-Mode Choke
Common-Mode Choke
Ferrite Beads
The Effects of Differential-Mode
and Common-Mode Currents
z Common-mode current often produce larger radiated emissions

than the differential-mode currents
Differential-Mode Current Emission
fI D L − j β d − j β S / 2
E D , max = j 2 π × 10 −7
e 0
{e 0
− e jβ 0 S /2
}
d
fI D L − j β d 1
= − 4 π × 10 −7
e sin(
0
β 0S )
d 2
1 πS π Sf
β 0S = = = 1 . 05 × 10 −8
Sf
2 λ0 v0
| I D | f 2L S
| E D , max
| = 1 . 316 × 10 − 14
d
E
| D , max
| = Kf 2
A
ID
Radiated Emission due to
the Differential-Mode Currents
Common Mistakes that Lead to
Unnecessarily Large DM Emissions
Common-Mode Current Emission
fI L jβ 0 d jβ 0 S / 2 jβ 0 S / 2
E C , max = j 2 π × 10 −7 C
e− {e − + e }
d
fI C L 1
= j 4 π × 10 −7
e − jβ 0d
cos( β 0S )
d 2
| I C | fL
| E C , max | = 1 . 257 × 10 −6
d
E C , max
| | = Kf L
IC
Radiated Emission due to
the Common-Mode Currents
Methods of Reducing the
CM Conducted Emissions
Filter Elements
LCM : Common-Mode Choke LDM : Differential-Mode Choke

Cyi : Y Capacitors Cxi : X Capacitors
The Equivalent Circuit of the Filter
for Common-Mode Currents
1 1
f c ,CM = ≈
2π (LCM )
+ LDM ⋅ 2C y 2π LCM ⋅ 2C y
The Equivalent Circuit of the Filter
for Differential-Mode Currents
1
f c , DM ≈
2π (2 LDM + Lleakage )⋅ C x
Measured Conducted Emissions
without EMI Filter
Measured Conducted Emissions with
3300pF Line-to-Ground Cap.
Measured Conducted Emissions with
a 0.1μF Line-to-Line Cap.
with a Green Wire Inductor
with a Common-Mode Choke
Conducted Noise Separation
z Current Probe
z CM/DM Discrimination Network
z Differential Mode Rejection Network (DMRN)
z Active Noise Separator
z Power Combiner
z Software-based CM/DM Measurement

Current Probe to Separate
Conducted Emissions
CM/DM Discrimination Network
to Separate Conducted Emissions
DMRN
Active Noise Separator
Power Combiner
P1 + P2 P1 + P2
Po = + P1 P2 cos φ Po = − P1 P2 cos φ
2 2
Software-Based CM/DM Measurement
The Comparisons among various
Noise Separation Schemes
Scheme Cost Frequency response Components Outputs
DMRN low up to 30 MHz resistors CM
2 × CM or
CM/DM DN average up to 10 MHz high-frequency transformers
2 × DM
up to 15 MHz 2 × CM or
Current probe high current amplifier and probe
(calibration needed) 2 × DM
2 × CM or
Active amp average up to 20 MHz high-frequency op amps
2 × DM
0o and 180o 2 × CM or
Power combiner high up to 30 MHz
power combiners 2 × DM
Y Capacitors
Country Safety Leakage Current Limit Maximum Y Cap.

UL 478 5 mA 120 V 60 Hz 0.11 μF
USA
UL 1283 0.5-3 mA 120 V 60 Hz 0.011-0.077 μF
Canada C 22.2 No 1 5 mA 120 V 60 Hz 0.11 μF
Switzerland IEC 335-1 0.75 mA 250 V 50 Hz 0.0095 μF
3.5 mA 250 V 50 Hz 0.0446 μF
Germany VDE 0804
0.5 mA 250 V 50 Hz 0.0064 μF
United Kingdom BS 2135 0.25-5 mA 250 V 50 Hz 0.0032-0.064 μF
0.5 mA 250 V 50 Hz 0.0064 μF
Sweden SEN 432901
0.25-5 mA 250 V 50 Hz 0.0032-0.064 μF
EMI Automatic Measurement and
Filter Design System
The Effect of Primary-to-Secondary
Capacitance of a Transformer
The Proper Filter Placement
in the Reduction of Conducted Emissions
The Capacitance Equivalent
for the Shielded Receptor Wire
The Lumped Equivalent Circuit for Capacitive
Coupling
^ CAP ^ CAP R NE R FE C RS C GS
V =V ≅ jω V G DC
R NE + R FE C RS + C GS
NE FE
Illustration of Placing a Shield on Inductive
Coupling
Explanation of the Effect
of Shield Grounding
Twisted Wires
Terminating a Twisted Pair
Model for the Unbalanced
Twisted Receptor Wire Pair
A Coupling Model for the
Balanced Termination
Termination of a Cable Shield to a
Noisy Point
z The cable shield may become a monopole antenna, if the

ground potential is varying
z Peripheral cables such as printer cables for PC tend to have
lengths of order 1.5m, which is a quarter-wavelength at
50MHz
z Resonances in the radiated emissions of a product due to
common-mode currents on these types of peripheral cables
are frequently observed in the frequency range of 50-
100MHz 台科大電力電子研究室
Effects of Apertures
z Since it is not feasible to determine the direction of the induced

current and place the slot direction appropriately, a large number of
small holes are used instead
The Methods of Preventing ESD-
induced Currents
Reduction of Loop Area in Power
Distribution Circuits
Reduction of Loop Areas to Reduce
the Pickup of Signal Lines
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Packaging Consideration
z A critical aspect of incorporating good EMC design is an awareness of

these nonideal effects throughout the functional design process
z Another critical aspect in successful EMC design of a system is to not
place reliance on “brute force fixes” such as “shielding” and “grounding”
Segregation of Grounds
The Generation and Blocking
of CM Currents on Interconnect Cables
Interconnection and Number of PCBs
z It is preferable to have only one system PCB rather than several smaller
PCBs interconnected by cables
z The PCBs can be interconnected by plugging their edge connectors into
the motherboard
PCB and Subsystem Placement
z Attention should be paid to the placement and orientation

of the PCBs in the system
Splitting Crystal / Oscillator Frequencies
z The 16th harmonics (32MHz and 31.696MHz) are separated by 304kHz,

so that they will not add in the bandwidth of the receiver
z The 100th harmonic of the 2MHz signal (200MHz) and the 101st harmonic
of the 1.981MHz signal (200.081MHz) will be within 81kHz of each
other and will add in the bandwidth of the receiver
Component Placement
Component Placement
A Good Layout for a
Typical Digital System
Unintentional Coupling of Signals
between Chip Bonding Wires
z Placing a small inductor in series with that pin to block the high-
frequency signal
z Ferrite beads could also be used, but their impedance is typically
limited to a few hundred ohms
Use of Decoupling Capacitors

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Dr.

z Fundamental Topologies of SPS

The Series-Pass Linear Regulator

z Compact, lightweight power supplies, with high power densities.

z Input circuit capable of accepting all world voltages,

z Maximum forward rectification current capability, at least twice the

z The Thermistor Technique

NTC thermistor’s resistance drops drastically as the temperature increases

Input Transient Voltage Protection

z High voltage spikes to be induced, caused by nearby inductive switching

z Calculate the value of the input filter capacitors of a 50W

 Choose a standard value of 50μF.

z The output voltage is always lower than the input voltage.

z In steady-state operation, the integral of the inductor

 δ is the duty cycle

A 48V to 24V converter Nominal load 150W

z Duty cycle, δ=Vo/Vin=24/48=0.5

z The output voltage is always greater than the input voltage.

Boost (Step-Up) Regulator

z In steady-state operation, the integral of the inductor

 δ is the duty cycle

A 6V to 48V converter Nominal load 180W

z Using low EMI inductors

z In steady-state operation, the integral of the inductor

 δ is the duty cycle

z The output current ripple could be

z The topology is ideal for high frequency applications (above 100kHz).

z Output power under 150W to 200W

z Maximum off-voltage stress in power transistor is 1.3(2VDC,max)

z The forward converter may also be used to derive multiple output

z Both transistors are subjected to only the DC input voltage rather

z There are two pulses per period and each

z It is a frequent choice for a supply with many output voltages in

z Diodes D1 and D2 acts as clamping diodes restricting the

z A single DCM flyback at the 300W level is impractical because of the

A typical magnetic core (gapless) A core with an air gap

 Bmax：the maximum flux density

z The transformer will use both halves of the B-H curve.

z To balance the volt-second integral automatically in order to avoid core

Find the coupling capacitance of a converter working at 20kHz, which

z Another important aspect relating to the value of the coupling

z The charging voltage VC must have a reasonable value between 10 to

 I：average primary current

Find the coupling capacitance of a converter working at 20kHz,

z When the transistor turns off, the communicating diode steers

z Both candidates for power supplies to be used in the European

z The transistors never see a collect off-voltage of more than Vin.

MOSFET Ringing Choke Converter

z Its regulation is good enough for many applications.

z Automatic feed-forward improves line regulation.

z Output Inductor Problems.

z Elimination of Output Inductors.

z Z1, D8 constitute an upper clamp to limit V2 when the previously on

z The topology can be used to greatest advantage in supplies of 2

z Output voltage: 48V

Ferrite Si-Fe MPP Powdered

Pot DS,RM E EC,ETD PQ EP Toroid

Bobbin Cost low low low medium high high none

Winding Cost low low low low low low high

Assembly simple simple simple medium simple simple none

Heat Dissipation poor good excellent good good poor good

EMI/ RFI excellent good poor poor fair excellent good

z Rather than using a single large-diameter wire, a number of paralleled

Choose a standard value of 50μF.

δ is the duty cycle

δ is the duty cycle

δ is the duty cycle

Bmax：the maximum flux density

I：average primary current

Step1：Choose the Ferroxcube pot-core of 3C8 material.

Step 4：Determine core and bobbin size. Choose the 3622-PL00-

Step 5：Calculate wire size and primary number of turns.

Step 6：Check Bmax at Vin,max=130×1.4+20V=202V.

Step 7：Calculate the secondary winding wire size and number of

Step1：Choose the Ferroxcube pot-core of 3C8 material.

Step 4：Calculate transformer primary

Step 7：Calculate transformer primary and secondary number of

Step 1：Calculate the required inductor value L

Step 2：Choose a current density of 400c.m./A. Then for 20A,

Step 3：Select the minimum size of core

Step 1：Calculate the required inductor value L

Step 2：Calculate the product of LIout2.

Step 3：Select core size

Step 4：Calculate the number of turns to obtain the required inductance.

Step 6：Calculate the dc magnetizing force and check

Widely used for high output power or power transistor

Reduction of Leakage Inductance Spike to Avoid Breakdown

tr：Maximum collector voltage rise time