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FEATURES DESCRIPTION
n 14V/µs Slew Rate: 10V/µs Min The LT®1057 is a matched JFET input dual op amp in
n 5MHz Gain-Bandwidth Product the industry standard 8-pin configuration, featuring a
n Fast Settling Time: 1.3µs to 0.02% combination of outstanding high speed and precision
n 150µV Offset Voltage (LT1057): 450µV Max specifications. It replaces all the popular bipolar and JFET
n 180µV Offset Voltage (LT1058): 600µV Max input dual op amps. In particular, the LT1057 upgrades the
n 2µV/°C V
OS Drift: 7µV/°C Max performance of systems using the LF412A and OP-215
n 50pA Bias Current at 70°C JFET input duals.
n Low Voltage Noise:
The LT1058 is the lowest offset quad JFET input operational
13nV/√Hz at 1kHz
amplifier in the standard 14-pin configuration. It offers
26nV/√Hz at 10Hz
significant accuracy improvement over presently available
JFET input quad operational amplifiers. The LT1058 can
APPLICATIONS replace four single precision JFET input op amps, while
saving board space, power dissipation and cost.
n Precision, High Speed Instrumentation
n Fast, Precision Sample-and-Hold Both the LT1057 and LT1058 are available in the plastic
n Logarithmic Amplifiers PDIP package and the surface mount SO package.
n D/A Output Amplifiers , LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n Photodiode Amplifiers
n Voltage-to-Frequency Converters
n Frequency-to-Voltage Converters
TYPICAL APPLICATION
Current Output, High Speed, High Input Impedance Distribution of Offset Voltage
Instrumentation Amplifier (All Packages, LT1057 and LT1058)
25
3 VS = ±15V LT1057: 610 OP AMPS
V2 + TA = 25°C LT1058: 520 OP AMPS
1/4 1 7.5k
1130 OP AMPS
LT1058 20 TESTED
2 IOUT = 2(V1 – V2)
– 4.7k 7.5k RX
PERCENT OF UNITS
6 15
– RX
1/4 7
9.1k LT1058 IOUT
5 10
+ 10
500Ω* +
8 1/4
LT1058 5
9
13 4.7k –
–
1/4 14 7.5k 6.8k 0
LT1058 –1.0 –0.6 –0.2 0 0.2 0.6 1.0
12 1k**
V1 + INPUT OFFSET VOLTAGE (mV)
10578 TA01b
*GAIN ADJUST
**COMMON MODE REJECTION ADJUST
BANDWIDTH ≈ 2MHz 10578 TA01
10578fd
1
LT1057/LT1058
ABSOLUTE MAXIMUM RATINGS (Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW TOP VIEW TOP VIEW ORDER PART
NC 1 16 NC OUT A 1 16 OUT D +IN A 1 8 –IN A NUMBER
NC 2 15 NC – IN A 2 – – 15 – IN D V– 2 7 OUT A
OUT A 3 14 V+ +IN A 3
+
A D
+
14 +IN D +IN B 3 6 V+
LT1057S8
– IN A 4 – 13 OUT B V+ 4 13 V– –IN B 4 5 OUT B
LT1057IS8
A
+ +
+IN A 5 12 – IN B +IN B 5 12 +IN C
S8 PART MARKING
+
– –B
B C – S8 PACKAGE
+
V– 6 11 +IN B – IN B 6 11 –IN C 8-LEAD PLASTIC SO
NC 7 10 NC OUT B 7 10 OUT C TJMAX = 150°C, θJA = 200°C/W 1057
NC 8 9 NC NC 8 9 NC
Please note that the LT1057S8/LT1057IS8 standard surface mount pin-
out differs from that of the LT1057 standard CERDIP/PDIP packages. 1057I
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC (WIDE) SO
SW PACKAGE
V+ ORDER PART
16-LEAD PLASTIC (WIDE) SO
TJMAX = 150°C, θJA = 90°C/W TJMAX =150°C, θJA =90°C/W
8 NUMBER
OUTPUT A 1 7 OUTPUT B
–IN A 2
A
+ +
B
6 –IN B
LT1057AMH
– –
ORDER PART ORDER PART LT1057MH
NUMBER NUMBER +IN A 3
4
5 +IN B
LT1057ACH
V – (CASE)
LT1057CH
LT1057SW LT1058SW H PACKAGE 8-LEAD METAL CAN
LT1057ISW LT1058ISW
TOP VIEW
ORDER PART ORDER PART
OUTPUT A 1 14 OUTPUT D NUMBER NUMBER TOP VIEW
–IN A 2 – 13 –IN D
– V+
+IN A 3 +
A D
+ 12 +IN D LT1058ACN LT1057ACN8 OUTPUT 1 8
10578fd
2
LT1057/LT1058
ELECTRICAL
V CHARACTERISTICS S = ±15V, TA = 25°C, VCM = 0V unless otherwise noted. (Note 2)
LT1057AM/LT1058AM LT1057M/LT1058M
LT1057AC/LT1058AC LT1057C/LT1058C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1057 150 450 200 800 μV
LT1057 (S8 Package) 220 1200 μV
LT1058 180 600 250 1000 μV
lOS Input Offset Current Fully Warmed Up 3 40 4 50 pA
lB Input Bias Current Fully Warmed Up ±5 ±50 ±7 ±75 pA
Input Resistance Differential 1012 1012 Ω
Common Mode VCM = –11V to 8V 1012 1012 Ω
Common Mode VCM = 8V to 11V 1011 1011 Ω
Input Capacitance 4 4 pF
en Input Noise Voltage 0.1Hz to 10Hz LT1057 2.0 2.1 µVP-P
LT1058 2.4 2.5 µVP-P
en Input Noise Voltage Density fO = 10Hz 26 28 nV/√Hz
fO = 1kHz (Note 3) 13 22 14 24 nV/√Hz
in Input Noise Current Density fO = 10Hz, 1kHz (Note 4) 1.5 4 1.8 6 fA/√Hz
AVOL Large-Signal Voltage Gain VO = ±10V, RL = 2k 150 350 100 300 V/mV
VO = ±10V, RL = 1k 120 250 80 220 V/mV
Input Voltage Range ±10.5 14.3 ±10.5 14.3 V
–11.5 –11.5 V
CMRR Common Mode Rejection Ratio , LT1057 86 100 82 98 dB
LT1058 84 98 80 96 dB
PSRR Power Supply Rejection Ratio VS = ±10V to ±18V 88 103 86 102 dB
VOUT Output Voltage Swing RL = 2k ±12 ±13 ±12 ±13 V
SR Slew Rate 10 14 8 13 V/µs
GBW Gain-Bandwidth Product f = 1MHz (Note 6) 3.5 5 3 5 MHz
IS Supply Current Per Amplifier 1.6 2.5 1.7 2.8 mA
Channel Separation DC to 5kHz, VIN = ±10V 132 130 dB
10578fd
3
LT1057/LT1058
ELECTRICAL
CHARACTERISTICS (LT1057/LT1058 SW Package Only), VS = ±15V, TA = 25°C, VCM = 0V
unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
in Input Noise Current Density fO = 10Hz, 1kHz 1.8 fA/√Hz
The l denotes the specifications which apply over the temperature range of 0°C ≤ TA ≤ 70°C or –40°C ≤ TA ≤ 85°C (LT1057IS8),
otherwise specifications are TA = 25°C. VS = ±15V, VCM = 0V, unless noted.
LT1057AC LT1057C
LT1058AC LT1058C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1057 l 250 800 330 1400 μV
LT1057IS8 l 500 2300 μV
LT1057S8 l 400 1900 μV
LT1058 l 300 1200 400 1800 μV
Average Temperature LT1057 H/J8 Package l 1.8 7 2.3 12 μV/°C
Coefficient of Input N8 Package l 3 10 4 16 μV/°C
(Offset Voltage) LT1057S8 (Note 5) l 4 16 μV/°C
LT1057IS8 (Note 5) l 4.5 16 μV/°C
LT1058 J Package (Note 5) l 2.5 10 3 15 μV/°C
N Package (Note 5) l 4 15 5 22 μV/°C
IOS lnput Offset Current Warmed Up, TA = 70°C 18 150 20 250 pA
LT1057IS8 l 35 600
IB Input Bias Current Warmed Up, TA = 70°C ±50 ±250 ±60 ±350 pA
LT1057IS8 l ±100 ±900
AVOL Large-Signal Voltage Gain VO = ±10V, RL = 2k l 70 220 50 200 V/mV
CMRR Common Mode Rejection Ratio VCM = ±10.4V l 85 98 80 96 dB
PSRR Power Supply Rejection Ratio VS = ±10V to ±18V l 87 102 84 100 dB
VOUT Output Voltage Swing RL = 2k l ±12 ±12.8 ±12 ±12.8 V
IS Supply Current Per Amplifier l 2.8 3.2 mA
TA = 70°C 14 1.5 mA
10578fd
4
LT1057/LT1058
ELECTRICAL
CHARACTERISTICS (LT1057/LT1058 SW Package Only). The l denotes specifications which
apply over the temperature range of VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C (LT1057SW, LT1058SW) or –40°C ≤ TA ≤ 85°C
(LT1057ISW, LT1058ISW), unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage LT1057 l 0.5 2.5 mV
LT1058S l 0.6 3.0
LT1058IS l 0.7 4.0
Average Temperature Coefficient of l 5 µV/°C
Input Offset Voltage
lOS Input Offset Current Warmed Up, TA = 70°C 20 250 pA
Warmed Up, TA = 85°C 35 400
lB Input Bias Current Warmed Up, TA = 70°C ±60 ±400 pA
Warmed Up, TA = 85°C ±100 ±700
A VOL Large-Signal Voltage Gain VO = ±10V, RL = 2k LT1057 l 50 200 mV
LT1058 l 40 200
CMRR Common Mode Rejection Ratio VCM = ±10.5V LT1057 l 80 96 dB
LT1058 l 78 96
PSRR Power Supply Rejection Ratio VS = ±10V to ±18V LT1057 l 84 100 dB
LT1058 l 82 100
VOUT Output Voltage Swing RL = 2k l ±12 ±12.8 V
The l denotes the specifications which apply over the temperature range of –55°C ≤ TA ≤ 125°C, VS = ±15V, VCM = 0V,
unless otherwise noted.
LT1057AM LT1057M
LT1058AM LT1058M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1057 l 300 1100 400 2000 μV
LT1058 l 380 1600 550 2500 μV
Average Temperature Coefficient LT1057 l 2.0 7 2.5 12 μV/°C
of Input Offset Voltage LT1058 (Note 5) l 2.5 10 3 15 μV/°C
IOS lnput Offset Current Warmed Up, TA = 125°C 0.15 2 0.2 3 nA
IB Input Bias Current Warmed Up, TA = 125°C ±0.6 ±4.5 ±0.7 ±6 nA
AVOL Large-Signal Voltage Gain VO = ±10V, RL = 2k l 40 120 30 110 V/mV
CMRR Common Mode Rejection Ratio VCM = ±10.4V l 84 97 80 95 dB
PSRR Power Supply Rejection Ratio VS = ±10V to ±17V l 86 100 83 98 dB
VOUT Output Voltage Swing RL = 2k l ±12 ±12.7 ±12 ±12.6 V
IS Supply Current Per Amplifier TA = 125°C 1.25 1.9 1.3 2.2 mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: Current noise is calculated from the formula:
may cause permanent damage to the device. Exposure to any Absolute in = (2qlb)1/2
Maximum Rating condition for extended periods may affect device where q = 1.6 • 10 –19 coulomb. The noise of source resistors up to 1G
reliability and lifetime. swamps the contribution of current noise.
Note 2: Typical parameters are defined as the 60% yield of distributions of Note 5: This parameter is not 100% tested.
individual amplifiers; (i.e., out of 100 LT1058s or, 100 LT1057s, typically Note 6: Gain-bandwidth product is not tested. It is guaranteed by design
240 op amps, or 120 for the LT1057, will be better than the indicated and by inference from the slew rate measurement.
specification).
Note 3: This parameter is tested on a sample basis only.
10578fd
5
LT1057/LT1058
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias and Offset Currents Input Bias Current Over
vs Temperature the Common-Mode Range Warm-Up Drift
1000 1.6 160 100
1.4 140
1.0 100
100 TA = 125°C TA = 70°C 60 LT1058 N PACKAGE
0.8 80
BIAS CURRENT
0.6 60
30 40
0.4 40 LT1057 N, LT1058 J PACKAGE
80 80
70 70 14, 16µV/°C
10
65
60
60 60 0
44 –10
40 40
32 31 –20
24 27
22 –30
20 16 20
9 11 –40
2 4 5 4 2 1 4 5 3
0 0 –50
–12 –9 –6 –3 0 3 6 9 12 –12 –9 –6 –3 0 3 6 9 12 0 1 2 3 4 5
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) TIME (MONTHS)
10578 G04 10578 G05 10578 G06
300
VOLTAGE GAIN (V/mV)
50
RL = 1k
30 100
20
30
10578fd
6
LT1057/LT1058
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate, Gain-Bandwidth Undistorted Output Swing vs
Large-Signal Response Product vs Temperature Frequency
30 10 30
VS = ±15V VS = ±15V
TA = 25°C
SLEW RISE 12
10 2
10578 G10 6
0.5µs/DIV
AV = +1
CL = 100pF
0 0
–50 –25 0 25 50 75 100 125 100k 1M 10M
TEMPERATURE (°C) FREQUENCY (Hz)
10578 G11 10578 G12
OVERSHOOT (%)
80 50
GAIN (dB)
AV = –1
60 140 40
AV = +1
GAIN PHASE
40 30
20 160 20
10578 G13 VS = ±15V AV = 10
0.2µs/DIV 10
AV = +1 0 TA = 25°C
CL = 100pF CL = 10pF
–20 180 0
1 10 100 1k 10k 100k 1M 10M 100M 10 100 1000 10000
FREQUENCY (Hz) CAPACITIVE LOAD (pF)
10578 G14 10578 G15
TA = 25°C
10mV 0.5mV 140
CHANNEL SEPARATION (dB)
5
OUTPUT IMPEDANCE (Ω)
LIMITED BY
THERMAL RS = 10Ω 10
120 INTERACTION
FROM LEFT TO RIGHT: AT DC = 132dB AV = 10
0 SETTLING TIME TO 10mV, 5mV, 2mV,
1mV, 0.5mV RS = 1k
100 LIMITED BY
PIN-TO-PIN 1
0.5mV CAPACITANCE
–5 VS = ±15V
10mV 80 TA = 25°C
AV = 1
VS = ±15V VIN = 20VP-P TO 5kHz
TA = 25°C RL = 2k
–10 60 0.1
0 1 2 3 1 10 100 1k 10k 100k 1M 1k 10k 100k 10M
SETTLING TIME (µs) FREQUENCY (Hz) FREQUENCY (Hz)
10578 G16 10578 G18
10578 G17
10578fd
7
LT1057/LT1058
TYPICAL PERFORMANCE CHARACTERISTICS
Common Mode Rejection Ratio Common Mode Range Common Mode and Power Supply
vs Frequency vs Temperature Rejections vs Temperature
120 15 120
VS = ±15V VS = ±10V TO ±17V FOR PSRR
TA = 25°C 14 VS = ±15V, VCM = ±10.5V FOR CMRR
100
13
PSRR
60 ±10
–11 CMRR
40 100
–12
–13
20
–14
VS = ±15V
0 –15 90
10 100 1k 10k 100k 1M 10M –50 0 50 100 –25 25 75 125
FREQUENCY (Hz) TEMPERATURE (°C) TEMPERATURE (°C)
10578 G19 10578 G20 10578 G21
40
120 TA = –55°C
APPLICATIONS INFORMATION
The LT1057 may be inserted directly in LF353, LF412, with RS and RF in the kilohm range, this pole can create
LF442, TL072, TL082 and OP-215 sockets. The LT1058 excess phase shift and even oscillation. A small capaci-
plugs into LF347, LF444, TL074 and TL084 sockets. Of tor (CF) in parallel with RF eliminates this problem. With
course, all standard dual and quad bipolar op amps can RS (CS + CIN) = RF CF, the effect of the feedback pole is
also be replaced by these devices. completely removed.
CF
8
LT1057/LT1058
APPLICATIONS INFORMATION
Settling time is measured in a test circuit which can be Offset voltage also changes somewhat with temperature
found in the LT1055/LT1056 data sheet and in Application cycling. The AM grades show a typical 40µV hysteresis
Note 10. (50µV on the M grades) when cycled over the –55°C to
125°C temperature range. Temperature cycling from 0°C to
Achieving Picoampere/Microvolt Performance 70°C has a negligible (less than 20µV) hysteresis effect.
In order to realize the picoampere/microvolt level accuracy The offset voltage and drift performance are also affected
of the LT1057/LT1058, proper care must be exercised. For by packaging. In the plastic N package, the molding com-
example, leakage currents in circuitry external to the op pound is in direct contact with the chip, exerting pressure
amp can significantly degrade performance. High quality on the surface. While NPN input transistors are largely
insulation should be used (e.g., TeflonTM, Kel-F); cleaning unaffected by this pressure, JFET device drift is degraded.
of all insulating surfaces to remove fluxes and other resi- Consequently for best drift performance, as shown in the
dues will probably be required. Surface coating may be Typical Performance Characteristics distribution plots, the
necessary to provide a moisture barrier in high humidity J or H packages are recommended.
environments.
In applications where speed and picoampere bias currents
Board leakage can be minimized by encircling the input are not necessary, Linear Technology offers the bipolar
circuitry with a guard ring operated at a potential close to input, pin compatible LT1013 and LT1014 dual and quad
that of the inputs; in inverting configurations, the guard op amps. These devices have significantly better DC
ring should be tied to ground, in noninverting connections, specifications than any JFET input device.
to the inverting input. Guarding both sides of the printed
circuit board is required. Bulk leakage reduction depends Phase Reversal Protection
on the guard ring width.
Most industry standard JFET input single, dual and quad
The LT1057/LT1058 have the lowest offset voltage of any op amps (e.g., LF156, LF351, LF353, LF411, LF412,
dual and quad JFET input op amps available today. However, OP-15, OP-16, OP-215, TL084) exhibit phase reversal at
the offset voltage and its drift with time and temperature are the output when the negative common mode limit at the
still not as good as on the best bipolar amplifiers (because input is exceeded (i.e., below –12V with ±15V supplies).
the transconductance of FETs is considerably lower than The photos below show a ±16V sine wave input (A), the
that of bipolar transistors). Conversely, this lower trans- response of an LF412A in the unity gain follower mode
conductance is the main cause of the significantly faster (B), and the response of the LT1057/LT1058 (C).
speed performance of FET input op amps.
The phase reversal of photo (B) can cause lock-up in servo
systems. The LT1057/LT1058 does not phase-reverse due
Teflon is a trademark of DuPont. to a unique phase reversal protection circuit.
(A) ±16V Sine Wave Input (B) LF412A Output (C) LT1057/LT1058 Output
10578fd
9
LT1057/LT1058
TYPICAL APPLICATIONS
Low Noise, Wideband, Gain = 100 Amplifier with High Input Impedance
4.3k
470Ω
–
1/4 2.4k 7.5k
LT1058
500Ω
+
4.3k 2.4k
–
1/4
470Ω LT1058 OUTPUT
– +
1/4
LT1058
INPUT +
4.3k 2.4k
10578 TA02
4.7k 1k 4.7k
1k
– –
1/4 1/4
LT1058
+ LT1058
+
1/4 1/4
INPUT + LT1058 + LT1058
OUTPUT
– –
4.7k 4.7k
1k 1k
100Ω
–3dB BANDWIDTH = 400kHz
GAIN-BANDWIDTH PRODUCT = 400MHz
WIDEBAND NOISE = 13nV/√Hz REFERRED TO INPUT
10578 TA03
0.01µF
100Ω
CRYSTAL
20kHz
COMMON MODE
NT CUT
SUPPRESSION
– 1VRMS OUT
1/2 20kHz
LT1057 0.005%
100k
+ DISTORTION
#327
15pF LAMP OSCILLATOR
–
1/2
LT1057
+
10578 TA04
10578fd
10
LT1057/LT1058
TYPICAL APPLICATIONS
Fast, Precision Bridge Amplifier
330pF 10k
–
1/2
LT1057
+
10k
1k
– 330pF
RLOAD
1/2
LT1057 LT1010 LT1010
INPUT +
Analog Divider
80.6k* 20k
1µF
LTC1043 LTC1043 5V
1k
B INPUT 7 8 –5V 6 5 –
1/2
LT1057 OUTPUT = A
LT1004 B
1µF
12
1.2V + +
2
–5V
0.001
POLYSTYRENE
11
13 14
1µF 16
75k*
A INPUT –
1/2
LT1057
+
30pF
22k 330k
2N2907
1µF
* 1% FILM –5V
10578 TA06
10578fd
11
LT1057/LT1058
TYPICAL APPLICATIONS
Bipolar Input (AC) V/F Converter
1k LTC1043
–5V 6 2 5
LT1004 0.1µF 16
2.5V
1M*
18 3 15
1M*
0.01 +
POLYSTYRENE 1/4
LT1058 –
DATA
1/4
1µF
2N3906 – LT1058 OUTPUT
0kHz TO 1kHz
5V +
INPUT 36.5k*
±1V
– 1M* 1M*
10k 1/4
LT1058 10k 22k 150pF
+
10k
–5V
– 0.1µF
1/4 SIGN *1% FILM
LT1058 BIT MATCH 1M RESISTORS TO 0.05%
+
10578 TA07
10k
0.001µF
CLOCK
–
1/4 BOUT
LT1058
+ 10k
FLIP-FLOP
INTEGRATOR 15V 2k
0.01µF 5V 10k
EIN – 14 1 4
100k* 1/4 2 3
74C74
LT1058
+ 5 6 7 10k
–5V
+
180pF 68pF 1/4
6.8k AOUT
LT1058
10k
15V –
10k OUTPUT
–15V 2N3906 10k GATE
4 16
LTC1043
LEVEL
CURRENT 820Ω
SHIFT
SWITCH
15 18
–15V
17 3 + 1k
–15V 1/4
2N4393 OUT
LT1058
LT1021 IN
–
NC
10V
A
DATA OUTPUT = OUT GND
BOUT
*VISHAY S-102 RESISTOR 95k*
10k
10578 TA08
–15V
10578fd
12
LT1057/LT1058
TYPICAL APPLICATIONS
Instrumentation Amplifier with Shield Driver
3
+
1/4 1 1k 10k
LT1058
2
– RF
9.1k
GUARD RG 15V
1k
10 5
+ + + 4
8 1/4 1/4 7
INPUT LT1058 LT1058 OUTPUT
– –
9
RG
6
– 11
1k
–15V
GUARD
13 RF
– 9.1k GAIN = 10(1+RF/RG) ≈ 100
1/4 14 10k IB = 5pA
LT1058 RIN = 1012Ω
12 1k
+ BW = 350kHz
10578 TA09
6 Q4 4
10 1M 50k
5 11 DARK
2k Q5 1M TRIM
12 FULL-SCALE
750k* TRIM
500pF 50k*
–
1/2
LT1057
IP 0.01µF
+
–
0.033µF 1/2
LT1057 EOUT
+
LT1021-10V
10k*
15V – 1
IN OUT 3k 2 3
10k* LM301A Q2
+
2k
33Ω
15 7 RESPONSE DATA
14 8 LIGHT (900µM) DIODE CURRENT CIRCUIT OUTPUT
Q1 Q3 1MW 350µA 10.0V
13 9 100µW 35µA 7.85V
15V 10µW 3.5µA 5.70V
= HP-5082-4204 PIN PHOTODIODE. 1µW 350nA 3.55V
Q1–Q5 = CA3096. 100nW 35nA 1.40V
CONNECT SUBSTRATE OF CA3096 10nW 3.5nA –0.75V
ARRAY TO Q4’s EMITTER.
*1% RESISTOR
100dB RANGE LOGARITHMIC PHOTODIODE AMPLIFIER 10578 TA10
10578fd
13
LT1057/LT1058
PACKAGE DESCRIPTION
H Package
8-Lead TO-5 Metal Can (.200 Inch PCD)
(Reference LTC DWG # 05-08-1320)
.335 – .370
(8.509 – 9.398)
DIA
.027 – .045 .305 – .335
(0.686 – 1.143) (7.747 – 8.509)
45°TYP PIN 1 .040
.028 – .034 (1.016) .050
(0.711 – 0.864) MAX (1.270) .165 – .185
MAX (4.191 – 4.699)
.200
REFERENCE
(5.080) PLANE
SEATING
TYP PLANE GAUGE
PLANE .500 – .750
.010 – .045* (12.700 – 19.050)
.110 – .160 (0.254 – 1.143)
(2.794 – 4.064) .016 – .021**
INSULATING (0.406 – 0.533)
STANDOFF
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
.405
(10.287)
.200 .005 MAX
.300 BSC CORNER LEADS OPTION (5.080) (0.127)
(7.62 BSC) (4 PLCS) MAX MIN
8 7 6 5
.015 – .060
.023 – .045 (0.381 – 1.524)
.025 .220 – .310
(0.584 – 1.143)
(0.635) (5.588 – 7.874)
HALF LEAD
RAD TYP
.008 – .018 OPTION
0° – 15°
(0.203 – 0.457) .045 – .068
(1.143 – 1.650) 1 2 3 4
FULL LEAD .045 – .065
OPTION .125
(1.143 – 1.651)
3.175
NOTE: LEAD DIMENSIONS APPLY TO SOLDER MIN
DIP/PLATE OR TIN PLATE LEADS .014 – .026 .100
(0.360 – 0.660) (2.54) J8 0801
BSC
J Package
14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
.200
.300 BSC
(5.080)
(7.62 BSC) MAX
.785
(19.939)
.015 – .060 .005
MAX
(0.381 – 1.524) (0.127)
MIN 14 13 12 11 10 9 8
.008 – .018
0° – 15°
(0.203 – 0.457)
.025 .220 – .310
(0.635) (5.588 – 7.874)
.045 – .065 .100 .125 RAD TYP
(1.143 – 1.651) (2.54) (3.175)
NOTE: LEAD DIMENSIONS APPLY BSC
TO SOLDER DIP/PLATE OR TIN .014 – .026 MIN 1 2 3 4 5 6 7
PLATE LEADS (0.360 – 0.660) J14 0801
OBSOLETE PACKAGES
10578fd
14
LT1057/LT1058
PACKAGE DESCRIPTION
N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
8 7 6 5 .065
(1.651)
.008 – .015 TYP
(0.203 – 0.381) .255 ±.015* .120
(6.477 ±0.381) (3.048) .020
+.035 MIN (0.508)
.325 –.015
MIN
( )
.100 .018 ±.003
+0.889 (2.54)
8.255 (0.457 ±0.076) N8 REV I 0711
–0.381 1 2 3 4
BSC
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
+.035
.325 –.015 .005
.120 .018 ±.003
(
8.255
+0.889
–0.381 ) 1 2 3 4 5 6 7 (3.048)
MIN
(0.127) .100
MIN (2.54)
BSC
(0.457 ±0.076)
N14 REV I 0711
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.189 – .197
.045 ±.005 (4.801 – 5.004)
.050 BSC NOTE 3
8 7 6 5
10578fd
15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1057/LT1058
TYPICAL APPLICATION
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
1 2 3 N/2 N/2
.050
.004 – .012
.009 – .013 (1.270)
NOTE 3 (0.102 – 0.305)
(0.229 – 0.330) BSC
.014 – .019
.016 – .050
(0.356 – 0.482)
(0.406 – 1.270)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) S16 (WIDE) 0502
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10578fd