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Figure. 1: Schematic diagram of the architecture of the Smart Grid Test Bed
Following are some of the results that have been obtained by
IV. PMU AND PDC TESTING USING THE TEST BED performing tests on PMUs using the test bed –
Out of the several applications of the test bed mentioned in
A. Steady State Test on a PMU (Magnitude Change Test)
the previous section, one application that has been described
here is – synchrophasor device (PMU & PDC) testing.
Utilities need the guarantee for reliable and accurate operation
of PMUs and all applications dependent on PMU data as well
as the seamless interchangeability among PMUs from
different vendors before they invest heavily in them. Clause-5
of the revised Synchrophasor standard IEEE C37.118.1-2011
[19] describes the steady state and dynamic tests on PMUs.
This standard has been going through process of revisions and
Case-a: Balanced Conditions
still need more inputs from researchers and industries. With
this motivation, research is being currently performed at
SGDRIL to make PMU and PDC testing more efficient in
reflecting their performance under different system conditions.
Table-1 shows the proposed test conditions used for testing
the PMUs using the test bed.
TABLE-1. PROPOSED PMU TESTS USING THE TEST BED
Main Sub-Category of PMU System Conditions
Category of Testing (Cases) for
PMU Sub-Category of PMU
Testing Testing Case-b: Unbalanced Conditions
Steady State Magnitude Change Balanced, Unbalanced, Figure. 2: %TVE (Y-Axis) v/s P.U. Voltage Magnitude (X-Axis)
Performance Measurement Tests Off-nominal Frequency,
Tests with Harmonics
Phase Angle Change Balanced, Unbalanced, B. Dynamic Test on 2 PMUs (Magnitude Step Change Test)
Measurement Tests Off-nominal Frequency,
with Harmonics
Frequency Change Balanced, Unbalanced,
Measurement Tests with Harmonics
Jeong Hun Kim received his B.S. degree in Electrical Engineering from
VI. ACKNOWLEDGMENT Pennsylvania State University in 2007. He received his M.S degree in
Electrical Engineering in 2010. Presently, he is a PhD student at Washington
The authors of this paper would like to thank SEL, GE, State University. His research interests include synchrophasor device testing
ALSTOM, ERLPhase, PONOVO and RTDS for their help in and substation automation technology for system level diagnostics and
prognostics of substation health monitoring.
building this lab. The authors would also like to extend their
thanks to PSERC for funding this project partially. Anurag K. Srivastava (S’00, SM’ 09) received his Ph.D. from Illinois
Institute of Technology (IIT), Chicago, in 2005. He joined Washington State
University as Assistant Professor in August 2010. He worked as an Assistant
VII. REFERENCES Research Professor at Mississippi State University from 2005-2010. His
research interests include power system model, simulation, operation, control,
[1] R. M. Reddy and Anurag K. Srivastava, “Real Time Test Bed security, and stability within smart grid and micro grid. Dr. Srivastava is
Development for Power System Operation, Control and Cybersecurity,” member of the IEEE, Power and Energy Society (PES), IET, Sigma Xi, and
in North American Power Symposium (NAPS), Sept 2010. Eta Kappa Nu. He is chair of the IEEE PES career promotion subcommittee
[2] L. Vanfretti, “SmarTS-LAB: a Smart Transmission Grids Laboratory at and vice-chair of the IEEE PES student activities subcommittee and is active
KTH,” White Paper, EPS Division, School of Electrical Engineering, in several other IEEE PES technical committees.
Royal Institute of Technology (KTH), Sweden. Nov, 2010 [Online].
Available:http://www.vanfretti.com/Dr._Luigi_Vanfrettis_Website/Publi
cations.html [May 2012].
[3] Karen Butler-Purry, G. R. Damle, N. D. R. Sarma, F. Uriarte and D.
Grant, “Test Bed for Studying Real-Time Simulation and Control for