Automatic Power Factor improvement using Microcontroller

Reetam Sen Biswas, 4th year, Dr. Satadal Mal, Professor and Head,
Electrical Enginering, Heritage Institute of Department of Electrical Engineering,
Technology, Kolkata. Heritage Institute of Technology, Kolkata.
Email id: reetsenbiswas@gmail.com Email id: satadal14@gmail.com

Abstract - The chief objective is to improve the power

quality by continuously monitoring the load power factor.
When the load power factor falls below a certain value it
results in the increase of line current, resulting in more
line loss and greater voltage drop. Thus, the aim is to inject
capacitances of required values when the power factor
falls below the specified level. Primarily, a signal of pulse
width proportional to the phase difference is generated.
From the ON time period of each pulse the power factor
can be determined. The exact value of the capacitance to
be injected is then found out using some mathematics.
Finally, the value of capacitance, so obtained, is to be
approximated with the standard values of capacitance.
Micro-controller will switch all the capacitors, which taken
together is very close to the exact value of the capacitance.
b) Poor voltage regulation
The large current at low lagging power factor causes
greater voltage drops at the alternators, transformers,
transmission lines and distributors. This results in
decreased voltage available at the supply end, thus
impairing the performance utilization of devices.
Reasons of low power factor
a) Most of the ac motors are of induction type which have
low lagging power factor.
b) Arc lamps, electric discharge lamps and industrial
heating furnaces operate at low power factors.
Major steps for the power factor correction

Keywords - power factor; capacitance; micro-controller. Low power factor is undesirable from economic point of
view. Pic-microcontroller chip has been used, here for the
Introduction implementation of the power factor correction. The task is
divided into the following steps:
The cosine of the angle between the voltage and
current in an ac circuit is known as power factor. It may also 1. Measurement of power factor
be defined as the ratio of KW and the KVA drawn by the 2. Evaluating the value of capacitance to be injected for the
electrical load where KW is the actual load power and KVA is improvement of power factor.
the apparent power. It is a measure of how effectively the 3. Approximating the capacitance, obtained from step 2,
current is being converted to useful work output and more with some standard capacitances.
particularly is a good indicator of the effect of the load current
on the efficiency of the supply system. 1. Measurement of power factor
Effects of low power factor : The circuit diagram for the detection of power factor is
shown in Fig 1.
a) Large copper losses:
The power factor plays an important role in ac
circuits since power consumed depends upon this
factor. P=√3VLILcosφ ( for 3 phase line)
=> IL=P/(√3VLcosφ)

It is clear from above that for fixed power and voltage, the
load current is inversely proportional to the power factor.
Lower the power factor, higher is the load current and vice-
versa. The large current at low power factor causes more I2R
loss, resulting in poor efficiency. Fig 1: Circuit diagram for detection of power factor

978-1-4799-6908-1/15/$31.00 ©2015 IEEE

 The line current and the line voltage are first stepped down 1.
using C.T and P.T. The objective is to produce a signal
having pulse width proportional to the phase difference 2.
between voltage and current. Thus, to realize this, the
stepped down voltage and the line current are applied to the 3.
zero-crossing detectors (ZCD1 and ZCD2 respectively). The
output voltage waveforms from ZCD1 and ZCD2 are shown 4.
in Fig 2. The outputs from ZCD1 and ZCD2 are fed to the 2 5.
input XOR gate. The XOR gate results high only when one
input is low and the other input is high. Hence, the output of 6.
the XOR gate is a series of pulses whose width is
proportional to the phase difference between the two signals.
This is shown in Fig 2. Algorithm for Delay subroutine
Pin 0 of port B is set as an input pin. Initially,
COUNT is initialized to 0.
The status of the pin is continuously examined by the
micro-controller.
If B0 pin is high, the COUNT is incremented and a
fixed time delay subroutine is called.
Again we go back to step 2.
Once the status of B5 pin is low the control comes
out of the loop.
The value stored in the COUNT is indicative of the
power factor.

Timer clock frequency is one-fourth of the crystal

frequency=5 MHz. One clock period is 1/5 µs =0.2 µs. Here, a
fixed time delay of 100 µs or 500 clock pulses is being
generated.

TIMER0 register is selected for the purpose. When the timer

reaches its maximum value of FFFF it rolls over to 0000 and
TMR0IF is set to 1.Thus, for a count of 500 clock pulses the
initial value of TIMER0 is set to FE0BH because FFFFH-
FE0BH=1F4H=500D .

1. The TOCON( control register) is first set with the

control word(which is 08H in this case).
2. TMR0H(the higher byte) is set to FEH.
3. TMROL(the lower byte) is set to 0BH.
4. Counting of TIMER0 is started by setting the
Fig 2: Waveforms at different points of the circuit diagram TMR0ON bit of the T0CON.
5. The status of TMR0IF is continuously checked.
It is clear that the ON time of the XOR gate is proportional to When it is set(1) control returns to the main
the phase difference between 0o and 360o. This means that program.
the ON time(T) is indicative of the power factor.

Fig 3: Variation of TON with Ф

‘TON’ is measured by using micro-controller. PIC 18F458 of

20 MHz crystal frequency is utilized for the proposed
scheme.

Algorithm for ‘TON’ measurement

The output of the XOR gate, z(t) is fed as input at Port B, pin
Fig 4: Flowchart for evaluating power factor
0. COUNT is a register which stores a value indicative of
power factor.
Relationship between COUNT and φ 33 1.03818 59.5135 0.507789 1.696534
34 1.06964 61.31694 0.48044 1.825468
Now, the number stored in COUNT has to be related 35 1.1011 63.12038 0.452616 1.970118
to the power factor. Time period of each clock pulse(T) is 0.2
36 1.13256 64.92382 0.424343 2.13389
µs. Total time for which pulse is high(Ttot) =COUNT×T×500.
37 1.16402 66.72726 0.395651 2.321242
Thus, Phase angle(φ in rads) corresponding to ON period of
38 1.19548 68.5307 0.366567 2.538123
the pulse =2πf× Ttot =2×3.14×50×COUNT×T×500
39 1.22694 70.33414 0.33712 2.792659
= 0.03146×COUNT.
40 1.2584 72.13758 0.30734 3.096246
Since we get φ, power factor can also be evaluated by cos 41 1.28986 73.94102 0.277255 3.465384
(φ). However, since it is difficult to do trigonometric operation 42 1.32132 75.74446 0.246897 3.92489
in micro-controller a look up table approach is used to relate 43 1.35278 77.5479 0.216293 4.513909
the power factor with COUNT. tan φ is also evaluated, as it
44 1.38424 79.35134 0.185476 5.297981
shall be required later on. The look up table is given in Table
45 1.4157 81.15478 0.154475 6.395824
1.
46 1.44716 82.95822 0.123322 8.046984
Table 1: Look up table 47 1.47862 84.76166 0.092046 10.81803
48 1.51008 86.5651 0.060679 16.44979
COUNT φ(in rad) φ(in deg) cos(φ) tan(φ) 49 1.54154 88.36854 0.029252 34.17089
1 0.03146 1.803439 0.999505 0.03147
2 0.06292 3.606879 0.998021 0.063003
3 0.09438 5.410318 0.99555 0.094661
2. Evaluating the value of capacitance to be
4 0.12584 7.213758 0.992093 0.126508 injected for the power factor correction
5 0.1573 9.017197 0.987654 0.15861
Let us consider the circuit below. The associated phasor
6 0.18876 10.82064 0.982238 0.191034 diagram is also being shown.
7 0.22022 12.62408 0.975849 0.22385
8 0.25168 14.42752 0.968495 0.257132
9 0.28314 16.23096 0.960183 0.290957
10 0.3146 18.03439 0.95092 0.325407
11 0.34606 19.83783 0.940716 0.36057
12 0.37752 21.64127 0.929582 0.39654
13 0.40898 23.44471 0.917527 0.433419
14 0.44044 25.24815 0.904564 0.471318
15 0.4719 27.05159 0.890706 0.510358
Fig 5(a)Circuit diagram for power factor improvement
16 0.50336 28.85503 0.875967 0.550673
(b)Corresponding Phasor diagram
17 0.53482 30.65847 0.86036 0.59241
18 0.56628 32.46191 0.843903 0.635733 V= The load voltage
19 0.59774 34.26535 0.82661 0.680824 I = The line current
20 0.6292 36.06879 0.808499 0.72789 IC= The current flowing through the capacitor
21 0.66066 37.87223 0.789587 0.777163 IL=The current drawn by the load
22 0.69212 39.67567 0.769895 0.828906 φL=The load angle before connecting capacitance
23 0.72358 41.47911 0.74944 0.883422 φ= Load angle after connecting capacitance
24 0.75504 43.28255 0.728244 0.941055
Power consumed by load (P1) before correction =V× IL×cosφL
25 0.7865 45.08599 0.706327 1.002206 Power consumed by load (P2) after correction = V×I×cosφ
26 0.81796 46.88943 0.683711 1.06734 P1 should be equal to P2.
27 0.84942 48.69287 0.660419 1.137002
28 0.88088 50.49631 0.636473 1.211834 => P1 = P2 => V× IL×cosφL = V×I×cosφ
29 0.91234 52.29975 0.611897 1.2926 ILCOS<pL
=> I = ……..(i)
COSq;
30 0.9438 54.10318 0.586715 1.380216
31 0.97526 55.90662 0.560953 1.475789
32 1.00672 57.71006 0.534635 1.580671
 From the phasor, it is evident that AB = OA – OB.
But, AB = |IC|
=> |IC| = ILsin φL – I sinφ……….(ii)

Substituting I from eq. (i) into eq.(ii) we get:

|IC|= ILsin φL - ILcos φLtanφ……….(iii)
Since, tanφ is already known from the look up table,
it may be treated as a constant.
Let tanφ=k, => |IC|= ILsin φL - kILcos φL

P
Again, IL= …………......(iv)
VCOSq;L
Substituting IL from eq. (iv) to eq. (iii) we get –

P KP
IC = tanφL- V
V

V V
XC= => XC= P KP
IC V
tan q;L - V Fig 6: Graph of capacitance versus φ L

1 1 P KP
=> C = = ( tanφL - V ) 3. Approximating the actual capacitances with
2rrfXC 2rrfV V
P KP standard capacitances
=> C=2rrfV 2tanφL – 2rrfV 2…………(v)
Interfacing of static capacitors with the micro-controller-
Now, V is the load end voltage kept at a fixed value and P is Fig 7 shows the connection of capacitors to the different port
the active power consumed by load. If load varies with time, pins of the micro-controller with the help of npn transistor and
P also changes with time. However, as because the power relay. When the micro-controller output signal is high, the
factor is to be improved at any particular point of time, we transistor is switched on, establishing sufficient current
can consider P to be fixed for that time. through the coil of the electromagnet to close the relay and the
P capacitor will be connected in parallel to the load. But,
Thus, C = a tanφL-b…………………………(vi) where, a= 2rrf V 2
KP
problem can arise when the microcontroller signal is removed
b=2rrfV 2 from the base to turn off the transistor and de-energize the
relay. Trying to change the current through an inductive
Table 2: Variation of C versus φL element too quickly may result in an inductive kick that could
damage surrounding elements or the system itself. This
destructive action can be subdued by placing a diode across
the coils shown in Fig.7.During the on state of transistor, the
diode is reverse-biased; it sits like an open circuit and doesn’t
affect any thing. However, when the transistor turns off, the
voltage across the coil will reverse and will forward-bias the
diode, placing the diode in it’s on state. In such a situation the
relay is de-energized and the capacitor is removed from the
load circuit.

0
The value of C obtained, when φL is 90 is
abnormal. But, it implies that the active power delivered is
zero. However, such a case shall never arise in reality. Thus,
we may ignore the last case. The graph of C versus φL is
shown in Fig 6.

Fig 7: Circuit diagram to switch the capacitors using micro-controller

 Table 3: Capacitors connected to different pins ofthe
microcontroller

PORT C PORT C
PA0 10 µf PC0 700 µF
PA1 20 µF PC1 800 µF
PA2 30 µf PC2 900 µF
PA3 40 µf PC3 1 mF
PA4 50 µf PC4 2 mF
PA5 60 µf PC5 3 mF
PA6 70 µf PC6 4 mF
PA7 80 µf PC7 5 mF
PB0 **** PD0 6 mF
PB1 90 µF PD1 7 mF
PB2 100 µF PD2 8 mF Fig 8: Flowchart for approximating CL

PB3 200 µF PD3 9 mF

Algorithm for approximating CH
PB4 300 µF PD4 10 mF
PB5 400 µF PD5 11 mF In this case CH is unpacked and the ten’s digit is stored in H
PB6 500 µF PD6 12 mF
and the unit’s digit is stored in L. The value of H and L are
PB7 600 µF PD7 13 mF then used to switch on the appropriate capacitors. The
flowchart given in Fig 8 explains the algorithm.

Table 3 shows which capacitances are interfaced to the

different pins of the micro-controller. The exact value of the
capacitance(C) was calculated by the formula C=atanφL-b.
Now, the exact capacitance C needs to be approximated with
the standard capacitance values, which are connected to the
micro-controller as shown in the table above. For example,
let us assume the C=1256 µF. The higher byte and the lower
byte of C are separated and stored in separate registers say,
CH and CL respectively. Thus, in this case CH=12 and CL=56.
To approximate CL=56, PA5 pin of the micro-controller should
be switched on;- i.e 56 µF is to be approximated by 60 µF.
Then, to approximate CH=12, PC3 and PB3 needs to be
switched on as 1mF and 200 µF are connected in those pins
respectively.

Algorithm for approximating CL

All the ports A,B,C and D are set as output ports. C1 is a

counter, which finds out the exact pin of port A which should
be set high for some value of CL. This is achieved by
calculating the number of times 10 may be subtracted from
CL. However, there can arise two special cases:
1. If CL=00, C1 remains 0 and thus the algorithm is stopped
immediately.
2. Again if C1 becomes greater than 8, PB1 needs to be
switched on as 90 µF is not interfaced to port A.
The flowchart in Fig 8 explains the algorithm clearly.

Fig 9: Flowchart for approximating CH

Approximation of L involves 3 steps :- References
1. If L=0 , no capacitance value should be injected. 1.
2. If L<7, the corresponding pin of port B, should set
high.
3. If L>7, the corresponding pin of port C should be set
2.
high, since capacitors from 700 µF onwards are
interfaced to port C pins.
Similarly, approximation of H involves 3 steps again :-
3.
1. If H=0, no capacitance is injected.
2. If H<6, the corresponding capacitance of port C
should be injected.
3. And if H>6, the respective capacitance of port D,
shall be injected, as from 6 mF onwards capacitors
are connected to port D pins. 4.
This is absolutely clear from the flowchart in Fig 9.
Conclusion
There is some significant difference between this work and
earlier research on automatic power factor improvement that 5.
I have referred. In the papers [1], [2], [3] and [4] a trial and
error approach was adopted. After detecting poor power 6.
factor, their controller is so designed that the system
7.
switches one capacitor at a time out of a group of many
capacitors. If goal to achieve the specified power factor is
met, the control comes out of the loop, else switching of
capacitor continues till compensation is under control.
Nagaranjan M, Kandasamy K.V(2012) “Automatic
power factor correction for inductive load using
PIC.”International Conference on Modeling,
Optimization and Computing.(ICMOC-2012).
Anant Kumar Tiwari, Durga Sharma, Vijay Kumar
Sharma (2014) “ Automatic power factor correction
using capacitive bank.”Int Journal of Engineering
Research and Applications, Volume-4, Issue-2,Feb-
2014,pp.393-395.
Prasad Phad(2014) “Minimizing the penalty in
industrial sector by engaging automatic power factor
correction panel using micro-
controller.”Multidisciplinary Journal of Engineering
and Technology, volume -1,Issue-1, (April-2014),pg-
73-79.
Abhinav Sharma, Vishal Nayar, S. Chatterjee, Ritula
Thakur, P.K Lehana (2013)“PIC micro-controller
based SVC for reactive power compensation and
power factor correction.”International Journal of
advanced research in computer science and
software engineering, Volume-3, Issue-9,
September-2013.
Principles of Power System by V.K Mehta and Rohit
Mehta.
Power System Engineering by D.P Kothari and I.J
Nagrath.
PIC Microcontroller and Embedded Systems by
Muhammad ali Mazidi, Rolind D. Mckinley, Danney
Causey.

On the other hand in this work, the exact value of

capacitance to be injected is calculated mathematically and
not by injecting one capacitance at a time and checking the
new power factor. In earlier methods more number of
switching had to be done, resulting in greater switching loss.
Such a disadvantage is overcome in this technique.

In this work, observing Table 3 we can say that the

resolution of this correction technique is 10 µF (as the
smallest increment that can be taken by the capacitance bank
is 10 µF). Now, if the earlier works want to maintain this same
resolution, their maximum range of operation is only 320
µF(as micro-controller has 32 pins and 10 µF is connected to
each pin), where as this technique permits a far greater range
of 10-12 mFs. Thus for dynamic load on a power system,
which varies through great limits, this work will be more
efficient.

In the reverse way it may be said that if the earlier

works are to maintain the same range of operation, their
resolution will become poor and thus accuracy will fall.