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CAD for IC design

VLSI Design Problem:

Optimization of design in several aspects
Area Minimization*
Power dissipation*
Design time*

Design Methodologies
Approach followed to solve the VLSI design problem
To consider all parameters in one go during VLSI design process we use:

Cost function: measure of VLSI design cost in terms of different parameters

To design a VLSI circuit at one go while at the same time optimizing the cost functions
complexity is simply too high

To understand complexity
Two main concepts are helpful to deal with this complexity
1. Hierarchy and
2. Abstraction

Hierarchy: shows the structure of a design at different levels

Abstraction: hides the lower level details
Abstraction ex:

A - Level 1
B C D - Level 2
J - Level 3
( D JK ) J E F G H l /\ M N O
- Level 4
© K L
decomposition tree

(a) (b)

©© © ©© ®®
v© ® ® © @ .

without a hierarchical organization

(c) (d) (e)
The Design Domains

The behavioral domain.: Part of the design (or the whole) is seen as set of black
Black box: relations between outputs and inputs are given without a reference to the
implementation of these relations.

The structural domain:

• Circuit is seen as the composition of subcircuits.
• Each of the subcircuits has a description in the behavioral domain or a
description in the structural domain itself

The physical (or layout ) domain

The physical domain gives information on how the subparts that can be
seen in the structural domain, are located on the two-dimensional plane.
Design Methods and Technologies

full-custom design:
maximal freedom
ability to determine the shape of every mask layer for the production of die
• smaller search space
• limiting the freedom of the designer
• shorter design time
• semicustom design implies the use of gate arrays, standard cells,
parameterizable modules

designing an integrated circuit is

a sequence of many actions most of which can be done by computer tools
Gated arrays
• chips that have all their transistors preplaced in regular patterns.
• designer specify the wiring patterns
• gate arrays as described above are mask programmable
• There also exist so-called field-programmable gate arrays (FPGAs)
• Interconnections can be configured by applying electrical signals on some

Standard Cells
• simple logic gates, flip-flops, etc.
• Predesigned and have been made available to the designer in a library
• characterization of the cells: determination of their timing behavior is done once by
the library developer

Module Generators
• generators exist for those designs that have a regular structure such as adders,
multipliers, and memories.
• Due to the regularity of the structure, the module can be described by one or two
VLSI design automation tools:
Can be categorized in:

1. Algorithmic and system design

2. Structural and logic design
3. Transistor-level design
4. Layout design
6. Design management
Algorithmic and system design

Structural and
logic design %

Transistor level design

Layout design

Algorithmic and System Design:
• formal description mainly concerned with the initial algorithm to be implemented in
hardware and works with a purely behavioral description.
• Hardware description languages (HDLs) are used for the purpose.
• A second application of formal description is the possibility of automatic synthesis
• synthesizer reads the description and generates an equivalent description of the
design at a much lower level.

• High-level synthesis: The synthesis from the algorithmic behavioral level to structural
descriptions is called high-level synthesis.

• Silicon Compiler : A silicon compiler is a software system that takes a user's

specifications and automatically generates an integrated circuit (IC). (initial

• formal specification does not always need to be in a textual

• Tools available having capability to convert the graphical information into a textual
equivalent (expressed in a language like VHDL) that can be accepted as input by a
synthesis tool.
Hardware-software co-design
• Design for a complex system will consist of several chips, some of which are
• Part of the specification is realized in hardware and some of which in software.
(hardware-software co-design)
• partitioning of the initial specification required (difficult to automate)
• tools exist that support the designer
• by providing information on the frequency at which each part of the
specification is executed.
• the parts with the highest frequencies are the most likely to be realized in

• The result of co-design:

• is a pair of descriptions:
• one of the hardware (e.g. in VHDL) that will contain programmable parts, and
• the other of the software (e.g. in C).
Code generation :
Mapping the high-level descriptions of the software to the low-level instructions of the
programmable hardware : CAD problem.

Hardware-software co-simulation:
Verification of the correctness of the result of co-design using simulation.
• Structural and Logic Design
• Sometimes the tools might not be able to cope with the desired behaviour: inefficient
• Designer provides lower level description :Structural and Logic Design
• designer can use a schematic editor program: CAD tool
• It allows the interactive specification of the blocks composing a circuit and their
interconnections by means of a graphical interface.
• schematics constructed in this way are hierarchical

• Role of simulation: Once the circuit schematics have been captured by an editor, it is
a common practice to verify the circuit by means of simulation

• fault simulation: checks whether a set of test vectors or test patterns (input signals
used for testing) will be able to detect faults caused by imperfections of the
fabrication process

• automatic test-pattern generation:

• the computer search for the best set of test vectors by using a tool : ATPG.
Logic synthesis:
Generation and optimization of a circuit at the level of logic gates.
three different types of problems:

1. Synthesis of two-level combinational logic:

• Boolean function can be written as sum of products or a product of sums, can
be directly be implemented as programmable logic arrays (PLAs)
• It is, therefore, important to minimize two-level expressions.

2. Synthesis of multilevel combinational logic:

• Some parts of integrated circuits consist of so-called random logic (circuitry that
does not have the regular structure )
• Random logic is often built of standard cells, which means that the implementation
does not restrict the depth of the logic.

3. Synthesis of sequential logic :

• sequential logic has a state which is normally stored in memory elements
• problem here is to find logic necessary to minimize the state transitions.
Timing constraints:
• designer should be informed about the maximum delay paths
• shorter these delays, the faster the operation of the circuit
• One possibility of finding out about these delays is by means of simulation
• Or by timing analysis tool: compute delays through the circuit without performing
any simulation
Transistor-level Design

Logic gates are composed of transistors

Depending on the accuracy required, transistors can be simulated at different levels

At the switch level , transistors are modeled as ideal bidirectional switches and
the signals are essentially digital

At the timing level , analog signals are considered, but the transistors have simple
models (e.g. piecewise linear functions)

At the circuit level , more accurate models of the transistors are used which often
involve nonlinear differential equations for the currents and voltages

more accurate the model, the more computer time is necessary for simulation
Process (full-custom Transistor-level design):

1. it is the custom to extract the circuit from the layout data of transistor.
2. Construct the network of transistors, resistors and capacitances.
3. The extracted circuit can then be simulated at the circuit or switch level.
Layout Design
Design actions related to layout are very diverse therefore, many different layout

If one has the layout of the subblocks of a design available, together with the list of
interconnections then
1. First, a position in the plane is assigned to each subblock, trying to minimize
the area to be occupied by interconnections (placement problem).
2. The next step is to generate the wiring patterns that realize the correct
interconnections (routing problem).

goal of placement and routing is to generate the minimal chip area(1).

Timing constraint (2): As the length of a wire affects the propagation time of a signal
along the wire, it is important to keep specific wires short in order to guarantee an
overall execution speed of the circuit. (timing-driven layout)
Partitioning problem: grouping of the sub-blocks

• Subblocks that are tightly connected are put in the same group while the number
of connections from one group to the other is kept low
• Partitioning helps to solve the placement problem


• The simultaneous development of structure and layout is called floorplanning.

• when making a transition of a behavioral description to a structure, one can also
fixes the relative positions of the subblocks
• It gives early feedback on e.g. long wires in the layout

• Detailed layout information is available in placement whereas floorplanning has

mainly to deal with estimations. (difference)
• microcells.: complexity of around 10 transistors
• A cell compiler generates the layout for a network of transistors.

• Module: A block, layout of which can be composed by an arrangement of cells.

• Module generation: Given some parameters (e.g. the number of bits for an adder or
the word length and number of words in a memory),
• the module generator puts the right cells at the right place and composes a
module in this way.

• Layout editor (In full-custom design): provides the possibility to modify the layout at
the level of mask patterns.
• In a correct design, the mask patterns should obey some rules called design rules.
• Tools that analyze a layout to detect violations of these rules are called design-rule
Circuit extractor: takes the mask patterns as its input and constructs a circuit of
transistors, resistors and capacitances that can be simulated

disadvantage of full-custom design is that the layout has to be redesigned when the
technology changes. symbolic layout has been proposed as a solution.

Symbolic representation represents positions of the patterns relative to each other.

Compactor: takes the symbolic description, assigns widths to all patterns and spaces
the patterns such that all design rules are satisfied.
Verification Methods: There are three ways of checking the correctness of an
integrated circuit without actually fabricating it

1. Prototyping
2. Simulation
3. Formal verification

1. Prototyping: building the system to be designed from discrete components

rather than one or a few integrated circuits ex. Breadboarding, prototyping using
programmable devices such as FPGA (rapid system prototyping).
• A prerequisite for rapid system prototyping is the availability of a compiler
that can "rapidly" map some algorithm on the programmable prototype.
2. Simulation: modelling a computer model of all relevant aspects of the circuit,
executing the model for a set of input signals, and observing the output signals.

it is impossible to have an exhaustive test of a circuit of reasonable size, as the set of all
possible input signals and internal states grows too large.

3. Formal verification: use of mathematical methods to prove that a circuit is correct.

Design Management Tools:
• CAD tools consume and produce design data
• quantity of data for a VLSI chip can be enormous and
• appropriate data management techniques have to be used to store and retrieve them

• another aspect of design management is to maintain a consistent description of the

design while multiple designers work on different parts of the design.
• famous standard format for storing data is EDIF (Electronic Design Interchange Format)
• Framework is an universal interface used by tools to extract EDIF data from database.
3. Algorithmic Graph Theory and Computational Complexity:

Algorithmic graph theory: design of algorithms that operate on graphs

Graph: A graph is a mathematical structure that describes a set of objects and the
connections between them.

Graphs are used in the field of design automation for integrated circuits
1. when dealing with entities that naturally look like a network (e.g. a circuit of
2. in more abstract cases (e.g. precedence relations in the computations of some

Computational complexity: time and memory required by a certain algorithm as

function of the ‘size of the algorithm's input’.
A graph G ( V, E ) is characterized by two sets:
1. a vertex set V ( node ) and
2. an edge set E ( branch )

The two vertices that are joined by an edge are called the edge ' s endpoints, notation
( u, v ) is used.
The vertices u and v such that ( u, v) G E, are called adjacent vertices.

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Subgraph: When one removes vertices and edges from a given graph G, one gets a
subgraph of G.
Rule: removing a vertex implies the removal of all edges connected to it.

Complete graph : a complete graph is a simple undirected graph in which every pair
of distinct vertices is connected by a unique edge.

Digraph: a directed graph (or digraph) is a graph, or set of nodes connected by

edges, where the edges have a direction associated with them.

Complete digraph: A complete digraph is a directed graph in which every pair of

distinct vertices is connected by a pair of unique edges (one in each direction).

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Clique: a clique in an undirected graph is a subset of its vertices such that every two
vertices in the subset are connected by an edge.
A subgraph that is complete

three cliques identified by the vertex sets {V1 , V2, V3}, {V3, V4} and {V5, V6}



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Maximal clique: A maximal clique is a clique that cannot be extended by including one
more adjacent vertex,
it is not a subset of a larger clique.
A maximum clique (i.e., clique of largest size in a given graph) is therefore always maximal

degree of a vertex: The degree of a vertex is equal to the number of edges incident with it

Selfloop: An edge (u, u), i.e. one starting and finishing at the same vertex, is called a
selfloop. A B

Parallel edges: Two edges of the form e1= (v1 , v2) and e2 = (v1 , v2), i.e. having the
same endpoints, are called parallel edges.

Simple graph: A graph without selfloops or parallel edges is called a simple graph

Graphs with degree r 2

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Graphs with degrees r = 3
A graph without selfloops but with parallel edges is called a multigraph.


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bigraph : a bipartite graph (or bigraph) is a graph whose vertices can be divided into two
disjoint sets U and V (that is, U and V are each independent sets) such that every edge
connects a vertex in U to one in V. V
Planar-graph: A graph that can be drawn on a two-dimensional plane without any of
its edges intersecting is called planar.

Path: A sequence of alternating vertices and edges, starting and finishing with a
vertex, such that an edge e = (u, v) is preceded by u and followed by v in the
sequence (or vice versa), is called a path. Ex Ub e\ V2 , ei , V3

The length of a path equals the number of edges it contains

A path, of which the first and last vertices are the same and the length is larger than
zero, is called a cycle (sometimes also: loop or circuit).

A path or a cycle not containing two or more occurrences of the same vertex is a
simple path or cycle.

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Connected graph: If all pairs of vertices in a graph are connected, the graph is called a
connected graph

Connected component: a connected component is a subgraph induced by a maximal

subset of the vertex set, such that all pairs in the set are connected

In-degree: The in-degree of a vertex is equal to the number of edges incident to it

out-degree: out-degree of an edge is equal to the number of edges incident from it.

strongly connected vertices: Two vertices u and v in a directed graph are called strongly
connected if there is both a directed path from u to v and a directed path from u to u.

strongly connected components: The property of being 'strongly connected' partitions

the directed graph into strongly connected components.

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A weighted graph is a graph in which each branch is given a numerical weight.
a special type of labeled graph in which the labels are numbers (which are
usually taken to be positive).

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To implement graph algorithms suitable data structures are required
Different algorithms require different data-structures.

adjacency matrix: If the graph G(V, E) has n vertices, an nxn matrix A is used.






The adjacency matrices of undirected graphs are symmetric.

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Finding all vertices connected to a given vertex requires inspection of a complete row
and a complete column of the matrix (not very efficient)

adjacency list representation: It consists of an array that has as many elements as

the number of vertices in the graph.
• Array element identified by an index i corresponds with the vertex u.
• Each array element points to a linked list that contains the indices of all vertices to
which the vertex corresponding to the element is connected.

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struct vertex { 1
int vertex.index ;
struct edge *outgoingjedges; 1 3
> ;
struct edge { 4
int edgeJndcx ; 3
struct vertex * frumf * to;
struct edge *ncxt; 5

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The complexity/ behaviour of an algorithm is characterized by mathematical functions of
the algorithm's "input size“.
The input size or problem size of an algorithm is related to the number of symbols
necessary to describe the input.

Ex: a sorting algorithm has to sort a list of n words, each consisting of at most 10 letters
input size =10n
using the ASCII code that uses 8 bits for each letter
input size =80n

Two types of computational complexity are distinguished:

1. time complexity, which is a measure for the time necessary to accomplish a
2. space complexity which is a measure for the amount of memory required for a
Space complexity is given less importance than time complexity
Order of a function: Big O notation characterizes functions according to their growth
• growth rate of a function is also referred to as order of the function.
• A description of a function in terms of big O notation usually only provides an
upper bound on the growth rate of the function.

2 0{ n2 )
jfl =
0.02n 2 + 127« + 1923 = 0(n 2 )
3n \ogn + n = O (nlogn )

Worst-case time complexity:

• The duration of a computation is expressed in elementary computational steps

• It is not only the size of the input that determines the number of computational
• conditional constructs in the algorithm are the reason that the time required by
the algorithm is different for different inputs of the same size.
• one works with the worst-case time complexity, assuming that the condition that
requires the largest number of computational steps will be true for an input of a
given size.
algorithm's time complexities:

0( 1) constant

0 (log log fj. ) double logarithmic

0 (log «) logarithmic f \ = 0 ( g\ ) and /2 = 0( g2 )
0(logcn ) . Ol polylogarithmic
0( 7ic ) , 0 < c. < 1 fractional power /1 x /2 = G( gi X £2).
0( n ) linear
/1 + /2 - C?(£ i + £2)
0 { n log * n ) n log-star n

linearithmic. loglinear. or
0( 7? log n. ) = O( logn !) quasilinear

0 ( n2 ) quadratic

0( 7/) . C > 1 polynomial or algebraic

L„[a , c], 0 < cv < 1 = L-notation or sub-

0 ) , Ol exponential

0( nl ) factorial

0( 71 * 7l!) n * n factorial
struct vertex {
Examples of Graph Algorithms:
Depth-first Search: ini mark;
• To traverse the graph 1;
• to visit all vertices only once
• A new member ‘mark’ in the vertex structure dfs(struct vertex u )
• initialized with the value 1 and given the value 0 (
when the vertex is visited. u .mark 0;
process y ;
for each ( v , u ) e E [
process ( a , u ) ;
if ( u mark)
dfs( w );

main ()
for each v eV
- )V;
t .mark «
for each v
if { v .mark )
dfs( v );

ez 3

( a) (b)

dfs(vi )
- e\ = ( « i
* . i ) dfs(u2)
*3 = ( 2 , V4 ) dfs(l>4 )
- .
64 - ( v4 V3) dfs(V3>
-* C5 = (V2 * V5 ) dfs( vs )
-+ «2 = ( V| , U3)
each vertex is visited exactly once, all edges are also visited exactly once.
Assuming that the generic vertex and edge actions have a constant time complexity, this
leads to a time complexity of 0 ( n + |E|) where n = |V|.

depth-first search could be used to find all vertices connected to a specific vertex u
Breadth-first Search:
• directed graphs represented by an adjacency list
• The central element is the FIFO queue.
• the call shift_in (q, o) adds an object o to the queue q, that shif t_out ( q ) removes
the oldest object from the queue q.
• adding and removing objects from a FIFO queue can be done in constant time.
tf ( w mark) {

struct vertex { u . mark « 0;

SHIFTJSL( Q > « );
int mark ; i
I; i
} while ( 0
bfs(struct vertex u ) ) * 0)
struct fifo * Q\ mainO
struct vertex u , w\ I
0; for each v s V
v .mark « 1;
shift _
shift ( £ , V )\
do { w out( 0); for each v V
process UJ ; if ( u .mark ) (
for each ( u; * u ) E ( u .mark 0;
process ( w , « )"; bfs(v );
Q u; edges processed
<{Vwi ) V vi * 1 = (v j , V2 ) 2 t = ( vi , i>3 )
2, 3 > V2 *3 ( V2 , V4 ) , $ - ( v 2 * v5 )
( u3 , V4 l Uj ) V3
( V4 , V5 ) V4 e4 = ( v4 , V 3 ) Status of queue
( «5 ) V5 -


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depth-first search could be used to find all vertices connected to a specific vertex u

vertices are visited in the order of their shortest path from vs

The shortest-path problem becomes more complex, if the length of the path between
two vertices is not simply the number of edges in the path. (weighted graphs)
struct vertex {
• Dijkstra's Shortest-path
Algorithm int distance;
• a weighted directed graph G(V,
E) is given dijkstra(set of struct vertex V , struct vertex vs , struct vertex v{
• edge weights w(e), w(e) > 0 (
• Visited vertices of the set V are set of struct vertex T ;
transferred one by one to a set struct vertex u , u ;
T V V \M ;
• Ordering of vertices is done
using vertex attribute ‘distance’. .distance « 0;
• the distance attribute of a for each u V
vertex v is equal to the edge if ( (uj , u) E )
weight w((vs, v)) u .distance 4- w ( ( vs > u ) )
else u.distance 4 +00;
while ( Uf g 7){
Vt such that Vu e V : u .distance < v .distance ;
r ru {H ];
V «- V \ {|4 ; >
for each u such that ( u, v ) E and v V"
If ( v ,distance > v)) + u .distance)

v.distance -
u> ((wf v ) ) f u .distance;

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Z {fra ‘la} 9 9 Z OG
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vt = V3 is reached after 5 iterations
continuing for one iteration more computes the lengths of the shortest paths for all
vertices in the graph
Time complexity of while loop = O(n) time, where n = |V|
overall time complexity = O(n^2)
as all edges are visited exactly once, viz. after the vertex from which they are incident
is added to set T. This gives a contribution of 0(E) to the overall time complexity.
worst-case time complexity = O(n^2+|E|)
Prim's Algorithm for Minimum Spanning Trees
In the mathematical field of graph theory, a spanning tree T of an undirected graph G is a
subgraph that includes all of the vertices of G that is a tree.

One gets a spanning tree by removing edges from E until all cycles in the graph have
disappeared while all vertices remain connected.
a graph has several spanning trees, all of which have the same number of edges (number
of vertices minus one)
In the case of edge-weighted undirected graphs, spanning tree is to be found with the
least total edge weight, also called the tree length.(minimum spanning tree problem)
starts with an arbitrary vertex which is considered the initial tree
struct vertex {

int distance;
struct edge * via.edge; .distance <
else hoo ;
); while ( V 0) {
struct edge { u« - e V , such that Vv V : u.distance < u.distance" ;
tv W U ( «};
); V V \ { u );
F *- F U { M . via edge};
prim(set of struct vertex V ) For each v such that (w , ) e £"
( »
if ( u.distance :> tu ( (u , t> ) t
set of struct edge F;
set of struct vertex W ;
i .distance *- UJ{(II , v));
i/ , via edge « ( u , v )\

struct vertex u ; J
u < any vertex from V ;
V + V \ { u );
W <- [*};
for each v V v5
if ((« , t>) E ) (
- »
v.distance « u> ((w , V ;
u .viajedge « ( w , v) ;
V4 V4
( a) (b)

v 5
v i/ 4 2 2 V5 2 V5

V4 V4
( a) < b>

, .distance, Ui .via edge, fori =

i> .

iteration u 1 2 3 4 5
0 V\ 2, ( v i , V2 ) 4 ( l> t , l>3 )
T 3*( VUU4) + OO ,?
1 V2 1 , ( u2 , V l ) 2 ( V2, U4 )
t 5 (V2 vs )
t t

2 V3 l , ( U3 , U4 ) 2,(V3 , V S )
3 V4 .
2 ( V3. U5 )
4 vs
Tractable Intractable problems:

A problem that can be solved in polynomial time is called tractable.

A problem that can not be solved in polynomial time is, called intractable.
Combinatorial Optimization Problems
Problem : problem refers to a general class, e.g. the "shortest-path problem“
Instance: The term instance refers to a specific case of a problem, e.g. "the shortest-
path problem between vertex vs and vertex vt.

Instances of optimization problems can be characterized by a finite set of variables.

If the variables range over real numbers, the problem is called a continuous
optimization problem.
If the variables are discrete, i.e. they only can assume a finite number of distinct values,
the problem is called a combinatorial optimization problem.

An example of a simple combinatorial optimization problem is the satisfiability

Ul + X 2 + X 3 -f JC4) -
( X 2 + *5 ) (]t3 f *4 + *5).
problem: to assign Boolean values to the variables in such a way that the whole
expression becomes true.
Xi can only assume two values, making the problem a combinatorial optimization
Another example:
Dijkstra's algorithm:
with given source and target vertices vt vs, defines an instance of the problem

One could associate Boolean variables bi, bi = 1means that the edge is "selected"
and bi = 0 means that it is not.

solving the shortest-path problem for this graph can be seen as assigning Boolean
values to the variables bi: making the problem combinatorial.

a combinatorial optimization problem is defined as the set of all the instances of the
each instance I being defined as a pair (F, c).
F is called the set of feasible solutions (or the search space),
c is a function assigning a cost to each element of F.
Solving a particular instance of a problem consists of finding a feasible solution
f with minimal cost
• The traveling salesman problem (TSP):

• Given a list of cities and the distances between each pair of cities, what is the shortest
possible route that visits each city exactly once and returns to the origin city?
• TSP can be modelled as an undirected weighted graph, such that cities are the graph's
• paths are the graph's edges, and a path's distance is the edge's length.
• It is a minimization problem starting and finishing at a specified vertex after having
visited each other vertex exactly once.
• Often, the model is a complete graph
any permutation of the cities defines a feasible solution and the cost of the feasible
solution is the length of the cycle represented by the solution

CI c2 c3 C] C2 C3 c\ c2 ci

'SsrtJ CTS

; 51 X< C
* *
i i i i i i 1 1 1 1 i i i i i i i i
(a ) (b) (c)

nonoptimal solution optimal solution

cities c1, c2, . .. C9
If the coordinates of a city ci are given by (xi , yi), the distance between two cities
ci and cj is simply given by y/(jc, - X j )1 + (?, - y j )2 .
Decision Problems (part of optimization problem):
the optimization version of the shortest-path problem in graphs requires that the edges
forming the shortest path are identified, whereas

the evaluation version merely asks for the length of the shortest path.
decision problems:
decision version : These are problems that only have two possible answers: "yes" or

If optimization version can be solved in polynomial time, then the decision version can
also be solved in polynomial time.

In other words: if there is an algorithm that is able to decide in polynomial time whether
there is a solution with cost less than or equal to k, it is not always obvious how to get
the solution itself in polynomial time.

Therefore, the computational complexity of the decision version of a problem gives a

lower bound for the computational complexity of the optimization version.

The time complexity of the evaluation version of a combinatorial optimization problem is

located in between the time complexities of the decision and optimization versions.
The decision version of a combinatorial problem n can be defined as the set Dn of its
instances ( F, c, k ).

Note that each instance is now characterized by an extra parameter k; k is the

parameter in the question " Is there a solution with cost less than or equal to k ? '.

An interesting subset of instances is formed by those instances for which the answer to
the question is "yes".

This set is called Yn (Kn £>n)-

task associated with a decision problem is solution checking.

It is the problem of verifying whether c ( f ) < k.
Complexity Classes:
it is useful to group problems with the same degree in one complexity class.

The class of decision problems for which an algorithm is known that operates in polynomial
time is called P (which is an abbreviation of "polynomial").

Deterministic and nondeterministic computer.

For a common (deterministic) computer it always is clear how a computation continues at a

certain point in the computation. This is also reflected in the programming languages used
for them.

A nondeterministic computer allows for the specification of multiple computations at a

certain point in a program: the computer will make a nondeterministic choices on, which of
them to be performed.
This is not just a random choice, but a choice that will lead to the desired answer.

The machine splits itself into as many copies as there are choices, evaluates all choices in
parallel, and then merges back to one machine.
Complexity class NP: The complexity class NP (an abbreviation of "nondeterministic
polynomial") consists of those problems that can be solved in polynomial time on a
nondeterministic computer.

Any decision problem for which solution checking can be done in polynomial time is in NP.

class P is a subset of the class NP

Halting problem (undecidable class): problem is to find an algorithm that accepts a

computer program as its input and has to decide whether or not this program will stop
after a finite computation time.
NP-completeness :
all decision problems contain in it are polynomially reducible to each other.
An instance of any NP-complete problem can be expressed as an instance of any other
NP-complete problem using transformations that have a polynomial time complexity.

HAMILTONIANCYCLE problem: whether a given undirected graph G(V,E) contains a so-
called Hamiltonian cycle, i.e. a simple cycle that goes through all vertices of V.
TRAVELING SALESMAN, the decision version of TSP amounts to answering the question of
whether there is a tour (simple cycle) through all vertices, the length of which is less than
or equal to k.
instance transforma ¬ instance
/ , tion /

algorithm algorithm
for for n2
polynomial ? polynomial ?

Yes/Nol /E <
«* / J) e YUi Yes/No
Nondeterministic computer: Turing machine (mathematical model)

a computer with a sequentially accessible memory (a "tape") and a very simple instruction

The set only includes instructions for writing a symbol (from a finite set) to the memory
location pointed at by the memory pointer and move the pointer one position up or down.

A finite number of "internal states" should also be provided for a specific Turing machine.

A "program" then consists of a set of conditional statements that map a combination of a

symbol at the current memory location and an internal state to a new symbol to be written,
a new internal state and a pointer movement.

The input to the algorithm to be executed on a Turing machine is the initial state of the

The machine stops when it enters one of the special internal states labeled by "yes" and
"no" (corresponding to the answers to a decision problem).
General-purpose Methods for Combinatorial Optimization:

algorithm designer has three possibilities when confronted with an intractable problem.
1. try to solve the problem exactly if the problem size is sufficiently small using an
algorithm that has an exponential (or even a higher order) time complexity in the
worst case.
1. The simplest way to look for an exact solution is exhaustive search: it simply
visits all points in the search space in some order and retains the best solution
2. Other methods only visit part of the search space, albeit the number of points
visited may grow exponentially (or worse) with the problem size.
2. Approximation algorithms
3. Heuristics algorithms
The Unit-size Placement Problem:
Problem: how the cells should be interconnected.
A net can be seen as a set of cells that share the same electrical signal
The interconnections to be made are specified by nets
Placement is to assign a location to each cell such that the total chip area occupied is
As the number of cells is not modified by placement, minimizing the area amounts to
avoiding empty space and keeping the wires that will realize the interconnections as
short as possible.
cells in the circuit are supposed to have a layout with dimensions 1x1(measured in some
abstract length unit)

it can be assumed that the only positions on which a cell can be put on the chip are the
grid points of a grid created by horizontal and vertical lines with unit-length separation.

Mstall pitch

V *
Metall w f t

M »1»Q pitch
V < tdS2 pitch

A nice property of unit-size placement is that the assignment of distinct coordinate pairs to
each cell guarantees that the layouts of the cells will not overlap.

If the range of coordinates available in two dimensions is fixed in advance, the only
contribution to the cost function will come from the area occupied by wiring.
The possible way to evaluate the quality of a solution for unit-size placement is to route
all nets and measure die extra area necessary for wiring.

: A, B, F, G
n 2 : B, E 2
n 3 : D, E
n 4 : A, C, D 1
B 5 : C, D, F
n 6 : C, E, F, G 0
7 : D, F i : :
n 8 : F, G 0 1 2
(a) (b)

AitiB El,

u G

(e) (d)

A bad placement will have longer connections which normally will lead to more routing
tracks between the cells and therefore to a larger chip area.
Solving the routing problem is an expensive way to evaluate the quality of a
This is especially the case if many tentative placements have to be evaluated in an
algorithm that tries to find a good one.

An alternative used in most placement algorithms is to only estimate the wiring area.
Backtracking and Branch- and- bound:
an instance I of a combinatorial optimization problem was defined by a pair ( F , c ), with
F the " set of feasible solutions" ( also called the " search space or " solution
space " ) and
c a cost function assigning a real number to each element in F.

Suppose that each feasible solution can be characterized by an n-dimensional vector f =

[ fl,f 2 . . . fn) and
each fi(l< i < n) can assume a finite number of values called the explicit
constraints .

the values assigned to the different components of f may sometimes not be

chosen independently. In such a case one speaks of implicit constraints .

Consider a combinatorial optimization problem related to some graph G ( V, E ) in which a

path with some properties is looked for.
One can then associate a variable fi with each edge, whose value is either 1to indicate
that the corresponding edge is part of the path or 0 to indicate the opposite.

The explicit constraints then state that fie {0, 1} for all i.
The implicit constraints say that the edges selected by the variables should form a path.
The principle of using backtracking for an exhaustive search of the solution space is to
start with an initial partial solution in which as many variables as possible are
left unspecified, and
then to systematically assign values to the unspecified variables until either a
single point in the search space is identified or an implicit constraint makes it impossible
to process more unspecified variables.

The cost of the feasible solution found can be computed if all variables are found.

The algorithm continues by going back to a partial solution generated earlier and then
assigning a next value to an unspecified variable (hence the name "backtracking")
It is assumed that all variables fi have type solution-element.
The partial solutions are generated in such a way that the variables fi are specified for
1 < i < k and are unspecified for i > k.
Partial solutions having this structure will be denoted by f~(k).
f~(n)corresponds to a fully-specified solution (a member of the set of feasible solutions).

The global array val corresponds to the vector f(k). The value of fk is stored in val[k — 1].
So, the values of array elements with index greater than or equal to k are meaningless
and should not be inspected.
The procedure cost(val) is supposed to compute the cost of a feasible solution using the
cost function c. It is only called when k = n
float best-cost; main ()
solution _element valf /i ]* best-solution [n]; {
bestxost := oo;
backtrack(int A:) backtrack(0);
( report(bestjolution );
float new.cost ; 1
if ( k = n ) {
newxost := cost(val );
if ( new cost < best jcost ) {
procedure allowed(val, k) returns a set of
values allowed by the explicit and implicit
besLcost : new.cost: constraints for the variable fk+I given f~(K)
best-solution : copy( val);
for each (el e allowed( va] k )) (

val[Jt] = el;
backtrack + 1);
5 4
3 5
E 7

/, ' A

/2 = B b F

A" C F D F B C D E

A' n F C n E c F H C D C B D C E D

h E F D E D C E D (B F B C C B D C 1) EHB C

A - F E E D E C F C B D B E B

27 31 33

20 2 7 33
31 20

• Information about a certain partial solution f ( k ) 1< k < n, at a certain level can indicate
that any fully-specified solution f ( n ) E D ( f ( k )) derived from it can never be the optimal

• Function that estimates this cost lower bound will be denoted by C .

• If inspection of can guarantee that all of the solutions belongingto f ( k ) have a higher
cost than some solution already found earlier during the backtracking none of the
children of need any further investigation.

• One says that the node in the tree corresponding to can be killed.

• killing partial solutions is called branch - and- bound

float best-cost;
solution -element valfn ], best $olution[rcl ;
main 0
b _and _b ( int ft ) besLcost := oc;
b andJKO);
new _
repon(best -solution);
if (ft =_ cost;
new cost := cost(val );
_ -
if (new.cost < best cost) {
best costnew.cost;
best -solution := copy(val );
else if (lower _bound -cost(val jt ) > be$ t _cost )
/* No action, node is killed */
for each (el e allowed( val, ft )) [
_ _=
val[ ft ] : el;
b and b{ft -h 1);

Procedure Lower_ bound cost is called to get a lower bound of the partial solution based
on the function C .

&*>) = §&») + *<?»)

where g ( f ) is a function that is computed given the specified variables of ¥ k ) and
h is a term that is based on the unspecified variables of *

/ . A

h E
5+ 15
_ C

F C D c
S+ 16

22+9 21 +6 11 +9
23+8 X 14+ 10 a + i? means that the node is killed

fi ~ Qy [ A)
27 20
An essential point is that the function cffW ) that computes the lower bound of the
solutions in D{ f & ) should, in general, be easier to compute than the mere traversal
of the subtree at in order to have some computational gain.
Dynamic Programming:

Dynamic programming is a technique that systematically constructs the optimal solution of

some problem instance by defining the optimal solution in terms of optimal solutions of
smaller size instances.

Dynamic programming can be applied to such a problem if there is a rule to construct the
optimal solution for p = k (complete solution) from the optimal solutions of instances for
which p < k (set of partial solutions).

The fact that an optimal solution for a specific complexity can be constructed from the
optimal lower complexity problems only, is essential for dynamic programming.

This idea is called the principle of optimality.

The goal in the shortest-path problem is to find the shortest path from a source vertex
vs to a destination vertex vt in a directed graph G(V, E) where the distance between two
vertices u, v is given by the edge weight w((u, v)).

If p = k, the optimization goal becomes: find the shortest path from vs to all other vertices
in the graph considering paths that only pass through the first k closest vertices to vs.

The optimal solution for the instance with p = 0 is found in a trivial way by assigning the
edge weight w((vs, u)) to the distance attribute of all vertices u.

Suppose that the optimal solution for p = k is known and that the k closest vertices to vs
have been identified and transferred from V to T.
Then, solving the problem for p = k+1 is simple: transfer the vertex u in V having
the lowest value for its distance attribute from V to T and update the value of the distance
attributes for those vertices remaining in V.

additional parameters may be necessary to distinguish multiple instances of the problem

for the same value of p.
Integer Linear Programming:
• Integer linear programming (ILP) is a specific way of casting a combinatorial optimization
problem in a mathematical format.
• This does not help from the point of view of computational complexity as ILP is NP
complete itself .
• ILP formulations for problems from the field of VLSI design automation are often
encountered due to the existence of "ILP solvers“.
• ILP solvers are software packages that accept any instance of ILP as their input and
generate an exact solution for the instance.

• why ILP is useful in CAD for VLSI

• The input sizes of the problems involved may be small enough for an ILP solver to find a
solution in reasonable time.
• One then has an easy way of obtaining exact solutions, compared to techniques such as
Linear Programming:
Integer linear programming is a special variant of linear programming ( LP )
a factory produces two different food products Pi and P 2 that are composed of the same
two ingredients II and 12 in different proportions ,
PI is made of all units of II and a 21 units of 12 Similarly
P 2 is made of al 2 units of II and a 22 units of 12 ,
The factory sells one unit of PI for price cl and
one unit of P 2 for c 2.
The goal is to maximize the daily sales given that the company can receive at most bl units
of II and b 2 units of 12 per day.
The demand is such that all production will be sold .
The unknowns in this problem are xl and x 2 the quantities of PI and P 2 to be produced
Stated mathematically, the goal is to maximize c\ x \ + C2*2

while satisfying the constraints

a\\ Xi+ 012*2 b\
021*1 + 322*2 < *>2
*i > 0
*2 > 0

Such a formulation is called a linear program

Ax < b Canonical form of LP

all variables are apparently restricted to be positive

Xi , that may assume negative values, can be replaced by the difference Xi — Xk of two
new variables Xi and Xk that are both restricted to be positive.

standard form

Ax b

«11*1 +«12*2 h « *i +a12 X2 + X 3 ~ bi

b1 is slack variable
It is possible to solve LP problems by a polynomial-time algorithm called the ellipsoid
Integer Linear Programming: ILP is a variant of LP in which the variables are restricted to be
The techniques used for finding solutions of LP are in general not suitable for ILP
Other techniques that more explicitly deal with the integer values of the variables should be
If integer variables are restricted further to assume either of the values zero or one. This
variant of ILP is called zero-one integer linear programming.

zero-one ILP formulation for the TSP:

Consider a graph G(V, E) where the edge set E contains k edges: E = {e1, e2, . . . , ek}.
The ILP formulation requires a variable xi, for each edge ei
The variable xi can either have the value 1, which means that the corresponding edge
ei has been selected as part of the solution,
or the value 0 meaning that ei, is not part of the solution.

Cost function=
i =\
> (
* >* xi e {0, l} t z" = 1, 2 k

In the optimal solution, only those xi that correspond to edges in the optimal tour
have a value 1
1 « »2 ri * . *i

2 *7 '2
5 *4
e3 *4
m e9 'IP
e» I I *8

v5 12

Vi : JTl + *2 + *3 + JC4 =2 Solution set would also include solutions that

*1 + *5 + *6 + *7 = 2
• consists of multiple disjoint tours
1>3 : X 2 + xs + x $ + JC9 = 2 Additional constraint: A tour that visits all
14 : *4 + *7 + *10 + *11 = 2 vertices in the graph should pass through at
least two of the edges that connect a vertex in
Vs : JC 3 + JCg + *10 + *12 = 2
V1 with a vertex V2 (where V2 = V \ V1)
l>6 : *6 + *9 + Xu + JCJ 2 = 2
Both V1 and V2 should contain at least three vertices.
{V|> »2 , U3 ) H- { U4 , V 5 , U6} : *3 + *4 + *6 + *7 + *8 + *9 > 2
{ vi , V3 , V5 } + { 2, *>4, 6} ; *1 + X 4 4- x$ -h xg + *10 + *12 > 2
[ v i , V 2 , U4 ) + { v i , V 5 , ve } X 2 + xj -t- *5 + + *10 + * LI > 2

size of the problem instance:

the number of variables is equal to the number of edges
The number of constraints of the type presented is equal to the number of vertices
The number of constraints of the type given in however, can grow exponentially as the
number of subsets of V equals 2^y.
Local Search :
• Local search is a general - purpose optimization method that works with fully specified
solutions f of a problem instance ( F, c )
• It makes use of the notion of a neighbourhood N ( f ) of a feasible solution f.
• Works with subset of F that is "close " to f in some sense.
• a neighbourhood is a function that assigns a number of feasible solutionsto each
feasible solution: N : F -> 2 AF.
• 2 AF denotes the power set of F.
• Any g E N ( f ) is called a neighbour of f.

]ocaI _search{ )
struct feasible-solution f \
set of struct feasible-solution G;

/ initialjsolutionO;
do j
O «- { g \ s e // ( / ), c( g ) < c( / ) J;
if ( G 0)
/ « any element of G ;
} while ( G # 0);
“ report / ;
• The principle of local search is to subsequently visit a number of feasible solutions in
the search space.
• transition from one solution to the next in the neighbourhood is called a move or a
local transformation

• Multiple minima problem

• If the function has a single minimum, it will be found.
• Functions with many minima, most of which are local
• local search has the property that it can get stuck in a local minimum.
• the larger the neighbourhoods considered, the larger is the part of the search space
explored and the higher is the chance of finding a solution with good quality.
• One more possibility is to repeat the search a number of times with different initial
• one should be able to move to a solution with a higher cost, by means of so-called
uphill moves.
Simulated Annealing:
• a material is first heated up to a temperature that allows all its molecules to move
freely around (the material becomes liquid), and is then cooled down very slowly.
• At the end of the process, the total energy of the material is minimal.
• The energy corresponds to the cost function.
• The movement of the molecules corresponds to a sequence of moves in the set of
feasible solutions.
• The temperature corresponds to a control parameter T which controls the acceptance
probability for a move from / .
F to g e N { f )
move for which c( g ) < c(/)t is always accepted
A bad move, for which c (g ) > c( / ) , is accepted with a probability A c ~ c( g ) - f ( / ).
int acceptstruct feasible-solution / , g )
float Ac;
The function random (k) generates a
Ac «- c( g ) - c ( / ); real-valued random number between 0
if ( Ac < 0 ) and k with a uniform distribution
return 1 ;
- At
else return ( e ~7~ > random ( l )); The combination of the functions
} thermal equilibrium, new temperature
and stop realizes a strategy for
s imu I ate nea l mg 0 simulated annealing, which is called the
( cooling schedule.
struct feasible -solution / , g ;
float T ; Simulated annealing allows many uphill
moves at the beginning of the search
/ «- initiaLsolutionO; and gradually decreases their
do {
do { frequency.
g some element of
if (accept( / , g ))

- _
while (!thermal jequilibrium( ) J;
T 4 new temperature( 7 ); '

while (!stopO );
report / ;
Tabu Search

Given a neighbourhood subset G G N ( f ) of a feasible solution f, the principle of tabu

search is to move to the cheapest element g E G even when c ( g) > c ( f ) .
The tabu search method, does not directly restrict uphill moves throughout the search
In order to avoid a circular search pattern, a so-called tabu list containing the k last visited
feasible solutions is maintained

This only helps, of course, to avoid cycles of length < k

tabu searchO
struct feasible-solution /, g , b\
set of struct feasible-solution G;
it element FIFO queue of feasible-solution Q\

Q * “ empty ;
b « initial solution ( );
- {
initial so) ution ();

G 4- some subset of N ( f )
lf < G 0> {
g *- “ cheapest element of G";
“ shift g into Q \
f «- «;
if (c(/) < c(h))
h 4- /;
while ( G # 0 or stop( ));
report b \
Genetic Algorithms .
instead of repetitively transforming a single current solution into a next one by the
application of a move,
the algorithm simultaneously keeps track of a set P of feasible
solutions, called the population .

In an iterative search process, the current population Pk is replaced by the next

one Pk +1 using a procedure
+1 E Pk +1 two feasible solutions
In order to generate a feasible solution fk
fk and gk called the parents of the child +1 are first selected from Pk
+1 is generated in such a way that it inherits parts of its " properties" from one
parent and the other part from the second parent by the application of an operation
called crossover .

First of all, this operation assumes that all feasible solutions / E F can be encoded by a
fixed length vectorf = [ fl,f 2 .. . fn ] T = f as was the case for the backtracking algorithm

Bit strings are to represent feasible solutions.

Number of vector elements n is fixed, but that the number of bits to representthe
value of each elementfi(l< i < n) is also fixed.

The string of bits that specifies a feasible solution in this way, is called a chromosome .
Consider an instance of the unit-size placement problem with 100 cells and a 10x 10 grid.

As 4 bits are necessary to represent one coordinate value (each value is an integer between
1and 10) and
200 coordinates (100 coordinate pairs) specify a feasible solution, the chromosomes of this
problem instance have a length of 800 bits.

A feasible solution = the phenotype

Encoding of chromosome = the genotype

Given two chromosomes, a crossover operator will use some of the bits of the first
parents and some of the second parent to create a new bit string representing the

A simple crossover operator works as follows:

Generate a random number r between 1 and the length I of the bit strings for the
problem instance.

Copy the bits 1through r — 1 from the first parent and the bits r through Ifrom
the second parent into the bit string for the child. Sometimes, it is customary to
generate a second child using the same r, now reversing the roles of both parents
when copying the bits.
Suppose that the bit strings of the example represent the coordinates of the placement
problem on a 10 x 10 grid, now with only a single cell to place (an artificial problem).

The bit string for a feasible solution is then obtained by concatenating the two 4-bit values
of the coordinates of the cell.

So, f(k) is a placement on position (5, 9) and g(k) one on position (8, 6).
The children generated by crossover represent placements at respectively (5, 14) and (8, 1).

Clearly, a placement at (5, 14) is illegal: it does not represent a feasible solution as
coordinate values cannot exceed 10.

First parent: First child:
01011 001 01011 1 0
</* + 1>)
Second parent: Second child:
10000 1 1 0 1 oooo 0 0 1
The combination of the chromosome representation and the crossover operator for
generating new feasible solutions, may leads to more complications.

Consider e.g. the traveling salesman problem for which each of the feasible solutions can
be represented by a permutation of the cities.

Two example chromosomes for a six city problem instance with cities c1 through c6 could
then look like
"C1C3C6C5C2C4“ and "C4C2C1C5C3C6".

In such a situation, the application of the crossover operator as described for binary
strings is very likely to produce solutions that are not feasible.

illegal solution "C1C3C1C5C3C6” (or "C4C2C6C5C2C4")

Order crossover: for chromosomes that represent permutations
This operator copies the elements of the first parent chromosome until the point of the
cut into the child chromosome.
The remaining part of the child is composed of the elements missing in the permutation
in the order in which they appear in the second parent chromosome.

Consider again the chromosomes "C1C3C6C5C2C4“ and "C4C2C1C5C3C6" cut after the
second city.
Then the application of order crossover would lead to the child
ini pop-size;
set of struct chromosome pop, newpop;
struct chromosome parent L , parent2, child;

pop «- 0;
for (t *- 1; t < pop-size ; t *- i + 1)
pop *- pop U ( chromosome of random feasible solution };
do { The function select is responsible for
newpop <- 0; the selection of feasible solutions
- -
for (i «- 1; i < pop-size; i « i 4 1) { from the current population favouring
parent « select(pop);
parent2 «- select(pop);
those that have a better cost

child « crossover(parentl , parent2); The function stop decides when to
terminate the search, e.g. when there
newpop *- newpop U ( child );
has been no improvement on the
} best solution in the population during
pop *- newpop; the last m iterations, where m is a
} while ( IstopO); parameter of the algorithm
report best solution";
The description in the figure deals with chromosomes that are manipulated, not the
feasible solutions themselves.

stronger preference given to parents with a lower cost when selecting pairs of parents
to be submitted to the crossover operator

Mutation: Mutation helps to avoid getting stuck in a local minimum

One can work with more sophisticated crossover operators, e.g. operators that
make multiple cuts in a chromosome.

One can copy some members of the population entirely to the new generation
instead of generating new children from them.

Instead of distinguishing between the populations pk and p(k+1) one could

directly add a new child to the population and simultaneously remove some
"weak" member of the population.
Longest-path Algorithm for DAGs

• A variable pi is associated with each vertex vi to keep count of the edges incident to
vi that have already been processed.
• Because the graph is acyclic, once all incoming edges have been processed, the
longest path to vi is known.

• Once processed Vj is included in a set Q.

• It will be taken out later on to traverse the edges incident from it in order to
propagate the longest-path values to the vertices at their endpoints.

• Any data structure that is able to implement the semantics of a "set" can be used.

• All edges in the graph are visited exactly once during the execution of the inner for
longest-path( G )
For ( i 1; i < n\ f «- i + 1 )
Q <- t «oh
"in degree of t?, ;

while ( Q # 0) {
uf « any element from Q \
Q Q\[ vih
for each v j "such that ( u/ V J ) Q E {
t :
xj «- max ( xj , Xi + djj ); vo
Pj -Pj U
it ( Pj < 0)
- V

Q «- fiu [«;J ;
main ()
for (i 0; J < rt\ i « j + 1)
xi « 0;
> 3

5 n

2 V

Q pi pi Pi PA P5 * ] *2 x3 X4
not initialized 1 2 1 2 ) 0 0 0 0 0
bo ) 0 1 1 2 1 1 5 0 0 0
( vi } 0 0 1 2 0 1 5 0 0 3
. >
( V2 «5 0 0 0 1 0 1 5 6 6 3
( V3 v5}
(vs )
0 0
1 0
( V4} 0 0 0 0 0 i 5 6 7 3
Layout Compaction:
At the lowest level, the level of the mask patterns for the fabrication of the circuit, a final
optimization can be applied to remove redundant space.
This optimization is called layout compaction

Layout compaction can be applied in four situations,

1. Converting symbolic layout to geometric layout.

2. Removing redundant area from geometric layout.

3. Adapting geometric layout to a new technology.

4. Correcting small design rule errors

A new technology means that the design rules have changed;

as long as the new and old technologies are compatible (e.g. both are CMOS technologies),
this adaptation can be done automatically, (e.g. by means of so-called mask-to-symbolic
The Layout design problem:

A layout is considered to consist of rectangles.

the rectangles can be classified into two groups:
1. rigid rectangles and
2. stretchable rectangles.

1. Rigid rectangles correspond to transistors and contact cuts whose length and width
are fixed.
When they are moved during a compaction process, their lengths and widths
do not change.

2. Stretchable rectangles correspond to wires.

In principle the width of a wire cannot be modified. The length of a wire, can
be changed by compaction.
Compaction tools:

• Layout is essentially two-dimensional and layout elements can in principle be

moved both horizontally and vertically for the purpose of compaction.

• When one dimensional compaction tools are used, the layout elements are only
moved along one direction (either vertically or horizontally).
This means that the tool has to be applied at least twice: once for horizontal
and once for vertical compaction.

• Two dimensional compaction tools move layout elements in both directions


• Theoretically, only two-dimensional compaction can achieve an optimal result.

This type of compaction is NP-complete. On the other hand, one
dimensional compaction can be solved optimally in polynomial time
In one-dimensional, say horizontal, compaction a rigid rectangle can be represented by
one x-coordinate (of its centre, for example) and a stretchable one by two (one for each
of the endpoints)

A minimum-distance design rule between two rectangle edges can now be expressed as
an inequality j - X{ > d i j
the minimum width for the layer concerned is a and the minimum separation is b

*x 2i - x2\ >> ab
- JC6 > b
1 xl *2

A graph following all these inequalities is called constraint graph.
*3 *4
There is a source vertex no. located at x = 0

*1 * 2

* X3 X4

X2 xt > a
*X 3 - *2 b

0. a
v V
2 £ a
V3 V4
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Directed acyclic graph
A constraint graph derived from only minimum-distance constraints has no cycles

The length of the longest path from the source vertex v0 to a specific vertex vi in a the
constraint graph G(V, E) gives the minimal x-coordinate xi, associated to that vertex.

The Longest Path in Graphs with Cycles

Two cases can be distinguished:
1. The graph only contains negative cycles, i.e. the sum of the edge weights along any
cycle is negative.
2. The graph contains positive cycles: The problem for graphs with positive cycles is NP-
A constraint graph with positive cycles corresponds to a layout with conflicting
Such a layout is called over-constrained layout and is impossible to realize