Proceedings of 1990 International Symposium on Power Semiconductor Devices & ICs, Tokyo, pp.

204-210
6.1.3

A SITH-MODEL FOR CAE IN POWER-ELECTRONICS

D. Metzner, D. Schroder
Lehrstuhl fiir elektrische Antriebstechnik,
Technische Universitat Miinchen, Arcisstr. 21, D-8000 Munchen 2

Abstract: Thyristor (SITh)' which is basically a combination of

A static and dynamic model of the Static Induction Thyristor
(SITh) is developed, particularly considering the charge in the
wide, low doped base-layer which is conductivity-modulated
during on-state. An equivalent-circuit of the model is derived,
consisting of a modified hvo-transistor-structure(3 Junctions)
plus a Static Induction Transistor (SIT) which represents the
unipolar part of the device. The implementation in a nehvork-
simulator, here IG-SPICE, is achieved by using FORTRAN-
Subroutines as 'user-defined controlled sources'. Simulations
of DC and transient characteristics of the SITh in common
circuits are discussed and show good agreement with
measurements.
a unipolar and a bipolar device, exhibiting features
as low On-Resistance, high Blocking-Capability and
excellent dynamic ratings (dI/dt, dU/dt).
In this paper we present a static and dynamic model
of the SITh which is incorporated in a circuit-
analysis-program. It enables the simulation of the
static behaviour as well as switching-transients and
failure-effects of power-circuits containinig SITh's.
As it is based on the physics of the device, the model
can also give some insight into the dependence of
the device behaviour on its physical and geometric
parameters.

2. Structure And Equivalent circuit of the SITh

1. Introduction:
The model presented in this paper is based on the
'Buried-Grid-SITh' (see Fig.l), which represents one
So far the most frequently used approach in the
possible structure of the device [6,7]. It should be
design of power-electronic circuits has been the
noted that there are alternative structures [8,9)
execution of 'hardware-experiments'.
whose equivalent circuits do not correspond to the
These 'hardware-experiments', however, show
following model in all respects; modifications would
several disadvantages, such as high costs, high loss of
be necessary to include those variations of the
time and above all limited access to interesting
signals. In the meantime circuit simulation has device also.
become a powerful and essential tool in IC-Design. Ca I hade

The major obstacle in the use of circuit-simulators

for the design of power-electronic circuits has been
the fact of no adequate models for power-
semiconductors.
In recent years there has been good progress in the
development of such models [l]for the power-diode
[2], the power-MOSFET [3,4], and the power-BJT
[5]. Important effects of these devices are charge-
storage-effects, conductivity-modulation, high-
injection-effects as well as non-quasistatic effects.
However, new semiconductor devices are
developed which are often of a hybrid type. One of
Fig.1: Buried-Grid-SITh
these switching-devices is the 'Static-Induction-

204

From the device structure (see Fig.2) it can be seen
that the SITh in principle consists of four layers
similar to a GTO-Thyristor, yet with one distinction:
Its gridded pf-gate region which is implemented as
a fine finger-structure in order to avoid current
filaments during switching.
I the cathode and the anode contact, Blocking
n'
Gate
-
'P
\ BJT these electrons in turn cause a hole current to
Anode-Sb
P+
n'
I Anode
F i g 2 Equivalent Circuit of the SITh-Model
Localization of its Elements
In the blocked state electrons can diffuse across the
potential-barrier in the gate region. The resulting
current is equivalent to the drain- current of a Static
Induction Transistor (SIT), a kind of vertical JFET,
connected parallel to a npn-BJT (see Fig.2).
While it is sufficient to simulate this npn-Transistor
by a standard-model, a special model is necessary
for the wide, low doped n- - base layer which
constitutes the base of the second BJT, a low-gain
pnp-transistor. For such a wide-base-bipolar-
transistor no standard-model can be used; in this
approach the model uses the collector-junction of
the npn-transistor as the collector of both
transistors, resulting in a lower number of
parameters compared to conventional two-transistor
models.
The charge distribution and the recombination in
this wide base region and its adjacent depletion
layers are calculated as functions of anode-current
and junction voltages, thus determining the values of
the nonlinear resistor Rbase (voltage-drop across
the wide base) and the current-source I c p
(collected holes and charging-current of the wide-
base-BJT).
As carriers are injected at a very high level from
anode and cathode during the on-state, the electron
205
current of the parallel SIT is significant only during
switching transients or in the blocked state.
3. The Static Model
Blocking characteristics:
In the blocked state a depletion layer forms around
the buried grid, extending in both directions towards
Voltage is maintained by the depleted wide base
region. As the NPN-BJT is in the off-region, the
only contribution to the cathode-current is supplied
by electrons which diffuse across the potential
barrier at the buried grid (i.e. gate-region).
Representing a base current of the wide base pnp-
the buried grid which is extracted at the gate
contact. According to the static model of the Static
Induction Transistor [ 10,11], the diffusion current of
electrons can be approximated by the following
equation:
IT( = 10 e s p ( --1V.l
)
(1)
VT
ns is the electron concentration in the source-
(here: cathode-) region, Dn and L, are the
diffusivity and the diffusion-length in the channel
region. VB at the same time is the height of the
potential barrier which could only be determined
exactly by solving the 3D-Poisson- Equation. In
practice, however, the usual approximation is
sufficient:
(3)
1)is called the grid factor; by adding the constant C
the ionized donors in the channel are taken into
account.
The Voltage dependence of the amplification factor
is approximated by the following function:
(4)
On-State-Characteristics:
During the on-state the channel and the base region
are flooded by injected excess-carriers from both
sides, i.e. electrons are are injected from the
cathode and holes are injected from the anode. The
channel region does no longer maintain its unipolar
character which constitutes the SIT in blocked state.
(9)
Instead, the device now behaves similar to a PIN
Power-Diode. To calculate the I-V Characteristics
the conditions in the modulated base must be where Li =DAT~~
considered. The total static anode current is divided
into two components: One component, IA, flows via The solution to (9) is:
the anode-pn-junction, the other component,
referred to as IS , is the electron current in the
shunting area.
Accounting for the back injection current of
electrons into the anode, IA can be expressed as:
The carrier concentrations p(0) and p(w) are related
to the corresponding junction voltages VJA and
VJC as follows:
(5)

AA is the anode-area, b is the mobility ratio pn/p ,

ni is the intrinsic carrier density, JNO is tEe
saturation current for the backinjection of electrons
into the anode, q is the elementary charge unit and
DA is the ambipolar diffusivity. p(x) is the
distribution in the low doped base region (because The voltage drop across the base is the integral of
of high injection conditions, both, electron and hole the electric field
density) where the origin of the coordinate system is
placed at the border between the anode junction
and the base region. The position x =w defines the
opposite edge of the wide base at the buried grid or where the electric field is related to p(x):
the border of the collector space-charge region, IT 1
E ( T )=
respectively. AT ’ q ’ ( P I 1 +pp) 24s)
The current through the shunting area can be
calculated by means of a pseudophysical shunting
conductance [ 121:
WN is defined by ~ = N B A S E ; Consequently the
IS = V J A * (GSO + GAfOD) (6) expression of V B reads:
~ ~ ~

The unmodulated conductance GSOis equal to the

conductance of the unmodulated base, the
modulated component is associated with the carrier
density p(0) at the adjacent anode junction:

The collector current of the wide base BJT,

represented by Icp in the equivalent circuit of Fig. 2
is the difference between the total current and the
NBASE is the doping density in the base, AT is the electron current at x=w:
overall device area, ASeff and weff are the effective I c p = I F , ( W )= IT - II,(IV) (16)
area and length of the modulated shorting region.
where In(w) is composed of the electron current at
Next, the voltage drop across the modulated base x=O plus the recombination current in the base.
has to be calculated. Under high injection
conditions, the base transport equation reads:
I ~ ~ ( I V=
) 11,(0) + Irek (17)

206
 dQ J C
IQJC = -
dt

(25)

QBN is the charge of the wide base defined by: Consequently, the collected hole current has to be
modified; the electron current at x=w in eqn.(l7)
d)U,v = ,47, (1
1
l‘”
p(2)dz (20)

The above system of equations (1) to (20) defines all

now reads:

wq = I,~(o) + + (26)
static voltage- and current sources which describe
the static model. Furthermore the carrier distribution in the base p(x)
is not equal to the static case. Now the ambipolar
diffusion equation has to be solved instead of (9):
4.The Dynamic model:

To describe the dynamic behaviour the following

charges have to be considered:
Since the carrier concentration is now a function of
- The stored charge in the base of the npn - BJT, position and time, the following approximation is
QBP, i.e. in the buried grid region, made:
- The depletion charge of the gate-cathode-junction,
QJGK,
- The stored charge in the wide base, Q ~ and
N
- The depletion charge of the collector junction QJC
which maintains the blocking voltage

Since QBP and QJGK are of minor significance for

geometric reasons, they can be accounted for in the
standard model of the npn - BJT. QBN and Q J ~
however, are determined explicitly in the model. As T is assumed to be independent of position,
QBN is determined by eqn. (20), Q J is~ calculated eqn.(27) simplifies to:
by integrating the following charge components over
the depleted region: the fixed charges of the ionized
donors and the mobile charges of holes drifting
through the high electric field of the depletion layer. Leff is the ’effective diffusion length’, defined as
DA . TH
=

The solution of (30) differs to (10) only in the value

vpsat is the high-field saturation velocity of holes, Xd
is the width of the collector depletion layer, &si is
the dielectric constant of silicon. The charging
currents which result from changes of Qjc and
QBN in time are:
of Leff; for turn-on, L < LA and for turn-off, Leff
> L A The case of’:L e < 0 which might occur for
high rates of electron injection into the anode has
been excluded up to now.
Further work has to be done to proper account for
two-dimensional effects (especially the influence of
the anode shorts on the carrier distributions) and

207
the moving boundary of the depletion layer, which
hasn't been considered, either.
5. Simulation and Analysis
The network model described in the last paragraphs
is implemented in the network simulation program
IG-SPICE by combining an Ebers-Moll-model for
the npn BJT with several 'user-defined controlled
sources'. These controlled voltage- and current
sources which simulate the Static Induction
Transistor and the wide-base BJT are implemented
as FORTRAN- Subroutines referenced by the main
program.
The parameters of the SIT are fitted to the blocking
characteristics, the current gain of the Ebers-Moll
model is extracted from the turn-off current gain of
the SITh,the saturation current of the gate-cathode-
(or base-emitter-) diode can be measured in a
traditional way. The saturation current of the gate-
wide base- (or base-collector-) diode is extracted
from the on-state characteristics. The important
parameter 7H can be determined by the decay of
the tailing current and the on-state-characteristics.
Geometric parameters are available from the design
of the device, so are the values of doping densities.
To demonstrate the validity of the model DC-
andtransient analyses are performed. Fig.3 and Fig.4
compare the on-state- and blocking characteristics
with the corresponding simulations. Good
agreement is achieved.
Fig. 3: Simulated (solid line) and measured (dashed line) On-
State- Characteristics
208
Fig. 4:Simulated (solid line) and measured (dots) Blocking-
Characteristics
To examine the dynamic behaviour, switching of
ohmic and inductive loads with a snubber circuit and
a free-wheeling diode is measured and simulated.
Figures 5 and 6a,b show the test circuit for the
ohmic load switching and the comparison of
measurement and simulation; good agreement is
achieved. Deviations are evident during the initial
phase of the tailing current and in the spike of gate
voltage during turn-off. The latter is caused by lack
of a model for the zener diode connected parallel to
the gate circuit (which is essential to limit this
spike), while the deviation of the tailing current
coincides with the spike of the anode voltage. This
voltage-spike, which is caused by the parasitc
inductance of the snubber circuit, reverses the
expansion of the space charge region during its
negative slope and brings about strong non-
quasistatic effects.
Fig 5 : Test circuit for switching of ohmic load with RCD-
Snubber and parasitic inductances
 UAVE-.FOR% AT TURN-OFF
Ve.=800V
0"
VG k

VAk

1c * o ir BJT. As these parameters are strongly dependent on

u o r :SOV/di v. A K : 200V/d
Horizontal:O.S~s/div.
the design parameters which in turn cannot be
determined accurately by the manufacturer, we
refrained from fitting these parameters to the
iA measurement.
IV. i K: 2OOA/d i v . 1 A :2OOA/d i v

ew.8 --
T ,.-I

Fig 6: Turn-off of Ohmic Load, CSnubber = 0.5pF;

/'

,"
a)measured; b)simulated

Fig.7 shows the test circuit for inductive load

switching: The load current increases while Thl and
I-----l
-e \

the DUT are turned on. When the DUT is turned

off, the free wheeling diode D F takes
~ over the load
current.
I I
I
I I I
I
I
1 I

Fig. 8 a , b Turn Off of Inductive Load, 315A/600V,

Cs=O, 4 4pF a)measurement, b)simulation
.200v

In Figures 9a and b a turn-on process is shown; here,

differences between simulation and measurement
appear for .two reasons: The different reverse
current of the free-wheeling diode is due to its
Fig.7: Test circuit for the switching of inductive loads unknown parameters; the ripple of the anode
voltage is due to inductive intrusions during the
The Figures 8a and b compare simulation and measurement.
measurement of such a turn-off process. Again, for
the same reasons, deviations of the simulation are
apparent in the initial phase of the tailing current
where the anode voltage changes very fast. The
slight difference in the slope of the anode current is
due to the uncertainty of parameters of the pnp-

209
 References:
[l] E.Stein: "Elektrische Modelle von Leistungshalbleitern
fur den Entwurf von Stromrichterstellgliedern", Ph.D.
Thesis Universitat Kaiserslautern (1984)
[2] C.Xu, D.Schroder: "Modelling and Simulation of Power
MOSFET and Power-Diode", IEEE-PESC-Record 1988
I
' '
< I .
I I [3] C.Xu, D.Schroder: "A unified model for the power
Mosfet, including the inverse diode and the parasitic
! ' transistor", Proc. of E P E '89 Aachen, F.R.G
[4] E.Stein, D.Schroder: "Computing The Switching
Behaviour Of The Power-MOSFET T o Optimize
Circuit-Design", IPEC-Record ,1983, pp.336-347

I (51 C.Xu, D.Schroder: "A Power Bipolar Junction Transistor

Model Describing The Static And The Dynamic
Behaviour" IEEE-PESC-Record, pp.314-321
[6] Nishizawa et al.: "A Low Loss High Speed Switching
Device: The 2500 V 300 A Static Induction Thyristor",
I E E E Trans. Vol.ED-33 No.4, A p d 1986, pp 507-515
[7lMuraoka et al.: "Characteristics of the High Speed Static
Induction Thyristor And Its Application As The 60 k H I
100 kW And The Efficiency Of More Than 90%
Inverter", IEEE PESC Record 1986, pp 94-103
[8] Nakamura et al.: " Very High Speed Static Induction
Thyristor", IEEE Trans. Vol. IA-22 No.6, 1986
Fig. 9a,b Turn On Transient at 315A/600V ;% = 4 p H
19) H. Gruening: "Superfast High Power Bipolar Switch",
a)measurement b)simulation IEDM Proceedings, 1989

6.Conclusion [lo] Nishizawa et al.: "Field Effect Transistor Versus Analog

Transistor (Static Induction Transistor)", I E E E Trans.
VOI ED-22, NO.4,1975, pp. 185-197
A static and dynamic model of the Static Induction
[ l l ] Plotka et al.: "Interpretation Of Exponential Type Drain
Thyristor is derived and implemented in a network Characteristics Of The Static Induction Thyristor", Solid
simulation program. The emphasis is on the State Electronics, Vol23,1980, pp.693-694
simulation of the wide-base BJT which constitutes [12] Son et al.: "Modeling of Bistable I-V Characteristic
important device-characteristics.
Future efforts include proper accounting for the
moving boundary condition in the depleted base as
well as two-dimensional effects in the shorting area
and the gate-region. In principle, the procedure
presented in this paper is applicable also to a GTO-
Thyristor model, provided that some variations are
made.

210