Sei sulla pagina 1di 10

An-Najah National University

‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Department Name : Computer Engineering


Course Name: Digital Circuits Design I Lab Course # : 10636291
Report Grading Sheet

Instructor Name: TTL & CMOS Logic Levels Experiment #: 2


Academic Year: 2018 Performed on: 31 / 1 / 2018
Semester: Second Submitted on: 7 / 2 / 2018

Students:
1- Mohammed Nawahda 2- Wasim Ghanayma
3- 4-
5- 6-
Report’s Outcomes
ILO _1 =( ) % ILO _2 =( ) % ILO _3 =( ) % ILO __ =( ) % ILO __ =( ) %
Evaluation Criterion Grade Points
Abstract
answers of the questions: “What did you do? How did you do it? What
did you find?”
Introduction
Sufficient,Clear and complete statement of objectives.
Theory
Presents sufficiently the theoretical basis.
Apparatus/ Procedure
Apparatus sufficiently described to enable another experimenter to
identify the equipment needed to conduct the experiment. Procedure
sufficiently described.
Experimental Results and Calculations
Results analyzed correctly. Experimental findings adequately and
specifically summarized, in graphical, tabular, and/or written form.
Discussion
Crisp explanation of experimental results. Comparison of theoretical
predictions to experimental results, including discussion of accuracy
and error analysis in some cases.
Conclusions and Recommendations
Conclusions summarize the major findings from the experimental results
with adequate specificity. Recommendations appropriate in light of
conclusions. Correct grammar.
References
Complete and consistent bibliographic information that would enable
the reader to find the reference of interest.
Appendices
Appropriate information, organized and annotated. Includes all
calculations and raw data Sheet.
Appearance
Title page is complete, page numbers applied, content is well organized,
correct spelling, fonts are consistent, good visual appeal.
Total
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Abstract:
In this experiment we’ll use two different kinds of ICs1 (TTL & CMOS IC’s) to
realize what 0 Logic and 1 Logic means , in addition to understand the
significance of VOH , VOL , VIH and VIL .
Our next goal is to understand the difference between logic levels for CMOS
and TTL gates and to determine the noise margins for TTL & CMOS invertors ,
Moreover we’ll obtain the voltage transfer characteristic (VTC) for these
invertors .

Tools and Equipment's, we need:


1- 74LS04 TTL inverter gate.
2- 74HC04 CMOS inverter gate.
3- Breadboard .
4- Led.
5- Power Supply.
6- Wires.
7- Resistors

1
IC : is a set of electronic circuits on one small plate ("chip") of semiconductor material, normally silicon. This
can be made much smaller than a discrete circuit made from independent electronic components. ICs can be
made very compact, having up to several billion transistors and other electronic components in an area the
size of a fingernail.
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Procedures:
1- We connect all electronic components with a Breadboard.
2- We connect the Power supply with Breadboard .
A. We connect the positive wire "VCC" (usually the color red wire)
to the beginning of the first outlet " First red outlet " in the Power
supply and end wire with positive line "Red Line" on the top
Breadboard, and connect the negative wire " ground " (usually to
be black wire) to the beginning of the second outlet" Second
black outlet" in the Power supply and end wire with negative line
"Blue Line "at the bottom of the Breadboard .
B. We connect the positive wire "VCC" (usually the color red wire) to
the beginning of the third outlet " Third Red outlet "in the Power
supply and end wire with the input gate, and connect the
negative wire " ground " (usually to be black wire) to the
beginning of the fifth outlet " Fifth black outlet " in the Power
supply and end wire with negative line "Blue Line "at the bottom
of the Breadboard .
3- We increase by 0.2 voltage at the input until we get to 5 volts .
4- We measure output voltage from gate by Voltmeter .
5- We are writing table that contains a voltage value input and voltage
value output .
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Part 1 : TTL (74LS04)


Introduction to TTL ICs :

Transistor–transistor logic (TTL) is a class of digital circuits built from


bipolar junction transistors (BJT)2 and resistors. It is called transistor–transistor
logic because both the logic gating function (e.g., AND) and the amplifying
function are performed by transistors (contrast with resistor–transistor logic
(RTL)3 and diode–transistor logic (DTL)4).

2
A bipolar junction transistor (bipolar transistor or BJT) is a type of transistor that uses both electron and
hole charge carriers. In contrast, unipolar transistors, such as field-effect transistors, only use one kind of
charge carrier. For their operation, BJTs use two junctions between two semiconductor types, n-type and p-
type.
3
Resistor–transistor logic (RTL) is a class of digital circuits built using resistors as the input network and bipolar
junction transistors (BJTs) as switching devices
4
Diode–transistor logic (DTL) is a class of digital circuits that is the direct ancestor of transistor–transistor
logic. It is called so because the logic gating function (e.g., AND) is performed by a diode network and the
amplifying function is performed by a transistor
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Objectives of this part :


i. Finding the typical output values for logic 1 and 0 for a TTL
inverter .
ii. Determine the noise margins and the forbidden regions .
iii. Determine the values of VOH , VOL , VIH and VIL for TTL inverter
IC.

Table for theoretical result :

input output
0 1
1 0

Table for theoretical result and Practical result :

Input Output(Volt) Output Input Output(Volt) Output


0 4.383 1 2.6 0.134 0
0.2 4.383 1 2.8 0.134 0
0.4 4.375 1 3 0.134 0
0.6 4.374 1 3.2 0.134 0
0.8 4.371 1 3.4 0.134 0
VIL 1 VOH 4.371 1 3.6 0.134 0
1.2 1.669 - 3.8 0.134 0
1.4 1.158 - 4 0.134 0
1.6 0.727 - 4.2 0.134 0
1.8 0.1339 - 4.4 0.134 0
2 0.495 - 4.6 0.134 0
VIH 2.2 VOL 0.1339 0 4.8 0.134 0
2.4 0.134 0 5 0.134 0
Lighting
No lighting
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

The relationship between the output and input Voltage


5.0

4.0
Input Voltage

3.0

2.0
VIN = -0.9359VOUT + 3.5879
1.0

0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Voltage

Output(Volt) Linear (Output(Volt))

Practical Values :
VIL :1 volt
VOL :0.1339 volt
VOH : 4.371 volt
VIH : 2.2 volt
Two points at which the slope is -1 : (1.6,0.727) and
(2.2,0.1339)
VIL which is the smaller input value at which the slope is -1:1.6v
VIH which is the larger input value at which the slope is -1:2.2v
Noise margin by Practical values :
NML = VIL – VOL = 1 – 1.2=- 0.8661 Volt
NMh = VOH - VIH = 4.371 – 2.2 = 2.182 Volt

Noise margin by Datasheet values :


NML = VIL – VOL = 0.8-0.5=0.3 Volt
NMh = VOH - VIH = 2.7 -2= 0.7 Volt

The forbidden region by practical values: 1 to 2.2 Volts.


The forbidden region by Datasheet values:0.8 to 2 Volts.
Figure 1: TTL values by Datasheet
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Part 2 : COMS (74HC04)


Introduction to CMOS ICs :

Complementary metal–oxide–semiconductor (CMOS) is a technology


for constructing integrated circuits5. CMOS technology is used in
microprocessors, microcontrollers, static RAM, and other digital logic circuits.
CMOS technology is also used for several analog circuits such as image sensors
(CMOS sensor), data converters, and highly integrated transceivers for many
types of communication .

Figure 2(CMOS inverter (NOT logic gate))

Objectives of this part :


i. Finding the typical output values for logic 1 and 0 for a CMOS inverter .
ii. Determine the noise margins and the forbidden regions .
iii. Determine the values of VOH , VOL , VIH and VIL for CMOS inverter IC .

Table for theoretical result:

input output
0 1
1 0

5
See page 1 .
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Table for theoretical result and Practical result :

Input Output(Volt) Output Input Output(Volt) Output


0 5.001 1 2.6 2.2883 -
0.2 5.001 1 VIH 2.8 VOL 0.0067 0
0.4 5.001 1 3 0.0064 0
0.6 5.000 1 3.2 0.0052 0
0.8 5.000 1 3.4 0.0052 0
1 5.000 1 3.6 0.0050 0
1.2 5.000 1 3.8 0.0080 0
1.4 5.000 1 4 0.0058 0
1.6 5.000 1 4.2 0.0057 0
1.8 5.001 1 4.4 0.0058 0
VIL 2 VOH 5.000 1 4.6 0.0057 0
2.2 2.922 - 4.8 0.0057 0
2.4 2.5680 - 5 0.0061 0

Lighting
No lighting

NOTE : Note : In the values cause weak light sometimes there’s a light and sometimes
there’s no light , from the previous note we conclude it’s a forbidden area .

The relationship between the output and input Voltage


7.0
6.0
5.0
Input Voltage

4.0
3.0
2.0 VIN = -1.4242VOUT + 5.9778
1.0
0.0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Output Voltage

Output(Volt) Linear (Output(Volt))


An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Practical Values :
VIH :2.8 Volt
VIL :2 Volt
VOH :5 Volt
VOL :0.0067 Volt

Two points at which the slope is -1 : (5,0.0061) and


(0.2,5.001)
VIL which is the smaller input value at which the
slope is -1:0.2v
VIH which is the larger input value at which the
slope is -1:5v

Noise margin by Practical values :


NML = VIL – VOL = 2.6-0.0067=1.9933Volt
NMh = VOH - VIH = 5 -2.8= 2.2 Volt

Noise margin by Datasheet values :


NML = VIL – VOL = 1.35 – 0.1=1.25 Volt
NMh = VOH - VIH = 4.4 – 3.15=1.25 Volt

The forbidden region by practical values: 2 to 2.8 volts.


The forbidden region by Datasheet values: 1.35 to 3.15
volts.
Figure 3: CMOS values by Datasheet

Discussion:
In this experiment we see that the actual results and calculations
doesn’t give the same ideal results , that’s because in the real life we
have error ratio and nothing ideal , there’s many causes , maybe a
nearly broken tool or the waste voltage in the IC because of
semiconductor diode reversed voltage .
An-Najah National University
‫جامعة النجاح الوطنية‬

Faculty of Engineering ‫كلية الهندسة‬

Result:
In this experiment we learned about the basic concept of 1 Logic and
0 Logic which indicate to the existence of voltage for logic 1 and the
absence of voltage for logic 0 .

Then we familiarized on VOH , VOL , VIH and VIL concepts for CMOS
and TTL ICs and how to compute those values, which can help us to
determine the noise margin for the IC ,and the minimum output
accepted as output Logic 1 , maximum output accepted as output
Logic 0 , minimum input accepted as logic 1 and maximum input
accepted as logic 0 which means (VOH , VOL , VIH , VIL ) respectively .

References:
1- GATE 1995 ECE TTL Logic gate input and output voltage
levels under HIGH and LOW conditions
https://www.youtube.com/watch?v=TSWQwxxgVO4
2- Wikipedia (used to provide more information in the
references).

Potrebbero piacerti anche