M-Series Prog and Ops-Dec2011

System Software 5.0.
5 or Higher
M-Series Test System
Programming and Operations

PN: 73-01003-00, December, 2011
PRELIMINARY
KVD Company Confidential

System Software 5.0.5 or Higher—M-Series Test System Programming and Operations
Legal and Copyright Notice:

KVD Company, Inc. (KVD) makes no representations or warranties with respect to the contents of this
publication and specifically disclaims any implied warranties of merchantability or fitness for a particular
purpose. KVD reserves the right to revise this publication and to make changes in the content hereof
without obligation of KVD to notify any person of such revisions or changes.
KVD is a trademark of KVD Company, Inc.
Copyright © December, 2011, KVD Company, Inc.. All rights reserved.
If you have any comments on this document, email service@kvdco.com
For software bug reports and feature requests, email bugs@kvdco.com
KVD Company, Incorporated

2465 Impala Drive
Carlsbad, CA 92010
Phone 760-931-5085
Fax 760-931-5092
http://www.kvdco.com/

Contents
1. Introduction and Overview
About this Document ......................................................................................................... 29
Where to Look for Online Help and Tools ............................................................................ 29
Quick-Start Guide .............................................................................................................. 30
Nomenclature .............................................................................................................. 30
Warnings and Cautions ...................................................................................................... 31
System Overview............................................................................................................... 31
Feature Summary .............................................................................................................. 34
Device Families Tested on the KVD M-Series........................................................................ 35
2. Safety and Regulatory Summary

Safety Statement............................................................................................................... 37
Warnings and Cautions ................................................................................................. 37
Operator Safety ........................................................................................................... 38
Maintenance Personnel Safety....................................................................................... 38
General Working Safety........................................................................................... 38
Shock Hazards Contained in the Test System ............................................................ 38
Lockout/ Tagout ..................................................................................................... 38
Seismic safety .............................................................................................................. 40
Maintenance: Lithium Battery Caution............................................................................ 41
Electrostatic Discharge ....................................................................................................... 41
Protective Grounding ......................................................................................................... 42
Short Circuit Current Rating (SCCR) .................................................................................... 42
Ergonomic Statement......................................................................................................... 42
Chemicals ......................................................................................................................... 42
Decommissioning............................................................................................................... 43
Ionizing Radiation.............................................................................................................. 43
Optional Manipulator Cart................................................................................................... 43
Design Specifications .................................................................................................... 44
Operation .................................................................................................................... 44
Inspection ................................................................................................................... 44
Maintenance ................................................................................................................ 44
Seismic Mounting Considerations ........................................................................................ 44
Side view of the Manipulator.................................................................................... 45
Front view of the Manipulator .................................................................................. 47
3. System Hardware
AC Power Distribution Unit (PDU)........................................................................................ 50
System Software 5.0.5 or Higher— M-Series Test System Programming and Operations 3
DC Power Control and Flow ................................................................................................ 52

Nomenclature of DC Power Wiring................................................................................. 54
Power Plus Power Supply ................................................................................................... 55
Choosing the Proper Power Supply in the TCT ................................................................ 55
This will normally be done at system configuration time, but if needed for lower power dissi-
pation in the instruments, may be changed as needed by the test engineer. The high voltage
40V rail may be lowered to 24V or 16V. The typical choice is the "PW" mode which sets 40V
as the rail. ................................................................................................................... 55
Power Plus (Multi-output Switcher Power Supply) and Power GUI .................................... 55
Power Supply GUI................................................................................................... 55
48V Power Supply.............................................................................................................. 56
Hypertronics ................................................................................................................ 57
Calibration Meter ............................................................................................................... 58
Alternate Calibration Meters .......................................................................................... 58
Keithley Capabilities and Specifications .......................................................................... 58
Calibration ................................................................................................................... 59
Test Head ......................................................................................................................... 59
Father Cards ..................................................................................................................... 62
DC Power Wiring .......................................................................................................... 63
Maintenance: Fuses...................................................................................................... 64
Grounds ...................................................................................................................... 65
Relays and Relay Drivers .............................................................................................. 65
DUT Cards ................................................................................................................... 65
4. System Setup
About CodeGear RAD Studio 2007 Professional .................................................................... 67
Installation .................................................................................................................. 67
Licensing ..................................................................................................................... 67
Installation Swapping Tool ................................................................................................. 68
Offline Emulator Mode - Notester Install.............................................................................. 68
Notester Emulation Mode.............................................................................................. 68
Test Head Power Control.................................................................................................... 69
Tester Configuration Tool - TCT.......................................................................................... 69
Functional Description .................................................................................................. 69
KVD Calibration and Checker Tool....................................................................................... 70
Fast Launch Tab .......................................................................................................... 70
FPGA Booting Process................................................................................................... 71
Simulated LED Results .................................................................................................. 72
Aborting a Program in Progress ..................................................................................... 72
Calibration and Checker Options.................................................................................... 73
Results Summary Display.............................................................................................. 74
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5. Development Environment
CodeGear RAD Studio C++Builder 2007 .............................................................................. 75
Getting started .................................................................................................................. 75
Copying Existing Test Programs .................................................................................... 75
6. Operations Environment
Customer Preferences Tool................................................................................................. 77
Preferences Page ......................................................................................................... 79
Datalog Control Page.................................................................................................... 83
Handler Options Page ................................................................................................... 85
Custom Data DLLs........................................................................................................ 86
STDF Format ............................................................................................................... 86
CSV Format ................................................................................................................. 86
DLL Overview ......................................................................................................... 86
Output File Data Format ............................................................................................... 87
Data Upload Control ..................................................................................................... 88
Engineering Options on the Preferences Tool ................................................................. 88
Message Handling Control............................................................................................. 89
.................................................................................................................................. 89
Updating the Windows Registry..................................................................................... 89
Handler Bin Table Tool....................................................................................................... 90
Handler Bin Table Example ........................................................................................... 91
........................................................................................................................................ 92
Setup File Tool .................................................................................................................. 92
Test Program Launcher ...................................................................................................... 97
Error Checking for Lot Names ....................................................................................... 98
Preferences Flowchart........................................................................................................ 98
Launch Flow Overview................................................................................................ 100
Additional flow details for selecting handlers...................................................................... 101
Examples................................................................................................................... 101
Example 1 ............................................................................................................ 102
Example 2 ............................................................................................................ 102
Example 3 ............................................................................................................ 102
Example 4 ............................................................................................................ 102
then the TELP8MULTIPASS would be the handler that is used. ............................................ 102
Datalogs ......................................................................................................................... 102
Test Time Profiling ..................................................................................................... 104
Summaries...................................................................................................................... 104
Summary Counts Match Physical Device Counts............................................................ 105
Histograms...................................................................................................................... 105
Test Data Analysis ........................................................................................................... 107
Production Operator's Interface ........................................................................................ 107

Production View ......................................................................................................... 108
Engineering View ....................................................................................................... 108
Test Statistics View .................................................................................................... 109
Wafer Map View......................................................................................................... 110
Site Results Data........................................................................................................ 110
Custom Forms............................................................................................................ 111
Test Time Calculations, Displays, and Speed-Up Techniques.......................................... 111
Speed-up Techniques ................................................................................................. 112
Test Time Report Display............................................................................................ 113
Running Yield Display ................................................................................................. 114
Real-Time Yield Alarms ............................................................................................... 115
Yield Alarms and Running Yield Display Tabsheet ......................................................... 116
Site-based Yield Delta Alarms...................................................................................... 116
Last "N" Yield per Site ................................................................................................ 117
Cleared Alarms........................................................................................................... 117
Operator ID ............................................................................................................... 118
Alarm Holdoff And Retriggering Algorithms .................................................................. 119
Production GUI enhancements.......................................................................................... 119
The Wafermap page now has two buttons that allow zooming in and out. Thus the wafer map
can be made larger or smaller..................................................................................... 122
Test Statistics Page Enhancements .............................................................................. 122
Control of statistics page from the program.................................................................. 123
Production GUI RAM and hard disk usage display............................................................... 124
Obtaining Datalogs, Summaries, Histograms, and TDA Files .......................................... 124
Running the Test Program .......................................................................................... 125
Other Custom Tab Sheets - Quick Tool Pull-down Menu ................................................ 125
Voltmeter Memory Plots ........................................................................................ 125
Graphical Histograms ............................................................................................ 126
Conditional Breakpoints......................................................................................... 127
Track Result by Test Number................................................................................. 129
Handler & Prober Configuration and Control ...................................................................... 130
TEL ........................................................................................................................... 130
Additional TEL-TSK Driver Low-level Commands ........................................................... 132
TSK........................................................................................................................... 132
Site-swapping on Multitest 93xx and Aetrium V8 Multisite Handlers................................ 132
Multitest .................................................................................................................... 132
7. DC Instruments
MPDCMOD and MPDCMODHI (Octal DUT Source) .............................................................. 133
MPDCMOD Pictorial .................................................................................................... 133
Functional Description ................................................................................................ 133
Physical Description.................................................................................................... 135
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MPDCMOD Objects..................................................................................................... 135

Force Voltage............................................................................................................. 135
MPDS[i]->setv(value); .......................................................................................... 136
Force Current............................................................................................................. 136
Voltage Ranges .......................................................................................................... 136
Current Ranges .......................................................................................................... 137
Voltage and Current Clamps........................................................................................ 137
Kelvin Connections ..................................................................................................... 138
MPDS[i]->on(); //closes both force and sense ........................................................ 138
MPDS[i]->off(); //opens both force and sense ........................................................ 138
MPDS[i]->off_force(); //opens force only ............................................................... 138
MPDS[i]->off_sense(); //opens sense only.............................................................. 138
MPDS[i]->on_force(); //closes force only................................................................ 138
MPDS[i]->on_sense(); //closes sense only.............................................................. 138
MPDS[i]->local_kelvin(); //shorts F & S locally ........................................................ 138
MPDS[i]->remote_kelvin(); //opens F & S short ...................................................... 138
Administrative Commands........................................................................................... 139
MPDS[i]->loopcomp(0); // 0 = fast, 1 = slower ...................................................... 139
MPDS[i]->remote_groundsense(); ......................................................................... 140
MPDS[i]->local_groundsense(); ............................................................................. 140
Measure .................................................................................................................... 140
MPDS[i]->vmeter(); .............................................................................................. 140
MPDS[i]->imeter();............................................................................................... 140
MPDS[i]->acquire_rate(rate); ................................................................................ 140
MPDS[i]->measvm(numsamples);.......................................................................... 140
ABUS Connection to Digital Pins .................................................................................. 141
MPDS[i]->backplane_con(unsigned condiscon) ....................................................... 141
Other MPDCMOD Functions......................................................................................... 142
MPDS[i]start_measvm(numsamples, delay) ............................................................ 142
MPDS[i]read_measvm(numsamples) ...................................................................... 142
MPDCMOD and HPDCMOD Ranging Lockout................................................................. 143
MP Readback Functions .............................................................................................. 144
MPDS[i]->actual_sample_rate ............................................................................... 144
MPDS[i]->Exists ................................................................................................... 144
MPDS[i]->mpdsirange........................................................................................... 144
MPDS[i] >mpdsloopcomp ...................................................................................... 144
MPDS[i] >mpdsmode ............................................................................................ 144
MPDS[i] >mpdsval ................................................................................................ 144
MPDS[i] >mpdsvrange .......................................................................................... 144
MPDS[i] >ResourceSide ........................................................................................ 145
MPDS[i] >ResourceSlot ......................................................................................... 145
MPDS[i] >result.................................................................................................... 145
MPDS[i] >vmmode ............................................................................................... 145
MPDS[i] >get_board_local_groundsense ................................................................ 145
MPDS[i] >getname ............................................................................................... 145
MPDS[i] >read_temperature.................................................................................. 145
Threshold searching ................................................................................................... 145
User Voltmeter (UVM) ...................................................................................................... 147

MPUVM Objects ......................................................................................................... 148
MP UVM Measure ....................................................................................................... 148
Readback Functions ................................................................................................... 151
MPUVM[i] >getname............................................................................................. 151
Semi-parallel Measurements ....................................................................................... 151
Pinouts ...................................................................................................................... 152
QUVM (Quad User Voltmeter instrument) .......................................................................... 153
Features .................................................................................................................... 153
Block Diagram............................................................................................................ 154
QUVM Specifications................................................................................................... 154
User Voltmeter ..................................................................................................... 154
Configuration Modes ............................................................................................. 155
Common-Mode Voltage Configurations ................................................................... 155
AC Performance.................................................................................................... 155
User Voltmeter Measurement................................................................................. 155
User Voltmeter Measurement Ranges ..................................................................... 155
Voltage References ............................................................................................... 156
Reference Outputs ................................................................................................ 156
Reference Output Ranges...................................................................................... 156
QUVM Functions .............................................................................................................. 157
Group Object Creation ................................................................................................ 157
TQUVMMeasClass* QUVMMCreate(AnsiString name, TQUVMMeasClass* src0, TQUVM-
MeasClass* src1, TQUVMMeasClass* src2, TQUVMMeasClass* src3, TQUVMMeasClass*
src4, TQUVMMeasClass* src5, TQUVMMeasClass* src6, TQUVMMeasClass* src7, TQUVM-
MeasClass* src8, TQUVMMeasClass* src9, TQUVMMeasClass* srca, TQUVMMeasClass*
srcb, TQUVMMeasClass* srcc, TQUVMMeasClass* srcd, TQUVMMeasClass* srce, TQUVM-
MeasClass* srcf)................................................................................................... 157
TQUVMRefClass* QUVMRCreate(AnsiString name, short src0, short src1, short src2, short
src3, short src4, short src5, short src6, short src7,short src8,
short src9, short srca, short srcb, short srcc, short srcd, short srce, short srcf).......... 157
Earlier Code ............................................................................................................... 157
QUVM Measurement Functions ......................................................................................... 158
Functions................................................................................................................... 158
void TQUVMMeasClass::setname(AnsiString __newname)........................................ 158
short TQUVMMeasClass::uvmeter(unsigned vrange)................................................ 158
short TQUVMMeasClass::uvmeterv(double maxvoltage)........................................... 158
short TQUVMMeasClass::uvmmode(unsigned mode) ............................................... 158
double TQUVMMeasClass::measvm(unsigned nummeas) ......................................... 158
unsigned TQUVMMeasClass::start_measvm(unsigned nummeas, unsigned int_ext) ... 158
short TQUVMMeasClass::clock(unsigned extclk, double freq) ................................... 158
short TQUVMMeasClass::con()............................................................................... 158
short TQUVMMeasClass::discon()........................................................................... 158
short TQUVMMeasClass::connect(short conmask) ................................................... 159
short TQUVMMeasClass::groundlo(short con_discon) .............................................. 159
short TQUVMMeasClass::groundhi(short con_discon) .............................................. 159
short TQUVMMeasClass::groundcon(short conmask) ............................................... 159
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short TQUVMMeasClass::calbushi(short con_discon)................................................ 159

short TQUVMMeasClass::calbuslo(short con_discon)................................................ 159
short TQUVMMeasClass::calbuscon(short conmask) ................................................ 159
short TQUVMMeasClass::refconhi(short con_discon)................................................ 159
short TQUVMMeasClass::refconlo(short con_discon)................................................ 159
short TQUVMMeasClass::refcon(short conmask)...................................................... 159
short TQUVMMeasClass::filter(short con_discon)..................................................... 159
unsigned TQUVMMeasClass::plottime() .................................................................. 159
void TQUVMMeasClass::SetSiteMode(bool _sitemode, short site[]) ........................... 159
Calculation Functions.................................................................................................. 159
double TQUVMMeasClass::rms() ............................................................................ 160
double TQUVMMeasClass::minval() ........................................................................ 160
double TQUVMMeasClass::maxval() ....................................................................... 160
double TQUVMMeasClass::fft(unsigned fundbin) ..................................................... 160
double TQUVMMeasClass::swfilter(double filter[]) ................................................... 160
double TQUVMMeasClass::array(unsigned loc)........................................................ 160
double TQUVMMeasClass::magnitude(unsigned bin)................................................ 160
double TQUVMMeasClass::phase(unsigned bin) ...................................................... 160
double TQUVMMeasClass::thd(unsigned fundbin, unsigned numharmonics) .............. 160
double TQUVMMeasClass::snr(double testfreq, double filterfreq).............................. 160
Status Checking Functions .......................................................................................... 160
void QUVMMeasClassExists(void) ........................................................................... 160
AnsiString TQUVMMeasClass::getname() ................................................................ 161
short TQUVMMeasClass::get_range() ..................................................................... 161
double TQUVMMeasClass::get_ranged() ................................................................. 161
unsigned TQUVMMeasClass::get_nummeas().......................................................... 161
bool TQUVMMeasClass::pinactive(void) .................................................................. 161
double TQUVMMeasClass::samplerate() ................................................................. 161
double TQUVMMeasClass::binfreq(unsigned bin)..................................................... 161
unsigned TQUVMMeasClass::freqbin(double freq); .................................................. 161
QUVM Reference Functions .............................................................................................. 161
Functions: ................................................................................................................. 161
short TQUVMRefClass::setv(double value) .............................................................. 161
double TQUVMRefClass::setvd(double value) .......................................................... 161
double TQUVMRefClass::setv_samerange(double value) .......................................... 161
double TQUVMRefClass::setv_samevoltage(double vrange) ..................................... 162
short TQUVMRefClass::setvr(double value, double vrange) ...................................... 162
short TQUVMRefClass::kelvin(short remotelocal) ..................................................... 162
short TQUVMRefClass::con() ................................................................................. 162
short TQUVMRefClass::discon() ............................................................................. 162
short TQUVMRefClass::condiscon(short con_discon)................................................ 162
short TQUVMRefClass::calbus_con(short con_discon) .............................................. 162
short TQUVMRefClass::ramp_init(double vrange,double init,double StepSize, double Ram-
pRate,double LowerLimit, double UpperLimit) ......................................................... 162
short TQUVMRefClass::ramp_exec(void)................................................................. 162
double TQUVMRefClass::set_ramp_stepsize(double step) ........................................ 162
double TQUVMRefClass::set_ramp_rate(double rate) .............................................. 162
double TQUVMRefClass::set_ramp_llimit(double llimit) ............................................ 162
double TQUVMRefClass::set_ramp_ulimit(double ulimit) .......................................... 162
void TQUVMRefClass::SetSiteMode(bool _sitemode, short site[]).............................. 162

void TQUVMRefClass::setname(AnsiString __newname) .......................................... 162
Status Checking Functions .......................................................................................... 162
void QUVMRefClassExists(void) .............................................................................. 162
AnsiString TQUVMRefClass::getname()................................................................... 163
double TQUVMRefClass::get_ramp_stepsize(void) ................................................... 163
double TQUVMRefClass::get_ramp_rate(void)......................................................... 163
double TQUVMRefClass::get_ramp_llimit(void) ....................................................... 163
double TQUVMRefClass::get_ramp_ulimit(void) ...................................................... 163
double TQUVMRefClass::get_setv_value() .............................................................. 163
double TQUVMRefClass::get_range() ..................................................................... 163
unsigned TQUVMRefClass::get_kelvin() .................................................................. 163
short TQUVMRefClass::get_is_con() ....................................................................... 163
short TQUVMRefClass::get_is_calbus_con() ............................................................ 163
External Mux Control Bits............................................................................................ 163
short TQUVMBoard::ExtMux(unsigned mask) .......................................................... 163
unsigned TQUVMBoard::VRefConnect(unsigned dac)............................................... 163
unsigned TQUVMBoard::VRefDisConnect(unsigned dac) .......................................... 163
HPDCMOD (High Power DUT Source) ................................................................................ 164
HPDCMOD Pictorial..................................................................................................... 164
HPDCMOD Support for Low Voltage Rails ..................................................................... 164
Physical Description.................................................................................................... 165
HPDCMOD Objects ..................................................................................................... 165
Force Voltage............................................................................................................. 166
HPDS[i]->setv(value) ............................................................................................ 166
Force Current............................................................................................................. 166
HPDS[i]->seti(value)............................................................................................. 167
Voltage Ranges .......................................................................................................... 167
HPDS[i]->setvr(value, range) ................................................................................ 167
HPDS[i]->vrange(range) ....................................................................................... 167
Current Ranges .......................................................................................................... 167
HPDS[i]->setir(value, range) ................................................................................. 168
HPDS[i]->irange(range). ....................................................................................... 168
Driver Details for Increased Reliability.......................................................................... 168
Voltage and Current Clamps........................................................................................ 168
Kelvin Connections ..................................................................................................... 169
HPDS[i]->on(); //closes both force and sense......................................................... 169
HPDS[i]->off(); //opens both force and sense......................................................... 169
HPDS[i]->off_force(); //opens force only................................................................ 169
HPDS[i]->off_sense(); //opens sense only.............................................................. 169
HPDS[i]->on_force(); //closes force only ................................................................ 169
HPDS[i]->on_sense(); //closes sense only .............................................................. 169
HPDS[i]->local_kelvin(); //shorts F & S locally ........................................................ 169
HPDS[i]->remote_kelvin(); //opens F & S short ...................................................... 169
Administrative Commands........................................................................................... 169
HPDS[i]->reset() .................................................................................................. 170
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HPDS[i]->loopcomp(fast-slow) .............................................................................. 170

HPDS[i]->remote_groundsense();.......................................................................... 170
HPDS[i]->local_groundsense(); ............................................................................. 170
Measure .................................................................................................................... 170
HPDS[i]->vmeter(); .............................................................................................. 171
HPDS[i]->imeter(); ............................................................................................... 171
HPDS[i]->acquire_rate(rate); ................................................................................ 171
HPDS[i]->measvm(numsamples); .......................................................................... 171
Readback Functions ................................................................................................... 171
HPDS[i]->actual_sample_rate................................................................................ 171
HPDS[i]->Exists.................................................................................................... 171
HPDS[i]->hpdsirange ............................................................................................ 172
HPDS[i] >hpdsloopcomp ....................................................................................... 172
HPDS[i] >hpdsmode ............................................................................................. 172
HPDS[i] >hpdsval ................................................................................................. 172
HPDS[i] >hpdsvrange ........................................................................................... 172
HPDS[i] >getname ............................................................................................... 172
Pinouts ...................................................................................................................... 173
Meter Classes .................................................................................................................. 173
Relays and Reliability ....................................................................................................... 173
Relay Matrix Board (RMX) ................................................................................................ 174
Features .................................................................................................................... 174
RMX Block Diagram .................................................................................................... 175
Using the Relay Matrix Class ....................................................................................... 176
RMX Commands......................................................................................................... 177
Other Commands and Readback Syntax....................................................................... 178
RMX0 >Clear ........................................................................................................ 178
RMX0 >CreateNamedConnection ........................................................................... 179
RMX0 >GetLineStatus ........................................................................................... 180
RMX0 >GetLineToLineStatus.................................................................................. 180
RMX0 >GetPinStatus............................................................................................. 180
RMX0 >NClear...................................................................................................... 180
RMX0 >NSet ........................................................................................................ 181
RMX0 >resetall..................................................................................................... 181
RMX0 >resetline ................................................................................................... 181
RMX0 >ResetNamedList ........................................................................................ 181
RMX0 >Set........................................................................................................... 181
RMX I/O Pinout .......................................................................................................... 183
Relay and Connection Commands - non RMX..................................................................... 183
TRelay Constructor ............................................................................................... 183
TRelay -> close .................................................................................................... 184
TRelay -> open .................................................................................................... 184
TConnection Constructor ....................................................................................... 184
TConnection -> con .............................................................................................. 185
TConnection -> discon .......................................................................................... 186
Father Card Class ............................................................................................................ 186
8. Digital Instruments
Important Features.......................................................................................................... 189
Vector JMP Restriction ................................................................................................ 189
Serial Send Memory Restriction ................................................................................... 189
DIGMOD16/32................................................................................................................. 190
Description ................................................................................................................ 190
Features and Basic Specifications ................................................................................ 191
Drive/Compare ..................................................................................................... 192
PMU..................................................................................................................... 192
Pattern Formatting................................................................................................ 192
Block Diagram............................................................................................................ 193
High Speed Link .............................................................................................................. 195
Overview of Digital Test Concepts..................................................................................... 195
Pattern Driving........................................................................................................... 195
Pattern Comparing ..................................................................................................... 198
Send Serial/Capture Memory....................................................................................... 199
Capture Memory ........................................................................................................ 201
Putting It All Together - Pattern and Send/Capture Memory .......................................... 202
Memory Address Sequencer ........................................................................................ 204
Clocking .................................................................................................................... 205
Drive and Compare Voltage Levels .............................................................................. 205
Formats and Edge Timing ........................................................................................... 205
Patterns .......................................................................................................................... 205
DIGMOD Pattern Editor............................................................................................... 206
Input ................................................................................................................... 206
Output ................................................................................................................. 206
Rules ................................................................................................................... 206
Vector Information ..................................................................................................... 207
Mandatory Input Vector Fields ............................................................................... 207
Alternate Drive Format .......................................................................................... 207
Optional Input Vector Fields .................................................................................. 208
Sequencer OpCodes ................................................................................................... 208
Flags ......................................................................................................................... 209
DIGMOD Additional State Characters ........................................................................... 210
Pattern Syntax ........................................................................................................... 211
Timeset Info .............................................................................................................. 212
Fail Disabling ............................................................................................................. 213
Serial/Parallel Send/Receive ........................................................................................ 213
Channel Default ......................................................................................................... 213
Pattern Example......................................................................................................... 214
.sym (Symbol Table) .................................................................................................. 214
DIGMOD Program Structure ............................................................................................. 215
One Time (in SystemInit or LotInit) ............................................................................. 215
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At Least One Time (Location of Your Choice) ............................................................... 215

Every Time (Inside TSeq, the Mainloop Test Sequencer) ............................................... 216
Defining PATDATA...................................................................................................... 216
DIGMOD Pattern Loading into Memory ........................................................................ 217
PATLIST Technique............................................................................................... 217
INI File Technique ................................................................................................ 217
MAP File Technique............................................................................................... 217
KLF File Technique................................................................................................ 218
Loading the pat_list into DIGMOD Memory ............................................................. 218
Data Formats ............................................................................................................. 219
Main Formats............................................................................................................. 219
Other Formats ........................................................................................................... 220
Pin Definition................................................................................................................... 220
Basics........................................................................................................................ 220
Pin Definition & Grouping............................................................................................ 220
Single Pin Naming................................................................................................. 221
Grouping Pins ....................................................................................................... 221
Grouping of Groups............................................................................................... 221
DIGMOD Pin (DMCH) Programming................................................................................... 222
DMCH Pin Programming Functions............................................................................... 222
DMCH[x]->SetSiteMode ........................................................................................ 222
DMCH[x]->enable................................................................................................. 222
DMCH[x]->disable ................................................................................................ 223
DMCH[x]->forcemode ........................................................................................... 223
DMCH[x]->forceenable ......................................................................................... 223
DMCH[x]->force ................................................................................................... 223
DMCH[x]->dlevel .................................................................................................. 224
DMCH[x]->cmplevel.............................................................................................. 224
DMCH[x]->vil ....................................................................................................... 225
DMCH[x]->vih ...................................................................................................... 225
DMCH[x]->vol ...................................................................................................... 225
DMCH[x]->voh ..................................................................................................... 225
DMCH[x]->trm ..................................................................................................... 226
DMCH[x]->trmenable............................................................................................ 226
DMCH[x]->pmuenable .......................................................................................... 226
DMCH[x]->vclamps............................................................................................... 227
DMCH[x]->setv .................................................................................................... 227
DMCH[x]->seti ..................................................................................................... 227
DMCH[x]->irange ................................................................................................. 227
DMCH[x]->vrange ................................................................................................ 228
DMCH[x]->imeter ................................................................................................. 228
DMCH[x]->vmeter ................................................................................................ 228
DMCH[x]->measvm .............................................................................................. 229
DMCH[x]->ldenable .............................................................................................. 229
DMCH[x]->loaddisable .......................................................................................... 229
DMCH[x]->load .................................................................................................... 229
DMCH[x]->dig_con ............................................................................................... 230
DMCH[x]->dig_discon ........................................................................................... 230

DMCH[x]->abus_con ............................................................................................ 230
DMCH[x]->abus_discon ........................................................................................ 231
DMCH[x]->l1abus_con .......................................................................................... 231
DMCH[x]->l1abus_discon ...................................................................................... 232
DMCH[x]->dtiming ............................................................................................... 232
DMCH[x]->dtimingT0............................................................................................ 233
DMCH[x]->dtiming_combine ................................................................................. 233
DMCH[x]->dfmt.................................................................................................... 234
DMCH[x]->dcmp .................................................................................................. 234
DMCH[x]->dcomp................................................................................................. 235
DMCH[x]->tset ..................................................................................................... 235
DMCH[x]->fmt , DMCH[x]->format ........................................................................ 235
DMCH[x]->start.................................................................................................... 235
DMCH[x]->stop .................................................................................................... 236
DMCH[x]->enastart .............................................................................................. 236
DMCH[x]->enastop............................................................................................... 236
DMCH[x]->cmpstart.............................................................................................. 236
DMCH[x]->cmpstop .............................................................................................. 236
DMCH[x]->keepalive............................................................................................. 237
DMCH[x]->dka ..................................................................................................... 237
DMCH[x]->tmucon ............................................................................................... 237
DMCH[x]->measfreq............................................................................................. 238
DMCH[x]->start_measfreq .................................................................................... 238
PMU Comparator Enables............................................................................................ 238
Sequencer Definition........................................................................................................ 240
Basics........................................................................................................................ 240
Sequencer Definition & Grouping................................................................................. 240
Single Board Sequencer ........................................................................................ 240
Grouping Boards................................................................................................... 240
Sequencer Programming .................................................................................................. 240
Sequencer Programming Functions.............................................................................. 241
SEQ0->SetSiteMode.............................................................................................. 241
SEQ0->SetMode ................................................................................................... 241
SEQ0->mclk_sel ................................................................................................... 242
SEQ0->MasterSlave .............................................................................................. 242
SEQ0->SetupMCLK ............................................................................................... 243
SEQ0->dt0t.......................................................................................................... 243
SEQ0->dt0div....................................................................................................... 243
SEQ0->keepalive_timeset...................................................................................... 244
SEQ0->dflags ....................................................................................................... 244
SEQ0->running .................................................................................................... 244
SEQ0->dwait........................................................................................................ 244
SEQ0->dfail.......................................................................................................... 245
SEQ0->cycle_count............................................................................................... 245
SEQ0->status ....................................................................................................... 245
Fail Dump and Read.............................................................................................. 246
SEQ0->set_wait_timeout....................................................................................... 246
14 PN: 73-01003-00, November 2008

SEQ0->get_wait_timeout ...................................................................................... 246

Pattern Management and Execution............................................................................. 247
SEQ0->patloadmap............................................................................................... 247
SEQ0->createpatmap............................................................................................ 248
SEQ0->patload ..................................................................................................... 248
SEQ0->patload_parallel......................................................................................... 249
SEQ0->patload_pformat........................................................................................ 249
SEQ0->patexe ...................................................................................................... 249
Alternate 1: using the pattern index ....................................................................... 250
Alternate 2: using the pattern index and offset ....................................................... 250
SEQ0->patexe_array............................................................................................. 250
SEQ0->patexe_parallel.......................................................................................... 251
SEQ0->getsym ..................................................................................................... 251
SEQ0->dcap_setup ............................................................................................... 251
DIGMOD[x]->dcap_setup ...................................................................................... 252
DIGMOD[x]->dcap_read ....................................................................................... 252
DIGMOD[x]->ddrv_setup ...................................................................................... 252
DIGMOD[x]->ddrv_load ........................................................................................ 252
DIGMOD .pformat Pattern File Structure............................................................................ 253
PFORMAT Pattern Structure ........................................................................................ 253
Loading .pformat Files ................................................................................................ 253
Patlist Structure .................................................................................................... 253
Pattern Loading ......................................................................................................... 253
DIGMOD[x]->patload_pformat .............................................................................. 253
DIGMOD Resource Manager (DMRMan) ....................................................................... 254
The DIGMOD Resource File......................................................................................... 254
Loading the DMResources ini File ................................................................................ 255
Mapping Names to Pins .............................................................................................. 255
Pattern Editor.................................................................................................................. 255
DIGMOD Pattern Editor............................................................................................... 255
Importing pattern files................................................................................................ 261
Exporting pattern files ................................................................................................ 261
DMP File Format......................................................................................................... 261
Logic Analyzer Mode for the DIGMOD Pattern Editor ..................................................... 262
Necessary Steps......................................................................................................... 262
Cautions .................................................................................................................... 263
Logic Analyzer Class User Functions............................................................................. 263
void TlogicAnalyzer::Run(); ................................................................................... 264
RTI Shmoo...................................................................................................................... 267
Shmoo Setup ............................................................................................................. 268
Running Shmoo ......................................................................................................... 269
Printing and Saving ................................................................................................... 270
Delete a Shmoo Chart ................................................................................................ 271
Margin Shmoo Setup .................................................................................................. 271
Running Margin Shmoo .............................................................................................. 272
Printing and Saving a Margin Shmoo ........................................................................... 273

Delete a Margin Shmoo Chart...................................................................................... 274
OLD DIGMOD SHMOO...................................................................................................... 274
X Axis........................................................................................................................ 275
Y Axis........................................................................................................................ 275
Main.......................................................................................................................... 275
General Fields ............................................................................................................ 275
How it Works ............................................................................................................. 277
A Word About the GUI Interface.................................................................................. 277
Other Commands ....................................................................................................... 277
Margin Shmoos .......................................................................................................... 278
DIGMOD RTI Support ...................................................................................................... 279
Time Measurement Unit ................................................................................................... 287
Theory of Operation ................................................................................................... 287
Pinouts ...................................................................................................................... 289
TMU Object ............................................................................................................... 289
TMU Commands......................................................................................................... 289
Data Types Used by the TMU ...................................................................................... 291
TMU Commands......................................................................................................... 291
TMU->ddchan ...................................................................................................... 291
TMU->enable ....................................................................................................... 292
TMU->freq ........................................................................................................... 292
TMU->input ......................................................................................................... 292
TMU->interval ...................................................................................................... 293
TMU->level .......................................................................................................... 293
TMU->meas ......................................................................................................... 293
TMU->meas_array................................................................................................ 294
TMU->meas_neg .................................................................................................. 294
TMU->reset.......................................................................................................... 294
9. AC Instruments
PWS ............................................................................................................................... 295
DSP Library ..................................................................................................................... 295
DSP Class .................................................................................................................. 296
Functions................................................................................................................... 296
DSP Testing on KVD M-Series Test System ........................................................................ 306
Clocking .................................................................................................................... 306
Example .................................................................................................................... 306
Ideal Conditions.................................................................................................... 306
PWD Clock Setup .................................................................................................. 306
DSPIO Clock Setup ............................................................................................... 307
PWS Clock Setup .................................................................................................. 308
The Test Frequency .............................................................................................. 309
16 PN: 73-01003-00, November 2008

Direct Digital Synthesis.......................................................................................... 310

Conclusion ........................................................................................................... 311
Waveform Source ............................................................................................................ 312
Control ...................................................................................................................... 312
WS Connections ......................................................................................................... 313
Pinouts ...................................................................................................................... 314
Waveform Source Commands........................................................................................... 315
WS->start (<waveform>,<frequency>,<amplitude>);............................................ 315
WS->clock (<source>,<destination>);................................................................... 315
WS->init ( ).......................................................................................................... 315
WS->reset ( )....................................................................................................... 316
WS->pllbits ( <numerator>,<denominator>,<divisor>) .......................................... 316
WS -> xclkinfreq (<frequency>);........................................................................... 316
WS->xclkoutfreq (<frequency>);........................................................................... 317
WS->offset ( <ws>,<offset>) ............................................................................... 317
WS->filter (<source>, <filter>)............................................................................. 317
WS->atten (<source>,<attenuation>)................................................................... 318
WS->store_sine20bit (<address>, <length>,<amplitude>,<offset>);...................... 318
WS->store_wave20bit (<wave structure>);............................................................ 318
WS->store_sine16bit_hs (<address>,<length>,<amp>,<offset>)........................... 319
WS->store_ramp20bit (<address>,<length>,<amplitude>,<offset>) ...................... 319
Precision WS ................................................................................................................... 320
PWS Commands .............................................................................................................. 321
Connection ................................................................................................................ 321
Clocking .................................................................................................................... 321
Filter/Level(DC).......................................................................................................... 322
General ..................................................................................................................... 322
PWS Connection Syntax.............................................................................................. 322
PWSx -> con ........................................................................................................ 322
PWSx -> con_to_switch_bus ................................................................................. 322
PWSx -> con_to_cal_bus....................................................................................... 322
PWSx -> con_to_l1 ............................................................................................... 322
PWSx -> con_to_ic ............................................................................................... 323
PWSx -> con_to_agnd .......................................................................................... 323
PWSx -> discon .................................................................................................... 323
PWSx -> discon_from_switch_bus ......................................................................... 323
PWSx -> discon_from_cal_bus............................................................................... 323
PWSx -> discon_from_l1 ....................................................................................... 324
PWSx -> discon_from_ic ....................................................................................... 324
PWSx -> discon_from_agnd .................................................................................. 324
PWS Clocking Syntax .................................................................................................. 324
PWSx -> dds_setup .............................................................................................. 324
PWSx -> dds_reset ............................................................................................... 324
PWSx -> clock_reset ............................................................................................. 325
PWSx -> xclockoutfreq.......................................................................................... 325
PWSx -> xclockinfreq ............................................................................................ 325

PWSx -> clock ...................................................................................................... 325
PWS Filter/DC Syntax ................................................................................................. 326
PWSx -> offset ..................................................................................................... 326
PWSx -> filter....................................................................................................... 326
PWSx -> atten...................................................................................................... 327
PWSx -> setv ....................................................................................................... 327
PWS General Syntax................................................................................................... 327
PWSx -> reset ...................................................................................................... 328
PWSx -> init......................................................................................................... 328
Waveform Digitizer .......................................................................................................... 329
Processing and Control ............................................................................................... 329
WD Connections......................................................................................................... 330
Pinouts ...................................................................................................................... 331
Waveform Digitizer Commands ......................................................................................... 331
WD->start (< source >,<waveform>); .................................................................. 331
WD->clock (<source>,<destination>); .................................................................. 331
WD->init.............................................................................................................. 332
WD->reset ........................................................................................................... 332
WD -> pllbits (<numerator>,<denominator>,<divisor>)......................................... 332
WD->xclkinfreq (<frequency>).............................................................................. 333
WD->xclkoutfreq (<frequency>) ........................................................................... 333
WD->offset (<source>,<offset>); ......................................................................... 333
WD->filter (<source>,<filter>); ............................................................................ 334
WD->gain (<source>,<gain1>,<gain2>)............................................................... 334
WD->lfadc (<adcclock>,<sample rate>)................................................................ 334
WD->hfadc (<sample rate>);................................................................................ 335
Precision WD................................................................................................................... 336
PWD Commands.............................................................................................................. 338
Connection ................................................................................................................ 338
Clocking .................................................................................................................... 338
General ..................................................................................................................... 338
Filter/Level(DC).......................................................................................................... 338
PWD Connection Syntax ............................................................................................. 338
PWDx -> instr_con ............................................................................................... 338
PWDx -> input_con .............................................................................................. 339
PWDx -> instr_discon ........................................................................................... 339
PWDx -> input_discon .......................................................................................... 339
PWD Clocking Syntax ................................................................................................. 339
PWDx -> dds_setup.............................................................................................. 339
PWDx -> dds_reset............................................................................................... 340
PWDx -> clock_reset ............................................................................................ 340
PWDx -> clock_div ............................................................................................... 340
PWDx -> clock ..................................................................................................... 340
PWDx -> clockselect ............................................................................................. 341
18 PN: 73-01003-00, November 2008

PWD General Syntax .................................................................................................. 341

PWDx -> reset ..................................................................................................... 341
PWDx -> start ...................................................................................................... 342
PWDx -> stop....................................................................................................... 342
PWDx -> wait....................................................................................................... 342
PWD Filter/DC Syntax ................................................................................................. 343
PWDx -> offset..................................................................................................... 343
PWDx -> filter ...................................................................................................... 343
PWDx -> gain....................................................................................................... 343
PWDx -> read_wd2000_dc.................................................................................... 343
10. Non-Instrument Software Commands

LOG Object ..................................................................................................................... 345
TLOG ................................................................................................................... 345
LOG->CurTestNum ............................................................................................... 345
LOG->DataToEventLog ......................................................................................... 345
LOG->DisableAlarms ............................................................................................. 345
LOG->EngineeringMode ........................................................................................ 345
LOG->plottestnum ................................................................................................ 345
LOG->SystemMsgToEventLog................................................................................ 346
LOG->ActiveWaferTesting ..................................................................................... 346
LOG->ApplicationName ......................................................................................... 346
LOG->BadDieCount .............................................................................................. 346
LOG->BinFileName ............................................................................................... 346
LOG->Comment ................................................................................................... 346
LOG->ComputerName........................................................................................... 347
LOG->DatalogFileName......................................................................................... 347
LOG->DataPath .................................................................................................... 347
LOG->Default_LOT_DataFileName ......................................................................... 347
LOG->Default_SUBLOT_DataFileName ................................................................... 347
LOG->DUTSN ....................................................................................................... 348
LOG->EnablePrintDatalogFile................................................................................. 348
LOG->EnablePrintHistogramFile ............................................................................. 348
LOG->EnablePrintSummaryFile .............................................................................. 348
LOG->EnablePrintTDAFile...................................................................................... 348
LOG->FileDatalogAll.............................................................................................. 349
LOG->FileDatalogFails........................................................................................... 349
LOG->FileDatalogOff............................................................................................. 349
LOG->FileSampleNum ........................................................................................... 349
LOG->FileSampleSize ............................................................................................ 349
LOG->FirstTestNum .............................................................................................. 350
LOG->FixtureID .................................................................................................... 350
LOG->GoodDieCount ............................................................................................ 350
LOG->HandTestModeActive................................................................................... 350
LOG->Job ............................................................................................................ 350
LOG->LastDatalogString........................................................................................ 351
LOG->LastTestNum .............................................................................................. 351
LOG->LibraryVersion............................................................................................. 351
LOG->LotNumber ................................................................................................. 351
LOG->LotNumber ................................................................................................. 351

LOG->NoDataCollection ........................................................................................ 351
LOG->OperatorID ................................................................................................. 352
LOG->ParameterFileName ..................................................................................... 352
LOG->RuntimeLevel.............................................................................................. 352
LOG->SavedDatalogFileName ................................................................................ 352
LOG->ScreenDatalogAll......................................................................................... 352
LOG->ScreenDatalogFails...................................................................................... 352
LOG->ScreenDatalogOff........................................................................................ 353
LOG->ScreenSampleNum ...................................................................................... 353
LOG->ScreenSampleSize ....................................................................................... 353
LOG->StartedByKVDLauncher................................................................................ 353
LOG->StartLotTime............................................................................................... 353
LOG->StopFF ....................................................................................................... 353
LOG->TesterID..................................................................................................... 354
LOG->UploadDataPath .......................................................................................... 354
LOG->UsingCustomDataDLL .................................................................................. 354
LOG->UsingDeviceHandler .................................................................................... 354
LOG->WaferDescFileName .................................................................................... 354
LOG->WafermapColorsFileName ............................................................................ 355
LOG->WafermapDescFileName .............................................................................. 355
LOG->WaferMapX................................................................................................. 355
LOG->WaferMapY................................................................................................. 355
LOG->WaferNumber ............................................................................................. 355
LOG->WaferTestFlow............................................................................................ 356
LOG->AddLimitUnit............................................................................................... 356
LOG->AddUserComment ....................................................................................... 356
LOG->ClearUserComments .................................................................................... 357
LOG->CurrentBin .................................................................................................. 357
LOG->DatalogComment ........................................................................................ 357
LOG->DeleteWaferData ........................................................................................ 357
LOG->DownGrade ................................................................................................ 358
LOG->ExecuteProgram.......................................................................................... 358
LOG->FindWaferData............................................................................................ 358
LOG->GetLimitsEntry ............................................................................................ 358
LOG->GetPassBinSite............................................................................................ 358
LOG->IsFailing ..................................................................................................... 359
LOG->IsPassing.................................................................................................... 359
LOG->test_fail[tn] ................................................................................................ 359
LOG->IsValidBin ................................................................................................... 359
LOG->load_bin_data............................................................................................. 360
LOG->load_extlimits_data ..................................................................................... 360
LOG->load_limits_data.......................................................................................... 360
LOG->load_waferdesc_file..................................................................................... 360
LOG->load_wafermap_colors................................................................................. 361
LOG->LoadCustomerPrefFile.................................................................................. 361
LOG->TestInProgress ........................................................................................... 361
LOG->UserGenDatalog.......................................................................................... 362
LOG->UserGenHistogram ...................................................................................... 362
LOG->UserGenSummary ....................................................................................... 363
20 PN: 73-01003-00, November 2008

LOG->UserGenTDA............................................................................................... 363
KVD Object ..................................................................................................................... 364
KVD->UserParamFileName .................................................................................... 364
KVD->CalibrateAll ................................................................................................. 364
KVD->CalibrateMenu............................................................................................. 364
KVD->DaysSinceLastCal ........................................................................................ 364
KVD->HoursSinceLastCal....................................................................................... 364
KVD->LoadConfig ................................................................................................. 364
KVD->ReadLauncherString .................................................................................... 365
KVD->ReadParameterString .................................................................................. 365
KVD->SelectView.................................................................................................. 366
KVD->Test ........................................................................................................... 366
KVD->TestNoFail .................................................................................................. 366
KVD->tnum.......................................................................................................... 366
KVD->UserComment............................................................................................. 367
Detailed Specifications 369

KVD M Series Test System Specifications.................................. Revision 1.13 – 12/5/11369
Physical, Power, and Environmental............................................................................. 369
Standard Cabinet size ........................................................................................... 369
Test Head ............................................................................................................ 369
Power .................................................................................................................. 369
Environmental: ..................................................................................................... 369
Release Notes and Updates 371
Custom Father Cards 373
22 PN: 73-01003-00, November 2008

Figures

Figure 1.1: KVD Tools (Programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 1.2: KVD Tools (Debugging) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 1.3: M2 System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 1.4: M2m Cabinet and Manipulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 1.5: Dimensions of the M2m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 1.6: M1 Test Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 2.1: Power Supply Danger Label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 2.2: Brady 65674 Lockout Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 2.3: Hold-down clamp for cabinet leveling feet . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 2.4: ESD Caution Label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 2.5: Protective Ground Identification Label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 2.6: KVD cart with fixed pier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 2.7: Cart External Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 2.8: Tipping calculation for sideways direction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 2.9: Tipping calculation for frontward direction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3. System Hardware
Figure 3.1: Main Cabinet (Large) - M2 system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 3.2: Main Cabinet (Small) - M1m or M2m system - with cart and manipulator . . . . . . 50
Figure 3.3: Power Distribution Unit (Front) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 3.4: Power Distribution Unit (Rear). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 3.5: Remote/Local PDU Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 3.6: Main Power Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 3.7: NEMA L6-20P plug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 3.8: PowerPlus Power Flow Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 3.9: 48V Power Flow Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 3.10:Power Supply TCT Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 3.11:Power GUI Control Tab. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 3.12:Power GUI Status Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 3.13:48V Power Supply Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 3.14:Hypertronics Connector (Male) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 3.15:Hypertronics Female on Fathercard (Close-up) . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 3.16:Keithley 3706-NFP Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 3.17:Keithley 3706 Spec Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 3.18:Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 3.19:M2 Test Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 3.20:M1 Test Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Figure 3.21:Test Head Exploded View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 3.22:Father Card Pictorial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 3.23:Father Card Power Supply Monitor LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 3.24:Coto Relays on the Father Card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4. System Setup
Figure 4.1: Library Installation splash screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 4.2: Install Swappng Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 4.3: Library Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 4.4: KVD Power Control Icon . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 4.5: TCT Screen with Configured Test Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 4.6: Fast Launch Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 4.7: Simulated LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 4.8: Termination Bar. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 4.9: Calibration and Checker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 4.10:Modify Custom Value Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 5.1: The Copy Project Tool screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 6.1: Launching the Customer Preferences Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 6.2: Main Customer Preferences Screen (Misc. control) . . . . . . . . . . . . . . . . . . . . . . 78
Figure 6.3: Customer Preferences Screen - GUI control . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Figure 6.4: Selecting Radio Buttons for Production Page and Site Data Page . . . . . . . . . . . . 83
Figure 6.5: Datalog Control Preferences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 6.6: Handler Options Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 6.7: Custom Data DLL Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 6.8: Data Upload Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 6.9: Preferences Tool - Engineering Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 6.10:Message Handling Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 6.11:Updating the Registry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 6.12:Bin Table Tool Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 6.13:Sample Bin Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Figure 6.14:Launch the Setup File Tool from the Start Menu . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 6.15:Initial Setup File Tool Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 6.16:Setup Files Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 6.17:Job Plan Name and Executable Entered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 6.18:Limits File Chosen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 6.19:Limits File Displayed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 6.20:Saving the Setup File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
24 PN: 73-01003-00, November 2008

Figure 6.21:Saved Setup File Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Figure 6.22:Setup File Tool - Zipped File Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 6.23:Launching the Launcher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 6.24:KVD Test Program Launcher Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 6.25:Entering Operator and Lot Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 6.26:Double-click a program name to launch it . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 6.27:Program Launch Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Figure 6.28: Handler Enabling Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Figure 6.29:Main Production Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 6.30:Engineering View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 6.31:Test Statistics View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 6.32:Wafer Map Main display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 6.33:Changes to Production View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 6.34:Speed-Up Techniques. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Figure 6.35:Bin Trend Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Figure 6.36:Password Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Figure 6.37:Bin Setup Tool. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 6.38:Bin Trend Chart With Legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 6.39:Alarm Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 6.40:Site Data - Bins Per Site . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 6.41:Site Data - Statistics Per Site. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 6.42:Clearing an Alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 6.43:Clearing an Alarm - No Supervisor Required . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 6.44:Vertical Bin Bars in the Standard GUI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Figure 6.45:Bin Count Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Figure 6.46:Bin Count Chart Showing Only Selected Bins . . . . . . . . . . . . . . . . . . . . . . . . . 121
Figure 6.47:Large Font Selected for Readability on Main GUI . . . . . . . . . . . . . . . . . . . . . . 121
Figure 6.48:Large Font Selected for Readability on Statistiscs per Site Table . . . . . . . . . . . . 121
Figure 6.49:Customizing GUI Display Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Figure 6.50:Changes to Test Statistics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Figure 6.51:Test Statistics View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Figure 6.52:Test Statistics - Hidden Tests Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 6.53:Highlight Tests Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 6.54:Values Displayed on Second Status Bar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Figure 6.55:Select Tests to Plot MEASVM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Figure 6.56:MEASVM Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 6.57:Histogram Plot Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 6.58:Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure 6.59:Break on Test Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure 6.60:Runtime Breakpoint Event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Figure 6.61:Break on Failing Test Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Figure 6.62:Runtime Breakpoint Event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 6.63:Track Result by Test Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 6.64:Handler Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Figure 6.65:Prober Engineering Form Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
7. DC Instruments
Figure 7.1: MPDCMOD Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Figure 7.2: MPDCMOD DC Sources and UVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Figure 7.3: MPDCMOD Block Diagram With Software Commands . . . . . . . . . . . . . . . . . . . 134
Figure 7.4: Test Head Motherboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Figure 7.5: MPDCMOD User Voltmeter With Software Commands . . . . . . . . . . . . . . . . . . . 147
Figure 7.6: MPDCMOD I/O Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Figure 7.7: Quad Precision Sampling Voltmeter (QUVM) Instrument . . . . . . . . . . . . . . . . . 153
Figure 7.8: QUVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Figure 7.9: HPDCMOD Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 7.10:HPDC Module Block Diagram with Software Commands . . . . . . . . . . . . . . . . . . 165
Figure 7.11:HPDCMOD I/O Pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
Figure 7.12:Relay Matrix (RMX) Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Figure 7.13:RMX Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Figure 7.14:RMX I/O Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Figure 8.1: DIGMOD 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Figure 8.2: DIGMOD 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Figure 8.3: DIGMOD Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
Figure 8.4: Pin Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
Figure 8.5: Digital Drive Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
Figure 8.6: Digital Drive Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
Figure 8.7: Compare Pattern Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
Figure 8.8: Serial Send Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Figure 8.9: Serial Capture Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Figure 8.10:Memory Banks in the DSPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Figure 8.11:Pattern RAM Memory Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Figure 8.12:Timing Diagrams of the Various Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Figure 8.13:Pattern Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Figure 8.14:DIGMOD Library Debug Display. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
Figure 8.15:Main DM Pattern Editor screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
Figure 8.16:Logical Group Vector States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
Figure 8.17:DM Pattern Editor Graphical View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
Figure 8.18:DM Pattern Editor Format View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Figure 8.19:Help Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Figure 8.20:Import Status Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Figure 8.21:Logic Analyzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
Figure 8.22:Results for Pins of Interest . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265
Figure 8.23:Use the Span and Position Sliders to Adjust Resolution . . . . . . . . . . . . . . . . . . 266
Figure 8.24:Results Shown in the DM Pattern Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Figure 8.25:Real Time Interface WIndow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
Figure 8.26:Title of New Shmoo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
Figure 8.27:Running the Shmoo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
Figure 8.28:Margin Shmoo Tab. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
Figure 8.29:Multiple Charts, Active Chart Top. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Figure 8.30:Running Margin Shmoo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Figure 8.31:Schmoo Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
26 PN: 73-01003-00, November 2008

Figure 8.32:SHOW CHANS Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

Figure 8.33:CONFIG Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 280
Figure 8.34:LEVELS Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Figure 8.35:TIMING Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
Figure 8.36:PMU Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
Figure 8.37:FREQ Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
Figure 8.38:SEQUENCER Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285
Figure 8.39:TMU Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
Figure 8.40:TMU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288
Figure 8.41:TMU I/O Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Figure 8.42:Test Head Motherboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
9. AC Instruments
Figure 9.1: Simplified PWD, Single Channel, Clock Relationships . . . . . . . . . . . . . . . . . . . . 307
Figure 9.2: Simplified PWS, Single Channel, Clock Relationships . . . . . . . . . . . . . . . . . . . . 308
Figure 9.3: Waveform Source Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
Figure 9.4: WS Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Figure 9.5: WS I/O Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
Figure 9.6: Precision Waveform Source Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Figure 9.7: WS2000 Precision Waveform Synthesizer Block Diagram . . . . . . . . . . . . . . . . . 321
Figure 9.8: Waveform Digitizer Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Figure 9.9: WD Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Figure 9.10:Waveform Digitizer Hypertronics Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
Figure 9.11:Precision Waveform Digitizer Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
Figure 9.12:WD2000 QUAD Audio Digitizer Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . 337
10. Non-Instrument Software Commands
28 PN: 73-01003-00, November 2008

About this Document

The M-Series Test System Windows Programming and Operations document is intended to be a single
reference for this model of KVD ATE system operating under System Software 5.0.5 and higher. It is not
designed to be an in-depth reference for the semiconductor ATE universe, nor should it be used to gain an
expert knowledge of mixed-signal DSP principles. Other resources will be pointed out for obtaining this
knowledge.
The target audience is experienced semiconductor test engineers transitioning from the ATE systems of
other vendors, who are already familiar with test concepts such as digital test techniques, precision analog
measurement systems, and grounding issues peculiar to ATE.
On the maintenance side, service personnel must have working knowledge of good ESD practices, careful
mechanical adjustment and replacement techniques, and the willingness to perform thoughtful
troubleshooting flowcharts if necessary to discover the root cause of problems.
Where to Look for Online Help and Tools

Always look under the Start menu for various "How To Documents" and Tools. The latest information is
distributed on-line in this way with new library software releases, as well as emailed to registered customer
addresses. To join this list, please send an email to service@kvdco.com with your request.
The most useful programming tools are located under the Start menu->Programming Tools
Figure 1.1: KVD Tools (Programming)
Programming and Operations Introduction and Overview
Here are some Debugging Tools:
Figure 1.2: KVD Tools (Debugging)
This KVD document will also be available in PDF format, either on the individual system or on your
company's servers, according to your administrator's preferences.
Quick-Start Guide
There is a generic (blank) test program shell available to quickly begin with a compilable job plan. Read
about it in Chapter 6, and you can soon be exploring the debugging environment and production GUI
displays. Your development group may also have its own custom test program template, with specialized
functions to make your job easier. Consult with administrators or your manager.
Nomenclature
The following is a list including several more common acronyms and terms used in this document which
may be unfamiliar.
• KVD - Kundrouf / Veitas / deHollan, the last names of the founders of KVD Company
• ATE - Automatic Test Equipment
• DUT - Device Under Test
• DSP - Digital Signal Processor/Processing
• PDU - Power Distribution Unit
• DIN - Deutsches Institut für Normung (European standards institute referenced for instrument and
motherboard connectors)
• Hypertronics - Manufacturer of the low resistance, two-piece connectors used in various locations,
especially in the test head.
• IDE - Integrated Development Environment
• DLL - Dynamically Linked Library (software program only usable by other programs, and only loaded if
required - thus saving resources such as load time and memory space)
• GUI - Graphical User Interface
• CodeGear - Vendor of RAD Studio 2007, the KVD software and debugging environment
• PCIDIS - Personal Computer Interface - Digital Interface Standard. The acronym of the KVD serial bus
to PCI interface board, located in the CPU.
30 PN: 73-01003-00, December 2011

Introduction and Overview Warnings and Cautions
• DISCONT - Digital Interface Standard - Controller. The acronym of the KVD serial bus interface to test
head instrument interface board, located in the test head.
Warnings and Cautions
Warning! Maintenance Instructions described in this document are for use by trained and qualified staff
only. To avoid risk of personal injury or hazard to human life, do not open covers, remove
safety interlocks, or troubleshoot any items with the AC power turned on. These Warnings and
this document are not represented to document all possible or foreseeable hazards
associated with test equipment of this class, and there is no substitute for personal common
sense for risk avoidance.
Caution! All electronic equipment, including your KVD Test System, contains items which can be
damaged or latently degraded by Electro-Static Discharge (ESD). You will enjoy a longer and
more satisfying relationship with your equipment if you always practice safe ESD techniques.
This includes personal grounding systems (wrist strap or conductive foot-wear), static-safe
workstations for handling maintenance items, and the constant use of static-proof packaging
and shipping materials for all electronic items.
System Overview
KVD offers a number of system configurations and cabinet styles to accommodate customer requirements.
In general, the M1 system includes a test head with fewer instrument slots (10), while the M2 test head can
hold up to 20.
System Software 5.0.5 or Higher —M-Series Test System Programming and Operations 31
Figure 1.3: M2 System
There are various packaging and cabinet options. The standard M2 cabinet is pictured above. There is
room for an additional 7" of rack-mounted equipment at the lower front part of this cabinet.
For test floors with space challenges, KVD offers the M2m system, with integrated manipulator and a
cabinet with no additional rack space.
32 PN: 73-01003-00, December 2011

Introduction and Overview System Overview
Figure 1.4: M2m Cabinet and Manipulator
Figure 1.5: Dimensions of the M2m
The M1 test head is pictured here.
Figure 1.6: M1 Test Head
Feature Summary
The M-Series Mixed Signal Test System is designed to test high volume, low to medium pin count
consumer Mixed Signal semiconductor ICs. The system contains analog and digital instrumentation
integrated into a test head, and design features to maximize throughput.
The system can be configured to address various types of devices: RFID, SmartCard, Automotive,
Standard Linear and Mixed Signal, Image Sensors, Audio Processors and RF devices.
A tightly-integrated laser trim interface is available, with communication over a dedicated Ethernet
connection to enhance robustness and reduce message latency.
Testing multiple devices on one system in parallel dramatically reduces the cost of test for devices with
short test times. The system software handles the multi-site nature of testing, freeing the test engineer
from the complexities of such multi-site testing. The M-Series Mixed Signal Test Systems include:
• Multi-Site Architecture
• Inherently Low-Noise Floor Design
• Windows Production Software Interface
• C++ Test Language and Development Environment
• Mixed Signal Digital Pins with Send/Capture Memory
34 PN: 73-01003-00, December 2011

Introduction and Overview Device Families Tested on the KVD M-Series
• Range of DC Source/Voltmeters
• Time Measurement Unit
• Waveform Synthesizers/Digitizers
• Optional Instruments designed for specific applications
Device Families Tested on the KVD M-Series

Industrial
Comparators
ADC
RFID
DAC
Smart Cards
Analog Switches
VREG
VREF
Alarms
Power Drivers
Embedded Microcontrollers
PWM
Phase Locked Loops
Sense Amps
Oscillators
Telecommunications and Interface

Line Cards
SCSI Terminators
Codecs
Passive Terminators
Modems
DTMF
SLIC
ISDN
Cellular Telephones
Mobile and Portable Radio
Automotive
Electronic Ignitions
Anti-Skid Braking
Electronic Fuel Injection
Electronic Power Train
Temperature Controlled Oscillators
Engine Control
Electronic Motor Controllers
Remote Keyless Entry
Garage Door Openers
36 PN: 73-01003-00, December 2011

Safety Statement
The general safety information in this summary applies to Operators, Test Engineers and Maintenance
Personnel.
Warning! Only trained and qualified personnel should work on the equipment documented in this
manual. To avoid risk of personal injury, limit your maintenance or operations activities to
those described in this document unless you are trained to do additional tasks.
Warnings and Cautions
Caution! Statements indicate that conditions are present that could result in damage to the test
equipment or other property.
Caution! All electronic equipment, including your KVD Test System, contains items which can be
damaged or latently degraded by Electro-Static Discharge (ESD). You will enjoy a longer and
more satisfying relationship with your equipment if you always practice safe ESD techniques.
This includes personal grounding systems (wrist strap or conductive foot-wear), static-safe
workstations for handling maintenance items, and the constant use of static-proof packaging
and shipping materials for all electronic items.
Warning! Statements identify conditions or operations that could result in

injury or loss of life
Warning! Maintenance Instructions described in this document are for use

by trained and qualified staff only. To avoid risk of personal injury
or hazard to human life, do not open covers or troubleshoot any
items with the AC power turned on.
Danger! Statements indicate a personal injury hazard immediately

accessible.
Programming and Operations Safety and Regulatory Summary
Operator Safety
The general safety information presented in this summary is meant for operators, test engineers and
service personnel. Specific warnings and cautions will be found where they apply, but may not appear in
this summary.
Maintenance Personnel Safety
General Working Safety

The maintenance of KVD equipment can expose the service person to hazardous voltages, particularly
when adjusting the system power supplies. Only authorized and trained personnel should work on KVD
equipment.
Shock Hazards Contained in the Test System

The test system Power Supply Assembly contains various power supplies and control circuit elements
where hazardous AC voltages may be present.
Figure 2.1: Power Supply Danger Label
The CPU contains a certified and sealed power supply assembly, not user-maintainable. No energy of a
hazardous nature comes out of this assembly.
The calibration meter is also a non-maintainable assembly, with no hazardous voltages appearing at its
terminals.
The KVD test system test head assembly, likewise, contains no hazardous voltages according to ANSI
definitions. All voltages present are less than 30V RMS, 42.4V peak, or 60 VDC, so there are no interlocks
or other required cutoff circuits.
Lockout/ Tagout
38 PN: 73-01003-00, December 2011

Safety and Regulatory Summary Safety Statement
When servicing any KVD equipment at a customer site, all local lockout and tagout procedures must be
obeyed. If stanchions and/or placards need to be erected to protect personnel, contact the local test
manager. Personal safety should never be compromised when working on equipment.
The KVD Test System has as an optional lockout/tagout device, Brady part number 65674. Please contact
your local KVD sales representative or factory Customer Support staff if you need this device and do not
have access to a supplier local to you. One will be provided at no charge.
Figure 2.2: Brady 65674 Lockout Device
This device shall be installed surrounding the AC power cord male plug according to the your logout/tagout
procedures, and secured with an approved lock mechanism.
When the Brady 65674 is installed, the male power plug cannot be inserted into any source of AC power,
and no part of the KVD test system will present an electrical hazard to maintenance personnel.
A typical lockout/tagout procedure is as follows, but each customer facility is responsible for its own
procedure to be followed by their personnel.
A recommended lockout/tagout sequence is as follows:
Notify all affected employees that a lockout/tagout system is going to be utilized and the reason why.
If the test system is operating, shut it down by the normal stopping procedure (shut down computer using
the normal method
1. select the START menu

2. select SHUT DOWN command
3. confirm SHUT DOWN command

4. then wait for the computer to halt
5. then turn off the MAIN POWER SWITCH on the Power Distribution Unit
6. Ensure the MAIN POWER SWITCH is turned to the OFF position.
7. Remove the AC power cord from its source of power.
8. Install the Brady 65674 device around the male connector on the power cord.
9. Lockout and/or tagout the Brady 65674 device with assigned individual lock(s) /or tag(s).
10. After ensuring that no personnel are exposed, the following actions must be taken:
11. Operate the MAIN POWER SWITCH to verify that energy isolation has been accomplished and the
test system does not turn on.
12. Caution: Return the MAIN POWER SWITCH to the OFF position after the test.
13. Check the elements of the system that require maintenance by the use of test instruments and/or
visual inspection to verify that energy isolation has been accomplished. Stored energy may persist
inside the various power supplies (especially the CRT monitor) for a few minutes. Wait until the
discharge of this energy until opening the monitor housing or power supply covers.
14. The equipment has now been locked/tagged out.
Release from lockout/tagout:

• Before lockout/tagout devices are removed and energy is restored to the equipment, procedures
shall be followed and actions taken by the authorized employee(s) to ensure the following:
• Tools, debris and other items have been removed from the equipment.
• All employees have been safely positioned or removed.
• All covers and access panels have been replaced.
• Each lockout/tagout device shall be removed from each energy isolating device by the employee
who applied the device.
Seismic safety
Figure 2.3: Hold-down clamp for cabinet leveling feet
The owner must install the included four hold-down clamps after the system is placed in its final position,
over the leveling feet and into suitable floor anchor points, for seismic safety against system movement.
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Safety and Regulatory Summary Electrostatic Discharge
Maintenance: Lithium Battery Caution
Warning! Operators may not change or replace the battery described in this section of the Chapter. To
avoid risk of personal injury or hazard to human life, do not open covers or troubleshoot any
Warning! There is a risk of an explosion if the battery on the CPU motherboard is replaced with an
incorrect part number.
Replace only with the same, or an equivalent, item as recommended by the CPU motherboard
manufacturer, when the battery life is exceeded and the CPU on-board clock no longer keeps
time properly when the CPU power is shut off. Dispose of used batteries according to the
manufacturer's instructions, or return to KVD for proper disposal.
Electrostatic Discharge
Electrostatic Discharge (ESD) can occur whenever proper procedures are not followed. Static voltages as
low as 25V can cause catastrophic or latent failures in semiconductor devices, so proper grounding is
essential to safe handling of these devices. A conductive wrist or heel strap should always be used when
handling boards, and these straps should be checked regularly to insure that they are working properly,
and replaced when defective. System circuit boards should be properly transported in static shielded bags,
and only removed from their packaging at static safe workstations.
The KVD test head includes a standard grounded banana jack, for connecting an operator or maintenance
staff ESD straps.
Figure 2.4: ESD Caution Label
Protective Grounding
The test system is grounded through the protective grounding conductor of the power cord. To avoid
electrical shock the grounding conductor must be connected by the customer to a properly-wired
receptacle.
The test system cabinet is attached to protective (earth) ground by means of a green/yellow wire
connected from the cabinet frame to the grounding terminal of the Power Distribution Unit. The attachment
points for this wire are marked with the following symbol at each end:
Figure 2.5: Protective Ground Identification Label
Do not operate the test system without this wire being attached securely at each end.
Short Circuit Current Rating (SCCR)

All KVD M-series test systems are powered by an AC flexible cord, connected to a customer-supplied
receptacle. The system end of the cord connects to a Pulizzi Engineering, Inc. PDU (Power Distribution
Unit) using an Airpax circuit breaker as the main disconnect element. Under these conditions, the SCCR of
the equipment is 5000A (5kA).
Ergonomic Statement
The KVD M-Series Test System includes the equipment cabinet, the test head, a flat panel monitor,
keyboard, and mouse. Since each customer's test floor environment is unique, KVD does not provide a
work surface or seating for the operations or programming personnel. Thus it is up to the customer to
provide ergonomic accommodation for the user, terminal, keyboard, and mouse, to satisfy SEMI standard
S8-0999.
Chemicals
There are no relevant chemicals involved with the operation, manufacture, or maintenance of this
equipment. Various parts of the test head that come into contact with contaminants may need cleaning,
and the choice of method and cleaning materials is left to the discretion of the customer.
42 PN: 73-01003-00, December 2011

Safety and Regulatory Summary Decommissioning
Decommissioning
KVD believes there are no current restrictions on the disposal of materials used in the construction of the
M-Series test system, and there are no process liquids or gases involved in the operation of the system. If
requested, KVD will accept the entire system returned to the company for disposal after its
decommissioning.
Ionizing Radiation
This system has no ionizing radiation hazards.
Optional Manipulator Cart

The M-Series Test Systems may include an optional test head manipulator. It is manually-operated (non-
motorized) and includes a crank handle for vertical movement, and a friction handle to allow or stop
rotational movement.
Figure 2.6: KVD cart with fixed pier
Design Specifications
Do not exceed 20 KG load

The manipulator is designed for the maximum weight of a fully-configured test head, instruments, father
card, DUT board, and associated cables, which is 20KG.
Warning! Do not add external equipment, cables, or hardware to this assembly
Operation
• Rotate the crank handle clockwise to raise the test head and rotate it counterclockwise for lowering.
• Loosen the friction handle by turning it counterclockwise, then move the test head manually to the
desired rotational angle, then retighten the handle by turning it clockwise.
Inspection
Once per year, all accessible bolts and screws should be inspected for looseness, and retorqued to 80
inch-pounds.
Maintenance
If binding is noticed in the crank handle, as indicated by requiring more than 200 inch-pounds of torque to
lower or raise the test head platform, the access cover on top should be removed, and the internal bevel
gears lubricated with a quality silicone grease lubricant such as Loctite® Silicone Lubricant #51360.
Seismic Mounting Considerations

The test system cabinet is designed to be permanently mounted to the floor after installation, if required by
local code. The wheeled casters are for ease of locating the system, and upon locating in its final position,
must be locked by raising the large lever on the caster using ones toe. The system base plate is designed
to be locked to the floor with seismic brackets supplied by the customer.
44 PN: 73-01003-00, December 2011

Safety and Regulatory Summary Seismic Mounting Considerations
Footprint drawings and seismic calculations required by SEMI S2-0200 are included here.
Figure 2.7: Cart External Dimensions
Side view of the Manipulator

Center of gravity is located at the crosshairs
The angle at which the Manipulator tips over on its back end is: 46.7°
The angle at which the Manipulator tips over on its front end is: 24.1°
Figure 2.8: Tipping calculation for sideways direction
46 PN: 73-01003-00, December 2011

Safety and Regulatory Summary Seismic Mounting Considerations
Front view of the Manipulator

The angle at which the Manipulator tips over on its left end is: 22.9°
The angle at which the Manipulator tips over on its right end is: 26.4°
Figure 2.9: Tipping calculation for frontward direction
48 PN: 73-01003-00, December 2011

3. System Hardware
The Test System Cabinet contains the AC PDU, DC Power Supply Assembly (some models), CPU, and
the Calibration Meter.
The Test Head contains the test instrument boards, the motherboard, and the device-specific Fathercard.
An optional test head manipulator, if present, will be integrated as part of the main cabinet’s cart
The cabinets come in two sizes, depending on the customer’s requirement for additional 19” rack
equipment.
Figure 3.1: Main Cabinet (Large) - M2 system
Programming and Operations System Hardware
Figure 3.2: Main Cabinet (Small) - M1m or M2m system - with cart and manipulator
AC Power Distribution Unit (PDU)

This unit is located at the top of the Cabinet, and contains the main AC circuit breaker on the front edge.
Figure 3.3: Power Distribution Unit (Front)
The rear surface holds a multiple power output strip for the various system elements, and the single power
input connector.
Figure 3.4: Power Distribution Unit (Rear)
The Remote/Local PDU Switch is a feature for possible ganging of multiple PDUs. It is presently not used,
and the switch should always be in the LOCAL position. If it is not, the PDU will not power up and the test
system will not operate.
50 PN: 73-01003-00, December 2011

System Hardware AC Power Distribution Unit (PDU)
Figure 3.5: Remote/Local PDU Switch
This unit is sealed and needs no user maintenance. The unit contains a main breaker, line filter, surge
protection, and a remote control relay board for possible master/slave power distribution design.
Danger! The PDU is never to be opened with the AC Power cord attached. Hazardous voltages are
present within.
Figure 3.6: Main Power Switch
The Main Power Switch also serves as the Emergency OFF control for the system. The circuit breaker
being used has a 5,000 Amps A.I.C. (Amperes Interrupting Capacity) when connected to the customer
supplied external circuit breaker or fuse panel. It is required by all jurisdictions that cord-powered
equipment such as the KVD test system be protected by an external overcurrent protection device.
The test system requires a protected circuit rated at 16 Amps of 100-240VAC single-phase power., 50 or
60 Hz. The customer must provide overcurrent protection in the form of a circuit breaker or fuse to satisfy
all local regulations.
Warning! The mains disconnecting device is the cord plug, so the installation MUST provide for easy
access to the plug and owner-supplied receptacle for disconnection
The AC Power cord is a flexible assembly that extends from the upper rear of the cabinet a minimum of
four feet (122 cm) . The male cord end plug is a NEMA L6-20P standard
Figure 3.7: NEMA L6-20P plug
DC Power Control and Flow

There are two configurations of instrument power supplies: PowerPlus ( a separate rack-mounted cabinet)
and a 48V version (built into the CPU cabinet), usually used with M1 test systems.
The CPU controls the Power Supply, so it can be powered on and off by software command. The Test
Head also contains a power switch that can override the software control to shut the DC power OFF.
The Calibrator measurement lines are routed through a test head cable for convenience.
52 PN: 73-01003-00, December 2011

System Hardware DC Power Control and Flow
Figure 3.8: PowerPlus Power Flow Block Diagram
Figure 3.9: 48V Power Flow Block Diagram
Nomenclature of DC Power Wiring
In the KVD tester, positive voltages are preceded with a P, and negative with an N. Examples: P5V (for +5
V), N12V (for -12 V)
If the voltage has a decimal point, as in 5.2 V, it is written as 5P2 to ensure that the decimal point is not lost
in multi-generational copying. Example: N5P2V (for -5.2 V)
A supply used for analog circuits (with lower noise requirements than digital circuits) will have the suffix F,
standing for "filtered". Example: N15VF (for -15 V filtered)
The high voltage rails used for various circuits are called PHV and NHV, for positive HV and negative HV
respectively. Voltages on these rails is dependent on the tester configuration, but is usually from -20 V to
+40 V maximum.
54 PN: 73-01003-00, December 2011

System Hardware Power Plus Power Supply
Power Plus Power Supply
Choosing the Proper Power Supply in the TCT
This will normally be done at system configuration time, but if needed for lower power dissipation in the
instruments, may be changed as needed by the test engineer. The high voltage 40V rail may be lowered to
24V or 16V. The typical choice is the "PW" mode which sets 40V as the rail.
Figure 3.10: Power Supply TCT Selection
Power Plus (Multi-output Switcher Power Supply) and Power GUI
Power Supply GUI

The Test Head power is controlled by two paths - one is a physical switch on the test head - the other is a
software GUI. If not visible on the dicplay, you can launch it from the START menu. Click it on and off as
required.
Note: The test head power must be turned off when installing or removing DUT boards, which also
interrupts power to test head instruments. This requires re-initializing the test head, a quick
process that happens automatically before testing or debugging can begin.
Figure 3.11: Power GUI Control Tab
Figure 3.12: Power GUI Status Tab
48V Power Supply

The 48V supply configuration uses a control GUI without a status readback tab, being a simpler design.
The switching supply is contained within the CPU cabinet using its own separate AC power cord and
labeled switch on the front of the CPU cabinet, and a single shielded cable to the test head. Within the test
head is a multiple-output DC-DC converter board. This design reduces complexity and radiated noise.
56 PN: 73-01003-00, December 2011

System Hardware 48V Power Supply
Figure 3.13: 48V Power Supply Board
Hypertronics
Figure 3.14: Hypertronics Connector (Male)
Hypertronics are very low resistance and reliable connectors used on the top edges of the KVD
instruments to connect to the father cards. The male pins are on the instruments, and you must use care in
handling them to avoid bent pins. They are brittle and do not often bend straight without micro-fracturing,
thus reducing their life.
Figure 3.15: Hypertronics Female on Fathercard (Close-up)
The female receptacle is the secret to their low resistance, having a hyperbolic arrangement of tiny wires,
so the male pin is touched in multiply redundant places, instead of the usual 2-4 point contacts by a fork
connector. They can accommodate a few millimeters of engagement depth variation as well, so the father
card connections have more reliability than the typical pogo pin contacts.
Calibration Meter
Figure 3.16: Keithley 3706-NFP Meter
Alternate Calibration Meters
Optionally, KVD offers support for Keithley 2000, 2002, and HP/Agilent 3458A DMMs. The cal meter in use
must be selected in the TCT. All other functions for meter operation during calibration and checkers are
automatic.
Keithley Capabilities and Specifications
The 3706 meter is provided with remote software control via Ethernet on a dedicated CPU port, for speed,
and without a manual front panel, for savings of cost and complexity. Other models are controlled by GPIB.
The Keithley uses three inputs for calibration: voltage high and low inputs and a current input.
These three wires create the calibration bus which is routed from the test head to the meter. The
instrument resource which is to be calibrated is connected to the calibration bus and the meter is
manipulated via its programming language to make the appropriate measurement.
The meter acts as a NIST traceable calibrator for the instrumentation in the test head. For detailed
accuracy and drift characteristics, please see the Keithley documentation, available on-line or from KVD
customer support.
Measure Capabilities DC voltage and current

AC voltage and current
Resistance, Frequency
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System Hardware Test Head
Resolution 7 1/2 digits
Long term accuracy 40 ppm (voltage)
Figure 3.17: Keithley 3706 Spec Summary
Calibration
Figure 3.18: Calibration
This is the diagram of the cal bus path from the test head motherboard to the Keithley DMM. The return
side of the cal bus is connected to Analog Ground in the Test Head or may be set floating.
Test Head
The test head is the second of the two major components of the test system. It contains all of the test
instruments that directly drive and measure the device under test. All instruments connect to a common
backplane (called the "Motherboard") which provides the power supply rails and data I/O ports.
The M2 Motherboard is partitioned into two symmetrical sets of 11 slots, for 22 total (21 available for
instuments), called sides. SIDES are designed into the unit for convenience, but have nothing to do with
the software concept of testing SITES, of which the KVD can handle 32. The M1 test head has 11 slots, of
which 10 are available for instruments.
Opposite the Motherboard, each test instrument has at least one Hypertronics connector that provides I/O
access to the device under test through a board called the Fathercard.
The Fathercard is similar to the DUT interface boards used on other types of ATE equipment except that it
contains serial interface controlled relay driver ICs used to open and close the relays. Instruments that can
populate the test head include various DC sources and measurement systems, a set of digital subsystem
modules, waveform generator and digitizing cards, relay matrix, and other custom modules as required.
60 PN: 73-01003-00, December 2011

System Hardware Test Head
Figure 3.21: Test Head Exploded View
Father Cards
Figure 3.22: Father Card Pictorial
The test head Father Card serves as the device interface board between the device under test and the test
head resources. It mounts on top of the test head modules (opposite the motherboard) and connects to the
instrumentation resources through the Hypertronics connectors located on top of each of the
instrumentation modules.
Each Father Card has unique signal connections for each test device and often contains numerous relays
for complex connection schemes. The DC source outputs from the MPDC Module are often routed through
networks of Father Card relays to create a matrix-like environment allowing for great flexibility in source
and voltmeter connections. Digital I/O connections are typically routed directly to the device but may be
connected to any point on the Father Card. However, for ease of troubleshooting, many designers route
digital channels through isolation relays.
Relay driver ICs are located on-board the Father Card to provide the voltage necessary to the energize the
relay coils. The relay driver ICs are controlled by serial bus lines generated on the DISCONT board.
This is a more efficient use of interconnect pins than the normal ATE architecture of having a separate
relay driver board requiring one interconnect pin per relay driver.
62 PN: 73-01003-00, December 2011

System Hardware Father Cards
When allocating resources the Father Card can be configured with great flexibility. The DC source and
measurement resources within a test program typically require the greatest connection flexibility. This is
achieved on the Father Card by setting up several "resource buses". These connection networks are
created from a number of matrix lines. Generally, one line is allocated for each DC source or measurement
front end such as the UVM.
All resource or device pin connections made to the resource bus are through relays located on the Father
Card or a RMX Relay Matrix. This allows complete isolation of the resource bus from all Father Card
locations. On the resource side, the bus wire is assigned a DC source connection and, in most cases, a
voltmeter connection. Device pin connections are then allocated to each bus after consideration of the DC
needs they will require. It is common to connect device pins to more than one resource bus to allow for
various connection schemes.
Within the test program, resources are connected and removed from the resource buses as the need
arises. When source or measurement connection to a device pin is required, all other pins can be
removed. Device supply and reference pins are often the lone device pins on a given resource bus in
cases where the device under test requires a supply rail.
DC Power Wiring
Figure 3.23: Father Card Power Supply Monitor LEDs
DC Power is connected to the Fathercard through dedicated Hypertronics pins as follows:
On an M1 test head: From the DISCONT board (always slot 0)

• P5V (+5 V)
• N5P2V (-5.2 V)
• P12V (+12 V)
• P12VF (+12 V Filtered)
• P15V (+15 V)
• N5VF (-5 V Filtered)
• N15V (-15 V)
• P5VF (+5 V Filtered)
• N12VF (-12 V Filtered)
• PHV (Positive High Voltage) typically +40 V
• NHV (Negative High Voltage) typically -20 V
On an M2 test head, the power supplies may be split between the DISCONT and MPDCMOD0 (the first
MPDCMOD instrument in the test head).
KVD Fathercard designs typically include monitoring LEDs and test points for all DC power supplies to aid
in quick troubleshooting.
Maintenance: Fuses
Warning! Operators may not change or replace any fuses described in this section of the Chapter. To
avoid risk of personal injury or hazard to human life, do not open covers or troubleshoot any
Besides fuses in the Power Supply Assembly in the main test system cabinet, these DC supplies are also
fused on the DISCONT, to reduce the risk of Hypertronics pin and Fathercard PC damage in case of
accidental short circuits.
Note: The fuses on the DISCONT are 4 Amp, to reduce nuisance opening. That way, since the father
card fuse is a lower value, it will open preferentially before the instrument fuse on the same supply,
and it is far easier and faster for maintenance staff to replace the father card fuse.
These are opaque fuses, and cannot be visually inspected like glass fuses. If a suspected power supply
failure causes a Fathercard monitor LED to go dark, please alert maintenance staff to investigate the
Fathercard or the DISCONT fuses as appropriate. Spare fuses are available from KVD to avoid the
expense of sending a DISCONT back to the factory for a simple fuse repair. You must take care when
replacing them to use an energy-controlled soldering station such as ones made by Metcal, to avoid
damaging the pads that the fuses are soldered to.
The commercial part numbers and code markings are as follows:
4.0 A Code "FS" Digikey F1274CT-ND Littelfuse 429.004
Socketed (father cards and newer instruments) - Littelfuse 451 series
0.5A Digikey F2574CT-ND
64 PN: 73-01003-00, December 2011

System Hardware Father Cards
Grounds
Analog and Digital ground planes are kept separate in the power supply and cables, but are typically
shorted together on the test head motherboard.
The Zero Volt Reference for the DUT Sources and all measurement systems is called GROUND SENSE,
and for best accuracy, must be connected to the DUT at only one point. Connecting it at a ground plane
point distant from the DUT is possible, but may introduce an error proportional to the ground plane
resistance and the current flow in it between the DUT and the GROUND SENSE connection.
In many cases, this will only be a fraction of a millivolt, but the effect needs to be carefully considered if you
are measuring or attempting to correlate to a sub-millivolt accuracy level.
Relays and Relay Drivers
The KVD architecture is unusual in that there is no separate instrument board for relay drivers, as it was
judged to be a unnecessary dedication of relatively expensive resources such as test head slots and
Hypertronics pins. Rather, a serial bus from the DISCONT board is used to control relay drivers on the
Fathercard itself, and all registers and drive circuits are available for easy troubleshooting.
Figure 3.24: Coto Relays on the Father Card
DUT Cards
Some custom Father Card and DUT board designs are using 68-pin Hypertronics connectors exclusively.
Custom applications documentation will be provided by the responsible applications engineer.
66 PN: 73-01003-00, December 2011

4. System Setup
About CodeGear RAD Studio 2007 Professional

http://www.codegear.com/products/radstudio
Installation
Current instructions are available at http://license.borland.com/lservers/belise_inst.jsp

but be advised that this URL may change at any time.
Licensing
Licensing is handled by KVD staff upon initial installation, working with your IT staff to configure a license
server.
Installing new KVD Libraries

KVD Libraries are self-installing executables, and will be distributed typically via FTP.
Figure 4.1: Library Installation splash screen
System Software 5.0.5 or Higher— M2-SeriesTest System Programming and Operations 67

Programming and Operations System Setup
Installation Swapping Tool

For experimenting with new releases, the Installation Swapping Tool can save a few minutes going back
and forth.
Figure 4.2: Install Swappng Tool
Offline Emulator Mode - Notester Install
Notester Emulation Mode
Tester versus notester emulation mode is determined at runtime. This has the benefit of allowing the
engineer to compile on an offline system, and the executable can run without recompiling on a tester. Also,
all tools are available from any install.
The install screen displays the target Operating System,Compiler, and the KVD Library number being
installed.
If you wish to group the KVD shortcuts under one selection under your Start menu, check the lower box.
Figure 4.3: Library Installation
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System Setup Test Head Power Control
Test Head Power Control

There are both hardware and software controls for test head power. The hardware control is a rocker
switch on the cable end of the test head.
The software ON/OFF control is either a Desktop Icon, or a START Menu program, that you need to turn
ON to energize the solid state relay in the Power Supply Assembly.
Figure 4.4: KVD Power Control Icon
Remember that BOTH of these controls must be energized to power up the test head.
Every time the power is cycled to the test head, the XILINX FPGA chips must be booted, in order for them
to contain their programmed personalities. The operator is usually prompted to boot the test head, or it is
forced automatically, a choice which is set in the Customer Preferences Tool.
Tester Configuration Tool - TCT
Functional Description
The TCT allows the user to configure the test head and communication ports on each KVD Test system.
The TCT writes not only user information, but standard KVD setup information into the Windows Registry.
All tools, along with any test program that uses a KVD library, read this setup information at the very
beginning of startup. The benefit of this is that the KVD Testers can be reconfigured for different products,
and the test programs/tools do not have to be recompiled.
The main page shows all the slots within the test head. By double clicking on a slot, the user is shown a list
of KVD supported hardware that can go into the slot. By selecting a board, the registry will be updated to
include the chosen board for the chosen slot.
System Software 5.0.5 or Higher —M2-SeriesTest System Programming and Operations 69

Figure 4.5: TCT Screen with Configured Test Head
KVD Calibration and Checker Tool

Normally performed by maintenance staff, the test engineer may also launch the program via the Start
menu, -> Testhead Setup and Calibrate, then KVD Calibration and Checker Launcher.
Fast Launch Tab
When the program launches, there are two tab choices at first, the top one showing fast launch buttons.
There is a single-button Cal All function, similar to the previous cal launcher, as well as CheckAll and
Check And Calibrate All buttons and a Boot Test Head button to check gross functionality of the data
bus.
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System Setup KVD Calibration and Checker Tool
Figure 4.6: Fast Launch Tab
As long as the DUT board is removed, you can press the button of your choice, and it will run unattended.
Each cal and checker program will run from a script, display the standard production GUI for a time, and
finish by showing a results summary display.
FPGA Booting Process
The following is a printout from a log file of BOOTing the test head, with various instruments being
programmed by the Xilinx files. The PCIDIS board is located in the CPU, whose power cannot be
interrupted as the test head can, so it almost always displays the result that it is already loaded.
If you accidentally configure the TCT with an instrument in the wrong slot, or if you remove an instrument
and do not remove it from the TCT, the Xilinx boot process will fail, with an error message about "maximum
retries exceeded." This may also happen in case of a failed instrument.
Running BOOT_ALL
B Boot PCIF with C:\xil370\PCIDIS.XIL Side, Slot = 3,10 subslot=0
base_addr=768
PCIDIS XILINX Already Loaded, Reloading
PCIDIS XILINX Loaded !!
D Boot DISCONT with C:\xil370\DISCONT.XIL Side, Slot = 3,0 subslot=0
base_addr=768
DISCONT Booted !!
M Boot DCMOD0_500MA with C:\xil370\DCMOD.XIL Side, Slot, VSlot = 1,1, 1
subslot=0 base_addr=256
M Boot WS with C:\xil370\WSXIL.XIL Side, Slot, VSlot = 1,3, 3
M Boot WD with C:\xil370\WDXIL2.XIL Side, Slot, VSlot = 1,4, 4
M Boot DSPIO0 with C:\xil370\DSPIOCNT.XIL Side, Slot, VSlot = 2,1, 1
S Boot DSPIO0 with C:\xil370\DSPIOTI.XIL Side, Slot = 2,1 subslot=3
base_addr=512
S Boot DSPIO0 with C:\xil370\DSPIODD.XIL Side, Slot = 2,1 subslot=2
base_addr=512
S Boot DSPIO0 with C:\xil370\DSPIOADR.XIL Side, Slot = 2,1 Massubslot=1
base_addr=512
M Boot DCMOD1_500MA with C:\xil370\DCMOD.XIL Side, Slot, VSlot = 2,3, 3
M Boot WD with C:\xil370\WDXIL2.XIL Side, Slot, VSlot = 2,5, 5
M Boot TMU with C:\xil370\TMUXIL.XIL Side, Slot, VSlot = 2,8, 8
A Boot STD_FC with C:\xil370\STDFC.XIL Side, Slot, VSlot = 3,12, 0
12.5Mhz DIS Selected

Simulated LED Results
An overall PASS/FAIL result section shows at the bottom of the GUI. Yellow LEDs are programs in
progress, while black LEDs are programs that have not yet been run.
Figure 4.7: Simulated LEDs
Aborting a Program in Progress
If you wish to terminate any cal or checker program while the production GUI is on display, click on the
yellow termination bar just below the simulated LEDs.
Figure 4.8: Termination Bar
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System Setup KVD Calibration and Checker Tool
Calibration and Checker Options
You have the ability to run custom options in most of the cals and checkers, either limiting the number of
sources/channels run, various other selections, or program a repetitive loop. Choose the Options tab, then
click the selected options. Then press the Run Selected Programs button.
Figure 4.9: Calibration and Checker Options
Note: When a custom option field requires you to type in a value, a box will pop up. To clear the value
from the box currently requires you to type "-1" as a value in the box. As displayed, it says (-1 for
default).

Figure 4.10: Modify Custom Value Screen
Results Summary Display
After a Cal and/or Checker run, a summary of the results is shown, with red for programs that generated at
least one failure, and green for pass. This summary display is a list of hyperlinks to the real datalog files,
located in resource folders underneath C:\_kvdco_CustFiles\Calibration with date stamped filenames
such as the following:
dspiock_KVD-LASER153_060606_1321.log
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CodeGear RAD Studio C++Builder 2007

KVD uses the CodeGear RAD Studio C++Builder 2007 for library development, tool development, and test
program development.
KVD installs on each test system one or more KVD libraries, and a standard C++ header file. The libraries
support test program development (kvdwin.lib) and other instruments under development if present.
The libraries are typically located in the folder C:\_kvdco\Libraries. The header file (kvdwin.h) is
located in the folder C:\_kvdco\Include.
Getting started
Copying Existing Test Programs
Many test engineers start with an existing test program, cloning it to a new location of their own. KVD has
a tool to streamline this process called the Copy Project Tool
The KVD Copy Project Tool (located from the START menu under the Customer Support folder) was
developed to make copying a KVD Test program, and all support files, easier. The tool has a very simple
interface, and is shown below in Figure 5.1
Programming and Operations Development Environment
Figure 5.1: The Copy Project Tool screen
You'll notice that there are three main sections. These are the steps you will follow to copy the project to
another folder, whether that folder is on the same hard drive, or located on the network.
Step 1 - Select the folder where the project files to be copied are located. This is known as the "source"
folder. This location can be a folder on a local or network drive.
Step 2 - Select the folder where all the selected files will be copied into. This is known as the destination
folder. This location can be a folder on a local or network drive. If it does not yet exist, you will be given the
opportunity to create it.
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Test programs must be released to production after development and debug. The environment of the test
system is highly configurable, with multiple priorities of precidence. At the first level, configuration settings
saved inthe Windows Registry are non-volatile, and consulted first. At the second level, configuration
settings can be saved in a hard disk file, and loaded along with the test program to enforce consistency on
the production environment. Last, the test engineer who is the final authority, may modify (temporarily or
for the duration of the test program), almost any possible attribute of the tester. This is a fundamental part
of the KVD design culture - to allow fine control over those aspects of the tester that the customer wishes
to customize.
Customer Preferences Tool

Launch the Customer Preferences tool from the Start menu, to configure customer-specific options in your
preferred way.
Figure 6.1: Launching the Customer Preferences Tool
Note: The Preferences choices are under constant development, so new selections may appear for any
software release. Please consult the most recent Release Notes for details of these additional
features.
Pending an explanation of some new features in 5.05 R1.
Programming and Operations Operations Environment
Figure 6.2: Main Customer Preferences Screen (Misc. control)
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Operations Environment Customer Preferences Tool
Figure 6.3: Customer Preferences Screen - GUI control
Preferences Page
The customer preferences tool allows the customer an easy way to change some of the run time features
and/or options of the run time environment. This tool is considered by KVD to be customizable per
customer. Therefore, only the fields that would be the same for every version of this tool will be explained.
There are currently eight pages (TABS) on this tool. The Preferences page allows the user to turn on and
off different options, or to choose certain startup conditions. The Datalog Control page offers many flexible
options for data handling. The Handler Options page is where handlers/probers are selected, and Handler
Bin Tables are chosen. The Custom Data DLL page is where you can choose to filter your datalogs or
summary information through a program that may put it into a suitable format for off-line processing.
Field Description
Run Mode The normal desired selection here is Production, to launch test program
executables. If it is set to Engineering, then the test program .ini file that the
Setup File Tool creates is searched to find a RAD Studio Project file (.bpr) to
launch instead. This allows test programs to be debugged while the main KVD
loop is running, which may affect execution timing. If the .bpr file that is
referenced by the .ini file is missing, the library falls back to running the test
program executable only, in Production mode. Engineering mode also activates
a test time profiler, which adds two fields to each test line of the datalog file:
DTT (for Delta Test Time from the previous test) and CTT (for Cumulative Test
Time from the beginning of Tseq)
Menu Items The menu items that appear on the main KVD production screen can be
disabled or enabled, to reduce operator confusion.
Auto Boot on Startup The KVD system will begin a boot process once the Start button is clicked. If
this option is Disabled, the operator will be prompted on whether to boot, or not.
If this option is Enabled, the boot will occur automatically.
Confirm Before When an End Lot occurs in the production environment, the user is prompted to
Stopping Confirm the End Lot before testing stops. This option can be changed by
clicking on the NO radio button in this box.
Show Hand Test Hand test mode is a GUI feature where the system can be instructed to test
Mode Menu only one device at a time, with operator control over the serial number. This is
useful for setup verification, or for testing correlation devices where the serial
numbers may not start at one, or be contiguous.
Test Statistics View The real time test statistics page is sometimes more easily readable in single-
(Columns) column mode instead of double-column. You have control over this appearance
of the GUI here.
Hide Setup Info On The Launcher can display the entire setup file for each test setup it finds. The
Launcher option can be toggled between showing the info, and not showing it.
Startup View The Production runtime environment contains three or four (if wafer flow is
selected) pages on its main screen, although more are possible. The user can
select the default page that is visible when the test program is first launched.
Stop On First Fail This is a standard feature of test systems. In normal production, you wish to halt
testing and immediately bin the device to maximize tester throughput. If Stop on
First Fail is turned off, then a bad device will be tested beyond the point of
necessity, thus wasting time on a part you are going to throw away anyway.
When you are doing correlation, QA, or engineering, and wish to know all the
possible failing tests, this feature may be turned off.
Ignore Raw Data Files The KVD tester will create a raw data file whenever an End Lot occurs. The file
is saved in the chosen data path under a name associated with the Lot Number.
If another production run is started with the same data path AND the same lot
number, the system software can handle the existing raw data. Clicking on NO
in this box forces the system to handle the raw data. Clicking on Yes forces the
system to completely ignore any existing raw data files.
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Field Description
Raw Data Handling If the user has chosen to handle the raw data (see above), there then are three
ways it can be used. If the User chooses Automatically Show if it exists, then
the data is read in, and all counts are adjusted. The user is not prompted. If the
user chooses Automatically No Show if Exists, then the data is read in, but no
visual counters are adjusted, only the internal lot summary counts are adjusted.
Finally, if the user chooses Prompt User, the user will be prompted on how to
handle the data.
Max Lines On You can customize the screen size for the engineering screen, which looks like
Engineering Screen a historical datalog display.
Testing Flow For packaged devices, the main testing data flow involves a lot identification
only. For wafer testing, you are presented with a display of both lot and wafer
numbers, and summary files are available for both the lot and sublot level.
Wafer Map Options These are options available when you are connected to a GSI M310 laser
trimmer.
Hide Minimize/ To prevent operator errors and confusion, you may choose to hide these
Maximize Icons window control icons.
Full Screen Mode Selecting full screen mode may also prevent accidental operator mouse clicks
on unintended programs.
Library Version Check Run-time error checking to confirm that the test program being run was
compiled using the same KVD library version. Program will halt if a mismatch is
detected. Default condition for this check is ON, which may cause operator
confusion if they are presented with a program launcher with mismatched
programs to choose from. This feature may be turned off in the Customer
Preferences Tool if desired, which will emulate current system behavior, at the
slight risk of running mismatched programs that may generate fatal run-time
exceptions.
Note: This feature will not detect legacy test programs that were compiled
under older KVD libraries. It is designed as a feature to protect against
future KVD libraries being used to run test programs compiled using
5.02 or subsequent mismatched libraries.
The confirmation box that pops up if a violation is detected looks like this:
Field Description
Process Priority The test programs can implement a change in the windows process priority,
which can be overridden by the Preference option here:
Ignore
Does not allow any changes to the process priority from within the test program
code. Program code priority changes would have been programmed by the test
engineer.
Normal
This is the priority level that the windows operating system normally uses for
any windows application.
High
This is a priority level higher than the normal level. This level can keep out
some of the network traffic, and other process interruptions that can slow down
a test program. Some (not all) test programs can run faster. One note about
running in the HIGH mode. Interrupting the test program (pausing or stopping
via mouse clicks) can be affected.
Check MPDCMOD Testing can be halted until the test head temperature matches the last
temperature calibration temperature (within a chosen tolerance).
Rolling Yield Display A feature useful to production operations is available called the Rolling Yield
Display, to assist in spotting trends of yield reduction. If enabled in the
Customer Preferences Tool, the Yield Display will show the yield of the last "n"
devices, where "n" can be between 20 and 2000. The count resets itself at end
of lot or sublot.
If activated, the display window appears on the Production View tabsheet (only)
just underneath the normal lot yield display window. In this screenshot, the
display is set to show the yield of the last 20 devices.
This is a single-site feature, however, and for multisite programs, the site-based
yield GUI is more useful, which is a separate production GUI tab. (documented
later)
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In the startup page view, the subgroup radiogroups for Production Page and Site Data Page only show if
the parent radio button is selected. For example the two sub tabs for Production Page are hidden unless
the Production Page RG is selected, as shown in Figure 6.4.
Figure 6.4: Selecting Radio Buttons for Production Page and Site Data Page
Datalog Control Page
Figure 6.5: Datalog Control Preferences
There are many choices for how to handle new data (data from an interrupted lot, or a possible rescreened
lot), whether or not to automatically force the data to be printed without operator intervention, and what the
default datalogging choices will be. In addition, sample datalog ratios can be specified, in case you do not
wish to save or display the datalogs for each device, but only every "nth" device.
The possible output files are:

• Summaries - Lot, Bin, and Failed Test combined into one report. See “Summaries” on page 6-100.
• Histograms - Graphical analysis of test results. See “Histograms” on page 6-101.
• TDA (Test Data Analysis) - like histograms, but data only, no graphics. See “Test Data Analysis” on
page 6-103.
• Datalogs - test-by-test measurement results output for each device selected for datalogging. See “then
the TELP8MULTIPASS would be the handler that is used.” on page 6-98.
Field Description
Save Summary To prevent power interruptions or other incidents from erasing partial testing
Feature summaries, you now have an option to save data to disk between each device.
Data is buffered by one device if hand test mode is active, in case the device is
retested (which normally backs the last data out of the summaries).
Datalog data is already saved to the disk after each device, at a programmable
Sample Size.
KVD always recommends installing a UPS (uninterruptible power supply) if you
are in a region of very bad power, since the UPS also. protects against surges
and spikes as well as short power dropouts.
ZIP Data Files By selecting YES, the data files produced by the KVD Library (summary,
histogram, datalog, and TDA files) will be combined into one zip file (named the
same way the files are named, and in the same folder.) This can be useful not
only for conserving disk space, but also speeds up transfers across networks.
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Handler Options Page
Figure 6.6: Handler Options Screen
The handler options page allows to user to specify handler and prober DLLs by selecting the Disabled or
Enabled radio boxes in the Use Handler group box. On this page, the word Handler references both
Packaged Device handlers, and Wafer Probers. If a handler will be used (Enabled), then the handler DLL
listed in the Select Handler File list is the DLL file that the system will automatically use on start up. If a
handler is being used, and it is a packaged device handler which needs a software bin to SORT category
conversion, then the Bin Table selected will also be loaded. All handler/prober DLL files found in the list are
either supplied by KVD, or customer-written by modifying a generic template. If a Handler/Prober is
required that does not show up in this list, contact KVD for instructions and sample source code. The Bin
Table files listed are generated by the user by using the Handler Bin Table Tool.
Custom Data DLLs
Custom Data DLLs are written by KVD or the customer to process, transmit, or manage data (such as
datalogs or summaries) in some flexible or customized fashion. If desired, their use can be managed by
this control screen.
Figure 6.7: Custom Data DLL Screen
STDF Format
Pending.
CSV Format
DLL Overview
The CSVFormat DLL will generate Comma Separated Value (.CSV) output files. The DLL has a default
directory for output files of C:\KVDTestData\CSV Output and a standard file naming convention of
<filename root><DLL added>.CSV.
The <filename root> portion of the filename is "Lot" by default or the user can pass in a value from the test
program. The <DLL added> portion of the filename is "#_f#p#_<time stamp>", where the first '#' is the lot
number and the <time stamp> is in "mmddhhmm" format. For example, if the user ran a test on Jan. 12 at
1:54p and didn't specify a filename root, the output file generated would reside in the C:\KVDTestData\
CSV Output directory and would be named Lot1_f1p1_01121354.CSV.
The user may pass in a <filename root> by using the following function call in the LotInit() function:
KVD->customdata->SetStringParam(100, <AnsiString>);
Where <AnsiString> is an actual string (i.e. "KVDTest_Run1_Lot"), including the quotes ("") or an
AnsiString variable. For example:
KVD->customdata->SetStringParam(100, "C:\\Lot123 Test

Data\\KVDTest_Run1_Lot");
The DLL will then create an output file in the C:\Lot123 Test Data directory with the name:
KVDTest_Run1_Lot1_f1p1_01121354.CSV and place the data within the file.
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Because of specific limitations with the Microsoft® Excel spreadsheet this DLL has special functions to get
around these limitations. Excel is limited in the number of rows and columns that it can display on a
spreadsheet - 256 columns and 65536 rows.
The CSVFormat DLL will create a new 'page' (p#) for every 250 tests done on a device and the DLL will
create a new 'file' (f#) for every 65500 devices tested. The CSVFormat uses the "_f#p#" in the filename to
distinguish each of the output files. For example, if there are 130,000 devices that will have 600 tests
performed on them, the output files generated will be:
Lot1_f1p1_01121354.CSV Tests 1-250 on devices 1-65500
Output File Data Format
The output file is formatted as follows:
KVD Version 1.3 Wafer: 0

Test Program: KVDTestApp.exe
Lot ID Tester:
Operator:
Tester: MINIMAX8
Date: 1/18/2001
9:02
Test #: 1 2 3 4 5 6
Test Name: Wafer X Wafer Y Source #1 Source #2 Source #3 Source #4 Source #5 Source #6
Upper Limit: 1.1 2.1 3.1 4.1 5.1 6.1

Lower Limit: .9 1.9 2.9 3.9 4.9 5.9
Site # Serial # Bin # V V V V V V
0 0 1 0 0 1 2 3 4 5 6
0 1 1 0 0 1 2 3 4 5 6
0 2 1 0 0 1 2 3 4 5 6
0 3 1 0 0 1 2 3 4 5 6
By adding the following code to the LotInit( ) function the user may pass in the Operator ID, the Computer
ID and the Test Program Name:
KVD->customdata->SetStringParam(101,LOG->OperatorID);
KVD->customdata->SetStringParam(102,LOG->ComputerName);
KVD->customdata->SetStringParam(103,ExtractFileName(Application-
>ExeName));
The CSVFormat DLL automatically fills in the test numbers, test names, upper and lower limits and the
units to the output file. The DLL also includes the site number, device number (Serial #), bin number and
the Wafer X and Y in the first five columns each output file.
Data Upload Control
Optionally, besides saveing testing data onthe local hard drive, you may wish to upload it to a networked
location. This is controlled either in the test program, or an overall destination folder can be specified here:
Figure 6.8: Data Upload Control
Engineering Options on the Preferences Tool
A new option is whether or not to auto-launch the RTI when debugging applications. This saves a few
mouse clicks if you are in a debugging session.
Figure 6.9: Preferences Tool - Engineering Options
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Message Handling Control
Fine grain control is provided for how you wish to handle library error messages of various severity levels.
Figure 6.10: Message Handling Control
Updating the Windows Registry
Once any changes have been made to these options, on any page, the Update button must be clicked for
these options to be saved in the Windows Registry. A test program reads these options on startup. If a test
program is running when these options are changed, and saved, they will not be in effect until the next time
the test program is started.
Figure 6.11: Updating the Registry
Handler Bin Table Tool

Most handlers have a limited set of SORT categories when compared to software bins in a test program.
Typically, software bins have to be converted to some corresponding SORT bin. The handler Bin Table tool
supports this concept. The KVD Tester has 128 possible bins (0 through 127). The handler DLLs that KVD
supplies to the customer convert the software bin to the corresponding SORT category by use of a table.
This tool allows the user to create a conversion table, and save it to file. Then, using the Customer Setup
Tool, the Handler Bin Table file (extension HBT) can be selected for use. The following image is of the
Handler Bin Table Tool.
Figure 6.12: Bin Table Tool Screen
Shown in this image are the128 possible software bins (BIN columns). Next to each software bin is an
entry field to put the corresponding SORT category. Files created and saved previously by this tool can be
reloaded, changed, and re-saved. The Fill All button, when clicked, will fill all 128 software bins with the
SORT category that is entered in the box below the button. The next image is an example of a Bin Table for
a product.
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Operations Environment Handler Bin Table Tool
Handler Bin Table Example
Figure 6.13: Sample Bin Table
In this example, BIN 0's will be sorted to category 8, BIN 1's to category 1, BIN 2's to category 2, BIN 3
sorted to category 3, and so forth. All bins 8 and higher will be sorted to category 8. On this particular
handler, the limit for the handler was 8 sort categories, thus only 8 are used. The only limit to the number of
sort categories used is based on the handler, with the KVD having a limit of 128. (Except for parallel
interface hardware, however, where the limit is typically 10 category lines.)
Setup File Tool

Executable Device Test Programs (compiled, linked, and with names of the form jobplan.exe) are
released to production use by a system manager using the Setup File Tool.
Figure 6.14: Launch the Setup File Tool from the Start Menu
Figure 6.15: Initial Setup File Tool Screen
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Operations Environment Setup File Tool
First, select the location in which the Setup Files are to be saved:
Figure 6.16: Setup Files Location
Choose your site-defined location. There must be only one folder into which all users are to save their
setup files, as this location is saved in the Windows Registry. If each user chooses a different folder,
production confusion will certainly result.
Then you enter the name you wish to display in the Launcher. This can be an easy-to-understand name for
production operators, and does not need to be identical to the name of the executable job plan.
Then you select which executable job plan (jobplan.exe) you wish to be launched when this Launcher
Name is chosen.
Figure 6.17: Job Plan Name and Executable Entered
Figure 6.18: Limits File Chosen
If you wish to associate a limits file with the job plan, select it here. The limits file may also be programmed
in the job plan code, in which case this choice would be overridden. One advantage to specifying it here is
that different limits files may be loaded using a single test program executable, saving disk space. For
instance, QA, Final Test, and Burn-in limits may all be run using one executable, with different launcher
strings (names) used to distinguish them for the production operators.
Figure 6.19: Limits File Displayed
Similarly, choose all the items you wish to have associated with this executable test program. Please feel
free to explore it on your own, and read the How To Documents under the Start menu for one named KVD
Test Program Engineering Check List.
An important selection here is that you can associate a particular Customer Preferences File with each test
program in the launcher. This is very useful in case you wish to remove any possibility that the another
development engineer or operator may leave the Customer Preferences Screen in some unwanted state.
The Customer Preferences File selected in this Setup File Tool will override any selections made
elsewhere, as it is read in just before program launch. This is flowcharted in section X (Pending).
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Operations Environment Setup File Tool
Figure 6.20: Saving the Setup File
When all of your selections are complete, you save the setup file by using the File pulldown menu, then
the Save As selection. The extension of these files is always .ini, and you need to choose a distinctive
filename to make sure yours is not confused with others.
Also remember there can only be one central Setup File folder location chosen, for all users to share. This
will normally be defined by your system administrators.
Figure 6.21: Saved Setup File Location
Pending: Explanation of the Zip Download process from a networked folder for test program version
control.
Figure 6.22: Setup File Tool - Zipped File Option
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Operations Environment Test Program Launcher
Test Program Launcher

Once the executable programs have been made available to the operator via the Setup File Tool, and the
Test Head Configuration has been set (if needed) by the Configuration Tool, then the Program Launcher is
the natural place for the operator to begin to test devices.
Figure 6.23: Launching the Launcher
Figure 6.24: KVD Test Program Launcher Screen
The large blue region is where the display names are presented to the operator. They can choose one by
a mouse-click, or if there are too many to be displayed easily, typing in the box will run a filter against the
list, and only display those names beginning with the typed characters.
Figure 6.25: Entering Operator and Lot Data
An operator ID needs to be entered here, and it is saved in a LOG object variable and printed with all
summary files and datalogs. The LOT number does not have to be all numeric, but can contain alpha
characters as well. Punctuation is not recommended.
Error Checking for Lot Names
Previously, invalid characters could be entered for lot names, which would cause filename errors after the
lot was ended and summary data should have been saved. This could cause loss of report data and force
retesting. Now, the code substitutes an 'X' for the following invalid characters / * & # ! - ; :
Figure 6.26: Double-click a program name to launch it
Finally, selecting a program name, and pressing the Launch Test Program button will execute the KVD
production GUI.
Preferences Flowchart
• When the production process launches, the KVD software accepts preferences from the Windows
Registry first. This is where the Customer Preferences Tool stores its selections.
• Next, the .ini file for the test program that has been launched is consulted for more preferences, such
as the limits file to be used. Remember, these are .ini files created and saved using the Setup File
Tool.
• The Setup Files are stored in a central location, so we need a way for their data to be communicated to
the executable test program. We use a generic file called KVDStartup.ini to accomplish this. Any
items named in the Setup File are copied to KVDStartup.ini, and this file is placed into the same folder
as the executable test program.
• Variables from the Launcher such as the Operator ID and Lot Number are copied into a file called
KVDLauncher.ini, and also placed into the test program folder.
• Data from both of these files is read into the test program before the SystemInit function in
UserClass.cpp.
• You can interrogate any of these variables in the LOG object to see what was read in.
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Operations Environment Preferences Flowchart
• You can at that time change any of them if you wish, since the test program always has the last
chance. You, as the test engineer, can reload limits files, change lot number, index the serial number in
unusual ways if you wish, reboot the test head, customize the datalogging choices, and override things
such as the final destination folder for summary files.
Launch Flow Overview
Figure 6.27: Program Launch Flowchart
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Operations Environment Additional flow details for selecting handlers
Additional flow details for selecting handlers

Figure 6.28: Handler Enabling Flow
Open KVDStartup.ini
Read CUSTOMERPREF line, load registry
Read HANDLER line into registry
Read CUSTOMDATA line into registry
Process Customer Preferences from Registry
Note: Each item is now read, and then processed only at the end, not as it occurs.
The flow in Figure 6.28 shows the following:

• The Customer Preference file (specified in the kvdstartup.ini, which came from the setup file), is
loaded into the registry.
• Then the HANDLER line is used to update the customer preferences in the registry.
• The same thing is done with the CUSTOMDATA line.
• Now the customer preferences in the registry are processed.
• If the Customer Preference (CPC) file specifies a handler, AND the setup file, or LAUNCHER drop
down specifies a handler, then the last occurring line (the HANDLER LINE) would take effect.
• If the CPC file does not specify a handler, but the setup file or LAUNCHER drop down does, that is
the handler that gets used.
• If the CPC specifies a handler, and the setup file and LAUNCHER drop down do not, the CPC file
takes effect.
Examples
This section gives several operational examples for the handler enabling flow. In general, in order of
precedence, the flow is as follows:
• LAUNCHER drop down list
• Followed by Setup File HANDLER line
• Followed by Customer Preference (CPC) file option.
• Followed by whatever was in the registry to begin with.
Example 1
If the CPC file specifies that TELP8MULTIPASS is to be used,
and the operator selects the AETRIUM from the LAUNCHER drop down,
then, under the proposed flow, the AETRIUM would be the handler used.
Example 2
If the CPC file has the handler DISABLED,
and the setup file has the TELP8MULTIPASS listed as the Handler,
and the operator selected AETRIUM from the launcher drop down list,
then the AETRIUM is the handler that gets used.
Example 3
If the CPC file has the TELP8MULTIPASS selected and enabled,
and the setup file has no Handler listed,
and the Operator selects the AETRIUM from the drop down list,
then the AETRIUM would be the handler that is used.
Example 4
If the CPC file has the TELP8MULTIPASS selected and enabled,
and the setup file has no Handler listed,
and the Operator makes no selection in the LAUNCHER drop down list,
then the TELP8MULTIPASS would be the handler that is used.
Datalogs
Datalogs are the detailed test results display for a tested device. You can select to datalog all tests, or just
failed tests, to a file or to the printer. When saved on the disk, the files have the extension .log, and they
are stored in a folder you have previously designated in the Setup File Tool. The default folder, if you do
nothing, is C:\KVDTestData.
Example:
KVD TEST DATA LOG

Thu Sep 21 09:45:08 2000
Job Name: IMAGER EVALUATION

Program ID: IMAGER DEVICE: Sep 21 2000
98 PN: 73-01003-00, November 2008

Operations Environment Datalogs
Operator ID: Aurel

Tester: ACE*
Fixture ID: IMG LVDS FC #2
Fixture ID 2: 48-Pin Yamaichi Socket
Lot ID: check 20000425
Start Time: Thu Sep 21 09:44:54 2000
Elapsed Sec: 14
Comment: LVDS Test
Site: 0 Device Serial Number: 1 Bin: 1
S0 5 STD LUX ILLUMINATIO 30.502 Lux min: 29.000 max: 31.000

S0 250 CONT : 33: USBCLK -0.438 V min: -1.200 max: -0.200
S0 253 CONT : 36: SCL -0.390 V min: -1.200 max: -0.200
S0 254 CONT : 37: SDA -0.330 V min: -1.200 max: -0.200
S0 255 CONT : 38: SLEEP -0.426 V min: -1.200 max: -0.200
S0 257 CONT : 35: VSYNC -0.438 V min: -1.200 max: -0.200
S0 258 CONT : 34: HSYNC -0.376 V min: -1.200 max: -0.200
S0 259 CONT : 26: PXDO -0.418 V min: -1.200 max: -0.200
S0 260 CONT : 25: PXD1 -0.413 V min: -1.200 max: -0.200
S0 270 CONT : 32: PXCLK -0.434 V min: -1.200 max: -0.200
S0 272 CONT : 9: VDDAY -0.507 V min: -1.000 max: 1.000
S0 900 IN_LEAK LO : USBCL 0.047 uA min: -1.000 max: 1.000
S0 901 IN_LEAK HI : USBCL 0.096 uA min: -1.000 max: 1.000
S0 902 IN_LEAK LO : SLEEP -0.003 uA min: -1.000 max: 1.000
S0 903 IN_LEAK HI : SLEEP 0.089 uA min: -1.000 max: 1.000
S0 904 IN_LEAK LO : SCL -243.703 uA min: -400.000 max: 400.000
S0 905 IN_LEAK HI : SCL 0.075 uA min: -1.000 max: 1.000
S0 50 IVDDD SLEEP 1.094 mA min: 0.000 max: 2.000
S0 52 IVDDDR SLEEP 0.006 mA min: 0.000 max: 2.000
S0 55 IVDDD 28.332 mA min: 10.000 max: 30.000
S0 56 IVDDAY 0.612 mA min: 0.500 max: 1.000
S0 57 IVDDDR 8.636 mA min: 0.750 max: 10.000
S0 59 IVDDA 26.372 mA min: 15.000 max: 30.000
Recently, per customer request, we added a field to the standard report header that displays the name
(string) that was chosen in the Launcher to run the test program.
KVD LOT TEST SUMMARY REPORT

2/4/2003 5:24:08 PM
Program ID : C:\Test Programs\Billtest\KVDTestApp.exe (02/04/03

17:22:30)
Operator ID : 44
Tester : BCLAPXP
Fixture :
Lot ID : 44
Comment :
LimitsFile : C:\Test Programs\Billtest\Generic.lim (11/21/00
09:01:22)
BinFile : Generic.bin (11/21/00 09:01:22)
ParametersFile :
LibraryVersion : Version 05_02_ENGR_229
LaunchSelection: DeviceTypeHere
Lot Test Time : 17:23:56
Test Time Profiling
The KVD Library has the capability to profile each test's test time. Simply turn on Engineering Mode in the
customer preferences tool, and enable datalogging of all tests. You will then see two new columns on the
datalog.
The CTT value is the Cumulative Test Time from the beginning of the device and the DTT is the Differential
Test Time from test to test.
You can also read the system's internal timer into a variable by the following function:
variable1 = SYS->read_counter();
Do that at the beginning and end of code you're trying to time, get the difference, assign the difference to
SITE->lastresult.value and then you can datalog it.
Summaries
Bin result and test summaries are reports of the number of devices assigned to each bin, in a sublot or lot
of devices, along with the numbers of attempts made on each device for each test in the test list. A ratio of
failed attempts is also reported, to help in yield analysis and test list profiling. For instance, a test which
always passes every device may be a candidate for removal from the test list, since it may not contribute to
fault coverage. The file extension is .sum if the summary is saved to disk.
In the production environment, the operator can take a partial summary in case of curiosity about the yield
of a lot. The final lot or sublot summary is the one that is saved to the disk if specified in the Preferences
Tool.
KVD TEST SUMMARY REPORT

Sat Dec 30 07:55:19 2000
Job Name: DSPIO

Program ID: DSPIO: Oct 16 2000
Operator ID: veets
Tester: ACE*
Fixture ID: PROTOFC
Fixture ID 2:
Lot ID: CORR10
Start Time: Fri Dec 29 13:39:05 2000
Elapsed Sec: 65774
Comment: TESTING TMU
BINNING SUMMARY
Bin No. Bin Name Devices Percent
Bin 0, Alarms and other Weirdness 5 0.50

Bin 1, Device Passed 994 99.50
Total Devices: 999 100.00% Good Device Yield: 994 99.50%
KVD TEST FAILURE REPORT

Sat Dec 30 07:55:19 2000
Job Name: DSPIO

Tester: ACE*
Lot ID: CORR10
100 PN: 73-01003-00, November 2008

Operations Environment Histograms
Test Name Fails Tries Fail/Try Fails by Site
3711 DDTMU 22->7 5 999 0.005 5 0
Viewing summary data from the production GUI (for example looking at a partial lot summary) is now
accomplished in a non-editable window instead of in Wordpad. This removes the operator's ability to
modify data before it is sent to the printer.
Summary Counts Match Physical Device Counts
Depending on exactly how the handler or prober is halted or paused, the KVD summary reports could have
been low by one or more (depending on the number of active sites) devices because of data queuing.
Now, if the operator requests a partial summary report, the request is queued until the current device test
sequence is finished, that device (or devices, for multisite) is included in the report, which will pop up when
the handler bins the device(s).
Histograms
Histograms are a graphical way of showing the statistical results of a series of tests. The test limits are
shown as vertical lines, and the device test results are represented by asterisks. At a glance, the test
engineer can see the distribution of device results to see if there is a risk that limits are about to be
exceeded, or the distribution is skewed by process variation. Histograms use the extension .his when
saved to disk.
Graphical real-time histograms are also available while a lot is running by another path, documented
below.
Note that the mean of the result data is intended to be shown by a vertical column of dots, but this is
sometimes skewed due to a bug. The text report of the mean is correct, however.
Note also that in current software, out of range measurements cannot be excluded from the analyzed data,
which could also cause skew.
KVD TEST HISTOGRAM REPORT

1/21/00 4:29:02 PM
Job Name : TEST PROGRAM

Program ID : C:\WINTESTER\program\program.exe
Operator ID : BS
Tester : ACE*
Fixture : ATODFC1
Lot ID : HISTOGRAM TEST
Comment : TESTED BY VEETS
Histogram for Test: 1 CONT + : DOUT : 15 Devices Tested: 52
Limits: 0.400 V to 1.000 V

Range: 0.654 V to 0.655 V
Mean: 0.655 V Std. Dev: 0.000 V Cpk: 512.088
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========================================
0.400 V 1.000 V
Histogram for Test: 1712 ADC HARM : 2.7V Devices Tested: 52
Limits: -100.000 dB to -80.000 dB

Range: -91.889 dB to -88.184 dB
Mean: -89.843 dB Std. Dev: 0.956 dB Cpk: 3.430
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-100.000 dB -80.000 dB
102 PN: 73-01003-00, November 2008

Operations Environment Test Data Analysis
Test Data Analysis

TDA files are the tabular version of the histogram statistical data, saved with the extension .tda.
KVD TEST HISTOGRAM REPORT
1/21/00 4:29:02 PM
Job Name : TEST PROGRAM

Program ID : C:\WINTESTER\program\program.exe
Operator ID : BS
Tester : ACE*
Fixture : ATODFC1
Lot ID : HISTOGRAM TEST
Comment : TESTED BY VEETS
Total Devices = 52
Test# Name Units Lower Spec Mean-3S Minimum Mean Maximum Mean+3S Upper Spec Sigma CPK
-------------------------------------------------------------------------------------------------------
--
1 CONT + : DOUT : V 0.400 0.654 0.654 0.655 0.655 0.655 1.000 0.000 512.088
2 CONT + : SSTRB : V 0.400 0.653 0.654 0.654 0.654 0.654 1.000 0.000 524.543
103 CONT - : DOUT : V -1.000 -0.524 -0.525 -0.522 -0.522 -0.521 -0.200 0.001 196.435
Production Operator's Interface

After all the setups and selections have been made, and the job plan is launched and ready to run, this is
where one ends up. The default displayed page is the one you chose in the Customer Preferences Tool
earlier. Normally this is the Production View, but you can choose otherwise.
Figure 6.29: Main Production Screen
Notice the tabs that are below the Elapsed Time, and PASS / FAIL counters. These three tabs are labeled
"Production View", "Engineering View", and "Test Statistics View". The image above is displaying the
Production View. There is a Wafer Map view which is separately documented in an on-line How To
Document.
You can click on any of the three tabs at any time during testing (or when paused) and the program will
switch to that view. Since testing devices has a higher priority for CPU cycles, this switching could be
deferred until the end of the current device. Don't be alarmed at a possible delay. One way to increase the
chance that your mouse click will be noticed by the Windows scheduler is to sprinkle some or many of the
following statements in your program between tests:
Application->ProcessMessages();
The three views are briefly explained below.
Production View
The production view, when set up in a normal test program, will show horizontal bar graphs for each of the
BINS that the test program has defined. The graph above will automatically re-scale itself as the bin
counters fill up. In the image above, the area to the left of the graph shows the bin labels that the test
engineer has assigned to the bins in the program. To the right of the graph is a vertical list of two columns.
This is a run time counter of each test that fails, and the number of devices that have failed that particular
test. This is updated as the device is testing, but not resorted to put high counts at the top of the list.
Engineering View
The Engineering View is nothing more than a datalog screen view that is similar to the datalog environment
of any tester. You can switch to this view whenever running the test program, and see all tests or failing
tests only, depending on the preference you have previously chosen in the Customer Preferences Tool. If
you have chosen datalog to screen - OFF, then this page will have no datalog results, but a simple display
of device serial numbers and test time only.
Depending on the choice made in the Preferences Tool, the datalogs will be standard, with only test
results, or an engineering mode, with test time profiling time stamps included.
Note that the video screen refresh can be quite slow on this screen - on the order of dozens of milliseconds
- which could cost throughput. This should never be the default screen for viewing by operators. The scroll
window is also not very large, because of the amount of memory it could consume. Datalogs are normally
flushed to the hard drive after every device anyway, for later viewing.
104 PN: 73-01003-00, November 2008

Operations Environment Production Operator's Interface
Figure 6.30: Engineering View
Test Statistics View
Figure 6.31: Test Statistics View
This view is updated at the completion of each device tested. This view will show all the tests in the
program, along with their associated upper and lower limits, the last result for each test, and the mean and
standard deviation for each test. When a test fails the limits associated with it, that line of the test statistics
view will be highlighted in red. You can scroll this view down to see other tests that might be hidden if many
tests are in the program.
Wafer Map View
If in Wafer test flow (a Preference), you will see a wafer map display.
Figure 6.32: Wafer Map Main display
Site Results Data
If you are running a multisite program, there is a tab you may choose to display yield arranged by sites
instead of a consolidated display. This may increase the operator’s awareness of a site-based problem
such as bad probe tips.
106 PN: 73-01003-00, November 2008

Custom Forms
Some new and very useful features have been added to the Main KVD Production Display. Some
engineers in the past have developed their own data entry or setup forms that the engineer uses at the
beginning of program execution, or sometimes during program execution. The limitation of these forms
was that the engineer had to supply some way of the user deciding when the form was visible (or shown).
Now, that same form (with no changes required) can be added as a tabbed sheet on the KVD Main Display
with the call of one simple command, which takes a pointer to the form, and the text to use as the caption
of the tab sheet.
Pending example of this code.
Test Time Calculations, Displays, and Speed-Up Techniques
The test time that used to be datalogged, and displayed on the Production Main GUI page, was found to be
not fully representative of the test time needed to predict throughput on the test floor. Specifically, the
display was omitting the time spent in the functions DeviceInit and DeviceFinish, and only registering
time spent in Tseq.
For a better understanding of the number of devices tested per hour, we have enhanced the data gathering
to include these two functions in device test time, and also added two new fields in the production GUI to
show tester/video refresh overhead time and handler/prober index time. The total number of devices
tested per hour is always a function of the yield mix and variable laser trim activity, since very few devices
go through the exact same test sequence, and this data should always be calculated using full wafer or lot
test time reports. This is especially critical if the lot test time includes wafer robotic handler or vision system
auto-align activity.
The production GUI changes are shown here:
Figure 6.33: Changes to Production View

• Test time, as noted, now includes all three major per-device functions: DeviceInit, Tseq, and
DeviceFinish.
• Overhead time includes time the test system needs to calculate result statistics, yield information, and
refresh the video frame buffers to redraw the GUI. See explanation for more details on the components
that comprise this time.
• Handler/prober index time is the time consumed by the DLL-controlled handler driver (pulse widths
and set-up times) plus the physical time to index the next device into position.
• KVD adds any production idle time less than 5 seconds to the cumulative OVERHEAD time counter.
Any idle time greater than 5 seconds is added to the IDLE time printed in reports.
Speed-up Techniques
There are new means to reduce the overhead associated with the production GUI. As always, achieving
the optimum test time per device involves using the minimum reasonable relay delays, optimum trim
strategies, and avoiding unnecessary hardware resets and initializations. These are under your control as
a test engineer.
Once a test program is released to production, we have provided new preferences options to minimize the
time spent redrawing the video screen and calculating test statistics.
108 PN: 73-01003-00, November 2008

Figure 6.34: Speed-Up Techniques
You can choose to defer updating the GUI until every Nth device, saving video refresh time. You can hold
off updating any of the three major GUI tab sheets, saving calculation time. You can add or suppress
throughput information being added to the summary report.
We have characterized the approximate system overhead times as follows:
The production tab (bar chart) window is the slowest for updating. Depending on your chosen monitor
resolution (1024X768 or higher) and number of bins, this could be 130-200mS.
Engineering view (datalogs) with datalogging to screen turned off is quite quick, around 25mS overhead.
Suppressing the GUI updates on every device can bring the per-device overhead to less than 20mS.
Test Time Report Display
If you choose to add throughput times to the reports (currently active on summary, histogram, and TDA
reports, not the datalog report), a section is added just after the header with the following information:
Summary of throughput times
Name Cumulative Average

-------------------------------------------------------
Test Time : 13.870 0.771
Overhead Time : 1.950 0.108
Handler Wait for SOT : 0.000 0.000
Handler Wait for EOT : 0.000 0.000
IDLE time : 0.000 0.000
This is also under the test engineer's control, through the LOG object:
LOG->AddToReport=1.
Running Yield Display
To improve the ability of test floor operators and managers to spot declining yields and take swift corrective
action, we have implemented a beta version of a programmable yield alarm.
The trend display can be shown in place of the former Production View (bin bar chart), with programmable
numbers of bins being monitored, with distinctive colors for the monitored bins. A scrolling display of the
last 100 devices is shown, and the graphical representation lends itself to spotting trends quickly. Future
enhancements will include site-based tracking, to assist in spotting trends such as continuity yield issues
per site.
Figure 6.35: Bin Trend Chart
Which bins are tracked is configurable with the Options tool. When you click the Options button, it
demands a password in this box:
Figure 6.36: Password Required
The default password is administrator, but that can be changed by editing the file
C:\\_kvdco_CustFiles\\supervisor.ini.
If this file does not exist, create it, with the only content being your desired new password. This file will
persist between new software installations.
110 PN: 73-01003-00, November 2008

When the supervisor password is correctly entered, the following screen will launch, allowing specific
control over whether a bin is plotted on the Bin Trend Chart, the alarm percentage that trips the message,
the exact alarm message, whether or not a supervisor is required to clear the alarm or not, and the desired
color of the trend line. When you click the "save" button, this data is saved to
C:\_kvdco_CustFiles\BinTrendFiles\tempmem.btf until changed again.
Real-Time Yield Alarms
Each bin can have an optional trigger value (in percent), which will cause an alarm to go off if a pass bin
falls BELOW the trigger value, or if a fail bin goes ABOVE the trigger value.
The exact message that appears when the alarm occurs is programmable, so the alarm can instruct the
operator in a variety of responses, from checking the hardware, cleaning probe tips, or calling maintenance
or test engineering.
Figure 6.37: Bin Setup Tool
Because the functionality of this is useful to save as part of a test program, so the test engineer can
program the desired initial conditions for the Bin Yield Display, the concept of the Bin Setup Tool has been
extended.
Bin files used to be stored with the extension .bin in the test program directory. Extended bin files, with the
yield alarm features, can be stored with the extension .btf, and edited with the new tool. The new Bin Setup
Tool is launched the same way as the previous version, from the Start->Programming Tools. But you
have the new features of being able to import legacy .bin files, and save the new files as .btf versions.
Note: If you use this feature, you will have to change any mention of LOG->load_bin_data in your test
program to LOG-> load_bin_setup_file and refer to the new .btf file as the argument.
Yield Alarms and Running Yield Display Tabsheet
If plotted, the selected bins will appear in a display like this, with a color legend along the left edge:
Figure 6.38: Bin Trend Chart With Legend
This is an example of an alarm window.
Figure 6.39: Alarm Window
Site-based Yield Delta Alarms
To assist in quickly detecting site-to-site differences, which may indicate contact or probe problems, the
BTF file can also be configured to trigger an alarm if the lowest to highest yield for any bin exceeds some
threshold delta. Since this is a multisite-related display, it appears only when running a multisite program,
on the "Site Data" production GUI tab, on a sub-tab called "Bins per Site".
112 PN: 73-01003-00, November 2008

Figure 6.40: Site Data - Bins Per Site
Last "N" Yield per Site
To assist in determining if a site-based repair (contact cleaning, overtravel adjustment, etc.) is immediately
effective, the Site Data GUI was enhanced to add two columns on the Statistics Per Site tab. One for the
yield per site for the last "N" devices, and the other a display of what the "N" is defined to be. The default is
100 devices, but you can change it in your test program to be a different number per site if you wish, with
the command:
KVD->siteyield_lastn[site]=#;
// # is the rolling yield per site window.
Figure 6.41: Site Data - Statistics Per Site
Cleared Alarms
Cleared alarms are now added to the utilization log for an audit trail. First added in Release 5.02 R6, here
are some details about this log:
These logs are kept in the folder C:\_kvdco_CustFiles\UtilizationLog. The filename includes the Tester
ID, month, and year, and the data is saved in CSV (comma separated value) format, for ease in importing
the data to Excel or another spreadsheet program.
C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:11.34 STARTUP

C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:11.51 END LOT LOT=NOLOTNUM PASS=77 FAIL=11
C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:11.53 SHUTDOWN
C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:13.41 STARTUP
C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:13.53 END LOT LOT=222 PASS=77 FAIL=11
C:\Test Programs\DeviceBinner\DeviceBinner.exe 10/14/2003 13:13.54 SHUTDOWN
Yield alarm data are formatted as these examples:
C:\__debug\VerifyBinTrend\VerifyBinTrend.exe 4/13/2005 15:08.46 Bin

Trend Alarm <Bin 2 Threshold Alarm> ACTION=CONTINUE OperID=<1234>
StartAlarm=4/13/2005 3:08:42 PM ClearAlarm=4/13/2005 3:08:46 PM
Supervisor Password Not Reqrd
C:\__debug\VerifyBinTrend\VerifyBinTrend.exe 4/13/2005 15:09.07 Bin

Trend Alarm <Bin 3 Threshold Alarm> ACTION=EXITJOB OperID=<1234>
StartAlarm=4/13/2005 3:08:48 PM ClearAlarm=4/13/2005 3:09:01 PM
Supervisor Password Required
Operator ID
Clearing an alarm will always require the operator to enter an ID string (a minimum of 4 up to 10 characters
long). If the "Supervisor Clear" requirement is also set, the Supervisor Password box on the GUI is active.
Figure 6.42: Clearing an Alarm
If the Supervisor Clear requirement is not set, that box is grayed out.
114 PN: 73-01003-00, November 2008

Operations Environment Production GUI enhancements
Figure 6.43: Clearing an Alarm - No Supervisor Required
Exiting the job using the Yield Alarm GUI is a supervisor function, and proceeds through the entire End Lot
process to ensure summaries are retained and not lost.
Alarm Holdoff And Retriggering Algorithms
Pending.
Production GUI enhancements

Font sizes on the GUI can be adjusted in real time for improved operator readability from a distance. Any
changes will persist only while the test program is running.
The operator may also add a value tag to each bin with a label that contains the count, or a percentage,
and this tag may also be scaled for size.
To accommodate 128 bins and improve readability, the orientation of the bin bars in the standard GUI is
now vertical instead of horizontal, with numerous customization controls now available. See Figure 6.44.
Figure 6.44: Vertical Bin Bars in the Standard GUI
The Bin Count Chart can be sorted so that the left most bin in the chart represents the highest count, like a
Pareto chart. Since sorting takes a fixed amount of time each time it sorts, the user can choose the
frequency of sorting (every n devices) by using the new SortBinFrequency count in the Customer
Preferences Tool. Bin 0 always appears at the left, no matter how the others sort. See Figure 6.45.
Figure 6.45: Bin Count Chart
The only bins that show up now in the Visible Bins options list are the bins selected as used in the bin
editor, but you can suppress additional bins if desired. Bin 0 cannot be suppressed. See Figure 6.46.
116 PN: 73-01003-00, November 2008

Figure 6.46: Bin Count Chart Showing Only Selected Bins
The Bins Per Site table font now can scale larger or smaller by clicking on buttons on the Main GUI, for
enhanced readability at a distance on the production floor. See Figure 6.47.
Figure 6.47: Large Font Selected for Readability on Main GUI
As can the Statistics per Site table. See Figure 6.48.

Figure 6.48: Large Font Selected for Readability on Statistiscs per Site Table
It is possible to hide various parts of the GUI at LOT runtime, while the test system is RUNNING, not
PAUSED or STOPPED. When LotInit begins, selected parts of the GUI can be hidden, thus enhancing
other views such as charts, or tables.
Outside of LOT runtime, the screen appears as it always has. These choices can be saved to a file and
then they become the default. See Figure 6.49.
Figure 6.49: Customizing GUI Display Details
The Wafermap page now has two buttons that allow zooming in and out. Thus the wafer map can be made
larger or smaller.
Test Statistics Page Enhancements
Changes to the GUI support new choices.
Figure 6.50: Changes to Test Statistics
Limited view - the user can now selected test to view and test to hide on the test statistics view. To do this,
click on the View Options button located on the Test Statistics View page.
Figure 6.51: Test Statistics View
118 PN: 73-01003-00, November 2008

You are then presented with a page of check boxes for each test (based on a loaded limits file) that can be
viewed, or hidden.
Note that the tests that are selected are the tests to HIDE. After selecting the tests to hide, click on OK.
After the current DUT is finished testing, and as the next device starts testing, the view will change.
Figure 6.52: Test Statistics - Hidden Tests Options
Highlighted View - the highlighted view allows the user to select tests that will be highlighted with a blue
background, and white font. This makes it easier to spot specific tests of interest. After clicking on the
Highlight Options button, you are presented with a screen similar to the hidden view options form.
The test you select (checked) are then highlighted the next time a DUT starts testing.
Figure 6.53: Highlight Tests Option
Control of statistics page from the program
Pending examples.
The test engineer can also control the appearance of the statistics page from within the program:
TEST STASTISTICS GRID - added capability to pre define the test stat cells for test numbers. See
functions PreAssignFromFile, PreAssignReset and PreAssignSet.
TestStatisticsForm->PreAssignReset() - resets any previously defined cell assignments.
TestStatisticsForm->PreAssignSet(tn) - as this function is called, it assigns the cell starting at the top.
Subsequent calls move down the grid cells.
TestStatisticsForm->PreAssignFromFile(AnsiString filename) - this file is just the list of test numbers, one
per line, in the order that they should appear on the test stat grid. However, the first line must be the current
value of the pre assign library version, which is currently the number 1.
Any tests not "pre assigned" using the file or the direct method will be assigned a cell as the test is run.
Production GUI RAM and hard disk usage display

The following functions and variables are available:
bool AllowMemoryCheck;
unsigned LowDiskThreshold;
unsigned LowMemoryThreshold;
unsigned MemoryCheckFreq;
void CheckForAvailableMemory();
void ShowAvailableMemory();
The defaults are:
AllowMemoryCheck=false
LowDiskThreshold=100;//MB
LowMemoryThreshold=1000;//MB
MemoryCheckFreq=50;//devices
The StatusBar on the Production GUI shows the available RAM and available DISK space. An alarm is
enabled by setting 'AllowMemoryCheck'=true. Then, it will check the RAM and DISK space every
“MemoryCheckFreq;;” devices. If the RAM falls below the 'LowMemoryThreshold' threshold or the DISK
space falls below the 'LowDiskThreshold', then a warning message is displayed to the user.
The values are displayed on the second Statusbar, which autosizes for various display resolutions. See
Figure 6.54.
Figure 6.54: Values Displayed on Second Status Bar
The variable AllowMemoryCheck defaults to OFF to prevent nuisance alarms, but you can turn it on in
program code if you want. Observing the RAM usage over time is one way to visually detect memory leaks
before the program consumes all RAM and crashes.
Obtaining Datalogs, Summaries, Histograms, and TDA Files
At any time during testing, the operator can click on the Partial Summary button and obtain any of these
data files. You can save these partial files, or print them out.
120 PN: 73-01003-00, November 2008

Operations Environment Production GUI RAM and hard disk usage display
Running the Test Program
You can click on the Start button and the test program should start up. You may be prompted to whether
you want to Boot the test head or not, depending on the preset Customer Preferences. If you haven't yet
booted the tester, it will automatically force a boot. Once the boot is completed (assuming you selected
YES if given a choice), the test program will begin. If you are still using a BLANK generic test program, you
should get BIN 1 and passing 100%. To STOP the test program, click on the End Lot or the Pause button.
You'll be asked to confirm this before the lot is ended, if the preferences were so set. To exit the test
program, click on the Exit button. That's it, you're done.
Other Custom Tab Sheets - Quick Tool Pull-down Menu
Voltmeter Memory Plots

In previous library versions, only one test could have its measvm results viewed in a plot. This plot was
also a modal plot, that is, it halted the application and waited for the user to close the form before the test
program continued. Now in rev503, the user can select as many tests as they desire to watch the measvm
results. Further, the plots are refreshed each time through a test loop, and the test program does not stop
and wait for the user to close any forms. That is because the measvm plots that are being viewed are part
of the KVD Main GUI. To select tests to view the measvm results, go to the Quick Tools menu item, then
select the MEASVM Plot menu item. It brings up a dialog similar to the histogram dialog.
Figure 6.55: Select Tests to Plot MEASVM
As expected, select the tests you want to view by checking the appropriate box, or cancel viewing a test by
unchecking the appropriate box. Click on OK, and you'll see a plot like the example below.
Figure 6.56: MEASVM Results
The plot can be saved or printed. You can also view the individual measurement values by turning on the
Show Value Labels options. The plot will change each time the test is executed.
Graphical Histograms
We've added the capability to watch histograms of any test number in real time. The graphical histograms
are easy to use. Under the Quick Tools menu item, select the Histogram By Test Number menu item.
This brings up the following dialog screen.
Figure 6.57: Histogram Plot Selection
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Select the tests that you want to view histograms on. As data is collected, if the test is selected (checked)
then the histogram plot will be updated in real time. You can view as many histograms as you want. To
remove a histogram plot, just bring up this dialog again, and uncheck that test. Here is an example:
Figure 6.58: Test Results
The Options button brings up a dialog box that allows you to change the upper and lower boundaries (for
viewing) and the number of bins (slots) for the histogram plot. You can also print a histogram to the current
default windows printer by clicking on the Print button. In the case of really bad low data, or really bad high
data (data which falls far outside the predefined test limits), the plot will record these in the upper or lower
ERROR slots.
Conditional Breakpoints
Runtime Breakpoint Events
A test program can be halted, and the operator/engineer notified, if the test program encounters any of the
three following events:
• On Test Number
This event is launched whenever the test number selected becomes the current test number.
Figure 6.59: Break on Test Number
The event will trigger the following screen to appear.
Figure 6.60: Runtime Breakpoint Event

At this point, the test program is halted, and the engineer can determine whatever course of action he
so chooses.
• On Fail Any Test
Occurs if ANY test fails. As soon as the test is completed, and the determination has been made that
the result is outside the test limits, this event is triggered. The page seen above will be displayed.
• On Fail Test Number
This is a combination of the previous two events. When a test fails, and the test number failing is the
selected test number, the above screen will be shown.
Figure 6.61: Break on Failing Test Number
124 PN: 73-01003-00, November 2008

Figure 6.62: Runtime Breakpoint Event
Track Result by Test Number

This is a previously undocumented improvement to the production GUI, also under the Quick Tools.
Figure 6.63: Track Result by Test Number
Handler & Prober Configuration and Control
TEL
If your Customer Preferences are set in Engineering Mode (instead of Production Mode), and you are
using the most recent TSK or TEL Multipass Prober DLL, an additional Menu pull-down item appears,
labeled Handler.
Figure 6.64: Handler Menu
If you enable Handler Engineering Mode, an additional GUI form will appear with four tabs.
Figure 6.65: Prober Engineering Form Screen
Tab Description
INDEX Allows control over stepping from die to die, moving to any designated die X
and Y location, setting active sites, starting a test sequence, Z-up or Z-DOWN,
ending the lot, or exiting the engineering tool.
CONFIG This is a display only (not control) page that displays the current die location,
totalsites, reference die x and y, die height and width, and chuck temperature.
126 PN: 73-01003-00, November 2008

Operations Environment Handler & Prober Configuration and Control
Tab Description
WAFERS Displays the contents of two cassettes, and allows control over wafer loading
and unloading, alignment, and a clean probe function.
PROBECARD A display GUI for probe needle layout.
Support for the TEL P8 Prober includes the following configuration settings in the file
C:\_kvdco_CustFiles\Handlers\TelP8ProberMultiPassCfg.ini.
[PARAMETERS]
; The probers primary GPIB address
GpibAddress = 5
; Time to wait after prober's SOT before testing starts

SotDelayTime = 0e-3
; WaferNumberType = 0 is to disable wafer number reading from prober

; WaferNumberType = 1 is for 12, where wafer num is 12
WaferNumberType = 1
; Offset all X/Y die location to 0,0 references

UseZeroBasedReferences = 1
; Prober lot numbers, or application based lot numbers

UseProberLotNumbers = 1
; Retest flagged bins at end of wafer before unloading

RetestFlaggedBins = 1
; Issue load wafer command at start of lot

WaitForWaferLoad = 1
; Unload wafer at end of lot if still on chuck

UnloadWafer = 0
; Turn on prober light tower on consecutive fails

EnableProberAlarms = 0
There is also a prober simulator feature in the .ini file:
; Simulate prober emulates prober hardware when no prober exists. No GPIB

; commands will be issued. A total of TotalSimulateWafers will be tested.
; The SimulateProberLocationNumber is the probe card layout.
TotalProberSites
; is all possible test sites on the probe card. This is used along with
the
; location number to get the probe card layout from the
TelP8ProberDieOffsets.ini
; file. Use a total prober sites of 999 for "free multiple probing"
SimulateProber = 0
StartingWaferNumber = 10
TotalWafers = 1
WaferIncrement = 2
TotalProberSites = 1
ProberLocationNumber = 0
ReferenceDieX = 12
ReferenceDieY = 51
DieHeight = 5.58
DieWidth = 5.58
Additional TEL-TSK Driver Low-level Commands
Driver Commands:
short HANDLER->SetTemperature (unsigned Site, double Temperature);

double HANDLER->GetTemperature (unsigned Site);
short HANDLER->GotoLocation (int X, int Y);
short HANDLER->GetCurrentLocation (int &X, int &Y);
short HANDLER->Contact (unsigned Site);
short HANDLER->Uncontact (unsigned Site);
void HANDLER->writestring(char* TheString)'
char* HANDLER->readstring(void);
short HANDLER->getstatus(void);
Use these commands with great care. There is a large potential to cause flow problems within the handler
driver. This is especially true of the readstring and writestring commands. Only do the getstatus() to receive
a status that you expect from your writestring and readstring commands. If you get a status that does not
"belong" to your sent commands, it might cause an important status to be missed inside the driver flow.
TSK
The TSK prober driver has been enhanced (access this mode by clicking the "Handler" button at the top
menu of the Production GUI) to offer an off-line simulator and an engineering mode for fine control over
prober functions.
Site-swapping on Multitest 93xx and Aetrium V8 Multisite

Handlers
For maximum flexibility, KVD can accommodate site-swapping on these quad site handlers, and can be
configured as follows:
Site reversal is controlled by a keyword in the Cfg.ini file. Setting "ReverseSites = 1" will enable the
reversal, setting "ReverseSites = 0" will disable it. The default mode is 0 for both drivers, which will be the
Multitest default site layout.
Another launcher setup special fields keyword has also been added to these two drivers. That is
"HandlerCfgFile=". Use this to override the default Cfg.ini filename and path within the driver. This can
allow each setup file to specify a different Cfg.ini file. You can make one that has reversed sites, and one
that does not.
Multitest
Support has been added for GPIB control of the Multitest 93xx handler, with suitable trace statements for
communication debugging.
128 PN: 73-01003-00, November 2008

7. DC Instruments
MPDCMOD and MPDCMODHI (Octal DUT Source)
MPDCMOD Pictorial
Figure 7.1: MPDCMOD Pictorial
The MPDC Module (MPDCMOD) contains eight ground referenced DC Sources and one floating user
voltmeter. Each DC source is an independently programmable, four quadrant, Kelvin, DC voltage and
current source which can be connected to the device directly or through relay networks on the Father
Card. Sources are numbered beginning at 0 (zero) not 1 (one).
Gnd
Sense F S FS FS FS FS FS FS FS Hi Lo
0 1 2 3 4 5 6 7 UVM
Figure 7.2: MPDCMOD DC Sources and UVM
Programming and Operations DC Instruments
The sources offer four voltage ranges ± 40V, ± 20V, ± 10V and ± 5V, and five current ranges: 200mA
(400mA for the MPDCMODHI) , 20mA, 2mA, 20uA, and 200nA. The force and sense line of each source
connect to the Father Card through a Hypertronics connector. Each DUT Source has a voltmeter/ammeter
that is dedicated to making voltage and current measurements. This meter is a 16 bit sampling converter
(4K sample memory) with variable clocking. Because this voltmeter is designed to measure the state of
each of the DC sources, it has no connections to the Father Card. This is commonly known as the SVM, or
Source VM.
There is also a precision differential voltmeter located on the MPDCMOD. This voltmeter is the commonly
referred to as a UVM, for User Voltmeter. This voltmeter has its inputs routed directly to the Fathercard
through the Hypertronics connector and can be connected to the device directly or through relay networks
on the Father Card, or a mux on the instrument itself to internal points. The floating voltmeter features a 16
bit A/D, variable sampling rate, differential or single-ended input stage, programmable DC offset and
multiple gain stages.
loopcomp(fast/slow);
remote_kelvin();
setir(value,range); local_kelvin();
seti (value);
setvr(value,range);
setv (value);
null Power on_force();
point Amplifier off_force();
Level DAC irange(range);
FORCE
Buffered
Gnd Sense 10 on();
MOhm
off();
Diff Amp
Force I Mode
VOLTAGE SENSE
RANGE
Force V Mode CONTROL on_sense();
vrange(range); off_sense();
ADC vmeter();
mux 1 of 8 imeter();
measvm(samples);
Gnd Sense Buffered
from DUT Gnd Sense
Vmin Ineg
vclamp(min_val,max_val); iclamp(symmetric_val);
local_groundsense();
Vmax Ipos remote_groundsense();
Clamps Ground Sense Buffer
Figure 7.3: MPDCMOD Block Diagram With Software Commands
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DC Instruments MPDCMOD and MPDCMODHI (Octal DUT Source)
Physical Description
The MPDC Module is composed of a D/A converter which feeds a high power operational amplifier. This
power op amp has two possible feedback loops. The first feedback path is used when the source is forcing
voltage and connects the op-amp's output to its own negative input. This feedback path senses the output
voltage and holds it constant. The output of the power amplifier is referred to as the force line and the
voltage feedback path is called the sense (or Kelvin) line. The force and sense lines can be connected
directly at the output connector by a relay or can be wired independently and tied together close to the
device to eliminate the effects of path resistance.
The second op amp feedback path is used to force (source or sink) current. This path uses a differential
amplifier to sense the voltage drop across a selectable resistor in series with the power op amp output.
Due to the nature of this sense connection, the feedback path does not require any type of remote
connection to ensure accuracy. Current ranges on the MPDCMOD are defined by a resistor network on the
output of the power op amp.
Voltage clamps are independently user-programmable and current limiting is also user programmable.
Control logic, including address decoding and serial data return bus generation, are contained within a
single on-board FPGA. The MPDC Module FPGA must be booted with a firmware data file each time the
test head is turned on, and this is normally handled automatically with no user intervention required.
MPDCMOD Objects
The MPDS class defines MPDCMOD source objects as one of three types:
• TMPDS - used for individual control
• TGroupMPDS - used to control a group of sources with one defined name
• TSiteMPDS - used to control a set of sources in a multisite test program
You are free to declare your own name for a resource, as many test engineers do in a file named
connections.cpp, such as declaring:
TMPDS *VREF;
void UserConnections() {
VREF = MPDS[4];
VREF->setname("VREF");
}
The setname command (also documented in “Changing the Resource Names

Shown in the RTI” on page 100) is designed to allow the RTI to display your
designated name instead of the system resource name for ease of debugging.
Force Voltage
Once the Kelvin connection has been selected, the source can be used to force a voltage up to it maximum
output specification, subject to the programmed voltage clamp.
Note: Amplifier limitations reduce the maximum forced voltage to somewhat less than the DC supplies in
your particular configuration. In the typical configuration, with +40V, -20V DC supplies, you will
obtain a maximum voltage capability of +36V to -16V.
MPDS[i]->setv(value);
Example:
MPDS[1]->setv(1.20);
The argument [1] is the DUT Source within the test head (1 of 32, but they are numbered [0] through [31]).
Force Current
The MPDCMOD may be set to force any current up to 190mA (380mA for the MPDCMODHI), subject to
the programmed current clamp. Always make sure the clamps are programmed to be "out of the way" of
the forced value, which means slightly higher, outside the guardband of the specifications.
MPDS[i]->seti(value);
Example:
MPDS[1]->seti(0.100);
Voltage Ranges
Range Index Maximum Variable Names
0 ± 40V mpvr_40v
1 ± 20V mpvr_20v
2 ± 10V mpvr_10v
3 ±5V mpvr_5v
You can set the voltage range explicitly if you wish using the range index, or its alternate variable name, in
the setvr and vrange commands. Setvr sets both the value and the range in one command, while vrange
affects only the desired range. These are examples of valid statements only; please also see “MPDCMOD
and HPDCMOD Ranging Lockout” on page 211 for an important discussion of the order in which you are
required to perform certain ranging functions.
MPDS[i]->setvr(value, range);
MPDS[i]->vrange(range);
Example:
MPDS[1]->setvr(1.20,3);
MPDS[1]->setvr(1.20,mpvr_5v);
MPDS[1]->vrange(3);
MPDS[1]->vrange(mpvr_5v);
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Current Ranges
Range Index MPDCMOD Variable Names
0 200mA mpir_200ma
1 20mA mpir_20ma
2 2mA mpir_2ma
3 20uA mpir_20ua
4 200nA mpir_200na
The current range setting is handled automatically when forcing current using the seti command, however,
when using setv to force a voltage it may be desirable to change the current range. Note there are two
gaps in the ranging, at 200uA and 2uA, due to space limitation on the instrument.These are examples of
valid statements only; please also see “MPDCMOD and HPDCMOD Ranging Lockout” on page 211 for an
important discussion of the order in which you are required to perform certain ranging functions.
Pending explanation of iranges for 400ma MP.
MPDS[i]->setir(value, range);
MPDS[i]->irange(range);
Example:
MPDS[1]->setir(0.018,1);
MPDS[1]->setir(0.018,mpir_20ma);
MPDS[1]->irange(1);
MPDS[1]->irange(mpir_20ma);
Warning! The test engineer MUST take extreme care to avoid hot-switching any range relays. For
enhanced execution speed, KVD software drivers do not enforce supply disabling or
discharging, or include any built-in delays, trusting the test engineer to know when they are
safe from the risk of hot-switching. Enlightened use of delays is REQUIRED to avoid the
possibility of instrument or DUT damage.
Voltage and Current Clamps
For each source, the voltage and current clamps are programmable. Current clamps are symmetrical (one
programmed value is used for both positive and negative current clamps) while the voltage clamps require
the user to program two values, a lower and an upper clamp.
MPDS[i]->vclamp(lower value, upper value);
MPDS[i]->iclamp(value);
Example:
MPDS[1]->vclamp(-4.0,12.0);
MPDS[1]->iclamp(0.10); // value in Amps
Note: Clamps in the KVD sources are not used for programming precision levels of current or voltage.
They are meant for protecting against uncontrolled transients (current spikes into a short or
voltage spikes into an open). Note also the accuracy specs of the clamps, which makes the lowest
reasonable current clamp to be 20mA. Any time your clamps are set too closely (within the spec
guardband) to the programmed seti or setv values, you run the risk of having the clamps activate
and prevent your level from being achieved.
Kelvin Connections
Each source has separate Force and Sense relays, and a separate relay to short them out locally in case
the user does not wish to being both lines separately to the DUT. They can be configured in flexible ways,
depending on your design for the Father Card and DUT boards.
Examples:
MPDS[i]->on(); //closes both force and sense
MPDS[i]->off(); //opens both force and sense
MPDS[i]->off_force(); //opens force only
MPDS[i]->off_sense(); //opens sense only
MPDS[i]->on_force(); //closes force only
MPDS[i]->on_sense(); //closes sense only
MPDS[i]->local_kelvin(); //shorts F & S locally
MPDS[i]->remote_kelvin(); //opens F & S short
Warning! The on and off commands are not electronic gates as on some other testers. They close and
open relays on a source that may be running, and they should not be hot-switched. Include a
delay after using any of these commands to allow the relays to settle, then turn on the current
or voltage from the source. Also note that the source requires local_kelvin to be stable in
forcev mode, so whenever you command the output connect relays to go off, make sure you
206 PN: 73-01003-00, November 2008

program local_kelvin first, with a suitable (0.5mS) delay. After commanding the output connect
relays on, and waiting a delay for them to close, you can command remote_kelvin if you need
full force and sense connections to your DUT.
Administrative Commands
To place an MPDCMOD channel into a known safe state, issue the reset command.
MPDS[i]->reset();
Example:
MPDS[2]->reset();
//sets local kelvin, opens
//F & S relays, sets irange
//to 3, current clamp to 10ma
//voltage clamps -35V, +35V,
//fast loop comp, force 0.0V
//acquire rate to 15000, and
//sets meter to measure v,
Earlier versions of the system software supported an inhibit/enable function, but that support has been
deleted because of unintended (and possibly damaging) side effects from the source feedback loop being
disconnected.
For a slower loop settling time, in case of high load capacitance that might encourage oscillation, use the
loopcomp command. Slew rate is dependent on the voltage range in use, and should be characterized by
the test engineer if it's critical, but generally, fast is about 1mS slew rate for a normal voltage delta, and 7-
10mS for slow.
Example:
MPDS[i]->loopcomp(0); // 0 = fast, 1 = slower

To use Ground Sense (the defined Zero Voltage Reference for the "ground" side of the source and A/D
converters) from the Father Card (which should be connected at the proper place on the DUT), you want to
use the remote_groundsense command. For using a local analog ground instead, use
local_groundsense. Issuing either command for any one channel on a board will act upon all channels of
that board, and affect all channels in the system.
The hardware implementation of this is shown on the block diagram in Figure 7.3. The DUT Ground Sense
is clamped to one diode drop from Analog Ground, and the relay shorts the two together. Thus you can see
that a short on one instrument will affect all instruments via their common father card connections.
Typically, this command is only required in calibration and diagnostic programs where a father card is not
guaranteed to be present. For best forcing and measurement accuracy, the test engineer should be
managing their own DUT Ground Sense connections properly.
Example:
MPDS[i]->remote_groundsense();
MPDS[i]->local_groundsense();
Measure
Each DUT source can measure the voltage or current present at its I/O pins using the Source VM.
You first have to set up the converter to be connected in voltage mode or current mode, choose an acquire
rate (between 200 and 66000 samples/sec.) or accept the default rate of 15000, then issue the measvm
command, with a number of samples (1 to 4096) to average. For a single-site test program, the result is
placed in the variable SITE->lastresult.value. This is automatically the variable that the
KVD->Test;; command checks against the upper and lower limits for the test. If you are running a multi-site
program, then the result is placed in the SITE->results array for your later use if you wish to separate
the site results.
MPDS[i]->vmeter();
MPDS[i]->imeter();
MPDS[i]->acquire_rate(rate);
MPDS[i]->measvm(numsamples);
Example:
MPDS[1]->vmeter();
or
MPDS[1]->imeter();
then
MPDS[1]->acquire_rate(15000);
then
MPDS[1]->measvm(200);
Note: There is a single A/D converter for measuring source voltage, and another for measuring source
current. Each one is switched among the eight channels by its own mux. Therefore, you must
remember to make a measurement and process the result after you choose a channel, and before
you configure the SVM to measure the next channel.
Note: Measurement errors and alarms are as follows ---

Overrange positive: +999
Overrange negative: -999
Timeout during one or more conversions: -998
Currently, these readings are included in statistical analysis reports, which may skew some
reports. This may change in future releases
208 PN: 73-01003-00, November 2008

Warning! Due to software implementation, the calibration factors for any range are latched into the
measurement routine at the time the vmeter or imeter command is executed, not when the
meavm is executed. Therefore it is very important to not change the V or I range AFTER
issuing the vmeter or imeter statement.
Thus the following code would NOT work:
Source0->setvr(0.0,3);
Source0->vmeter(); // set the v mux for source0

Source0->measvm(10); // BREAKS!!! uses cal factors for source0,

// but mux is connected to source1 !!!
Source1->measvm(10); // correct measurement of source1
The following code WOULD work:

KVD->Test();

KVD->Test();

Source1->imeter(); // set the i mux for source1
Source0->measvm(10); // correct v measurement of source0

KVD->Test();
Source1->measvm(10); // correct i measurement of source1

KVD->Test();
ABUS Connection to Digital Pins
One MP source on each instrument can be connected to a test head motherboard bus called the ABus,
which also goes across to each of the instruments in the digital subsystem. Any digital channel can
connect to the ABus by way of a pin-level command, and then you can connect MPDS[0] to the bus or
disconnect it from the bus
MPDS[i]->backplane_con(unsigned condiscon)
Example:
MPDS[0]->backplane_con(con); //connects
MPDS[0]->backplane_con(discon); //disconnects
Previous KVD software included the following functions for the same purpose, but they are not as self-
documenting for anyone just examining the test program source. Please do not use these deprecated
functions in new programs:
MPDS[0]->aux_relay(8,8); //connects
MPDS[0]->aux_relay(0,8); //disconnects
This is useful for continuity or parametric measurements on digital pins, although the DIGMOD instruments
also have built-in PMUs for the same purpose. You can also use the ABus as a cross-connect to short out
multiple digital pins and also to an MP source - do this with extreme care.
DDBusA
5 0
0-
OD
OD CM
IGM n] D
P [0]
D [ M DS
CH P
DD M
Test Head Motherboard
Figure 7.4: Test Head Motherboard
Other MPDCMOD Functions
MPDS[i]start_measvm(numsamples, delay)
MPDS[i]read_measvm(numsamples)
MPUVM objects already had this function, but it has been extended to the MP channels. The standard
measvm command waits until the measurement completes before returning a result and moving on. If you
initiate a measurement with start_measvm, control comes back right away so you can perform parallel
measurements (on different MPDCMOD instruments - remember there is only one ADC per instrument), or
do other operations such as burst a pattern for IDDQ measurements. When you wish to read back the
calculated results, just issue the read_measvm command.
Example:
MPDS[2]->start_measvm(256, 10e-3);
MPDS[2]->read_measvm(256);
Note: The resulting measurements are available in variables owned by the object: result, result_rms,
result_min, result_max.
210 PN: 73-01003-00, November 2008

MPDCMOD and HPDCMOD Ranging Lockout
There is a ranging lockout feature on the MP and HP instruments, such that when you are in a particular
force mode (voltage or current) you can not change the range of that mode; you can however change the
range of the mode opposite of that being forced; thus the following:
// place the source into force voltage mode

MPDS[1]->setvr(6.5, mpvr_10v); // we are now in vrange 2
MPDS[1]->irange(mpir_20ma); // this is legal, we are now in
irange 1
// place the source into force current mode

MPDS[1]->setir(15e-3, mpir_20ma); // we are now in irange 1
MPDS[1]->vrange(mpvr_40v); // this is legal, we are now in
vrange 0
// place the source into force voltage mode

MPDS[1]->setvr(6.5, mpvr_10v); // we are now in vrange 2
MPDS[1]->vrange(mpvr_20v); // ILLEGAL!, error code returned,
no action taken
// place the source into force current mode

MPDS[1]->setir(15e-3, mpir_20ma); // we are now in irange 1
MPDS[1]->irange(mpir_200ma); // ILLEGAL!, error code returned,
no action taken
Additionally the acquire rate register applies to ALL sources and the UVM, but can be modified by ANY
source or the UVM.
Thus the following code would NOT work:
Source0->acquire_rate(10000); // set the sample rate register


Source0->measvm(10); // BREAKS!!, measurements taken at
15000 rate


Note: Both the vrange and the irange commands post a warning message to the KVD Status memo
whenever the situation occurs that a vrange change is attempted while in FORCEV mode, or an
irange change is attempted in a FORCEI mode.
MP Readback Functions
MPDS[i]->actual_sample_rate
double actual_sample_rate;
MPDS[i]->Exists
unsigned Exists;
Description:
Boolean that returns true if the source channel exists in the TCT (Tester Configuration Tool).
MPDS[i]->mpdsirange
unsigned mpdsirange;
Description:
Presently active Irange.
MPDS[i] >mpdsloopcomp
unsigned mpdsloopcomp;
Description:
Presently active loopcomp.
MPDS[i] >mpdsmode
dsfmode mpdsmode;
Description:
Presently active MPDSMode (ForceV, ForceI).
MPDS[i] >mpdsval
double mpdsval;
Description:
Presently active Force MPDSValue.
MPDS[i] >mpdsvrange
unsigned mpdsvrange;
Description:
Presently active Vrange.
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MPDS[i] >ResourceSide
unsigned ResourceSide;
MPDS[i] >ResourceSlot
unsigned ResourceSlot;
MPDS[i] >result
RESULT result;
Description:
Each DS will hold its own measured results.
MPDS[i] >vmmode
vmconmode vmmode;
Description:
Presently active Voltmeter Connection.
MPDS[i] >get_board_local_groundsense
bool get_board_local_groundsense();
MPDS[i] >getname
AnsiString getname();
Description:
getname returns the name of the resource
MPDS[i] >read_temperature
Reads one sample from the ds1722 temperature sensor; returns value in degrees Centigrade.
double read_temperature(void);
Returns:
0 - success
Description:
Value returned is from the single temperature sensor on the respective MPDCMOD circuit board (only one
sensor per board). The sensor is located centrally on the circuit board.
Threshold searching
SiteClass and MPDSClass have functions for threshold searching. Pending examples.
short TSiteMPDS::active_this_test(bool bysiteactive[])
Setup the ActiveThisTest variable
short TSiteMPDS::setvr_array(double val[MAX_SITES], range);
Setup each source in a site to a different value:
short TSiteMPDS::incv(double increment)
Increments the current set voltage by increment on all sites that are active per SITE->IsActive and the
ActiveThisTest control flag. This will stay on the same range and will execute faster than a setv or setvr.
short TSiteMPDS::measvm_threshold(unsigned nummeas, double threshold,

unsigned abovebelow)
Does a faster version of measvm (not setting the vmeter/imeter and other things).
If a site is above (or below) the threshold it sets the ActiveThisTest variable false, shutting it down for the
rest of the test. Will return true when all the sites are disabled for the test, meaning reached the threshold
or were not active in the first place.
short TSiteMPDS::getv(double val[MAX_SITES])
Returns the current set voltage for each source. Also moves this to
SITE->results[site].value;
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DC Instruments User Voltmeter (UVM)
User Voltmeter (UVM)

A wide range of flexible ranges are available for this resource.
Figure 7.5: MPDCMOD User Voltmeter With Software Commands
Each floating User Voltmeter (UVM) can measure voltage only, on multiple ranges, that appear on
separate pins brought out to the Hypertronics connector, or various points internal to the instrument.
The gain stages are programmed in ranges as follows, with predefined constants available for ease of
reading the code later, and modification in the debugger.
Range Index Maximum Signal Variable Names
0 ± 10 V uvmvr_10v
1 ±5V uvmvr_5v
2 ± 2.5 V uvmvr_2p5v
3 ± 1.25 V uvmvr_1p25v
4 ± 625 mV uvmvr_625mv
The offset DAC can be programmed over a dynamic range of ± 40 V.
Connections can be made either single-ended (with a pre-defined name "se"), or differentially ("diff"). If you
choose single-ended, you can program a constant offset for the low side comparison, or allow it to be the
default 0.0 V by not entering an optional value in the uvmeter statement.
The high side connections must be chosen from a list as follows:
1. User HI Input (from Hypertronics)

2. Any of the eight channels of the MPDS (sense lines) - numbered 0-7
3. MPDS0 - Force line
The low side connections can be chosen from a list as follows, if you are using a differential scheme:
1. User LO Input (from Hypertronics)

2. Any of the eight channels of the MPDS (sense lines) - numbered 0-7
3. MPDS1 - Force line
The internal connections to the sense lines are not a calibrated or normalized/scaled path unless you
perform a focused cal yourself, so this is a non-standard use of the instrument. By far the most common
use is the Father Card Hypertronics connections.
MPUVM Objects
There is one UVM per MPDCMOD instrument board (typically four per test head maximum), so the index
number on the object such as MPUVM[0] refers to the instrument, not one of the MPDS sources. The
MPDS class defines MPUVMs as one of two types:
• TMPUVM
• TSiteMPUVM
You are free to declare your own name for this resource, as many test engineers do in a file named
TMPUVM *VOUT;
VOUT = MPUVM[0];
VOUT->setname("VOUT");
}
The setname command (also documented in “Changing the Resource Names Shown in the RTI” on
page 100) is designed to allow the RTI to display your designated name instead of the system resource
name for ease of debugging.
MP UVM Measure
The User Voltmeters are defined as to the MP Instrument they are located on. Thus there are up to five
UVMs in a test head, numbered MPUVM[0] through MPUVM[4].
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You must set up the UVM input connections, and program the measurement mode (single-ended or a
differential) and range, choose an acquire rate if you desire something different from the default 15000
samples/sec. (between 200 and 66000 samples/sec.), then issue the measvm command, with a number of
samples (1 to 4096) to average. For a single-site test program, the result is placed in the variable
SITE->lastresult.value.
This is automatically the variable that the KVD->Test(); command checks against the upper and lower
limits for the test. If you are running a multi-site program, then the result is placed in the SITE->results
array for your later use.
There is a single uvmeter command that also allows the reference (offset) voltage of the UVM to be
programmed as the [optional] third argument. If omitted, the offset is set to 0.0V.
If differential mode is active, for improved accuracy, the third argument may be set to the expected
common-mode voltage level of the UVM. The first argument is the mode (0 or diff for differential, 1 or se for
single-ended), and the second argument is the measurement voltage range index or the associated
variable name from the chart above.
Pending: More function prototyping
Examples:
MPUVM[0]->uvmeter(1,2,+10.0); //se mode,vrange 2,

// 10.0V Offset
is equivalent to
MPUVM[0]->uvmeter(se,uvmvr_2p5v,+10.0);
MPUVM[0]->uvmeter(0,4);
is equivalent to
MPUVM[0]->uvmeter(diff,uvmvr_625mv);
MPUVM[0]->uvmeter(diff,uvmvr_312mv,+7.5);
If you just wish to change the range of the MPUVM and not the mode or offset, use the vrange function
with the argument taken from the Vrange chart given above.
MPUVM[i]->vrange(range);
Example:
MPUVM[1]->vrange(1);
The command cmmeter is available with the following features:
It determines the common-mode voltage of the UVM's inputs, then calls uvmeter() using the Vcm just
determined. The search algorithm requires that the differential voltage between the UVM's inputs be less
than the voltage supported by the specified Vrange (specified via the only input parameter to the
cmmeter() function). After determination of the actual common-mode voltage of the inputs a uvmeter()
function is automatically called specifying differential mode, the same Vrange as specified in the presently
active cmmeter() function call, and the common-mode voltage just determined.
The purpose of this command is to allow a semi-automated way to compensate for a common-mode
accuracy factor included in the specifications of the instrument. By measuring the common mode factor
first, the accuracy of the gain amplifiers can be enhanced by this predictive algorithm. For the utmost
accuracy, a focused calibration done by the test engineer with your exact DUT board hardware and relay
connection paths is always recommended.
Example:
MPUVM[0]->cmmeter(uvmvr_625mv);
The series of detailed commands for accomplishing UVM functions are given here:
Example:
First issue the reset command if you are not certain what state the UVM is when you are starting to use it.
The reset state is the 10V measurement range, differential, User inputs.
MPUVM[0]->reset(0);
Then set up the mode and range:
MPUVM[0]->uvmeter(se,<range>,[optional offset]);
OR
MPUVM[0]->uvmeter(diff,<range>,[optional commonmode value]);
Then if you need to, select which of the high inputs are to be used. In almost all cases, this will be the
"user" input, which is the Hypertronics connection to the Father Card.
MPUVM[0]->uvmhi_is_user();
OR
MPUVM[0]->uvmhi_is_source(4);
OR
MPUVM[0]->uvmhi_is_ds0f();
Then if you are using differential mode, select the low side input:
MPUVM[0]->uvmlo_is_user();
OR
MPUVM[0]->uvmlo_is_source(4);
OR
MPUVM[0]->uvmlo_is_ds1f();
Then, in case you wish to change the sample rate:
MPUVM[0]->acquire_rate(15000);
Finally, issue the measurement command:
MPUVM[0]->measvm(200);

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Currently in 5.03 software, these readings are included in statistical analysis reports.
Readback Functions
MPUVM[i] >getname
AnsiString getname(void);
Description:
getname returns the name of the resource.
Semi-parallel Measurements
Starts UVM measuring <nummeas> samples after <delay>. Can start multiple UVM boards sampling in
parallel. Read back can be started on the first board as soon as all the other boards are started. The first
board is read back at the sample rate speed. The other boards are read back at data bus rates.
Example:
MPUVM[n]->start_measvm(num, delay);
MPUVM[n]->read_measvm(num);
Note: The resulting measurements are available in variables owned by the object: result, result_rms,
result_min, result_max.
Pinouts
Figure 7.6: MPDCMOD I/O Pinout
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DC Instruments QUVM (Quad User Voltmeter instrument)
QUVM (Quad User Voltmeter instrument)

Quad Precision Sampling Voltmeter (QUVM) instrument is available starting with release 5.0.4. Figure 7.7
shows the QUVM instrument board.
Figure 7.7: Quad Precision Sampling Voltmeter (QUVM) Instrument
Features
• 4 High-Resolution Differential Voltmeters

• Superior Instrument Accuracy—0.005% of full-scale range
• High-Speed Sampling Rate—97 kHz per Voltmeter
• Large Sample Sizes—up to 32,768 samples per Voltmeter
• 6 available Differential Voltage Ranges: ±10, 5, 2.5, 1.25, 0.625, 0.312 volts
• High Common-Mode Input—input voltages up to +36/-16 volts (max. differential 10 volts)
• Low Common-Mode Input—input voltages up to ±10 (max. differential 10 volts with a gain of 10
available)
• Adjustable voltage references can be used to offset the inputs for single ended measurements
• Excellent AC capability achieved with an 8-pole, 25 kHz filter
• External Input Clock provides synchronization to other modules, such as DIGMOD
• Self supporting within the KVD test system—no additional instruments needed
• Simultaneous operation of all 4 User Voltmeters, supporting KVD’s commitment to reduced test times
• Synchronous sampling modes
• Optimized for low Temperature-Drift
• 4 Precision Voltage References available as outputs

• Cal-Meter Feed-Through makes differential measurements possible using the cal-meter
Block Diagram
Figure 7.8 shows the block diagram of the QUVM instrument.

Figure 7.8: QUVM Block Diagram
QUVM Specifications
User Voltmeter
Type Differential voltage measurement.

Voltmeters per Board Four
Input Ranges Six user selectable ranges.

Maximum Differential Input ± 10V
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DC Instruments QUVM (Quad User Voltmeter instrument)
Maximum Common-Mode Input +36V / -16V NOTE 1
Configuration Modes
Synchronized 2, 3 or 4 user voltmeters can be configured to provide synchronous

sampling.
Independent All user voltmeters can be configured to sample independently.

Simultaneous All user voltmeter may be operated simultaneously while still
providing full sampling rate and averaging capability.
External Clock An external clock may be provided to allow for variable sampling
rates; input is LVDS signal levels.
External Trigger An external trigger maybe provided to allow for sampling to be linked
to an external trigger event.
Common-Mode Voltage Configurations
Configuration 2 user selectable common-mode voltage configurations.

Independent Configurations are selectable on a per channel basis.
High Common-Mode +36/-16 Volt inputs with 6 user selectable differential voltage ranges.
Low Common-Mode ±10 Volt inputs with 6 user selectable differential voltage ranges that
achieve noise performance superior to that of the High Common-
Mode inputs. A gain of 10 is also available for these inputs.
AC Performance
THD Typical >96 dB

SNR >90 dB
Bandwidth 25 kHz (achieved with a 8-pole filter)
User Voltmeter Measurement
Input Impedance >10MegOhm.

Sample Rate 2 modes available – internal clock (50 MHz) or
external clock (2 MHz to 54 MHz).
4-bit clock divider available Averaging: 1 to 32,768 samples.
User Voltmeter Measurement Ranges
Seven programmable measurement ranges, independently programmable for each voltmeter.
Input Voltage Range Differential Input Range Instrument Accuracy

[of full-scale range](note 4)
0 ± 10 V 0.005%
1 ±5V 0.005%
2 ± 2.5 V 0.005%
3 ± 1.25 V 0.005%
4 ± 625 mV 0.006%
5 ± 312 mV 0.008%
Voltage References
Type Single-Ended, ground referenced.
Output Ranges 3 user selectable ranges.

Maximum Output ± 10V @ 10 mA
Number of Independent Four independent references
References
Reference Connections Each Reference provides Force and Sense connections.
Reference Outputs
Kelvin Output Control DAC 16-bits
Reference Output Ranges
Output Range Instrument Accuracy

[of full-scale range](note 3)
± 10 V 0.005%
±5V 0.005%
± 2.5 V 0.005%
Note 1: Voltage Compliance dependent user selected output voltages of KVD Company’s “PowerPlus”
Power Supply; See “PowerPlus” Power Supply Specification for possible voltage choices; User
inputs are limited to:
Minimum:(NHVF + 4volts)
Maximum:(PHVF – 4volts)
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DC Instruments QUVM Functions
Note 2: HP is a trademark of Agilent Technologies, Inc..
Note 3: Instrument accuracies must be added to the accuracies of the KVD System Calibration Meter to
calculate total system accuracies.
Note 4: Instrument accuracies must be added to the accuracies of the KVD System Calibration Meter to
calculate total system accuracies. Instrument accuracies were obtained by averaging over one 60
Hz power line cycle.
QUVM Functions
Group Object Creation
List of objects may be up to 16 long.
TQUVMMeasClass* QUVMMCreate(AnsiString name, TQUVMMeasClass* src0,

TQUVMMeasClass* src1, TQUVMMeasClass* src2, TQUVMMeasClass* src3,
TQUVMMeasClass* srca, TQUVMMeasClass* srcb, TQUVMMeasClass* srcc,
TQUVMMeasClass* srcd, TQUVMMeasClass* srce, TQUVMMeasClass* srcf)
Example
TQUVMMeasClass* QUADS;
QUADS = QUVMMCreate("QUADS", 0, 1, 2, 3);
TQUVMRefClass* QUVMRCreate(AnsiString name, short src0, short src1, short src2,

short src3, short src4, short src5, short src6, short src7,short
src8, short src9, short srca, short srcb, short srcc, short srcd, short srce, short srcf)
Example
TQUVMRefClass* RAMPS;
RAMPS = QUVMRCreate("RAMPS", 0, 1, 2, 3);
Earlier Code
The following is deprecated code, but supported for backwards compatibility. This category also includes
other functions using objects of the form QUVM[0].
Example
QUVM[0]->Quvmeter(0, QVR_2P5V, 0, QUVM_LORESMODE);

QUVM[0]->DiffInputsUser(channel);
if (QUVM[0]->hslAvail) WriteStatus("QUVM0 HSL OK");

QUVM[0]->LowPassFilter(channel, 1);
QUVM[0]->LoCMGain(adc, 1);
QUVM Measurement Functions
QMEAS[0-15]
Predefined variables for range:

#define QVR_10V 0
#define QVR_5V 1
#define QVR_2P5V 2
#define QVR_1P25V 3
#define QVR_625MV 4
#define QVR_312MV 5
Functions
void TQUVMMeasClass::setname(AnsiString __newname)

Sets the RTI display name for this pin.
short TQUVMMeasClass::uvmeter(unsigned vrange)
short TQUVMMeasClass::uvmeterv(double maxvoltage)
short TQUVMMeasClass::uvmmode(unsigned mode)

Setup one of 4 modes: LOCM_HIRES, LOCM_LORES, HICM_HIRES, HICM_HIRES).
double TQUVMMeasClass::measvm(unsigned nummeas)

Returns average of up to 32K readings.
unsigned TQUVMMeasClass::start_measvm(unsigned nummeas, unsigned int_ext)

Start measvm using external trigger if specified.
short TQUVMMeasClass::clock(unsigned extclk, double freq)

Setup external=1 or internal clocking=0.
short TQUVMMeasClass::con()
Connect differentially to output.
short TQUVMMeasClass::discon()
Disconnect differentially from output.
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DC Instruments QUVM Measurement Functions
short TQUVMMeasClass::connect(short conmask)

0 : Discon : 1 = Low 2 : High : 3 Diff
short TQUVMMeasClass::groundlo(short con_discon)

Ground Lo Input.
short TQUVMMeasClass::groundhi(short con_discon)

Ground Hi Input.
short TQUVMMeasClass::groundcon(short conmask)

short TQUVMMeasClass::calbushi(short con_discon)

Connect Hi Side to Cal Bus.
short TQUVMMeasClass::calbuslo(short con_discon)

Connect Lo Side to Cal Bus.
short TQUVMMeasClass::calbuscon(short conmask)

short TQUVMMeasClass::refconhi(short con_discon)

Connect Reference to ADC Hi Input.
short TQUVMMeasClass::refconlo(short con_discon)

Connect Reference to ADC Lo Input.
short TQUVMMeasClass::refcon(short conmask)

short TQUVMMeasClass::filter(short con_discon)
unsigned TQUVMMeasClass::plottime()
void TQUVMMeasClass::SetSiteMode(bool _sitemode, short site[])
Calculation Functions
Results to be placed in SITE->lastresult.value or SITE->result[site].value depending on

site mode.
double TQUVMMeasClass::rms()
Return RMS value of last measvm.
double TQUVMMeasClass::minval()
Returns minimum value of last measvm.
double TQUVMMeasClass::maxval()
Returns maximum value of last measvm.
double TQUVMMeasClass::fft(unsigned fundbin)

Take FFT of last result place Fundamental value (in V) in SITE->lastresult.value or
SITE->result[site].value.
double TQUVMMeasClass::swfilter(double filter[])

Apply SW Filter to last results.
double TQUVMMeasClass::array(unsigned loc)

Return the real value at location.
double TQUVMMeasClass::magnitude(unsigned bin)

Return magnitude of bin from last fft results.
double TQUVMMeasClass::phase(unsigned bin)

Return phase of bin from last fft results.
double TQUVMMeasClass::thd(unsigned fundbin, unsigned numharmonics)

Return THD from last fft results.
double TQUVMMeasClass::snr(double testfreq, double filterfreq)

Return Signal to Noise from last fft results.
Status Checking Functions
void QUVMMeasClassExists(void)
Example
QMEAS[i]->Exists
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DC Instruments QUVM Reference Functions
AnsiString TQUVMMeasClass::getname()
short TQUVMMeasClass::get_range()
double TQUVMMeasClass::get_ranged()
unsigned TQUVMMeasClass::get_nummeas()
bool TQUVMMeasClass::pinactive(void)
double TQUVMMeasClass::samplerate()
Returns sample rate.
double TQUVMMeasClass::binfreq(unsigned bin)

Returns Frequency value of last measvm().
unsigned TQUVMMeasClass::freqbin(double freq);

Returns bin value of previous measvm().
QUVM Reference Functions
QREF[0-15]
Predefined variables for range:
define QVREFR_10V 2
#define QVREFR_5V 1
#define QVREFR_2P5V0
Functions:
short TQUVMRefClass::setv(double value)

Set Voltage.
double TQUVMRefClass::setvd(double value)

Set Voltage returning double for g_setv.
double TQUVMRefClass::setv_samerange(double value)

Set Voltage on the same range
double TQUVMRefClass::setv_samevoltage(double vrange)

Set Range with same voltage
short TQUVMRefClass::setvr(double value, double vrange)
short TQUVMRefClass::kelvin(short remotelocal)

Put in local=0 or remote=1 kelvin mode
short TQUVMRefClass::con()
Connect
short TQUVMRefClass::discon()
Disconnect
short TQUVMRefClass::condiscon(short con_discon)

Connect/Disconnect with parameter
short TQUVMRefClass::calbus_con(short con_discon)
short TQUVMRefClass::ramp_init(double vrange,double init,double StepSize, double

RampRate,double LowerLimit, double UpperLimit)
short TQUVMRefClass::ramp_exec(void)
double TQUVMRefClass::set_ramp_stepsize(double step)
double TQUVMRefClass::set_ramp_rate(double rate)
double TQUVMRefClass::set_ramp_llimit(double llimit)
double TQUVMRefClass::set_ramp_ulimit(double ulimit)
void TQUVMRefClass::SetSiteMode(bool _sitemode, short site[])
void TQUVMRefClass::setname(AnsiString __newname)
Status Checking Functions
void QUVMRefClassExists(void)
Example
QREF[i]->Exists
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DC Instruments QUVM Reference Functions
AnsiString TQUVMRefClass::getname()
double TQUVMRefClass::get_ramp_stepsize(void)
double TQUVMRefClass::get_ramp_rate(void)
double TQUVMRefClass::get_ramp_llimit(void)
double TQUVMRefClass::get_ramp_ulimit(void)
double TQUVMRefClass::get_setv_value()
double TQUVMRefClass::get_range()
unsigned TQUVMRefClass::get_kelvin()
short TQUVMRefClass::get_is_con()
short TQUVMRefClass::get_is_calbus_con()
External Mux Control Bits
Control external control signals to father card:
short TQUVMBoard::ExtMux(unsigned mask)

Signals appear on SA3 25,26,27,28.
Pending: some additional functions along the lines of:
unsigned TQUVMBoard::VRefConnect(unsigned dac)
unsigned TQUVMBoard::VRefDisConnect(unsigned dac)
HPDCMOD (High Power DUT Source)
HPDCMOD Pictorial
Figure 7.9: HPDCMOD Pictorial
The HPDC Module (HPDCMOD) contains two independent DC Sources. Each DC source is an
independently programmable, four quadrant, Kelvin, DC voltage and current source which can be
connected to the device directly or through relay networks on the Father Card. The sources offer four
voltage ranges of ± 40V, ± 20V, ± 10 V, and ± 5 V, and four current ranges: 5A, 50mA, 500uA, and 5uA.
Currents on the 5A range are power limited. The force and sense line of each source connect to the Father
Card through a Hypertronics connector. Each DUT Source has a voltmeter/ammeter that is dedicated to
making voltage and current measurements. This meter is a 16 bit sampling voltmeter with variable
clocking, differential input, as well as input gain and offset. Because this voltmeter is designed to measure
the state of each of the DC sources, it has no connections to the Father Card. This is commonly known as
the SVM, for Source Voltmeter. Sources are numbered beginning at 0 (zero) not 1 (one), which is similar to
DD Channel resources.
The HPDCMOD has user programmable clamp registers for positive voltage, negative voltage, and source
and sink current. All registers are independently programmable. Future releases will include status
registers, board level temperature information, pulse mode operation, and user programmable power
dissipation monitoring.
HPDCMOD Support for Low Voltage Rails
To reduce unwanted power dissipation in the HPDCMOD instrument, a version is offered with 12 Volt
maximum output. This also requires support in the Tester Configuration Tool, where the instrument is
called HPDCMODLV.
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DC Instruments HPDCMOD (High Power DUT Source)
Figure 7.10: HPDC Module Block Diagram with Software Commands
Physical Description
The HPDC Module is composed of a D/A converter which feeds a high power operational amplifier. This
power op amp has two possible feedback loops. The first feedback path is used when the source is forcing
voltage and connects the op-amp's output to its own negative input. This feedback path senses the output
voltage and holds it constant. The output of the power amplifier is referred to as the force line and the
voltage feedback path is called the sense (or Kelvin) line. The force and sense lines can be connected
directly at the DC Module output connector or can be wired independently and tied together close to the
device to eliminate the effects of path resistance.
The second op amp feedback path is used to force (source or sink) current. This path uses a differential
amplifier to sense the voltage drop across a resistor in series with the power op amp output. Due to the
nature of this sense connection, the feedback path does not require any type of remote connection to
ensure accuracy. Current ranges are defined by a resistor network on the output of the power op amp.
Voltage clamps are independently user-programmable and current limiting is also user programmable. DC
Module control logic, including address decoding and serial data return bus generation, are contained
within a single on-board FPGA. The HPDC Module FPGA must be booted with a special firmware data file
each time the test head is turned on.
HPDCMOD Objects
The HPDS class defines HPDCMOD source objects as one of three types:
• THPDS - used for individual control
• TGroupHPDS - used to control a group of sources with one defined name
• TSiteHPDS - used to control a set of sources in a multisite test program
Force Voltage
Once the Kelvin connection has been selected, the source can be used to force a voltage up to its
maximum output specification, subject to the programmed voltage clamp.
HPDS[i]->setv(value)
Note: Amplifier limitations reduce the maximum forced voltage to somewhat less than the DC supplies in
your particular configuration. The Laser Trim configuration uses ± 30V supplies, so the HP will
operate between ± 26V only, even on the 40 V software range. In the M2m configuration (PW+),
with +40V, -20V DC supplies, you will obtain a maximum voltage capability of +36V to -16V.
Example:
HPDS[1]->setv(5.50);
The argument [1] is the DUT Source within the test head (1 of 12, but they are numbered [0] through [11]).
You are free to declare your own name for this resource, as many test engineers do in a file named
THPDS *VDD;
VDD = HPDS[1];
VDD->setname("VDD");
}
The setname command is designed to allow the RTI to display your designated name instead of the
system resource name for ease of debugging.
Force Current
The HPDCMOD may be set to force any current up to 5A, subject to the programmed current clamp, and to
specified power and energy limits (Instantaneous Watts and cumulative Watt-seconds). Always make sure
the clamps are programmed to be "out of the way" of the forced value, which means slightly higher, outside
the guardband of the specifications. Current versions of the hardware are however limited to 1 Amp
steady-state.
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HPDS[i]->seti(value)
Example:
HPDS[1]->seti(0.850);
Voltage Ranges
You can set the voltage range explicitly if you wish using the range index, or its alternate variable name, in
the setvr and vrange commands. Setvr sets both the value and the range in one command, while vrange
affects only the desired range. These are examples of valid statements only; please also see “MPDCMOD
and HPDCMOD Ranging Lockout” on page 211 for an important discussion of the order in which you are
required to perform certain ranging functions.
HPDS[i]->setvr(value, range)
HPDS[i]->vrange(range)
0 ± 40V hpvr_40v
1 ± 20V hpvr_20v
2 ± 10V hpvr_10v
3 ± 5V hpvr_5v
Example:
HPDS[1]->setvr(4.50,3);
HPDS[1]->setvr(4.50,hpvr_5v);
HPDS[1]->vrange(3);
HPDS[1]->vrange(hpvr_5v);
Current Ranges
Four ranges are available: 5A, 50mA, 500uA, and 5uA. The current range setting is handled automatically
when forcing current using the seti command, however, when using setv to force a voltage it may be
desirable to change the current range.
HPDS[i]->setir(value, range)
HPDS[i]->irange(range).
0 5A hpir_5a
1 50mA hpir_50ma
2 500uA hpir_500ua
3 5uA hpir_5ua
Example:
HPDS[1]->setir(0.275,0);
HPDS[1]->setir(0.275,hpir_5a);
HPDS[1]->irange(1);
HPDS[1]->irange(hpir_50ma);
Warning! The test engineer MUST take extreme care to avoid hot-switching any range relays. For
enhanced execution speed, KVD software drivers do not enforce supply disabling or
discharging, or include built-in delays, trusting the test engineer to know when they are safe
from the risk of hot-switching. Enlightened use of delays is REQUIRED to avoid the possibility
of instrument or DUT damage.
Driver Details for Increased Reliability
KVD instrument drivers include make-before-break current range changing. Using a break-before-make
algorithm, the driver could be slightly faster, but at the risk of opening the current feedback loop during a
range change event. This could cause a transient spike if the range was being changed while hot. Since
KVD cannot control whether or not hot switching is occurring, this transient could be a cause of DUT state
abnormalities or reduced instrument reliability.
By closing the relay for the new range 200uS before the previous range relay is opened, the open-loop
transients should be eliminated.
Note: Due to hardware implementation, the 5A range resistor is always connected to the output force
connection when this highest current range (range 0) is selected. If you need to disconnect the
instrument totally from the father card, you will need to select current ranges 1, 2, or 3 (not 0).
Voltage and Current Clamps
For each source, the voltage and current clamps are programmable. Current clamps are symmetrical (one
programmed value is used for both positive and negative current clamps) while the voltage clamps require
the user to program two values.
236 PN: 73-01003-00, November 2008

HPDS[i]->vclamp(lower value, upper value);
HPDS[i]->iclamp(value);
Example:
HPDS[1]->vclamp(-4.0,12.0);
HPDS[1]->iclamp(0.50); // value in Amps
Note: Clamps in the KVD sources are not used for programming precision levels of current or voltage.
They are meant for protecting against uncontrolled transients (current spikes into a short or
voltage spikes into an open). Note also the accuracy specs of the clamps, which makes the lowest
reasonable current clamp to be 20mA. Any time your clamps are set too closely (within the spec
guardband) to the programmed seti or setv values, you run the risk of having the clamps activate
and prevent your level from being achieved.
Kelvin Connections
Each source has separate Force and Sense relays, and a separate relay to short them out locally in case
the user does not wish to being both lines separately to the DUT.
Example:
HPDS[i]->on(); //closes both force and sense
HPDS[i]->off(); //opens both force and sense
HPDS[i]->off_force(); //opens force only
HPDS[i]->off_sense(); //opens sense only
HPDS[i]->on_force(); //closes force only
HPDS[i]->on_sense(); //closes sense only
HPDS[i]->local_kelvin(); //shorts F & S locally
HPDS[i]->remote_kelvin(); //opens F & S short
Administrative Commands
To place an HPDCMOD channel into a known safe state, issue the reset command.
HPDS[i]->reset()
Example:
HPDS[1]->reset();
//sets local kelvin, opens
//f & s relays, sets irange
//to 3,current clamp to 250ma
//voltage clamps -35, +35,
//fast loop comp, force 0.0V
//acquire rate to 15000, and
//sets meter to measure v,
For a slower loop settling time, in case of high load capacitance that might encourage oscillation, use the
loopcomp command.
HPDS[i]->loopcomp(fast-slow)
Example:
HPDS[1]->loopcomp(0); // 0 = fast, 1 = slower
To use Ground Sense (the defined Zero Voltage Reference for the "ground" side of the source and A/D
converters) from the Father Card (which should be connected at the proper place on the DUT), you want to
use the remote_groundsense command. For using a local analog ground instead, use local_groundsense.
Issuing either command for either channel on a board will act upon both channels of that board, and affect
all channels in the system.
The hardware implementation of this is shown on the block diagram in Figure 7.10. The DUT Ground
Sense is clamped to one diode drop from Analog Ground, and the relay shorts the two together. Thus you
can see that a short on one instrument will affect all instruments via their common father card connections.
Typically, this command is only required in calibration and diagnostic programs where a father card is not
guaranteed to be present. For best forcing and measurement accuracy, the test engineer should be
managing their own DUT Ground Sense connections properly.
HPDS[i]->remote_groundsense();
HPDS[i]->local_groundsense();
Example:
HPDS[1]->remote_groundsense();
HPDS[1]->local_groundsense();
Measure
Each DUT source can measure the voltage or current present at its I/O pins using the Source VM. The
HPDCMOD does not contain a User Voltmeter.
238 PN: 73-01003-00, November 2008

You first have to set up the converter to be connected in voltage mode or current mode, choose an acquire
rate (between 7000 and 35000 samples/sec.), then issue the measvm command, with a number of
samples (1 to 4096) to average. (More than 4096 samples may be coded, but the number will be reduced
to 4096. For a single-site test program, the result is placed in the variable SITE->lastresult.value.
This is automatically the variable that the KVD->Test(); command checks against the upper and lower
limits for the test. If you are running a multi-site program, then the result is placed in the SITE->results
array for your later use.
HPDS[i]->vmeter();
HPDS[i]->imeter();
HPDS[i]->acquire_rate(rate);
HPDS[i]->measvm(numsamples);
Example:
HPDS[1]->vmeter();
or
HPDS[1]->imeter();
then
HPDS[1]->acquire_rate(15000);
then
HPDS[1]->measvm(200);
Note: Due to software implementation, the calibration factors for any range are latched into the
measurement routine at the time the vmeter or imeter command is executed, not when the meavm
is executed. Therefore it is very important to not change the V or I range AFTER issuing the
vmeter or imeter statement.

Currently, these readings are included in statistical analysis reports.
Readback Functions
HPDS[i]->actual_sample_rate
double actual_sample_rate;
HPDS[i]->Exists
unsigned Exists;
Description:
Boolean that returns true if the source channel exists in the TCT (Tester Configuration Tool).
HPDS[i]->hpdsirange
unsigned hpdsirange;
Description:
Presently active Irange.
HPDS[i] >hpdsloopcomp
unsigned hpdsloopcomp;
Description:
Presently active loopcomp speed.
HPDS[i] >hpdsmode
dsfmode hpdsmode;
Description:
Presently active HPDS Mode (ForceV, ForceI).
HPDS[i] >hpdsval
double hpdsval;
Description:
Presently active Force HPDS Value.
HPDS[i] >hpdsvrange
unsigned hpdsvrange;
Description:
Presently active Vrange.
HPDS[i] >getname
AnsiString getname();
Description:
getname returns the name of the resource.
240 PN: 73-01003-00, November 2008

DC Instruments Meter Classes
Pinouts
Figure 7.11: HPDCMOD I/O Pinout
Meter Classes
Some father cards contain a connector to route signals to the external precision meter, where you can
measure them using code from the TKeithleyMeter2000, TKeithleyMeter2002, or THP3458A classes.
There is also a generic TMeterClass if you wish to write code for a generic precision meter on your system.
Contact KVD applications engineers for assistance and code examples for this sort of use.
Relays and Reliability

There is a PowerPoint training presentation that addresses how KVD testers obtain higher speed by
exposing the hardware to some risk of abuse by hot switching. Please obtain a copy of this presentation
from KVD and pay close attention to the details of this important tradeoff.
Relay Matrix Board (RMX)
Figure 7.12: Relay Matrix (RMX) Pictorial
The Relay Switching Matrix (RMX) provides the user with programmable relays located on a small (single
DIN size) module.
Features
The matrix consist of 64 relays and is designed in an array of eight lines, each with six pins. Each line has
a disconnect relay to isolate it from the father card, and there are eight line-to-line shorting relays to
connect lines in banks if desired.
242 PN: 73-01003-00, November 2008

DC Instruments Relay Matrix Board (RMX)
RMX Block Diagram
Figure 7.13: RMX Block Diagram
Using the Relay Matrix Class
There are 4 Relay matrix objects, RMX0 through RMX3.with an enumerated list of connection types. In
each board, the first group is Line Input relays, the second group is Line to Pin relays, and the last group
is Line to Line Shorting relays.
RMX0 Connections
M0,M1,M2,M3,M4,M5,M6,M7
M0P0, M0P1, M0P2, M0P3, M0P4, M0P5,

M1P0, M1P1, M1P2, M1P3, M1P4, M1P5,
M2P0, M2P1, M2P2, M2P3, M2P4, M2P5,
M3P0, M3P1, M3P2, M3P3, M3P4, M3P5,
M4P0, M4P1, M4P2, M4P3, M4P4, M4P5,
M5P0, M5P1, M5P2, M5P3, M5P4, M5P5,
M6P0, M6P1, M6P2, M6P3, M6P4, M6P5,
M7P0, M7P1, M7P2, M7P3, M7P4, M7P5
M0M1,M1M2,M2M3,M3M4,M4M5,M5M6,M6M7,M7M0
RMX1 Connections
M8, M9, M10, M11, M12, M13, M14, M15
M8P0, M8P1, M8P2, M8P3, M8P4, M8P5,

M9P0, M9P1, M9P2, M9P3, M9P4, M9P5,
M10P0, M10P1, M10P2, M10P3, M10P4, M10P5,
M11P0, M11P1, M11P2, M11P3, M11P4, M11P5,
M12P0, M12P1, M12P2, M12P3, M12P4, M12P5,
M13P0, M13P1, M13P2, M13P3, M13P4, M13P5,
M14P0, M14P1, M14P2, M14P3, M14P4, M14P5,
M15P0, M15P1, M15P2, M15P3, M15P4, M15P5
RMX2 Connections
M16, M17, M18, M19, M20, M21, M22, M23
M16P0, M16P1, M16P2, M16P3, M16P4, M16P5,

M17P0, M17P1, M17P2, M17P3, M17P4, M17P5,
M18P0, M18P1, M18P2, M18P3, M18P4, M18P5,
M19P0, M19P1, M19P2, M19P3, M19P4, M19P5,
M20P0, M20P1, M20P2, M20P3, M20P4, M20P5,
M21P0, M21P1, M21P2, M21P3, M21P4, M21P5,
M22P0, M22P1, M22P2, M22P3, M22P4, M22P5,
M23P0, M23P1, M23P2, M23P3, M23P4, M23P5
244 PN: 73-01003-00, November 2008

RMX3 Connections
M24, M25, M26, M27, M28, M29, M30, M31
M24P0, M24P1, M24P2, M24P3, M24P4, M24P5,

M25P0, M25P1, M25P2, M25P3, M25P4, M25P5,
M26P0, M26P1, M26P2, M26P3, M26P4, M26P5,
M27P0, M27P1, M27P2, M27P3, M27P4, M27P5,
M28P0, M28P1, M28P2, M28P3, M28P4, M28P5,
M29P0, M29P1, M29P2, M29P3, M29P4, M29P5,
M30P0, M30P1, M30P2, M30P3, M30P4, M30P5,
M31P0, M31P1, M31P2, M31P3, M31P4, M31P5
Note: Even though the schematics use the term MxPy, we also allow use of previous syntax of the form
LxPy, but this is more confusing for tracing signals through the father cards. Please convert old
syntax to new if you encounter it in legacy programs.
L0, L1, L2, L3, L4, L5, L6, L7,
L0P0, L0P1, L0P2, L0P3, L0P4, L0P5,

L1P0, L1P1, L1P2, L1P3, L1P4, L1P5,
L2P0, L2P1, L2P2, L2P3, L2P4, L2P5,
L3P0, L3P1, L3P2, L3P3, L3P4, L3P5,
L4P0, L4P1, L4P2, L4P3, L4P4, L4P5,
L5P0, L5P1, L5P2, L5P3, L5P4, L5P5,
L6P0, L6P1, L6P2, L6P3, L6P4, L6P5,
L7P0, L7P1, L7P2, L7P3, L7P4, L7P5,
L0L1, L1L2, L2L3, L3L4, L4L5, L5L6, L6L7, L7L0
RMX Commands
There are two commands that can be used to make or break connections. Set, and Clear. Set makes the
connection, Clear opens the connection. You can pass in to each command up to 8 connections from the
above enumerated list.
For example to connect Line 0 Pin 0 to Line 1 Pin 2
Example:
RMX0->Set(L0l1, l0p0, l1p2);
To connect Line 2 Pin 0 to Line 2 Pin 3
Example:
RMX0->Set(L2p0, l2p3);
Finally, to open a connection between Line 5 Pin 5 and Line 6 Pin 5
Example:
RMX0->Clear(l5, l6, l5p5, l6p5);
To open an entire BANK of relays (all pins associated with a line, and the line relay)
Example:
RMX0->resetline(<linenumber>);
To open all relays on an RMX board
Example:
RMX0->resetall();
Up to 256 named RMX (Relay Matrix) connections can now defined, increased from 48, and the number of
relays that each connection can contain is now 16, increased from 8.
Other Commands and Readback Syntax
RMX0 >Clear
Clears (opens) up to 8 relays on a matrix board.
short Clear(unsigned RMXparam1 = NORMXCON, unsigned RMXparam2 =

NORMXCON, unsigned RMXparam3 = NORMXCON, unsigned RMXparam4 = NORMXCON,
unsigned RMXparam5 = NORMXCON, unsigned RMXparam6 = NORMXCON, unsigned
RMXparam7 = NORMXCON, unsigned RMXparam8 = NORMXCON);
Parameters:
unsigned RMXparam1 = NORMXCON
The first relay on the matrix board to open.
The second relay on the matrix board to open.
The third relay on the matrix board to open.
The fourth relay on the matrix board to open.
The fifth relay on the matrix board to open.
The sixth relay on the matrix board to open.
The seventh relay on the matrix board to open.
246 PN: 73-01003-00, November 2008

The eighth relay on the matrix board to open.
Returns:
Always returns 0.
Description:
This routine is the only available routine in the matrix class that the user can call to open relays on any
pins, lines, or line to line relays on a matrix board. The user can open between one and eight relays with
one call.
RMX0 >CreateNamedConnection
Creates a relationship between a string and a series of connections.
short CreateNamedConnection(char* initname, RMXCONNECTIONS RMXparam1 =

NORMXCONNECTION, RMXCONNECTIONS RMXparam2 = NORMXCONNECTION,
RMXCONNECTIONS RMXparam3 = NORMXCONNECTION, RMXCONNECTIONS RMXparam4 =
NORMXCONNECTION, RMXCONNECTIONS RMXparam5 = NORMXCONNECTION,
RMXCONNECTIONS RMXparam6 = NORMXCONNECTION, RMXCONNECTIONS RMXparam7 =
NORMXCONNECTION, RMXCONNECTIONS RMXparam8 = NORMXCONNECTION);
Parameters:
char* initname
A character string that will be used with the NSet and NClear commands.
RMXCONNECTIONS RMXparam1 = NORMXCONNECTION

Returns:
-4 = Max number of Named Connections exceeded
-3 = RMX board not available
-2 = no connections sent in
-1 = no name sent int
0 = success
Description:
The user can associate a name with a series of RMX connections so that the code is more readable. By
creating a named connection, the user can call the NSet or NClear commands by passing in the more
readable string.
RMX0 >GetLineStatus
Returns the state of the line relay on the bank of relays.
bool GetLineStatus(unsigned banknum);
Parameters:
unsigned banknum
The bank number (0..7)
Returns:
true - the line relay is closed. false - the line relay is open.
RMX0 >GetLineToLineStatus
Returns the state of the line to line relays.
bool GetLineToLineStatus(unsigned banknum);
Parameters:
unsigned banknum
The first line number of the line to line relay. 0 - line 0 to line 1 relay. 1 - line 1 to line 2 relay. 2 - line 2 to line
3 relay. 3 - line 3 to line 4 relay. 4 - line 4 to line 5 relay. 5 - line 5 to line 6 relay. 6 - line 6 to line 7 relay. 7 -
line 7 to line 0 relay.
Returns:
true - the relays is closed. false - the relay is opened.
RMX0 >GetPinStatus
Returns the state of one pin on a chosen bank (line) on the matrix board.
bool GetPinStatus(unsigned banknum, unsigned pinnum);
Parameters:
unsigned banknum
The line being referenced.
unsigned pinnum
The pin number on the bank.
Returns:
true - the pin is closed. false - the pin is open.
RMX0 >NClear
Clears (opens) up to 8 relays on a matrix board, referenced by name
248 PN: 73-01003-00, November 2008

short NClear(char* conname);
Parameters:
char* conname
The name used in the SetNamedConnection function (case sensitive) Return Value.
Returns:
1 if the name cannot be found, 0 on success.
RMX0 >NSet
Sets (closes) up to 8 relays on a matrix board, referenced by name
short NSet(char* conname);
Parameters:
char* conname
The name used in the SetNamedConnection function (case sensitive) Return Value:
Returns:
1 if the name cannot be found, 0 on success.
RMX0 >resetall
Opens all relays on the matrix board.
short resetall();
RMX0 >resetline
Opens all the relays on one line, including the line relay.
short resetline(unsigned line);
Parameters:
unsigned line
The line number to reset.
RMX0 >ResetNamedList
Resets and clears ALL previously created named lists.
short ResetNamedList();
RMX0 >Set
Sets (closes) up to 8 relays on a matrix board.
short Set(unsigned RMXparam1 = NORMXCON, unsigned RMXparam2 = NORMXCON,

unsigned RMXparam3 = NORMXCON, unsigned RMXparam4 = NORMXCON, unsigned
RMXparam5 = NORMXCON, unsigned RMXparam6 = NORMXCON, unsigned RMXparam7
= NORMXCON, unsigned RMXparam8 = NORMXCON);
Parameters:
The first relay on the matrix board to close.
The second relay on the matrix board to close.
The third relay on the matrix board to close.
The fourth relay on the matrix board to close.
The fifth relay on the matrix board to close.
The sixth relay on the matrix board to close.
The seventh relay on the matrix board to close.
The eighth relay on the matrix board to close.
Returns:
always returns 0.
Description:
This routine is the only available routine in the matrix class that the user can use to close relays on any
pins, lines, or line to line relays on a matrix board. The user can close between one and eight relays with
one call.
250 PN: 73-01003-00, November 2008

DC Instruments Relay and Connection Commands - non RMX
RMX I/O Pinout
Figure 7.14: RMX I/O Pinout
Relay and Connection Commands - non RMX

Pending examples.
TRelay Constructor
Used to create new relays.
Command: $RELAY$ = new TRelay(<address>, <bit>)

Objects: $RELAY$
Description: an object
Data type: TRelay pointer

Arguments: <address>
Description: relay driver address
Data type: unsigned int.

<bit>
Description: bit associated with the relay
Data type: unsigned int.
Effect: Creates a new TRelay object.

Prototype: TRelay(unsigned address, unsigned bit);
Example: TRelay* K1 = new TRelay(0x30, 0x1);
TRelay -> close

Closes a relay.
Command: $RELAY$->close();
Objects: $RELAY$

Arguments: None
Effect: Closes the relay.
Prototype: short close(void);

Example: K1->close();
TRelay -> open

Opens a relay.
Command: $RELAY$->open();
Objects: $RELAY$
Arguments: None
Effect: Opens a relay

Prototype: short open(void);
Example: K1->open;
TConnection Constructor
Used to create new Connections.
Command: $CONNECTION$ = new TConnections(<Relays>)

Objects: $CONNECTION$
252 PN: 73-01003-00, November 2008

DC Instruments Relay and Connection Commands - non RMX
Data type: TConnection pointer
Arguments: <Relays>
Description: This can be either a list of previously defined relays (see TRelay) or a list of
address bit pairs. (see example).
Effect: Creates a new TConnection object.
Prototype: TConnection(TRelay* ra, TRelay* rb,

TRelay* rc, TRelay* rd,
TRelay* re, TRelay* rf,
TRelay* rg, TRelay* rh);
TConnection(unsigned add0, unsigned bit0,
unsigned add1, unsigned bit1,
unsigned add7, unsigned bit7);
Example: TConnection* DS1_TO_DUTPIN2;
DS1_TO_DIGPIN2 = new TConnection(0x30,0x1, 0x31,0x2);
//Or
TRelay* K1 = new TRelay(0x30, 0x1);
TRelay* K2 = new TRelay(0x31, 0x2);
DS1_TO_DIGPIN2 = new TConnection(K1, K2);
Things to Remember: At least one Relay or address/bit pair must be used in the constructor, and
not more than eight Relays or address/bit pairs can be used for one
TConnection object.
TConnection -> con

Connect resources.
Command: $CONNECTION$->con();
Data type: TConnection
Arguments: None
Effect: Connects resources by closing any relays in the list.

Prototype: short con(void);
Example: DS1_TO_DUTPIN2->con();
Alternative Forms: con_side(<side>) Close relays on one side only

Things to Remember: This command only has effect on active sites.
Relay closure time may take up to one millisecond. During this interval it is recommended not to force
voltages or currents, as this may cause source oscillation and/or shorten relay lifetime.
TConnection -> discon

Disconnect resources.
Command: $CONNECTION$->discon();
Data type: TConnection
Arguments: None
Effect: Disconnect a path by opening all relays in the list
Prototype: short discon(void);
Example: DS1_TO_DUTPIN2->discon();
Alternative Forms: discon_side( <side>) Open all the relays in the list, on one side only.
Thing to Remember: This command only has effect on active sites.
Relay opening time may take up to one millisecond. It is recommended that no current flow through the
relays at the time discon() is issued and during the relay open time, as this may cause source oscillation
and/or shorten relay lifetime.
Father Card Class

A generic Father Card (FC) class to allow portability between different Father Cards. Current supported
Father Cards are DIGMODFC and SPCDIGMODFC.
Example: FC->reset();
Commands are:
short DEFAULT_write_calfactors(FILE* file);

short DEFAULT_read_calfactors(FILE* file);
double DEFAULT_read_temperature(void);
short DEFAULT_reset(void);
short DEFAULT_mux_input(unsigned channel, unsigned input);
short DEFAULT_xtp_bits(unsigned value);
short DEFAULT_db_bits(unsigned value);
short DEFAULT_idac_setv(unsigned channel, double value);
short DEFAULT_isrc_seti(unsigned channel, double value);
short DEFAULT_ifb_gain(unsigned channel, unsigned gain);
short DEFAULT_quvm_trig(unsigned channel, unsigned input);
short DEFAULT_hf_trig(unsigned input);
short DEFAULT_ad9510_func(unsigned input);
short DEFAULT_ad9510_channel(unsigned channel, unsigned enable);
short DEFAULT_ad9510_channel_divider(unsigned channel, unsigned input);
short DEFAULT_ad9510_reset(void);
254 PN: 73-01003-00, November 2008

DC Instruments Father Card Class
short DEFAULT_clock_setup(unsigned InputClock, unsigned DigmodDiv,

unsigned PWSDiv, unsigned QUVMDiv);
short DEFAULT_wsclk(unsigned dm);
short DEFAULT_wdclk(unsigned dm);
short DEFAULT_wstrig(unsigned dm);
short DEFAULT_wdtrig(unsigned dm);
short DEFAULT_DSPClockSetup(void);
256 PN: 73-01003-00, November 2008

This section provides detailed information about the Digital Subsystem in the KVD test system. Included in
the discussion are functional and hardware descriptions, block diagrams, programming examples, and
command definitions. The DIGMOD family includes DIGMOD16 and DIGMOD32 instruments. Previous
KVD test systems included instruments called DSPIO, with lower pin count and data rates.
Topics Covered:
• Instrument Block Diagram and Description
• Overview of Digital Test Concepts
• Patterns
• Clocking
• Channel commands
• Sequencer commands
Important Features
The two restrictions described here are inherent in the KVD architecture. They are mentioned here to
serve as a reminder that awareness of them may speed up development of new test programs.
Vector JMP Restriction
Due to logic pipelining, you cannot JMP backwards fewer than three vectors. Thus the following pattern (in
DMP format) is appropriate to use:
GLOBAL start: NOP TSET 0 0 X X X X X X X X X X X X X X X ;

GLOBAL loop: NOP TSET 0 0 X X X X X X X X X X X X X X X ;
NOP TSET 0 1 X X X X X X X X X X X X X X X ;
JMP loop TSET 0 1 X X X X X X X X X X X X X X X ;
HALT TSET 0 1 X X X X X X X X X X X X X X X ;
The following pattern would behave unpredictably:
GLOBAL start: NOP TSET 0 0 X X X X X X X X X X X X X X X ;

GLOBAL loop: NOP TSET 0 0 X X X X X X X X X X X X X X X ;
JMP loop TSET 0 1 X X X X X X X X X X X X X X X ;
HALT TSET 0 1 X X X X X X X X X X X X X X X ;
Serial Send Memory Restriction
In code such as this:
Programming and Operations Digital Instruments
DIGMOD[0]->ddrv_setup(2, 16);
The argument drv_length can never be set to less than 16. Even if the user needs to only send one
address during a pattern run, the length must be set to at least 16. This also means that it is not possible to
loop through a memory block of fewer than 16 locations. If you accidentally enter a variable that is less
than 16 at run time, the KVD software will automatically round it up.
DIGMOD16/32
Description
The DIGMOD16 module includes 16 high speed digital bi-directional channels, while the DIGMOD32
supports 32 channels per instrument. The KVD test head can be populated with as many as 6 DIGMOD
boards, for a total of 96 or 192 high speed pins. A custom power supply and enhanced test head air
cooling are required to support the DIGMOD option, compared to a system with the DSPIO configuration.
Figure 8.1: DIGMOD 16
186 PN: 73-01003-00, November 2008

Digital Instruments DIGMOD16/32
Figure 8.2: DIGMOD 32
Features and Basic Specifications
Compared to the DSPIO instrument, the DIGMOD architecture offers much higher speed, larger memory
per pin, increased numbers of time and format sets (16), built-in PMU and programmable loads per pin, a
built-in frequency measurement feature, and a window (not level) comparator. Added features include
same cycle drive/compare, vernier timing control with 50pS resolution, a "no change" drive/compare
command, and combine mode.
Drive/Compare
Channels Per Board 16/32
Drive Control 3 (drive high, drive low, hiz)

Compare Control 3 (compare high, compare low,
mid-level)
Drive Level Range -2V to 7V
Resistive Load (per pin) 8 available
PMU
Channels Per Board 16/32 (one per pin)

ForceV Ranges 2 ranges (8V/4V)
ForceI Ranges 8 ranges (32mA, 8mA, 2mA,
512uA, 128uA, 32uA, 8uA, 2uA)
Pattern Formatting
Master Clock Rate 120MHz
Pattern Rate 60MHz

Combine and Clock Rates 120MHz
Pattern Depth 16MB
Timesets 16 (per board)

Edge Placement (on the fly) 5nS
Skew Adjust Resolution 50pS
• Board-to-board timing skew is in the process of being improved when in the Master->Slave
configuration. Expected board to board edge placement accuracy will be 1nS. Please contact KVD if
board-to-board timing is a critical requirement for applications advice.
• Serial Send memory setup command ddrv_setup operates on a MINIMUM vector sequence of 16
addresses, and will cause an error if this minimum is not observed.
188 PN: 73-01003-00, November 2008

Digital Instruments DIGMOD16/32
Block Diagram
FPGA
KVD High Speed LVDS Data Bus
High Speed
Data Bus
Management ABus connection to
MPDCMOD/Cal Meter
Local Power
Regulation
To
DUT
FPGA
Sequencer
Data Formatter
Memory
Management
times 16/32
KVD Instrument Data Bus
Pin Electronics
Driver
Comparators
Delay Lines
PMU
References
Memory Clocks
16 MB per pin pattern Master Clock
Relay Drivers
16MB per pin send/ PLL
capture Memory Clocks
Figure 8.3: DIGMOD Block Diagram
The DIGMOD is implemented with two-channel-per-package pin electronics ICs, a 2 million gate FPGA,
multiple on-board voltage regulators and clock distribution circuits. The FPGA-based architecture allows
for simple file transfer updates of the logic configuration definition, to allow customization and feature
updates without removing instruments from the test head or performing hardware change orders.
VH To ABUS
MUX
VL
Data
To DUT
Enable (Fathercard)
VTT
CVB
CVA
Comp B F/S
PMU
V-MU
To ADC
Comp A
CVB-
PPMU
PLL_CK
(100MHz)
CVA-
V_Ref PPMU
R_Ext
Pin Electronics
Driver
Comparators
Delay Lines
PMU
Figure 8.4: Pin Electronics
190 PN: 73-01003-00, November 2008

Digital Instruments High Speed Link
High Speed Link

Cabling and Xilinx support enables a high speed link for pattern loading and readback. The High Speed
Link is a separate path using serial LVDS, using CAT5 network cables from the KVD CPU to the test head.
The system auto-detects the presence of this path, and reverts to the slower instrument command bus in
case of link failure, allowing limited use of the tester.
Burst DMA readback modes are being implemented for certain functions where speed is of great impact to
test time. These include readback from Capture/Send Memory, Fail information readback, ADC data
readback.
For HSL (High Speed Link) support, the argument to the initialization function has additional meaning.
ModuleInitDigmod(N);
N=0 means do not use HSL, even if available.

N=1 means attempt to use HSL, but allow a fallback to non HSL if initialization fails.
N=3 means MUST use HSL, and abort testing if HSL initialization fails using a fatal error in ErrMan
Overview of Digital Test Concepts

The experienced test engineer may wish to skip this section if digital testing is not a new technology. To
those transitioning from simpler test systems, or linear-only systems, please make sure to thoroughly
absorb these concepts. The feature set of the KVD DIGMOD subsystem is quite rich, and will be presented
here in layers.
In the interests of simplicity in the earlier sections, certain information will be concealed until the time is
right. If you are an experienced digital test engineer, please don't get impatient, just skip ahead. In later
sections you will find the information you need on how to make the KVD do what you need it to do.
Pattern Driving
At the core of any digital subsystem is the ability to generate digital high and low voltages, and stimulate
the DUT input pins. Each DIGMOD instrument has 16 or 32 output channel drivers to accomplish this.
Supporting each channel is a 16M deep section of what is called pattern (or vector) memory.
When the test program is initialized, this memory needs to be pre-loaded with the desired data (ones and
zeros) [the method of doing this is explained later]. When you are testing each device, upon command, this
data is sent to the pin drivers that force your desired high and low voltage levels onto the DUT pins.
Data is sent at a rate called the T0 (Tee-Zero) rate, which is also called your pattern (or data rate). In the
simplest view, your data moves from pattern memory one address each T0 time period, and the address
increments up by one each time. The data goes from memory to the pin drivers, and then to the DUT pins.
In the following diagram, pattern memory is on the left, 16M words long, and 16 bits wide. (one bit for each
of the 16 pin drivers). A DIGMOD32 instrument has double the resources of this diagram. DIGMOD
instruments can be ganged together for wider, but we will limit our discussion to one instrument at a time
for now.
Memory address 0 is on the right of its box, and is the first data sent to the pin drivers at the first T0 time
period. If we look at the data being sent, with Channel 0 on the left, and Channel 15 on the right, the first
word being sent would be this:
0 1 1 0 1 0 1 0 1 1 1 0 0 0 0 0
For historical reason, this word is called a test vector.
1
Pattern Memory Address
6
M 5 4 3 2 1 0
Drivers
0 0 0 1 1 1 0 0 DMCH0
1 1 0 1 0 1 0 1 DMCH1
0 1 1 1 1 1 1 1 DMCH2
0 0 0 0 1 0 0 0 DMCH3
1 1 1 1 1 1 1 1 DMCH4
0 0 0 0 1 0 0 0 DMCH5
1 1 1 1 1 1 1 1 DMCH6
0 0 0 0 0 1 0 0 DMCH7
1 1 1 1 1 1 1 1 DMCH8
1 1 1 1 1 1 1 1 DMCH9
1 1 1 1 1 1 1 1 DMCH10
0 0 0 0 0 0 0 0 DMCH11
1 0 0 0 1 0 0 0 DMCH12
1 0 0 0 1 0 0 0 DMCH13
0 0 0 0 0 0 0 0 DMCH14
0 0 0 0 0 0 0 0 DMCH15
T0
Drive Data
Figure 8.5: Digital Drive Memory
Looking at the data being stored in the first six addresses, the pattern file would look like this. The memory
address (the first column) is not part of the file itself as it's written.
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Digital Instruments Overview of Digital Test Concepts
000000 0 1 1 0 1 0 1 0 1 1 1 0 0 0 0 0
000001 0 0 1 0 1 0 1 0 1 1 1 0 0 0 0 0
000002 1 1 1 0 1 0 1 1 1 1 1 0 0 0 0 0
000003 1 0 1 1 1 1 1 0 1 1 1 0 1 1 0 0
000004 1 1 1 0 1 0 1 0 1 1 1 0 0 0 0 0
000005 0 0 1 0 1 0 1 0 1 1 1 0 0 0 0 0
Looking at the right side of the diagram, the pin drivers accept this data, and drive the DUT pin high or low
for each one or zero that they get from pattern memory. Each T0 represents a new piece of data, or test
vector. A scope or logic analyzer view of the pin driver output waveform is shown to the far right.
A view of channels 0-7 is shown here.
1
6
M 5 4 3 2 1 0
Drivers
0 1 1 1 0 0 DMCH0
0 1 0 1 0 1 DMCH1
1 1 1 1 1 1 DMCH2
0 0 1 0 0 0 DMCH3
1 1 1 1 1 1 DMCH4
0 0 1 0 0 0 DMCH5
1 1 1 1 1 1 DMCH6
0 0 0 1 0 0 DMCH7
Address DMCH0 DMCH1 DMCH2 DMCH3 DMCH4 DMCH5 DMCH6 DMCH7
000000 0 1 1 0 1 0 1 0
000001 0 0 1 0 1 0 1 0
000002 1 1 1 0 1 0 1 1
000003 1 0 1 1 1 1 1 0
000004 1 1 1 0 1 0 1 0
000005 0 0 1 0 1 0 1 0
Vector File
Figure 8.6: Digital Drive Vector
Besides 1 and 0, you can disable the driver and allow the output to float by using code X (don't care) or M
(mask).
Pattern Comparing
Each digital channel is also connected to a programmable level comparator, if the DUT is driving the pin
instead of the DSPIO instrument. We can receive this data and compare it to data in pattern memory, to
see if it is a match to what we expect the DUT to send us. Instead of zeros and ones, we program code H
for an expected high, and L for an expected low, into pattern memory.

1 Fail
6
M 5 4 3 2 1 0 Latches Pin Comparators
L L L H H H L L DMCH0
H H L H L H L H DMCH1
L H H H H H H H DMCH2
L L L L H L L L DMCH3
H H H H H H H H DMCH4
L L L L H L L L DMCH5
L L L L L H L L DMCH7
L L L L L L L L DMCH11
H L L L H L L L DMCH12
H L L L H L L L DMCH13
Channel Fail Address Register T0

Fail Flag
Compare (Expect) Data
Figure 8.7: Compare Pattern Data
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In this diagram, the comparators for all 16 channels are having their data compared to memory.
For each T0 time period, the input voltage level is compared to a programmed level at a specified strobe
time (covered later). If it is high, and the pattern memory contains an H, then the data is a match, and it is
not a fail. If it is low, and the pattern memory is expecting an L, then it also is not a fail. If any channel is a
mismatch, and does not equal the expected data, then the fail flag is set. The fail flag is set for any
mismatch in any of the vectors executed, and can be interrogated later for use in a test statement. If the
channel state does not matter, you can enter code X (don't care) or M (mask) and it will be ignored at the
fail register.
The comparator is actually a window (two level) comparator, and if the signal is between H and L it is
called mid-band, and wil match a Z character in the compare memory.
In most test programs, you will have a mixture of inputs and outputs, and the pattern file will have a
combination of 1, 0, H, L, X, and M codes.
Up to 512 vector addresses and the channel that causes the fail to occur are also saved in the Fail
Address Register, in case you wish to know for debugging or to datalog them
The first line of the vector file that this figure represents is given here:
L H H L H L H L H H H L L L L L
Send Serial/Capture Memory
For flexibility, the pattern memory we have been discussing is augmented by another memory called the
Serial Send/Capture memory. The normal pattern memory sends data in parallel to the pin drivers and
comparators, but many devices require serial I/O. It can be tedious to write the patterns and wasteful of
pattern memory to use it for serial I/O pins.
This second bank of memory is also 16M words in size per pin, and the data being sent to the DUT is first
sent to a 16-bit (32-bit for DIGMOD32) shift register. Ignoring the normal pattern memory for now, this is a
discussion of the Send memory being used to source data to the DUT.
The Send memory is loaded with data, usually predefined as a C array of data, not the typical vector file
discussed earlier. It is often easier to create this kind of data with an algorithm than write it out in full in text
format.
The data to be sent is loaded a word at a time into the shift register. The command to do this is written into
the pattern vector file at a particular address: SLOAD. Precisely how to do this is covered later.
Once the data word is in the shift register, it can be sent to the pin drivers beginning at the next T0 period.
Typically, one channel is used to send the serial data, and the drivers of the adjacent channels are not
used. Once a bit is sent to the driver during one T0 period, the command SSHIFTL is sent, and the shift
register moves data from LSB to MSB, and the next bit is available during the next T0 period. This can be
repeated 8 or 16 times as necessary to shift out all the desired data in the shift register.
Besides shifting left one position, SSHIFTL, there are commands to shift two positions, SSHIFTL2, and for
shifting right, SSHIFTR and SSHIFTR2.
The pattern memory needs to have the code W entered to use the shift register as the source of driver data
instead of the normal pattern memory 1 or 0. This can be changed on the fly, on a vector-by-vector basis.
You need to make sure the shift register contains the desired data by using the SLOAD command first,
then on the next or a subsequent vector, code W will send this data to the pin driver. The code W was
chosen to designate Write data.
Eight bits of data are highlighted in the diagram. One entire 16-bit word is loaded into the shift register on
one vector, then sent one bit at a time via one or more drivers, in this case we will examine eight bits being
sent out channel 15, and the serial data being sent is:
0 0 0 0 0 1 1 1
Again, shifting left is always done in the LSB to MSB direction. This can be used for sending serial bus
commands such as for the I2C bus, ramp data for testing DACs, or any testing purpose.
Send
Send/Capture
1 Shift
6 MemoryAddress
M 5 4 3 2 1 0 Register Pin Drivers
LSB
0 0 0 1 1 1 0 0 0 DMCH0 X
1 1 0 1 0 1 0 1 1 DMCH1 X
0 1 1 1 1 1 1 1 1 DMCH2 X
0 0 0 0 1 0 0 0 0 DMCH3 X
1 1 1 1 1 1 1 1 1 DMCH4 X
0 0 0 0 1 0 0 0 0 DMCH5 X
1 1 1 1 1 1 1 1 1 DMCH6 X
0 0 0 0 0 1 0 0 0 DMCH7 W
1 1 1 1 1 1 1 1 1 DMCH8 X
1 1 1 1 1 1 1 1 1 DMCH9 X
1 1 1 1 1 1 1 1 1 DMCH10 X
0 0 0 0 0 0 0 0 0 DMCH11 X
1 0 0 0 1 0 0 0 0 DMCH12 X
1 0 0 0 1 0 0 0 0 DMCH13 X
0 0 0 0 0 0 0 0 0 DMCH14 X
MSB
0 0 0 0 0 0 0 0 0 DMCH15 W
T0
SLOAD
Send Data SSHIFTL Pattern Memory Word
Figure 8.8: Serial Send Memory
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Capture Memory
In an analogous way to the use of Send memory data going to the pin drivers, the DIGMOD instrument can
also capture (detect) serial data streams and place them into the same memory. The destination memory
region needs to be set up so as to not conflict with send data regions, and that memory management is
discussed later.
In the next diagram, data coming from the device is sent to the comparators (it uses the High level
comparator, not the Low for each channel), and the use of the code V in a pattern memory vector is the
signal to send incoming data to the capture shift register instead of using it for a fail comparison. This
capture shift register is separate from the send shift register, although it operates in the same direction,
from LSB to MSB.
The data to be captured goes from the comparators to the shift register. The pattern file then issues the
command to shift the acquired data if desired:CSHIFTL. Once the data has shifted towards the MSB in the
shift register, the next bit can be captured in the next T0 period. Typically, one channel is used to capture
the serial data, and the comparators of the adjacent channels are not used.
Besides shifting left one position, CSHIFTL, there are commands to shift two positions, CSHIFTL2, and for
shifting right, CSHIFTR and CSHIFTR2.
Once a series of bits is captured and arranged as desired in the capture shift register, the command
CSTORE is sent from the pattern vector file, and the word moves into the destination address of the
capture memory. Each CSTORE command moves another word into memory, at a subsequent address.
The pattern memory needs to have the code V entered to use the shift register as the destination for
comparator data instead of the normal pattern memory H or L. This can be changed on the fly, on a vector-
by-vector basis. The code V was chosen to designate Valid data.
Capture
1
Send/Capture Memory Shift
6 Address Register
M 12 11 10 9 8 7 Pin Comparators
LSB
0 0 0 1 1 1 0 0 0 DMCH0 V
1 1 0 1 0 1 0 1 1 DMCH1 M
0 1 1 1 1 1 1 1 1 DMCH2 M
0 0 0 0 1 0 0 0 0 DMCH3 M
1 1 1 1 1 1 1 1 1 DMCH4 M
0 0 0 0 1 0 0 0 0 DMCH5 M
1 1 1 1 1 1 1 1 1 DMCH6 M
0 0 0 0 0 1 0 0 0 DMCH7 M
1 1 1 1 1 1 1 1 1 DMCH8 V
1 1 1 1 1 1 1 1 1 DMCH9 M
1 1 1 1 1 1 1 1 1 DMCH10 M
0 0 0 0 0 0 0 0 0 DMCH11 M
1 0 0 0 1 0 0 0 0 DMCH12 M
1 0 0 0 1 0 0 0 0 DMCH13 M
0 0 0 0 0 0 0 0 0 DMCH14 M
MSB
0 0 0 0 0 0 0 0 0 DMCH15 M
T0
CSTORE
Capture Data CSHIFTL Pattern Memory Word
Figure 8.9: Serial Capture Memory
Putting It All Together - Pattern and Send/Capture Memory
All four of the previous concepts are present concurrently in the DIGMOD instrument, arranged as in the
following diagram. 16M of pattern memory per pin is loaded with parallel data and control commands, and
16M of serial send/capture memory per pin is also ready to be used on a vector-by-vector basis.
You can see that the Memory MUX control comes from pattern memory, as well as the control for SHIFT,
LOAD, and STORE. Pattern memory is significantly wider than 16 bits due to these extra features.
198 PN: 73-01003-00, November 2008

Pattern and Sequencer Command Memory
Memory MUX Control

0 0 0 1 1 1 0 0
W, V
1 1 0 1 0 1 0 1
0 1 1 1 1 1 1 1
0 0 0 0 1 0 0 0
One MUX per
1 1 1 1 1 1 1 1
channel
0 0 0 0 1 0 0 0
1 1 1 1 1 1 1 1
0 0 0 0 0 1 0 0 1,0,H,L,X,M,Z
1 1 1 1 1 1 1 1
Pins
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 DMCH0
1 0 0 0 1 0 0 0 Shift/ DMCH1
1 0 0 0 1 0 0 0 Store DMCH2
0 0 0 0 0 0 0 0 Control Send DMCH3

Shift
0 0 0 0 0 0 0 0 Register DMCH4
DMCH5
Capture
DMCH6
Shift
Send/Capture Memory
LSB
Register MMM DMCH7
0 0 0 1 1 1 0 0 0 0 UUU DMCH8
1 1 0 1 0 1 0 1 1 1 XXX DMCH9
DMCH10
0 1 1 1 1 1 1 1 1 1
0 DMCH11
0 0 0 0 1 0 0 0 0
W DMCH12
1 1 1 1 1 1 1 1 1 1
(From Send Shift
0 0 0 0 1 0 0 0 0 0 Register) DMCH13
DMCH14
1 1 1 1 1 1 1 1 1 1
0 DMCH15
0 0 0 0 0 1 0 0 0
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 V
(to Capture
1 1 1 1 1 1 1 1 1 1 Shift
0 0 0 0 0 0 0 0 0 0 Register)
1 0 0 0 1 0 0 0 0 0
1 0 0 0 1 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
MSB
Figure 8.10: Memory Banks in the DSPIO
Memory Address Sequencer
So far, we have assumed that vectors are issued from pattern memory one at a time, one per T0 time
period, in sequential order starting at address zero. If this was strictly true, the instrument would not be as
useful as one where the test engineer can control the start address, and exercise more control over the
order (or sequence) that the vectors are issued.
So there is a microcoded memory address sequencer, with its own language, called opcodes, for this
purpose. Further details of this language are explained in the section on “Pattern Syntax” on page 207, but
here is a short summary.
When testing devices, patterns are executed, or burst, beginning at start addresses noted by symbols
which are embedded in the pattern source code. Digital patterns are written in a text-based form, but these
are not usable by the DIGMOD hardware as is. Test systems traditionally include what's called a pattern
compiler to convert pattern source code (easy-to-read) format into a hex or binary format usable by the
instrument. The examples given so far in this chapter have all been in source code format. The pattern
editor/compiler is detailed in a later section, but suffice it to say here that the source code files are the ones
generated by human typing.
Our original drive data sample pattern looked something like this:
000000 0 1 1
000001 0 0 1
000002 1 1 1
000003 1 0 1
000004 1 1 1
000005 0 0 1
The truth is that a full source code pattern has more possible fields, and the first column (the memory
address) is not part of the source code file.
These additional fields exercise the sequencer control and memory control commands. The Symbol field
is a way to indicate where a pattern should begin its execution. When you load patterns into memory, you
may have a collection of many short useful series of vectors. You almost never wish to execute them all at
once, but instead specify where to begin a series of vectors. The memory address could be specified for
each pattern fragment that needs to be executed, but using symbols is an easier-to-read technique.
Opcodes are the programming language that tell the sequencer to chose another address other than the
next one in order. You can repeat vectors, saving valuable pattern memory space. You can have
conditional opcodes, that only operate if some condition is true. And some op codes take arguments,
which are usually the place to go to if the op code involves a jump.
200 PN: 73-01003-00, November 2008

Digital Instruments Patterns
Patterns are compiled using the compiler/editor tool, and saved to the hard drive. They are listed in a
structure called the PATLIST, loaded into the instrument pattern memory at the beginning of the test
program, and executed, or burst, when needed by the patexe command.
Clocking
All of this discussion so far has assumed that the DIGMOD instrument is executing vectors at some data
rate called the T0 rate. To accomplish this, the instrument must first be programmed with a Master Clock,
which is always running at some multiple of the T0 rate.Each of the 16 timesets may have a different T0
rate, which is derived by dividing the masterclock by an integer, not less than 2 and not greater than 2047.
The normal condition if you have multiple DIGMOD instruments is that the lower number instrument
(DIGMOD0) is the Master, and others are Slaves, meaning that the Master Clock of DIGMOD0
synchronizes all instruments. This can be changed if necessary, especially for multisite, since each
instrument can act independently of the others.
Drive and Compare Voltage Levels
So far, we have also ignored the driver and comparator programming, but there are commands for each
channel (pin) available. Each pin can have a different high and low drive voltage, and hi and low
comparator thresholds.
Formats and Edge Timing
Another deferred issue is one of the Data Formats. Before now, we have assumed that when the pattern
memory contains a 1, we will command the driver to go high, and a 0 will mean a drive low. As you know,
not all data formats are defined this way, and some go low for a 1, and high for a 0, as well as patterns that
are defined (such as RZ - Return to Zero) by their action before and after their valid time.
Also, one essential feature of a test system is to be able to place start and stop edges within a T0 time
period. The actual rising or falling edge of a driver may not occur at the exact beginning of the T0 cycle, but
there is often a START delay before the initial edge, and a STOP delay to define the trailing edge. The
comparator strobe is also located somewhere inside the T0 cycle, and can be programmed.In the KVD
architecture, you can both drive and compate within the same T0 period.
Therefore, there is a section of circuitry located between the memory data and the driver/comparator (pin
electronics) that handles the data formatting and timing edge placement. The actual data formats are
explained later, with examples of placing the edges. Basically, you can program a different data format for
each pin if you require, and place a timing edge anywhere.
Patterns
Patterns define the driver and comparator data, and control the Sequencer function. Each vector has an
independent OpCode field with the following options supported:
1. Conditional or Unconditional Branching.

2. 16 deep Loop Counter Stack for Loops.
3. Subroutines.
4. 2 independent User Flags which can repeat a vector until set from the test program.
5. Match Mode.
6. Serial or Parallel Drive/Capture Data Capability.
7. Time Set and Format Set Switching on the fly.
DIGMOD Pattern Editor
Pending - more complete explanation: The DM Pattern Editor is a stand alone vector translation tool that
will translate an ASCII pattern file to a .bp file that can be loaded into the pattern memory. By default this
utility will be saved in the "Programming Tools" directory as "KVD Pattern Editor and Compiler", which can
be launched from the Windows Start menu.
Input
This tool can be used to translate a single vector file or many at a time.
Output
All files that are translated will generate an output file. This file will retain the base filename of the input file
and will also have a .bp extension. (example: testfile.xx translates to testfile.bp). The translation process
is non destructive to the input file.
Rules
The format of the input file must adhere to several rules. Below is a list of the basic rules.
1. The first vector must contain a label. All lines prior to the first vector are tested for other information but
can contain no drive/compare information.
2. Comments are allowed, however no comment may contain a ':' character.
3. Channel lists are defined before the first test vector. The order in which the channels are defined will
determine the order that they should appear in the ASCII test vector. The complete channel list can be
comprised of groups of channels. Each channel in a group is delimited by a tab, space, or comma.
Channel numbers are limited to 0-63. A group of channels is preceded by the syntax .chmap as well as
a single field description of the pins.
4. Timesets can be defined prior to the first vector. There can be a maximum of 2 timesets defined. The
order that the timeset labels appear in the input file will determine their designation throughout the
pattern. The first timeset label defined will be designated as timeset "0" in the .bp file. If timesets are
not defined, the default timeset 0 will be used. A timeset is preceded by the syntax .tset.
5. Labels can be lower and upper case alpha-numeric combinations, however a label must start with an
alpha character.
6. The flag field must be delimited by simple parentheses. A '(' indicates the start of a flag field and a ')'
indicates the end of a flag field. No whitespace is allowed inside the field.
202 PN: 73-01003-00, November 2008

Vector Information
Mandatory Input Vector Fields

Channel Groups
Each input vector must contain drive, compare, or mask information for all channels defined in the header.
The format of this drive/compare information should be such that each channel group that is defined in the
header should have its own vector channel segment, delimited from the following and preceding segment
by a space or tab.
Example:
If the header contained:
.chmap name1 = {1,2,3}

.chmap name2 = {9,10,0,12}
then the input vector should contain 7 vector characters split into 2 groups, like this:
101 HLHL
000 LLLL
111 MMHL
Note that the .chmap designator is separated from the channel list by some descriptive name for the list.
Note that drive/compare characters are limited to the following:
1,0,h,l,m,x,H,L,M,X,v,V,w,W.
1 = Drive a digital HIGH (Driver Enabled)

0 = Drive a digital LOW (Driver Enabled)
h,H = Compare for digital HIGH (Driver = high impedance)
l,L = Compare for digital LOW (Driver = high impedance)
x,X = Don't care (Driver = high impedance)
m,M = same as "X" (Driver = high impedance)
v,V = Capture Data (Driver = high impedance)
w,W = Drive (Send) Data (Driver Enabled)
The upper and lower case 'x' and 'm' characters can be used to represent a high impedance state for the
driver, with no data comparison ("don't care"). The 'v' and 'w' characters are used for driving or capturing
data in the send/receive memory. Send/Receive is described later in this document.
Alternate Drive Format

It is possible to represent drive data for a group of channels as a hexadecimal number. This representation
should be preceded by a "dx" or "Dx" indicator.
Example:
For the header:
.chmap apins = {1,2,3}

.chmap bpins = {9,10,0,12,13,14,15,16}
Then the data:
101 00101001
could also be represented as:
101 Dx29
or
101 dx29
Optional Input Vector Fields

Label Info:
If the input vector contains a label representation, the label must be terminated with a colon character ':'.
The label must be the first character field of the input vector. Labels must start with an alpha (upper or
lower case) and can contain alpha-numeric characters.
Example of valid labels:
Vmax:
Foo42:
XyZZY:
Examples of invalid labels:
42Foo:
Start
Opcode Info:
The input vector may contain an opcode. This opcode should be represented by lower case. Most opcodes
can be conditionally executed, depending on flag conditions. Some opcodes are standalone, while others
require an operand.
Stand-Alone Opcodes:
halt
wait
return (can also be represented by "rtn")
Opcodes Requiring an Operand:
jmp
jmpr
repeat (can also be represented by "rpt" or "rep")
loadcnt (can also be represented by "lcnt")
call
callr
along
rlong
flags
control
note
Sequencer OpCodes
Note: In each of these cases the opcode should be followed by an operand (if called for) that represents
a label, an absolute address (in decimal) or a step index forward or backward from the current
204 PN: 73-01003-00, November 2008

vector. The relative addressing opcodes (jmpr and callr) must be followed by a relative operand,
not a label.
Opcode Function Conditional Operand
wait wait for condition Y None

halt halt execution optional none
jmp jump to vector optional address
jmpr jump to vector (relative) optional relative address

repeat repeat vector optional repeat count
loadcnt load the loop counter optional Loop counter value
call call subroutine optional address

callr call subroutine (relative) optional relative address
return subroutine return optional none
along extend absolute N address

address
rlong extend relative address N relative offset
flags set or clear flags optional flag bits
control set control bits for fail optional control bits

record
note store fail fifo registers optional register
Table 8-1: Description of Opcodes
Examples of relative addresses:
. (also called dot), defined to be the current vector address

.+n the vector address "n" beyond the current vector
.-m the vector address "m" previous to the current vector
Opcodes are executed AFTER the vector data is used (driven or compared).
Flags
The condition of several flags can be used to determine pattern execution. The most common flags are the
User Flags (U1 and U2) and the Loop Counter Flag (L). All flags can be tested for being set or not-set.
(Place a "!" in front of the flag to test it for being not-set.) (Pending: Is this still true?)
The normal status of User Flags is not-set, and if set true by the external dflags command, the next time
they are evaluated in the pattern, they are automatically reset to false.
Flags must be surrounded by parentheses, and there can be no spaces included.
Flag Name Set true by Clear
U1 User 1 dflags Command Use or Flag Control Bits

U2 User 2 dflags Command Use or Flag Control Bits
M Match Formatter Match No Match
LM Latched Match Previous Match Use or Flag Control Bits

L Loop Counter Loop Counter=0 Use or Flag Control Bits
F Fail Formatter Fail Control Bits
V Vector Flag Control Bits Use or Flag Control Bits
Table 8-2: Flag Bits
Example:
operation result
wait (U1) wait on this vector until User Flag U1 is set
jmp (!L) .-5 jump back 5 vectors if loop counter flag is not set
(counter!=0)
Note: Each time the loop counter flag is tested, the loop counter is decremented by one.
DIGMOD Additional State Characters
In addition to the most commonly used pattern state characters (0,1,H,L,X,Z,V,W), the system allows for
pattern state characters that will allow for driving and comparing on the same DIGMOD channel, on the
same pattern cycle. The following table gives a complete list of the accepted state characters.
Table 8-3: DIGMOD Additional State Characters
State Character Drive Function Compare Function
X High Impedance None (Don't Care)
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Table 8-3: DIGMOD Additional State Characters (Continued)
State Character Drive Function Compare Function
W Drive data comes from Send SR None (Don't Care)

0 Drive logic zero (0) None (Don't Care)
1 Drive Logic one (1) None (Don't Care)

V High Impedance Data goes to Capture SR
G Drive data comes from Send SR Data goes to Capture SR
C Drive logic zero (0) Data goes to Capture SR
D Drive Logic one (1) Data goes to Capture SR
L High Impedance Compare for Low level (L)
J Drive data comes from Send SR Compare for Low level (L)
A Drive logic zero (0) Compare for Low level (L)

B Drive Logic one (1) Compare for Low level (L)
H High Impedance Compare for High level (H)

K Drive data comes from Send SR Compare for High level (H)
E Drive logic zero (0) Compare for High level (H)
F Drive logic one (1) Compare for High level (H)

Z High Impedance Compare for Mid level (Z)
”-” No change (same as previous cycle) No change (same as previous cycle)
Note: It is now possible to drive and compare in the same pattern cycle and use the Send/Capture shift
registers and memory. The enable start and stop times should be used accordingly.
Pattern Syntax
Examples of Proper Pattern Syntax:
.chmap MYCHAN = {1,3,6}

.chmap XYZ = {7,8,9,10}
strt: MMM LLLL
loadcnt 100 MMM LLLL (could also be "lcnt")
jmp (!L) . MMM 1010
jmp strt MMM LLLL
Examples of Incorrect Syntax:
.chmap MYCHAN = [1,3,6](incorrect brackets)

.chmap XYZ = {7,8,9,99}(99 exceeds max channel #)
MMM LLLL (first vector needs a label)
loadcnt 100 MMM LLDL (wrong drive-compare character)
jmp ( !L) . MMM 1010 (whitespace in flag field)
jmp strt MMM LLLL (no "strt" label)
Timeset Info
Each input vector may contain timeset information in the TS column. If the input vector contains no
timeset, the previous vector’s timeset is used for this vector. If no timesets are provided in the pattern
vectors, timeset 0 will be loaded for all vectors. The actual edge placement information for the timeset is
defined outside the pattern, by the dfmt command.
Example:
Note: Formats and timesets may be switched on the fly (i.e.: from vector to vector) UNLESS you are
switching to or from NRZ format. This is due to a limitation of the hardware implementation of the
NRZ format. Pending: is this still true? Any restrictions?
If you wish to change the timeset of multiple vectors, you may wish to use an editor with column mode
capability such as UltraEdit. To do so, export the pattern file to .DMP format, then open it with UltraEdit.
The timeset field is denoted TSET:
208 PN: 73-01003-00, November 2008

Fail Disabling
It is possible to disable the fail flag and fail register on a vector-by-vector basis. This will allow for the
execution of a vector without changing the fail flag or fail register, regardless of data. The Fail Disable (FD)
bit is automatically set on vectors where a match condition is qualified. The FD bit can also be set on an
arbitrary vector basis. To set the FD bit, the syntax "F=off" should follow the timeset information (or the
data where no timeset is given). See the later example for details.
Serial/Parallel Send/Receive
Note there is also a send/receive capability. If this feature is used, the appropriate extended microcode
should be included after a timeset (or after a fail disable statement if applicable) but before a comment.
For the most part, common conventions were followed for the send/receive syntax. Channels that will
receive data from the device are represented by a 'v' or a 'V' character. Channels that will send data to a
device are represented by a 'w' or a 'W' character. The control operation of the send and receive shift
registers are represented as follows:
W=load (or W1=load) ;loads a parallel word to the shift register

from memory
W=shift (or W1=shift) ;shifts left all bits in the drive register
(DDCH0 = lsb)
A=store (or A1=store) ;stores a parallel word from the shift register
to memory
A=shift (or A1=shift) ;shifts left all bits in the capture register
(DDCH0=lsb)
Note that there are some constraints on using the send and receive memory. Since the drive (send) and
capture (receive) shift registers share the same bus, it is not possible to 'load' and 'store' on the same
vector cycle. All other combinations are valid.
It is best to visualize the shift register operation as occurring at the end of the T0 cycle. Also, do not
perform a capture on the last two vectors of a pattern, but pad with at least two dummy vectors.
Channel Default
Normal operation of this translator will only operate on the channels that are defined in the header portion
of the file. All undefined channels will be set in a high impedance mode when the pattern is run. There
could possibly be a case where it is desirable to set all the undefined channels to either a high or low drive
condition. The following syntax, when added to the header, will accomplish this.
.chdefault HIGH
.chdefault LOW
Note that it is also possible, although not necessary, to define the .chdefault as HIZ or MASK.
The user should be advised that although this feature is present, it should be used with extreme caution.
Use this feature sparingly when there are no alternatives ( example: a pattern exists that uses 15 channels
but all the undefined channels need to be set to drive low and there are 30K vectors to modify).
Improper consideration when using this feature could result in damaged devices or DSPIO drivers and is
not normally a reasonable way to treat your ATE system.
Pattern Example
;
;****************************************
;
;DEFINE GROUPS
;--------------------
.chmap INDATA = {7,6,5,4,3,2,1,0}
.chmap OUTDATA = {23,22,21,20,19,18,17,16}
.chmap TRIG = {8}
.tset t0
.chdefault HIZ
;****************************************
;
;
;
; IN OUT
; M M
; S S
; B B
;----------------------------------------
TEST_PATTERN: 00000000 XXXXXXXX 0
00000000 XXXXXXXX 1
00000000 LLLLLLLL 1
00000001 LLLLLLLH 1
00000010 LLLLLLHL 1
00000011 LLLLLLHH 1
00000100 LLLLLHLL 1
00000100 LLLLLHLH 1 F=off ; comment
rpt 10 00000000 XXXXXXXX 0
HALT 00000000 XXXXXXXX 0
;----------------------------------------
CAPTURE_DATA: 00000000 XXXXXXXX 0
lcnt 256 00000000 XXXXXXXX 0
WWWWWWWW XXXXXXXX 1 W=LOAD ;
jmp (!L) .-1 WWWWWWWW VVVVVVVV 1 A=STORE ;
WWWWWWWW XXXXXXXX 0
HALT WWWWWWWW XXXXXXXX 0
.sym (Symbol Table)
A symbol table is also generated by the pattern compiler, for ease in starting a pattern burst at a named
label, instead of needing to define the physical memory start address. Use of the symbols is explained
later.
For the sample pattern given above, this is the symbol table:
TEST_PATTERN = 0
CAPTURE_DATA = 10
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Digital Instruments DIGMOD Program Structure
DIGMOD Program Structure

Here is a list of required steps when using the DIGMOD, and the frequency at which they should be
performed. Several tasks need only be done during program initialization, while others might require more
frequent adjustment.
The DIGMOD and QUADUVM drivers are a separate library that needs to be linked into the test program.
To access the special libraries do the following
1. 1) In KVDTestAppMainHeader.h (or whatever the main header file for your test programis named)
add the line:
#include "c:\_kvdco\Include\DigmodLib.h"
after the
#include "c:\_kvdco\Include\KVDwin.h"
line.
2. 2) Add the Library to the Project List:
a.View Project
b.Select your .EXE file
c.Add c:\_kvdco\libraries\digmodlib32.lib
3. Add the following line in the beginning of SystemInit()
InitDIGMOD();
4. Add the following line in the beginning of LotInit()
ModuleInitDigmod(1);
One Time (in SystemInit or LotInit)
• Define PATDATA
• Loading compiled patterns into Pattern memory
• Assigning Pattern Symbols
• Loading Send/Capture Memory if applicable
At Least One Time (Location of Your Choice)
• Set up clocking - frequency and master/slave relationships

• Pin driver and comparator levels
• Pin formats and edge timing
• Enabling the desired pin drivers
• Set up send/capture memory
Every Time (Inside TSeq, the Mainloop Test Sequencer)
• Ensure DIGMOD Pin Connections through Father Card to the DUT

• Parametric/continuity measurements
• DIGMOD functional operation
• Bursting (executing) the Patterns
• Pattern comparisons for fails
• Check fail flag if applicable
• Serial send/capture activity
Defining PATDATA
PATDATA is a structure that you use to manage your pattern memory. More than one compiled pattern file
can be loaded into the DSPIO vector RAM, and they need to be enumerated just once in your test
program, typically in SystemInit.
// PATDATA Structure
/*
typedef struct {int id;
char filename[1000];
unsigned bank;
unsigned long address;
long length;
int loadflag;
int haltflag;
int retestpat;
} PATDATA;
Here is a sample definition:
PATDATA pat_list[] = {
//ID FILENAME BANK LOADFLAG RETESTPAT
// OFFSET LENGTH HALTFLAG
{0, "Demo1.BP", 0, 0UL, 100UL, 1, 2, -1},
{1, "Demo2.BP", 0, 200UL, 50UL, 1, 2, -1},
{-1, "NOPATT", 0, 0UL, 0UL, 0, 2, -1}
};
The lines beginning with // are comments, to aid remembering in what order the arguments appear. You
will find a template for this in your typical blank program, in UserClass.cpp.
The ID number should be an integer starting at 0, and increment by one for every entry. If you wish to load
multiple compiled patterns into your pattern RAM, you will need to manage the start addresses and lengths
to make sure they don't overlap each other in your bank of memory.
The line that begins with an ID of -1 is a dummy entry, defining the end of the list. Always just copy this at
the end of your own list without modification.
The filename is the name of the valid .bp file you wish to use. They are assumed to reside in the local test
program folder unless you change the PATDIR variable, or explicitly name the folder in the patload
command.
The BANK field is currently not used, and is ignored. Please leave it as 0.
212 PN: 73-01003-00, November 2008

OFFSET is the start address in memory where the pattern is to be loaded.
LENGTH represents your entry of the size of the pattern file in vectors. pat_load fills in the actual number
of vectors stored.
LOADFLAG needs to be a 1 for pat_load to load the pattern (useful only for skipping large patterns while
debugging).
HALTFLAG, RETESTPAT are legacy flags, left over from a previous KVD digital implementation, retained
for backwards compatibility. They can be safely ignored.
DIGMOD Pattern Loading into Memory
At one time, usually in an initialization section of the program such as LotInit, you need to load the pattern
memory of the DSPIO instrument with your compiled pattern. Do not do this within Tseq, since that
function is executed once per device, and loading the patterns repetitively would be a waste of time.
PATLIST Technique
//Summary:Loads the pattern data listed in the pat_list into the pattern
// manager, and then reformats the information into MAP format
//See Also: LoadFromFile, ImportPatList, ImportFromFile
void TPatternManager::CreateMapFile(PATDATA* pat_list, char* pat_dir, int defaultparallel)
INI File Technique
//Summary:Uses an INI file format to load patterns information in the Pattern
// Manager. The information is scanned, and reformatted to be in MAP format
//See Also: LoadPatlist, ImportPatList, ImportFromFile
void TPatternManager::LoadFromFile(AnsiString filename)
MAP File Technique

//Summary : Once a MAP file has been created, this command should be used instead of the
LoadFromFile
// and the LoadPatlist commands. Those commands create the MAP file, then load it. This command
// loads the MAP file directly.
void TPatternManager::LoadMapFile(AnsiString filename)
KLF File Technique

//Summary : This method open and retrieves data from a .klf file
//
void TPatternManager::LoadKLFFile(AnsiString filename)
Loading the pat_list into DIGMOD Memory

Once defined, the pat_list needs to be loaded from its hard disk (or network) location using the patload
command. The arguments are pat_list (the array you have previously defined) and the patdir (the
directory containing the named .bp files). This is usually executed in LotInit.
Example:
DIG0->patload(pat_list,"c:\\your_test_program\\");
You should normally add a delay after this of a few hundred milliseconds to allow the command to
complete before continuing along in your program.
Set Object Variable DIG0->peekmode = 0 to have the patload command not verify pattern loads to speed
pattern loads.
This is a picture of what your pattern RAM would contain after you loaded the pat_list defined by the
previous example:
Figure 8.11: Pattern RAM Memory Management
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Data Formats
Plus HIGH, LOW, CLKX2, CLK, CLK2, CLK4, and CLK8
Figure 8.12: Timing Diagrams of the Various Formats
Main Formats
• NRZ - Non-Return to Zero (Between the start and stop edge, the data is high or low, and it stays where
it was after the stop edge.)
• RZ - Return to Zero (Data always goes or stays low after the stop edge)
• RZC - Return to Zero Complement (The inverse of RZ)
• RO - Return to One (Data always goes or stays high after the stop edge.)
• ROC - Return to One Complement (The inverse of RO)
• CS - Complement Surround (No matter what the data is, high or low, during its valid time between start
and stop, it goes to the opposite level. Guaranteed to have at least two transitions per T0.)
• CSC - Complement Surround Complement (inverse of CS)
T0 - T Zero - the typical name for the Data Rate of a Digital Subsystem. Every T0 tick means another
vector has been executed from pattern or send/receive RAM.
Each T0 contains one vector's worth of formatted data. The data is defined in the pattern. The levels are
defined in the dlevel command and edge placement is defined in the dfmt command.
Other Formats
• High
• Low
• CLKX2: Master Clock X 2
• CLK: Master Clock
• CLK2: Master Clock/2
Note that these additional formats are "pattern independent" meaning that a static format will be generated
regardless of the pattern content, but only if one of the following two statements is true:
• Pattern is halted and the channel is enabled
Or
• Pattern is running and a valid drive symbol (0,1) is being sent (in other words, not tri-state)
Start and Stop Timing for the above waveforms are derived from the Master Clock and a per pin fine delay
line. Likewise for the per pin Comparator Edge Strobe.
Pin Definition
Basics
The KVD Operating System defines a DIGMOD pin as type TDMDigPin. There are system defined pins
DMCH[0]->DMCH[191]. It is important to note that DIGMOD16 pins ARE NOT defined contiguously. This
numbering feature will allow for simple program portability between DIGMOD16 based systems and
DIGMOD32 based systems.
For DIGMOD16 boards the pins are defined as follows:
DIGMOD0 : DMCH[0] - DMCH[15]

Total of 96 pins if the system is populated with DIGMOD16 boards.
Pin Definition & Grouping
While it is possible to construct an entire program using the system defined pin names, most test program
developers will want to assign a pin naming structure that closely mimics the DUT pin names, and will also
want to create groups of pins. The following text contains a brief explanation of pin naming. This will prove
helpful in understanding the DMCH pin programming syntax.
216 PN: 73-01003-00, November 2008

Digital Instruments Pin Definition
Single Pin Naming

TDMDigPin *SCLK;
SCLK = DMCH[6];
DMCH[6]->setname("SCLK");
Now the test engineer only has to remember the name 'SCLK' and not the actual DMCH number. The
setname command changes the RTI (Real Time Interface) pin labeling to the more memorable 'SCLK'.
Grouping Pins
Pins can also be 'grouped' together in order to simplify programming. Each group can contain between 1
and 32 DMCH pins. Groups of pins can consist of other groups of pins, so long as the group total does not
exceed 32.
TDMDigPin *data0;
TDMDigPin *data1;
data0 = DMCHCreate("data0", DMCH[0], DMCH[16], DMCH[32], DMCH[48]);

data1 = DMCHCreate("data1", DMCH[1], DMCH[17], DMCH[33], DMCH[49]);
This will create 2 pin groups of 4 pins each.
Group definitions also cause changes in the RTI (Real Time Interface) debugging tool display, for
decluttering and ease of issuing commands to the group. This is shown in section 17 of this chapter.
Grouping of Groups
Assuming two groups have been defined as outlined in the previous example, these groups can then be
combined to form a third group:
TDMDigPin *alldata
data0 = DMCHCreate("alldata", data0, data1);
Now the group "alldata" will consist of 8 DMCH pins.
It is important to note that the more detailed command syntax description that follows applies to both single
pins (DMCH) or groups of pins (more than one DMCH), and that a group can consist of a maximum of 32
DMCH pins.
DIGMOD Pin (DMCH) Programming

Here is a quick listing of commands that can be applied to the TDMDigPin Class.
SetSiteMode setv pmucompi drvfeskew

enable seti l1abus_con cmphiskew
disable irange l1abus_discon cmphifeskew
forcemode vrange dtiming cmploskew
forceenable imeter dfmt cmplofeskew
force vmeter tset enaskew
dlevel measvm fmt enafeskew
cmplevel loaddisable format keepalive
vil load start dka
vih dig_con stop dcmp
vol dig_discon enastart dcomp
voh abus_con enastop tmucon
trm abus_discon cmpstart measfreq
trmenable dtimingT0 cmpstop vclamps
pmuenable pmucompv drvskew
DMCH Pin Programming Functions
Examples are given here.
DMCH[x]->SetSiteMode
Example:
DMCH[0]->SetSiteMode(TRUE, 1);
This will assign DIGMOD channel 0 to site 1.
void TDMDigPin::SetSiteMode(bool _sitemode, short site)
Arguments:
bool _sitemode // TRUE or FALSE

short site // 1-16
DMCH[x]->enable
Enables or disables a pin or group of pins. Enabling a pin means that when pattern execution is stopped
the pin continues to drive to the keep alive data. Otherwise it will tri-state (or go to the termination voltage if
termination enabled). When the pattern executes the pin is enabled if the data is set to a drive 0 or 1. At
initialization all pins are disabled.
Example:
DMCH[2]->enable(1);
DMCH[2]->enable();
The above 2 statements are effectively the same and will enable the driver on channel 2.
218 PN: 73-01003-00, November 2008

Digital Instruments DIGMOD Pin (DMCH) Programming
short TDMDigPin::enable(unsigned value)
Arguments:
unsigned value // 0=disable 1=enable
DMCH[x]->disable
At initialization all pins are disabled.
Example:
DMCH[3]->disable();
DMCH[3]->enable(0);
Note the above 2 statements are effectively the same and will disable the driver on DIGMOD channel 3.
short TDMDigPin::disable(void)
Arguments:
none
DMCH[x]->forcemode
This mode will override the formatter pattern logic and allow the DIGMOD channel to be set to a static logic
condition. This is different from keepalive in that the forced state is a high or low level, where the keepalive
argument is the data presented to the formatter.
Example:
myGroup->forcemode(1);
short TDMDigPin::forcemode(unsigned value)
Arguments:
unsigned value // 0=pattern 1=static
DMCH[x]->forceenable
This mode will work with the forcemode statement and will enable the driver for static forcing. Assuming
the pin has been set to forcemode, this statement will effectively set the pins in 'myGroup' to a static state
that is determined by the 'force' statement.
Example:
myGroup->forceenable(1); // 0=hiz 1=drive

short TDMDigPin::forceenable(unsigned value)
Arguments:
unsigned value // 0=hiz 1=drive
DMCH[x]->force
This mode will work with the forcemode and forceenable statements and will set the state (high or low) of
the pin or group that has previously been set to forcemode.
Example:
myGroup->force(0); // 0=low 1=high
Assuming the pin has been set to forcemode, and the forcemode has been enabled this statement will
effectively set the pins in 'myGroup' to a static state low. The table below shows pin state with forcemode
on.
Forceenable force Pin State
0 0 hiz
0 1 hiz
1 0 low
1 1 high
short TDMDigPin::force(unsigned value)
Arguments:
unsigned value // 0=low 1=high
DMCH[x]->dlevel
This will set the DIGMOD pin drive and compare levels; both low and high drive levels as well as low and
high compare levels.
Example:
DMCH[7]->dlevel(0.4, 2.8, 1.0, 1.4);

short TDMDigPin::dlevel (double lo,double hi,double cmplo,double
cmphi)
Arguments:
double lo // drive low level

double hi // drive high level
double cmplo // compare low level
double cmphi // compare high level
DMCH[x]->cmplevel
This will set the DIGMOD compare levels only. Typically the all levels will be set with the 'dlevel' statement,
however it is sometimes necessary to change only one of the compare levels.
Example:
DMCH[7]->cmplevel(1.0, 1.4); //cmplo, cmphi

short TDMDigPin::cmplevel (double cmplo, double cmphi)
Arguments:

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DMCH[x]->vil
This will set the DIGMOD drive low level only. Typically the all levels will be set with the 'dlevel' statement,
however it is sometimes necessary to change only one level.
Example:
myGroup2->vil(0.4);
short TDMDigPin::vil (double vil)
Arguments:
double vil // drive low level
DMCH[x]->vih
This will set the DIGMOD drive high level only. Typically the all levels will be set with the 'dlevel' statement,
however it is sometimes necessary to change only one level.
Example:
myGroup2->vih(2.8);
short TDMDigPin::vih (double vih)
Arguments:
double vih // drive high level
DMCH[x]->vol
This will set the DIGMOD compare low level only. Typically the all levels will be set with the 'dlevel'
statement, however it is sometimes necessary to change only one level.
Example:
myGroup2->vol(1.0);
short TDMDigPin::vol (double cmplo)
Arguments:
DMCH[x]->voh
This will set the DIGMOD compare high level only. Typically the all levels will be set with the 'dlevel'
statement, however it is sometimes necessary to change only one level.
Example:
myGroup2->voh(1.5);
short TDMDigPin::vol (double cmphi)
Arguments:
DMCH[x]->trm
This will set a termination voltage on a DIGMOD channel using the pin driver (not the PMU). This
statement is used with the 'trmenable' statement to allow for termination through 50 Ohm to a specific
voltage.
Example:
myGroup2->trm(1.5);
short TDMDigPin::trm (double value)
Arguments:
double value // termination voltage level
DMCH[x]->trmenable
This statement is used to allow for termination through 50 Ohm to a specific voltage as defined by the 'trm'
statement.
Example:
myGroup2->trmenable(1);
Note that the DIGMOD channel will now be terminated thru 50ohm to a voltage defined by the 'trm'
statement. This means the whenever the DIGMOD driver is HIZ (disabled), the pin will go to this
termination level.
short TDMDigPin::trmenable(unsigned value)
Arguments:
unsigned value // 0=termination off, 1=termination on
DMCH[x]->pmuenable
Each DIGMOD channel has a built in PMU (parametric measurement unit) that will allow for analog force
and measure directly through the 'digital' pin connection. This allows for high speed contact and leakage
measurements on many pins at the same time, static settings that exceed the normal drivel level, and so
forth.
Example:
myGroup2->pmuenable(1); // 0=pmu disabled, 1=pmu enabled
The PMU may be enabled while the DIGMOD driver is also enabled. Previous documentation that his was
not possible were in error.
222 PN: 73-01003-00, November 2008

short TDMDigPin::pmuenable(unsigned value)
Arguments:
unsigned value // 0=pmu disabled, 1=pmu enabled
DMCH[x]->vclamps
This will set the voltage clamps for a PMU. Note it is vclamps, not vclamp (which is used for DC sources)
Example:
myGroup3->vclamps(-2, 6);
short TDMDigPin::vclamps(double clamplo, double clamphi)
Arguments:
double value // range -2V to +10V
DMCH[x]->setv
This will set the voltage level for an 'enabled' PMU, and set the PMU to force voltage mode
Example:
myGroup3->setv(3.0);
short TDMDigPin::setv(double value)
Arguments:
double value // range -2V to +10V
DMCH[x]->seti
This will set the current level for an 'enabled' PMU, and set the PMU to force current mode.
Example:
myGroup3->seti(10e-6);
short TDMDigPin::seti(double value)
Arguments:
double value // limits depend on 'irange'
DMCH[x]->irange
Each PMU is limited to 2 voltage ranges, however there are 8 defined current ranges.
Example:
myGroup3->irange(1);
myGroup3->irange(PMU_8MA);
short TDMDigPin::irange(unsigned range)
Arguments:
unsigned range // valid current ranges are 0-7 and are also defined //
as follows:
// 0 = PMU_32MA
// 1 = PMU_8MA
// 2 = PMU_2MA
// 3 = PMU_512UA
// 4 = PMU_128UA
// 5 = PMU_32UA
// 6 = PMU_8UA
// 7 = PMU_2UA
DMCH[x]->vrange
Each PMU has 2 voltage ranges.
Example:
myGroup3->vrange(1);
short TDMDigPin::vrange(unsigned range)
Arguments:
unsigned range // valid voltage ranges are 0-1 and are also defined as
follows:
// 0 : -2V->10V
// 1 : -1V->7V
DMCH[x]->imeter
Each PMU can force voltage or current and measure voltage or current. This statement is used to set up
the PMU to measure current.
Example:
myGroup3->imeter();
short TDMDigPin::imeter(void)
Arguments:
none
DMCH[x]->vmeter
Each PMU can force voltage or current and measure voltage or current. This statement is used to set up
the PMU to measure voltage.
Example:
myGroup3->vmeter();
short TDMDigPin::vmeter(void)
Arguments:
none
224 PN: 73-01003-00, November 2008

DMCH[x]->measvm
Each PMU can force voltage or current and measure voltage or current. This statement is used to measure
voltage or current on a PMU channel(s) as previously set by the 'imeter' or 'vmeter' statement.
Example:
DMCH[8]->measvm(100); // numsamples 1-1023
The average result of 100 measures on DIGMOD channel 8 PMU is returned by this function. In addition
the result will be saved in SITE->lastresult.value if the pin is NOT in 'SiteMode'. If the pin is in 'SiteMode',
the result will be saved in SITE->results[site].value, where site is the preassigned site for the DIGMOD
channel - in this case DMCH[8].
double TDMDigPin::measvm(unsigned numsamples)
Arguments:
unsigned numsamples // 1-1023
DMCH[x]->ldenable
In addition to performing typical PMU functions of force and measure, the DIGMOD PMU can also be used
to provide a static resistive load. This is particularly useful if a device pin requires a pullup to some voltage
level. This pullup can be enabled on the DIGMOD pin using the PMU range resistors.
Example:
myPins->ldenable(1);
short TDMDigPin::ldenable(unsigned value)
Arguments:
unsigned value // 0=disable load, 1=enable load
This is not the same as termination, for termination see 'trmenable' and 'trm'.
DMCH[x]->loaddisable
This will disable the PMU resistive load.
Example:
myPins->loaddisable();
short TDMDigPin::loaddisable(void)
Arguments:
none
This is not the same as termination, for termination see 'trmenable' and 'trm'.
DMCH[x]->load
The load resistor and voltage are programmed with this command.
Example:
myPins->load(3, 3.4); // range, voltage

myPins->load(PMU_2KOHM, 3.4);
Both of these examples will accomplish the same goal. The 2Kohm load will be set and the voltage load
will be set to 3.4 volts. This will effectively 'pullup' the DIGMOD channels defined in 'myPins' to 3.4 volts
through a 2K Ohm resistor.
short TDMDigPin::load(unsigned range,double voltage)
Arguments:
unsigned range // valid load values are 0-7 and are also defined as
follows:
// 0 = PMU_80OHM
// 1 = PMU_180OHM
// 2 = PMU_500OHM
// 3 = PMU_2KOHM
// 4 = PMU_8KOHM
// 5 = PMU_32KOHM
// 6 = PMU_128KOHM
// 7 = PMU_500KOHM
DMCH[x]->dig_con
By default all DIGMOD channels are isolated from the Fathercard with a dedicated relay per channel. In
order to connect the driver/comparator or PMU resource to the DUT, this relay connection must be closed.
Example:
myPins5->dig_con();
short TDMDigPin::dig_con(void)
Arguments:
none
DMCH[x]->dig_discon
Likewise, this connection must be opened if isolation is desired.
Example:
myPins5->dig_discon();
short TDMDigPin::dig_discon(void)
Arguments:
none
DMCH[x]->abus_con
In addition to connecting the DIGMOD pin electronics up to the Fathercard, it is also possible to connect an
alternate analog resource for higher voltage and current capability. This resource is typically MPDS[0]. A
relay is provided that will connect a DIGMOD pin to the 'ABUS'. Further effort will be needed to connect
this internal ABUS to the motherboard and then to MPDS[0] if you wish to use MPDS[0] for parametric
measurements. See also the MPDS function backplane_con on page 137.
226 PN: 73-01003-00, November 2008

DDBusA
5 0
0-
OD
OD CM
IGM n] D
P [0]
D [ M DS
CH P
DD M
Example:
myPins5->abus_con();
Caution is urged when using this command as any number of pins can simultaneously be connected to this
bus, effectively shorting DUT pins together.
short TDMDigPin::abus_con(void)
Arguments:
none
DMCH[x]->abus_discon
Opposite of abus_con (opens relay to ABUS)
Example:
myPins5->abus_discon();
short TDMDigPin::abus_discon(void)
Arguments:
none
DMCH[x]->l1abus_con
Once a connection is made between the on board ABUS and a pin or group of pins, this bus will need to be
connected to the motherboard so it can connect to MPDS[0] via a connection called Line1 (or l1) on the
motherboard schematic.See also the MPDS function backplane_con on page 137.
Example:
DMCH[5]->l1abus_con();
short TDMDigPin::l1abus_con(void)
Arguments:
none
DMCH[x]->l1abus_discon
Disconnects the connection made by the l1abus_con command.
Example:
DMCH[5]->l1abus_con();
short TDMDigPin::l1abus_con(void)
Arguments:
none
DMCH[x]->dtiming
There are many parameters involved in setting up timing for a DIGMOD channel. This is the master
command that will allows setting all timing for a single timeset. It is also possible to set each parameter
individually.
Example:
digbus->dtiming( 2,
RZ,
10e-9,
50e-9,
0e-9,
80e-9,
60e-9,
70e-9,
0);
short TDMDigPin::dtiming( unsigned tset,

FORMAT format,
double start,
double stop,
double enastart,
double enastop,
double cmpstart,
double cmpstop,
unsigned dka)
Arguments:
unsigned tset // timeset range 0-15

FORMAT format // drive format (see sequencer section)
// available formats:
RZ (return to zero)
RO (return to one)
CS (complement surround)
RZC (RZ complement)
ROC (RO complement)
CSC (CS complement)
HIGH (high)
LOW (low)
CLK2 (2xtimeset rate)
NRZ (non return to zero)
HIZ (high impedance)
double start // driver start edge
double stop // driver stop edge (ignored for NRZ format)
double enastart// driver enable start edge
228 PN: 73-01003-00, November 2008

double enastop // driver enable stop edge

double cmpstart// compare start edge
double cmpstop // compare stop edge
unsigned dka // keep alive data (0 or 1)
Available formats: RZ (return to zero)

RO (return to one)
RZC (RZ complement)
ROC (RO complement)
CSC (CS complement)
HIGH (high)
LOW (low)
CLK2 (high at start time,
low at stop time,
high at start time*2,
low at stop time*2, …)
CLK4 (same as CLK2)
DMCH[x]->dtimingT0
Alternate Timing Setup Command: dtimingT0
Time is programmed as a multiplier of the T0 rate for the current timeset.
0 = Time 0
0.1 = 10% of T0 rate
1 = 100% of T0 rate
short dtimingT0(unsigned tset,FORMAT format, double start,double stop,

double enastart=-1., double enastop=-1, double cmpstart=-1., double
cmpstop=-1., unsigned ka=0xFFFF);
Example:
WE ->dtimingT0(1, RO, 0.1, 0.6 ,0, 1, 0.50, 0.55, 1);

OE ->dtimingT0(1, HIGH, 0.0, 0.6 ,0, 1, 0.50, 0.55, 1);
CE ->dtimingT0(1, RO, 0.0, 0.7 ,0, 1, 0.50, 0.55, 1);
DATA->dtimingT0(1, NRZ, 0.0, 1.0 ,0, 1, 0.50, 0.55, 0);
ADDR->dtimingT0(1, NRZ, 0.0, 1.0 ,0, 1, 0.50, 0.55, 0);
DMCH[x]->dtiming_combine
Special variant of dtiming, which puts the pin into combine mode where the data from the next higher
channel is combined with the data from the existing channel to provide double the data rate of the
sequencer. This mode is only supported when the T0 Divider is set to 2. The data from the programmed
channel is used for the first MCLK cycle and the data from the adjacent channel is used for the second
cycle. Note that the adjacent channel can still be used in a static mode by using forcemode.
short TDMDigPin::dtiming_combine(unsigned tset,

FORMAT format,
double start,
double stop,
double enastart,
double enastop,
double cmpstart,
double cmpstop,
unsigned dka)
DMCH[x]->dfmt
The 'dfmt' command is similar to the 'dtiming' command except that only the drive edges are set.
Example:
digbus->dfmt(2,
RZ,
10e-9,
50e-9,
0);
short TDMDigPin::dfmt(unsigned tset,
FORMAT format,
double start,
double stop,
unsigned dka)
Arguments:
unsigned tset // timeset range 0-15

FORMAT format // drive format (see sequencer section)
// available formats:
RZ (return to zero)
RO (return to one)
RZC (RZ complement)
ROC (RO complement)
CSC (CS complement)
HIGH (high)
LOW (low)
double start // driver start edge
double stop // driver stop edge (ignored for NRZ format)
unsigned dka // keep alive data (0 or 1)
DMCH[x]->dcmp
The 'dcmp' command can be used to set the enable and comparator timing edges for the defined timeset.
No drive edges are set.
Example:
digbus->dcmp( 3, 40e-9, 60e-9, 70e-9);
short TDMDigPin::dcmp(unsigned _tset,

double _start,
double _stop,
double _ioswitch)
Arguments:
unsigned _tset // range = 0-15

double _start // 0-timeset max
double _stop // 0-timeset max (_stop>_start)
double _ioswitch // 0-timeset max
230 PN: 73-01003-00, November 2008

DMCH[x]->dcomp
The 'dcomp' command is similar to 'dcmp' except only the compare start edge is programmed. It is
assumed that the compare window will be open for 2 master clock cycles (MCLK - see PLL setting). It is
also assumed that the driver will be enabled at 0nS.
Example:
digbus->dcomp( 3, 40e-9);
short TDMDigPin::dcomp(unsigned _tset,
double _start)
Arguments:
unsigned _tset // range = 0-15

double _start // compare start edge
DMCH[x]->tset
If it is necessary to program individual timing for a specific timeset, this command will simply set a variable
that will define the timeset for subsequent timing commands that do not pass a 'timeset' argument.
Example:
DMCH[5]->tset(2);
short TDMDigPin::tset(double value)
Arguments:
double value // range = 0-15
DMCH[x]->fmt , DMCH[x]->format
This will set the drive format for the current timeset defined by the 'tset' command.
Example:
DMCH[5]->fmt(RZC);
DMCH[5]->format(RZC);
short TDMDigPin::fmt(FORMAT value)
Arguments:
FORMAT value // see 'dtiming' for available formats
DMCH[x]->start
This will set the drive start edge for the current timeset defined by the 'tset' command.
Example:
allpins->start(20e-9);
short TDMDigPin::start(double value)
Arguments:
double value // range=0-timeset rate
DMCH[x]->stop
This will set the drive stop edge for the current timeset defined by the 'tset' command.
Example:
allpins->stop(40e-9);
short TDMDigPin::stop(double value)
Arguments:

// (must be greater than start)
DMCH[x]->enastart
This will set the driver enable start edge for the current timeset defined by the 'tset' command.
Example:
allpins->enastart(0e-9);
short TDMDigPin::enastart(double value)
Arguments:
DMCH[x]->enastop
This will set the driver enable stop edge for the current timeset defined by the 'tset' command.
Example:
allpins->enastop(60e-9);
short TDMDigPin::enastop(double value)
Arguments:
double value // range=0-timeset rate (must be greater than

the enastart edge)
DMCH[x]->cmpstart
This will set the comparator start edge for the current timeset defined by the 'tset' command.
Example:
allpins->cmpstart(70e-9);
short TDMDigPin::cmpstart(double value)
Arguments:
DMCH[x]->cmpstop
This will set the comparator stop edge for the current timeset defined by the 'tset' command.
232 PN: 73-01003-00, November 2008

Example:
allpins->cmpstop(80e-9);
short TDMDigPin::cmpstop(double value)
Arguments:
double value // range=0-timeset rate (must be greater than

cmpstart edge)
DMCH[x]->keepalive
This will set the keepalive data for the current timeset defined by the 'tset' command.
Example:
allpins->keepalive(1); // 0=zero, 1=one

short TDMDigPin::keepalive(unsigned value)
Arguments:
unsigned value // 0=low, 1=high
Whether the driver drives high or low is a combination of the keepalive data and the pin's format. Note that
in KVD architecture, Keepalive mode is always active when a pattern is not bursting. This command does
NOT control whether or not Keepalive mode is active.
DMCH[x]->dka
This will set the keepalive data for the current timeset defined by the 'tset' command. It will also 'enable/
disable' the driver if desired.
Example:
allpins->dka(1,1);
short TDMDigPin::dka(unsigned value, unsigned _enable)
Arguments:
unsigned value // 0=low, 1=high

unsigned _enable // 0=disabled, 1=enabled
DMCH[x]->tmucon
Each DIGMOD board has a mux that can connect the high or low comparator buffered output to the
backplane to the KVD TMU Module, via the DDTMUA or DDTMUB bus. The last connected channel stays
on the TMU bus until replaced by another channel. There is no additional DUT loading caused by this
connection, so there is currently no disconnect function.
Example:
XCLK->tmucon(DDTMUA, 1);
short TDMDigPin::tmucon(TMUCHAN tchan, unsigned hilo)
Arguments:
TMUCHAN tchan // DDTMUA or DDTMUB

unsigned hilo // 0=low comparator, 1=high comparator
Be extremely careful to not apply this command to pin groups so you do not short channels out.
DMCH[x]->measfreq
Each DIGMOD board has a built in TMU (time measurement unit) that allows for accurate measurements
of digital frequency. This is a useful feature for the measurement/adjustment of DUT built-in oscillator
circuits. The 'measfreq' command will return the measured frequency. Results will be placed in the proper
SITE->results[site].value array location for each site if the pins are setup in SiteMode. Otherwise the
results will be placed in SITE->lastresult.value. This is for convenience for the datalogging KVD->Test()
command.
Example:
XCLK->measfreq(DDTMUA, 1, 32, 10e-3);
double TDMDigPin::measfreq(TMUCHAN tchan,
unsigned hilo,
unsigned cycles,
double timeout)
Arguments:

unsigned cycles // cycles to measure over (2-65535)
double timeout // timeout (default timeout=500e-3)
DMCH[x]->start_measfreq
Each DIGMOD has a built in TMU on it, so to start parallel frequency measurements on pins that are on
separate DIGMOD boards the start_measfreq is used to start the measurement. A subsequent measfreq
command will readback the measurements from each of the boards.
Example:
XCLK->start_measfreq(DDTMUA, 1, 32, 10e-3);

Unsigned start_measfreq(TMUCHAN tchan, unsigned hilo, unsigned cycles,
double timeout);
Arguments:

unsigned cycles // cycles to measure over (2-65535)
double timeout // timeout (default timeout=500e-3)
PMU Comparator Enables
short pmucompv(double lo, double hi); // Set PMU comparator levels for
comparing voltage
short pmucompi(double lo, double hi); // Set PMU comparator levels for
comparing current
The pmucompv and pmucompi statements setup "limits" for the voltage and current on the PMU. The PMU
comparators are routed to the functional comparators allowing either a pattern to verify status or for it to be
done via a snap() function.
234 PN: 73-01003-00, November 2008

These comparators are not calibrated or very accurate (10-20%) and to be used for a quick snap of
continuity or leakage. For example if your leakage specs are ±1uA then programming ±800nA on the 2uA
range would give you sufficient coverage on whether you are above or below the threshold. If you fail the
rough comparator test then the pins should individually be tested. The accuracy could somewhat be
improved with calibration, but in current mode the full scale voltage range to the comparators is only ±1V.
This could be effected by noise and resolution. Note that the snap() function for a group returns two bits
per group entry with the MSBs being the first entry in the mask.
Here is an example of 8 pins being measured in parallel for continuity:
unsigned contstatus;
ALLPINS->dig_con();
ALLPINS->setv(0);
ALLPINS->pmucompv(-0.8, -0.15);
ALLPINS->vclamps(-3,4);
ALLPINS->irange(3);
ALLPINS->vrange(0); // Needed to set lower V limit to below -1
ALLPINS->pmuenable(1);
SYS->del(3.0e-3);
// xtime1 = SYS->read_counter();
LOG->tnum(testnum+0);
DATA->seti(-100e-6);
SITE->lastresult.value = contstatus = DATA->snap();
if (KVD->Test())
return(FAIL);
DATA->setv(0);
contstatus = DATA->snap();
------------------------------------------------------------------------
--
A grouped leakage example:
unsigned leakstatus;
ALLPINS->setv(0);
ALLPINS->irange(PMU_2UA);
ALLPINS->pmucompi(-0.8e-6, 0.8e-6);
ALLPINS->pmuenable(1);
SYS->del(3.0e-3);
// xtime1 = SYS->read_counter();
LOG->tnum(testnum);
SITE->lastresult.value = leakstatus = DATA->snap();
if (KVD->Test())
Sequencer Definition
Basics
The KVD Operating System defines a Sequencer as a single DIGMOD board, or a grouping of DIGMOD
boards. It is possible to slave all DIGMOD boards together for testing a single DUT with higher pin count,
or make each board independent and dedicated to a specific site.
Sequencer Definition & Grouping
While it is possible (and common practice) to construct an entire program using the system defined
sequencer (SEQ0), it is also possible to create a specific sequencer name that applies to a single
DIGMOD board, or a group of DIGMOD boards.
Single Board Sequencer

TSEQUENCER *JEFF_SEQ;
JEFF_SEQ = DMSEQCreate("JEFF_SEQ",0);
Now when the program executes a command that references 'JEFF_SEQ', only DIGMOD0 will run.
Grouping Boards
DIGMOD boards can also be 'grouped' together into one 'SEQUENCER'. This will allow for a single
sequencer command to act upon multiple DIGMOD boards. By default all installed boards are grouped to
the system defined sequencer 'SEQ0'.
TSEQUENCER *XYZ_SEQ;
XYZ_SEQ = DMSEQCreate("XYZ_SEQ", 0, 1, 2, 3);
This will group together DIGMOD0-DIGMOD3 and allow XYZ_SEQ commands to operate on all boards (0-
3).
Sequencer Programming
Here is a quick listing of commands that can be applied to the TSEQUENCER Class.
SetSiteMode keepalive_timeset update_status patexe_array

SetMode dstop status patexe_parallel
mclk_sel dflags set_wait_timeout getsym
MasterSlave read_status patload dcap_setup
SetupMCLK dwait patload_parallel
dt0t dfail patload_pformat
dt0div cycle_count patexe
236 PN: 73-01003-00, November 2008

Digital Instruments Sequencer Programming
Sequencer Programming Functions
SEQ0->SetSiteMode
Assigns a DIGMOD board to a specific site. The default is FALSE and all boards will not be assigned to
specific sites, instead all will be assigned to a site 0. A multisite program normally assigns boards of a
SEQUENCER group to specific sites. Contact KVD Applications if you need to share one DIGMOD across
multiple sites. Code example pending.
Example:
SEQ0->SetSiteMode(TRUE, 0,1,2,3);
This will sequentially assign each DIGMOD board in the SEQ0 group to a specific site. Since SEQ0 is a
system defined group, this example will map out as follows:
DIGMOD0 -> site0

DIGMOD1 -> site1
DIGMOD2 -> site2
DIGMOD3 -> site3
void TSEQUENCER::SetSiteMode(bool _sitemode,
short _site0,
short _site1,
short _site2,
short _site3,
short _site4,
short _site5)
Arguments:
bool _sitemode // TRUE or FALSE

short _site0 // 0-5
short _site1 // 0-5
short _site2 // 0-5
short _site3 // 0-5
short _site4 // 0-5
short _site5 // 0-5
SEQ0->SetMode
This will set the operational mode of all boards that are included in the SEQUENCER.
Example:
SEQ0->SetMode(DM_INDEPENDENT,
DM_INDEPENDENT,
DM_INDEPENDENT,
DM_INDEPENDENT,
DM_INACTIVE,
DM_INACTIVE);
Options:
DM_NOTPRESENT - if DIGMOD is not loaded in test head

DM_MASTER - this board will be the master of all boards
DM_SLAVE - this board will sync to the MASTER
DM_INDEPENDENT - will run on its own clock, not a master or slave
DM_INACTIVE - board loaded in test head but not active for device test.
This example will set the first 4 DIGMOD boards of the SEQUENCER group to independent mode of
operation. All boards will have their own clock setup and will not be synchronous in any way. The last 2
boards in the SEQUENCER group are present in the head but are not used for this example.
void TSEQUENCER::SetMode(DMMODE _mode0,

DMMODE _mode1,
DMMODE _mode2,
DMMODE _mode3,
DMMODE _mode4,
DMMODE _mode5)
Arguments:
DMMODE _mode0
DMMODE _mode1
DMMODE _mode2
DMMODE _mode3
DMMODE _mode4
DMMODE _mode5 // following options for all:
// DM_NOTPRESENT
// DM_MASTER
// DM_SINGLEMASTER
// DM_SLAVE
// DM_INDEPENDENT
// DM_INACTIVE
DM_NOTPRESENT - if DIGMOD is not loaded in test head
DM_MASTER - this board will be the master of all boards
DM_SINGLEMASTER - ?
DM_SLAVE - this board will sync to the MASTER
DM_INDEPENDENT - will run on it's own clock, not a master or slave
DM_INACTIVE - board loaded in test head but not active for device test
SEQ0->mclk_sel
Selects a clock source for a DIGMOD defined as a MASTER in the SEQUENCER group, then configures
all 'SLAVE' boards to sync off of the MASTER. The master clock can come from several sources. Most
common and with most programmability would be the DM_PLLCLK. Other options include an external
clock derived on the Fathercard. All slave boards will use the DM_XSICLK that is produced on the
MASTER but that is handled by KVD library code.
Example:
SEQ0->mclk_sel(DM_PLLCLK);
void TSEQUENCER::mclk_sel(DM_CLK source)
Arguments:
DM_CLK source // following options

// DM_100MHZCLK= on board 100MHZ clock
// DM_PLLCLK = on board PLL clock
// DM_FCINCLK = clock from Fathercard
// DM_XSICLK = not allowed here
Note that if DM_PLLCLK is selected, it is necessary to program the PLL frequency.
SEQ0->MasterSlave
Selects the MASTER and connects others as SLAVE. For this example DIGMOD0 is the Master, other
active boards will be connected as SLAVE.
238 PN: 73-01003-00, November 2008

Example:
SEQ0->MasterSlave(0);
void TSEQUENCER::MasterSlave(unsigned _master)
Arguments:
unsigned _master // which DIGMOD board is the MASTER
SEQ0->SetupMCLK
Sets up the PLLCLK on ALL boards in the SEQUENCER, regardless of configuration. This will set the PLL
for all boards in the SEQUENCER as close to 100 MHz as possible, given the PLL limitations. If the
frequency is specified as 100MHz, the oscillator will be selected instead of the PLL. For most applications
this command will adequately setup the Master Clock.
Example:
SEQ0->SetupMCLK(100e6);
double TSEQUENCER::SetupMCLK(double freq)
Arguments:
double freq // which DIGMOD board is the MASTER
SEQ0->dt0t
Sets the T0 cycle rate for a specific timeset. Operates on all boards in the SEQUENCER. This will set the
rate for timeset 2 to 12.5 MHz, or as close as possible given the current MCLK settings. A alternate and
more reliable approach might be to program the timeset rate as a divider of MCLK. See 'dt0div'.
Example:
SEQ0->dt0t(2, 12.5e6);
short TSEQUENCER::dt0div(unsigned timeset, double freq)
Arguments:
unsigned timeset // 0-15

double freq // programmed in Hz
SEQ0->dt0div
Sets the T0 cycle rate for a specific timeset. Operates on all boards in the SEQUENCER as a divider ratio
of the master clock (MCLK). The divisor is an integer between 2 and 128. If the MCLK has been set to
100MHz, this command will adjust timeset 2 to be MCLK/100 = 1MHz.
Example:
SEQ0->dt0div(2, 100);
short TSEQUENCER::dt0div(unsigned timeset, unsigned t0div)
Arguments:

unsigned t0div // 2-128
SEQ0->keepalive_timeset
Sets the timeset to be used when the pattern is halted. This will set the keepalive timeset to 6. This
command is useful if the device requires an external clock running continuously after the pattern stops. By
changing the timeset, the clock rate can be modified without running a pattern.
Example:
SEQ0->keepalive_timeset(6);
short TSEQUENCER::keepalive_timeset(unsigned timeset)
Arguments:
SEQ0->dflags
This function gives the ability to set the User Flags, most often referred to as U1 and U2. This function has
the ability to set both flags simultaneously if desired. This will set the U1 flag. If the pattern is at a point
where it is waiting (using a conditional flag test) for the flag, it will continue after the flag is set.
Example:
SEQ0->dflags(1);
short TSEQUENCER::dflags(unsigned value)
Arguments:
unsigned value // 1=U1 flag, 2=U2 flag, 3=both
SEQ0->running
Checks to see if a pattern is running or halted.
Example:
short i;
i=SEQ0->running();
If the pattern is running, i=1, if halted i=0.

short TSEQUENCER::running(void)
Arguments:
none
SEQ0->dwait
Waits for the pattern to finish execution. The wait time is determined by the 'set_wait_timeout' command.
The default is 1 Sec. The test program will effectively halt here until the pattern has completed execution.
Note that the 'side' argument is not required but included for backwards (DSPIO) compatibility.
Example:
SEQ0->dwait();
short TSEQUENCER::dwait(unsigned __side)
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Arguments:
unsigned __side // tester "side" 0-1
SEQ0->dfail
Returns the number of fails after pattern execution. Most often the user will favor the 'status' command as
it will provide more detailed fail information, and will also include the number of fails. After pattern
execution, the number of fails is returned. Note that the 'side' argument is not required but included for
backwards (DSPIO) compatibility.
Example:
unsigned xfail=SEQ0->fail();
short TSEQUENCER::dfail(unsigned __side)
Arguments:
unsigned __side // tester "side" 0-1
SEQ0->cycle_count
Returns the number of cycles after pattern execution. Most often the user will favor the 'status' command
as it will provide more detailed information, and will also include the number of executed cycles.
Example:
unsigned xcycle=SEQ0->cycle_count();
short TSEQUENCER::cycle_count(void)
Arguments:
none
SEQ0->status
This function should be executed after each pattern execution. The updated status information is
determined by the setting of the StatusControl variable (SEQ0->StatusControl). The default setting for
StatusControl is 1. The following listing briefly indicates information provided with the allowed settings. It is
important to note that if more information is required (higher StatusControl setting) program execution time
will increase. For production operation, StatusControl setting of "1" or "2" is usually sufficient. Other
settings are useful for pattern/program debug.
StatusControl Setting Status Results
1 Read Failcounter, Cycle Counter, Note Register, and Running

2 Read all fail addresses (in addition to above)
3 Write Pat.stat file (in addition to above)
4 Write Fail[x].stat file (in addition to above)

5 Create FDUMP file with Fail information
6 Write Status bits
Example:
SEQ0->StatusControl=2;
SEQ0->pat_exe(mystart, mypattern);
SEQ0->dwait();
SEQ0->status();
SEQ0->StatusControl=1;
This example sets the StatusControl variable to 2 which will allow the user to examine the following:
number of fails, number of executed cycles, value of the 'NOTE' register, running status, and all fail
address information (up to 512 fails). It is usually desirable to set StatusControl back to "1" after reading
status.
short TSEQUENCER::status(void)
Arguments:
none
Note: The 'status' function should only be executed one time after pattern execution. Multiple 'status'
commands will produce unknown results.
Fail Dump and Read

Pending examles: Add SEQ0->FailDumpToCSV() and SEQ0->FailReadFromCSV() to allow Pattern
Fail Block data to be saved for offline review.
SEQ0->set_wait_timeout
Sets the amount of time that the 'dwait' command will actually wait for the pattern to finish. The default is 1
second.
Example:
SEQ0->set_wait_timeout(0.20);
void TSEQUENCER::set_wait_timeout(double timeout)
Arguments:
double timeout// 0-?
SEQ0->get_wait_timeout
Reads back the current dwait timeout setting.
Example:
double xwait;
xwait=SEQ0->get_wait_timeout();
double TSEQUENCER::det_wait_timeout(void)
Arguments:
none
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Pattern Management and Execution
SEQ0->patloadmap
Launches the Pattern Manager to read the <application>.map file. The pattern manager will automatically
load the patterns in the map file if in Production mode, from the Customer Preferences. In Engineering
mode the Pattern Manager will wait for the user to select which patterns to load.
Example:
SEQ0->patloadmap();
short TSEQUENCER::patloadmap(void)
Arguments:
none
Figure 8.13: Pattern Manager
The patterns can be verified against the checksum by double clicking in the Pat# column on the particular
pattern to be checked. This will also create ASCII .DUMP files (one for each active DIGMOD board) with
a disassembled version of the memory image loaded in DIGMOD memory. The loaded and verified
checksums are at the bottom of this file. The Pattern Manager Checksum column will display “Checksum
OK” or “Checksum Error” based on the checksum results. If the test program modifies pattern memory,
then the checksum will probably fail.
Figure 8.14: DIGMOD Library Debug Display
SEQ0->createpatmap
Creates a Pattern Map file (<application>.map) from the traditional pat_list structure. The function stores
the actual pattern length in the map file.
Example:
SEQ0->createpatmap(pat_list, PATDIR, 1);
short TSEQUENCER::patload(PATDATA* pat_list, char* pat_dir, int

parallel_flag)
Arguments:
PATDATA* pat_list // listing of patterns to be loaded

char* pat_dir // directory where patterns are located
int parallel_flag // specifies if the same pattern should
// be loaded into multiple DIGMOD
// boards for multisite
SEQ0->patload
Loads a list of patterns that are contained in the pattern list structure. The pattern list structure is detailed
elsewhere in this document.
Example:
SEQ0->patload(pat_list, PATDIR);
short TSEQUENCER::patload(PATDATA* pat_list, char* pat_dir)
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Arguments:

SEQ0->patload_parallel
Loads a list of patterns that are contained in the pattern list structure. The patload_parallel function has the
capability to load the same patterns on multiple DIGMOD boards.
Example:
SEQ0->patload(pat_list, PATDIR, 0xf);

SEQ0->patload(pat_list, PATDIR, 0x3);
The first line of the above example will load a list of patterns on the first 4 DIGMOD boards defined in the
Test Head Configuration. The second line above will load the list of patterns on only the first 2 DIGMOD
boards.
short TSEQUENCER::patload(PATDATA* pat_list,

char* pat_dir,
unsigned slotmask)
Arguments:

unsigned slotmask // mask of DIGMOD boards
SEQ0->patload_pformat
Loads a list of pformat-style patterns that are contained in the pattern list structure. The pattern list
structure is detailed elsewhere in this document.
Example:
SEQ0->patload_pformat(pat_list, PATDIR);
short TSEQUENCER::patload_pformat(PATDATA* pat_list, char* pat_dir)
Arguments:

SEQ0->patexe
Executes a DIGMOD pattern contained in a specific pattern file. The pattern can be run from any starting
point label or offset.
Example:
SEQ0->patexe("PATTERN2", "START2");
This will simply execute the "PATTERN2" pattern from the "START2" label
short TSEQUENCER::patexe(AnsiString patternname,

AnsiString asymbol)
Arguments:
AnsiString patternname // the pattern name

AnsiString asymbol // starting point represented
// by a label
Alternate 1: using the pattern index

Example:
unsigned PATTERN2=2; // pattern index

SEQ0->patexe(PATTERN2, "START2");
short TSEQUENCER::patexe(unsigned pattern,
AnsiString asymbol)
Arguments:
unsigned pattern // pattern index

AnsiString asymbol // starting point represented by a label
Alternate 2: using the pattern index and offset

Example:

unsigned START2= SEQ0->getsym(PATTERN2, "START2"); // starting offset
SEQ0->patexe(PATTERN2, START2);
short TSEQUENCER::patexe(unsigned pattern,

unsigned offset)
Arguments:

unsigned offset // starting offset
Note that in almost all cases it is preferable to use the string arguments for this command. Alternative
methods are for reference only.
SEQ0->patexe_array
Executes a DIGMOD pattern contained in a specific pattern file. The pattern can be run from any point
(offset). In addition this function adds the capability to run each DIGMOD board from a different offset if
desired.
Example:
unsigned startoff[4]; // starting offset array

unsigned startoff[0]= SEQ0->getsym(PATTERN2, "START0");
SEQ0->patexe_array(PATTERN2, startoff);
In the above example the first 4 DIGMOD boards that are defined in the SEQUENCER will run from
different starting points, determined by the array 'startoff'. The first board will run from 'startoff[0]' the 4th
board will run from 'startoff[3].
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short TSEQUENCER::patexe_array(unsigned pattern,

unsigned offset[])
Arguments:

unsigned offset[] // starting offset array
SEQ0->patexe_parallel
Executes a DIGMOD pattern contained in a specific pattern file. The pattern can be run from any point
(offset). In addition this function adds the capability to run only those DIGMOD boards that are represented
in the 'slotmask'.
Example:
unsigned PATTERN2=2;
unsigned START2= SEQ0->getsym(PATTERN2, "START2");
SEQ0->patexe_parallel(PATTERN2, START2, 0x7);
In the above example only the first 3 DIGMOD boards that are defined in the SEQUENCER will run. If
other DIGMOD boards are included in the SEQUENCER, they will be idle.
short TSEQUENCER::patexe_parallel(unsigned pattern,

unsigned offset,
unsigned slotmask)
Arguments:

unsigned offset // starting offset
unsigned slotmask // board mask
SEQ0->getsym
When patterns are compiled using the KVD Pattern Editor, a SYM file (patternname.sym) is created. This
file contains all of the patterns 'symbols' sometimes referred to as 'labels', and a relative offset of each
symbol from the beginning of the pattern. If the test engineer wishes to run a pattern from an 'unsigned'
offset (as opposed to AnsiString representation) then the 'getsym' function is used to read the offset.
Example:
unsigned PATTERN2=2;
unsigned START2= SEQ0->getsym(PATTERN2, "START2");
SEQ0->patexe(PATTERN2, START2);
int TSEQUENCER::getsym(unsigned pattern,

AnsiString symbol)
Arguments:

AnsiString symbol // actual label (symbol) in the pattern
SEQ0->dcap_setup
Sets up the 'capture memory' for each DIGMOD board defined in the SEQUENCER. This will set up each
DIGMOD board in the SEQUENCER to capture 1024 digital samples, and will save the results starting with
address 100 of the capture memory.
Example:
SEQ0->dcap_setup(100, 1024);
short TSEQUENCER::dcap_setup(unsigned long cap_adr,

unsigned long cap_count)
Arguments:
unsigned long cap_adr // starting address (0-16M)

unsigned long cap_count // number of captures
// (1-16M-starting address)
DIGMOD[x]->dcap_setup
Sets up capture memory on an individual DIGMOD board.
Example:
DIGMOD[x]->dcap_setup(100,1024);
short TDIGMOD::dcap_setup(unsigned long cap_adr,
unsigned long cap_count)
Arguments:
unsigned long cap_adr // starting address (0-16M)

unsigned long cap_count // number of captures
// (1-16M-starting address)
DIGMOD[x]->dcap_read
Reading back capture memory is best handled on an individual DIGMOD basis instead of as a group. The
command dcap_read reads back the data from an individual DIGMOD board into array cap_data. Note the
side parameter is ignored and is a relic of the DSPIO.
Example:
DIGMOD[x]->dcap_read(1, 100, 1024, cap_data);
short TDIGMOD::dcap_read(unsigned _side, unsigned long cap_adr, unsigned

long cap_count, unsigned cap_data[])
DIGMOD[x]->ddrv_setup
Sets up send memory to start at drv_adr and to loop after drv_length addresses. Note send memory is
shared with capture memory, so you need to manage the address space to avoid collisions.
Example:
DIGMOD[x]->ddrv_setup(1500, 1024);
short TDIGMOD::ddrv_setup(unsigned long drv_adr, unsigned long
drv_length)
DIGMOD[x]->ddrv_load
Loads the drive memory for the DIGMOD board. Since the test engineer is likely sending different data to
each DUT in a multisite environment, this typically needs to be handled per DIGMOD instrument instead of
as a group.
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Digital Instruments DIGMOD .pformat Pattern File Structure
Example:
DIGMOD[x]->ddrv_load(1500, 1024, drv_data[]);

short TDIGMOD::ddrv_load(unsigned long drv_adr, unsigned long drv_count,
unsigned drv_data[])
DIGMOD .pformat Pattern File Structure
PFORMAT Pattern Structure
The DIGMOD instrument is capable of loading a binary formatted file which has a .pformat extension. This
is a streamlined file that is significantly smaller in physical size than the ASCII source format. These binary
pattern files contain only relevant pin information, if a pin is not active, or not changing, no information is
stored. .
Loading .pformat Files
See the examples below for details:
Patlist Structure
PATDATA pat_list2[] = {
//ID FILENAME BANK LOADFLAG RETESTPAT
// OFFSET LENGTH HALTFLAG
{0, "SPI.PFORMAT", 0, 0x30000UL, 10000UL, 1, 2, -1},

{1, "PATTERN3.PFORMAT", 0, 0UL, 0x2ffffUL, 1, 2, -1},
{2, "PATTERN4.PFORMAT", 0, 0x20000UL, 20000UL, 1, 2, -1},
{3, "SERVICEPATT.PFORMAT", 0, 0x23000UL, 10000UL, 1, 2, -1},
{4, "PATTERN3_BIT_CAPTURE.PFORMAT",0, 0x40000UL, 10000UL, 1, 2, -1},
{5, "PATTERN4_BIT_CAPTURE.PFORMAT",0, 0x50000UL, 10000UL, 1, 2, -1},
{6, "F0F7CHECK.PFORMAT", 0, 0x60000UL, 10000UL, 1, 2, -1},
{7, "F0F7CHECK_NEW.PFORMAT", 0, 0x70000UL, 10000UL, 1, 2, -1},
{-1, "NOPATT", 0, 0UL, 0UL, 0, 2, -1}
};
Pattern Loading
DIGMOD[x]->patload_pformat
You can load paterns either by having a named patlist, or a .klf (KVD Load File) format file that defines the
patterns’ start addresses. A .klf file is created, edited and saved using the Pattern Editor’s Load File
Management tab.
Examples:
SEQ0->patload_pformat(pat_list2, PATDIR);
short TSEQUENCER::patload_pformat(PATDATA* pat_list, char* pat_dir)
SEQ0->patload_pformat(“MyPatterns.klf”);
short TSEQUENCER::patload_pformat(AnsiString filename)
DIGMOD Resource Manager (DMRMan)
In was historically necessary to include DIGMOD pins in several places including each pattern file and also
in the test program - usually in a resource.cpp or connections.cpp file. While it is still possible to map pin
names to DIGMOD pin numbers in the test program, it is now possible to map these names and channels
in one .ini files that is read by the test program. This preferred approach will simplify pin definition and
reduce errors.
The DIGMOD Resource File
Here is a typical .ini file containing DIGMOD resources mapped to names.
[SITE_DMCH]
PA0_SCLK = 1, 33, 65, 97
PA1_SO = 0, 32, 64, 96
PA2_SI = 15, 47, 79, 111
PA3_CS = 2, 34, 66, 98
PA4 = 3, 35, 67, 99
PA5 = 4, 36, 68, 100
PA6 = 5, 37, 69, 101
PA7 = 6, 38, 70, 102
CHG = 7, 39, 71, 103
NEG = 8, 40, 72, 104
DIS = 9, 41, 73, 105
MCLRB = 10, 42, 74, 106
XCLK = 11, 43, 75, 107
IDDQ = 12, 44, 76, 108
ODI = 13, 45, 77, 109
TXRX = 14, 46, 78, 110
[GROUP_DMCH]
SITEPINS0 = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
SITEPINS1 = 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47
SITEPINS2 = 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79
SITEPINS3 = 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108,
109, 110, 111
------------------------------
There are 3 possible options for mapping channels. Two of these options, [SITE_DMCH] and
[GROUP_DMCH] can be seen in the above file. Pins that are mapped in he [SITE_DMCH] section will be
mapped according to site. For this example there are four sites and each name contains a pin for each
site. The pins can also be mapped into groups using the [GROUP_DMCH] section. In addition to these
groupings it is also possible to individually map pin names to DIGMOD pins. This would require a third
section not seen in the above example and would be used mostly in single site test programs. A short
example is shown below:
[SINGLE_DMCH]
mypin1 = 45
mypin2 = 6
mypin3 = 9
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Digital Instruments Pattern Editor
Loading the DMResources ini File
Once the resources file has been created, it is necessary to load the file so the pin-to-name mapping can
occur. This loading is done in the test program and it is important that the loading occur BEFORE any
pattern loading, otherwise the pattern will not map/load correctly.
DMRMan->LoadResMap("MAP_FILENAME.INI");
Typically the filename will have some relation to the test program, for example in the UC06 program we
might use "DMRESOURCES.INI".
Mapping Names to Pins
Once the file is loaded, the names defined in the test program can be correctly mapped to the DIGMOD pin
resources. The required syntax is as follows:
DMRMan->DMCHFromMap("pin_site_group_name");
Example:
PA0_SCLK = DMRMan->DMCHFromMap("PA0_SCLK");
PA1_SO = DMRMan->DMCHFromMap("PA1_SO");
PA2_SI = DMRMan->DMCHFromMap("PA2_SI");
PA3_CS = DMRMan->DMCHFromMap("PA3_CS");
PA4 = DMRMan->DMCHFromMap("PA4");
CHG = DMRMan->DMCHFromMap("CHG");
NEG = DMRMan->DMCHFromMap("NEG");
DIS = DMRMan->DMCHFromMap("DIS");
MCLRB = DMRMan->DMCHFromMap("MCLRB");
XCLK = DMRMan->DMCHFromMap("XCLK");
IDDQ = DMRMan->DMCHFromMap("IDDQ");
ODI = DMRMan->DMCHFromMap("ODI");
TXRX = DMRMan->DMCHFromMap("TXRX");
SITEPINS[0] = DMRMan->DMCHFromMap("SITEPINS0");
It is still possible to map channels the "old" way, but for future program simplicity, it is recommended that
resources are mapped through the DMResource manager.
Pattern Editor
DIGMOD Pattern Editor
There is significant functionality in a Pattern Editor designed for DIGMOD support. Failure data is
communicated back into the tool from the instruments, graphical displays are improved over earlier tools,
and it supports the .pformat channel description structure.
There are mre feature-rich editors if you need powerful column-mode functions, so KVD also includes a
licensed UltraEdit editor on the system. You can export a .pformat pattern file to an ASCII text file we call
the DMP format, edit it with UltraEdit, then import the DMP file back into the Pattern Editor.
The Pattern Editor will startup in different forms based on whether there is Fail Data (SEQ0->StatusControl
>2) or if there is Logic Analyzer data available. If not then it will open in the Pattern Load Management
page.
Some features:
• Ability to create a pattern from scratch
• Inserting and deleting vectors: right click in the left most column (the vector num column) and then
choose insert or delete rows. When inserting the user specifies how many new vectors to add, and
then adds them prior to the current vector. When deleting vectors: the current vector is the start vector,
and the user inputs the last vector number to delete. The deletion is inclusive of the start and end
vector numbers.
• The user can select cells by holding down the shift key as they scroll using the arrow keys. Mouse
selection will be added in soon
The editor has three main display tabs. The plain vector view:
Figure 8.15: Main DM Pattern Editor screen
At the bottom of the left side pane, tabs are available for switching support displays between:
• Fail Control (shown above)
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• File Info (header info for revision control and size)

• Command Line Interface
• Functions (find label and go to vector)
• Symbols (makes it possible to jump to a symbol)
• Pin Groups (easier display of defined names)
• Static Pins (to display pins not being controlled by vector data)
Logical group vector states are now displayed as they are seen on the screen, and not in standard bit
order. In Figure example column 2 is a group of columns 0 and 1. Note that as displayed column 0 is the
left most bit in the group and not the rightmost.
Figure 8.16: Logical Group Vector States
A graphical view:
Figure 8.17: DM Pattern Editor Graphical View
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And a display of the pin formats:
Figure 8.18: DM Pattern Editor Format View
If you double-click on a column label such as OPCODE, it will pop up a list of allowable values. These are
the lists for:
OPCODE FLAGS and SR (Shift Register)
There is on-line help available from the top-level menu item HELP.
Figure 8.19: Help Screen
Importing a DMP file into the DMPE is still accessed through the same File menu. Once the file has been
selected a new window that indicates import status will appear. See Figure 8.20.
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Figure 8.20: Import Status Window
This window will show the import status using the Pass and Line Number display fields. Importing is a two
pass process. The Line numbers are displayed in real-time during the import in 5000 line increments. If an
error occurs then a description of the error is displayed in the window.
Importing pattern files
There is a 15 error limit on the import before the import is terminated. The Edit File button appears when
there is an error. When that button is pressed, the UltraEdit editor opens the DMP file and the file is
positioned to the line of the first error. This will help the test engineer fix the problem.
Exporting pattern files
Pending explanation of UltraEdit
DMP File Format
The following is a description of DMP File Syntax:

• There can be blank lines anywhere in the file. These line numbers are in order of appearance.
• Unless stated otherwise, a blank can be any type of whitespace (space, tab, etc...). Items in [] are
optional.
Line 1:
filetype = KVD_DIGMOD [; comment]
Optional Lines before VECTOR line (where vectors is comma separated character (letters and numbers)
names):
GROUP groupName (vectors)[; comment]
Line 2:
VECTOR (vectors) [; comment]
where vectors is comma separated character (letters and numbers) names. A groupName can be included
in this list to be expanded out for the group defined vectors. Some groups of vectors may be enclosed in (
); these cannot include groupNames.
Line 3 - End:
[GLOBAL symbol:] [Opcode [Operand]] TSET num [FLAG flag] [SR ssr] [CP csr] [ADC adc] [FD] [M] [ST]
columnVals ; [Comment]
where if Opcode is left out it is assumed NOP
where Operand is a number or a symbol
where columnVals are the number of vector names (from line 2) of one of the following 0 1 L W H X
(plus a few more)
columnVals can also include hex values in the form of .DFFF or .CFFF. These can be used as a
different format to visualize logical group data. These can only be used with Logical groups. The
.D prefix is used for 0 or 1 data. The .C prefix is used for L or H data.
'TSET num' is required
Line ANY:
Any Line can start or end with ; which is the start of a comment.Comments may currently be 64 characters
long, any longer are truncated.
Logic Analyzer Mode for the DIGMOD Pattern Editor
The Logic Analyzer tool is a component of the DM Pattern Editor. This tool is useful when debugging
patterns. To properly use Logic Analyzer, several steps are required, and some caution is necessary.
Necessary Steps
1. The pattern to be debugged must include the "LOGIC" opcode at the point in the pattern where debug
will start. The operand must be "1".
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2. A "LOGIC" opcode with a "0" operand must be included in the pattern where debug will stop. Note that
once these opcodes are included, the pattern will NOT fail at any point between the LOGIC 1 and the
LOGIC 0 vectors.
3. The pattern should be run normally using the "patexe" function:
SEQ0->patexe("PATTERN1", "START1");
4. After executing the pattern, Logic analyzer must be setup and run before the results can be viewed.
Cautions
The pattern that is being debugged will not fail between the LOGIC opcodes. It will be necessary to change
the pattern back to original for normal program operation.
The pattern must be repeatable - each execution must produce the same results or the Logic Analyzer
display will not be very helpful. Logic Analyzer works by setting the compare strobes at the beginning of
the cycle, executing the pattern, saving the data for pins of interest (send/capture memory is used), moving
the compare strobes, and then re executing the pattern, save etc. etc. If the results from the DUT are not
repeatable from one run to the next (if the pattern does not "FAIL" the same way each run), Logic Analyzer
is not going to be a useful debug tool.
The Send/Capture memory is used to save pattern information. The default memory start address is
0x800000 (8388608). This is at ½ of the total Send/Capture memory. It is important to note that if the test
program uses this part of the send memory (unlikely since 8M is available) then the programmer must
indicate an alternate start point.
Logic Analyzer Class User Functions
short TLogicAnalyzer::Setup (TDMDigPin *pins,

double T0period,
unsigned vectors,
unsigned tsmin,
unsigned tsmax,
unsigned capmemstart,
unsigned finediv );
where:
*pins = a group of DIGMOD pins to be displayed in the Logic Analyzer

tool.
T0period = the tester cycle of interest
vectors = the number of vectors to be analyzed.
tsmin = the minimum timeset to be analyzed.
tsmax = the maximum timeset to be analyzed.
capmemstart = the starting capture memory location (default = 0x800000)
finediv = the compare strobe step for each capture (default =1 which is ½
MCLK cycle)
void TlogicAnalyzer::Run();
This function should be executed after setting up the Logic Analyzer using the "Setup" function.
Figure 8.21: Logic Analyzer
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This shows the results for the pins of interest after logic analyzer has executed. Note that Logic Analyzer is
a tab of the DM Pattern Editor tool.
Figure 8.22: Results for Pins of Interest
This shows the same capture, but the "SPAN" and "POSITION" sliders at the bottom of the tool have been
used to zoom in to the desired resolution and the scroll to the area of interest.
Figure 8.23: Use the Span and Position Sliders to Adjust Resolution
This is a program file block that shows typical C++ steps for using Logic Analyzer:
1. Run pattern normally.

2. Setup logic analyzer.
3. Run logic analyzer.
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Digital Instruments RTI Shmoo
Note that the logic analyzer tool is updated after the LogicAnalyzer->Run() has executed. Results can be
viewed using DM Pattern Editor.
Figure 8.24: Results Shown in the DM Pattern Editor
This shows the inclusion of the "LOGIC 1" opcode/operand combination in the pattern.
RTI Shmoo
The Real Time Interface (RTI) gives the ability to run Shmoo and Margin Shmoo charts. Shmoo is a tab
sheet on the RTI window, along with other tabs such as System Functions and FatherCard Resources.
The starting RTI Shmoo configuration is shown in Figure 8.25.
Figure 8.25: Real Time Interface WIndow
There is one tab for setting and maintaining a Shmoo chart and another tab to setup and maintain Margin
Shmoo. Each Shmoo chart receives its own tab. All the Margin Shmoo charts reside on a single page.
When run for the first time, all entries are blank and no charts are active.
Shmoo Setup
To create a Shmoo chart, click the Setup tab. When creating a Shmoo chart for the first time, type in a title
for the chart in the Title: field and click the New Shmoo button. See Figure 8.26: the new chart ‘Chart 1’
receives its own tab and the chart has the same title.
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Figure 8.26: Title of New Shmoo
The new chart ‘Chart 1’ received its own tab and the chart was given the same title.
The left side of the panel contains the fields for defining the axes, with the X and Y fields operating in a
similar manner. Follow these steps to define the X and Y axes of the shmoo:
1. Select the resource from the Resource drop down field; it includes the description of all available
resources. When the resource has been selected, the appropriate functions for that resource are
loaded into the function field.
2. Select the function in the Function drop down field. When the function has been selected, the units
appropriate to that function are loaded into the Units field.
3. Type in numerical values to the minimum, maximum and increment for the X or Y axis.
Make sure to fill in both the X and Y axes’ fields for the Shmoo to operate correctly.
Radio buttons underneath the axes fields serve to select the site to be used for the Shmoo. It is possible to
select the site at any time.
The right side of the panel contains the pattern fields. Each is a drop down field based on currently loaded
pattern information. Select the appropriate pattern, symbol, sequence and time set values to run the
Shmoo.
Running Shmoo
All the axes and pattern information must be filled in before running the shmoo. Click the Run Shmoo
button to run the shmoo pattern across all the selected X and Y values. See Figure 8.27.
Figure 8.27: Running the Shmoo
Whenever a Shmoo is running, a Stop button appears below the Run Shmoo button. Press the Stop button
to stop running the shmoo.
To single step the output while running the shmoo, the checkbox for single stepping the chart output must
be checked. This box is located above the Run Shmoo button. When selecting this option, the output
proceeds by single axis increments when the running the shmoo.
An available option is switching which axis has the faster increment. The checkbox underneath the axes
fields called X Fast Mode is checked as a default. In this mode, the chart increments through each X axis
row before moving up and incrementing the Y axis. Removing the check from the checkbox reverses this
action.
Printing and Saving
To obtain a printout of the shmoo output, save data, or save panel setup, use the following available
buttons:
• Print Shmoo sends the output for printing to a configured printer.
• Save to PDF creates a .pdf file of the Shmoo chart.
• Data to CSV creates a .csv file with the data on the Shmoo chart.
• Save Setup creates a .shm setup file that contains the contents of all the fields on the panel. This file
can be read using the Get Setup button on this panel or the New Shmoo Form File button on the
Shmoo Setup tab.
• Get Setup button reads a .shm setup file and populates the panel with the values in that file.
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Delete a Shmoo Chart
To delete or remove a Shmoo tab or chart, go to the Shmoo Setup table and select the chart on the drop
down field next to the Delete Shmoo button. Once the chart is selected, delete the chart by clicking the
button.
Margin Shmoo Setup
Creating a Margin Shmoo chart starts on top of the Margin Shmoo tab. When creating a Margin Shmoo
chart, type in a title for the chart in the Add Plot field and click Add. Figure 8.28 shows the results of typing
in a title of ‘Margin Chart 1’ in title field, then clicking Add button.
Figure 8.28: Margin Shmoo Tab
Create as many charts as needed for the application. The charts get stacked on the panel as shown in
Figure 8.29.
Figure 8.29: Multiple Charts, Active Chart Top
When there is more than one chart on the panel, the active chart shows on a white background, with blue
colored title and selected in the Active Plot drop down field.
On the left side of the panel are the fields for defining the X axis. Follows these steps to setup the margin
values:
1. Select the resource name from the available resources in the Resource drop down field. When the
resource has been selected, the appropriate functions for that resource are loaded into the function
field.
2. Select the function in the Function drop down field. When the function has been selected, the units
appropriate to that function are loaded into the Units field.
3. Type in numerical values for the minimum, maximum and increment.
Make sure to fill in all X axis’ fields for the Margin Shmoo to operate correctly.
Radio buttons underneath the axes fields serve to select the site to be used for the Shmoo. It is possible to
select the site at any time.
The right side of the panel contains the pattern fields. Each is a drop down field based on currently loaded
pattern information. Select the appropriate pattern, symbol, sequence and time set values to run the
Shmoo.
Running Margin Shmoo
Click the Run Shmoo button when all of the axis and pattern information has been completely filled. This
will run the Shmoo pattern across all the selected X values. See Figure 8.30.
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Figure 8.30: Running Margin Shmoo
To run all of the Shmoo charts that are on the panel press the Run All Shmoo button. The Run Shmoo
button runs the active Margin Shmoo chart.
Whenever a Margin Shmoo is running, a Stop button appears below the Run Shmoo button. Press the
Stop button to stop running the shmoo.
One option that a user has for running Shmoo is to single step the output. Above the ‘Run Shmoo’ button is
a checkbox for single stepping the chart output. If the user selects this option, the output will only proceed
by single axis increments when the ‘Run Shmoo’ button is clicked.
Printing and Saving a Margin Shmoo
To obtain a printout of the Margin Shmoo output, save data, or save panel setup, use the following
available buttons:
• Print Shmoo sends the output for printing to a configured printer.
• Save to PDF creates a .pdf file of the Shmoo chart.
• Data to CSV creates a .csv file with the data on the Shmoo chart.
• Save Setup creates a .shm setup file that contains the contents of all the fields on the panel. This file
can be read using the Get Setup button on this panel or the New Shmoo Form File button on the
Shmoo Setup tab.
• Get Setup button reads a .shm setup file and populates the panel with the values in that file. This
function will start by deleting all the existing charts on the panel before creating the new ones.
Delete a Margin Shmoo Chart
To delete or remove a Margin Shmoo chart, select the chart on the drop down field next to the Remove
Plot button. Once the chart is selected, delete the chart by clicking the button. To remove all the charts,
click the Remove All Plots button.
OLD DIGMOD SHMOO

Pending removal?
Note: This function operates with the DIGMOD instrument commands only.
Shmoo plots allow the engineer to plot results of a test while two parameters, that may affect the test, are
altered. Following some simple rules, practically any parameters can be used. The shmoo plot is
implemented on the KVD tester in the following manner. The shmoo plot is generated, then a function is
assigned for the x axis, with parameters that indicate the start, stop, and increment values to be used. The
same thing applies to the y axis. Then, a 'main' function is assigned as the test routine that will determine
the pass or fail status for each x and y point on the plot. Setting up the axis' is made with one command for
the x axis, and another for the y axis. Setting up the main parts of the plot are done using another routine.
To get started, the engineer calls the NewShmoo command to create a shmoo plot framework. This
framework will be used for all interactions with the plot. The NewShmoo command returns a pointer
variable of type TFORMshmoochild ;
TFORMshmoochild* myshmoo;
myshmoo=ShmooMan->NewShmoo(<AnsiString tabsheet_caption>);
The parameter <AnsiString tabsheet_caption> is a string that will be displayed on the tabsheet that will
hold the shmoo plot.
Figure 8.31: Schmoo Plot
TFORMshmoochild* myshmoo;
myshmoo = ShmooMan->NewShmoo("How To Shmoo");
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Digital Instruments OLD DIGMOD SHMOO
Once you have a handle to your shmoo, the next step is to set up the look of the shmoo, along with the
boundaries and functions that the shmoo will use to produce the plot.
X Axis
• Xfunc - the function that will be called, with a parameter of type double passed in. This value is
determined by the next three variables.
• XMin - the start value used by the x axis function.
• XMax - the stop value used by the x axis function.
• XInc - the increment used to scan from the xmin value up to the xmax value, inclusive.
• Xtitle - the title that appears on the x axis.
• Xunits - the units that will be assumed for the x axis.
Y Axis
• Yfunc - the function that will be called, with a parameter of type double passed in. This value is
determined by the next three variables.
• YMin - the start value used by the y axis function
• YMax - the stop value used by the y axis function
• YInc - the increment used to scan from the ymin value up to the ymax value, inclusive.
• Ytitle - the title that appears on the y axis.
• Yunits - the units that will be assumed for the y axis.
Main
• ExeFunction - the function the shmoo plot will call to run the test (for each unique x/y value
combination). The function format must be that it takes a 'short' type parameter, which is the site
number, and returns a short value ( where a value of 0 indicates a fail, and any other value indicates a
pass).
• MainTitle - the shmoo plot's main title line.
• SecondaryTitle - another text line that appears below the MainTitle line.
General Fields
• Xfastmode - when Xfastmode is set to true (which is the default), the Xfunc function is called with all of
x values, for each y value. If Xfastmode is false, then the plot calls the Yfunc function with all y values,
for each x value.
• Disablerepaint - drawing each plot result in real time can be done, but will slow down the process. The
user has the option of disabling the repaint of the screen until ALL x and y values for the plot have
been tested. Once all testing has finished, the results are then displayed. In contrast, if DisableRepaint
is set to false, each result is plotted as it happens.
• InteractiveMode - if the engineer wants to have the process stalled at the calling of the shmoo's 'Run()'
call, then set InteractiveMode to true. The plot can then be run, and x and y axis valued altered. If
InteractiveMode is set to false, then when the RUN() function is called, the plot is executed (all x and y
value combinations are tested and plotted) and then the test program continues.
The commands to setup the plot are as follows.
TFORMshmoochild ::SetupXAxis(double xmin, double xmax, AnsiString

xtitle, AnsiString xunits, ShortFuncDouble* xfunc, TAXISTTYPE
xaxistype);
The ShortFuncDouble * type is simple a function pointer. It must point to a function which takes one double
value as a parameter, and returns a short result value. The shmoo plot ignores the return value.
TAXISTYPE is an enumerator type that can be used to tell the shmoo plot whether the x axis represents
time, frequency, or volts, amps, or something else. The allowed values for xaxistype are saTIME,
saVOLTS, saFREQ, saAMPS, saUNDEF, saNONE.
In our example, this was the command used for the x axis setup:
myshmoo ->SetupXAxis(100e-3, 200e-3, 2e-3, "XTitle", "mV", DMCH[0]->vil,

saVOLTS);
TFORMshmoochild ::SetupYAxis(double ymin, double ymax, AnsiString

ytitle, AnsiString yunits, ShortFuncDouble* yfunc, TAXISTTYPE
yaxistype);
For our example, the function call was
myshmoo->SetupYAxis(200e-3, 400e-3, 20e-3, "YTitle", "mV",DMCH[0]->vih,

saVOLTS);
TFORMshmoochild::SetupChart(AnsiString MainTitle, AnsiString

SecondaryTitle, bool xfastmode, bool disablerepaint);
For our example, we used :
myshmoo->SetupChart("This is the chart main title","second

verse",false,false);
This was not run in xfast mode (thus running in what would be yfast mode), and not repainting the screen
after each test, but to show the results after ALL the points have been tested.
SetExeFunction(ShortFuncShort* exefunction);
The ShortFuncShort* type is a function pointer to a function that takes one short type as a parameter
(which will be equal to the site value) and returns a short (0 for fail, any other for passing). In our example,
we just set up our own function that would randomly generate a pass or fail. This was out main function:
short MyExecute();
short MyExecute(short site=0)
{
int x=random(10);
if (x>5) return 1;
return 0;
}
and our setup call was
myshmoo->SetExeFunction=MyExecute;
Once the shmoo has been setup, you simply need to call TFORMshmoochild::Run() whenever you want
the shmoo to run, or enter in interactive mode (if it has been set). Again, for this example, we used:
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Digital Instruments OLD DIGMOD SHMOO
myshmoo->Run();
How it Works
When run is called, internal variables are set to the xmin and ymin values. Then, in a loop that is either
calling the x axis function for all x value (in xfastmode) or vice versa (if in yfastmode), the x and y values
are set, the x and y functions are called, and then the exefunction is called. When the exefunction returns,
we use the return value to determine whether that point on the plot would be red(fail) or green(pass). We
also determine at this time whether to show the result (disablerepaint is false) or not. This loop continues
for all x and y values.
A Word About the GUI Interface
If you look on the screen shot, notice that there are RUN SHMOO and a CONTINUE buttons on the right
side. These only appear if Enable Interactive Mode is checked (interactivemode is true). Clicking on RUN
forces the Run() function to be called. Clicking on CONTINUE forces the shmoo to jump out of interactive
mode, and return to the main program flow. On the next device to be tested, the shmoo will enter
interactive mode again, and this will continue until the Enable Interactive Mode checkbox is cleared, or
interactivemode is cleared programmatically.
Other Commands
Some value can be entered directly, and are not limited to being a parameter in one of the above function
calls.
TFORMshmoochild::DisableRepaint = true or false.

TFORMshmoochild::InteractiveMode = true or false.
TFORMshmoochild::SetDelay = <double value>.
The SetDelay command allows the engineer to program in a delay value that gets used after the xfunc is
called, and after the yfunc is called.
myshmoo->DataToCSV(filename);
DataToCSV(filename) will dump the data to a csv file. The filename should contain the path and filename.
There is a corresponding button on the GUI when in InteractiveMode.
Finally, the raw data can be accessed as an array.
ShmooData[x][y] will return a TShmooData*

struct TShmooData
{
double xvalue;
double yvalue;
bool ispass;
};
If you specify an [x][y] pair out of range, the return value is NULL.
Margin Shmoos
Margin shmoos are identical to the standard 2 dimensional shmoo described above, but only vary one axis
(x) instead of two. The commands and usage are identical also, with the following exceptions.
The class type for a Margin Shmoo is:
TFormshmoomargin;
To create a Margin Shmoo, call the Shmoo Manager's NewMarginShmoo routine:
TFormshmoomargin * myshmoo;
myshmoo=ShmooMan->NewMarginShmoo(<AnsiString tabsheet_caption>);
There is only an x axis in the shmoo, so any references to the y axis setups will cause a compile error. The
SetXAxis commands are identical.
There is no xfast mode, since the plot is always xfast.
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Digital Instruments DIGMOD RTI Support
DIGMOD RTI Support

Pending new screenshots.
The DIGMOD resource tab has seven sub-tabs: CONFIG, LEVELS, TIMING, PMU, FREQ, SEQUENCER,
and SHOW CHANS.
The SHOW CHANS screen is a simple way to declutter your display, and ensure that only the channels of
interest are displayed. Uncheck the channels you wish to suppress.
System-defined channel names are displayed if they have not been renamed with the setname command,
and if you have defined multisite groups with the DDCHCreate command, the group names appear at the
end of the SHOW CHANS list.
Figure 8.32: SHOW CHANS Screen
The CONFIG screen shows the mode that each of the instruments are set to, timeset frequency
information, and the masterclock source and frequency.
In this case each board is set to "INDEPENDENT" mode of operation, with the on board PLL as the
source. Also displayed is the MCLK frequency setting (in this case the PLL frequency). The divider for
each timeset is also displayed and the right hand scroll bar allows the user to scroll through all 16 timesets
per board if required.
Note that the configuration mode and MClk Source cannot be changed from this display - they are just
reporting the state of the instruments as set by test program code.
The (KA) indicator next to a timeset shows that this timeset has been selected to be active in Keep Alive
time (which is whenever a pattern is not bursting).
Figure 8.33: CONFIG Screen
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The LEVELS screen is an overview of all the pin driver and comparator setpoints. There is a column to
indicate if a pin is ACTive (meaning its SITE is still enabled - this parameter is a display-only, and not a
clickable control on this page), programmed levels for Drive Hi, Drive Lo, and the Termination voltage, an
indicator for TENA (Termination Enabled), comparator Low and High levels, and click boxes for relay
connections from a pin to the father card (CON), the Analog tie-line bus (ABUS), whether the driver is
ENAbled, if you have set a pin into ForceMODe, what the Forced VALue is, whether it's been Force
ENAbled (not the same as driver enabled), a SNAPshot of whether the driver is sending a high or a low to
the outside world, and finally, an indicator if the pin has been Fail Disabled.
Figure 8.34: LEVELS Screen

• In the left most column is a space for a "+" symbol. If present, this indicates that the "PIN" is actually a
group of pins. Clicking the + symbol will expand the group into all of the included pins (DMCH).
• The next field represents the pin or group name. For setting individual pin names, the 'setname'
function is used. For setting a group name, the 'DMCHCreate' function is used.
• A defined pin group can be modified in real time, all channels in the group at once, by modifying an
attribute field such as voltage level, connection relay, timing edge, and so forth. Note that changing a
value at the pin level will operate on that pin as expected, but the RTI tool does not currently ripple this
change automatically to all instances of this pin in other possible groups of which this pin is a member.
• Individual channel numbers are displayed in the third column.
The TIMING screen displays the programmed edge placements for the driver data valid time, the driver
enable time, comparator edges, and skew values, plus the Keep Alive data. Since there are 16 time sets
now, the time set selection is a tab column at the right edge of the screen. Falling edge skew is
programmable by the test program, but has been suppressed from this RTI screen to reduce display
clutter.
Figure 8.35: TIMING Screen
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The PMU (Parametric Measurement Unit) screen shows the forcing and measurement functions for each
desired pin, and allows an instant measurement to be made if you press the MEASURE button.
Figure 8.36: PMU Screen

• The first 4 columns are the same as those on the LEVELS tab.
• MODE - Indicates if the forcing mode of the PMU, V = force voltage, I = force current.
• FORCE - This is the actual force value on the DIGMOD pin.
• IRANGE - The programmed current range.
• VRANGE - The programmed voltage range, 0=-2V to 7V, 1=-1V to 10V.
• VCLMP-MIN - The low voltage clamp value.
• VCLMP-MAX - The high voltage clamp value.
• MODE - This is the measure mode setting. When a measure is made, the PMU will measure either
voltage or current.
• DOMEAS - The user can make immediate voltage or current measurements using this button.
• ENA - Indicates if the PMU is enabled. Note that the PMU can not be enabled at the same time as the
DIGMOD driver.
• RESULT - The last PMU measure result as made on an individual channel.
• ALRM - Indicates if an clamp alarm condition existed during the last measurement.
The FREQ screen supports the on-board connection from comparator HI and LO channels to the DIGMOD
TMU (Time Measurement Unit) instrument, for frequency measurements. To change the measured result
field from frequency mode to period mode, click in the RESULT box and it will toggle the display.
Note that the built-in TMU measures frequency only. The output display can change to a period mode by
calculating the inverse (1/X), but there is no feature to directly measure pulse widths, rise times or
intervals.
Figure 8.37: FREQ Screen
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The SEQUENCER screen displays patterns available in the test program (whether or not they've been
loaded at run time into memory), available symbols, a STATUS readback display and control pull-down
menu, and buttons to control pattern bursting, halt, and User Flags (dflags1 and 2).
Figure 8.38: SEQUENCER Screen

• PAT DIR - Indicates the directory that contains the patterns for a given test program.
• SEQUENCER SELECT - Indicates which SEQUENCER is currently active. Default sequencers are
SEQ0, SEQ1, SEQ2, SEQ3, SEQ4, SEQ5.
• PATTERNS LOADED - A listing of all patterns that could loaded for the test program. (It does not
reflect whether or not they have actually been loaded at run time, so be cautious when using this
feature)
• SYMBOLS - This is a listing of all 'SYMBOLS' that exist in the currently highlighted pattern selection.
The user can highlight a SYMBOL and then 'EXECUTE' a pattern from that symbol location.
• ADDR - Shows the starting location of the highlighted pattern in physical memory.
• LEN - Shows the actual length of the highlighted pattern.
• OFFSET - Shows the offset of the highlighted SYMBOL, relative to the start of the pattern.
• Execute - When selected, this will start the highlighted PATTERN from the highlighted SYMBOL.
• Stop - Stops pattern execution if a pattern is currently running.
• Dflags Select - 0 sets neither flag, 1 sets Dflag1, 2 sets Dflag2, and 3 sets both. The DLFAGS button
must be pressed to send any changes to the test system.
• PATTERN STATUS - Shows the pattern failure information for the previously executed pattern. If all
fields are blank, this indicates that the previous pattern run was successful, with no failures. If a pattern
failed, the first 0-512 failures will be displayed in the table. The failures are separated by DIGMOD
boards, DM0-DM5. The following are displayed for each failure in the fail table: Physical failing
address, Failing cycle, Failing pins.
• The rightmost section of SEQUENCER RTI shows the current DIGMOD status by board. This
information is for the previous pattern execution and includes the following: PATTERN STATUS,
CYCLE COUNT, The value of the 'NOTE' register, Fail Count. The rightmost scroll bar will allow for
scrolling through all present DIGMOD boards.
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Digital Instruments Time Measurement Unit
Time Measurement Unit
Figure 8.39: TMU Pictorial
The KVD test system is capable of making interval and frequency measurements using the TMU.
Measurements of pulse width, frequency, and timing between two signals are all possible with the TMU.
There are two high speed analog input channels as well as direct connections to any digital channel
through the KVD DSPIO module. Any combination (analog or digital) of start/stop triggering is possible.
Theory of Operation
The TMU module is designed to make accurate time measurements with 1nS resolution. The heart of the
TMU is a 1GHz clock. The clock is gated to a prescalar (divide by 64) and FPGA (Xilinx) by the incoming
start/stop signals. The FPGA will flush the measurement prescalar and count the number of gated clocks,
returning the appropriate count. For measurements that are greater than 250mS, a 40MHz (25nS
resolution) clock is substituted for the 1GHz clock. The TMU has the capability to measure either time
interval or frequency. The start/stop signals can come from either the digital subsystem (DSPIO via a
motherboard TMU bus) or directly from the Fathercard.
Figure 8.40: TMU Block Diagram
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Pinouts
Connections between the TMU module and the Father Card are made through a 33 pin Hypertronics
connector. Below is a listing and description of the connections.
Figure 8.41: TMU I/O Pinout
TMU Object
There is typically only one TMU in a system, although two are possible. Of type TTMU, the object name is
TMU0. Since it is a single resource, there are no group or site objects, so if you have a multisite program,
you will be scanning the TMU among the signals to be measured serially (using a relay tree on the father
card, an RMX instrument or digital channel connections), and storing results in the multisite results array.
SITE->result[n].value
TMU Commands
To make a TMU measurement, you must choose your inputs first, either the Analog connections from the
Father Card, or the backplane motherboard connections to the TMU bus, which can connect to the
comparators of any Digital channel. If you choose the analog inputs, you must also program a comparator
threshold. (The Digital backplane connection uses the HI comparator on the DIGMOD, which are
independently programmed).
The input function requires you to specify what will be the start event, then the stop event. Either event can
be a rising edge or a falling edge, from either of the inputs, Channel A or B. (or from the DD Channels).
Example:
TMU0->level(CHANA, 1.0, 1.0);

TMU0->input(CHANA, RISING, CHANA, FALLING);
If you wish to use a digital channel connection, you must program which digital channel will be connected
to the motherboard backplane buses, DDTMUA and DDTMUB, and then select one or both of those buses
as the source of the start and stop events.The digital channel connect function is a pin-level command
called tmucon, and documented in this chapter on page 233
Example:
XCLK->tmucon(DDTMUA, 0);
DATA7->tmucon(DDTMUB, 1);
TMU0->input(DDTMUA, RISING, DDTMUB, FALLING);
DDTMUA
5
0- DDTMUB
OD
M
G ]
DI CH[n U0
M
T A
DM ut B
Inpput
I n
Figure 8.42: Test Head Motherboard
To set yourself up for making a measure, you need to choose either frequency or interval mode.
Measuring frequency involves programming the minimum frequency you are interested in measuring, so
the TMU will use the correct clock. (40MHz or 1GHz), giving it a timeout selection, so the TMU will not
hang forever waiting for the signal to change state, and programming the number of cycles of the signal to
measure, and the number of measurements to average. The number of cycles can be between 64 and 4
Meg, and the number of measures to average can be between 1 and 32. Note: since you can include many
cycles in the measurement window with the third argument, it's not usually useful to perform any averaging
in the fourth argument.The timeout is rounded up to 1mS minimum if you program a smaller number.
Example:
TMU0->freq(18e3, 250e-3, 100, 1);
An interval measurement involves programming the maximum expected interval time, the timeout, and
number of events to average (between 1-32).
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Example:
TMU0->interval(450e-9, 10e-3, 10);
Note that in interval mode between two different signal inputs, or between rising and falling edge of the
same signal, there may be timing calibration issues that affect the measurement accuracy. Your DUT
board circuits and father card signal paths may need to be deskewed by you if you require the utmost
accuracy. Generally speaking, frequency measurements are not affected by the same issues, since a
rising edge to rising edge measurement would not be affected by any delay applied equally to both edges.
Finally, you need to enable the TMU and make the measurement. The enable can be either normal, which
means the next start event will begin the measurement, or external, which means the TMU must be armed
by an external signal. You can also enable the TMU to measure negative time, in case your stop event
may occur ahead of the start event. The measurement function will place the result in a named variable,
which is different from the behavior of the DC Source measurements. To use the measurement variable for
a single site KVD->Test(); you will need to place it in the SITE->lastresult.value variable yourself. For
multisite programs, place the measurements into the SITE->results[site].value array.
Example:
TMU0->enable(NORMAL, POSITIVE);
TMU0->meas(my_result_variable);
Here is some sample code to make a TMU measurement.
TMU0->ddchan(SSTRB, SSTRB);
TMU0->input(DDTMUA, FALLING, DDTMUA, RISING);
SEQ0->patexe(SETUP,TIME_TCONV); // Burst Pattern
TMU0->interval(1e-3, 10e-03, 1);
SYS->del(1e-3);
TMU0->enable(NORMAL, POSITIVE);
SYS->del(1e-3);
TMU0->meas(time_result);
SEQ0->dstop(); // Halt Pattern
SITE->lastresult.value = time_result[1].value;
if (KVD->Test())
return(FAIL);
Data Types Used by the TMU
TMUCHAN = CHANA, CHANB, DDTMUA, DDTMUB

TMUEDGE = RISING, FALLING
MEASTYPE = INTERVAL, FREQ
TRIG = NORMAL, EXTERNAL
NEGTIME = POSITIVE, NEGATIVE
TMU Commands
TMU->ddchan
Sets the TMU's CHANA and CHANB to the digital pin inputs.
unsigned ddchan(TDigPin * etmua, TDigPin * etmub);
Parameters:
TDigPin * etmua
The Digital channel to be connected to CHANA.
TDigPin * etmub
The Digital channel to be connected to CHANB.
TMU->enable
Enables/resets the TMU trigger before the next measurement.
unsigned enable(TRIG trigg, NEGTIME ntime);
Parameters:
TRIG trigg
Valid values are NORMAL or EXTERNAL.
NEGTIME ntime
Valid values are POSITIVE or NEGATIVE.
TMU->freq
unsigned freq(double minfreq, double timeo, unsigned cycles, unsigned
events);
Description:
Forces the next TMU measurement to be a frequency type measurement.
TMU->input
Sets up the TMU so that the proper edges (RISING and FALLING) for each channel will be recognized.
unsigned input(TMUCHAN strtch, TMUEDGE strtedge, TMUCHAN stopch, TMUEDGE

stopedge);
Parameters:
TMUCHAN strtch
Start channel, can be CHANA or CHANB - this is a TMU channel, not a Digital Pin Channel.
TMUEDGE strtedge
Start channel edge, can be RISING or FALLING only.
TMUCHAN stopch
Start channel, can be CHANA or CHANB - this is a TMU channel, not a Digital Pin Channel.
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TMUEDGE stopedge
Start channel edge, can be RISING or FALLING only.
Returns:
0 for no error, -6 for catastrophic error
TMU->interval
Sets up the number of samples, the sample rate, and the timeout value for the next measurement.
unsigned interval(double maxtime, double timeo, unsigned events);
Parameters:
double maxtime
If > 260ms, sample rate is 25ns, otherwise sample rate is 1ns.
double timeo
Timeout value - must be > = 1 mS
unsigned events
Number of samples to measure - must be >= 1 and <= 32
Description:
Forces the next TMU measurement to be an interval type measurement between two edges.
TMU->level
unsigned level(TMUCHAN chan, double hidac, double lodac);
Parameters:
TMUCHAN chan
Can only be CHANA or CHANB. These are TMU channels, not the Digital Pin Channels.
double hidac
Maximum of 5.0, minimum of -2.5
double lodac
Maximum of 5.0, minimum of -2.5
TMU->meas
Performs the measurement (interval or frequency) and stores the result in the RESULT parameter
unsigned meas(RESULT result[]);
TMU->meas_array
unsigned meas_array(RESULT result[], RESULT resarray[][EVENTS]);
TMU->meas_neg
unsigned meas_neg(RESULT result[], double tmax);
TMU->reset
Resets the TMU to default values, channels, levels, and timing.
unsigned reset(void);
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9. AC Instruments
PWS
Pending a restructure of this section.
The PWS programming code is now simplified, making it easier for users to create, load and start/stop
waveforms. Previous PWS commands required verbose code statements to enable the instrument. These
new additions make it much easier to use the PWS as an Arbitrary Waveform Generator for Audio testing.
PWS Waveform Functions:
unsigned Init(char* dspfile="C:\\_kvdco\\TIProgs\\AWG_DSP");
unsigned LoadSine(AnsiString wavename, unsigned numsamples);
unsigned LoadWave(AnsiString wavename, unsigned numsamples, double

wavedata[]);
unsigned SearchforDDSLoop();
unsigned SetSampleRate(double fsample);
unsigned long CalcCheckSum(void);
unsigned StartSine( AnsiString wavename, PWSCHAN ws, double frequency,

double filterval, unsigned exttrig=0);
unsigned StartSine( AnsiString wavename, PWSCHAN ws, double frequency,

double filterval, AnsiString wavename2, PWSCHAN ws2, double frequency2,
double filterval2, unsigned exttrig=0);
unsigned StartWave( AnsiString wavename, PWSCHAN ws, double filterval,

unsigned exttrig=0, unsigned extsample=0);
unsigned StartWave( AnsiString wavename, PWSCHAN ws, double filterval,

AnsiString wavename2, PWSCHAN ws2, double filterval2, unsigned
exttrig=0, unsigned extsample=0);
unsigned StartRamp(PWSCHAN ws, double start_voltage, double

stop_voltage, unsigned long count, unsigned exttrig=0);
unsigned StartSaw (PWSCHAN ws, double start_voltage, double

stop_voltage, unsigned long count, unsigned exttrig=0);
unsigned Stop (double ch1_volts=0, double ch2_volts=0);
unsigned LoadAWAV (AnsiString wavename, char* awavfile, unsigned

numsamples, char* awavtitle="");
DSP Library
A collection of DSP functions. Pending examples.
Programming and Operations AC Instruments
DSP Class
TDSP::TDSP()
The DSP class contains many useful functions for analyzing sampled waveforms.
TDSP->zero_dbRef;
Type: double. Allows the user to define the 0dB reference level. Default is sqrt(2)
Functions
unsigned TDSP::Init();
Should be called once on initialization if any DSP functions are used. Sets the default value of
"zero_dbRef" variable. Automatically called from "InitDIGMOD()" function, user call not required.
Arguments none
Return 0
unsigned TDSP::zero_dB(double reference);
Allows the user to define a custom 0dB reference level. Needs to be called AFTER any call to
TDSP::TDSP::Init().
Arguments double reference

Return 0
unsigned TDSP::window(unsigned type, double data_array[], int sample_size);
User can window the data_array. "data_array" is modified.
Arguments unsigned type

type Window
---------------
0 Rectangular (no window)
1 Hanning
2 Hamming
3 Blackman
4 Flattop
double data_array[]; the data that will be windowed
in sample_size; the number of samples in data_array
Return 0
unsigned TDSP::fft(unsigned data_array[], int sample_size, short bits, short

data_format)
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Performs an FFT on data that is already in unsigned format, typically data that is captured by the DIGMOD
capture memory. The "bits" operator allows for masking of upper order bits the data_format arg will allow
FFT without the user having to convert twos compliment data to binary format.
Arguments unsigned data_array[]

int sample_size
short bits the number of bits, up to 32
short data_format
data_format Input data format
--------------------------------
0 straight binary
1 twos compliment
Return 0
unsigned TDSP::fft(double data_array[], int sample_size)
Performs an FFT on data that is in double format, typically data sampled by a digitizing instrument
(QUVM).
Arguments double data_array[]

int sample_size
Return 0
unsigned TDSP::set_fftout(int bin, double re, double im)
Allows the user to manually set the real and imaginary elements of any bin in the fft array. Note that it can
ONLY be used after a call to TDSP:fft.
Arguments int bin the frequency bin that is to be manually set

double re the value of the real part
double im the value of the imaginary part
Return 0
double TDSP::magnitude(int bin)
Allows the user to examine the amplitude of an individual frequency bin. The level is relative to
"TDSP::zero_dbRef". Note that it can ONLY be used after a call to TDSP:fft.
Arguments int bin the frequency bin that is to be examined

Return the magnitude of the bin argument
unsigned TDSP::fftresults(double data_array[], int sample_size)
Fills data_array[] with the magnitude values of each frequency bin. Typically called if spectral plotting is
necessary. Not typically required during production testing. Note that it can ONLY be used after a call to
TDSP::fft

int sample_size
Return 0
double TDSP::snrdb(int fund, int sample_size)
Returns the signal-to-noise ration in dB of a previously calculated fft. Note that it can ONLY be used after a
call to TDSP:fft.
Arguments int fund the frequency bin of the fundamental

int sample_size number of samples
Return double
double TDSP::snr_aweight(int fund, int sample_size, double sample_rate)
Returns the a-weighted signal-to-noise ration in dB of a previously calculated fft. Note that it can ONLY be
used after a call to TDSP:fft.
Arguments int fund the frequency bin of the fundamental

int sample_size number of samples
double sample_rate digitizer or device sample rate
Return double
unsigned TDSP::dbresults(double data_array[], double ref, int

sample_size,double floordb)
Converts a data array into an array of dB values. The "ref" arguement is used as the reference level. The
"floordb" argument is optional with the default being -240dB. If the argument is used, it will limit the floor in
the array to the input argument value.
Arguments double data_array[] input data

double ref reference level
int sample_size
double floordb
Return 0
unsigned TDSP::plotresults(double data_array[], unsigned plotnum, int

sample_size,double ref)
Allocates a plot for the data that is curently in data_array, data type is "double". The user can also input a
reference value. This value is subtracted from all elements of "data_array" before plotting
Arguments double data_array[] input data

unsigned plotnum 0-8
int sample_size
double ref offset
Return 0
unsigned TDSP::plotresults(unsigned data_array[], unsigned plotnum, int

sample_size, double ref)
Allocates a plot for the data that is curently in data_array, data type is "unsigned". The user can also input
a reference value. This value is subtracted from all elements of "data_array" before plotting.
Arguments unsigned data_array[] input data

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int sample_size
double ref offset
Return 0
unsigned TDSP::plot_complex_time(complex_array data_array[], unsigned plotnum,

int sample_size, double ref)
Allocates a plot for the real part of a complex data array. The user can also input a reference value. This
value is subtracted from all elements of "data_array" before plotting.
Arguments complex_array data_array[]input data

int sample_size
double ref offset
Return 0
unsigned TDSP::plot_complex_fft(complex_array data_array[], unsigned plotnum,

int sample_size, double ref)
Allocates a plot for the combined elements of the complex data array. The user can also input a reference
value. This value is subtracted from all elements of "data_array" before plotting.
Arguments complex_array data_array[] input data

int sample_size
double ref offset
Return 0
unsigned TDSP::plot_time(int plotnum, unsigned time_array[], int sample_size,

char *plotname, char *xaxis, char *yaxis)
Allocates a plot for "time_array" input. No operation is performed on the array before allocating the plot.
Allows the user to label the plot as well as the plot x and y axis.
Arguments int plotnum 0-8

double time_array[]
int sample_size
char *plotname
char *xaxis
char *yaxis
Return 0
unsigned TDSP::plot_freq(int plotnum, unsigned time_array[], int sample_size,

char *plotname, char *xaxis, char *yaxis)
allocates a plot for "time_array" input. Also performs an fft on the input array. The data is prepared for
plotting. The frequency bin of highest amplitude is considered the reference level (0dB) and all freqency
bins are scaled relative ot this level.
Arguments int plotnum 0-8

double time_array[]
int sample_size
char *plotname
char *xaxis
char *yaxis
Return 0
double TDSP::snr(int sample_size, double test_freq, double sample_rate, double

dig_filter)
Returns the signal-to-noise ratio in dB of a previously calculated fft. The user must provide arguments for
sample rate, and fundamental frequency (test_freq). This function also allows the user to limit the upper
frequency included in the calculation by using the "dig_filter" argument. If no filtering is required, the
dig_filter argument should be set to something gresater than 0.5*sample_rate. Note: that it can ONLY be
used after a call to TDSP:fft
Arguments int sample_size

double test_freq
double sample_rate
double dig_filter
Return double
double TDSP::spur(int sample_size)
Returns the peak spurious component of the frequency spectrum. Level is relative to TDSP::zero_dbRef
value as previously discussed. Note that it can ONLY be used after a call to TDSP:fft.

Return double
double TDSP::thd(int sample_size, double test_freq, double sample_rate, double

dig_filter)
Returns the total harmonic distortion in dB of a previously calculated fft. The user must provide arguments
for sample rate, and fundamental frequency (test_freq). This function also allows the user to limit the
upper harmonic included in the calculation by using the "dig_filter" argument. Only harmonics less than
the "dig_filter" argument will be included in the calculation. It can be used ONLY after a call to TDSP:fft

double test_freq
double sample_rate
double dig_filter
Return double
double TDSP::rms(double data_array[],int sample_size)
Returns the RMS value of the input array. note that only "sample_size" number of elements will be
included in the calculation.

int sample_size
Return double
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double TDSP::min(double data_array[],int sample_size)
Returns the minimum value of the input array. note that only "sample_size" number of elements will be

int sample_size
Return double
double TDSP::max(double data_array[],int sample_size)
Returns the maximum value of the input array. note that only "sample_size" number of elements will be

int sample_size
Return double
double TDSP::stddev(double data_array[],int sample_size)
Returns the standard deviation of the input array. note that only "sample_size" number of elements will be

int sample_size
Return double
double TDSP::variance(double data_array[],int sample_size)
Returns the variance of the input array. note that only "sample_size" number of elements will be included
in the calculation.

int sample_size
Return double
void TDSP::vector_mult(double data_array[],double mult_array[], int

sample_size)
Performs an element by element multiplication and modifies the elements of "mult_array" with the results
(mult_array[0]=mult_array[0]*data_array[0]). Note that only "sample_size" number of elements will be
modified.

double mult_array[]
int sample_size
Return void
void TDSP::vector_div(double data_array[],double div_array[], int sample_size)
Performs an element by element division and modifies the elements of "div_array" with the results
(div_array[0]=div_array[0]/data_array[0]). Note that only "sample_size" number of elements will be
modified.

double div_array[]
int sample_size
Return void
void TDSP::scale(double data_array[],int sample_size, double factor)
Modifies each element of "data_array" by the multiplication factor "factor." Note that only "sample_size"
number of elements will be modified.

int sample_size
double factor
Return void
void TDSP::vector_sum(double data_array[],double sum_array[], int sample_size)
Performs an element by element summation and modifies the elements of "sum_array" with the results
(sum_array[0]=sum_array[0]+data_array[0]). Note that only "sample_size" number of elements will be
modified.

double sum_array[]
int sample_size
Return void
void TDSP::vector_sub(double data_array[],double sum_array[], int sample_size)
Performs an element by element subtraction and modifies the elements of "sum_array" with the results
(sum_array[0]=sum_array[0]-data_array[0]). Note that only "sample_size" number of elements will be
modified.

double sum_array[]
int sample_size
Return void
void TDSP::sum(double data_array[],int sample_size, double factor)
Modifies each element of "data_array" by the summation factor "factor" Note that only "sample_size"
number of elements will be modified.

int sample_size
double factor
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Return void
void TDSP::clip(double data_array[],int sample_size, double clipfactor)
If an element of "data_array" is greater than the value of "clipfactor" then the element will be modified to
the value of "clipfactor." Note that only "sample_size" number of elements will be modified.

int sample_size
double clipfactor
Return void
void TDSP::normalize(double data_array[],int sample_size)
Divides each array element by the absoulute value of the largest magnitude value in the array. Note that
only "sample_size" number of elements will be modified.

int sample_size
Return void
void TDSP::shift(unsigned data_array[],int sample_size, int shiftfactor)
Logically shifts (left shift = binary multiplicaton) each element of the unsigned "data_array" by the value of
"shiftfactor." Note that only "sample_size" number of elements will be modified.

int sample_size
int shiftfactor
Return void
void TDSP::and(unsigned data_array[],int sample_size, int andfactor)
Logical "AND" operation on each element of the unsigned "data_array" by the value of "andfactor." Note
that only "sample_size" number of elements will be modified.

int sample_size
int andfactor
Return void
void TDSP::or(unsigned data_array[],int sample_size, int orfactor)
Logical "OR" operation on each element of the unsigned "data_array" by the value of "orfactor." Note that
only "sample_size" number of elements will be modified.
int sample_size
int orfactor
Return void
double TDSP::log10(double x)
Returns a logarithmic value of the input arguement. 10 based.
Arguments double x
Return double
double TDSP::aweightdb(double freq)
Returns the a-weighted value of the input frequency (dB).
Arguments double freq

Return double
double TDSP::aweight(double freq)
Returns the a-weighted value of the input frequency (decimal).
Arguments double freq
Return double
unsigned TDSP::psd(double data_array[], double psd_array[], int sample_size,

int psd_size, int overlap, unsigned window_type)
Computes power spectral density. Breaks data into smaller chunks, runs an fft on those chunks and
averages the result. The results in an output with reduced noise and exposes frequency peaks hidden in
the noise.
Arguments double data_array[] data input array

double psd_array (size = psd_size/2)
int sample_size size of data input array
int psd_size size of data block to average
Note: this sets the FFT size. psd_size should be sample_size / N where N = 1,2,3 ...
int overlap size of overlaping window. Should be 0 or sample_size/2
int window window to apply to data before fft.
Return 0
unsigned TDSP::histogram(unsigned indata[], unsigned histo[], unsigned points,

unsigned bits)
Calculate Histogram of input and puts into histo array. Returns number of values over the specified number
of bits (1<<bits
Arguments unsigned indata[] data input array

unsigned histo[] histogram data array
unsigned points number of points
unsigned bits number of bits
Return unsigned - number of points greater than (1<<bits)
unsigned TDSP::sinewave(double timearray[], double points, double amplitude,

double offset, unsigned cycles, double phase)
Fills "timearray" with ideal sinewave data given all input arguments.
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Arguments unsigned timearray[] time domain array with ideal sinewave data
double points number of points
double amplitude sinewave peak amplitude
double offset offset from 0
unsigned cycles number of sinewave cycles
double phase sinewave phase from 0 degrees
Return 0
unsigned TDSP::multitone(double timearray[], double points, unsigned tones,

double amplitude[], unsigned bin[], double phase[], double offset)
Fills "timearray" with ideal multitone data given all input arguments.
unsigned tones number of sine tones in the multitone
double amplitude[] array of amplitudes for each corresponding tone
double bin[] array of frequency bins for each corresponding tone
double phase[] array of phase offset for each corresponding tone
double offset waveform offset from 0
Return 0
unsigned TDSP::randomnoise(double timearray[], double points, double

amplitude, double offset, unsigned seed)
Fills "timearray" with random noise over the number of desired samples. The noise array is scaled to the
max "amplitude" argument. offset required but is not implemented at this time.
double amplitude array of amplitudes for each corresponding tone
double offset waveform offset from 0
unsigned seed seed for the "random" function
Return 0
unsigned TDSP::quantize(double darray[], int iarray[], unsigned points,

unsigned round)
Fills "iarray" with quantized value of "darray" If "round" is greater than zero, the elements are rounded up,
otherwise they are truncated.
Arguments double darray[] input double array

int iarray[] output integer array
unsigned round round up?
Return 0
TDSP::int_double(int iarray[], double darray[], unsigned points)
Fills "darray" with "double" representations of "iarray."
Arguments int iarray[] input integer array
double darray[] output double array

Return 0
TDSP::unsigned_double(int iarray[], double darray[], unsigned points)
Fills "darray" with "double" representations of "uarray."
Arguments int uarray[] input integer array

double darray[] output double array
Return 0
DSP Testing on KVD M-Series Test System

This section will discuss the setup that is required for the PWS and PWD DSP instruments. These
instruments allow for the generation and measurement of arbitrary analog waveforms, although we will
primarily discuss techniques for sine wave generation and analysis. Actual KVD test system syntax is
discussed later.
Clocking
It is necessary to provide a coherent clock setup for these instruments. There are several possible clock
options that will satisfy the need for coherency: the PWS can provide the 'masterclock' for both
instruments, the PWD can provide the 'masterclock' for both instruments, or the digital subsystem (DSPIO)
can provide the 'masterclock' for both instruments. Since most DSP testing is mixed-signal in nature, the
most logical choice will be to use the DSPIO as the master clock for all instrumentation. For this discussion
the assumption is made that the DSPIO will provide an external clock for both PWS and PWD. This
document will not discuss the use of internal PWS and PWD clock generators.
Example
An example can best often illustrate instrument operation. The following example will show basic setup
and operation of the PWS and PWD. For this example the PWS will be setup to source a 1KHz sine wave.
Ideal Conditions
Standard Audio test setup
Test Frequency = Ft = 1KHz
Sample Frequency = Fs = 40KHz
PWD Clock Setup

Start with setting up the PWD. The PWD has the following clock limitations:
Fswd = xclock_in / DIV / 256
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decimation_clk = 256 * Fswd
Where DIV = 1, 2, 4, 8, 16, 32, 64, or 128
As always with DSP based test equipment, some assumptions are made for the ideal situation, and then
compromises are made:
For Fswd = 40KS/s, then decimation_clk = 40KS/s*256 = 10.240 MHz
This satisfies the max decimation_clk of 12.288MHz. Since the DSP Processor will run well at about
40Mhz, then the DIV ratio will be set to 4, giving roughly 10.24Mhz * 4 = 40.96Mhz master clock. Figure 9.1
shows the relationship between external clock (xclock_in) and the PWD clock.
Figure 9.1: Simplified PWD, Single Channel, Clock Relationships
DSPIO Clock Setup

Now it has been determined that the xclock_in will need to run at roughly 40.96MHz. Since it has been
determined that the DSPIO will be the master clock source for both the PWS and PWD, this clock should
be set accordingly. After reviewing the possible clock options for setting the DSPIO PLL, the following clock
rate is possible:
xclock_in = 40Mhz * PLL_P / PLL_Q/ 2^PLL_M
xclock_in = 40MHz * 127 / 62 / 2;
xclock_in = 40.967742MHz;
The first compromise in DSP testing has been made, the exact ideal master clock of 40.96MHz is not quite
achievable, a close value is chosen.
With this master clock, the sample rate of the PWD will change somewhat from the ideal of 40KS/s. With
an xclock_in of 40.967742Mhz, and a divide ratio (DIV) of 4, the decimation clock will be 40.967742Mhz/4
= 10.241935Mhz. With a decimation (clock division) of 256, the final PWD sample clock will be as follows:
Fswd = xclock_in/DIV/256:
Fswd = 40.967742Mhz / 4 / 256 = 40,007.56Hz
This is very close to the ideal of 40000Hz, and will allow for frequency analysis out to 20003.78Hz. This will
satisfy the typical audio device specification of 20000Hz. Of course this approach has been simplified for
this example, but is also typical of the approach required for deriving clocks for DSP based systems.
PWS Clock Setup

Now that the PWD sample clock has been determined, it is necessary to setup the PWS clock. This clock
will be driven from the same reference (master clock) as the PWD, so we already know the xclock_in rate
(40.967742MHz). The clocking for the WS differs from that of the WD. The WS clock is determined by
dividing the DSP clock (xclock_in/2 in this case) by some integer value that is greater than 14. Why 14?
The PWS sample update rate is determined by a program that runs in the on-board DSP processor. The
program takes 14 clock cycles to complete, and the users can add a number of dummy clocks
(DACLOOP) to the program so the sample rate can be adjusted accordingly. For the remainder of this
discussion the value of 14 will be the value of DACLOOPBASE.
Figure 9.2 shows a simplified relationship between the PWS sample clock and the master clock, in this
case xclock_in.
Figure 9.2: Simplified PWS, Single Channel, Clock Relationships
The sample rate of the PWS is determined by the xclock_in rate and the DSP "DAC" program as follows:
Fswd = xclock_in / 2 / (DACLOOP + DACLOOPBASE);
Since we will likely source with the WS at the same rate that we sampled with the WD, the assumption is
made as follows:
Fsws = Fswd = 40,007.56Hz, and since xclock_in is known to be 40.967742MHz, then the following is true:
Fsws = xclock_in / 2 / (DACLOOP + DACLOOPBASE);
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DACLOOP + DACLOOPBASE = 512;
If DACLOOPBASE = 14, then DACLOOP = 498;
This seems overly complicated, the logical question is: Why run a DSP program just to source a
waveform? Why not just divide the xclock_in and get the desired sample rate? This is a valid question and
will lead to the next topic - Direct Digital Synthesis. The DSP program is in fact very powerful and allows
the user to store a single nominal waveform (single cycle, full scale amplitude, for example) and use the
DSP program to manipulate frequency and final amplitude.
The Test Frequency

The concept of waveform synthesis is relatively simple. A digital representation of a sine wave is stored in
waveform memory, and the memory is stepped through and sent to a D/A converter which is filtered and
then sent to the DUT. To continue with the example, the clock problems have been solved and we'll move
on to the signal generation. The basic relationship for Fourier analysis of sampled signals is as follows:
Ft / Fs = M / N
Where:
Ft = test frequency
Fs = sample frequency (40.007.56Hz for this example)
M = the integer number of test cycles
N = the number of samples
This is a basic relationship that will be used for the remainder of the example. This example assumes that
the reader has some DSP test experience. There are several good references that detail these principles.
To continue with the example, the next step is to choose the number of samples that will make up the
source waveform (and typically the sampled waveform as well). Since the principles of Fourier analysis
dictate that we use 2^X number of samples, a good starting point is 1024 samples. To store a single cycle
of the waveform in memory, the following equation is used:
For ( i=0; i<N; I++)
sample = sin(I*2*PI/N);
For the chosen value N=1024, a single cycle of 1024 points will be created. Now we can go back to the
equation:
Ft / Fs = M / N
If we step through the source memory point-by-point we will generate the following frequency:
Ft = Fs*M / N
Ft = 40,007.56*1/1024 = 39.06988 Hz
This is also known as the 'Fourier frequency', typically indicated as Ff . This will also be the frequency
resolution for sine wave generation as well as frequency spectrum analysis. We now have the basis for
completing the equation. Back to the example, the desired test frequency Ft is 1KHz. With the known
frequency resolution of 39.06988Hz, the next step will determine the actual test frequency:
M (number of cycles) = 1000Hz/Ff ;
M = 1000/39.06988 = 25.6 ;
The principles of Fourier analysis state that M and N must be 'mutually prime', in other words M/N can not
be further reduced, or even simpler if N is always even, then M has to be odd. If for example we picked M
= 26, this would reduce as follows:
26 / 1024 = 13 / 512;
This simply states that if we were to generate 26 cycles of the 1024 point waveform, it is the same as
reducing the waveform to 512 points, and generating 13 cycles. Back to the example, the next logical
choice is M=25, this will give the following:
Ft / Fs = M / N ;
Ft = 40007.56 * 25 / 1024 ;
Ft = 976.747Hz ;
The next step is to determine how to generate this test frequency. Without Direct Digital Synthesis it is
certainly not difficult to generate this waveform. The equation that is used to generate the stored waveform
could be modified as follows:
For ( i=0; i<N; I++)
sample = sin(I*2*PI*M/N);
Where M is the number of cycles. This is acceptable, but does not allow for much flexibility. If we needed
several different test frequencies, we would need to store a different waveform for each individual
frequency and amplitude.
Direct Digital Synthesis

The program running in the PWS DSP processor allows for significant flexibility (frequency and amplitude
modification) by just storing a single sine cycle. This is known as Direct Digital Synthesis (DDS). A single
sine cycle is stored using the following:
For ( i=0; i<N; I++)
sample = sin(I*2*PI/N);
This will allow the user to single step through the waveform memory and generate a sine wave, for our
example parameters this will generate a 39.069Hz signal. The desired test frequency is 25X this number,
and we can easily generate the correct Ff with DDS. The DSP program that is running in the PWS will
allow the user to indicate the memory address 'step rate'. In other words, instead of stepping through
memory point-by-point, we can skip points at a predetermined rate. For example we know that if we step
point-by-point we will generate a 39.069Hz signal. What happens if we skip every other memory location?
We will actually generate 2*39.096Hz = 78.139Hz! So if we go back to the original Fourier equation:
Ft / Fs = M / N ;
M=2
To generate our desired Ft = 976.747Hz, we simply have to cycle through the memory to every 25th
location, and we will generate our desired Ft.
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The DSP program that runs in the PWS processor will also allow for us to modify the signal amplitude.
Conclusion
The intent of this document is to show some of the clocking and signal generation techniques used for
DSP test on the KVD test system. The user should understand these techniques prior to test program
generation.
Waveform Source
There are two current versions of the Waveform Source, the original WS and the PWS (Precision
Waveform Source - originally described as the WS2000).
Figure 9.3: Waveform Source Pictorial
The KVD Test System is capable of generating arbitrary waveforms using the Waveform Source. This
source is a DSP based instrument comprised of three channels, 2 low frequency and 1 high frequency.
The low frequency ports are fully differential with adjustable offset and choice of 5KHz or 50KHz low pass
filtering. The high speed output is single ended and can be updated at speeds up to 30MS/S. The
waveform memory is 128K X 32 bits.
Control
The WS is controlled by the TI TMS320C32 DSP processor. The rate at which the processor runs
determines the update rate of the source. There are several clocking options for the WS. This clock can
originate internally or come from another system module including the system 12.5MHz clock, DSPIO
module, or WD module. The DSP processor allows for an important capability of the Waveform Source
called Direct Digital Synthesis (DDS). A single sine wave (or square wave) is stored in waveform memory.
This one waveform memory block can be used to source waveforms of varying frequency and amplitude
(including calibration factors) without modifying the waveform memory. This is a powerful feature that
minimizes waveform memory use and simplifies many housekeeping functions that are required of devices
that require many sine wave tests of varying amplitude and frequency.
312 PN: 73-01003-00, December 2011

AC Instruments Waveform Source
Figure 9.4: WS Block Diagram
WS Connections
In order to use the Waveform Source, the proper connections must be made. Below is a list of typical
connections.
Connection Description
WG1P WS Channel 1 Non-Inverted Low Speed DAC output
WG1N WS Channel 1 Inverted Low Speed DAC output

WG2P WS Channel 2 Non-Inverted Low Speed DAC output
WG2N WS Channel 2 Inverted Low Speed DAC output
HFOUT WS High Speed DAC output

CALVM Internal connection to Calibration Meter (for cal)
ICHI Internal interconnect to motherboard (for con to WD)
WG1P1 Connection on Fathercard

WG1N1 Connection on Fathercard


Pinouts
Connections between the WS module and the Father Card are made through a 33 pin Hypertronics
Figure 9.5: WS I/O Pinout
314 PN: 73-01003-00, December 2011

AC Instruments Waveform Source Commands
Waveform Source Commands

WS->start (<waveform>,<frequency>,<amplitude>);
Start waveform generation.
Objects: WS0 or WS1

Effect: Starts a ws waveform. The frequency and amplitude are determined by sample
clock frequency and calibration factors. If frequency is greater than 0, the
function will modify the rate at which the WS waveform RAM is indexed,
otherwise the RAM index will be 1 (necessary for multitone waveforms). The
amplitude will be scaled according to user derived calibration factors.
Prototype: unsigned start(DSPTEST x, double testfreq, double testamp);
WS->clock (<source>,<destination>);
Setup the sample clock for the WS.
Objects: WS0 or WS1
Value range: OSCCLK, DISCLK, PLLMCLK0, XCLKIN, NOCLOCK, H1

TICLK, REFCK0, REFCK1, XCLKOUT
Effect: Connects the appropriate clock resources for sampling the WS waveform RAM,
running the WS DSP processor, and driving an external clock to other system
resources (WD, DSPIO) for system synchronization.
Prototype: unsigned clock(DSPCLOCK src, DSPCLOCK dest);
Note: To operate, the WS instrument must have a clock source connected to TICLK.
The input to WS pll is designated REFCK0
the output from WS pll is designated PLLMCLK0.
WS->init ( )
Initialize the WS.
Objects: WS0 or WS1

Effect: Allocates the necessary memory for the WS_context structure. This routine
should only be called once during initialization. It is called by the system
command UserClass >SystemInit().
Prototype: unsigned init(void);
WS->reset ( )
Reset the WS.
Objects: WS0 or WS1

Effect: Resets the WS to a known default state - zero offset, no filtering, default clock
settings (Note DSPCLOCKSETUP structures section). Necessary for proper
booting of the WS. Need not be called when testing devices, only during
initialization (UserClass >SystemInit, UserClass >LotInit),
Prototype: unsigned reset(void);

Note: This function is called after each DUT from the system function reset_hardware.
WS->pllbits ( <numerator>,<denominator>,<divisor>)
Set up the WS PLL.
Objects: WS0 or WS1

Effect: Sets the WS pll parameters. It is necessary to setup the WS PLL circuit if the
WS will be used as the master clock source for the test system. The PLL clock
frequency is derived as follows: clock_freq*2*numerator/demominator/
pow(2,divisor).
Prototype: unsigned pllbits(unsigned p, unsigned q, unsigned m);
Note: clock_freq*2*p/q must be in the range of 50Mhz to 120Mhz

call only if the WS is the system master clock
the input to WS pll is designated REFCK0
the output from WS pll is designated PLLMCLK0.
WS -> xclkinfreq (<frequency>);

Set the WS input clock frequency.
Objects: WS0 or WS1

Effect: If a module other than the WS is the WS clock resource, a call to this function
will set the clock frequency for the WS external clock input. This function does
not set WS hardware.
Prototype: unsigned xclkinfreq(freq[]);
Note: call only if the WS is being clocked externally

the elements of <frequency> array correspond to the sides of the test head
which may contain a WS instrument.
316 PN: 73-01003-00, December 2011

WS->xclkoutfreq (<frequency>);
Return value of WS output clock frequency.
Objects: WS0 or WS1

Effect: If the WS is used to clock other system resources (DSPIO, WD) this routine
should be called after a call to pllbits. This returns the output frequency of the
WS external clock in the array <frequency>.
Prototype: unsigned xclkoutfreq(double freq[]);

Note: call if the WS is used to clock other modules
call after pllbits.
WS->offset ( <ws>,<offset>)
Set the WS output offset voltage.
Objects: WS0 or WS1

Value range: LFWSP0 , LFWSN0, LFWSP1, LFWSN1
Effect: Typically the waveform that is generated by the WS does not have a built in DC
offset. If an offset is required, this function will set the appropriate value in the
source output DAC. No waveform RAM modification is required.
Prototype: unsigned offset(WSCHANNEL ws, double offset);

Note: the user is required to calibrate the WS offset DAC in UserClass >SystemInit or
UserClass >LotInit
WS->filter (<source>, <filter>)

Set the WS output filter.
Objects: WS0 or WS1

Value range: LFWS0, LFWS1
WS5KHZ, WS50KHZ, WSNOFIL
Effect: Sets the post DAC low-pass filter for the WS channel. The HFWS does not
have a filter option.
Prototype: unsigned filter(WSTYPE ws, WSFILTER fil);
Note: No filtering in the high frequency source. It is strongly recommended that if
filtering is required, the WS is amplitude calibrated with the same filter setting.
WS->atten (<source>,<attenuation>)
Set the WS output attenuation
Objects: WS0 or WS1

Value range: (LFWS0, LFWS1) (greater than or equal to 0)
Effect: Sets the post DAC signal attenuation. The attenuation settings are 0dB, 20dB,
40dB, and 60dB. There is no attenuation on the high frequency source. The
setting applied is the greatest value which is less than or equal to
<attenuation>.
Prototype: unsigned atten(WSTYPE ws, double atten);
Note: No filtering in the high frequency source. Although it is possible to use nominal
attenuation settings, it is strongly recommended that the WS attenuators be
calibrated at some time during UserClass >LotInit.
WS->store_sine20bit (<address>, <length>,<amplitude>,<offset>);

Store a source waveform.
Objects: WS0 or WS1

Effect: Computes and stores a sine wave in the WS RAM. Note that the amplitude and
offset can be digitally stored as part of the waveform. This is for LF sine wave
generation only. This routine is intended for backwards compatibility only. New
test programs should use the function store_wave20bit, which can store more
complex multi-tone waveforms.
Prototype: short store_sine20bit(unsigned long start_adr, unsigned len, double amp,

double off);
Note: for backwards compatibility only, new programs should use the function
store_wave20bit.
WS->store_wave20bit (<wave structure>);

Objects: WS0 or WS1

Effect: Computes and stores a single tone or multi-tone sine wave to be generated by
a LFWS channel. The waveform structure must be "initialized" and loaded at
some time during UserClass >SystemInit. This function is capable of computing
and storing multi-tone waveforms.
Prototype: short store_wave20bit(DSPTEST x);

Note: waveform structures must be initialized at some time during UserClass
>SystemInit.
waveform structure elements tones, bins[], and amps[] described in the
DSPTEST Structure section of this document.
318 PN: 73-01003-00, December 2011

WS->store_sine16bit_hs (<address>,<length>,<amp>,<offset>)
Store a hs source waveform.
Objects: WS0 or WS1

Effect: Computes and stores a sine wave in the WS RAM. Note that the amplitude and
offset can be digitally stored as part of the waveform. This is for HF sine wave
generation only.
Prototype: short store_sine16bit_hs(unsigned long start_adr, unsigned len, double amp,

double off);
Note: for generating and storing of high frequency sine waves.
WS->store_ramp20bit (<address>,<length>,<amplitude>,<offset>)
Objects: WS0 or WS1

Effect: Computes and stores a ramp wave in the WS RAM. Note that the amplitude
and offset can be digitally stored as part of the waveform.
Prototype: short store_ramp20bit(unsigned long start_adr, unsigned len, double amp,
double off);
Precision WS
Figure 9.6: Precision Waveform Source Pictorial
The PWS (Precision Waveform Synthesizer) is an improved version of the KVD Arbitrary Waveform
Synthesizer, with updated converters and programmable filters.
The PWS offers two low frequency output channels, each using a 24-bit DAC as the basic building block,
and a high frequency channel offering 16 bit resolution. Waveform memory is 256K 32-bit words, and 256K
of 8-bit NVRAM to store code for the on-board TI DSP processor.
Programmable output filtering for the low frequency channels is provided by a daughter board. Low
frequency output voltage limits are ± 5V, but application circuits can significantly extend that range if
necessary, with a maximum sample clock frequency of 768KHz. The High frequency output channel offers
± 2V, with a maximum sample clock of 30MHz.
Clocking can be internal, or synchronized with other instruments such as the DSPIO Digital Subsystem, or
any of the available Waveform Digitizers.
Below is a list of the basic features:
Number of Output 2
Channels
Resolution 24 bits
Voltage Range ± 5V
Maximum Sample 768Khz
Rate
Memory Depth 256K

Low Pass Filter Programmable
1K25,2K5,5K
12K5,25K
or 50K 8-pole
Output Single Ended

Signal to Noise > 100db
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AC Instruments PWS Commands
Figure 9.7: WS2000 Precision Waveform Synthesizer Block Diagram
PWS Commands
Connection
void con(PWSCHAN chan);

void con_to_switch_bus(PWSCHAN chan);
void con_to_cal_bus(PWSCHAN chan);
void con_to_l1(PWSCHAN chan);
void con_to_ic(PWSCHAN chan);
void con_to_agnd(PWSCHAN chan);
void discon(PWSCHAN chan = NONE);
void discon_from_agnd(void);
void discon_from_cal_bus(void);
void discon_from_l1(void);
void discon_from_ic(void);
Clocking
unsigned dds_setup(DSPCLOCK ddsnum, double freqval);

unsigned dds_reset(void);
void clock_reset(unsigned resetval);
double xclkoutfreq(void);
void xclkinfreq(double freq);
unsigned clock(DSPCLOCK source,DSPCLOCK dest);
Filter/Level(DC)
unsigned offset(PWSCHAN ws, double offset);

unsigned filter(PWSCHAN channel,double filval);
unsigned atten(PWSCHAN ws,double atten);
unsigned setv(PWSCHAN ws, double val);
General
short reset(void);
unsigned init(void);
PWS Connection Syntax
PWSx = PWS0, PWS1, PWS2, or PWS3 ***
*** This references a BOARD, not a CHANNEL!
PWSx -> con

Connect a channel on a PWS Board
void con(PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel (usually PWSCHAN1) to the outside

world.
PWSx -> con_to_switch_bus

void con_to_switch_bus (PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel (usually PWSCHAN1) to the switch

bus (whatever that is).
PWSx -> con_to_cal_bus

void con_to_cal_bus (PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel to the cal bus (Keithley meter).
PWSx -> con_to_l1

Connect a channel on a PWS Board to Motherboard Line 1
322 PN: 73-01003-00, December 2011

void con_to_l1 (PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel to the DC bus, allowing DC

measurement with MPDS[0].
PWSx -> con_to_ic

void con_to_ic (PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel to the interconnect bus, internal

connections
of different instruments
PWSx -> con_to_agnd

void con_to_agnd (PWSCHAN chan);
Parameters:
PWSCHAN chan // connect a channel to analog ground
PWSx -> discon

Disconnect a channel on a PWS Board
void discon(PWSCHAN chan);
Parameters:
PWSCHAN chan // disconnect a channel from the outside world.
PWSx -> discon_from_switch_bus

Disconnect all channels on a PWS Board
void discon_from_switch_bus (void);
Parameters:
None - disconnects all channels on a given board
PWSx -> discon_from_cal_bus

void discon_from_cal_bus (void);
Parameters:
PWSx -> discon_from_l1

void discon_from_l1 (void);
Parameters:
PWSx -> discon_from_ic

void discon_from_ic (void);
Parameters:
PWSx -> discon_from_agnd

void discon_from_agnd (void);
Parameters:
PWS Clocking Syntax
PWSx -> dds_setup

Set a frequency on one of the on board *DDS clocks
unsigned dds_setup(DSPCLOCK ddsnum, double freqval);
Parameters:
DSPCLOCK ddsnum // DDS1CLK or DDS2CLK

double freqval // sets the clock frequency (up to 45MHz)
Note: This is an on-board clocking option. Typically the DSPIO will be used to clock the PWS board, and
it will not be necessary to set this clock.
PWSx -> dds_reset

Reset the DDS clocks on a PWS board
324 PN: 73-01003-00, December 2011

unsigned dds_reset(void);
Parameters:
None
Resets the board DDS1CLOCK and DDS2CLK to default values.
PWSx -> clock_reset

Reset all clocking to default on a PWS board
void clock_reset(unsigned resetvalue);
Parameters:
unsigned resetvalue // either 0 or greater
Note: Changes all programmed clock connections back to the on-board defaults if resetvalue>0. Set this
to 1 before calling PWSx->reset(); if you want to default the DC conditions but leave the clocking
intact.
PWSx -> xclockoutfreq

Tells the rest of the system what freq is coming out of the external clock output on a PWS board.
double xclkoutfreq(void);
Parameters:
None
Returns the value of the external clock output on a PWS board. This is only necessary if the PWS board is
serving as the master clock for other instruments (DSPIO, PWS, PWD etc).
PWSx -> xclockinfreq

If another system instrument (PWS, PWD, DSPIO) is serving as the master clock for the PWS board, it
needs to know what frequency is coming in on its external clock input.
void xclkinfreq(double freq);
Parameters:
double freq
Note: Must do this so the DDS clocking is set up correctly by having the correct DACLOOP setting
programmed.
PWSx -> clock

Set the internal clocks on a PWS board. There are many options.
void clock(DSPCLOCK source, DSPCLOCK dest);
Parameters:
DSPCLOCK source // source = OSCLK2, DISCLK, XCLKIN, H1, DDS1CLK,

DDS2CLK
DSPCLOCK dest // destination = DAC1CLK, DAC2CLK, XCLKOUT, TICLK
Example:
PWS0->clock(XCLKIN, TICLK);
PWS0->clock(H1, DAC1CLK);
This example will accomplish the following:

• Set the clock for the TI DSP processor to come form the external clock input
• Set the DAC clock for channel 1 to come from H1 clock (which is ½ of the TICLK)
Other source options:
OSCLK = on-board 40MHz xtal
DISCLK = 12.5Mhz system wide clock
DDS1CLK = on-board DDS1 clock
DDS2CLK = on-board DDS2 clock
Other dest options:
DAC2CLK = DAC clock for channel 2
XCLKOUT = output to other modules
PWS Filter/DC Syntax
PWSx -> offset

Set a DC offset on a PWS channel
unsigned offset(PWSCHAN ws, double offset);
Parameters:
PWSCHAN ws // PWSCHAN1 or PWSCHAN2

double offset // -5V to +5V
PWSx -> filter

Set a filter for a PWS channel
326 PN: 73-01003-00, December 2011

unsigned filter(PWSCHAN ws, double filval);
Parameters:

double filval // 0 to infinite
Note: Setting the filval to 0.0 will apply NO FILTER to the PWS output, all other settings will round up to
the next logical choice.
Example:
Filval = 0 NO FILTER
Filval = 1 to 1250 1250Hz LPF
Filval = 5000 to 12500 12.5Khz LPF
Filval = 12500 to 25000 25Khz LPF
Filval = 25000 and beyond 50Khz LPF
PWSx -> atten

Attenuate the PWS channel output
unsigned atten(PWSCHAN ws, double atten);
Parameters:

double atten // value of attenuation
Note: Currently does not operate on the PWS board.
PWSx -> setv

Set a steady DC output on a PWS channel
unsigned setv(PWSCHAN ws, double val);
Parameters:

double val // DC output value
Note: Sets a PWS output channel to a steady state DC level. This will also stop any TI program that is
running in the PWS DSP processor.
PWS General Syntax
PWSx -> reset

Reset a PWS board
short reset(void);
Parameters:
None
Note: This will reset a PWS board to a known state as follows:

1. Disconnect everything
2. No filters (all channels)
3. No offset (all channels)
4. Clock with 40Mhz internal on-board xtal (unless a call has previously been made as follows:
PWSx->clock_reset(0), which would keep all current clocking intact.
PWSx -> init

Initialize a PWS board
short init(void);
Parameters:
None
Note: Don't do this.
328 PN: 73-01003-00, December 2011

AC Instruments Waveform Digitizer
Waveform Digitizer
Figure 9.8: Waveform Digitizer Pictorial
There are two current versions of the Waveform Digitizer, the original WD and the PWD. The WD is
described first.
The KVD Test System is capable of digitizing arbitrary waveforms using the Waveform Digitizer. The WD is
a DSP based instrument comprised of 2 analog channels, 1 low frequency and 1 high frequency. The
current WD also has a direct digital input 'channel' that can be used to send digital data to memory and the
DSP processor. The low frequency port is fully differential with adjustable offset and choice of 5KHz or
50KHz low pass filtering. The high speed input is single ended and can be sampled at speeds up 30MS/S.
The digital port is currently used for testing CMOS imager devices. The waveform memory is 1M X 32 bits
of SRAM.
Processing and Control
The WD is controlled by the on-board TI TMS320C32 DSP processor. The rate at which the processor
runs determines the speed of calculation. There are several clocking options for the WD. This clock can
originate internally or come from another system module including the system 12.5MHz clock, DSPIO
module, or WS module. These clocks will be discussed in detail in a later section.
Figure 9.9: WD Block Diagram
WD Connections
In order to use the Waveform Digitizer, the proper connections must be made.
LSADCP Low Speed ADC Non-Inverting Input

LSADCN Low Speed ADC Inverting Input
HSADC High Speed ADC Input

AGND Analog Ground - (Ground LSADCN to run single ended)
ICHI Connection to Motherboard (to connect to WS)
WD1P1 Fathercard Connection

WD1N1 Fathercard connection
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AC Instruments Waveform Digitizer Commands
Pinouts
Connections between the WD module and the Father Card are made through a 33 pin Hypertronics
Figure 9.10: Waveform Digitizer Hypertronics Pinout
Waveform Digitizer Commands

WD->start (< source >,<waveform>);
Start waveform capture.
Object: WD0, WD1

Value range: LFWD0, LFWD1, HFWD
Effect: Starts the waveform digitizer. The sample clock must be running.
Prototype: short start(RESOURCE ws, DSPTEST x);
WD->clock (<source>,<destination>);
Set up the sample clock for the WD.
Object: WD0, WD1

Value range: OSCCLK, DISCLK, PLLMCLK0, XCLKIN, H1, NOCLOCK
TICLK, REFCK0, REFCK1, XCLKOUT, LFCLK0, LFCLK1, HFCLOCK,
CALCLOCK
Effect: Connects the appropriate clock resources for sampling the WD input signal,
running the WD DSP processor, and driving an external clock to other system
resources (WS, DSPIO) for system synchronization.
Prototype: unsigned clock(DSPCLOCK src, DSPCLOCK dest);

Note: To operate, the WD instrument must have a clock source connected to TICLK
and a clock source connected to LFCLK0.
The input to WD pll is designated REFCK0
the output from WD pll is designated PLLMCLK0.
WD->init
Initialize the WD.
Object: WD0, WD1
Effect: Allocates the necessary memory for the WD_context structure. This routine is
called during system boot and need not be called by the user. It is called by the
system command UserClass >SystemInit()
Prototype: unsigned init(void);
WD->reset
Reset the WD.
Object: WD0, WD1

Effect: Resets the WD to a known default state - zero offset, no filtering, default clock
settings. This function is called by the operating system prior to testing each
device. It need not be called by the user.
Prototype: unsigned reset(void);
Note: This function is called after each DUT from the system function reset_hardware.
WD -> pllbits (<numerator>,<denominator>,<divisor>)

Set up the WD PLL.
Object: WD0, WD1

Effect: Sets the WD pll parameters. It is necessary to set up the WD PLL circuit if the
WD will be used as the master clock source for the KVD test system. The PLL
clock frequency is derived as follows: clock_freq*2*numerator/demominator/
pow(2,divisor).
Prototype: unsigned pllbits(unsigned p, unsigned q, unsigned m);
Note: clock_freq*2*p/q must be in the range of 50MHz to 120MHz

call only if the WD is the system master clock
the input to WD pll is designated REFCK0
the output from WD pll is designated PLLMCLK0.
332 PN: 73-01003-00, December 2011

WD->xclkinfreq (<frequency>)
Set the WD input clock frequency.
Object: WD0, WD1

Effect: If a module other than the WD is the WD master clock resource, a call to this
function will set the clock frequency for the WD external clock input. This
function does not set WD hardware.
Prototype: unsigned xclkinfreq(double freq[]);

Note: call only if the WD is being clocked externally
WD->xclkoutfreq (<frequency>)
Return value of WD output clock frequency.
Object: WD0, WD1

Effect: If the WD is used to clock other system resources (DSPIO, WD) this routine
should be called after a call to pllbits. This returns the output frequency of the
WD external clock in the array <frequency>.
Prototype: unsigned xclkoutfreq(double freq[]);
Note: call if the WD is used to clock other modules

call after pllbits.
which may contain a WD instrument.
WD->offset (<source>,<offset>);
Set the WD input offset voltage.
Object: WD0, WD1

Value range: LFWD0, LFWD1, HFWD
Effect: This function will set the appropriate input offset DAC on the WD. A call to this
function may be required if the signal to be digitized is a low-level signal with a
DC component. The signal may need amplification for accurate measurement,
but first the DC component must be removed.
Prototype: unsigned offset(WDTYPE wd, double offset);

Note: the user is required to calibrate the wd offset DAC in UserClass >SystemInit()
WD->filter (<source>,<filter>);
Set the WD input filter.
Object: WD0, WD1

Value range: (LFWD0, LFWD1) (WD5KHZ, WD50KHZ, WDNOFIL)
Effect: Sets the pre ADC filter for the appropriate WD channel. There is no filtering or
conditioning of any type in the HFWD path.
Prototype: unsigned filter(WDTYPE wd, WDFILTER fil);
Note: No filtering in the high frequency path. It is strongly recommended that if filtering
is required, the WD is amplitude calibrated with the same filter setting.
WD->gain (<source>,<gain1>,<gain2>)
Set the WD input gain.
Object: WD0, WD1

Value range: LFWD0, LFWD1
Effect: Sets the input gain stages for the WD channel. There are 2 gain stages that are
cascaded together. The final gain setting will be in the range of 1 to 64. Note
there is no gain conditioning for the HFWD input.
Prototype: unsigned gain(RESOURCE ws, double gain1, double gain2);
Note: No gain setting in the high frequency path.
WD->lfadc (<adcclock>,<sample rate>)

Set the WD low frequency clock and sample rates.
Object: WD0, WD1
Value range: (less than 2.5MHz) (less than clock rate / 16)
Effect: Sets clock and sample rate for the low frequency WD paths. The clock rate
must not exceed 2.5MHz and the sample rate must be no greater than the clock
rate / 16. The actual setting will be determined by the input clock frequency.
Prototype: unsigned lfadc(double adcclock, double srate);
Note: Actual settings are determined by the input clock frequency.

Actual adcclock setting determined by dividing the input clock frequency with an
integer value.
Actual sample rate setting determined by dividing the adcclock setting with an
integer value.
334 PN: 73-01003-00, December 2011

WD->hfadc (<sample rate>);

Set the WD high frequency sample rate.
Object: WD0, WD1

Effect: Sets the sample rate for the high frequency WD path.
Prototype: unsigned lfadc(double srate);

Note: Actual setting is determined by dividing the input clock frequency with an
integer value.
Precision WD
Figure 9.11: Precision Waveform Digitizer Pictorial
The PWD (Precision Waveform Digitizer) is an improved version of the KVD Waveform Digitizer, with
updated converters and programmable filters.
The PWS offers four low frequency input channels, each using a 20-bit DAC as the basic building block.
Waveform memory is 256K 32-bit words, and 256K of 8-bit NVRAM to store code for the on-board TI DSP
processor. Built-in DSP routines include FFT,SNR,THD,THD+N.
Programmable low-pass filtering for the input channels is provided by two daughter boards, along with
various gain stages. Basic input voltage limits are ± 2.5V, but application circuits can significantly extend
that range if necessary. Maximum sampling frequency is 48KHz.
Clocking can be internal, or synchronized with other instruments such as the DSPIO Digital Subsystem, or
any of the available Waveform Synthesizers.
Below is a list of basic features:
Number of Input Channels 4

Resolution 20 bits
Voltage Range ± 2.5V

Maximum Sample Rate 48Khz
Memory Depth 256K
Gain Selections
Stage 1 1x or 10x
Stage 2 1x,2x,4x or 8x
Stage 3 1x or 16x
Offset Control ± 2.5v 20 bits
336 PN: 73-01003-00, December 2011

AC Instruments Precision WD
Low Pass Filter Programmable

1K25,2K5,5K
12K5,25K
or 50K 8-pole
Input Differential
Signal to Noise > 100db
Data Acquisition Dedicated State
Machine per Channel

DSP Processor TMS320C32
40mhz Clock Rate
Frequency Synthesizer 4 per board
45mhz max frequency
32 bit resolution
Clock Modes Internal or External

DSP Algorithms FFT,SNR,THD,THD+N
Figure 9.12: WD2000 QUAD Audio Digitizer Block Diagram
PWD Commands
Connection
short instr_con(pLFWD_Instr instr,WD_Input wdinput);

short input_con(WD_Input wdinput);
short instr_discon(pLFWD_Instr instr,WD_Input wdinput);
short input_discon(WD_Input wdinput);
Clocking
short dds_setup(pLFWD_DDS ddsnum, double freqval);

short dds_reset();
void clock_reset(unsigned resetval);
short clock_div(pLFWD_Chan Chan,pLFWD_Div div);
short clock(pLFWD_Clksrc source, pLFWD_Clk dest);
short clockselect(pLFWD_Clk clock, pLFWD_Clksrc source);
General
short reset();
short start(pLFWD_Chan channel,short numpts);
short stop();
short wait();
Filter/Level(DC)
short offset (pLFWD_Chan chan, double value);

unsigned filter(pLFWD_Chan channel,double filval);
short gain (pLFWD_Chan chan, pLFWD_Gain value);
double read_wd2000_dc(pLFWD_Chan Chan);
PWD Connection Syntax
PWDx = PWD0, PWD1, PWD2, or PWD3 ***
PWDx -> instr_con

Connect a PWD input channel to a tester instrument
short instr_con(pLFWD_Instr instr, WD_Input wdinput);
Parameters:
pLFWD_Instr instr // WD_KEITHLEY, WD_AGND, WD_IC1A4, or WD_DUTSRC1

WD_Input wdinput // PWD_WD1P, PWD_WD1N, PWD_WD2P, PWD_WD2N
PWD_WD3P, PWD_WD3N, PWD_WD4P, PWD_WD4N
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AC Instruments PWD Commands
Note: Allows the user to connect various tester instruments to a PWD channel input. These resources
include GND, the Keithley meter, MPDS[0], or the interconnect bus (IC1A4).
PWDx -> input_con

Connect a PWD input channel up to the FatherCard
short input_con(WD_Input wdinput);
Parameters:

Connects the input of a WD Channel to the outside world (need to do both for a differential measure).
PWDx -> instr_discon

Disconnect a PWD input channel from a tester instrument
short instr_discon(pLFWD_Instr instr, WD_Input wdinput);
Parameters:
pLFWD_Instr instr // WD_KEITHLEY, WD_AGND, WD_IC1A4, or WD_DUTSRC1

Note: Disconnect a previously 'connected' instrument.
PWDx -> input_discon

Disconnect a PWD input channel from the FatherCard
short input_discon(WD_Input wdinput);
Parameters:

Disconnect a previously 'connected' PWD channel.
PWD Clocking Syntax
PWDx -> dds_setup

Set a frequency on one of the on board *DDS clocks
short dds_setup(pLFWD_DDS ddsnum, double freqval);
Parameters:
pLFWD_DDS ddsnum // DDS1_WD, DDS2_WD, DDS3_WD, DDS4_WD

double freqval // sets the clock frequency (up to 45MHz)
Note: This is an on-board clocking option. Typically the DSPIO will be used to clock the PWD board, and
it will not be necessary to set this clock.
PWDx -> dds_reset

Reset the DDS clocks on a PWS board
short dds_reset();
Parameters:
None
Resets the board DDS1_WD, DDS2_WD, DDS3_WD, DDS4_WD to default values.
PWDx -> clock_reset

Reset all clocking to default on a PWD board
void clock_reset(unsigned resetvalue);
Parameters:
unsigned resetvalue // either 0 or greater
Note: Changes all programmed clock connections back to the on-board defaults if resetvalue>0. Set this
to 1 before calling PWDx->reset(); if you want to default the DC conditions but leave the clocking
intact.
PWDx -> clock_div

Sets the PWD channel Decimation clock divider value, to satisfy the constraints of the TI DSP processor,
as well as the ADC clock, this will typically be set to 4
short clock_div(pLFWD_Chan Chan, pLFWD_Div div);
Parameters:
pLFWD_Chan Chan// LFADC1, LFADC2, LFADC3, or LFADC4

pLFWD_Div div// DIV1, DIV2, DIV4, DIV8, DIV16, DIV32, DIV64,
or DIV128
PWDx -> clock

Set the internal clocks on a PWD board. There are many options.
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short clock(pLFWD_Clksrc source, pLFWD_Clk dest);
Parameters:
pLFWD_Clksrc source // source = WD_DDS1, WD_DDS2, pLFWD_H1, pLFWD_XIN

pLFWD_Clk dest //dest = ADC1CLK, ADC2CLK, ADC3CLK, ADC4CLK
pLFWD_XOUT, pLFWD_TICLK, or pLFWD_SMCLK
Example:
PWD0->clock(pLFWD_XIN, pLFWD_TICLK);
PWD0->clock(pLFWD_XIN, pLFWD_ADC4CLK);
PWD0->clock(pLFWD_XIN, pLFWD_SMCLK);
This example will accomplish the following:
1. Run the TI DSP from external clock input.

2. Run channel 4 clock from the external clock input.
3. Run the "State Machine" clock from external clock input.
Note: There are many clocking options, allowing for configurations that may not make sense; choose
wisely (follow the example).
PWDx -> clockselect

Set the internal clocks on a PWD board. There are many options. Note this is legacy code and should not
be used for new applications, operates the same as PWDx->clock syntax, except source and dest are
switched in the parameters.
short clockselect(pLFWD_Clk dest, pLFWD_Clksrc source);
Parameters:
pLFWD_Clk dest //dest = ADC1CLK, ADC2CLK, ADC3CLK, ADC4CLK

pLFWD_XOUT, pLFWD_TICLK, or pLFWD_SMCLK
pLFWD_Clksrc source // source = WD_DDS1, WD_DDS2, pLFWD_H1, pLFWD_XIN
PWD General Syntax
PWDx -> reset

Reset a PWD board
short reset(void);
Parameters:
None
Note: This will reset a PWD board to a known state as follows:

1. Disconnect everything.
2. Set all channels clock div to DIV4.
3. Set ADC clocks on all channels to XCLKIN.
4. Set TI and SM clocks to on-board 40Mhz xtal.
5. Offset to 0.0 on all channels.
6. Disconnect all filters.
7. Disconnect all inputs.
8. Set gain to 1.0.
PWDx -> start

Start sampling the input on a PWD channel
short start(pLFWD_Chan channel,short numpts);
Parameters:
pLFWD_Chan channel// LFADC1, LFADC2, LFADC3, LFADC4, LFADC1_4

short numpts // captures a number of samples
Note: This will start the capture of a number of samples on a PWD channel (assuming the clocks are
running).
PWDx -> stop

Reset a PWD board
short stop(void);
Parameters:
None
Note: This will stop the capture of all PWD channels, even if the clocks are running and the channels are
in the process of storing captured data.
PWDx -> wait

Wait for a board to finish capturing the requested number of points
short wait(void);
Parameters:
None
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PWD Filter/DC Syntax
PWDx -> offset

Set a DC offset on a PWD channel
short offset (pLFWD_Chan chan, double value);
Parameters:
pLFWD_Chan chan // LFADC1, LFADC2, LFADC3 or LFADC4

double value // -5V to +5V
PWDx -> filter

Set a filter for a PWD channel
unsigned filter(pLFWD_Chan channel,double filval);
Parameters:

double filval // 0 to infinite
Note: Setting the filval to 0.0 will apply NO FILTER to the PWD input, all other settings will round up to
the next logical choice.
Example:
filval = 0 NO FILTER
filval = 1 to 1250 1250Hz LPF
filval = 5000 to 12500 12.5Khz LPF
filval = 12500 to 25000 25Khz LPF
filval = 25000 and beyond 50Khz LPF
PWDx -> gain

Apply GAIN to the PWD input channel
short gain (pLFWD_Chan chan, pLFWD_Gain value);
Parameters:

pLFWD_Gain value // WDGAIN1, WDGAIN2, WDGAIN4, WDGAIN8, WDGAIN16
PWDx -> read_wd2000_dc

Read the DC value of a number of samples, after the sample set has been collected.
double read_wd2000_dc(pLFWD_Chan Chan);
Parameters:
Note: Only returns the first sample DC value.
344 PN: 73-01003-00, December 2011

10. Non-Instrument Software

Commands
LOG Object
TLOG
The TLOG class is implemented through the object LOG. This class contains an enormous number of
functions that are useful to the test engineer. Theses functions range from loading run time conditions (bin
files, limits files) to tracking the state of the test flow.
LOG->CurTestNum
Always contains the current test number. Auto incremented after call to KVD->Test command.
unsigned CurTestNum;
LOG->DataToEventLog
Setting this to true redirects datalog strings from the Engineering screen to the CBuilder IDS's Event Log
bool DataToEventLog;
LOG->DisableAlarms
default = false. When set to true, allows the KVD->Test command to determine failures that include source
alarms.
bool DisableAlarms;
LOG->EngineeringMode
Parameter set by reading the Customer Preferences.
bool EngineeringMode;
Description:
When true, this causes the datalogs to show profiling test times.
LOG->plottestnum
Variable to set to activate the automatic plotting of the last measvm statement.
Programming and Operations Non-Instrument Software Commands
int plottestnum;
LOG->SystemMsgToEventLog
Setting this to true redirects system message strings from the status portion of the main screen to the
CBuilder IDS's Event Log.
bool SystemMsgToEventLog;
LOG->ActiveWaferTesting
Read only property.
__property bool ActiveWaferTesting;
Description:
True when a wafer is testing.
LOG->ApplicationName
Read only property.
__property AnsiString ApplicationName;
Description:
Returns the Application name, excluding the path and extension.
LOG->BadDieCount
Read only property.
__property unsigned long BadDieCount;
Description:
Returns the current total number of failed devices for this test run.
LOG->BinFileName
Read only property.
__property AnsiString BinFileName;
Description:
Returns the filename of the last bin file read.
LOG->Comment
Read/Write property.
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Non-Instrument Software Commands LOG Object
__property AnsiString Comment;
Description:
Sets or Returns the Comment field that appears in the various data files.
LOG->ComputerName
Read only property.
__property AnsiString ComputerName;
Description:
Returns the TesterID (ComputerName) used for all data files.
LOG->DatalogFileName
__property AnsiString DatalogFileName;
Description:
Sets or Returns the filename that datalogs will go to.
LOG->DataPath
__property AnsiString DataPath;
Description:
Sets or Returns the file path used for all data files.
LOG->Default_LOT_DataFileName
__property AnsiString Default_LOT_DataFileName;
Description:
Sets or Returns the BASE name applied to all lot data files (HIST, TDA, SUM, and LOG).
LOG->Default_SUBLOT_DataFileName
__property AnsiString Default_SUBLOT_DataFileName;
Description:
Sets or Returns the BASE name applied to all sublot data files (HIST, TDA, SUM, and LOG).
LOG->DUTSN
__property int DUTSN;
Description:
Sets or Returns the current serial number for the Device Under Test.
LOG->EnablePrintDatalogFile
__property bool EnablePrintDatalogFile;
Description:
Enables (true) and disables (false) the automatic printing of DatalogFile files.
Example:
//this example enables automatic printing of DatalogFile files

LOG->DatalogFile=true;
LOG->EnablePrintHistogramFile
__property bool EnablePrintHistogramFile;
Description:
Enables (true) and disables (false) the automatic printing of Histogram files.
Example:
//this example enables automatic printing of Histogram files

LOG->EnablePrintHistogramFiles=true;
LOG->EnablePrintSummaryFile
__property bool EnablePrintSummaryFile;
Description:
Enables (true) and disables (false) the automatic printing of Summary files.
Example:
//this example enables automatic printing of Summary files

LOG->EnablePrintSummaryFile=true;
LOG->EnablePrintTDAFile
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__property bool EnablePrintTDAFile;
Description:
Enables (true) and disables (false) the automatic printing of TDA files.
Example:
//this example enables automatic printing of TDA files

LOG->EnablePrintTDAFiles=true;
LOG->FileDatalogAll
Read/Wite property.
__property bool FileDatalogAll;
Description:
Changes the file datalogging mode to log ALL tests.
LOG->FileDatalogFails
Read/Wite property.
__property bool FileDatalogFails;
Description:
Changes the file datalogging mode to log FAILS only.
LOG->FileDatalogOff
Read/Wite property.
__property bool FileDatalogOff;
Description:
Changes the file datalogging mode to OFF.
LOG->FileSampleNum
Read only property.
__property unsigned FileSampleNum;
Description:
When this number is equal to the File Sample Size, a datalog is generated.
LOG->FileSampleSize
Read/Wite property.
__property unsigned FileSampleSize;
Description:
Use this field to set the sample size rate for device data being logged to the file.
LOG->FirstTestNum
Read only property.
__property unsigned FirstTestNum;
Description:
Returns the first test number used in the limits array.
LOG->FixtureID
__property AnsiString FixtureID;
Description:
Sets or Returns the FixtureID that appears in the various data files.
LOG->GoodDieCount
Read only property.
__property unsigned long GoodDieCount;
Description:
Returns the current total number of good devices for this test run.
LOG->HandTestModeActive
Read only property.
__property bool HandTestModeActive;
Description:
Returns true if the operator has activated the hand test form.
LOG->Job
__property AnsiString Job;
Description:
Sets or Returns the Job Name that appears in the various data files.
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LOG->LastDatalogString
Read only property.
__property AnsiString LastDatalogString;
Description:
If in NoDataCollection mode, returns the last datalog string produced by the KVD->Test command.
LOG->LastTestNum
Read only property.
__property unsigned LastTestNum;
Description:
Returns the last test number used in the limits array.
LOG->LibraryVersion
Read only property.
__property AnsiString LibraryVersion;
Description:
Returns the currently loaded library designation string.
LOG->LotNumber
__property AnsiString LotNumber;
Description:
Sets or Returns the Lot Number path used for all data files.
LOG->LotNumber
//Set the lot number
LOG->LotNumber="12345678";
//now read it back into a variable
AnsiString lotnum=LOG->LotNumber;
LOG->NoDataCollection
__property bool NoDataCollection;
Description:
Allows the user to perform tests, but does no record any of the data collected.
LOG->OperatorID
__property AnsiString OperatorID;
Description:
Sets or Returns the OperatorID that appears in the various data files.
LOG->ParameterFileName
Read only property.
__property AnsiString ParameterFileName;
Description:
Returns the filename of the last parameters file read.
LOG->RuntimeLevel
Read only property.
__property short RuntimeLevel;
Description:
Returns flags that indicate the run time level of the program.
LOG->SavedDatalogFileName
Read only property.
__property AnsiString SavedDatalogFileName;
Description:
Returns the Datalog file name that is being used.
LOG->ScreenDatalogAll
Read/Wite property.
__property bool ScreenDatalogAll;
Description:
Changes the screen datalogging mode to log ALL tests.
LOG->ScreenDatalogFails
Read/Wite property.
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__property bool ScreenDatalogFails;
Description:
Changes the screen datalogging mode to log FAILS only.
LOG->ScreenDatalogOff
Read/Wite property.
__property bool ScreenDatalogOff;
Description:
Changes the screen datalogging mode to OFF.
LOG->ScreenSampleNum
Read only property.
__property unsigned ScreenSampleNum;
Description:
When this number is equal to the Screen Sample Size, a datalog is generated.
LOG->ScreenSampleSize
Read/Wite property.
__property unsigned ScreenSampleSize;
Description:
Use this field to set the sample size rate for device data being logged to the screen.
LOG->StartedByKVDLauncher
Indicates true when the application was started by a KVD Launcher app.
__property bool StartedByKVDLauncher;
LOG->StartLotTime
Read only property.
__property TDateTime StartLotTime;
Description:
Returns the date and time that the lot was started.
LOG->StopFF
__property bool StopFF;
Description:
Also known as Fast Binning. Set to true to enable fast binning. Set to false to disable fast binning. Read
this property to determine the fast binning mode.
LOG->TesterID
__property AnsiString TesterID;
Description:
Sets or Returns the TesterID (ComputerName) that appears in the various data files.
LOG->UploadDataPath
__property AnsiString UploadDataPath;
Description:
Sets or Returns the path that all data files will be uploaded to.
LOG->UsingCustomDataDLL
Read only property.
__property bool UsingCustomDataDLL;
Description:
Flag that indicates whether a custom data DLL is being used or not. This field is set only by enabling the
option in the customer preferences tool.
LOG->UsingDeviceHandler
Read only property.
__property bool UsingDeviceHandler;
Description:
Flag that indicates whether a device handler/prober DLL is being used or not.
LOG->WaferDescFileName
__property AnsiString WaferDescFileName;
Description:
Sets or returns the currently wafer description file name.
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LOG->WafermapColorsFileName
Read only property.
__property AnsiString WafermapColorsFileName;
Description:
Returns the filename of the last WCF file read.
LOG->WafermapDescFileName
Read only property.
__property AnsiString WafermapDescFileName;
Description:
Returns the filename of the last WDF file read.
LOG->WaferMapX
__property int WaferMapX;
Description:
For Wafer testing only. Returns the last wafer X position reported by the prober.
LOG->WaferMapY
Read only property.
__property int WaferMapY;
Description:
For Wafer testing only. Returns the last wafer Y position reported by the prober.
LOG->WaferNumber
__property AnsiString WaferNumber;
Description:
Sets or Returns the Lot Number path used for all data files.
Example:
//Set the lot number

LOG->WaferNumber="12";
//now read it back into a variable
AnsiString wafnum=LOG->WaferNumber;
LOG->WaferTestFlow
Indicates true when the application is testing wafers, false for package test see options in Customer
Preferences Tool.
__property bool WaferTestFlow;
LOG->AddLimitUnit
Adds a new unit to the units array.
short AddLimitUnit(AnsiString name, double value);
Parameters:
AnsiString name
The name of the unit. This is the same name that will be used in the limits file.
double value
The value that is applied when the unit is used.
Returns:
0 - indicates that the unit could not be added to the list. a value greater than 0 indicates success.
Description:
The user can add their own units (an essentially unlimited number) if they so desire.
The only requirement is that the call to AddLimitUnit occur before you load the limits file, otherwise the load
will fail. KVD suggests that you put the call for AddLimitUnit in your TUser::SystemInit section.
LOG->AddUserComment
Allows the user to add comments that will show up on the data file headers
void AddUserComment(AnsiString name, AnsiString desc);
Parameters:
AnsiString name
The name will be the portion that shows on the left side of the header.
AnsiString desc
The value of the commented name.
For example LOG->AddUserComment("LASER POWER","5.00uj"); would show up as LASER POWER :

5.00uJ on the header.
Description:
This field allows the engr to add there own comments to the data file headers. It is the responsibility of the
programmer to clear the list. That is, comments added during one wafer will carry to the next wafer unless
cleared.
356 PN: 73-01003-00, December 2011

LOG->ClearUserComments
Clears all previously added comments
void ClearUserComments();
LOG->CurrentBin
Returns the Current bin of the device under test.
int CurrentBin(short sitenum = 0);
Parameters:
short sitenum = 0
An integer between 0 and 7 (default = 0)
Returns:
Returns the current bin for the DUT for the sitenum passed in. Value will be 0 - 63 A value of 0 indicates an
error occurred in a binning process somewhere during the test flow.
Description:
If no sitenum is passed into the function, it defaults to site 0 which is valid for all single site testing.
LOG->DatalogComment
Allows user to send strings to datalog reports.
void DatalogComment(AnsiString s);
Parameters:
AnsiString s
Your comment string.
Description:
Use this function to enter your own strings/comments into the datalog report. The string is entered at
position when it is called.
LOG->DeleteWaferData
Deletes a previously saved binary wafer map file.
bool DeleteWaferData();
Returns:
True if the file existed and was deleted, otherwise false.
Description:
Uses the wafer number, lot number as the filename. The extension is .rtl
LOG->DownGrade
Used to downgrade a device from its current PASSING bin to the next PASSING bin. Description:
short DownGrade(short sitenum);
Parameters:
short sitenum
LOG->ExecuteProgram
Executes an external program specified by the cmd parameter.
HANDLE ExecuteProgram(HWND hwnd, String cmd);
Parameters:
HWND hwnd
The handle to the windows application calling the function.
String cmd
The PATH, FILENAME, EXTENSION, and command line.
LOG->FindWaferData
Locates a previously saved binary wafer map file.
bool FindWaferData();
Returns:
True if the file exists, otherwise false.
Description:
Uses the wafer number, lot number as the filename. The extension is .bwm
LOG->GetLimitsEntry
Returns a LIMITS_STRUCT containing all the limits info for this test number.
LIMITS_STRUCT GetLimitsEntry(unsigned tn);
LOG->GetPassBinSite
Used to retrieve the passbin for one site.
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short GetPassBinSite(short sitenum = 0);
Parameters:
short sitenum = 0
LOG->IsFailing
Used to determine if the DUT is currently failing.
bool IsFailing(short sitenum = 0);
Parameters:
short sitenum = 0
Returns:
Returns true if the device is considered a FAIL, false otherwise.
LOG->IsPassing
Used to determine if the DUT is currently passing.
bool IsPassing(short sitenum = 0);
Parameters:
short sitenum = 0
Returns:
Returns true if the device is still considered a PASS, false otherwise.
LOG->test_fail[tn]
Changes made so that the field LOG->test_fail[tn] works as before. Billk is believed to be the only one who
uses it. The problem he was having was that this field was buffered, and yet he reads it/needs it in real
time.
LOG->IsValidBin
Used to determine if the DUT's current bin is valid.
bool IsValidBin(short sitenum = 0);
Parameters:
short sitenum = 0
Returns:
Returns true if the DUT has a current bin that was listed in the BIN description file
LOG->load_bin_data
Loads a bin description file.
short load_bin_data(AnsiString filename);
Description:
Bin description files specify the bin numbers, whether they are pass or fail bins and maximum allowed
consecutive fails, or overall fails. Please read the HOW TO file "How to Setup a BIN File" for more
information.
LOG->load_extlimits_data
Function that loads a limits file created with the Extended Limits Editor. Description: This function differs
from the load_limits_data in the sense that it supports files created with the Extended Limits Editor, that is,
it supports multiple limits per test.
short load_extlimits_data(AnsiString filename);
Parameters:
AnsiString filename
The PATH and FILENAME of the limits file.
LOG->load_limits_data
Function that loads a limits file NOT created with the Extended Limits Editor Description: This function
loads limits data created in the older style format. That format was supported by the original Limits Editor,
not the Extended Limits Editor.
short load_limits_data(AnsiString filename);
Parameters:
AnsiString filename
The PATH and FILENAME of the limits file.
LOG->load_waferdesc_file
Loads a wafer description file.
short load_waferdesc_file(AnsiString filename);
Parameters:
AnsiString filename
The PATH and FILENAME of the wafer description file.
360 PN: 73-01003-00, December 2011

Returns:
-1 if the file does not exist
-2 if the file is empty
-3 if the file has the wrong format
otherwise 0.
Description:
Wafer description files can be generated automatically by using the M310direct tool. These files have the
min and max values for the rows and columns in the map, as well as the map layout for testable die, inked
die, skipped die, and untestable die.
LOG->load_wafermap_colors
Loads a wafer map colors file.
short load_wafermap_colors(AnsiString filename);
Description:
Wafer map colors files contain the colors used in the wafermap display. For more information on this, see
the HOW TO file, "Creating Wafer Map Description and Color Files".
LOG->LoadCustomerPrefFile
Loads a previously save Customer Preferences Config file.
short LoadCustomerPrefFile(AnsiString filename);
Parameters:
AnsiString filename
The PATH , FILENAME, and EXT of the cpc file.
Returns:
0 if the file is loaded ok.
Description:
Use the customer preferences tool to configure your options, and then save the file. Then, use this
command to load those preferences.
LOG->TestInProgress
Allows the user to display a TEST IN PROGRESS splash screen with their own message.
void TestInProgress(AnsiString message = NULL);
Description:
By sending in a string, the splash screen will be displayed with that string as the message. By sending in
an empty string (""), the splash screen is removed.
LOG->UserGenDatalog
LOG Example 1
User function to generate datalogs from program control.
void UserGenDatalog(REPORT_DESTINATION dest, AnsiString filename = 0);
Parameters:
REPORT_DESTINATION dest
Can be TOPRINTER, or TOFILE.
AnsiString filename = 0
Only valid if destination is TOFILE. Must include path, filename, and extension
Description:
Datalogs are normally generated at LOT end. This function can be called anytime during the program flow
to generate the datalog immediately.
Example:
//this line generates the datalog to a file

LOG->UserGenDatalog(TOFILE,"c:\MyDatalog.txt");
//this line generates the datalog and send directly to the printer
LOG->UserGenDatalog(TOPRINTER);
LOG->UserGenHistogram
User function to generate histograms from program control.
void UserGenHistogram(REPORT_DESTINATION dest, AnsiString filename = 0);
Parameters:
Description:
Histograms are normally generated at LOT end. This function can be called anytime during the program
flow to generate the histogram immediately.
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Example:
//this line generates the histogram to a file

LOG->UserGenHistogram(TOFILE,"c:\MyHistogram.txt");
//this line generates the histogram and send directly to the printer
LOG->UserGenHistogram(TOPRINTER);
LOG->UserGenSummary
User function to generate summaries from program control.
void UserGenSummary(REPORT_DESTINATION dest, AnsiString filename = 0);
Parameters:
Description:
Summaries are normally generated at LOT end. This function can be called anytime during the program
flow to generate the summary immediately.
Example:
//this line generates the summary to a file

LOG->UserGenSummary(TOFILE,"c:\MySummary.txt");
//this line generates the summary and send directly to the printer
LOG->UserGenSummary(TOPRINTER);
LOG->UserGenTDA
User function to generate TDA report from program control.
void UserGenTDA(REPORT_DESTINATION dest, AnsiString filename = 0);
Parameters:
Only valid if destination is TOFILE. Must include path, filename, and extension.
Description:
TDA reports are normally generated at LOT end. This function can be called anytime during the program
flow to generate the TDA file immediately.
Example:
//this line generates the TDA report to a file

LOG->UserGenTDA(TOFILE,"c:\MyTDA.txt");
//this line generates the TDA report and send directly to the printer
LOG->UserGenTDA(TOPRINTER);
LOG->NoTester - is only true if the NoTester install was run.
KVD Object
KVD->UserParamFileName
Contains the filename of the Users Parameters File.
AnsiString UserParamFileName;
KVD->CalibrateAll
Runs the calibration program in automatic mode, which runs all calibrations.
void CalibrateAll();
KVD->CalibrateMenu
Runs the calibration program in normal user mode.
void CalibrateMenu();
Description:
The calibration program runs as normal. The user will need to run the various calibrations and exit the
program before it returns to the calling process.
KVD->DaysSinceLastCal
Returns the number of days since the last calibration was completed.
double DaysSinceLastCal();
KVD->HoursSinceLastCal
Returns the number of hours since the last calibration was completed
double HoursSinceLastCal();
KVD->LoadConfig
Loads a configuration file using the TCT tool.
short LoadConfig(AnsiString filename);
Parameters:
AnsiString filename
This is the name of the configuration file. You do not need to put in a path or extension.
364 PN: 73-01003-00, December 2011

Non-Instrument Software Commands KVD Object
Returns:
0 if config was loaded, -1 of the file could not be found.
Description:
Different test head configurations can be saved from the TCT. It automatically saves them in the TCT
folder, with a tct_config extension. The test engineer can make sure that their configuration is loaded by
loading it with this command.Normally this is handled by the Setup File Tool .ini file, but can be overridden
by the test engineer.
KVD->ReadLauncherString
Returns strings sent in through the use of KVD Launcher.
AnsiString ReadLauncherString(AnsiString param);
Returns:
If no KVDLauncher.ini file exists, returns ERROR_KVDLAUNCHER_INI_NOT_FOUND.
If the KVDLauncher.ini file does not have a [LAUNCHERENTRIES] section, returns

ERROR_NO_LAUNCHENTRIES_SECTION.
If the parameter does not appear in the KVDLauncher.ini file, returns

ERROR_PARAM_DOES_NOT_EXIST.
Otherwise it returns the value associated with the parameter as an AnsiString.
Description:
This function differs from the function ReadParameterString in that it returns parameter values that were
set up in the KVD Launcher interface. Typically these parameters are the OperatorID and the LotNumber.
KVD->ReadParameterString
Returns the requested parameter from the parameter file.
AnsiString ReadParameterString(AnsiString param);
Returns:
If UserParamFileName hasn't been set, returns ERROR_FILENAME_IS_NULL.
If file does not have a [PARAMETERS] section, returns ERROR_NO_PARAMETERS_SECTION.
If file does not have the requested parameter, returns ERROR_PARAM_DOES_NOT_EXIST for file.
If file does not exist, returns ERROR_PARAMFILE_NOT_FOUND.
Otherwise, it returns the parameters value as an AnsiString.
Description:
This function opens up the parameter file specified by the UserParamFileName. If the file exists, and the
parameter exists, it returns the parameters value as a AnsiString. If the file does not exist, or the parameter
does not exist, it returns an ERROR string (see Return Values).
KVD->SelectView
Command that allows the user to select which page is the viewable page on the main form.
void SelectView(int pagenum);
Parameters:
int pagenum
An integer that corresponds to the page 0 - Chart View 1 - Engineering View 2 - Test Statistics View 3 -
Wafer Map View.
KVD->Test
Compares the last result to the current test limits.
short Test(void);
Returns:
FALSE for a PASSING device, and TRUE for a FAILING device.
Description:
This is the routine that is called to verify a pass/fail condition. The SITE->lastresult value is compared to
the limits for the current test number, for a singlesite program. After the compare, the datalog line is
generated and test counters are updated.
KVD->TestNoFail
Compares the last result to the current test limits. DOES NOT GENERATE FAIL INFORMATION.
short TestNoFail(void);
Returns:
FALSE for a PASSING device, and TRUE for a FAILING device.
Description:
This routine is identical to the Test function, except all fail information is not generated. For more
information, see the Test function, but remember that no fail information is generated.
KVD->tnum
Sets the current test number.
short tnum(unsigned number);
Parameters:
unsigned number
Can be a very large number - no practical limit.
366 PN: 73-01003-00, December 2011

Non-Instrument Software Commands KVD Object
Returns:
0 for a valid test number, -1 for an invalid test number.
Description:
Sets the LOG->CurTestNum variable. This then determines the limits to use for testing.
KVD->UserComment
Adds a comment line to the Engineering View.
void UserComment(AnsiString s);
368 PN: 73-01003-00, December 2011

Appendix A: Detailed Specifications

The latest specifications will be provided here in hard copies of the document.
KVD M Series Test System Specifications

Revision 1.13 – 12/5/11
System Accuracy specifications based on Keithley Model 2000 DMM, 1 Year/Room Temperature
specifications. Keithley 2002 DMM and HP3458A available as an option for improved calibration accuracy.
Physical, Power, and Environmental
Standard Cabinet size

24” wide, 36” deep, 37.5” high (61 cm wide, 92 cm deep, 95 cm high)
4 leveling feet provided.
Typical configuration cabinet weight: 290 lbs. (132 kg)
Test Head
Test Head enclosure is approximately 14” X 14” X 7” (deep), (36 cm X 36 cm X 18 cm) and weighs
approximately 25 pounds (11Kg) depending on configuration. Two sides may be used for mounting
brackets. Other two sides contain fans.
The customer is responsible for adapting and connecting the test head instruments outwards to
their device under test, using device sockets or probers as needed by the device type. In no
circumstances shall the customer connect an outside source of power inward to the test head
through an external circuit.
Power
The test system requires a protected circuit rated at 16 Amps of 100-240VAC single-phase power., 50 or
60 Hz. The customer must provide overcurrent protection in the form of a circuit breaker or fuse to satisfy
all local regulations.
The AC Power cord is a flexible assembly that extends from the upper rear of the cabinet a minimum of
four feet (122 cm) . The male cord end plug is a NEMA L6-20P standard
Environmental:
The environment must be maintained at 20-30 Degrees Celsius, and 20%-80% non-condensing humidity,
operating altitude less than 6500 ft (2000 m). Calibration will be held within specification for a time period
of one week, or a temperature drift of 3º C., from the previous calibration, provided the system is allowed
30 minutes warm-up time to come to thermal equilibrium with its environment.
System Software 5.0.3 or Higher— M2 Test System Programming and Operations 369
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is
assumed for possible inaccuracies or omissions. All specifications are subject to change without notice
370 PN: 73-01003-00, December 2011

Appendix B: Release Notes and Updates

Please insert any new Release Notes sent you in this section of the document for reference.
372 PN: 73-01003-00, December 2011

Appendix C: Custom Father Cards

Please insert Father Card documentation in this section of the document for reference.
374 PN: 73-01003-00, December 2011

Index
A DMCH[x]->fmt 8-235
AC power 3-50 DMCH[x]->force 8-223
Administrative commands 7-169 DMCH[x]->forceenable 8-223
DMCH[x]->forcemode 8-223
B DMCH[x]->format 8-235
Batteries DMCH[x]->imeter 8-228
Caution 2-41
DMCH[x]->irange 8-227
C DMCH[x]->keepalive 8-237
Cautions 1-31, 2-37 DMCH[x]->l1abus_con 8-231
Chemicals 2-42 DMCH[x]->l1abus_discon 8-232
Clamps 7-137, 7-168 DMCH[x]->ldenable 8-229
Current ranges 7-167 DMCH[x]->load 8-229
Custom data DLLs 6-86 DMCH[x]->loaddisable 8-229
Customer Preferences Tool 6-77 DMCH[x]->measfreq 8-238
DMCH[x]->measvm 8-229
D DMCH[x]->pmuenable 8-226
Datalog Control Page 6-83 DMCH[x]->seti 8-227
Datalogs 6-102, 6-124 DMCH[x]->SetSiteMode 8-222
Devices 1-35 DMCH[x]->setv 8-227
DIGMOD[x]->dcap_read 8-252 DMCH[x]->start 8-235
DIGMOD[x]->dcap_setup 8-252 DMCH[x]->start_measfreq 8-238
DIGMOD[x]->ddrv_load 8-252 DMCH[x]->stop 8-236
DIGMOD[x]->ddrv_setup 8-252 DMCH[x]->tmucon 8-237
DMCH[x]->abus_con 8-230 DMCH[x]->trm 8-226
DMCH[x]->abus_discon 8-231 DMCH[x]->trmenable 8-226
DMCH[x]->cmplevel 8-224 DMCH[x]->tset 8-235
DMCH[x]->cmpstart 8-236 DMCH[x]->vih 8-225
DMCH[x]->cmpstop 8-236 DMCH[x]->vil 8-225
DMCH[x]->dcmp 8-234 DMCH[x]->vmeter 8-228
DMCH[x]->dcomp 8-235 DMCH[x]->voh 8-225
DMCH[x]->dfmt 8-234 DMCH[x]->vol 8-225
DMCH[x]->dig_con 8-230 DMCH[x]->vrange 8-228
DMCH[x]->dig_discon 8-230
DMCH[x]->disable 8-223 E
DMCH[x]->dka 8-237 Electrostatic discharge 2-41
DMCH[x]->dlevel 8-224 Engineering view 6-108
DMCH[x]->dtiming 8-232, 8-233 Ergonomics 2-42
DMCH[x]->dtiming_combine 8-233
F
DMCH[x]->enable 8-222
Force current 7-166
DMCH[x]->enastart 8-236
Force voltage 7-166
DMCH[x]->enastop 8-236
System Software 5.0.3 or Higher —M2 Test System Programming and Operations 375
FPGA booting 4-71 LOG >BadDieCount 10-346

LOG >BinFileName 10-346
G
LOG >ClearUserComments 10-357
Glossary 1-30
LOG >Comment 10-346
Grounding 2-42
LOG >ComputerName 10-347
H LOG >CurrentBin 10-357
Handler Bin Table Tool 6-90 LOG >CurTestNum 10-345
Handler Options 6-85 LOG >DatalogComment 10-357
Hazards 1-31 LOG >DatalogFileName 10-347
Help 1-29 LOG >DataPath 10-347
Histograms 6-105, 6-124 LOG >DataToEventLog 10-345
HPDCMOD I/O pinout 7-173 LOG >Default_LOT_DataFileName 10-347
HPDS[i] >actual_sample_rate 7-171 LOG >Default_SUBLOT_DataFileName 10-347
HPDS[i] >Exists 7-171 LOG >DeleteWaferData 10-357
HPDS[i] >getname 7-172 LOG >DisableAlarms 10-345
HPDS[i] >hpdsirange 7-172 LOG >DownGrade 10-358
HPDS[i] >hpdsloopcomp 7-172 LOG >DUTSN 10-348
HPDS[i] >hpdsmode 7-172 LOG >EnablePrintDatalogFile 10-348
HPDS[i] >hpdsval 7-172 LOG >EnablePrintHistogramFile 10-348
HPDS[i] >hpdsvrange 7-172 LOG >EnablePrintSummaryFile 10-348
LOG >EnablePrintTDAFile 10-348
K LOG >EngineeringMode 10-345
Kelvin connections 7-138, 7-169 LOG >ExecuteProgram 10-358
KVD >CalibrateAll 10-364 LOG >FileDatalogAll 10-349
KVD >CalibrateMenu 10-364 LOG >FileDatalogFails 10-349
KVD >DaysSinceLastCal 10-364 LOG >FileDatalogOff 10-349
KVD >HoursSinceLastCal 10-364 LOG >FileSampleNum 10-349
KVD >LoadConfig 10-364 LOG >FileSampleSize 10-349
KVD >ReadLauncherString 10-365 LOG >FindWaferData 10-358
KVD >ReadParameterString 10-365 LOG >FirstTestNum 10-350
KVD >SelectView 10-366 LOG >FixtureID 10-350
KVD >Test 10-366 LOG >GetLimitsEntry 10-358
KVD >TestNoFail 10-366 LOG >GetPassBinSite 10-358
KVD >tnum 10-366 LOG >GoodDieCount 10-350
KVD >UserComment 10-367 LOG >HandTestModeActive 10-350
KVD >UserParamFileName 10-364 LOG >IsFailing 10-359
LOG >IsPassing 10-359
L
LOG >IsValidBin 10-359
Launcher 6-97
LOG >Job 10-350
Lithium batteries 2-41
LOG >LastDatalogString 10-351
LOG >ActiveWaferTesting 10-346
LOG >LastTestNum 10-351
LOG >AddLimitUnit 10-356
LOG >LibraryVersion 10-351
LOG >AddUserComment 10-356
LOG >load_bin_data 10-360
LOG >ApplicationName 10-346
376 PN: 73-01003-00, November 2008

LOG >load_extlimits_data 10-360 MP force current 7-136

LOG >load_limits_data 10-360 MP Force Voltage 7-135
LOG >load_waferdesc_file 10-360 MP force voltage 7-135
LOG >load_wafermap_colors 10-361 MPDCMOD 7-133
LOG >LoadCustomerPrefFile 10-361 MPDCMOD block diagram 7-134
LOG >LotNumber 10-351 MPDCMOD I/O pinout 7-152
LOG >NoDataCollection 10-351 MPDS[i] >actual_sample_rate 7-144
LOG >OperatorID 10-352 MPDS[i] >Exists 7-144
LOG >ParameterFileName 10-352 MPDS[i] >get_board_local_groundsense 7-145
LOG >plottestnum 10-345 MPDS[i] >getname 7-145
LOG >RuntimeLevel 10-352 MPDS[i] >mpdsirange 7-144
LOG >SavedDatalogFileName 10-352 MPDS[i] >mpdsloopcomp 7-144
LOG >ScreenDatalogAll 10-352 MPDS[i] >mpdsmode 7-144
LOG >ScreenDatalogFails 10-352 MPDS[i] >mpdsval 7-144
LOG >ScreenDatalogOff 10-353 MPDS[i] >mpdsvrange 7-144
LOG >ScreenSampleNum 10-353 MPDS[i] >read_temperature 7-145
LOG >ScreenSampleSize 10-353 MPDS[i] >ResourceSide 7-145
LOG >StartedByKVDLauncher 10-353 MPDS[i] >ResourceSlot 7-145
LOG >StartLotTime 10-353 MPDS[i] >result 7-145
LOG >StopFF 10-353 MPDS[i] >vmmode 7-145
LOG >SystemMsgToEventLog 10-346 MPUVM[i] >getname 7-151
LOG >TesterID 10-354
N
LOG >TestInProgress 10-361
Nomenclature 1-30
LOG >UploadDataPath 10-354
LOG >UserGenDatalog 10-362 O
LOG >UserGenHistogram 10-362 Octal 7-133
LOG >UserGenSummary 10-363 offset DAC 7-148
LOG >UserGenTDA 10-363 Opcodes 8-208
LOG >UsingCustomDataDLL 10-354 Operator safety 2-38
LOG >UsingDeviceHandler 10-354
LOG >WaferDescFileName 10-354 P
LOG >WafermapColorsFileName 10-355 Pattern Control 8-205
LOG >WafermapDescFileName 10-355 Power
LOG >WaferMapX 10-355 AC 3-50
LOG >WaferMapY 10-355 Precision Waveform Digitizer 9-336
LOG >WaferNumber 10-355 Precision Waveform Source 9-320
LOG >WaferTestFlow 10-356 Production view 6-108
PWDx -> clock 9-340
M PWDx -> clock_div 9-340
Maintenance personnel safety 2-38 PWDx -> clock_reset 9-340
Measure 7-140, 7-170 PWDx -> clockselect 9-341
MP administrative commands 7-139 PWDx -> dds_reset 9-340
MP current ranges 7-137 PWDx -> dds_setup 9-339
PWDx -> filter 9-343 RMX0 >Clear 7-178

PWDx -> gain 9-343 RMX0 >CreateNamedConnection 7-179
PWDx -> input_con 9-339 RMX0 >GetLineStatus 7-180
PWDx -> input_discon 9-339 RMX0 >GetLineToLineStatus 7-180
PWDx -> instr_con 9-338 RMX0 >GetPinStatus 7-180
PWDx -> instr_discon 9-339 RMX0 >NClear 7-180
PWDx -> offset 9-343 RMX0 >NSet 7-181
PWDx -> read_wd2000_dc 9-343 RMX0 >resetall 7-181
PWDx -> reset 9-341 RMX0 >resetline 7-181
PWDx -> start 9-342 RMX0 >ResetNamedList 7-181
PWDx -> stop 9-342 RMX0 >Set 7-181
PWDx -> wait 9-342
S
PWSx -> atten 9-327
Safety 2-37
PWSx -> clock 9-325
Maintenance personnel 2-38
PWSx -> clock_reset 9-325 Operator 2-38
PWSx -> con 9-322 SEQ0->createpatmap 8-248
PWSx -> con_to_agnd 9-323 SEQ0->cycle_count 8-245
PWSx -> con_to_cal_bus 9-322 SEQ0->dcap_setup 8-251
PWSx -> con_to_ic 9-323 SEQ0->dfail 8-245
PWSx -> con_to_l1 9-322 SEQ0->dflags 8-244
PWSx -> con_to_switch_bus 9-322 SEQ0->dt0div 8-243
PWSx -> dds_reset 9-324 SEQ0->dt0t 8-243
PWSx -> dds_setup 9-324 SEQ0->dwait 8-244
PWSx -> discon 9-323 SEQ0->get_wait_timeout 8-246
PWSx -> discon_from_agnd 9-324 SEQ0->getsym 8-251
PWSx -> discon_from_cal_bus 9-323 SEQ0->keepalive_timeset 8-244
PWSx -> discon_from_ic 9-324 SEQ0->MasterSlave 8-242
PWSx -> discon_from_l1 9-324 SEQ0->mclk_sel 8-242
PWSx -> discon_from_switch_bus 9-323 SEQ0->patexe 8-249
PWSx -> filter 9-326 SEQ0->patexe_array 8-250
PWSx -> init 9-328 SEQ0->patexe_parallel 8-251
PWSx -> offset 9-326 SEQ0->patload 8-248
PWSx -> reset 9-328 SEQ0->patload_parallel 8-249
PWSx -> setv 9-327 SEQ0->patload_pformat 8-249
PWSx -> xclockinfreq 9-325 SEQ0->patloadmap 8-247
PWSx -> xclockoutfreq 9-325 SEQ0->running 8-244
R SEQ0->set_wait_timeout 8-246
Radiation 2-43 SEQ0->SetMode 8-241
Relay Matrix Board 7-174 SEQ0->SetSiteMode 8-241
RMX 7-174 SEQ0->SetupMCLK 8-243
RMX commands 7-177 SEQ0->status 8-245
RMX I/O pinout 7-183 Setup File Tool 6-92
Summaries 6-104, 6-124
378 PN: 73-01003-00, November 2008

T Waveform Source Connections 9-313

TConnection -> con 7-185 WD 9-329
TConnection -> discon 7-186 WD -> pllbits 9-332
TConnection Constructor 7-184 WD->clock 9-331
TDA 6-124 WD->filter 9-334
Test Configuration tool 4-69 WD->gain 9-334
Test head power 4-69 WD->hfadc 9-335
Test Statistics view 6-109 WD->init 9-332
Testing 1-35 WD->lfadc 9-334
Time Measurement Unit 8-287 WD->offset 9-333
Timing diagrams 8-219 WD->reset 9-332
TLOG 10-345 WD->start 9-331
TMU 8-287 WD->xclkinfreq 9-333
TMU >ddchan 8-291 WD->xclkoutfreq 9-333
TMU >enable 8-292 WS 9-312
TMU >freq 8-292 WS -> xclkinfreq () 9-316
TMU >input 8-292 WS I/O Pinout 9-314
TMU >interval 8-293 WS->atten 9-318
TMU >level 8-293 WS->clock 9-315
TMU >meas 8-293 WS->filter 9-317
TMU >meas_array 8-294 WS->init 9-315
TMU >meas_neg 8-294 WS->offset 9-317
TMU >reset 8-294 WS->pllbits 9-316
TMU Commands 8-291 WS->reset 9-316
TMU I/O Pinout 8-289 WS->start 9-315
LOG->test_fail 10-359 WS->store_ramp20bit 9-319
TRelay -> close 7-184 WS->store_sine16bit_hs 9-319
TRelay -> open 7-184 WS->store_sine20bit 9-318
TRelay Constructor 7-183 WS->store_wave20bit 9-318
WS->xclkoutfreq 9-317
U WS2000 9-312
User Voltmeter 7-147
UVM 7-147
V
Vector 8-207
void TlogicAnalyzer::Run() 8-264
Voltage ranges 7-136, 7-167
W
Warnings 1-31, 2-37
Waveform Digitizer 9-329
Waveform Digitizer Hypertronics Pinout 9-331
Waveform Source 9-312
380 PN: 73-01003-00, November 2008

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System Software 5.0.

Programming and Operations

KVD Company Confidential

Legal and Copyright Notice:

Copyright © December, 2011, KVD Company, Inc.. All rights reserved.

If you have any comments on this document, email service@kvdco.com

For software bug reports and feature requests, email bugs@kvdco.com

KVD Company, Incorporated

KVD Company Confidential

2. Safety and Regulatory Summary

DC Power Control and Flow ................................................................................................ 52

4 PN: 73-01003-00, November 2008

Production Operator's Interface ........................................................................................ 107

6 PN: 73-01003-00, November 2008

MPDCMOD Objects..................................................................................................... 135

User Voltmeter (UVM) ...................................................................................................... 147

8 PN: 73-01003-00, November 2008

short TQUVMMeasClass::calbushi(short con_discon)................................................ 159

void TQUVMRefClass::SetSiteMode(bool _sitemode, short site[]).............................. 162

10 PN: 73-01003-00, November 2008

HPDS[i]->loopcomp(fast-slow) .............................................................................. 170

12 PN: 73-01003-00, November 2008

At Least One Time (Location of Your Choice) ............................................................... 215

DMCH[x]->dig_discon ........................................................................................... 230

14 PN: 73-01003-00, November 2008

SEQ0->get_wait_timeout ...................................................................................... 246

Printing and Saving a Margin Shmoo ........................................................................... 273

16 PN: 73-01003-00, November 2008

Direct Digital Synthesis.......................................................................................... 310

PWSx -> xclockinfreq ............................................................................................ 325

18 PN: 73-01003-00, November 2008

PWD General Syntax .................................................................................................. 341

10. Non-Instrument Software Commands

LOG->LotNumber ................................................................................................. 351

20 PN: 73-01003-00, November 2008

Detailed Specifications 369

Release Notes and Updates 371

Custom Father Cards 373

22 PN: 73-01003-00, November 2008

1. Introduction and Overview

2. Safety and Regulatory Summary

Figure 3.20:M1 Test Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

24 PN: 73-01003-00, November 2008

Figure 6.21:Saved Setup File Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Figure 7.1: MPDCMOD Pictorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

26 PN: 73-01003-00, November 2008

Figure 8.32:SHOW CHANS Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

10. Non-Instrument Software Commands

28 PN: 73-01003-00, November 2008

1. Introduction and Overview

About this Document

Where to Look for Online Help and Tools

Figure 1.1: KVD Tools (Programming)

Programming and Operations Introduction and Overview

Here are some Debugging Tools:

Figure 1.2: KVD Tools (Debugging)

30 PN: 73-01003-00, December 2011

Introduction and Overview Warnings and Cautions

Warnings and Cautions

Programming and Operations Introduction and Overview

Figure 1.3: M2 System

32 PN: 73-01003-00, December 2011

Introduction and Overview System Overview

Figure 1.4: M2m Cabinet and Manipulator