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IIT GUWAHATI
OUTLINE
INTRODUCTION
MOORE’S LAW AND TRANSISTOR SCALING
WHY HIGH-K DIELECTRICS?
APPLICATIONS IN MICROELECTRONICS
HIGH-K DIELECTRICS IN DRAMS
HIGH-K GATE DIELECTRICS
SUMMARY
•Transistor
physical
gate length
will reach
~15nm
before
end of this
decade, and
~10nm early
next decade
Sio2 High-k
Capacitance 1* 1.6*
Leakage 1* < 0.01*
HIGH-K DIELECTRICS IN MICROELECTONICS
APPLICATIONS IN MICROELECTRONICS
HIGH-K GATE STACKS
TRANSISTOR
A simple switch
Current flows source to
drain when a certain
Voltage is applied on
The gate, otherwise
Doesn’t flow.
Interface quality
Permittivity and band gap
Thermodynamic stability
Compatibility with the current or expected materials
to be used in processing for CMOS devices
Reliability
Pre/post-deposition
annealing
O2 and N2 annealing
etc.
High-k deposition
ALD,CVD etc.
Gate electrode
metal gates, poly-silicon
gates etc.
HIGH-K DIELECTRICS IN MICROELECTRONICS
APPLICATIONS IN MICROELECTRONICS
HIGH-K GATE STACKS
GATE ELECTRODE
PROBLEMS WHEN SiO2 IS REPLACED WITH HIGH-K
SOLUTION-METAL GATE
WHAT IS DRAM?
DRAM is a type of
random access
memory that stores
each bit of data in a
separate capacitor.
Cross-section TEM
Image of a stacked-capacitor
Structure with a BST dielectric
Pt electrode and a TaSiN
barrier layer.
Minimum feature size=0.2um
Dielectric thickness=27 nm
Processing methods
Film composition
Crystalline structure
Microstructure
Surface morphology
Film thickness
Main Points
Process Integration
MOCVD
BST deposition techniques
rf-sputtering
Main techniques
2. Cheol Seong Hwang” (Ba,Sr)TiO3 thin films for ultra large scale dynamic
random access memory. A review on the process integration”.(1998)
5. Ofer Sneh*, Robert B.Clark-Phelps, Ana R.Londer gan, Jereld Winkler, Thomas
E.Seidel” Thin film atomic layer deposition equipment for semiconductor
processing”(2002).