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PAKISTAN NAVY ENGINEERING COLLEGE, NATIONAL UNIVERSITY OF SCIENCES AND TECHNOLOGY, KARACHI PNEC NUST

UNIVERSITY OF SCIENCES AND TECHNOLOGY, KARACHI PNEC NUST LAB MANUAL BASIC ELECTRONICS EE-212 PNEC, PNS JUAHER,

LAB MANUAL

OF SCIENCES AND TECHNOLOGY, KARACHI PNEC NUST LAB MANUAL BASIC ELECTRONICS EE-212 PNEC, PNS JUAHER, HABIB

BASIC ELECTRONICS

EE-212

PNEC, PNS JUAHER, HABIB REHMATULLAH ROAD, KARACHI 75350

LIST OF EXPERIMENTS

EXP#

NAME OF EXPERIMENT

WEEK

01

Introduction to Lab Equipment

01

02

Junction Diode Characteristics

02

03

Zener diode characteristics

03

04

Half wave Rectification

04

05

Full wave Rectification (center tapped transformer)

05

06

Full wave Rectification ( Bridge configuration)

06

07

BJT characteristic curves

07

08

Voltage divider biasing

08

09

Common Emitter transistor amplifier

09

10

Common Base amplifier

10

11

Common Collector amplifier

11

12

Characteristic curves of JFETs

12

13

Common Source amplifier

13

14

Common Drain amplifier

14

15

Common Gate amplifier

15

EXPERIMENT # 01

INTRODUCTION TO MEASURING INSTRUMENTS

OBJECTIVES:

To familiarize the students with the use of measuring instruments.

EQUIPMENTS/COMPONENTS:

Power supply, Multimeter, Function Generator and Oscilloscope.

PROCEDURE:

Power supply: -

A power supply (sometimes known as a power supply unit or PSU) is a device or system

that supplies electrical or other types of energy to an output load or group of loads. The term is most

commonly applied to electrical energy supplies, less often to mechanical ones, and rarely to others

Multimeter:-

A multimeter or a multitester is an electronic measuring instrument that combines several

functions in one unit. The most basic instruments include an ammeter, voltmeter, and ohmmeter. Analog

multimeters are sometimes referred to as "volt-ohm-meters", abbreviated VOM. Digital multimeters are usually referred to as "digital- multi- meters", abbreviated DMM.

Function Generator:-

A function generator is a piece of electronic test equipment used to generate electrical

waveforms. These waveforms can be either repetitive or single - shot (once only) in which case s ome kind of triggering source is required (internal or external). The resultant waveforms can be applied to a device under test and analyzed as they progress through the device, confirming the proper operation of the device or pinpointing a fault in it.

Oscilloscope:-

An oscilloscope (sometimes abbreviated CRO, for cathode-ray oscilloscope, or commonly just scope or O - scope) is a piece of electronic test equipment that allows signal voltages to be viewed,

usually as a two-dimensional graph of one or more electrical potential differences (vertical axis) plotted as a function of time or of some other voltage (horizontal axis).

EXPERIMENT # 02

Characteristic Curve of a Semiconductor Diode.

OBJECTIVES:

To

resistance.

EQUIPMENTS/COMPONENTS:

Semiconductor diode, resistor, power supply, multimeter. PROCEDURE:

In this lab, it is required to experimentally observe the behavior of the diode in case of forward and reverse biasing and plot its characteristic curve.

internal

experimentally

plot

the

characteristic

curve

of

a

semiconductor

diode

and

calculate

its

1. For forward biasing, refer to the circuit shown in Fig. 1. Increase the power supply V and observe the voltage drop across the diode, (V d ) and the current flowing through the diode, I d . Tabulate your results as shown in Table 1.

2. For reverse biasing, refer to the circuit shown in Fig. 2. Repeat the same procedure and tabulate your results as shown in Table 2.

3. Using the observations recorded in Table 1 and 2 plot V d verses I d and write your comments.

4. You are also required to calculate the internal resistance of the diode and compare it with the one given in the data sheet.

 

Table 1

 

Sr.

V

V d

I

d

No.

(Volts)

(Volts)

(mA)

1

0.1

   

2

0.2

   

3

0.3

   

4

0.4

   

5

0.5

   

6

0.6

   

7

0.7

   

8

0.8

   

9

0.9

   

10

1.0

   

11

2.0

   

12

3.0

   

13

4.0

   

14

5.0

   

10.0

   
D1 R=100Ω
D1
R=100Ω

V

Figure 1

 

Table 2

 

Sr.

V

V d

I

d

No.

(Volts)

(Volts)

(μA)

1

1

   

2

2

   

3

5

   

4

10

   

5

20

   

6

30

   
D1 R=100Ω
D1
R=100Ω

Figure 2

EXPERIMENT # 03

Zener Diode Characteristics and Application

Objective:

To experimentally observe the characteristics curve of a Zener diode. To analyze the basic Zener based voltage regulator.# 03 Zener Diode Characteristics and Application Objective: Equipments/Components: Multimeter DC supply Resistors Zener

Equipments/Components:

Multimeter

DC supply

Resistors

Zener Diode

Lab measurements:

1. Construct the circuit shown in figure 1. Measure and record the value of V z and I z for each increment of voltage Vs in Table 1.

2. Construct the circuit shown in figure 21. Measure and record the value of V z and I z for each increment of voltage Vs in Table 2.

3. Draw the characteristics curve of Zener diode in forward and reverse region and calculate R z . You can observe that V z is not exactly constant. This shall enable you to calculate the internal resistance R z of Zener diode.

4. From table 2, estimate the Zener test current I Z-Test which is the current that brings the Zener diode in breakdown region.

5. Design of a loaded Zener regulator. Refer to the loaded Zener regulator circuit shown in Fig3.

Let a 1k load be driven by Zener diode. Let us assume that the input supply Vs has a voltage fluctuation from 1.5V z to 5V z . The objective of this design is to provide the load with constant supply V z even though the input voltage fluctuate from 1.5V z to 5V z. in order to meet this objective, it is necessary that the Zener diode works in the breakdown region when the input fluctuates between 1.5V z to 5V z. To achieve this objective, we have to ensure that I Z-Test flows through the Zener diode when V is between1.5V z to 5V z . Let I L be the load current. Therefore

the current flows through R s when

current. Therefore the current flows through R s when V s = 1.5 V Z will

V s = 1.5 V Z will be

I s = I Z-Test + I L

R s = 1.5V z V z

I

s

The value of Rs will ensure that the Zener will be in breakdown region when supply is 1.5V z . It is trivial to note that Zener will be in breakdown if Vs >1.5V z . Change the input from 0.5V z to 5V z and

Observations:

S.No.

V

s

V

z

I

z

1

0.1

   

2

0.2

   

3

0.3

   

4

0.4

   

5

0.5

   

6

0.6

   

7

0.7

   

8

0.8

   

9

0.9

   

10

1.0

   

11

2.0

   

12

3.0

   

13

4.0

   

14

5.0

   

15

10.0

   

Table 1

S.No.

V

s

V

z

I

z

 

1 0.5

   
 

2 1.0

   
 

3 1.5

   
 

4 2.0

   
 

5 3.0

   
 

6 4.0

   
 

7 5.0

   
 

8 6.0

   
 

9 7.0

   
 

10 8.0

   
 

11 9.0

   
 

12 10.0

   
 

13 11.0

   
 

14 12.0

   
 

15 13.0

   

Table 2

S.No.

V

s

V L (V)

Is (mA)

L (mA)

I

I z (mA)

 

1 0.5

V z

       
 

2 0.8

V z

       
 

3 0.9

V z

       
 

4 1.0

V z

       
 

5 1.5

V z

       
 

6 2.0

V z

       
 

7 2.5

V z

       
 

8 3.0

V z

       
 

9 3.5

V z

       
 

10 4.0

V z

       
 

11 4.5

V z

       

Table 3

Comments and result:

Write down your comments on reading obtained from table 1, 2 and 3. Why the load voltage V L doesn‟t remains constant even though the Zener diode is in breakdown region.

voltage V L doesn‟t remains constant even though the Zener diode is in breakdown region. Figure1

Figure1

voltage V L doesn‟t remains constant even though the Zener diode is in breakdown region. Figure1

Figure2

voltage V L doesn‟t remains constant even though the Zener diode is in breakdown region. Figure1

Figure 3

Experiment 04

HALF WAVE RECTIFIER

Objective - To obtain the load regulation and ripple factor of a half-rectifier. 1. with Filter 2. without Filter

APPARATUS:-

Experimental Board Multimeters –2No‟s.

Transformer (12-0-12). Diode, 1N 4007 Capacitor 100μf.

Resistor

Connecting wires

1KΩ.

THEORY: - During positive half- cycle of the input voltage, the diode D1 is in forward bias and conducts through the load resistor R1. Hence the current produces an output voltage across the load resistor R1, which has the same shape as the +ve half cycle of the input voltage. During the negative half- cycle of the input voltage, the diode is reversing biased and there is no current

through the circuit. i.e, the voltage across R1 is zero. The ne t result is that only the +ve half cycle of the input voltage appears across the load. The average value of the half wave rectified o/p voltage is the value measured on dc voltmeter. For practical circuits, transformer coupling is usually provided for two reasons.

1. The voltage can be stepped- up or stepped- down, as needed.

2.

ac secondary circuit. CIRCUIT DIAGRAM:-

source

The

is

electrically isolated

from the

rectifier.

Without Filter:

Thus

preventing shock

hazards

in

the

DIAGRAM:- source The is electrically isolated from the rectifier. Without Filter: Thus preventing shock hazards in

With Filter:

With Filter: PROCEDURE:- 1. Connections are made as per the circuit diagram. 2. Connect the primary

PROCEDURE:-

1. Connections are made as per the circuit diagram.

2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input.

3. By the multimeter, measure the ac input voltage of the rectifier and, ac and dc vo ltage at the output of

the rectifier.

4. Find the theoretical of dc voltage by using the formula,

Vdc=Vm/П

Where, Vm=2Vrms, (Vrms=output ac voltage.)

5. The Ripple factor is calculated by using the formula r=ac output voltage/dc output voltage.

REGULATION CHARACTERSTICS:-

1. Connections are made as per the circuit diagram.

2. By increasing the value of the rheostat, the voltage across the load and current flowing through the

load are measured.

3. The reading is tabulated.

4. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and IL on y-axis

5. From the value of no - load voltages, the %regulation is calculated using the formula,

Theoretical calculations for Ripple factor:-

Without Filter:-

Vrms=Vm/2

Vm=2Vrms

Vdc=Vm/П

Ripple factor r=√ (Vrms/ Vdc) 2 -1 =1.21

With Filter:-

Ripple factor, r=1/ (2√3 f C R)

Where

f =50Hz

C =100µF

RL=1KΩ

PRACTICAL CALCULATIONS:-

Vac=

Vdc=

Ripple factor without Filter = Ripple factor with Filter =

OBSERVATIONS:-

WITHOUT FILTER

 

USING

V

ac (v)

V

dc (v)

r= V ac /V dc

DMM

   

WITH FILTER

 
 

USING

V

ac (v)

V

dc (v)

r= V ac /V dc

DMM

   

WITHOUTFILTER:-

Vdc=Vm/П,

Vrms=Vm/2,

Vac=√ ( Vrms2- Vdc 2)

 
 

V

m (v)

V

ac (v)

 

V dc (v)

r= V ac /V dc

 

USING

       

CRO

WITH FILTER

 
 

V

1 (V)

V

2 (V)

V dc =

V ac =

r=

USING

   

(V 1 +V 2 )/2

(V 1- V 2 )/2√3

V ac /V dc

CRO

         

PRECAUTIONS:

1. The primary and secondary sides of the transformer should be carefully identified.

2. The polarities of the diode should be carefully identified.

3. While determining the % regulation, first Full load should be applied and then it should be

decremented in steps.

RESULT:-

1. The Ripple factor for the Half- Wave Rectifier with and without filters is measured.

2. The % regulation of the Half- Wave rectifier is calculated.

Experiment 05

FULL WAVE RECTIFIER

Objective:-

To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter.

APPARATUS:-

Experimental Board

Transformer (6-0-6v). P-n Diodes, (lN4007) ---2 No‟s

Multimeters

Filter Capacitor (100μF/25v) -

Connecting Wires Load resistor, 1KΩ

–2No‟s

THEORY:-

The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During positive half cycle of secondary voltage (input voltage), the diode D1 is forward biased and D2is reverse biased. The diode D1 conducts and current flows through load resistor RL. During negative half cycle, diode D2 becomes forward biased and D1 reverse biased. Now, D2 conducts and current flows through the load resistor RL in the same direction. There is a continuous current flow through the load resist or RL, during both the half cycles and will get unidirectional current as show in the model graph. The difference between full wave and half wave rectification is that a full wave rectifier allows unidirectional (one way) current to the load during the entire 360 degrees of the input signal and half-wave rectifier allows this only during one half cycle (180 degree).

CIRCUIT DIAGRAM:-

Without Filter:

signal and half-wave rectifier allows this only during one half cycle (180 degree). CIRCUIT DIAGRAM:- Without

With Filter

:

With Filter : PROCEDURE: 1. Connections are made as per the circuit diagram. 2. Connect the

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Connect the ac mains to the primary side of the transformer and the secondary side to the rectifier.

3. Measure the ac voltage at the input side of the rectifier.

4. Measure both ac and dc voltages at the output side the rectifier.

5. Find the theoretical value of the dc voltage by using the formula Vdc=2Vm/П

6. Connect the filter capacitor across the load resistor and measure the values of Vac and Vdc at the

output.

7. The theoretical values of Ripple factors with and without capacitor are calculated.

8. From the values of Vac and Vdc practical values of Ripple factors are calculated. The practical values

are compared with theoretical values.

THEORITICAL CALCULATIONS:-

Vrms = Vm/ √2 Vm =Vrms√2

Vdc=2Vm/П

(i)Without filter:

Ripple factor, r = √ ( Vrms/ Vdc )2 -1 = 0.482

(ii)With filter:

Ripple factor, r = 1/ (4√3 f C RL)

PRACTICAL CALCULATIONS:

Without filter:- Vac= Vdc= Ripple factor, r=Vac/Vdc

where

f =50Hz

C =100µF

RL=1KΩ

With filters:-

Vac=

Vdc=

Ripple factor=Vac/Vdc

Without Filter:

USING V ac (v) V dc (v) r= V ac /V dc DMM With Filter
USING
V
ac (v)
V
dc (v)
r= V ac /V dc
DMM
With Filter
USING
V
ac (v)
V
dc (v)
r= V ac /V dc
DMM
Without Filter
Vrms = Vm/ √2
,
Vdc=2Vm/П ,Vac=√( Vrms2- Vdc 2)
V m (v)
V ac (v)
V dc (v)
r= V ac /V dc
USING
CRO
With Filter
V 1 (V)
V 2 (V)
V dc =
V
r=
ac =
USINGCRO
(V 1 +V 2 )/2
(V 1-
V ac /V dc
V
2 )/2√3

PRECAUTIONS:

1. The primary and secondary side of the transformer should be carefully identified

2. The polarities of all the diodes should be carefully identified.

RESULT:-

The ripple factor of the Full- wave rectifier (with filter and without filter) is calculated.

EXPERIMENT # 06

Full Wave Rectifier using Bridge configuration

Objective:

To experimentally analyze a full wave rectifier circuit using bridge configuration

Equipment’s/Components:

Semiconductor diodes Multi-meter Transformer Resistor = 1kΩ Oscilloscope

Procedure:

1. Connect the transformer to 220V mains supply and observe the voltages across terminals A, B and C as shown in figure 1, 2 and 3 using oscilloscope and multi- meter.

2. Next, analyze the behaviour of the full wave rectifier. Connect the circuit as shown in figure 4. Using oscilloscope, observe the voltage across R L .

3. Measure the DC voltage across R L using multi-meter. Theoretically, calculate the DC voltage using following equation and compare it with your observed reading:

V DC = 0.636 (V P 2V D )

-----------------

(1)

Note: V P is the peak voltage at the secondary of the transformer and V D is the forward drop of the diode.

voltage

4. Disconnect D 1 from the circuit and observe V L . Connect D 1 back to its respective position and disconnect D 2 .Observe V L . Repeat the same procedure for D 3 and D 4 .

EXPERIMENT # 07

BJT as a Switch

OBJECTIVE:

EXPERIMENT # 07 BJT as a Switch OBJECTIVE: To theoretically and experimentally analyze the use of

To theoretically and experimentally analyze the use of BJT as a switch.

Equipments/Components:

Multimeter Transistor Resistors LED DC power supplies Function generator Oscilloscope

Lab Measurement:

Figure 1 shows a simple BJT switch that is used to drive an LED. Estimate the DC current gain, β d c of the BJT using DMM. By forward biasing the LED, estimate the β dc of the BJT using DMM. By forward biasing the LED, estimate the forward voltage drop, V FLED of the LED. Usually this value is between 1.5V to 3V.

Suppose our design requirement is to operate the BJT as a switch such that a current of 10mA flows through the LED when the switch is ON, i.e. I C ( S A T ) =10mA when the BJT is in saturation. Using (1), C(SAT) =10mA when the BJT is in saturation. Using (1), we can calculate the value of R C that will enable a current of 10mA to flow through the LED when the BJT is in saturation, i.e. when V CE = 0V.

when the BJT is in saturation, i.e. when V C E = 0V. V CC I
when the BJT is in saturation, i.e. when V C E = 0V. V CC I
when the BJT is in saturation, i.e. when V C E = 0V. V CC I

VCC I C RC VFLED VCE

(1)

The required base current to get 10mA saturation current can be estimated using (2).when V C E = 0V. V CC I C R C VF LED V CE

I

(

B SAT

)

(2)saturation current can be estimated using (2). I ( B SAT ) Practically it is better

Practically it is better to keep the base current a bit high. This is called „ hard saturation’ . Let the hard saturation current be represented by I B ( S hard saturation’ . Let the hard saturation current be represented by I B(SAT-HARD) . For example I B(SAT-HARD) can be 2 times I B(SAT) . This ensures that the base current is high enough to keep the transistor in saturation. The required value of R B to pump I B(SAT-HARD) into the base of the transistor can be calculated using (3).

R B

V

BB

of the transistor can be calculated using (3). R B V BB V BE I B

V

BE

the transistor can be calculated using (3). R B V BB V BE I B (

I

the transistor can be calculated using (3). R B V BB V BE I B (

B ( SAT HARD )

(3)

Construct the circuit as shown in Fig. 1 with the calculated values of R C and R B . Now apply a timer input (0 and 5V level) from C and R B . Now apply a timer input (0 and 5V level) from function generator at base and observe the blinking of LED. Also observe the input and output on oscilloscope at dual mode. We can observe that when V in = 0V V out = V cc (ON State) and when V in = 5V ,V out = 0V (OFF State).

Figure 1

Figure 1

EXPERIMENT # 08

Voltage Divider Bias using BJT

Objective:

To experimentally analyze a BJT Voltage Divider Bias (VDB) circuit

To appreciate the fact that a VDB is quiet insensitive to variation in transistor‟s DC current gain

Equipments/Components:

Multi-meter

DC supply

Resistors

Transistor (2SC828)

Lab measurements:

1.

Refer to the VDB circuit in Figure 1 . The circuit parameters are as follows:

a. I E

DC emitter current.

b. V CE

Voltage at collector w.r.t. emitter (DC)

c. V BE

Voltage at base w.r.t. emitter

(DC)

d. V B

Voltage at base w.r.t. ground

(DC)

e. V E

Voltage at emitter w.r.t. ground (DC)

f. R C

,R L

,R E

Collector resistance, load resistance, emitter resistance

g. β dc

DC current gain of the transistor

h. R 1 and

R 2

Resistances of voltage divider network

i. V CC

Power supply

2.

3.

4.

Experimentally evaluate the DC current gain, β dc of the BJT.

Using equation (1), calculate R E such that R IN(base) > 10 R 2 where R IN(base) is the input impedance of the base.

R IN(base) = β dc R E

-------------------- (1)

Using equation (2), calculate the value of R C such that the saturation current is around 10mA.

I C (sat) = V CC / (R C + R E ) --------------- (2)

5.

Suppose our requirement is to set the collector current at 5mA. Using the follo wing equations,

calculate

the value of R 1 to appropriately bias the circuit:

V E = I E R E ------------------------------ (3)

V B = V BE + V E ------------------------- (4)

V B = (R 2 / (R 1

+ R 2 )) . V CC --------- (5)

7.

Draw the load line of the circuit and locate the Q point (V CE , I C ) on the load line.

8. Replace the 2SC828 used with a few other samples of the same transistor. You will notice there is no significant change in the Q point despite the fact that there will be noticeable variation in β dc of the transistors. This explains the fact that the Q point of a VDB is immune to variations in the transistor‟s β dc .

explains the fact that the Q – point of a VDB is immune to variations in

Figure 1

EXPERIMENT # 9

Design and Analysis of a Common Emitter Amplifier

OBJECTIVE:-

and Analysis of a Common Emitter Amplifier OBJECTIVE:- To study Common Emitter Amplifier. EQUIPMENT:- 1. Breadboard

To study Common Emitter Amplifier.

EQUIPMENT:-

1. Breadboard

2. Power Supply

3. Digital Multimeter (DMM)

4. Oscilloscope with probes

5. Function Generator with probe

6. Resistors: 2.2kΩ, 10kΩ, 3.3kΩ, 1kΩ, 1.2kΩ

7. Capacitors: 1µF (2), 470µF

8. Transistor: 2N3904

THEORY:-

The CE configuration is the most widely used of all BJT amplifier circuits. To establish a signal ground at the emitter, a large capacitor C E is connected between emitter and ground. This capacitor is required to provide a very low impedance to ground ideally zero. C E acts as a bypass capacitor. The lower the signal frequency the less effective the bypass capacitor becomes. The CE amplifiers are used for large voltage gain. The CE configuration is the best suited for realizing the bulk of the gain required in an amplifier. Depending on the magnitude of gain required, either a single stage or a cascade of two or three stages can be used.

Voltage Gain

The voltage gain is the ratio of ac output voltage to ac input voltage.

A v = υ o in

Current Gain The current gain from base to collector is I c /I b or β. However, the overall current gain is A i = ί o in

Power Gain

The power gain is the product of the overall voltage gain and the current gain.

A p = A v * A i

CIRCUIT DIAGRAM:-

V1

VCC 15V R7 3.3kΩ R1 100kΩ C3 Q1 C1 10µF 10µF 2N3904 C2 10mVrms R2
VCC
15V
R7
3.3kΩ
R1
100kΩ
C3
Q1
C1
10µF
10µF
2N3904
C2
10mVrms
R2
10kHz
10µF
10kΩ
R4
330Ω

FORMULAE:-

Figure 1

DC Analysis:

V

V

BE = 0.7V

T = 25mV

V

B = [R B2 / (R B1 +R B2 )] * V CC

V E = V B V BE

I E = V E / R E ≈ I C

I B = I C / β

V

V

V

C = V CC I C R C

CE = V C - V E

CB = V CE - V BE

r π = βV T / I C

r e = αV T / I C

g m = I C /V T

R3

10kΩ

Gain

without R L :

Av =

- g m R C

Gain

with R L :

A V = - g m (R C ║R L )

Input Resistance:

R i = R B ║r π

Current Gain:

A i = ί c / ί b = β

Power Gain:

A P = A i * A V

Output Resistance:

R o = R C ║r O ≈ R C

PROCEDURE AND OBSERVATION:-

1. Construct the circuit as shown in figure 1.

2. Set the power supply voltage to 15V.

3. Perform DC analysis and complete table 1.

4. Apply AC signal from function generator.

5. Calculate and measure the gain to record in observation table 2.

TABLE 1

S. No.

PARAMETERS

CALCULATED

MEASURED

1

 

Β

   

2

V

CE

   

3

V

CB

   

4

I

C

   

5

I

B

   

6

I

E

   

7

V

C

   

8

V

B

   

9

V

E

   

TABLE 2

S.No.

Voltage Gain

Calculated

Measured

Without R L

With R L

Without R L

With R L

1

A V

       

EXPERIMENT # 10

Analysis of a Common Collector Amplifier

OBJECTIVE:-

# 10 Analysis of a Common Collector Amplifier OBJECTIVE:- To study Common Collector Amplifier. EQUIPMENT:- 1.

To study Common Collector Amplifier.

EQUIPMENT:-

1. Breadboard

2. Power Supply

3. Digital Multimeter (DMM)

4. Oscilloscope with probes

5. Function Generator with probe

6. Resistors: 47kΩ, 5.6kΩ, 560Ω, 1kΩ

7. Capacitors: 10µF (2)

8. Transistor: 2N3904

THEORY:-

The common- collector (CC) amplifier is usually referred to as an emitter - follower. The input is applied to the base through a coupling capacitor, and the output is at the emitter. The voltage gain of a CC amplifier is approximately 1, and its main advantages are its high input resistance and current gain. The CE configuration finds application as a voltage buffer for connecting a high resistance source to a low resistance load.

CIRCUIT DIAGRAM:-

VCC 15V R1 100kΩ Q1 C1 V1 10µF 2N3904 25mVrms C2 10kHz 0° R2 R3
VCC
15V
R1
100kΩ
Q1
C1
V1
10µF
2N3904
25mVrms
C2
10kHz
R2
R3
10µF
10kΩ
560Ω
Figure 1

R4

10kΩ

FORMULAE:-

DC Analysis:

V

BE = 0.7V

V

T = 25mV

V B =

[R B2 / (R B1 +R B2 )] * V CC

V E = V B V BE

I E = V E / R E ≈ I C

I B = I C / β

V C = V CC I C R C

V CE = V C - V E

V CB = V CE - V BE

r π = βV T / I C

r e = αV T / I C

g m = I C /V T

Gain without R L :

A V = (βR E ) / (r π +(1+β)R E )

Gain with R L :

A V = β(R E ║R L ) / (r π +[(1+β)(R E ║R L )])

Input Resistance:

R i = R B ║[r π +(1+β) R E ]

Current Gain:

A i = ί e / ί b

Power Gain:

A P = A i * A V ≈ A i

Output Resistance:

R o ≈ r e +[(R sig ║R B )/(1+β)]

PROCEDURE AND OBSERVATION:-

1. Construct the circuit as shown in figure 1.

2. Set the power supply voltage to 10V.

3. Perform DC analysis and complete table 1.

4. Apply AC signal from function generator.

5. Calculate and measure the gain to record in observation table 2.

Table 1

S. No.

PARAMETERS

CALCULATED

MEASURED

1

 

Β

   

2

V

CE

   

3

V

CB

   

4

I

C

   

5

I

B

   

6

I

E

   

7

V

C

   

8

V

B

   

9

V

E

   

Table 2

S.No.

Voltage Gain

Calculated

Measured

Without R L

With R L

Without R L

With R L

1

A V

       

EXPERIMENT #11

Analysis of a Common Base Amplifier

OBJECTIVE:-

#11 Analysis of a Common Base Amplifier OBJECTIVE:- To study Common Base Amplifier. EQUIPMENT:- 9. Breadboard

To study Common Base Amplifier.

EQUIPMENT:-

9. Breadboard

10. Power Supply

11. Digital Multimeter (DMM)

12. Oscilloscope with probes

13. Function Generator with probe

14. Resistors: 47kΩ, 5.6kΩ, 560Ω, 4.7kΩ, 1kΩ

15. Capacitors: 10µF (3)

16. Transistor: 2N3904

THEORY:-

The common- base amplifier provides high voltage gain. Since it has a low input resistance r e this causes the input signal to be severely attenuated. In summary, the CB amplifier exhibits a very low input resistance, a short circuit current gain that is nearly unity α, an open circuit voltage gain and a relatively high output resistance. A very significant configuration of the CB circuit is as unity gain current amplifier or current buffer. It accepts an input signal current at low input resistance and delivers a nearly equal current at very high output resistance at the collector.

CIRCUIT DIAGRAM:-

resistance and delivers a nearly equal current at very high output resistance at the collector. CIRCUIT

Figure 1

FORMULAE:-

DC Analysis:

V BE = 0.7V , V T = 25mV

V B = [R B2 /

(R B1 +R B2 )] * V CC

V E = V B V BE

I E = V E / R E ≈ I C

I B = I C / β

V C = V CC I C R C

V CE = V C - V E

V CB = V CE - V BE

r π = βV T / I C

r e = αV T / I C

g m = I C /V T

Input Voltage υ in :

υ in = υ sig [r e /(r e +R sig )]

Gain without R L :

A V = g m R C

Gain with R L :

A V = g m (R C ║R L )

Input Resistance:

R i = r e

Current Gain: A i = ί e / ί b

Power Gain: A P = A i * A V ≈ A V

Output Resistance: R o = R C

PROCEDURE AND OBSERVATION:-

1. Construct the circuit as shown in figure 1.

2. Set the power supply voltage to 10V.

3. Perform DC analysis and complete table 1.

4. Apply AC signal from function generator.

5. Calculate and measure the gain to record in observation table 2.

Table 1

S. No.

PARAMETERS

CALCULATED

MEASURED

1

 

Β

   

2

V

CE

   

3

V

CB

   

4

I

C

   

5

I

B

   

6

I

E

   

7

V

C

   

8

V

B

   

9

V

E

   

Table 2

S.No.

Voltage Gain

Calculated

Measured

Without R L

With R L

Without R L

With R L

1

A V

       

EXPERIMENT# 12 FET CHARACTERISTICS

Objective: a). To draw the drain and transfer characteristics of a given FET. b). To find the drain resistance (r d ) amplification factor (μ) and Transonductance (g m ) of the given FET.

APPARATUS:

FET Regulated power supply Voltmeter (0-20V) Ammeter (0-100mA)

Resistors

100 Ώ

1No

 

560 Ώ

1No

THEORY:

A FET is a three terminal device, having the characteristics of high input impedance and less noise, the Gate to Source junction of the FET s always reverse biased. In response to small applied voltage from drain to source, the n-type bar acts as sample resistor, and the drain current increases linearly with V DS. With increase in I D the ohmic voltage drop between the source and the channel region reverse biases the junction and the conducting position of the channel begins to remain constant. The V DS at this instant is called “pinch of voltage”. If the gate to source voltage (V GS ) is applied in the direction to provide additional reverse bias, the pinch off voltage ill is de creased. In amplifier application, the FET is always used in the region beyond the pinch- off. F DS =I DSS (1-V GS /V P )^2

CIRCUIT DIAGRAM

CIRCUIT DIAGRAM PROCEDURE: 1. All the connections are made as per the circuit diagram. 2. To

PROCEDURE:

1. All the connections are made as per the circuit diagram.

2. To plot the drain characteristics, keep V GS constant at 0V.

3. Vary the V DD and observe the values of V DS and I D .

4. Repeat the above steps 2, 3 for different values of V GS at 1V and 3V.

5. All the readings are tabulated.

6. To plot the transfer characteristics, keep V DS constant at 1V.

7. Vary V GG and observe the values of V GS and I D .

8. Repeat steps 6 and 7 for different values of V DS at 1.5 V and 2V.

9. The readings are tabulated.

10. From drain characteristics, calculate the values of dynamic resistance (r d ) by using the formula r d = ∆V DS /∆I D

11. From transfer characteristics, calculate the value of transconductace (g m ) By using the formula G m= ∆I D /∆V DS

12. Amplification factor (μ) = dynamic resistance. Tran conductance

μ = ∆V DS /∆V GS

OBSERVATIONS:

DRAIN CHARACTERISTICS :

 

V

GS =0V

V

GS =1V

V

GS= 3V

S.NO

V

DS (V)

I

D (mA)

V

DS (V)

I

D (mA)

V

DS (V)

I

D (mA)

TRANSFER CHARACTERISTICS:

S.NO

V

DS =0.5V

 

V DS =1V

 

V DS =1.5V

 
 

V

GS (V)

I

D (mA)

V GS (V)

I

D (mA)

V GS (V)

I

D (mA)

MODELGRAPH:

TRANSFER CHARACTERISTICS

MODELGRAPH : TRANSFER CHARACTERISTICS DRAIN CHARACTERISTICS

DRAIN CHARACTERISTICS

MODELGRAPH : TRANSFER CHARACTERISTICS DRAIN CHARACTERISTICS

PRECAUTIONS:

1. The three terminals of the FET must be carefully identified

2. Practically FET contains four terminals, which are called source, drain, Gate, substrate.

3. Source and case should be short circuited.

4. Voltages exceeding the ratings of the FET should not be applied.

RESULT:

1. The drain and transfer characteristics of a given FET are drawn

2. The dynamic resistance (r d ), amplification factor (μ) and Tran conductance (g m ) of the given FET are calculated.

EXPERIMENT # 13

JFET Common Source Amplifier

Objective

The objective of this exercise is to examine common source JFET amplifiers. Both voltage gain and input impedance will be investigated.

Theory

In many regards, JFET amplifiers share similar attributes with their bipolar counterparts. Superficially, they look very similar as well. The main functional differences are that JFET based amplifiers tend to have higher input impedances but tend to offer lower voltage gains. Further, without swamping, JFET amplifiers tend to produce lower levels of distortion. As with r' e impacting bipolar circuit performance, JFET performance is impacted by the transconductance, g m . Like the bipolar common emitter amplifier, the common source amplifier exhibits a voltage gain greater than one with inversion.

Equipment

Dual Adjustable DC Power Supplya voltage gain greater than one with inversion. Equipment Digital Multimeter Dual Channel Oscilloscope Function

Digital Multimeterwith inversion. Equipment Dual Adjustable DC Power Supply Dual Channel Oscilloscope Function Generator Small signal

Dual Channel OscilloscopeEquipment Dual Adjustable DC Power Supply Digital Multimeter Function Generator Small signal JFET Resistors Schematic

Function GeneratorAdjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Small signal JFET Resistors Schematic Figure 16.1

Small signal JFETAdjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Resistors Schematic Figure 16.1

ResistorsDC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Schematic Figure 16.1

Schematic

Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Resistors Schematic Figure 16.1

Figure 16.1

Procedure

1. Consider the circuit of Figure 13.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs = 4.7 kΩ, Rd = 4.7 kΩ, Rload = 22 kΩ, Cin = Cout = 10 µF and Cs = 470 µF. Assuming V GS = -2 volts and g m = 2 mS, determine the theoretical gain and input impedance of the circuit and record these in Table 13.1.

2. Build the circuit of Figure 13.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs=4.7 kΩ, Rd = 4.7 kΩ, Rload = 22 kΩ, Cin = Cout = 10 µF and Cs = 470 µF. Set Vin to a 100 mV peak sine at 1 kHz. Measure the voltages at the gate and load, and record these in Table 13.1. Capture images of the input and gate voltages, and the gate and load voltages. Note whether or not the load is inverted compared to the gate signal.

3. Based on the measured gate and drain voltages, determine the resulting theoretical A v and Z in , and record these in Table 13.1. Note that Zin may be computed using the voltage divider rule or Ohm's law given the gate and input voltages along with the input resistor value. Also determine and record the percent deviations.

4. Repeat steps 1 through 3 for the remaining two JFETs.

Data Tables

JFET

A v Thry

Z

inThry

V g Exp

V dExp

A v Exp

Z

inExp

%Dev A v

%DevZ in

1

               

2

               

3

               

Table 13.1

EXPERIMENT #14

JFET Common Drain Amplifier

Objective

The objective of this exercise is to examine common drain (voltage follower) JFET amplifiers. Both voltage gain and input impedance will be investigated.

Theory

In many regards, JFET amplifiers share similar attributes with their bipolar counterparts. Superficially, they look very similar as well. The main functional differences are that JFET based amplifiers tend to have higher input impedances but tend to offer lower voltage gains. Further, without swamping, JFET amplifiers tend to produce lower levels of distortion. As with r' e impacting bipolar circuit performance, JFET performance is impacted by the transconductance, g m . The source follower, like the bipolar emitter follower, shows a voltage gain just under one with no inversion.

Equipment

Dual Adjustable DC Power Supplya voltage gain just under one with no inversion. Equipment Digital Multimeter Dual Channel Oscilloscope Function

Digital Multimeterwith no inversion. Equipment Dual Adjustable DC Power Supply Dual Channel Oscilloscope Function Generator Small signal

Dual Channel OscilloscopeEquipment Dual Adjustable DC Power Supply Digital Multimeter Function Generator Small signal JFET Resistors Schematic

Function GeneratorAdjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Small signal JFET Resistors Schematic Figure 14.1

Small signal JFETAdjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Resistors Schematic Figure 14.1

ResistorsDC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Schematic Figure 14.1

Schematic

Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Resistors Schematic Figure 14.1

Figure 14.1

Procedure

1. Consider the circuit of Figure 14.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs = 4.7 kΩ, Rload = 22 kΩ, Cin = 10 µF and Cout = 470 µF. Assuming V GS = -2 volts and g m = 2 mS, determine the theoretical gain and input impedance of the circuit and record these in Table 16.2.

2. Build the circuit of Figure 14.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs=4.7 kΩ, Rload = 22 kΩ, Cin = 10 µF and Cout = 470 µF. Set Vin to a 100 mV peak sine at 1 kHz. Measure the voltages at the gate and load, and record these in Table 16.2. Capture images of the input and gate voltages, and the gate and load voltages. Note whether or not the load is inverted compared to the gate signal.

3. Based on the measured gate and drain voltages, determine the resulting theoretical A v and Z in , and record these in Table 14.1. Also determine and record the percent deviations.

4. Repeat steps 5 through 7 for the remaining two JFETs.

Data Tables

JFET

A v Thry

Z

inThry

V g Exp

V dExp

A v Exp

Z

inExp

%Dev A v

%DevZ in

1

               

2

               

3

               

Table 14.1

EXPERIMENT # 15

JFET Common Gate Amplifier

Objective

The objective of this exercise is to examine common Gate JFET amplifiers. Both voltage gain and input impedance will be investigated.

Theory

In electronics, a common- gate amplifier is one of three basic single - stage JFET amplifier topologies. In this circuit the source terminal of the transistor serves as the input, the drain is the output and the gate is common to both. The input resistance of the common gate amplifier can be relatively low. It follows that significant loss of signal strength can occur in coupling the signal to the input of the common gate amplifier.

Equipment

Dual Adjustable DC Power Supplysignal to the input of the common gate amplifier. Equipment Digital Multimeter Dual Channel Oscilloscope Function

Digital Multimetergate amplifier. Equipment Dual Adjustable DC Power Supply Dual Channel Oscilloscope Function Generator Small signal

Dual Channel OscilloscopeEquipment Dual Adjustable DC Power Supply Digital Multimeter Function Generator Small signal JFET Resistors Schematic

Function GeneratorDual Adjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Small signal JFET Resistors Schematic

Small signal JFETDual Adjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Resistors Schematic

ResistorsAdjustable DC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Schematic

Schematic

DC Power Supply Digital Multimeter Dual Channel Oscilloscope Function Generator Small signal JFET Resistors Schematic

Data Tables

Without R L :

With R L :

υ in =

υ in =

υ o =

υ o =

Av

measured = υ o /υ in =

Av

measured = υ o /υ in =

Av calculated =

Av calculated =