This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2576684, IEEE
Transactions on Power Electronics

Simultaneous Microgrid Voltage and Current Harmonics Compensation

Using Coordinated Control of Dual-Interfacing-Converters

Jinwei He1, Member, IEEE, Beihua Liang1, Yun Wei Li2, Senior Member, IEEE,
and Chengshan Wang1, Senior Member, IEEE

1. Key Laboratory of Smart Grid of Ministry of Education, Tianjin University, Tianjin, China
2. Dept. Electrical and Computer Engineering, University of Alberta, Edmonton, AB, T6G 2V4, Canada
Email: hjinwei@ualberta.ca
 
Abstract- The growing installation of distributed generation harmonic current compensation using multi-functional DG
(DG) units in low voltage distribution systems has popularized interfacing converter.
the concept of nonlinear load harmonic current compensation Previous research mainly focused on the control of a single
using multi-functional DG interfacing converters. It is analyzed
DG shunt interfacing converter as an APF, as their power
in this paper that the compensation of local load harmonic
current using a single DG interfacing converter may cause the electronics circuits have similar topology. To realize an
amplification of supply voltage harmonics to sensitive loads, enhanced active filtering objective, the conventional current
particularly when the main grid voltage is highly distorted. To control methods for grid-tied DG interfacing converter shall
address this limitation, unlike the operation of conventional be modified. First, the wide bandwidth current controllers are
unified power quality conditioners (UPQC) with series converter, used so that the frequencies of harmonic load current can fall
a new simultaneous supply voltage and grid current harmonic
into the bandwidth of the current controller. Alternatively, the
compensation strategy is proposed using coordinated control of
two shunt interfacing converters. Specifically, the first converter selective frequency harmonic compensation using
is responsible for local load supply voltage harmonic multi-resonant current controller has received a lot of
suppression. The second converter is used to mitigate the attenuations, as reported in [31] and [36]. In [19], the
harmonic current produced by the interaction between the first deadbeat controller is developed for multiple DG units with
interfacing converter and the local nonlinear load. To realize a active harmonic filtering capability. In [18], the neural
simple control of parallel converters, a modified hybrid voltage
network method is used to improve the harmonic filtering
and current controller is also developed in the paper. By using
this proposed controller, the grid voltage phase-locked loop and performance of DG interfacing converters that are connected
the detection of the load current and the supply voltage to a grid with large variation of grid impedance. In addition to
harmonics are unnecessary for both interfacing converters. the compensation of harmonics at low voltage distribution
Thus, the computational load of interfacing converters can be networks, the active filtering of harmonics in higher voltage
significantly reduced. Simulated and experimental results are distribution system using multi-level converters is discussed,
captured to validate the performance of the proposed topology
as show in [37]. However, it is important to note that
and the control strategy.
abovementioned compensation methods are mainly used in
grid-tied converter systems. In recent literature, the hybrid
Index Terms—parallel converters; active power filter; voltage and current control is also developed to realize a
dynamic voltage restorer; LCL filter; resonance; power quality; fundamental voltage control for DG power regulation and a
harmonic detection; phase-locked loop. harmonic current control for local load harmonic
compensation. Compared to the aforementioned conventional
I. INTRODUCTION current control methods, the hybrid controller allows an
There are growing demands of using power conditioning interfacing converter to compensate harmonics in both
circuits [1-6] in low and medium voltage power distribution grid-tied and islanding micorgrids. With assistance of the low
system. Comparing to bulky passive filters that are highly bandwidth communications between DG units, it also
sensitive to circuit parameters variations, the active power possible to achieve harmonic power sharing among parallel
conditioning equipment including active power filter (APF), DG systems[38].
dynamic voltage restorer (DVR), and unified power quality It is worth to mention that when an interfacing converter is
conditioner (UPQC) is preferred due the fast dynamic applied to compensate shunt loads harmonic current,
response and the good immunity to system parameter changes. developing high efficiency controller to reduce the
On the other hand, the high penetration of distributed computational load of DG system is important. To realize this
generation (DG) unit with power electronics interfacing task, the compensation without load harmonic current
converter offers the possibility of power distribution system extraction becomes very attractive. In [15] and [19], the
phase-locked loop is removed by using a series current

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Transactions on Power Electronics

I1 I2
PCC Ig
I1 I2 Grid
VPCC VDC Vout VC
L1 R1
Cf

VDC Vout
L1 R1 L2 R2 Lg Rg I g Lg R
Cf Grid g
I Load
VPCC

I1 I2 I Load
VPCC I 1 Vc

Qref Power Control

I Load Sag/Swell
Reference I 2,ref _ PQ
Reference VC , ref _ f
Pref 
Generator
Compensation  VPCC
SOGI I 2,ref _ Har Generator
Modulation VPCC Modulation SOGI
PLL +
VC ,ref _ har
*
Vout + GHar ( s ) *
VPCC PLL +
, ref Vout , ref
+ GHar ( s )
I1,ref I 2,ref
+ Harmonic VC ,ref
GInner +-
GOuter - Control
I1,ref +
+
GOuter Harmonic
Inner loop Outer loop GInner - -
Control
I1 I2
Current Controller Inner loop Outer loop
I1 VC
Voltage Controller

(a) (b)

Fig. 1. Diagram of local harmonic compensation using interfacing converter.

compensator, meanwhile keeping robust synchronization with control. The harmonic current produced by the interactions
the main grid. In recent literature [40], an enhanced current between the local nonlinear load and the first converter is
controller utilizing the frequency selective feature of resonant then compensated by the second converter. To reduce the
controllers was proposed to remove both the load current computational load of the dual-converter system, a modified
harmonic extraction and the phase-locked loop in a hybrid voltage and current control method is proposed for
single-phase DG unit. parallel interfacing converters. With cooperative operation of
Nevertheless, it is important to emphasis that even when two converters, the load current and supply voltage harmonic
the local load harmonic current is properly compensated extraction and the phase-locked loops are not needed to
using various controllers as mentioned above, high quality realize this proposed comprehensive power quality control
supply voltage to local load cannot be guaranteed at the same objective. Note that this paper focuses on the compensation
time. This problem is particularly serious when the DG of supply voltage and grid current harmonics. When there are
interfacing converter is interconnected to a weak microgrid significant disturbances in the main grids, such as sags/swells
with nontrivial upstream grid voltage distortions. To and interruptions, the shunt converter is less effective to
overcome this limitation, the dynamics voltage restorer (DVR) compensate these grid issues. Thus in these cases, the
with series harmonic voltage compensation capability can be protection and the fault-ride through control schemes for a
installed in the power distribution system, as proposed in [3] conventional single converter can be applied to this
and [4]. Unfortunately, the functionality of a DVR can hardly dual-converter in a similar manner.
be implemented in a shunt DG interfacing converter. Using
an additional series power conditioning equipment to ensure II. REVIEW OF CONVENTIONAL APF AND DVR
very low steady-state harmonic supply voltage to local loads This section briefly reviews the control of shunt APFs for
is definitely feasible. However, it is associated with more grid current harmonic mitigation and series DVRs for supply
expenses which might not be accepted for cost-effective voltage harmonic suppression. In order to compare with the
power distribution systems. proposed parallel-converter using modified hybrid voltage
To realize simultaneous mitigation of the grid current and and current controller as shown in the next section, the
the supply voltage harmonics, this paper develops a well-understood double-loop current control and voltage
parallel-converter topology where the local nonlinear load is control are applied to APFs and DVRs, respectively.
directly installed to the shunt filter capacitor of the first A. Shunt Interfacing Converters for Grid Current
converter. The local load supply voltage quality is enhanced Harmonic Mitigation
by the first interfacing converter through harmonic voltage

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2576684, IEEE
Transactions on Power Electronics
Fig. 1(a) shows the topology and control strategy of an
interfacing converter for compensating harmonic current
from a local nonlinear load. First, the local load is connected
to the output of the interfacing converter, and then, they are
coupled to the main grid through the grid feeder. The
parameters of the interfacing converter LCL filter and the
grid feeder are listed as 𝑧1 (𝑠) = 𝑠𝐿1 + 𝑅1 , 𝑧2 (𝑠) = 𝑠𝐿2 +
𝑅2 , 𝑧3 (𝑠) = 1/(𝑠𝐶𝑓 ), and 𝑧𝑔 (𝑠) = 𝑠𝐿𝑔 + 𝑅𝑔 , where 𝐿1 , 𝐿2 ,
𝑅1 , and 𝑅2 are the inductance and resistance of the filter
series chokes, 𝐶𝑓 is the capacitance of the shunt capacitor,
and 𝐿𝑔 and 𝑅𝑔 are grid inductance and resistance.
The current control scheme is shown in the lower part of
Fig. 1(a). According to the traditional APF control theory, the
local load current is measured and the harmonic components
are detected as:
I 2,ref _ h  H Har (s)  I Load
(1)
where 𝐻𝐻𝑎𝑟 (𝑠) is the transfer function of the harmonic
component detector and 𝐼𝐿𝑜𝑎𝑑 is the local load current.
When both the fundamental and the harmonic components
are determined, the reference current is obtained as 𝐼2,𝑟𝑒𝑓 =
𝐼2,𝑟𝑒𝑓_𝑓 + 𝐼2,𝑟𝑒𝑓_ℎ and it is used as the input for a double-loop
line current 𝐼2 control [27] as:
I1,ref  HOuter (s)  ( I 2,ref  I 2 )
(2)
V *
out , ref  H Inner (s)  ( I1,ref  I1 )
(3)
where 𝐻𝑂𝑢𝑡𝑒𝑟 (𝑠) and 𝐻𝐼𝑛𝑛𝑒𝑟 (𝑠) are the regulators of the
outer and the inner control loops, respectively. 𝐼1,𝑟𝑒𝑓 and 𝐼1
are the reference and the instantaneous inverter output current,
∗ current harmonic is mitigated via the power conditioning
respectively. 𝑉𝑜𝑢𝑡,𝑟𝑒𝑓 is the output voltage reference of the
inverter.
B. Series Interfacing Converters for Supply Voltage
Harmonic Mitigation
It is important to note that even when the harmonic current
of shunt nonlinear loads is compensated, the supply voltage
to local load is not always purely sinusoidal. This can be
caused by a few reasons including the main grid voltage
steady-state harmonic distortions. Suppose the grid current 𝐼𝑔
in Fig. 1(a) is ripple-free, the harmonic voltage drop on the
grid feeder 𝑅𝑔 and 𝐿𝑔 is zero. In this case, the harmonic
voltage at PCC is the same as the harmonics from the main
grid. To address the aforementioned problem, a series DVR
can be installed as shown in Fig. 1(b), where the system is
coupled with the power distribution network using a
series-connected matching transformer. The secondary of the
transformer is connected to a converter with output LC filter.
First, the PCC voltage is measured by the DVR controller
and the fundamental and harmonic PCC voltage components
are separated. Then, the supply voltage harmonic components
are compensated by setting up the harmonic voltage reference
of the DVR as 𝑉𝑟𝑒𝑓_ℎ =𝑉𝑃𝐶𝐶_ℎ [35] and the fundamental
voltage reference 𝑉𝑟𝑒𝑓_𝑓 of the DVR is determined according
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to the sag and swell compensation requirement of the system
[3].
When the fundamental and harmonic component
references are determined, the DVR reference voltage is
obtained as 𝑉𝐶,𝑟𝑒𝑓 = 𝑉𝐶,𝑟𝑒𝑓_𝑓 + 𝑉𝐶,𝑟𝑒𝑓_ℎ . Afterwards, a
double-loop voltage control is applied to ensure a rapid
voltage tracking as
I1,ref  HOuter (s)  (VC ,ref  VC )
(4)
V *
out , ref  H Inner (s)  ( I1,ref  I1 )
(5)
where 𝐻𝑂𝑢𝑡𝑒𝑟 (𝑠) and 𝐻𝐼𝑛𝑛𝑒𝑟 (𝑠) are the regulator of the
outer and the inner control loops, respectively. 𝑉𝐶,𝑟𝑒𝑓 and 𝑉𝐶
are the reference and the instantaneous value of DVR voltage,
respectively.
III. THE PROPOSED COORDINATED CONTROL METHOD
To have simultaneous mitigation of the supply voltage and
the grid current harmonics, a compensation method using
coordinated control of two parallel interfacing converters is
proposed in this section. The circuitry and control diagrams
of the proposed system are shown in Fig. 2 and Fig. 3,
respectively. First, a DG unit with two parallel interfacing
converters sharing the same DC rail is connected to PCC.
Each interfacing converter has an output LCL filter and the
local nonlinear load is placed at the output filter capacitor of
converter1. In this topology, the supply voltage to local
nonlinear load is enhanced by controlling the harmonic
component of interfacing converter1. Meanwhile, the grid
through interfacing converter2. Their detailed control
strategies are discussed respectively, as shown below:
A. Control Strategy for Converter1
First, the line current 𝐼2,𝐶1 of converter1 and the PCC
voltage 𝑉𝑃𝐶𝐶 as shown in Fig. 2 are measured to calculate the
real and reactive output power of this converter:
 3
 PC1  2( s   ) (VPCC ,  I 2 ,C1  VPCC ,   I 2  ,C1 )


Q  3 (V I V I )
 C1 2( s   ) PCC ,  2 ,C1 PCC , 2  ,C1
(6)
where 𝑃𝐶1 and 𝑄𝐶1 are the output real and reactive power
of converter1, 𝑉𝑃𝐶𝐶,𝛼 and 𝑉𝑃𝐶𝐶,𝛽 are the PCC voltage in the
two-axis stationary reference frame, and 𝐼2𝛼,𝐶1 and
𝐼2𝛽,𝐶1 are the line current of converter1, and  is the time
constant of low pass filters. The time constant of the low pass
filter is mainly determined by two factors. First, the real and
reactive power ripples caused by line current harmonics must
be properly filtered out. Secondly, the rapid dynamic power
control shall be maintained. According to the design
guideline in [39], the  is selected to 62.8 in this paper.
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Transactions on Power Electronics

Converter1 Ig Vg
I1,C1 V Iinj VPCC
C,C1 I Grid
2,C1 Vsupply PCC
VDC
Vout
L1 R1 L 2 R2 Lg Rg
Cf I Load

I1,C2
VC,C2 I 2,C2

Vout
L1 R1 L2 R 2
Cf

Converter2

Fig. 2. Diagram of the proposed topology.

Pref Qref Output power

PC1 control
I 2,C1 Power *
I2,PQ,C1
PI
Calculation
QC1 regulator
+
- HPQ
VPCC
I2,C1
*
Vout,C1
Supply voltage 0 + +
+
harmonic
- HHar +

compensation VC,C1 Modulation

LCL resonance I1,C1 HAD

Converter1 damping

Control Strategy

Pref Qref Output power

I2,C2 Power
PC2 *
I2,PQ,C2
control
PI
VPCC Calculation
QC2 regulator
+
- HPQ
I 2,C2 *
Vout,C 2
Grid curent +
harmonic
Iinj +
- HHar ++

compensation Modulation
I 2,C2
LCL resonance
I1,C2 HAD
Converter2 damping

Control Strategy

Fig. 3. Diagram of the proposed interfacing converter control strategies.

It is important to note that the power reference is usually sufficient power rating in the interfacing converters [13 and
determined according to the available power from the back 14].
stage of the DG unit. When there is energy storage system in The output of the power reference generator is the line
∗
the DG unit, the power reference can also be determined by current reference 𝐼2,𝑃𝑄,,𝐶1 as:
the energy management system of a DG unit or a microgrid.
Therefore, for the sake of simplicity, the harmonic
compensation service is usually activated when there is

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Transactions on Power Electronics

Power Control

,C1  H PQ ( s )  ( I 2, PQ ,C1  I 2,C1 ) 

VPCC * *
Vout
Real power current
Voltage Harmonic Mitigation (9)
Active Damping
g P  VPCC
H Har ( s)  (V
*
C ,C 1 V
C ,C 1 )  H AD ( s)  I1,C1
∗
I 2,C1 where 𝑉𝑜𝑢𝑡,𝐶1is reference voltage for PWM processing,
∗
𝐼2,𝑃𝑄,𝐶1 is the line current reference of the Power Control
gQ  VPCC _ CON
term, 𝑉 ∗𝐶,𝐶1 is the reference voltage of the Voltage
Reactive power
current Harmonic Mitigation term, 𝑉𝐶,𝐶1 is the filter capacitor
VPCC _ CON voltage, and 𝐼1,𝐶1 is the converter1 output current. As shown
in Fig. 2, the filter capacitor voltage (𝑉𝐶,𝐶1 ) is the same as the
load voltage (𝑉𝑠𝑢𝑝𝑝𝑙𝑦 ). The regulators of the Power Control,
Fig. 4. Phasor diagram of converter1 line current. Voltage Harmonic Mitigation and Active Damping terms are
listed as:
I 2,* PQ,C1  g P  (VPCC ,  jVPCC ,  ) 2ki , f ,C1c s
H PQ ( s)  k p1,C1 
 gQ  (VPCC ,  jVPCC , )
(7) s  2c s  o 2
2
(10)
2kv ,h,C1c s
where 𝑔𝑝 and 𝑔𝑄 are two adjustable gains that can regulate
converter1 output real and reactive power, respectively. This
H Har ( s)  k p 2,C1  
h 5,7,11,13 s 2  2c s  (h  o )2 (11)
controller simply uses a copy of the instantaneous PCC
voltage vector ( 𝑉𝑃𝐶𝐶,𝛼 + 𝑗𝑉𝑃𝐶𝐶,𝛽 ) and the conjugated H AD (s)  k AD,C1
(12)
component as the current reference. This is based on a fact where 𝑘𝑝1,𝐶1 is the proportional gain and 𝑘𝑖,𝑓,𝐶1 is the
that the real output power is in proportion to the line current resonant controller gain for the power control regulator
𝐼2 that aliens to instantaneous PCC voltage vector, while the 𝐻𝑃𝑄 (𝑠), 𝑘𝑝2,𝐶1 is the proportional gain and 𝑘𝑣,ℎ,𝐶1 is the
reactive power is proportional to the line current that aliens to resonant controller gain for the voltage harmonic mitigation
the conjugated PCC vector 𝑉𝑃𝐶𝐶,𝛽 − 𝑗 𝑉𝑃𝐶𝐶,𝛼 , as shown in Fig. regulator 𝐻𝐻ar (𝑠), and 𝑘𝐴𝐷,𝐶1 is the proportional control that
4. The gains 𝑔𝑝 and 𝑔𝑄 in (7) are determined by two PI can actively suppress the LCL filter resonance.
regulators as: It is necessary to note that only the fundamental
proportional gains 𝑘𝑝1,𝐶1 and 𝑘𝑝2,𝐶1 is much lower than the
resonant controller gain 𝑘𝑣,ℎ,𝐶1 . As a result, the output of the
 ki _ PQ Power Control term in (9) has very low harmonic component.
 g P  (k p _ PQ  )  ( Pref  PC1 ) Due to this feature, the distorted grid voltage can be directly
s
 used as the input of (7), as its harmonic component can be
 g  (k ki _ PQ automatically filtered out by (10). At the same time, it can be
p _ PQ  )  (Qref  QC1 )
 q
s (8)
seen that the output of the second Voltage Harmonic
Mitigation term only has very low fundamental components,
where 𝑘𝑝_𝑃𝑄 and 𝑘𝑖_𝑃𝑄 are PI controller coefficients. as only resonant controllers at the selected harmonic
𝑃𝑟𝑒𝑓 and 𝑄𝑟𝑒𝑓 are the reference real and reactive power, frequencies are adopted in the control term. Thus, the Power
respectively. Control term and Voltage Harmonic Mitigation term are very
Traditionally, the hybrid regulator in [27] controls the DG well decoupled. Accordingly, an interfacing converter can
fundamental voltage for power control and the harmonic dispatch power to the grid and compensate supply voltage
current for load harmonic current mitigation. As this harmonics at the same time. In addition, unlike the
converter is responsible for compensating harmonic conventional DVR with PCC harmonic voltage extractions,
components of the supply voltage, the regulators in the hybrid the Voltage Harmonic Mitigation term can realize active
voltage and current controller is modified with harmonic supply voltage harmonics compensation without any
supply voltage control and fundamental line current control harmonic extractions. In addition, it can be seen that a
as: closed-loop power control is realized without using
phase-locked-loops.
Finally, it is necessary to emphasis that comparing to the
traditional hybrid controller [27] that uses the droop control
to realize relatively slow power control dynamics, the

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Transactions on Power Electronics

fundamental current control in (9) could effectively improve 2ki , f ,C 2c s

the power control dynamic response. H PQ ( s)  k p1,C 2 
B. Control Strategy for Converter2 s 2  2c s  o 2 (14)
The control strategy of converter2 is similar to that of 2ki ,h,C 2c s
converter1, as also demonstrated in Fig. 3. However, both the
fundamental and the harmonic converter currents are
H Har ( s)  k p 2,C 2  
h 5,7,11,13 s  2c s  (h  o )2
2
(15)
controlled. First, the regulators as shown in (6) to (8) are H AD (s)  k AD,C 2
∗
adopted to obtain the power control term reference 𝐼2,𝑃𝑄,𝐶2 (16)
for converter2. Afterwards, another hybrid controller is used Similar to converter1, the Power Control term and the
to realize the closed-loop line current control of conveter2 as: Current Harmonic Mitigation term are very well decoupled.
Power Control Thus, PLLs is not necessary and the input of Power Control
∗
V *
out ,C 2  H PQ ( s)  ( I *
2, PQ ,C 2  I 2,C 2 ) term 𝐼2,𝑃𝑄,𝐶2 can have some distortions when using a direct
(13) copy of PCC voltage. In addition, it is important to note that
Current Harmonic Mitigation Active Damping the difference between the converter1 line current and the
H Har ( s)  ( I
*
2, Har ,C 2 I
2,C 2 )  H AD ( s)  I1,C 2 load current 𝐼𝑖𝑛𝑗 (seen in Fig. 2, equals to 𝐼2,𝐶1 − 𝐼𝐿𝑜𝑎𝑑 ) is
∗
where 𝑉𝑜𝑢𝑡,𝐶2 is reference voltage for converter2 PWM adopted as the input of Current Harmonic Mitigation term of
∗
∗
processing, 𝐼2,𝑃𝑄,𝐶2 is the current reference for converter2 converter2 as 𝐼2,𝐻𝑎𝑟,𝐶2 = 𝐼𝑖𝑛𝑗 . As only harmonic resonant
∗
power control, 𝐼2,𝐻𝑎𝑟,𝐶2 is the current reference for controllers are used in the Current Harmonic Mitigation term
converter2 line current harmonic control, 𝐼1,𝐶2 is the and the proportional gain 𝑘𝑝2,𝐶2 is much smaller than
converter2 output current. The regulators of Power Control, 𝑘𝑖,ℎ,𝐶2 in (15), converter2 can actively compensate the
Current Harmonic Mitigation and Active Damping terms are harmonic current from converter1 without any harmonic
listed here as: current detection. In this case, the injected current 𝐼𝑔 to the

I1 I2 I inj
+ L2 R2 + L2 R2 +
Cf
Vout VPCC
Vc
− − −
I Load
Local load

Fig. 5. Diagram of an LCL filter with a local nonlinear load.

Converter1 Local
Voltage source
Iinj
load
Ig
I2,C1 R13 (s) R12 (s) I * R2 L 2 Rg Lg
2,PQ,C1
Series
impedance Disturbance

R13 (s) V *
C,C1 I Load

R31 (s) I 2,PQ,C2

* *
R32 (s) I 2,Har,C2
Grid

R33(s)
Disturbance Current source Shunt admittance

Converter2
Fig. 6. Equivalent circuit of the proposed method at selected harmonic frequencies.

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main grid is harmonic free.
In summary, the proposed topology and the modified
hybrid controller can realize an enhanced quality of supply
voltage to the local load and the grid current to the main grid
at the same time. Through the coordinated control of two
parallel converters, the aforementioned power quality
improvement objective is realized in a computationally
effective manner, without involving any PLLs and harmonic
voltage/current extractions in the entire process. In addition,
when the fundamental current regulation in the Power
Control term in (13) and (9) is replaced by the well
understood droop control for fundamental voltage regulation
[27], the proposed method can be used in an islanded
microgrid in a similar manner.
C. Frequency Domain Analysis
As both converter1 and converter2 have frequency
selective feature at the fundamental and the selected
harmonic frequencies, the supply voltage harmonic and grid
current harmonic compensation performance can be
examined by frequency domain analysis using Bode plots.
First, an LCL filter of a converter is shown in Fig. 5, where
the local load is simplified as a harmonic current source
connected to the shunt capacitor of converter LCL filter. The
response of the filter plant is given as:
Vout VPCC 1 1 1
(   I Load )  (   )  VC
z1 z2 z1 z2 zc
Vout  VC  z1  I1
VC  VPCC  z2  I 2
(19)
Based on the control strategies in (9) and (13), the transfer
function of the LCL filter circuit (see (17) to (19)) for both
converter1 and converter2, and assuming that 𝑉𝑜𝑢𝑡,𝐶2 ∗
= current 𝐼2,𝐶2 to power control current reference 𝐼2,𝑃𝑄,𝐶2
∗
𝑉𝑜𝑢𝑡,𝐶2 and 𝑉𝑜𝑢𝑡,𝐶1 = 𝑉𝑜𝑢𝑡,𝐶1 , the closed-loop current and
voltage response of parallel converters can be established as:
VC ,C1  R11 (s)VC*,C1  R12 (s) I 2,* PQ,C1  R13 (s) I 2,C1
I 2,C1  R21 (s)V *
C ,C1  R22 (s) I *
2, PQ ,C1
I 2,C 2  R31 (s) I *
 R32 (s) I *
2, PQ,C 2 2, Har ,C 2
(22)
where the coefficients 𝑅11 (𝑠) to 𝑅33 (s) in (20) and (22)
describe the response of these two converters to various
excitations of the system. Specifically, (20) mainly focuses
the performance of converter1 at harmonic frequencies, while
(21) aims to describe the performance of the system at around
fundamental frequency. In other words, converter1 has
voltage source characteristic at harmonic frequencies but
current source characteristic at around the fundamental
frequency. On the other hand, as both fundamental and
harmonic line current are controlled for converter2, only a
single current source equivalent circuit in (22) can be used to
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demonstrate the performance of converter2. In order to make
the discussion more straightforward, a complex circuit
network as shown in Fig. 6 is developed to show how the
harmonic voltage and current harmonic are simultaneously
compensated. Note that this equivalent circuit network in Fig.
6 is only effective at the selected harmonic frequencies.
Fig. 7 shows the response of converter1 capacitor voltage
∗
𝑉𝐶,𝐶1 to the voltage reference 𝑉𝐶,𝐶1 , where the low magnitude
at the fundamental frequency indicates that the voltage
reference has minor impact to the control of fundamental
capacitor voltage. At the same time, it can be noticed that the
system has a 0 dB and 0 degree response at the selected
∗
harmonic frequencies. Thus, when the voltage reference 𝑉𝐶,𝐶1
is simply set to 0, the supply voltage harmonics can be
effectively mitigated.
Fig. 8 demonstrates the closed-loop voltage and current
∗
response of converter1 to current reference 𝐼2,𝑃𝑄,𝐶1 in the
power control term. As expected, the line current has a 0 dB
and 0 degree response to the fundamental current reference
but the magnitude gain is very low at the selected harmonic
frequencies. Therefore, converter1 has good fundamental line
∗
current control but the current reference 𝐼2,𝑃𝑄,𝐶1 has little
influence on the line current harmonics. As a result, a direct
copy of PCC voltage can be used as the fundamental current
reference. At the same time, it can be noticed that the
∗
capacitor voltage 𝑉𝐶,𝐶1 to the current reference 𝐼2,𝑃𝑄,𝐶1 has
(17) very low magnitude response at the both the fundamental and
(18)
the harmonic frequencies. Therefore, the performance of
supply voltage harmonic mitigation is not sensitive to the
∗
current reference 𝐼2,𝑃𝑄,𝐶1 .
The frequency domain response of converter2 is obtained
in Fig. 9 and Fig. 10. At first, the response of line
∗
and
∗
the harmonic compensation current reference 𝐼2,𝐻𝑎𝑟,𝐶2 is
shown in Fig. 9. It is interesting to note that the line current
has a low magnitude response to the harmonic compensation
∗
current reference𝐼2,𝐻𝑎𝑟,𝐶2 at fundamental frequency, but 0 dB
(20)
 R13 (s)VPCC and 0 degree response at the selected low order harmonic
(21) frequencies. Thus, the harmonic extraction is not necessary
 R33 (s)VPCC when using converter2 to absorb harmonic current produced
by converter1. In addition, the line current 𝐼2,𝐶2 to power
∗
control current reference 𝐼2,𝑃𝑄,𝐶2 has 0 dB and 0 degree
response at the fundamental frequency but low magnitude
gain at the selected harmonic frequency. It actually indicates
that when controlling the output power of converter1 using
the power control term, PLLs are not needed.
Finally, the response of converter2 line current 𝐼2,𝐶2 to
PCC voltage 𝑉𝑃𝐶𝐶 is also investigated in Fig. 10, where it can
be seen that the line current is insensitive to the disturbance
from the PCC voltage.
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I2,C1
*
I2,PQ,C1
VC,C1
3rd 5th 7th 9th
*
VC,C1 11th
f
3rd 5th 7th 9th 11th

VC,C1
*
f
I2,PQ,C1

Fig. 7. Response of converter1 filter capacitor voltage 𝑉𝐶,𝐶1 to Fig. 8. Closed-loop voltage and current response of converter1
∗ ∗
voltage reference 𝑉𝐶,𝐶1 . to current reference 𝐼2,𝑃𝑄,𝐶1 .

I 2,C2 I 2,C2
*
I2,PQ,C2 VPCC

3rd
3rd 5th 7th 9th 11th
5th 7th
9th 11th
I2,C2 f
f
*
I 2,Har,C2

Fig. 9. Response of converter2 line current 𝐼2,𝐶2 to power Fig. 10. Response of converter2 line current 𝐼2,𝐶2 to PCC
∗
control current reference 𝐼2,𝑃𝑄,𝐶2 and the harmonic voltage 𝑉𝑃𝐶𝐶 .
∗
compensation current reference 𝐼2,𝐻𝑎𝑟,𝐶2 .

THD. On the other hand, the interfacing converter line

IV. EVALUATION RESULTS
Simulated and experimental results are obtained to further
verify the performance of the proposed controller for
coordinated operation of parallel converters.
A. Simulated results
First, similar to Fig. 1, a single interfacing converter is
connected to the main grid and the local nonlinear load is
placed at the output terminal of the DG unit. In this
simulation, some steady-state harmonic distortion is added to
the main grid voltage and the grid voltage THD is 5.6%.
When the current controller as shown in (13) is applied to the
system, the performance of the system is shown in Fig. 11 to
Fig. 13.
As the local load harmonic current is compensated by the
DG unit, it can be seen from the second channel of Fig.11
that the grid current is almost ripple-free with only 4.57%
current 𝐼2 is highly distorted in this case. Due to the lack of
supply voltage harmonic control, the supply voltage to the
local nonlinear load is distorted with 6.45% THD.
To have a better understanding of the power quality of the
system, the harmonic spectrum of the grid current and the
supply voltage in Fig. 11 are given in Fig. 12 and Fig. 13,
respectively.
When the supply voltage harmonic component is
controlled by a single interfacing converter using the hybrid
voltage and current control as shown in (9), the performance
is shown in Fig. 14. As illustrated, the quality of supply
voltage in this case is significantly improved with only 1.48%
THD. Nevertheless, the grid current has more harmonics and
the corresponding THD is 12.28%.
Similarly, the corresponding harmonic spectrum of the
supply voltage and the grid current are shown in Fig. 15 and
Fig. 16, respectively. Comparing to the previous spectrum

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analysis results in Fig. 12 and Fig. 13, it can be clearly seen First, the main grid voltage and the grid current are shown
that the supply voltage harmonic reduction is achieved at the in Fig.17. In this case, some distortions are added to the main
expense of more grid current distortions. grid voltage and the THD is 5.7%. Due to the coordinated
control of parallel converters, it can be seen that the grid
The simultaneous supply voltage and grid current current is sinusoidal with only 3.54% THD.
harmonics mitigation is tested by using a single DG unit with The performance of converter1 is shown in Fig.18. As this
two parallel interfacing converters sharing the same DC rail. converter is applied to compensate the harmonics in the
The circuitry and the control strategy of the system is the supply voltage, it can be seen that the voltage waveform in
same as that in Fig. 2 and Fig. 3, in which the first converter the top of the figure is almost ripple-free. However, the line
is for supply harmonics voltage reduction and the second current of this converter is distorted.
converter is employed for harmonic current compensation. In addition, the performance of converter2 is shown in
The simulated results are shown from Fig. 17 to Fig. 22. Fig.19. As the line current of converter1 produces a large

TABLE I. PARAMETERS OF THE SIMULATED & EXPERIMENTAL SYSTEM

Circuit Parameter Converter1 Converter2
Three-phase 110V/50Hz (Simulation Three-phase 110V/50Hz ( Simulation
Rated grid voltage
&Experiment) &Experiment)
DC link voltage 450V (Simulation &Experiment ) 450V (Simulation &Experiment )
𝐿1=1mH 𝑅1 =8 mΩ ; 𝐶𝑓 =15uF; 𝐿2 =1mH 𝐿1=1mH 𝑅1 =8 mΩ ; 𝐶𝑓 =15uF; 𝐿2 =1mH
LCL filter
𝑅1=6 mΩ 𝑅1=6 mΩ
Sampling and Switching
20kHz/10kHz 20kHz/10kHz
Frequency
Dead-time 2.25 µsec 2.25 µsec
Control parameter Converter1 Converter2
𝑘𝑝1 =0.25; 𝑘𝑝2 =0.25; 𝑘𝑖,𝑓 =25; 𝑘𝑣,5 =20; 𝑘𝑝1 =0.25; 𝑘𝑝2 =0.25; 𝑘𝑖,𝑓 =25; 𝑘𝑖,5 =20;
Control parameters
𝑘𝑣,7 =20;𝑘𝑣11 =20; 𝑘𝑣,13 =10; 𝜔𝑐 =4 𝑘𝑖,7 =20; 𝑘𝑖,11 =20; 𝑘𝑖,13 =10; 𝜔𝑐 =4

a b c
Supply Voltage

a b c
Grid Current
(A)
Line Current

a b c
(A)
Load Current

a c
b
(A)

Time (Sec)

Fig. 11. Only the local load harmonic current is compensated. (From upper to lower: 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 , 𝐼𝑔 , 𝐼2 , 𝐼𝐿𝑜𝑎𝑑 )

Grid Current Supply Voltage

Fig. 12. The harmonic spectrum of grid current 𝐼𝑔 in Fig. 11. Fig. 13. The harmonic spectrum of supply voltage 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 in
Fig. 11.

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a b c

Supply Voltage
a b c

Grid Current
(A)
Line Current
a b c

(A)
Load Current

a c
b
(A)

Time (Sec)

Fig. 14. Only the supply voltage harmonic component is compensated. (From upper to lower: 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 , 𝐼𝑔 , 𝐼2 , 𝐼𝐿𝑜𝑎𝑑 )

Grid Current Supply Voltage

Fig. 15. The harmonic spectrum of grid current 𝐼𝑔 in Fig. 14. Fig. 16. The harmonic spectrum of supply voltage 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 in
Fig. 14.

amount of harmonic current, it must be properly compensated
by converter2 by using the hybrid controller as shown in (13).
The objective of this control strategy has been verified as the
grid current is sinusoidal in the second channel of Fig.17.
To have a clear understanding of the principle of the
proposed controller for parallel converter coordinated control,
the spectrum of grid current and supply voltage are shown in
Fig.20 and Fig.21. In this case, it can be noticed that both grid
current and supply voltage quality are significantly improved.
Finally, the power control performance of the system is
tested when the PQ reference has a step jump. It can be seen
from Fig. 22 that both converters have a rapid response to PQ
reference change. There is no obvious overshoot during this
process and the steady-state power control error is zero.
To fully verify the performance of the proposed method, a
simulation is conducted where a highly distorted grid voltage
with 10% THD is used, as shown in the top of Fig. 23. In this
simulation, the grid voltage has 10% dip at 1.8sec. It can be
clearly seen that both the supply voltage and the grid current
are sinusoidal during the entire simulation. The THDs of
supply voltage are 2.86% and 2.91%, before and after grid
voltage dips, respectively. Similarly, the grid current THDs
are 3.24% and 2.78% in these two scenarios.
B. Experimental results
The proposed method is also verified on a voltage-scaled
laboratory DG test rig with two parallel interfacing converters
at the same power rating. The detailed circuit and control
parameters can be seen from Table I and the configuration of
the system is illustrated in Fig. 2.
First, only converter1 with the supply voltage harmonic
mitigation as the control objective is connected to a highly
distorted grid. The converter2 is disconnected from the grid
in order to clearly show the characteristics of converter1. The
corresponding performance of the system is shown from Fig.
24 to Fig. 29.

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Thd=6%
a b c

Grid Voltage
(V)
a b c

Grid Current
(A)
Time (Sec)

Fig. 17. The main grid voltage and the grid current when the proposed coordinated control is applied. (From upper to lower:
𝑉𝑔 , 𝐼𝑔 )

a b c
Supply Voltage

a b c

Voltage (V)
Filter Cap
(V)

a
Line Current

b c
(A)

a b c
Line Current
(A)
Injected Current

a b c
(A)

Harmonic Current

alpha beta
Component
Load Current

a b c
(A)
(A)

Fig. 18. Performance of converter1. (From upper to lower: Fig. 19. Performance of converter2. (From upper to lower:
𝑉𝑠𝑢𝑝𝑝𝑙𝑦 , 𝐼2,𝐶1 , 𝐼𝑖𝑛𝑗 , 𝐼𝐿𝑜𝑎𝑑 ) 𝑉𝐶,𝐶2 , 𝐼2,𝐶2 , 𝐼2,𝐻𝑎𝑟,𝐶2

Grid Current Supply Voltage

Fig. 20. The harmonic spectrum of grid current 𝐼𝑔 in Fig. 17. Fig. 21. The harmonic spectrum of supply voltage 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 in
Fig. 18.
Active Power

3000
Reactive Power Active Power

Trigger 3000
2000
(W)

Trigger
2000
(W)

1000 P1 (2.5kW)
1000 P2 (2.5kW)
0
0
Reactive Power

3000
3000
2000
(Var)

2000
(Var)

1000 Q1 (2.5kvar) Q2 (2.5kvar)

1000
0 0
1.9 2 2.1 2.2 1.9 2 2.1 2.2
Time(0.05s/div) Time(0.05s/div)

Fig. 22. Real and reactive power of converter1and

converter2.

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0.1pu voltage sag

THD_Vg=10.03% THD_Vg =10.03%
200

Grid Current Supply Voltage Grid Voltage

(V)
0

-200
200 THD_Vsupply =2.86% THD_Vsupply =2.91%

0
(V)

-200
20 THD_Ig =3.24% THD_I g =2.78%
(A)

-20
1.7 1.75 1.8 1.85 1.9 1.95
Time(Sec)
Fig. 23. The performance of the dual-converter system during 10% grid voltage sags, with 10.03% THD.

The grid voltage waveform with 7.5% THD is shown in harmonic current from the nonlinear flow to the converter2,
Fig. 24. The local load in this case is a diode rectifier with the the converter2 line current in this case has nontrivial
distorted current as shown in Fig. 25. Note that the distorted harmonic current as shown in Fig. 32.
grid voltage and local load are used for the verification of Similar to the previous test, the response to a step increase
grid current compensation and simultaneously compensation of real and reactive power reference is shown in Fig. 33. The
using dual-converter. As the directly supply voltage harmonic power control characteristics in Fig. 33 are similar to the
control is achieved by the second term of the controller as counterpart in Fig. 29. This is because the Power Control
shown in (9), it can be noticed that the supply voltage is very term is very well decoupled from the Harmonic
smooth with only 2.01% THD. At the same time, due to a Compensation term in the proposed control method.
fact that the ripple-free supply voltage and the highly Up to now, the conclusion that a single shunt interfacing
distorted grid voltage are interconnected with converter1 converter can hardly maintain improved supply voltage and
output filter choke 𝐿1 , it can be seen that both the grid grid current quality at the same time has been verified by the
current and the converter1 line current in this case have experimental results from Fig. 24 to Fig. 33.
significant harmonic distortions as shown in Fig. 27 and Fig. When both converter1 and converter2 are connected to the
28, respectively. experimental system to achieve simultaneous harmonic
Fig. 29 shows the power response when the active power supply voltage and harmonic grid current mitigation, the
reference increases from 0 kW to 5kW and the reactive power corresponding is shown from Fig. 34 to Fig. 39. Similar to the
reference increases from 0 kVar to 5kVar. As shown, the previous two experiments, the grid voltage in this case is
power control reaches a steady-state for around 0.1 sec after highly distorted and a nonlinear load is connected to the shunt
the change of the references. In addition, it can be observed capacitor of converter1, as shown in Fig. 24 and Fig. 25,
that the steady-state power control error is zero even when respectively.
the supply voltage compensation is activated in the DG Since converter1 is used to compensate the harmonic
system. voltage at the local load connection point, the line current is
In addition, when only converter2 is applied to compensate distorted as shown in Fig. 34. As the harmonic current caused
the nonlinear load harmonics and the converter1 is by the interactions between the local nonlinear load and the
disconnected from the grid, the corresponding performance of converter1 is compensated by the line current control of
the system is obtained in Fig. 30 to 33. Similarly, the grid converter2, it can be seen from Fig. 35 that the line current of
voltage is also distorted and the diode rectifier load is placed converter2 also contains significant harmonics.
at the output of converter2, as shown in Fig. 24 and Fig. 25, Due to the coordinated operation of both converter1 and
respectively. However, in contrast to the counterpart as converter2, the enhanced supply voltage and grid current
shown in Fig. 26, it can be clearly seen that the supply quality is realized as shown in Fig. 36 and Fig. 37,
voltage to the local load is highly distorted in Fig. 30, with respectively. The corresponding THDs of the supply voltage
7.3% THD. This is because the harmonic current from the and the grid current are 2.25% and 3.59%, respectively. Note
local load is compensated by converter2. Thus, the that during the entire process, no PLLs or harmonic
three-phase grid current in this case is sinusoidal with only extraction is involved in the control schemes.
4.08% as illustrated in Fig. 31. Nevertheless, since the

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Grid Voltage (80V/div) Local Load Current (8A/div)

Time(4ms/div) Time(4ms/div)
Fig. 24. Three-phase main grid voltage (𝑉𝑔 ). Fig. 25. Current of local load connecting to converter1 (ILoad).

Supply Voltage (80V/div) Grid Current (8A/div)

Time(4ms/div)
Time(4ms/div)
Fig.26. Supply voltage after harmonic voltage compensation Fig. 27. Grid current (𝐼𝑔 ) when only converter1 is operating.
using converter1 (𝑉𝑠𝑢𝑝𝑝𝑦 ).

Converter1 Line Current (16A/div)

Time(4ms/div)
Fig. 28. Converter1 line current (I2,C1) when harmonic supply voltage is compensated.

6000
Active Power

4000 P1
(W)

2000

6000
Reactive Power

4000 Q1
(Var)

2000

0
1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7
Time(Sec)

Fig. 29. Real and reactive power of converter1 when supply voltage harmonics are compensated.

Finally, the power response of this dual-converter system
is shown in Fig. 38 and Fig. 39. Due to the involvement of
dual converters, the power reference for each converter is a
half of that in Figs. 29 and 33. Due to the decoupled feature
of the proposed method, two converters have similar response
in this case and the steady-state tracking error is zero for both
converters.
V. CONCLUSION
When a single multi-functional interfacing converter is
adopted to compensate the harmonic current from local
nonlinear loads, the quality of supply voltage to local load
can hardly be improved at the same time, particular when the
main grid voltage is distorted. This paper discusses a novel
coordinated voltage and current controller for dual-converter
system in which the local load is directly connected to the
shunt capacitor of the first converter. With the configuration,
the quality of supply voltage can be enhanced via a direct
closed-loop harmonic voltage control of filter capacitor
voltage. At the same time, the harmonic current caused by the
nonlinear load and the first converter is compensated by the

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Supply Voltage (80V/div) Grid Current (8A/div)

Time(4ms/div) Time(4ms/div)

Fig. 30. Distorted supply voltage after harmonic load Fig. 31. Grid current (𝐼𝑔 ) when only converter2 is operating.
current compensation using converter2 (𝑉𝑠𝑢𝑝𝑝𝑦 ).

Converter2 Line Current (16A/div)

Time(4ms/div)
Fig. 32. Converter2 line current (𝐼2,𝐶2 ) when local load harmonic current is compensated.

6000
Active Power

4000 P2
(W)

2000

0
Reactive Power

6000
4000 Q2
(Var)

2000
0
1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7
Time(Sec)

Fig. 33. Real and reactive power of converter2 when local load harmonic current is compensated.

second converter. Thus, the quality of the grid current and the Theoretical Investigations and Experimental Results,” IEEE
supply voltage are both significantly improved. To reduce the Trans. Power Electron., vol. 23, pp. 2746-2754, Nov. 2008.
computational load of DG interfacing converter, the [5] F. Blaabjerg, Z. Chen, and S. B. Kjaer, “Power electronics as
efficient interface in dispersed power generation systems,”
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Transactions on Power Electronics

Converter1 Line Current (8A/div) Converter2 Line Current (8A/div)

Time(4ms/div) Time(4ms/div)
Fig. 34. Converter1 line current (𝐼2,𝐶1 ). Fig. 35. Converter2 line current (𝐼2,𝐶1 ).

Supply Voltage (80V/div) Grid Current (8A/div)

Time(4ms/div)
Time(4ms/div)
Fig. 36. The enhanced supply voltage (𝑉𝑠𝑢𝑝𝑝𝑙𝑦 ) when both Fig. 37. The enhanced grid current (𝐼𝑔 ) when both converter1
converter1 and converter2 are operating. and converter2 are operating.

3000
Reactive Power Active Power
3000
Reactive Power Active Power

2000 P1 2000 P2
(W)
(W)

1000 1000
0 0
3000 3000
2000 Q1 2000 Q2
(Var)
(Var)

1000 1000
0 0
1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7
Time(Sec) Time(Sec)
Fig. 38. Real and reactive power of converter1 when both Fig. 39. Real and reactive power of converter2 when both
converter1 and converter2 are operating. converter1 and converter2 are operating.

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