52 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO.

1, JANUARY 2008

Multicarrier PWM With DC-Link Ripple Feedforward

Compensation for Multilevel Inverters
Samir Kouro, Student Member, IEEE, Pablo Lezana, Member, IEEE, Mauricio Angulo, and
José Rodríguez, Senior Member, IEEE

Abstract—Like most power converter topologies, multilevel in-

verters are controlled with modulation techniques that are concep-
tually based on nonlinear waveform synthesis assuming constant
dc-link voltages. However, real applications have load and supply
dependent dc-links that usually present important low frequency
ripple, which is also modulated and transmitted to the load, gen-
erating undesirable low frequency voltage and current distortion.
This paper introduces a simple but effective dc-link ripple feed-
forward strategy into traditional carrier-based modulation tech-
niques. The dc-link ripples are measured and used to modify the
carriers or the reference directly in the modulation stage. Simula-
tion and experimental results show the accuracy of the proposed
method, eliminating low order harmonics in the load current.
Index Terms—DC-link ripple, feedforward, multicarrier PWM,
multilevel inverters. Fig. 1. Multilevel inverter topologies: (a) neutral point clamped, (b) flying ca-
pacitor, (c) cascaded H-bridge.

I. INTRODUCTION

M ULTILEVEL inverters have many attractive features like

high voltage capability, reduced common mode voltages,
near sinusoidal outputs, low ’s and smaller or even no
output filter, making them suitable for high power applications
[1]. The most used topologies are the neutral point clamped [2],
flying capacitor [3]–[5] and the cascaded H-bridge inverter [6],
[7], shown in Fig. 1. They are mainly controlled with sinusoidal
PWM extended to multiple carrier arrangements of two types:
level shifted (LS-PWM), also known as phase disposition, and
phase shifted (PS-PWM) [8]–[10] as shown in Fig. 2. Other es-
tablished modulation methods include the multilevel extension Fig. 2. Multilevel inverter multicarrier based PWM methods.
of space vector modulation (SVM) [11], [12], multilevel selec-
tive harmonic elimination [13]–[15] and multilevel space vector capacitor design, the type of load and the operating conditions
control [16]. The last two methods are used for lower switching [17], [18]. The ripple becomes important when feeding non-
frequency applications. linear loads, or when the dc-link is fed by a front end rectifier
These modulation techniques are conceptually conceived as- connected to a weak or unbalanced ac network. This low fre-
suming a constant dc-link fed inverter. However, in real ap- quency ripple is then transmitted to the load due to the low-pass
plications, the capacitor voltage presents a considerable ripple, nature of the load (and of the possibly added output filter), only
that depends on the rectifier and inverter topologies (if they are rejecting the high frequency components generated by the car-
single or three phase, regenerative or nonregenerative, etc.), the riers. This low frequency distortion cannot be corrected in open
loop applications (they will appear in the load current), and
could somehow be compensated by the controllers in closed
Manuscript received February 6, 2007; revised May 1, 2007. This work was
loop applications, if properly tuned. These problems have been
supported in part by the Chilean National Fund of Scientific and Technological addressed for two level inverters and other classic topologies
Development (FONDECYT), under Grant 1060423 and in part by the Industrial and modulations [19]–[23].
Electronics and Mechatronics Millenium Science Nucleus of the Universidad In this paper, an adaption is developed to address this is-
Técnica Federico Santa María. Recommended for publication by B. Wu.
S. Kouro and J. Rodríguez are with the Electronics Engineering Department, sues for multilevel inverters. The proposed method is based
Universidad Técnica Federico Santa María, Valparaíso, Chile (e-mail: samir. on a dc-link voltage measurement, which is fed-forward and
kouro@ieee.org; jrp@elo.utfsm.cl). considered in the modulation strategy. The carriers are mod-
P. Lezana and M. Angulo are with the Electrical Engineering Department,
Universidad Técnica Federico Santa María, Valparaíso, Chile (e-mail: pablo.
ified according to the dc-link fluctuation to maintain the lin-
lezana@usm.cl; mauricio.angulo@usm.cl). earity of the modulator, compensating the low frequency har-
Digital Object Identifier 10.1109/TPEL.2007.911834 monics in advance. The feed-forward strategy is adapted for
0885-8993/$25.00 © 2007 IEEE
KOURO et al.: MULTICARRIER PWM WITH DC-LINK RIPPLE FEEDFORWARD COMPENSATION
Fig. 3. Typical multilevel inverter operation: (a) output voltage, (b) output
voltage spectrum, and (c) load current.
both LS-PWM and PS-PWM. Simulation and experimental re-
sults are presented and compared to the traditional modulation
techniques. Results show that the proposed method achieves
dc-link ripple rejection and no low order harmonics are trans-
mitted to the load.
The proposed method can be useful for high power open-loop
applications, where at high load conditions or grid disturbances,
high dc-link ripple components may produce important low har-
monic current distortion in the load, affecting the system opera-
tion (fans, pumps and conveyors). Also some closed loop appli-
cations with non conventional controllers, like model predictive
control, are sensitive to model parameter changes or model er-
rors. In this case, the inner modulation loop will be closer to the
constant dc-link model assumption, without affecting the pre-
dictive controller. Some applications in medicine and commu-
nications that employ high power sources are very strict in re-
lation of harmonic content due to EMI, this could be also an
application field for the proposed method.
II. PROBLEM OVERVIEW
A typical multilevel inverter output voltage is shown in
Fig. 3(a). Note how the 9-level stepped waveform presents
low frequency oscillations, which are specially significant at
the peak values, where more current is demanded from the
dc-link capacitors. This ripple depends on many factors, among
53
them: the source input frequency, inverter output frequency,
dc-link capacitance, rectifier topology (single or three-phase,
controlled or non controlled, regenerative or non regenerative,
etc.) and load type (linear or non-linear).
The low frequency ripple can be more clearly appreciated
in the output voltage spectrum shown in Fig. 3(b). Since the
ripple harmonics are very close to the fundamental frequency,
they are not filtered by the load, and they make the output filter
design difficult if one is used. Therefore this harmonic content
will be present in the load current, as shown in Fig. 3(c). In
addition the varying dc-link voltages eliminate the linearity of
the modulation producing a fundamental component mean value
error.
If the inverter is used in closed loop applications, the loop
controller can compensate this perturbation, if properly tuned.
However a feedforward compensation is more effective and
does not impose restrictions on the outer-loop bandwidth. For
open loop applications a feedforward strategy is necessary.
III. PROPOSED CONTROL METHODS
In this section a dc-link ripple feedforward strategy is derived
for the multicarrier based PWM methods classified in Fig. 2.
They will be explained considering the typically associated mul-
tilevel inverter topology for each method.
A. Modified Phase Shifted PWM (PS-PWM)
Normally, PS-PWM is used with cascaded H-bridge (CHB)
and flying capacitor (FC) inverters, since each cell is modulated
independently using sinusoidal unipolar PWM and bipolar
PWM, respectively, providing an even power distribution
among the cells. A carrier phase shift of 180 for the CHB
and of 360 for the FC is introduced across the cells to
generate the stepped multilevel output waveform with lower
distortion (where is the number of cells). The difference
between the phase shifts and the type of PWM (unipolar or
bipolar) is because one CHB cell generates 3-level outputs,
while one FC cell generates two level outputs.
A qualitative example of PS-PWM for a particular power cell
of a CHB inverter, with ideal dc-link ( is constant), is shown
in Fig. 4(a). The average output voltage over one carrier cycle
is
(1)
where is the output voltage of cell , and is the time
interval, determined by the comparison between the reference
and the carrier signals, in which the inverter generates the high
level.
When considering a real dc-link behavior ( is variable) the
output will still be controlled with the same duty cycle (since the
carrier and reference are still the same) but the output will switch
between 0 and the real voltage level provided by the dc-link
capacitor. This is how the dc-link ripple appears in the output
voltage. The sum of all the power cells generates the total in-
verter output voltage, hence all the dc-link ripples will be com-
bined in the output, generating an important low frequency dis-
tortion.
54 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 1, JANUARY 2008

Fig. 6. LS-PWM: (a) with ideal dc-link and (b) with real dc-link.

Fig. 4. PS-PWM of power cell i: (a) with ideal dc-link and (b) with real dc-link.

Fig. 5. DC-link feedforward control diagram for PS-PWM.

Fig. 7. DC-link feedforward control diagram for LS-PWM.

To correct this phenomena, the carrier signal can be modified

accordingly to the dc-link ripple. Since the carrier frequency each cell , and dividing by , we obtain a normalized quan-
is much higher than the harmonic content of the ripple, the tity that contains the voltage error of the dc-link
capacitor voltage can be considered constant over one carrier capacitor. By multiplying to the normalized carrier, a modi-
cycle ( is constant but not necessarily equal to the theoret- fied carrier signal is obtained scaled proportionally to the dc-link
ical value ). By simply measuring the capacitor voltage of fluctuation. A qualitative example of this is shown in Fig. 4(b).
KOURO et al.: MULTICARRIER PWM WITH DC-LINK RIPPLE FEEDFORWARD COMPENSATION 55

Fig. 8. Simulation results (modified carriers, output voltage, output voltage spectrum and load current): (a) dc-link ripple feed-forward PS-PWM and (b) dc-link
ripple feed-forward LS-PWM.

The new mean value of the output voltage (for one power cell)
over one carrier cycle is

(2)

where is the new “ON” time, due to the new carrier signal.
Note that when multiplying to (1), the corrected mean
value in (2) is obtained. Thus, by measuring at the beginning
of each carrier cycle, and then multiplying to the carrier
signal, the correct average output voltage is obtained. A block
diagram with this control strategy is illustrated in Fig. 5 for one
power cell. Each cell is controlled in the same way, with the
corresponding phase shift between carriers.

B. Modified Level Shifted or Phase Disposition PWM

(LS-PWM)
This modulation method is the logical extension of sine-tri-
angle PWM for multilevel inverters, in which carriers are Fig. 9. Alternative implementation of the dc-link ripple feedforward compen-
needed for a -level inverter. They are arranged in vertical shifts sation: (a) for PS-PWM and (b) for LS-PWM.
56 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 1, JANUARY 2008

Fig. 10. Seven-level cascaded H-bridge inverter: (a) power circuit and (b) laboratory prototype.

Fig. 11. Experimental results (with alternative implementation) comparison of dc-link voltage of one cell, output voltage and load current for: (a) traditional
PS-PWM and (b) proposed dc-link ripple feedforward PS-PWM.

in continuous bands defined by the levels of the inverter (there-
fore the name level shifted). Each carrier has the same frequency
and amplitude. A single voltage reference is compared to the
carrier arrangement, and the level associated to the carrier im-
mediately below the reference will be generated by the con-
verter. LS-PWM is specially used for NPC inverters, since each
carrier can be easily associated to each switching device.
A qualitative example of LS-PWM operating with ideal
dc-link voltages is illustrated in Fig. 6(a). Considering real
dc-link conditions, the same phenomena of PS-PWM appears.
In order to correct this method, each carrier must be modified
considering the two adjacent measured dc levels, since the
output voltage will switch between those levels when the refer-
ence crosses over and under the carrier signal. Therefore each
carrier has to be multiplied by the associated dc-link voltage
(previously normalized), and then added to the real lower level
to introduce the necessary level shift [see Fig. 6(b)]. A block
diagram with the control strategy is illustrated in Fig. 7 for
a 5-level NPC inverter. Note that two adjacent voltage levels
are measured, normalized, subtracted to compute the dc-link
voltage and then multiplied to the carrier and finally added to
the corresponding offset to generate the level shift.
KOURO et al.: MULTICARRIER PWM WITH DC-LINK RIPPLE FEEDFORWARD COMPENSATION
Fig. 12. Experimental results comparison of output voltage and load current spectrum for: (a) traditional PS-PWM and (b) proposed dc-link ripple feedforward
PS-PWM.
C. On the Stability of the Feedforward Method
According to classic control theory, a feedforward mecha-
nism does not affect the stability of the original control loop.
The only design restrictions are that the feedforward transfer
function has to be stable, proper, and invert the disturbance
signal [24]. Moreover, the implementation presented in this
paper is an open loop modulation technique, where the feedfor-
ward strategy only changes the gain of the modulator according
to the instantaneous ripple content of the dc-link. In this case
the feedforward function used are only arithmetical operators
(multiplications or divisions), hence they do not affect stability
and frequency response of the original loop. In fact, closed loop
controllers are designed considering constant dc-links, thus, the
feedforward compensation makes this theoretical assumption
more real in practice, so that the stability and frequency re-
sponse of the control system is closer to the theoretical design.
IV. SIMULATION
Simulation results for a 9-level inverter with the modified
PS-PWM and LS-PWM are presented in Fig. 8(a) and (b), re-
spectively. A 30 Hz output voltage reference with a modula-
tion index of 0.95 was compared to the online corrected carrier
arrangements (in the PS-PWM case only the positive carriers
of the four cells are illustrated). Note how the carrier signals
present low frequency ripple introduced by the dc-link feedfor-
ward strategies. The output voltages have duty cycles that com-
pensate the dc-link variations, this can be more effectively ap-
preciated in their respective spectra, where no low frequency
components are present in comparison to the traditional result
shown in Fig. 3. In addition, not only dc-link ripple is rejected,
but also the fundamental component is exactly generated with
an error of approximately 0.04% in both cases (it appears trun-
cated in the voltage spectrum, due to the scale selected to high-
light the harmonic content). Finally, it can be observed that the
load currents are completely sinusoidal without low frequency
distortion.
V. ALTERNATIVE IMPLEMENTATION APPROACH
Considering that usually carriers and modulators are already
available in DSP control boards, and that the PWM strategies
57
are already implemented, it is not straight forward to adapt ex-
isting algorithms to introduce the multiplication of the dc-link
measurement directly to the carrier signal. Instead, by inter-
preting the proposed solution in an inverse way, by modifying
the reference signal, the same feedforward mechanism can be
performed leading to a much simpler implementation of the pro-
posed method. This can be achieved by dividing the reference
with the feedforward values instead of multiplying the corre-
sponding carriers. The modified control diagram for PS-PWM
and LS-PWM are illustrated in Fig. 9(a) and (b), respectively,
using this alternative implementation.
VI. EXPERIMENTAL RESULTS
Experimental results with a 7-level cascaded H-bridge
inverter, like the one shown in Fig. 10, were performed to
validate theory and simulation. The traditional PS-PWM and
the proposed feedforward strategy were implemented using
a Dspace-DSP control board using a FPGA for the interface
with the inverter semiconductor devices. Results for regular
PS-PWM and the modified PS-PWM (using the alternative im-
plementation) are presented in Fig. 11(a) and (b), respectively,
to compare the improvement achieved with the feedforward
strategy.
The dc-link voltage of one particular power cell of the in-
verter is shown, which delivers 1/3 of the total power to the load,
and consequently 1/3 of the total ripple. For this experiment a
small capacitor of only 1000 is used per dc-link, to specially
generate higher ripple. Note how traditional PS-PWM employs
a sinusoidal reference waveform compared directly with the
carrier signal. On the contrary, in the proposed method, the
dc-link ripple is included in the reference signal which seems
distorted proportionally to the ripple. Both methods generate
similar multilevel output voltage waveforms, with the difference
that the proposed method corrects the duty cycles accordingly to
the dc-link ripple fluctuation, obtaining a completely sinusoidal
waveform in the load current. On the other hand, the traditional
PS-PWM presents considerable low frequency harmonics in the
load current transmitted from the dc-links (of all the power cells)
through the modulation. This can be confirmed by comparing
the load current THDs shown in Fig. 11, where the feedforward
58
method achieves 75% lower distortion compared to the tradi-
tional case.
This effect can be more clearly appreciated in the frequency
domain. The output voltage and load current spectra are shown
in Fig. 12. It is clear that the proposed feedforward method
rejects the low order harmonics already in the output voltage,
leading to a pure sinusoidal load current waveform. This con-
trasts with regular PS-PWM where the low order harmonics are
completely transmitted to the load.
VII. CONCLUSION
A dc-link ripple feedforward compensation technique based
on multicarrier PWM for multilevel inverters is presented. The
method is adapted to level shifted and phase shifted PWM. The
main achievements are: dc-link voltage ripple harmonics rejec-
tion and reference fundamental component tracking.
The compensation provided by both methods can reduce size
in dc-link capacitors or enable load operating conditions before
more restricted due to load current distortion. Also the output
filter design (if used) can be relaxed, since no low frequency
harmonics are present, hence high frequency components can
be easily filtered. The main application scope for these methods
are high power open loop powered systems.
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Samir Kouro (S’04) was born in Valdivia, Chile, in
1978. He received the Engineer and M.Sc. degrees
in electronics engineering from the Universidad Téc-
nica Federico Santa María (UTFSM), Valparaíso,
Chile, in 2004, where he is currently working toward
the Ph.D. degree.
In 2004, he joined the Electronics Engineering De-
partment UTFSM as Research Assistant. In 2004 he
was distinguished as the youngest researcher of Chile
in being granted with a governmental funded research
project (FONDECYT) as Principal Researcher. His
research interests include power converters and adjustable speed drives
Pablo Lezana (S’06–M’07) was born in Temuco,
Chile, in 1977. He received the M.Sc. and Doctor
degrees from the Universidad Técnica Federico
Santa María (UTFSM), Valparaíso, Chile, in 2005
and 2006, respectively.
In 2007, he joined the Electrical Engineering De-
partment, at UTFSM as a Researcher. His research
interests include power converters and modern dig-
ital control devices (DSPs and FPGAs).
Mauricio Angulo was born in Osorno, Chile, in
1973. He is currently working toward the Electrical
Engineering degree at the Universidad Técnica
Federico Santa María, Valparaiso (UTFSM), Chile.
In 2006, he collaborated as a Research Assistant
in the Electronics Engineering Department at the
UTFSM. His research interests include power
converter control techniques, especially multilevel
converters and active filters
KOURO et al.: MULTICARRIER PWM WITH DC-LINK RIPPLE FEEDFORWARD COMPENSATION
José Rodríguez (M’81–S’83–SM’94) received the
Engineer and the Dr.-Ing degrees from the Univer-
sity Federico Santa María, Valparaíso, Chile, and the
University of Erlangen, Germany, in 1977 and 1985,
respectively, both in electrical engineering.
He works as a Professor since 1977 at the Uni-
versity Federico Santa María where, from 2001 to
2004, he was appointed Director of the Electronics
Engineering Department, from 2004 to 2005, he
served as Vice-Rector of academic affairs, and in
2005 he was elected Rector, a position he currently
holds. During his sabbatical leave in 1996, he was responsible for the mining
division of Siemens Corporation in Chile. He has a large consulting experi-
ence in the mining industry, especially in the application of large drives like
59
cycloconverter-fed synchronous motors for SAG mills, high power conveyors,
controlled ac drives for shovels and power quality issues. His main research
interests include multilevel inverters, new converter topologies and adjustable
speed drives. He has directed over 40 R&D projects in the field of industrial
electronics. He has coauthored over 50 journal and 130 conference papers and
contributed with one book chapter. His research group has been recognized as
one of the two centers of excellence in engineering in Chile in the years 2005
and 2006.
Prof. Rodriguez is an active Associate Editor of the IEEE Power Electronics
and Industrial Electronics Societies since 2002. He has served as Guest Editor
of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS in four opportuni-
ties [Special Sections on: Matrix Converters (2002), Multilevel Inverters (2002),
Modern Rectifiers (2005), and High Power Drives (2007)].