Sei sulla pagina 1di 13

2016

WORKBOOK
Detailed Explanations of
Try Yourself Questions

Electronics Engineering
Electronic Devices and Circuits
1 Energy Band and Transport
Phenomenon

T1 : Solution

dn ⎛ −1016 × (2 x) ⎞
J n = qDn = q × Dn × ⎜ ⎟ = –64 A/m
2
dx ⎝ L ⎠

T2 : Solution

For µ n = 700 cm2/Vsec


σ = nq µn = 1017 ×1.6 ×10–19 × 700 = 11.2 /cm
1
ρ= = 0.0893 Ω-cm
σ
1 1
Also, RH = − = 3
q ⋅ n 1.6 × 10 × 1017 = 62.5 cm /C
−19

I x ⋅ Bz ⋅ RH 10 −3 × 10 −5 × (−62.5)
Hall voltage VH = = = − 62.5 µV
t 10 −2

T3 : Solution

I x Bz 0.5 × 10−3 × 5 × 10 −2
VH = − =−
ρw 3 × 1021 × 1.6 × 10−19 × 4 × 10−2
VH = –1.3 µV

T4 : Solution

Given
l = 10 µm
J = 1 mA/µm2
V = 1V
µn = 1350 cm2/Vsec

www.madeeasypublications.org © Copyright
Workbook 3

As we know
J = nq µE
1 × 10 −3 −19 1
= η × 1.6 × 10 × 1350 ×
−4 2
(10 ) 10 × 10− 4
η = 4.629 × 1017/cm3

T5 : Solution

Here Ei is not exactly as in the middle of the gap because the density of states NC and NV are different.
NV are different
E −E
− C i −Eg / 2 kT
NC ⋅ e kT = NC NV e = ni
* 3/4

EC − E i + E g / 2 NV ⎛ mp ⎞
kT
= =⎜ *⎟
e NC ⎝ mn ⎠

Eg 3 ⎛ mp* ⎞ 3 ⎛ 0.56 ⎞
− (EC + E i ) = kT ⋅ ⋅ l n ⎜ * ⎟ = 0.0259 ⋅ ⋅ ⎜ ⎟ = –0.013 eV
2 4 m
⎝ n⎠ 4 ⎝ 1.1 ⎠

kT
So Ei is about below the centre of the band gap.
2

„„„„

© Copyright www.madeeasypublications.org
2 P-N junction diode

T1 : Solution

⎛ Dp D ⎞
I = qA ⎜ pn + n np ⎟ (eqV / kT − 1) = Io (eqV /kT – 1)
⎝ Lp Ln ⎠

ni2 (1.5 × 1010 )2


pn = = = 2.25 × 105 cm−3
nn 1015
ni2 (1.5 × 1010 )2
np = = = 2.25 × 103 cm−3
pp 1017
For minority carriers,

kT
Dp = µ = 0.0259 × 450 = 11.66 cm2/s on the n side
q p

kT
Dn = µ = 0.0259 × 700 = 18.13 cm2/s on the p side
q n

Lp = Dp τ p = 11.66 × 10 × 10 −6 = 1.08 × 10–2 cm

Ln = Dn τn = 18.13 × 0.1 × 10 −6 = 1.35 × 10–3 cm

⎛ Dp D ⎞
Io = qA ⎜ pn + n np ⎟
⎝ Lp Ln ⎠

⎛ 11.66 18.13 ⎞
= 1.6 × 10−19 × 0.0001 ⎜ 2.25 × 105 + 2.25 × 103 ⎟
⎝ 0.0108 0.00135 ⎠

www.madeeasypublications.org © Copyright
Workbook 5

= 4.370 × 10–15 A
I = Io (e0.5/0.0259 – 1) ≈ 1.058 × 10–6 A in forward bias.
I = –Io = –4.37 × 10–15 A in reverse bias.

T2 : Solution

Built in voltage, with no. external voltage applied the voltage (V0) across the p-n junction is given by

⎛N N ⎞
Vo = Vτ l n ⎜ A D ⎟
⎝ n2i ⎠

⎛ 17 16 ⎞
Vo = 25 mV l n ⎜ 10 × 10 ⎟

( 0 2⎟
⎝ 1.5 × 10 ⎠ )
⇒ 25 × 29.12 mV
Vo ⇒ 728 mV
width of the depletion region.

2ε 0 ⎛ 1 1⎞
Wdep = xn + xp = + V = 0.32mm ...(i)
q ⎝ N A ND ⎠⎟ 0

xn N
= A =
1017
= 10 ...(ii)
xp ND 1016
xn = 10 xp
By solving equation (i) and (ii)
xp = 0.03 µm and xn = 0.29 µm

T3 : Solution

I = I0 + IR

dI d I 0 d IR
⇒ = +
dT dT dT
Given:

1 d I0 1 dI
× = 11%/°C and × = 7% / °C
I 0 dT I dT

⎛ 1⎞ d I ⎛ 1 ⎞ dI
or I⎜ ⎟ × = I0 ⎜ ⎟ × 0 (Q R is temp independent)
⎝ I ⎠ dT ⎝ I 0 ⎠ dT

and I = I0 + IR = 5 µA
⇒ I0 = 3.18 μA and IR = 1.82 µA

© Copyright www.madeeasypublications.org
6 Electronics Engineering • Electronic Devices and Circuits

10
∴ R= = 5.494 MΩ
IR

T4 : Solution

1
C= Linearly graded
(Vj )1/ 3

1/ 3
C1 ⎛V ⎞
= ⎜ 2⎟
C2 ⎝ V1 ⎠

C2 = 8.939 pF
Decrease in capacitance = 10 – 8.939 = 1.06 pF

T5 : Solution

( i)) I1 + I2 = 10 mA = 0.01 A
The current through D1 is
V / ηV
I1 = I01 e 1 T

0.01 – I2 = I01 eV1 / ηVT ...(i)

Also I02 = 10 I 0 ...(ii)


1

Therefore,
Current through D2 is
I2 = 10 I01 e (V1 − V ) / ηVT ...(iii)
From (i) and (iii)
I2 = 10 (0.01 – I 2) e −V / ηVT
⎛ I2 ⎞
V = −ηVT l n ⎜ 0.01 − I × 10 ⎟
⎝( 2) ⎠
V = 95.54 mV

⎛ I2 ⎞
(i i) 50 × 10–3 = −0.0259 l n ⎜ ⎟ = 10 (10 – I2) –6.9 I2 = 0
⎝ 10 (10 − I 2 ) ⎠

I2 = 5.918 mA

„„„„

www.madeeasypublications.org © Copyright
3 Bipolar Junction Transistor

T1 : Solution

IB = 7.5 µA
IC = 400 µA

IC
β= = 53.33
IB

β 53.33
and α= = = 0.98
1+ β 1 + 53.33

T2 : Solution

( )
IE = ICO eVBE / ηVT − 1 = 73.93 mA
IC = α IE = 72.4 mA

T3 : Solution

Bipolar junction transistors have two junctions (emmiter base junction (EBJ) and collector base junction
(CBJ)). From this we have four modes of operations as follows:

EBJ CBJ Operational region


FB RB Active
FB FB Saturation
RB RB Cutoff
RB FB Inverse active

© Copyright www.madeeasypublications.org
8 Electronics Engineering • Electronic Devices and Circuits

The Ebers-Moll model:

⇒ This model in valid for both forward and reverse static voltages applied across the transistor
junctions. It should be noted that we have omitted the base-spreading resistance and have neglected
the difference between ICBO and ICO .

⇒ The Ebers-Moll model for a p-n-p transistor is shown below:

αI IC αN IE

IE IC
P N N P
E C

I′ (–IEO) IN (–ICO) I

VE B VC

⇒ It consists two ideal diodes connected back to back with reverse saturation currents –IEO and –ICO
and two dependent current-controlled current sources shunting the ideal diodes. For a p-n-p BJT,
ICO and IEO are negative so that –ICO and –IEO are having (+)ve values.
Now apply KCL to the collector node of given figure above,

(
V /V
IC = – αNIE + I = – αNIE + I0 e c T − 1 ) ...(1)

where, I = Diode current


I0 = –ICO and aN = current gain in normal operation

∴ (
IC = – αNIE – ICO eVc/VT − 1 ) ...(2)

Subscript ‘N’ denotes the transistor used in the normal manner. If we assume inverted mode then new eqn
formed is,

(
V /V
IE = – αI IC – IEO e e T − 1) ...(3)

where, αI = inverted common-bare current gain


⇒ A physical analysis by using Ebers-Moll model reveals that the parameters aN, aI, ICO and IEO are not
independent, but are related by the condition,
αI ICO = αN IEO ...(4)
Since, IB = –(IE + IC) ...(5)
If three of 4-parameters (αN, αI, ICO and IEO) are known then Ebers-Moll equations allow calculations of the
three currents for given values of junction voltages VC and VE also then we determine the mode of operations.

„„„„

www.madeeasypublications.org © Copyright
4 Field Effect Transistor

T1 : Solution

P = VDS IDS = 36 × 10–3


IDS = 6 mA
VDS > VGS – VT
So, saturation region

µn Co x ⎛W ⎞ 2
IDS = ⎜⎝ ⎟⎠ (VGS − VT ) = 6 × 10
–3
2 L

W
= 0.143
L

T2 : Solution

Given K = β = 10–4 Am/V2


VT = 1V IDS = 0.5 mA
ID = k(VGS – VT)2
5 × 10–4 = 10–4 (VGS – 1)2
∴ VDS = VGS = 5 + 1
VDS = 3.24 V

VDD − VDS 10 − 3.24V


Value of RD = ; RD =
IDS 0.5 × 10 −3
RD = 13.52 kΩ

© Copyright www.madeeasypublications.org
10 Electronics Engineering • Electronic Devices and Circuits

T3 : Solution

VGS = 0 V

20 − 10
Idss = = 10 mA
1kΩ

T4 : Solution

For saturation region

K K′ W
Id = (Vgs − VT )2 ; n × (Vds )2 ...(i)
2 2 L

W
and gm = Kn′ × × Vds ...(ii)
L
From equation (ii)

W gm 1 × 10−3
= =
L 2 × Kn′ × Vds 50 × 10 −6 × Vds

W 20
= ...(iii)
L Vds

K n′ 20 2
Id = × × Vds
2 Vds
overdrive voltage = Vds = 0.2 V

W
and = 100
L

VDD
T5 : Solution

1 W RD
Given K= K′
2 L
1 W RG
and ID = Kn′ (VGS − VT )2
2 L
From the above figure
ID = K(VSS – RS ID – VT)2
RS
∂I D ∂I
= (VSS − RS ID − VT )2 + 2K (VSS − RS ID − VT ) (−Rs ) D
∂K ∂K
VSS
∂I D ID I ∂I
= − 2Rs D ⋅ K ⋅ D
∂K K K ∂K
∂ID
∂K
(
1 + 2 K I D Rs )= ID
K
∂I D K 1
SKID = ⋅ =
∂ K I 1 + 2 K I D ⋅ Rs

www.madeeasypublications.org © Copyright
Workbook 11

T6 : Solution

⎛N ⎞ ⎛ 1.5 × 1017 ⎞
((i)) Ψinv. = 2VT ⋅ l n ⎜ A ⎟ = 2 × 26 × 10 −3 l n ⎜ ⎟
⎝ ni ⎠ ⎝ 1.5 × 1010 ⎠

= 2 × 26 × 10–3 × 7 ln10 = 0.838 V

∈i 4 × 8.854 × 10−12
( ii)) Ci = = = 1.77 × 10–3 F/m2
d 0.02 × 10−6

T7 : Solution

εo εSiO2
Co x = F/m2 = 3.45 × 10–3 F/m2
to x

kT N ⎛ 1016 ⎞
Φf = l n A = 0.0259 l n ⎜ ⎟ = 0.348 V
q ni ⎝ 1.5 × 1010 ⎠

Maximum depletion width occurs when gate potential is 2Φf , after that depletion width does not change.

2εSi εo 2Φf
∴ Wmax = = 0.301 × 10 −6 m
qN A

εSi × εo
Cdmin = = 3.47 × 10–4 F/m2
Wmax

Cgate = Co x = 3.45 × 10–3 F/m2


Cgate max = 345.15 nF/cm2

Cgate min =
Co x ⋅ Cdmin
= 0.315 × 10–3 F/m2 = 31.5 nF/cm2
Co x + Cdmin

„„„„

© Copyright www.madeeasypublications.org
5 Power Swithcing Device

T1 : Solution

Device Symbol Characteristics

(i) Diode A K Va
p–n

Ig3 > Ig2 > Ig1 > Ig0


Ia I

(ii) Thyristor A K Va
G VBO

Ia

(iii) GTO A K Va
G

Ia

–Va
(iv) Triac MT1 Va
MT2

–Ia

www.madeeasypublications.org © Copyright
Workbook 13

T2 : Solution

Requirements for an SCR to be triggered by a gate pulse.


• SCR should be forward bias mode.
• A positive gate voltage between gate and cathode.
• The gate pulse width should be chosen to ensure that anode current rises above the latching current.

T3 : Solution

iA

iL iR

R1 20 Ω
V = 100 V R2 = 5 RΩ

0.5H

Current through 5 kΩ resistor

V 100
iR = = = 20 mA = 0.02 A
R2 5 × 103

Current through inductor

iL =
V
R1
( )
1 − e −R1 Lt =
100
20
(
1 − e 20/0.5t ) = 5(1 – e –40t )

Anode current
Ia = iR + iL = 0.02 + 5(1 – e–40t )
Let minimum pulse width is T
To turn on ia ≥ latching current
⇒ 0.02 + 5(1 – e–40t ) = 50 mA = 0.5
T = 150 μsec

„„„„

© Copyright www.madeeasypublications.org

Potrebbero piacerti anche