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1.

[ECE 2004: 1 Mark] The figure shows the internal a) M1 = (P OR Q) XOR R


schematic of a TTL AND-OR-Invert (AOI) gate. For
the inputs shown in the figure, the output Y is b) M1 = (P AND Q) XOR R

c) M1 = (P NOR Q) XOR R
A
d) M1 = (P XOR Q) XOR R
B

Y
inputs are 6. [ECE 2010: 1 Mark] Match the logic gates in
floating Column A with their equivalents in Column B.

P. 1.
a) 0 b) 1 c) AB d) AB
2. [ECE 2004: 2 Marks] A Boolean function f of two
variables x and y is defined as follows:
f(0,0) = f(0,1) = f(1,1) = 1; f(1,0) = 0 Q. 2.
Assuming complements of x and y are not available,
a minimum cost solution for realizing f using only 2-
input NOR gates and 2-input OR gates (each having
unit cost) would have a total cost of R. 3.

a) 1 unit b) 4 unit c) 3 unit d) 2 unit


3. [ECE 2005: 2 Marks] The number of product S. 4.
terms in the minimized sum-of-product expression
obtained through the following K-map is (where, d
denotes dont care states) a) P-2, Q-4, R-1, S-3

b) P-4, Q-2, R-1, S-3

1 0 0 1 c) P-2, Q-4, R-3, S-1


0 d 0 0
d) P-4, Q-2, R-3, S-1
0 0 d 1
1 0 0 1
7. [ECE 2010: 1 Mark] For the output F to be 1 is
a) 2 b) 3 c) 4 d) 5 the logic circuit shown, the input combination should
be
4. [ECE 2006: 2 Marks] The point P in the following
figure, is stuck-at-1. The output f will be

A
A
B f B
P

F
C
C

a) ABC b) A c) A B C d) A
5. [ECE 2008: 2 Marks] Which of the following
Boolean expressions correctly represents the relation a) A = 1, B = 1, C = 0
between P, Q, R and M1 ?
b) A = 1, B = 0, C = 0

c) A = 0, B = 1, C = 0
P
X
Q d) A = 0, B = 0, C = 1
Z
M1

Y 8. [ECE 2011: 1 Mark] The output Y in the circuit


below is always 1 when
R
P ns. Let A = C = 0 and B = 1 until time t = 0. At
t = 0, all the inputs flip (i.e., A = C = 1 and B =
0) and remain in that state. For t > 0, output Z =
Q 1 for a duration (in ns) of
Y

A
R
B

Z
C
a) two or more of the inputs P, Q, R are 0
13. [ECE 2015: 1 Mark,Set-2] In the figure shown,
b) two or more of the inputs P, Q, R are 1 the output Y is required to be Y = A B + C D. The
gates G1 and G2 must be, respectively,
c) any odd number of the inputs P, Q, R is 0

d) any odd number of the inputs P, Q, R is 1 B


G1
9. [ECE 2013: 1 Mark] A bulb in a staircase has two A
switches, one switch being at he ground floor and the G2 Y
other one at the first floor. The bulb can be turned C
ON and also can be turned OFF by any one of the D
switches irrespective of the state of the other switch.
The logic of switching of the bulb resembles. a) NOR, OR b) OR, NAND

a) an AND gate b) an OR gate c) NAND, OR d) AND, NAND


14. [ECE 2015: 1 Mark,Set-3] In the circuit shown,
c) an XOR gate d) a NAND gate
diodes D1 , D2 and D3 are ideal, and the inputs E1
10. [ECE 2014: 2 Marks,Set-1] The output F in the ,E2 and E3 are 0 V for logic 0 and 10 V for logic 1.
digital logic circuit shown in the figure is What logic gate does the circuit represent?

D1
A E1
B
D2
F
E2

D3
E3 Vo
Z

1 k
a) F = X Y Z + X Y Z b) F = X Y Z + X Y Z

c) F = X Y Z + X Y Z d) F = X Y Z + X Y Z
10V
11. [ECE 2014: 1 Mark,Set-4] In the circuit shown
in the figure, if C = 0, the expression for Y is

a) 3-input OR gate b) 3-input NOR gate

C c) 3-input AND gate d) 3-input XOR gate

A 15. [ECE 2016: 1 Mark,Set-1] The output of the


B combinational circuit given below is

Y
A

A
B
Y

a) Y = A B + A B b) Y = A + B C
B
c) Y = A + B d) Y = A B
a) A+B+C b) A(B+C)
12. [ECE 2015: 2 Marks,Set-1] All the logic gates
shown in the figure have a propagation delay of 20 c) B(C+A) d) C(A+B)

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16. [ECE 2016: 1 Mark,Set-3] The minimum num-
ber of 2-input NAND gates required to implement a
2-input XOR gate is

a) 4 b) 5 c) 6 d) 7

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