Advanced Logic Circuits Design

2 Types of Digital logic circuits

COMBNATIONAL LOGIC CIRCUITS
COMBNATIONAL LOGIC CIRCUITS

- Is a type circuit in which the output is safely dependent on the

input combinations
- Implies an open-loop type system
One that does not implies feedback.

Refers to the portion of the output return back to the

input.
- Once output is generated, there`s no way we can look back at
the inputs.
- Because of this, it is said that combinational logic circuit has no
storage capability
Since it doesn`t uses memory elements
SEQUENTIAL LOGIC CIRCUIT
SEQUENTIAL LOGIC CIRCUIT

- Consists of a feedback path and employs some memory elements

SEQUENTIAL CIRCUIT = COMBINATIONAL LOGIC + MEMORY ELEMENTS

- Implies CLOSED LOOP SYSTEM

It implies feed backing.
- Output is not dependent on the input only but also to the input history
(Previous input)
By applying the use of memory elements

It is capable of storing bits of information

- It needs a special external input signal called CLOCK.
- It has states (transitory change of the circuit behavior / condition)

CLOCK is an external (circuit) input signal that prevents the sequential circuit (F/F) from changing states
at a right time.
2 TYPES OF SEQUENTIAL LOGIC CIRCUITS

1) SYNCHROUS - a type of sequential circuit in

which the outputs change only at
specific time.

2) ASYNCHRONOUS a type of sequential circuit in

which the outputs change at any
time.
CLASSES OF SEQUENTIAL CIRCUITS

A. MULTIVIBRATORS
- Bistable (2 stable states)
2 types of bistable logic devices:
- LATCHES
- FLIP-FLOPS (F/F)
*LATCHES and FLIP-FLOPS differ in the method used for
changing their state.
- Monostable or one short (1 stable state)
- Astable (no stable state)
.
MEMORY ELEMENT- a device which can remember value indefinitely, or
change value on command from its inputs

FLIP-FLOP is a bistable device whose complementary output depends on

the sequence of output pulses.

CLOCKING provides a means of triggering for the F/F to cause a transition

TRIGGERING a momentarily change of the input signal that causes the

F/F to change its state.
2 WAYS OF CLOCKING

1) LEVEL CLOCKING it is a type of triggering in which the output of the F/F respond to the level (HIGH
OR LOW) of the clock, sometimes called PULSE-TRIGGERED

Clock pulse

2) EDGE-TRIGGERING-depends on the rising or falling of the edge of the clock

Rising edge Falling edge
WHAT IS THE DIFFERNCE OF LATCH FROM FLIP-FLOP?

Latches and Flip-Flop differ in the method used for changing

their state. Latches use PULSE-TRIGGERED while F/F uses EDGE-
TRIGGERED.
2 BASIC APPROACHES IN EDGE-TRIGGERING

1) POSITIVE-EDGE TRIGGER
- Output/transition occurs in the positive going edge of the
clock.
(ON = from 0 to 1; OFF = other time)

2) NEGATIVE-EDGE TRIGGER
- Output/transition occurs in the negative going edge of the clock.
(ON = from 1 to 0; OFF = other time)
FLIP-FLOPS
- Are the building blocks of a sequential circuits
- Are storage elements
1 F/F can store 1 bit of information
- Are bistable device
It has 2 stable states

State 0 State 1
- Are edge-trigger sensitive device
4 TYPES OF FLIP-FLOP

R-S F/F (Reset-Set)

D F/F (Delay/Data)

JK F/F (Similar to R-S but does not have ambiguous state)

T F/F (Toggle F/F)

R-S FLIP-FLOP

Characteristics
- It has 2 asynchronous inputs, such as RESET and SET
- It has 2 outputs in which the output is the complement of the
other (Q or Q)
- The ambiguous type of F/F
Confusing (if both R and S inputs are high)
- This F/F encounter a RACE condition
Whenever two inputs are high,
the F/F goes on undermined STATE
LOGIC DIAGRAM

LOGIC CIRCUIT DIAGRAM

CHARACTERISTIC TABLE a table that provides information about a particular F/F in a given input condition (s)

Remains the same from the last state

(Race)
2 TYPES OF CLOCK STATE TRANSITION IN F/F

1) PRESENT STATE (Qn or Q(t))

- is a state if the F/F before the arrival / application/occurrence of the clock pulse.

2) NEXT STATE (Qn + 1 or Q(t + 1))

- is the state of the F/F after the occurrence of the clock pulse
Clocked R-S F/F
Positive Edge Triggered
Negative-Edge Triggered
R-S WAVEFORMING

1S = 1
X=0

1S = 0
X=1
D FLIP-FLOP

Characteristics
- A modified version of R-S F/F
- It has a single input but it has two outputs
wherein one output is the complement of the
other
- There`s no more race condition
- Whatever the input is, it will be the same as to
the output
LOGIC BLOCK DIAGRAM

LOGIC CIRCUIT DIAGRAM
CHARACTERISTIC TABLE:
Clocked D F/F
Positive Edge Triggered
Negative-Edge Triggered
D F/F WAVEFORMING DIAGRAM

1S =0

1S =1
Experiment # 1.

R-S F/F and D F/F Implementation

-Tabulated results of the data gathered
-Demonstrate 2 ways of clocking
- latching
- clocked

For the final circuit PCB etched using presensitized PCB to be submitted together with the final
experiment paper