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DESCRIPTION
A2
Dual center tab Schottky rectifier suited for High A1
K
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STPS40170C
Figure 1: Average forward power dissipation Figure 2: Average forward current versus
versus average forward current (per diode) ambient temperature ( = 0.5, per diode)
PF(AV)(W) IF(AV)(A)
22 22
d=0.05 d=0.1 d=0.2 d=0.5 d=1 Rth(j-a)=Rth(j-c)
20 20
18 18
16 16
14 14
12 12
Rth(j-a)=15C/W
10 10
8 8
6 6
T T
4 4
2 2
IF(AV)(A) d=tp/T tp d=tp/T tp Tamb (C)
0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 0 25 50 75 100 125 150 175
PARM (t p ) PARM (t p )
PARM (1s) PARM (25C)
1 1.2
0.1 0.8
0.6
0.01 0.4
0.2
t p (s) Tj (C)
0.001
0
0.01 0.1 1 10 100 1000 25 50 75 100 125 150
Figure 5: Non repetitive surge peak forward Figure 6: Relative variation of thermal
current versus overload duration (maximum impedance junction to case versus pulse
values, per diode) duration
IM(A) Zth(j-c)/Rth(j-c)
250 1.0
0.9
200 0.8
0.7
TC=50C d=0.5
150 0.6
0.5
TC=75C
0.3 d=0.1
TC=125C T
50 0.2
IM
Single pulse
0.1
t
t(s) tP(s) d=tp/T tp
d =0.5
0 0.0
1.E-03 1.E-02 1.E-01 1.E+00 1.E-03 1.E-02 1.E-01 1.E+00
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STPS40170C
Figure 7: Reverse leakage current versus Figure 8: Junction capacitance versus reverse
reverse voltage applied (typical values, per voltage applied (typical values, per diode)
diode)
IR(A) C(pF)
1.E+05 1000
F=1MHz
VOSC=30mVRMS
Tj=150C
Tj=25C
1.E+04
Tj=125C
1.E+03
Tj=100C
Tj=50C
1.E+01
Tj=25C
1.E+00
VR(V)
VR(V)
1.E-01 10
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 1 10 100 1000
Figure 9: Forward voltage drop versus forward Figure 10: Forward voltage drop versus
current (per diode, low level) forward current (per diode, high level)
IFM(A) IFM(A)
20 1000
18
16 Tj=125C
(Maximum values)
Tj=125C
14 (Maximum values)
100
12 Tj=125C
(Typical values)
10 Tj=125C
(Typical values)
Tj=25C
8 (Maximum values)
10
6
4 Tj=25C
(Maximum values)
2 VFM(V) VFM(V)
0 1
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
Rth(j-a) (C/W)
80
DPAK
70
60
50
40
30
20
10
SCU(cm)
0
0 5 10 15 20 25 30 35 40
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STPS40170C
DIMENSIONS
REF. Millimeters Inches
A
Min. Max. Min. Max.
E
C2 A 4.40 4.60 0.173 0.181
L2
A1 2.49 2.69 0.098 0.106
A2 0.03 0.23 0.001 0.009
D B 0.70 0.93 0.027 0.037
L
B2 1.14 1.70 0.045 0.067
L3 C 0.45 0.60 0.017 0.024
A1
C2 1.23 1.36 0.048 0.054
B2
C R D 8.95 9.35 0.352 0.368
B
E 10.00 10.40 0.393 0.409
G G 4.88 5.28 0.192 0.208
L 15.00 15.85 0.590 0.624
A2
L2 1.27 1.40 0.050 0.055
L3 1.40 1.75 0.055 0.069
M
* V2
M 2.40 3.20 0.094 0.126
R 0.40 typ. 0.016 typ.
* FLAT ZONE NO LESS THAN 2mm V2 0 8 0 8
16.90
10.30 5.08
1.30
3.70
8.90
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STPS40170C
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STPS40170C
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com.
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STPS40170C
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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