ECE65 - W12 Amp Prob PDF

Problems for Amplifier Section
Lecture notes: Sec. 6
F. Najmabadi, ECE65, Winter 2012

Exercise 1: Find the bias point and the amplifier parameters of the circuit
below. (Si BJT with = 200, VA = 150 V, ignore Early effect in bias
calculations).
This is a common collector amplifier

(emitter follower) .
o Input at the base, output at the emitter.
It has a emitter-degeneration bias with a
voltage divider.

calculations).
Real circuit Thevenin form of the

Bias circuit
Voltage divider
RB = 22 k || 18 k = 9.90 k
22 k
VBB = 9 = 4.95 V
22 k + 18 k
calculations).
Bias Calculations
Thevenin form of the
RB = 9.9 k VBB = 4.95 V Voltage divider
Assume BJT is in Active :

VBE = 0.7 V, I C > 0 and VCE 0.7 V
BE KVL : 4.95 = I B RB + VBE + I E RE

4.95 = 9.9 103 I E /( + 1) + 0.7 + 103 I E
I E = 4.05 mA I C
IC 4.05 10-3
I B = I C / = 20.3 A gm = = = 156 mA/V
VT 26 10 -3
CE KVL : 9 = VCE + I E RE ro
VA
=
150
= 37.0 k
9 = VCE + 4 10 3 103 I C 4 x 10-3
VCE = 5 V > VD 0 = 0.7 V VT
r = = = 1.28 k
IB gm
calculations).
Real circuit Signal circuit

calculations).
Amplifier Parameters
This is a common collector amplifier
(emitter follower)
vo g m (ro || RE || RL )
Av = =
vi 1 + g m (ro || RE || RL )
g m (ro || RE || RL ) = 156 10 3 (38.8k || 1k || 100k) = 151
151
Av = 1
1 + 151
Ri = RB || [r + (1 + )(ro || RE || RL )]
g m = 156 mA/V
Ri = 9.9k || [1.3k + 194k ] 9.9k
ro = 38.8 k
r = 1.28 k
r + RB || Rsig r
Ro = ro || = ro || = 6.4

calculations).
(Cut-off frequency)
1
f p1 =
2 ( Ri + Rsig )Cc1
1
f p1 = = 34.2 Hz
2 (9.9 103 + 0) 0.47 10 6
1
f p2 =
2 ( Ro + RL )Cc 2
g m = 156 mA/V 1
f p2 = = 3.39 Hz
Ri = 9.9k 2 (6.4 + 100 103 ) 0.47 10 6
ro = 38.8 k
r = 1.28 k Ro = 13
f p f p1 + f p 2 = 34.2 + 3.4 = 37.6 Hz

calculations).
This is a common emitter amplifier with

RE .
o Input at the base, output at the collector.
It has a emitter-degeneration bias with a
voltage divider.

calculations).
Thevenin form of the

Real circuit Bias circuit Voltage divider
RB = 34 k || 5.9 k = 5.0 k
5.9 k
VBB = 15 = 2.22 V
34 k + 5.9 k
calculations).
Bias calculations Thevenin form of the

RB = 5.0 k VBB = 2.22 V Voltage divider

VBE = 0.7 V, I C > 0 and VCE 0.7 V
BE KVL : 2.22 = I B RB + VBE + I E RE

2.22 = 5.0 103 I E /( + 1) + 0.7 + 510 I E
I E = 2.84 mA I C
I B = I C / = 14.2 A IC 2.84 10-3
gm = = = 10.9 mA/V
VT 26 10 -3
CE KVL : 15 = I C RC + VCE + I E RE
VA 150
3
15 = VCE + 2.84 10 (10 + 510)
3 ro = = 52.8 k
I C 2.84 10 -3
VCE = 10.5 V > VD 0 = 0.7 V VT

r = = = 1.83 k
IB gm
calculations).

calculations).
This is a CE amplifier with RE
vo g m ( RC || RL )

vi 1 + g m R E + ( RC || RL ) / ro
RC || RL = 1 k || 100 k = 0.990k
vo 10.9 10 3 990
= = 1.64
vi 1 + 10.9 10 3 510 + 0.990 / 52.8
g m = 10.9 mA/V
ro = 52.8 k r = 1.83 k Ri RB || [r + (1 + ) RE ]
Ri = 5.0 k || [1.83 k + 201 0.51 k ] = 4.8 k
vo Ri v
Av = = o
vsig R i + R sig vi RE
Ro RC || ro 1 +
r + RE + RB || Rsig
4,800
Av = (1.64) = 1.59
4,800 + 100 Ro RC = 1.0 k
calculations).
Amplifier Cut-off frequency

(2 caps: 2 poles)
1
f p1 =
2 ( Ri + Rsig )Cc1
1
f p1 = = 6.91 Hz
2 (4.8 10 + 100) 4.7 10
3 6
1
g m = 10.9 mA/V f p2 =
2 ( Ro + RL )Cc 2
ro = 52.8 k r = 1.83 k
1
Ri = 4.8 k Ro = 1.0 k f p2 = = 15.8 Hz
2 (10 + 100 10 ) 100 10
3 3 9
f p f p1 + f p 2 = 6.9 + 15.8 = 22.7 Hz

calculations).
This is a PNP common emitter amplifier (no RE ).

o Input at the base, output at the collector (RE is
shorted out by a cap)
It has a emitter-degeneration bias with two
voltage sources.

calculations).
Real circuit Bias circuit VEB = 0.7 V, I C > 0 and VEC 0.7 V
BE KVL : 3 = 2.3 103 I E + VEB

I E = 1.0 mA I C
I B = I C / = 5.0 A
CE KVL : 3 = 2.3 103 I E + VEC + 2.3 103 I C 3

VEC = 6 4.6 10 3 103
VEC = 1.4 V > VD 0 = 0.7 V
IC 10-3
gm = = = 38.5 mA/V
VT 26 10-3
VA 150
ro = = 150 k
I C 10-3
VT
r = = = 5.26 k
IB gm
calculations).
Real circuit Signal circuit Amplifier Parameters

This is a CE amplifier with no RE
vo
= g m (ro || RC || RL )
vi
vo
= 38.5 10 3 (150 k || 2.3 k || 100 k ) = 85.3
vi
Ri v v
Av = o = o = 85.3
R i + R sig vi vi
Ri = RB || r = r = 5.26 k
Ro = RC || ro
g m = 38.5 mA/V
Ro = 150 k || 2.3 k = 2.27 k
ro = 150 k r = 5.26 k
F. Najmabadi, ECE65, Winter 2012 * Show f p f p1 + f p 2 = 67 + 16 = 82 Hz

Exercise 4: Find the bias point and the amplifier parameters of this circuit.
(nCox = 100 A/V2, (W/L) = 6/0.1, Vt = 0.5 V, = 0.1 V-1. Assume
capacitors are large and ignore channel width modulation in biasing. )
This is a MOS common source amplifier (no RS ).

o Input at the gate, output at the drain (RS is
shorted out by a cap)
It has a source-degeneration bias with voltage
divider.

Bias (capacitors are open circuit):
100k
I G = 0 VG = 1.8 = 1.353 V
33k + 100k
Assume Saturation
W 2
I D = 0.5 nCox VOV = 3x10 3VOV
2
L
GS-KVL: VG = VGS + RS I D = VOV + Vt + RS I D
1.353 = VOV + 0.5 + 2 103 3 10 3VOV

2
2
6VOV + VOV 0.853 = 0
VS = VG VGS = 0.550 V
VOV = 0.303 V
VD = 1.8 RD I D = 1.249 V
VGS = VOV + Vt = 0.803 V
VDS = VD VS = 0.699 V
I D = 3x10 3VOV
2
= 0.275 mA
VDS > VOV Saturation
This is a CS amplifier with no RS
vo
= g m (ro || RD || RL )
vi
vo
= 1.82 10 3 (36.3 k || 2 k || ) = 3.45
vi
Ri v v
Av = o = o = 3.45
R i + R sig vi vi
RG = 100k || 33k = 24.8 k
2I D 2 0.275 10- 3 Ri = RG = 24.8 k
gm = = = 1.82 mA/V
VOV 0.303
Ro = ro || RD
V 10
ro = A = = 36.3 k Ro = 36.3 k || 2 k = 1.90 k
I D 0.275 10 -3

calculations).
This is a common collector amplifier (emitter follower).

o Input at the base, output at the emitter.
It is biased with a current source!

calculations).
Real circuit Bias circuit VBE = 0.7 V, I C > 0 and VCE 0.7 V
I E = 4.3 mA I C
I B = I C / = 21.5 A
VE
VBE = 0 VE
VE = 0.7 V
VCE = 4 VE = 4.7 V > VD 0 = 0.7 V
IC 4.3 10-3
gm = = = 16.5 mA/V
VT 26 10-3
VA 150
ro = = 34.9 k
I C 4.3 10-3
VT
r = = = 1.21 k
IB gm
calculations).

This is an emitter follower (RE = )
vo g m (ro || RE || RL )
=
vi 1 + g m (ro || RE || RL )
ro || RE || RL = 34.9k || || 100k = 25.9k
g m (ro || RE || RL ) = 427
vo 427
Av = = 1
vi 1 + 427
Ri = RB || [r + (1 + )(ro || RE || RL )]
Ri = 1.2k + 201 25.9k = 5.2 M
g m = 16.5 mA/V
ro = 34.9 k r + RB || Rsig r
Ro RE || = 60.6
r = 1.21 k 1+

calculations).
Signal circuit
Cut-off frequency
1
fp =
2 [ RL + Ro ]Cc 2
1
fp = = 3.34 Hz
2 (100 103 + 61) 0.47 10 6
g m = 16.5 mA/V
ro = 34.9 k
r = 1.21 k

below. (pCox (W/L) = 400 A/V2, Vtp = 4 V, = 0.01 V-1. Ignore
channel width modulation in biasing).
This is a PMOS common drain amplifier.

o Input at the gate, output at the source.
It has a source-degeneration bias with two
voltage sources.
Assume Saturation
Real circuit Bias circuit W 2
I D = 0.5 p Cox VOV
L
GS-KVL:
13 = 10 4 I D + VSG = 10 4 I D + VOV + | Vtp |
10 4 0.5 400 10 6 VOV
2
+ VOV 9 = 0
2
2VOV + VOV 9 = 0
VOV = 1.9 V
I D = 0.5 400 10 6 VOV
2
= 0.71 mA
VSG = VOV + Vt = 5.9 V
2I D 2 0.71 10 3
gm = = = 0.747 mA/V VSG = VS 0 VS = 5.9 V
VOV 0.303
1 1 VSD = VS (5) = 10.9 V
ro = = = 141 k
I D 0.01 0.7110 3

This is a common collector Amp.
g m (ro || RS || RL )
Av = = 0.88
1 + g m (ro || RS || RL )
Ri = RG =
1
Ro = RS || = 10 k || 1.34 k = 1.2 k
gm
Cut-off frequency
1
fp =
2 [ RL + Ro ]Cc 2
1
fp = = 3.39 Hz
2 (100 103 + 1.2 103 ) 0.47 10 6
below. (nCox (W/L) = 800 A/V2, Vt = 1 V, = 0.01 V-1. Ignore
This is a NMOS common gate amplifier.

o Input at the source, output at the drain.
It has a source-degeneration bias with
voltage divider.
Bias circuit Assume Saturation

W 2
I D = 0.5 nCox VOV
L
GS-KVL: VG = 6 = VGS + 10 4 I D = VOV + Vt + 10 4 I D
VG 10 4 0.5 800 10 6 VOV

2
+ VOV 5 = 0
2
4VOV + VOV 5 = 0
VOV = 1.0 V
I D = 0.5 800 10 6 VOV

2
= 0.40 mA
1.2M VGS = VOV + Vt = 2.0 V

VG = 15 = 6 V
1.2M + 1.8M
DS-KVL: 15 = 10 4 I D + VDS + 10 4 I D
VDS = 15 4 4 = 7 V

This is a common gate Amp.
Av = g m (ro || RS || RL )
Av = 0.8 10 3 (250 k || 10 k || ) = 7.7
1 + ( RD || RL ) / ro
Ri = RS || = 1.1 k
gm
Ro = RD || [ro (1 + g m ( RS || Rsig )] 10 k
2I D 2 0.4 10 3 Cut-off frequency

gm = = = 0.80 mA/V
VOV 1 1 1
f p1 = f p2 =
ro =
1
=
1
= 250 k 2 [ Ri + Rsig ]Cc1 2 [ RL + Ro ]Cc 2
I D 0.01 0.4 10 3 f p = f p1 + f p 2 = 1.45 kHz + 22 Hz = 1.47 kHz
This is a NMOS common drain amplifier.

o Input at the gate, output at the source.
It is biased with a current source.
Bias circuit
I D = 0.71 mA
Assume Saturation
W 2
I D = 0.5 nCox VOV = 0.71 10- 3
VS L
VOV = 1.0 V
VGS = VOV + Vt = 4.0 V
VGS = VG VS VS = 0 VGS = 4.0 V
VDS = VD VS = 5 ( 4) = 9 V


This is a common collector Amp.
g m (ro || RS || RL )
Av = = 0.99
1 + g m (ro || RS || RL )
Ri = RG =
1
Ro = RS || = || 704 = 704
gm
2I D 2 0.71 10 3 Cut-off frequency

gm = = = 1.42 mA/V
VOV 1 1
fp =
1 1 2 [ RL + Ro ]Cc 2
ro = = = 141 k
I D 0.01 0.7110 3 1
fp = = 3.36 Hz
2 (100 10 + 704) 0.47 10
3 6

ECE65 - W12 Amp Prob PDF

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Problems for Amplifier Section

Lecture notes: Sec. 6

F. Najmabadi, ECE65, Winter 2012

This is a common collector amplifier

F. Najmabadi, ECE65, Winter 2012

Real circuit Thevenin form of the

Assume BJT is in Active :

BE KVL : 4.95 = I B RB + VBE + I E RE

Real circuit Signal circuit

F. Najmabadi, ECE65, Winter 2012

F. Najmabadi, ECE65, Winter 2012

This is a common emitter amplifier with

F. Najmabadi, ECE65, Winter 2012

Thevenin form of the

Bias calculations Thevenin form of the

Assume BJT is in Active :

BE KVL : 2.22 = I B RB + VBE + I E RE

VCE = 10.5 V > VD 0 = 0.7 V VT

Real circuit Signal circuit

F. Najmabadi, ECE65, Winter 2012

Amplifier Cut-off frequency

f p f p1 + f p 2 = 6.9 + 15.8 = 22.7 Hz

F. Najmabadi, ECE65, Winter 2012

This is a PNP common emitter amplifier (no RE ).

F. Najmabadi, ECE65, Winter 2012

BE KVL : 3 = 2.3 103 I E + VEB

CE KVL : 3 = 2.3 103 I E + VEC + 2.3 103 I C 3

Real circuit Signal circuit Amplifier Parameters

F. Najmabadi, ECE65, Winter 2012 * Show f p f p1 + f p 2 = 67 + 16 = 82 Hz

This is a MOS common source amplifier (no RS ).

F. Najmabadi, ECE65, Winter 2012

Bias (capacitors are open circuit):

1.353 = VOV + 0.5 + 2 103 3 10 3VOV

F. Najmabadi, ECE65, Winter 2012

This is a common collector amplifier (emitter follower).

F. Najmabadi, ECE65, Winter 2012

VCE = 4 VE = 4.7 V > VD 0 = 0.7 V

Real circuit Signal circuit Amplifier Parameters

F. Najmabadi, ECE65, Winter 2012

F. Najmabadi, ECE65, Winter 2012

This is a PMOS common drain amplifier.

Real circuit Signal circuit

This is a NMOS common gate amplifier.

Bias circuit Assume Saturation

VG 10 4 0.5 800 10 6 VOV

I D = 0.5 800 10 6 VOV

1.2M VGS = VOV + Vt = 2.0 V

VDS > VOV Saturation

2I D 2 0.4 10 3 Cut-off frequency

This is a NMOS common drain amplifier.

VGS = VOV + Vt = 4.0 V

VGS = VG VS VS = 0 VGS = 4.0 V

VDS > VOV Saturation

Real circuit Signal circuit Amplifier Parameters

2I D 2 0.71 10 3 Cut-off frequency

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