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Code: 9D49102

M. Tech I Semester Regular & Supplementary Examinations, April/May 2013

MICROPROCESSORS & MICROCONTROLLERS
(Common to EPE, EPS, PE&ED & PE)
Time: 3 hours Max. Marks: 60
Answer any FIVE questions.
All questions carry equal marks.

*****
1 (a) What is the length of the instruction queue in 8086? Discuss the use of the queue. Explain
the reason for limiting the length of queue.
(b) Explain how the physical address is calculated from the effective address of data from the
instruction in 8086. Explain it for different modes.

2 (a)

(b)
What is the purpose of ALE, BHE, DT/ and
system bus cycle of 8086.

L
Draw and discuss the read cycle diagram of 8086 in maximum mode.D
pins of 8086? Show their timing in the

3 (a)

(b)
(c)
8086.
Explain briefly about stack structure of 8086.
R
Explain different parameter passing techniques in procedure and subroutine CALLs of

O
What is interrupt flag IF and explain its importance in interrupt structure of 8086?

4 (a)
(b)
(c)
U W
Draw and discuss the paging mechanism of 80386.
Explain the differences between RISC Vs CISC.
Explain the pipeline feature of Pentium pro microprocessor.

5 (a)
(b) T
Explain control word format of 8255 in I/O and BSR mode.

N
Frame the control word of 8255 PPI for port A in model, port B in model O/P port specify

6 (a)
(b)
J
the pins of port C.

Explain the internal architecture of 8251 USART.

Explain the organization of the 8259 programmable interrupt controller.

7 (a) Determine whether the 8051 can be made to execute a single program instruction using
external circuitry only without the help of software.
(b) Outline a scheme for single stepping the 8051 using a combination of hardware and
software.

8 (a) Write 8051 instruction to set Timer to an initial setting of 1234 H.

(b) Assume that ROM space of 8051 starting at 250 H contains Hello write a program to
transfer the bytes into RAM locations starting at 40 H.

*****

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