Internship: Texas Instruments

For the summer of 2017, I worked on my first internship as a design verification engineer with
Texas Instruments. My responsibility was to write tests for a Multi-core Shared Memory Controller. I
utilized SystemVerilog to write these tests in order to cover testing on different states. I came into this
project near the end, and got to see the closing of the design for the processor I was testing. This meant
that a lot of the testing had already been done, but there were many different edge cases which were
difficult to test. At the end of my internship, I created documentation for any other new interns working
within this field, as well as giving a 30 minute presentation to the embedded processors department
about my work.

In order to effectively test the design of a multi-core shared memory controller, I had to learn a
lot of new material. I first had to get myself familiar with the hardware of the device, and understand
the concepts of cache coherency. Cache coherency was an important part of the testing process, as the
memory controllers job was to ensure cache coherency in an efficient manner. I also had to learn the
SystemVerilog, as well as the TLM (transaction level model) to write tests that hit very specific cases. In
order to determine if my tests were successful, I also needed to learn how to read and design coverage
models. Lastly, when an error occurred, I needed to learn how to debug that error to determine the
cause.

During my time at Texas Instruments, I wrote tests which tested sequential transactions,
different states for memory management registers, power down functionality of CPUs, cache flushing,
and sequential transactions from multiple CPUs in very specific states. To achieve all of this in a short
period of time, I had to make sure the tests I created were flexible in order to test for many different
cases. In total I contributed over 3,000 different tests, each targeted specific cases of the coverage
model. I also modified several files within the transaction level model to fix errors that were found
during testing. Lastly I updated the coverage model, editing and creating new coverage groups to
identify areas which needed testing.

Towards the end of my presentation I prepared a 30 minute presentation for the embedded
processors department. During my presentation, I gave an overview of my work, explained how the
hardware worked in a high level overview, as well as prepared documents and files for future interns.
My advisor was happy with my work at Texas Instruments, and gave me a return offer for the following
summer. I enjoyed my experience with Texas Instruments, and was happy to work with such a great
group of engineers.