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Features
Low on-resistance
Capable of 4.5 V gate drive
High density mounting
Pb-free
Halogen-free
Outline
WPAK
2 3 4 9 5 6 7 8
D1 D1 D1 S1/D2
1 8
G1 G2 9
S2 S2 S2
5 6 7 4 3 2 1
MOS1 MOS2 + SBD
(Bottom View)
Electrical Characteristics
MOS1
(Ta = 25C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 30 V ID = 10 mA, VGS = 0
Gate to source leak current IGSS 0.1 A VGS = 20 V, VDS = 0
Zero gate voltage drain current IDSS 1 A VDS = 30 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.2 2.5 V VDS = 10 V, ID = 1 mA
Static drain to source on state RDS(on) 8.2 10.7 m ID = 7.5 A, VGS = 10 V Note4
resistance RDS(on) 11.8 16.5 m ID = 7.5 A, VGS = 4.5 V Note4
Forward transfer admittance |yfs| TBD S ID = 7.5 A, VDS = 10 V Note4
Input capacitance Ciss 860 pF VDS = 10 V
Output capacitance Coss 165 pF VGS = 0
Reverse transfer capacitance Crss 53 pF f = 1 MHz
Gate Resistance Rg 4.2
Total gate charge Qg 6.3 nC VDD = 10 V
Gate to source charge Qgs 2.3 nC VGS = 4.5 V
Gate to drain charge Qgd 1.4 nC ID = 15 A
Turn-on delay time td(on) TBD ns VGS = 10 V, ID = 7.5 A
Rise time tr TBD ns VDD 10 V
Turn-off delay time td(off) TBD ns RL = 1.33
Fall time tf TBD ns Rg = 4.7
Bodydrain diode forward voltage VDF 0.84 1.10 V IF = 15 A, VGS = 0 Note4
Bodydrain diode reverse trr 20 ns IF =15 A, VGS = 0
recovery time diF/ dt = 100 A/s
Notes: 4. Pulse test
MOS2
(Ta = 25C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 30 V ID = 10 mA, VGS = 0
Gate to source leak current IGSS 0.1 A VGS = 20 V, VDS = 0
Zero gate voltage drain current IDSS 1 mA VDS = 30 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.2 2.5 V VDS = 10 V, ID =1 mA
Static drain to source on state RDS(on) 6.8 8.9 m ID = 10 A, VGS = 10 V Note4
resistance RDS(on) 10.5 14.7 m ID = 10 A, VGS = 4.5 V Note4
Forward transfer admittance |yfs| TBD S ID = 10 A, VDS = 10 V Note4
Input capacitance Ciss 1000 pF VDS = 10 V
Output capacitance Coss 240 pF VGS = 0
Reverse transfer capacitance Crss 100 pF f = 1 MHz
Gate Resistance Rg 4.5
Total gate charge Qg 7.2 nC VDD = 10 V
Gate to source charge Qgs 2.9 nC VGS = 4.5 V
Gate to drain charge Qgd 2.2 nC ID = 20 A
Turn-on delay time td(on) TBD ns VGS = 10 V, ID = 10 A
Rise time tr TBD ns VDD 10 V
Turn-off delay time td(off) TBD ns RL = 1.0
Fall time tf TBD ns Rg = 4.7
Schottky Barrier diode forward voltage VF 0.44 V IF = 2 A, VGS = 0 Note4
Bodydrain diode reverse trr 12 ns IF = 20 A, VGS = 0
recovery time diF/ dt = 100 A/s
Notes: 4. Pulse test
Package Dimensions
Package Name JEITA Package Code RENESAS Code Previous Code MASS[Typ.]
WPAK-DV(2) PWSN0008DD-A WPAK-DV(2) 0.075g
5 8
(1.25)
3.9 0.2
5.9 +0.1
-0.2
6.1 +0.1
-0.3
(0.06) (0.06)
2.2 0.2
(0.55)
(0.30)
(0.30)
(0.50)
(0.30)
(3.20)
0.45 0.1
1.1 0.2
(0.30)
(1.30)
2.9 0.2
(0.40)
0.5 0.15.
0.4 0.15
4 1
0.635Max 1.27Typ 0.2Typ
4.21Typ
Stand-off
4.9 0.1
0.05Max
0Min
Ordering Information
Part No. Quantity Shipping Container
RJK0389DPA-00-J0 2500 pcs Taping