Led LCD TV: Service Manual

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LT21C
MODEL : 32LS3400 32LS3400-DA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67362816 (1203-REV00) Printed in Korea

CONTENTS
CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION............................................................... 10
TROUBLE SHOOTING............................................................................. 19
BLOCK DIAGRAM................................................................................... 25
EXPLODED VIEW .................................................................................. 26
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied LCD TV with LT21B/C Chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 C5 C

2) Relative Humidity: 65 % 10 %
3) Power Voltage
- Taiwan : 110V 60Hz
- Colombia : 100~240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
4. General Specification
No Item Specification Remark
1. Screen Size 31.55 inch LC320EUN-SEM2
31.50 inch T320HVN01.0(60Hz/FHD/AUO)
31.51 inch LC320DXN-SER2(60Hz/HD)
31.55 inch LC320WUN-SCA2(60Hz/FHD/EEFL)
31.51 inch LC320EXN-SEA2(60Hz/HD)
31.50 inch T320XVN01.1(60Hz/HD/AUO)
31.51 inch LC320WXN-SCA2(10 years module)
31.51 inch LC320DXN-SEU2(60Hz/FHD)
31.55inch LC320EUN-SEF2(T120)
42.02 inch LC420DUN_SEU2(60Hz/FHD)
42.92 inch LC420EUE-SEF1(T120)
42.02 inch LC420WUE-SCA2(60Hz/FHD/EEFL)
42.02 inch T420HVN02.1(60Hz/FHD/EEFL/AUO)
46.96 inch LC470EUE-SEM1(60Hz/FHD)
42.02 inch LC420EUE-SEM1(60Hz/FHD)
42.02 inch LC420DUN_SER2(60Hz/FHD)
42.00 inch T420HVN01.1(60Hz/FHD/AUO)
2. Aspect Ratio 16:9 All
3. LCD Module 31.55 Color WUXGA TFT-LCD Module LC320EUN-SEM2
31.50 Color WUXGA TFT-LCD Module T320HVN01.0(60Hz/FHD/AUO)
31.55 Color WUXGA TFT-LCD Module LC320WUN-SCA2(60Hz/FHD/EEFL)
31.51 Color WXGA TFT-LCD Module LC320EXN-SEA2(60Hz/HD)
31.51 Color WXGA TFT-LCD Module LC320DXN-SER2(60Hz/HD)
31.51 Color WUXGA TFT-LCD Module LC320DXN-SEU2(60Hz/FHD)
31.50 Color WXGA TFT-LCD Module T320XVN01.1(60Hz/HD/AUO)
31.55 Color WXGA TFT-LCD Module LC320WXN-SCA2(10 years module)
31.55 Color WUXGA TFT-LCD Module LC320EUN-SEF2(T120)
42.02 Color WUXGA TFT-LCD Module LC420DUN_SEU2(60Hz/FHD)
46.96 Color WUXGA TFT-LCD Module LC470EUE-SEF1(T120)
46.96 Color WUXGA TFT-LCD Module LC470EUE-SEM1(60Hz/FHD)
42.02 Color WUXGA TFT-LCD Module LC420DUN_SER2(60Hz/FHD)
42.02 Color WUXGA TFT-LCD Module LC420EUE-SEM1(60Hz/FHD)
42.00 Color WUXGA TFT-LCD Module T420HVN01.1(60Hz/FHD/AUO)
42.02 Color WUXGA TFT-LCD Module LC420WUE-SCA2(60Hz/FHD/EEFL)
42.02 Color WUXGA TFT-LCD Module T420HVN02.1(60Hz/FHD/EEFL/AUO)
4. Operating Environment 1) Temp. : 0 ~ 50 deg All
2) Humidity : 10 ~ 90%
5. Storage Environment 1) Temp. : -20 ~ 60 deg All
2) Humidity : 10 ~ 90%
6. Input Voltage AC100 ~ 240V, 50/60Hz All
7. Power Consumption 59W 31.55 FHD(LED) LC320EUN-SEM2
87W 31.51 HD(EEFL) LC320WXN-SCA2(10 years module)
31.55 FHD(LED-T120-FPR) LC320EUN-SEF2(T120)
46.96 FHD(LED-T120-FPR) LC470EUE-SEF1(T120)
46.96 FHD(LED 60Hz) LC470EUE-SEM1(60Hz/FHD)
31.55 FHD(EEFL) LC320WUN-SCA2(60Hz/FHD/EEFL)
42.02 FHD(LED 60Hz) LC420DUN_SEU2(60Hz/FHD)
42.02 FHD(LED 60Hz) LC420EUE-SEM1(60Hz/FHD)
42.00 FHD(LED 60Hz) T420HVN01.1(60Hz/FHD/AUO)
31.50 FHD(LED 60Hz) T320HVN01.0(60Hz/FHD/AUO)
43W 31.50 HD(LED 60Hz) T320XVN01.1(60Hz/HD/AUO)
31.50 HD(LED 60Hz) LC320EXN-SEA2(60Hz/HD)
42.02 FHD(LED 60Hz) LC420DUN_SER2(60Hz/FHD)
31.51 FHD(LED 60Hz) LC320DXN-SEU2(60Hz/FHD)
31.51 HD(LED 60Hz) LC320DXN-SER2(60Hz/HD)
42.02 FHD(EEFL 60Hz) LC420WUE-SCA2(60Hz/FHD/EEFL)
42.02 FHD(EEFL 60Hz) T420HVN02.1(60Hz/FHD/EEFL/AUO)
8. LCD Module Maker Inch (H) (V) (D)
(Outline Demension) LGD 31.55 727.4 X 429.0 X 22.7 LC320EUN-SEM2
LGD 31.51 760.0 X 450.0 X 43.0 LC320WXN-SCA2(10 years module)
LGD 31.55 727.4 X 429.0 X 22.7 LC320EUN-SEF2(T120)
LGD 42.02 960.4 X 560.4 X 17.4 LC420EUE-SEF1(T120)
LGD 31.51 760.0 X 450.0 X 32.5 LC320DXN-SER2(60Hz/HD)
LGD 46.96 1070.6 X 622.0 X 22.0 LC470EUE-SEF1(T120)
LGD 54.64 1244.6 X 720.9 X 22.0 LC550EUE-SEF1(T120)
LGD 46.96 1070.6 X 622.0 X 22.0 LC470EUE-SEM1(60Hz/FHD)
LGD 42.02 960.4 X 560.4 X 17.4 LC420EUE-SEM1(60Hz/FHD)
AUO 42.00 930.24 X 523.26 T420HVN01.1(60Hz/FHD/AUO)
AUO 31.50 727.4 X 429 X 20 T320HVN01.0(60Hz/FHD/AUO)
AUO 31.50 735.4 X 433.8 X 10.8 T320XVN01.1(60Hz/HD/AUO)
LGD 31.51 735.4 X 433.0 X 10.8 LC320EXN-SEA2(60Hz/HD)
LGD 42.02 983.0 X 576.0 X 35.5 LC420DUN_SEU2(60Hz/FHD)
LGD 31.51 760.0 X 450.0 X 32.5 LC320DXN-SEU2(60Hz/FHD)
LGD 42.02 983.0 X 576.0 X 35.5 LC420DUN_SER2(60Hz/FHD)
LGD 42.02 983.0 X 576.0 X 46.0 LC420WUE-SCA2(60Hz/FHD/EEFL)
LGD 31.55 760.0 X 450.0 X 48.0 LC320WUN-SCA2(60Hz/FHD/EEFL)
AUO 42.02 983.0 X 576.0 X 52.65 T420HVN02.1(60Hz/FHD/EEFL/AUO)
5. External Input Support Format
5.1. Component(Y, Pb, Pr)
No. Resolution H-freq(kHz) V-freq(Hz) Remark
1. 720480 15.73 60.00 SDTV, DVD 480i
2. 720480 15.63 59.94 SDTV, DVD 480i
3. 720480 31.47 59.94 480p
4. 720480 31.50 60.00 480p
5. 720576 15.625 50.00 SDTV, DVD 625 Line
6. 720576 31.25 50.00 HDTV 576p
7. 1280720 37.50 50.00 HDTV 720p
8. 1280720 44.96 59.94 HDTV 720p
9. 1280720 45.00 60.00 HDTV 720p
10. 19201080 28.125 50.00 HDTV 1080i
11. 19201080 33.75 60.00 HDTV 1080i
12. 19201080 33.72 59.94 HDTV 1080i
13. 19201080 56.250 50 HDTV 1080p
14. 19201080 67.43/67.5 59.94/60 HDTV 1080p
5.2. RGB Input (PC) : RGB-PC EDID DATA : Refer to adjust specification.
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock (MHz) Proposed Remark
1. 640*350 31.468 70.085 25.174 For only DOS mode
2. 720*400 31.468 70.08 28.321 For only DOS mode
3. Input 848*480 60Hz, 852*480 60Hz
640*480 31.469 59.94 25.17 VESA
=> 640*480 60Hz Display
4. 800*600 37.879 60.31 40.00 VESA(SVGA)
5. 800*600 37.879 60.31 40.00 VESA
6. 1024*768 48.363 60.00 65.00 VESA(XGA)
7. 1152*864 54.347 60.052 79.999 XGA Plus
8. 1360*768 47.72 59.8 84.75 WXGA
9. 1280*1024 63.981 60.02 108.00 SXGA FHD model
10. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
5.3. HDMI EDID DATA : Refer to adjust specification
5.3.1. PC mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1. 640*350 31.468 70.085 25.174 DOS
2 720*400 31.468 70.08 28.321 DOS
3. 640*480 31.469 59.94 25.17 VESA
4 800*600 37.879 60.31 40.00 VESA
5. 1024*768 48.363 60.00 65.00 VESA(XGA)
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.981 60.02 108.00 SXGA FHD Model
8. 1920*1080 67.5 60 148.5 WUXGA FHD Model
9. 1280*1024 63.981 60.02 108.00 SXGA FHD model
10. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
5.3.2. DTV mode

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1. 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P
5.3.3. 3D mode
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

*** HDMI 1.4
1 1280*720 75 50 148.5 HDTV 720P Frame packing
2 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom
3. 1280*720 89.9 59.94 148.35 HDTV 720P Frame packing
90 60 148.5
4 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom
5 1920*1080 53.95 23.95 148.35 HDTV 1080P Frame packing
54 24 148.5
6 1920*1080 27 24 74.25 HDTV 108 0P Side by Side(half), Top and Bottom
7 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom
8 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom
9 1920*1080 56.25 50 148.5 HDTV 1080P Side by Side(half), Top and bottom,
10 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
11 1920*1080 28.1 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom
*** HDMI 1.3
1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom
2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom
5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
Single Frame Sequential
8 1920*1080 56.25 50 148.5 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
Single Frame Sequential
ADJUSTMENT INSTRUCTION
1. Application 3. Main PCB check process
This spec sheet is applied all of the LCD TV with LT21A/B/C * APC After Manual-Insert, executing APC
chassis * Boot file Download
(1) Execute ISP program Mstar ISP Utility and then click
Config tab.
2. Designation (2) Set as below, and then click Auto Detect and check OK
(1) T he adjustment is according to the order which is message.
designated and which must be followed, according to the I f Error is displayed, Check connection between
plan whic al Unit: Product Specification Standard. computer, jig, and set.
(2) Power adjustment : Free Voltage. (3) Click Read tab, and then load download file (XXXX.bin)
(3) Magnetic Field Condition: Nil. by clicking Read
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation: Above 5 Minutes (Heat Run). (1)
Temperature : at 25 C5 C
Relative humidity : 65 10%
Input voltage : 220V, 60Hz filexxx.bin
The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over
15C.
In case of keeping module is in the circumstance of 0C, it (4) C lick Connect tab. If Cant is displayed, Check
should be placed in the circumstance of above 15C for 2 connection between computer, jig, and set.
hours
In case of keeping module is in the circumstance of below
(2) (3)
-20C, it should be placed in the circumstance of above
15C for 3 hours,.
[Caution]
When still image is displayed for a period of 20 minutes or
longer, there can some afterimage in the black level area.
(6) A djustment equipments : Color Analyzer (CA-210 or

CA-110), DDC Adjustment Jig equipment, SVC remote
controller
(7) Push The IN STOP KEY For memory initialization.
Please Check the Speed
Case1 : Software version up To use speed between
1) A fter downloading S/W by USB , TV set will reboot from 200KHz to 400KHz
automatically
2).Push In-stop key (5) Click Auto tab and set as below.
3).Push Power on key (6) Click Run.
4).Function inspection (7) After downloading, check OK message.
5).After function inspection, Push In-stop key.
Case2 : Function check at the assembly line (4)

1).When TV set is entering on the assembly line, Push
In-stop key at first. filexxx.bin
2).Push Power on key for turning it on. (5)
=> If you push Power on key, TV set will recover channel
information by itself.
3).After function inspection, Push In-stop key. (7)...........OK
(6)
Copyright LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
* USB DOWNLOAD(*.epk file download) * A fter downloading, have to adjust Tool
(1) Put the USB Stick to the USB socket. Option again.
(2) Automatically detecting update file in USB Stick. (1) Push "IN-START" key in service remote controller.
- If your downloaded program version in USB Stick is Low, (2) Select "Tool Option 1" and Push "OK" button.
it didn't work. But your downloaded version is High, USB (3) Punch in the number. (Each model has their number.)
data is automatically detecting (4) Completed selecting Tool option.
(3) Show the message "Copying files from memory"
Tool Tool Tool Tool Tool
Model Module
option1 option2 option3 option4 option5
47LM5800-DB LGD 103 2525 9499 13224 5122
42LM5800-DB LGD 102 2525 9499 13224 7170
32LM5800-DB LGD 100 35293 9499 13224 5154
55LM4600-DB LGD 89 2525 9499 13224 5122
47LM4600-DB LGD 87 2525 9499 13224 5122
42LM3400-DB LGD 2525 9499 13224 5154
32LM3400-DB LGD 2525 9499 13224 5154
32LS5600-DA LGD 340 35293 9499 13224 5154
(4) Updating is staring. 47LS4600-DA LGD 327 2525 9499 13224 5122
42LS4600-DA LGD 326 2525 9499 13224 5122
32LS4600-DA LGD 324 2525 9499 13224 5154
32LS3500-DA LGD 292 494 9499 13224 736
32LS3500-DA AUO 4388 494 9499 13224 736
42LS3400-DA LGD 494 9499 13224 736
32LS3400-DA LGD 494 9499 13224 736
42CS560-DA AUO 4134 494 9243 13224 736
42CS560-DA LGD 38 494 9243 13224 704
32CS560-DA LGD 36 494 9243 13224 737
42CS460-DA LGD 22 494 9243 13224 704
42CS460-DA AUO 4118 494 9243 13224 736
32CS460-DA LGD 20 494 9243 13224 736
(5) After updating is complete, The TV will restart automatically.

(6) If TV turns on, check your updated version and Tool option.
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In this case, you have to
channel recover. If all channel data is cleared, you didn't
have a DTV/ATV test on production line.
3.1. ADC Process 3.2. Function Check
3.1.1. ADC 3.2.1. Check display and sound
Enter Service Mode by pushing ADJ key, Check Input and Signal items. (cf. work instructions)
Enter Internal ADC mode by pushing key at 6. ADC (1) TV
Calibration (2) AV (CVBS)
(3) COMPONENT (480i)
(4) RGB (PC : 1024 x 768 @ 60hz)
(5) HDMI
(6) PC Audio In
* Display and Sound check is executed by Remote controller.
3.2.2. MAC Address

3.2.2.1. Equipment & Condition
Play file: Serial.exe
MAC Address edit
Input Start / End MAC address
3.2.2.2 Download method

3.2.2.2.1. Communication Prot connection
=> Caution : Using power on button of the Adjustment R/C, Connect:
power on TV. Connection : P CBA (USB Port) -> USB to Serial Adapter
(UC-232A) -> RS-232C cable -> PC(RS-232C port)
ADC Calibration Protocol (RS232C/USB)
NO Item CMD 1 CMD 2 Data 0
Enter Adjust A A 0 0 When transfer the
Adjust MODE Mode In Mode In,
Carry the command.
ADC adjust ADC A D 1 0 Automatically adjust-
Adjust ment 3.2.2.2.2. MAC Address Download
(The use of a inter- Com 1,2,3,4 and 115200(Baudrate)
nal pattern)
Adjust Sequence
aa 00 00 [Enter Adjust Mode]
xb 00 40 [Component1 Input (480i)]
ad 00 10 [Adjust 480i Comp1]
xb 00 60 [RGB Input (1024*768)]
ad 00 10 [Adjust 1024*768 RGB]
aa 00 90 End Adjust mode
* Required equipment : Adjustment R/C.
3.2.3. LAN Inspection 3.2.5. Model name & Serial number Download
3.2.3.1. Equipment & Condition 3.2.5.1. Model name & Serial number D/L
Each other connection to LAN Port of IP Hub and Jig P ress Power on key of service remocon.(Baud rate :
115200 bps)
Connect RS232C/USB cable to Side USB Jack.
Write Serial number by use RS-232C to Side USB.
Must check the serial number at Instart menu.
3.2.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
3.2.3.2. LAN inspection solution Technology Group.
LAN Port connection with PCB (3) Serial number D/L must be conformed when it is produced
Network setting at MENU Mode of TV in production line, because serial number D/L is mandatory
setting automatic IP by D-book 4.0
Setting state confirmation
If automatic setting is finished, you confirm IP and MAC Manual Download (Model Name and Serial Number)
Address. If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.
(Not always) It is impossible to download by bar code scan, so
It need Manual download.
Press the instart key of ADJ remote controller.
Go to the menu 6.Model Number D/L like below photo.
Input the Factory model name(ex 42LD450-TA) or Serial
number like photo
3.2.4. LAN PORT INSPECTION(PING TEST)

3.2.4.1. Equipment setting
1) Play the LAN Port Test PROGRAM.
C heck the model name Instart menu -> Factory name

2) Input IP set up for an inspection to Test displayed (ex 42LE7500-TA)
Program. Check the Diagnostics (DTV country only) -> Buyer model
*IP Number : 12.12.2.2 displayed (ex 42LE7500-TA)
3.2.4.2. LAN PORT inspection (PING TEST) => Caution : Not to push the INSTOP KEY after completion if
1) Play the LAN Port Test Program. the function inspection.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
4. Total Assembly line process Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
4.1. Adjustment Preparation around is blocked. (Illumination is less than 10ux).
W/B Equipment condition (2) Adhere closely the Color Analyzer ( CA210 ) to the module
CA210 : C
H 9, Test signal : Inner pattern (80IRE) in case of less than 10cm distance, keep it with the surface of the
CCFL back light Module and Color Analyzers Prove vertically.(80~100).
CA210 : C
H14, Test signal : Inner pattern (80IRE) in case of (3) Aging time
LED back light - After aging start, keep the power on (no suspension of
Above 5 minutes H/run in the inner pattern. (power on key of power supply) and heat-run over 5 minutes.
adjust remote control) - Using no signal or full white pattern or the others, check
X=0.269 the back light on.
(0.002)
Cool 13,000k K
Y=0.273 Auto adjustment Map(RS-232C)
(0.002) RS-232C COMMAND
42/32CS560-DA
<Test signal> [ CMD ID DATA ]
X=0.285 42/32CS460-DA
Inner pattern Wb 00 00 White Balance Start
Color (0.002) 42/32LS4600-DA
Medium 9,300k K (204 Gray Wb 00 ff White Balance End
Temperature Y=0.293 (except LGD
80IRE)
(0.002) moduel) RS-232C COMMAND CENTER
X=0.313 [CMD ID DATA] MIN (DEFAULT) MAX
(0.002) Cool Mid Warm Cool Mid Warm
Warm 6,500k K
Y=0.329
(0.002) R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
In case of Edge LED module, the color coordinates is changing B Gain ji Jc jf 00 192 192 172 192
by aging, so you have to use the below table.
R Cut 64 64 64 128
Cool Medium Warm
G Cut 64 64 64 128
H/R Time(Min) x y x x y x
B Cut 64 64 64 128
269 273 285 293 313 329
1 0-2 min 280 291 296 311 319 340
** Caution **
2 3-5 min 278 288 294 308 317 338 Color Temperature : COOL, Medium, Warm.
3 6-9 min 276 285 292 305 315 335 LED Module(LGD). One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
4 10-19 min 274 282 290 302 313 332 (when R/G/B Gain are all C0, it is the FULL Dynamic Range of
5 20-35 min 273 279 289 299 312 329 Module)
6 36-49 min 270 276 287 296 310 326
*Manual W/B process using adjusts Remote control.
7 50-79 min 269 273 286 293 308 323 After enter Service Mode by pushing ADJ key,
8 Over 80 min 269 273 285 293 308 323 Enter White Balance by pushing key at 7. White Balance.
Connecting picture of the measuring instrument

(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER-ON -> Enter
the mode of White-Balance, the pattern will come out.
After You finish all adjustments, Press In-start button and

compare Tool option and Area option value with its BOM, if it is
correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug AC
cable. For correct it to the models module from factory JIG
model.
P ush The IN STOP KEY after completing the function
inspection. And Mechanical Power Switch must be set ON.
4.2. DDC EDID Write (RGB 128Byte) Edid data and Model option download (RS232C)
Connect D-sub Signal Cable to D-Sub Jack. NO Item CMD 1 CMD 2 Data 0
Write EDID DATA to EEPROM (24C02) by using DDC2B
When transfer
protocol. Enter
Download the Mode In,
Check whether written EDID data is correct or not. download A E 0 0
Mode In Carry the com-
* For SVC main Assy, EDID have to be downloaded to Insert MODE
mand
Process in advance.
Edid data Automatically
and Model download
4.3. DDC EDID Write (HDMI 256Byte) option
Download A E *Note1 *Note2
(The use of a
Connect HDMI Signal Cable to HDMI Jack. download internal Data)
Write EDID DATA to EEPROM(24C02) by using DDC2B
Adjust
protocol. A E 9 0
Mode Out
Check whether written EDID data is correct or not.
* For SVC main Assy, EDID have to be downloaded to Insert . To check
Adjustment
Process in advance. Download
Confirma- A E 9 9
on Assembly
tion
line.
4.4. EDID DATA
1) All Data : HEXA Value - Manual Download
2) Changeable Data : Caution
*: Serial No : Controlled / Data:01 * Use the proper signal cable for EDID Download
**: Month : Controlled / Data:00 - Analog EDID : Pin3 exists
***:Year : Controlled - Digital EDID : Pin3 exists
****:Check sum => Caution : - Never connect HDMI & D-sub Cable at the same
time.
- Auto Download - Use the proper cables below for EDID Writing.
After enter Service Mode by pushing ADJ key, - Download HDMI1, HDMI2 separately because HDMI1 is
Enter EDID D/L mode. different from HDMI2.
Enter START by pushing OK key.
For Analog EDID For HDMI EDID
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
No. Item Condition Hex Data

1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
HDMI number is dependent on model.
* EDID data for FHD 3DTV_8bit (Model name = LG TV) * EDID data for FHD 2DTV(Non-Support deep color)
- HDMI EDID table (0x1E : Physical Address) 8bit (Model name = LG TV)
0 1 2 3 4 5 6 7 8 9 A B C D E F - HDMI EDID table (0x1E : Physical Address)
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 0 1 2 3 4 5 6 7 8 9 A B C D E F
10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
0 02 03 33 F1 4E 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 10 00 0 02 03 22 F1 4E 10 9F 04 13 05 14 03 02 12 20 21
20 80 1E 20 C0 0E 01 40 0A 0F 08 10 18 10 98 10 58 10 22 15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00
30 10 38 10 01 1D 80 18 71 1C 16 20 58 2C 25 00 20 20 80 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 20 C2
40 C2 31 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 30 31 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
50 00 20 C2 31 00 00 1E 02 3A 80 18 71 38 2D 40 58 40 20 C2 31 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C
60 2C 45 00 A0 5A 00 00 00 1E 01 1D 00 BC 52 D0 1E 50 45 00 A0 5A 00 00 00 1E 01 1D 00 BC 52 D0 1E 20
70 20 B8 28 55 40 C4 8E 21 00 00 1E 00 00 00 00 23 60 B8 28 55 40 C4 8E 21 00 00 1E 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 25
1) HDMI 1 Check sum : 0x43, 0X23 (CEA Block 0x1E :10)
2) HDMI 2 Check sum : 0x43, 0X13 (CEA Block 0x1E :20) 1) HDMI 1 Check sum : 0x43, 0X25 (CEA Block 0x1E :10)
3) HDMI 3 Check sum : 0x43, 0X03 (CEA Block 0x1E :30) 2) HDMI 2 Check sum : 0x43, 0X15 (CEA Block 0x1E :20)
3) HDMI 3 Check sum : 0x43, 0X05 (CEA Block 0x1E :30)
* EDID data for FHD 2DTV(Support deep color)
10bit (Model name = LG TV) * EDID data for HD 2DTV ( Model name = LG TV )
- HDMI EDID table (0x1E : Physical Address) - HDMI EDID table (0x1E : Physical Address)
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 30 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30 40 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 50 18 88 03 06 40 84 63 00 00 18 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 A4
0 02 03 22 F1 4E 10 9F 04 13 05 14 03 02 12 20 21 0 02 03 22 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
10 22 15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 10 22 15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00
20 B8 2D 01 1D 80 18 71 1C 16 20 58 2C 25 00 20 C2 20 80 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A
30 31 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 30 00 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
40 20 C2 31 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 40 20 C2 31 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E
50 45 00 A0 5A 00 00 00 1E 01 1D 00 BC 52 D0 1E 20 50 96 00 A0 5A 00 00 00 18 02 3A 80 18 71 38 2D 40
60 B8 28 55 40 C4 8E 21 00 00 1E 00 00 00 00 00 00 60 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 DE 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 5B
1) HDMI 1 Check sum : 0x43, 0XDE (CEA Block 0x1E :10) 1) HDMI 1 Check sum : 0xA4, 0X5B (CEA Block 0x1E :10)
2) HDMI 2 Check sum : 0x43, 0XCE (CEA Block 0x1E :20) 2) HDMI 2 Check sum : 0xA4, 0X4B (CEA Block 0x1E :20)
3) HDMI 3 Check sum : 0x43, 0XBE (CEA Block 0x1E :30) 3) HDMI 3 Check sum : 0xA4, 0X3B (CEA Block 0x1E :30)
- Analog (RGB) EDID table - FHD ASCII Code
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 5C
CheckSum : 5C
- Analog (RGB) EDID table - HD

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 15 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 81 C0 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 1B 21 50 A0 51 00 1E 30 48 88 4.5. Outgoing condition Configuration
40 35 00 A0 5A 00 00 00 1C 01 1D 00 72 51 D0 1E 20 When pressing IN-STOP key by SVC remocon, Red LED
are blinked alternatively. And then automatically turn off.
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
(Must not AC power OFF during blinking)
60 3E 1F 46 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 CD
4.6 GND & Hi-pot test
Confirm whether is normal or not when between power
=> Detail EDID Options are below board's ac block and GND is impacted on 1.5kV(dc) or
HD( 2D TV) FHD(2D TV) FHD(2D TV) HD (3D TV) FHD (3D TV) 2.2kV(dc) for one second.
_10bit _8bit GND TEST = P OWER CORD GND and SIGNAL CABLE
GND
32LS3500-DA 47LS4600-DA 32LS5600-DA 32LM3400-DA 47LM5800-DB Hi-pot TEST = POWER CORD GND and LIVE&NUETRAL
32LS3400-DA 42LS4600-DA 42LM5800-DB Test Process
32CS460-DA 32LS4600-DA 32LM5800-DB
(1) Check the POWER CABLE and SIGNAL CABLE insertion
condition.
42LS3400-DA 55LM4600-DB (2) Connect the AV JACK Tester
42CS560-DA 47LM4600-DB (3) Controller(GWS103-4) on
(4) GND TEST(Auto)
32CS560-DA 42LM3400-DA
- If Test is failed, Buzzer operate
42CS460-DA - If Test is passed, execute next process(HI-pot test)
- Remove A/V CORD from A/V JACK BOX
(5) HI-POT test(Auto)
Support Deep Non-Support
- If Test is failed, Buzzer operate
color Deep color
- If Test is passed, GOOD Lamp on and move to next
process automatically.
4.7. EYE-Q function check 4.9. 3D function test
Step 1) Turn on TV (P attern Generator MSHG-600, MSPG-6100 [SUPPORT
Step 2) Press EYE key of Adj. R/C HDMI1.4])
Step 3) Cover the Eye Q II sensor on the front of the using * HDMI mode NO. 872 , pattern No.83
your hand and wait for 6 seconds 1) Please input 3D test pattern like below (HDMI mode NO.
Step 4) Confirm that R/G/B value is lower than 10 of the Raw 872 , pattern No.83)
Data (Sensor data, Back light ). If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds
Step 6) Confirm that ok pop up.
If change is not seen, replace Eye Q II sensor
2) When 3D OSD appear automatically , then select OK button
4.8. Local Dimming Function Check

Step 1) Turn on TV
Step 2) At the Local Dimming mode, module Edge Backlight
moving right to left
Back light of IOP module moving
Step 3) confirm the Local Dimming mode
Step 4) Press exit Key
3) Dont wear a 3D Glasses, Check the picture like below .
TROUBLE SHOOTING
No power : [A] PROCESS
Check 24V, 12V, 3.5V Fail Check short of Main B/D

of Power B/D or Change Power B/D
Pass
Check Output of Fail Check short of Fail Re-soldering or Change defect

Q403, IC407, IC401 Q403, IC407, IC401 part of Q403, IC407, IC401
Pass
Pass Check short of Fail Re-soldering or Change defect
IC402, IC403 part of Q403, IC407, IC401
Fail
Check LED Assy Change LED Assy
Pass
Check P403 Connector
No Raster
: [B] Process
Pass
Check LED status Fail Repeat A PROCESS

On Display Unit
Pass
Check Panel Link Cable Fail Change Panel Link Cable

Or Module Or Module
Pass
Check Inverter Connector Fail Change Inverter Connector

Or Inverter Or Inverter
Pass
Fail Change IC1401

Check Output of IC1401
Pass
Check LVDS Cable Fail Change LVDS Cable
No Raster on PC Signal
Pass
Check Input source Cable And Jack
Pass
Fail
Check the Input/Output Re-soldering or
Of JK1104 Change the defect part
Pass
Fail
Check the Input/Output Re-soldering or
Of IC101 Change the defect part
Pass
Repeat [A], & [B] Process
No Raster on COMPONENT Signal No Raster on HDMI Signal
Pass
Pass
Check Input source

Cable And Jack
Check Input source
Cable And Jack Pass
Check the Input/Output Fail Re-soldering or

Pass Of JK801, JK802, JK803 Change the defect part
Pass
Check The Input/Output Fail Re-soldering or
Of JK1601, JK1602 Change the defect part Check the Instart Menu Fail Re-download EDID Data]
EDID D/L Status (Adjust Menu EDID D/L)
Pass Pass
Re-soldering or
Check the Input/Output Fail Change the defect part.
Of IC103
Check the Input/Output Fail Re-soldering or Re-download HDCP
Of IC101 Change the defect part Pass
Check the Input/Output Fail Re-soldering or

Pass Of IC101 Change the defect part
Pass
No Raster On AV Video Signal No Signal On TV(RF) Signal
Pass Pass
Check Input source Check Input source

Cable And Jack Cable And Jack
Pass Pass
Check The Input/Output Fail Re-soldering or Check The Input/Output Fail Re-soldering or
Of JK1601 Change the defect part Of TU3704 Change the defect part
Pass Pass
Check the Input/Output Fail Re-soldering or Check the Input/Output Fail Re-soldering or
Of IC101 Change the defect part Of IC101 Change the defect part
Pass Pass
Repeat [A], & [B] Process Repeat [A], & [B] Process
No Sound
Fail
Check The Input Sourse Change The Source Input
Pass
Check The Input/Output Fail Re-soldering or

Of IC501 Change the defect part
Pass
Fail
Check The Speaker Change Speaker
Pass
Check The Speaker Wire
Copyright
X-tal LVDS
FPC(51P)
24M (FHD/50Hz)
IF +/-
TDSH-
TDSH- TU_CVBS
SERIAL FLASH
T101F SPI IC1401 (8M bit)
SIF
MX25L8005M2I

TU_SW
DDR3 Add. DDR3 1Gb DDR3 1Gb

IC1201 IC1202
DDR3 Data
H5TQ1G63DFR H5TQ1G63DFR
HDMI1/2(DVI) DDC/ D[0:2]/ CK/ HPD
Rear I2C EEPROM
Y/Pb/Pr, L/R
LG Electronics. Inc. All rights reserved.

AT24C256C-SSHL-T
Component2
CVBS, Y/Pb/Pr, L/R
IC104 256Kbit
Component1&AV
NAND FLASH
IC102 (1Gbit)
LGE2112-T8
- 25 -
RGB, H/VSYNC IC101
RGB PC
L/R
PC/DVI Audi In
SENSOR_SCL/SDA
SPDIF SPDIF KEY1
BLOCK DIAGRAM
KEY2
EPHY LED_R CONTROL
Ethernet IR & LED /
SOFT TOUCH
IR (TACT SWITCH)
SOFT TOUCH
_SCL/SDA
DP/DM
USB1
Side TMDS I2S

HDMI3 Audio AMP
SPK L/R
NTP7500
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
521
900
540
910
800
530
LV1
820
550
200
810
* Stand Base + Body

A10
* Set + Stand
120
A7
A5
310
A21
300
510
A2
IC102
NAND01GW3B2CN6E
NAND FLASH MEMORY +3.3V_Normal
<CHIP Config(LED_R/BUZZ)>
+3.3V_Normal
Boot from SPI CS1N(EXT_FLASH) 1b0
NC_1
1 48
NC_29 Boot from SPI_CS0N(INT_FLASH) 1b1
NAND_FLASH_1G_NUMONYX IC101
NC_2 EAN60762401 NC_28
2 47 LGE2111A-T8
NC_3 NC_27 OS PCM_A[0-7] <CHIP Config>
3 46 PCM_D[0-7]
22 (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
NC_4
4 45
NC_26
PCM_D[0]
S7LR2_DIVX_MS10
AR101 B51_no_EJ : 4b0000 Boot from 8051 with SPI flash W21
OS NC_5 I/O7 PCM_A[7] SB51_WOS : 4b0001 Secure B51 without scramble PCM_D[1] PCMDATA[0]/GPIO126
OS R109 5 44 AA18
R107 3.9K SB51_WS : 4b0010 Secure B51 with scramble PCM_D[2] PCMDATA[1]/GPIO127
1K NC_6 I/O6 PCM_A[6] MIPS_SPE_NO_EJ : 4b0100 Boot from MIPS with SPI flash AB22
6 43 PCM_D[3] PCMDATA[2]/GPIO128
MIPS_SPI_EJ_1 : 4b0101 Boot from MIPS with SPI flash AE20
RB I/O5 PCM_A[5] MIPS_SPI_EJ_2 : 4b0110 Boot from MIPS with SPI flash PCM_D[4] PCMDATA[3]/GPIO120
7 42 AA15 OS
/F_RB MIPS_WOS : 4b1001 Secure MIPS without scramble PCMDATA[4]/GPIO119 AR103
R I/O4 PCM_A[4] MIPS_WS : 4b1010 Scerur MIPS with SCRAMBLE PCM_D[5] AE21 22
8 41 PCM_D[6] PCMDATA[5]/GPIO118
/PF_OE +3.3V_Normal AB21 AE18
E NC_25 PCM_D[7] PCMDATA[6]/GPIO117 NF_CE1Z/GPIO138
9 40 Y15 AC17
/PF_CE0 PCM_A[0-14] PCMDATA[7]/GPIO116 NF_WPZ/GPIO198 /PF_WP
NC_7 NC_24 AD18
10 39 OS PCM_A[0] NF_CEZ/GPIO137 /PF_CE0
C102 W20 AC18
OPT OS NC_8 NC_23 10uF PCM_A[1] PCMADR[0]/GPIO125 NF_CLE/GPIO136 /PF_CE1
1K
1K
1K
1K
1K
R108 11 38 V20 AC19
C101 PCMADR[1]/GPIO124 NF_REZ/GPIO139 /PF_OE
1K PCM_A[2] W22 AD17
0.1uF VDD_1 VDD_2
OPT
OPT
OPT
OPT
PCMADR[2]/GPIO122 NF_WEZ/GPIO140 /PF_WE
OS
12 37 PCM_A[3] AB18 AE17
+3.3V_Normal VSS_1 VSS_2 C103 PCM_A[4] PCMADR[3]/GPIO121 NF_ALE/GPIO141 PF_ALE
R115
R117
R165
R123
R152
13 36 0.1uF AA20 AD19
OPT PCM_A[5] PCMADR[4]/GPIO99 NF_RBZ/GPIO142 /F_RB
NC_9 NC_22 OS AA21
R105 PCMADR[5]/GPIO101 AR104
1K 14 35 LED_R/BUZZ PCM_A[6] Y19 22
NC_10 NC_21 PCM_A[7] PCMADR[6]/GPIO102
15 34 AB17 OS
AUD_SCK PCM_A[8] PCMADR[7]/GPIO103
CL NC_20 OS AUD_MASTER_CLK R148 Y16
16 33 PCM_A[9] PCMADR[8]/GPIO108
OPT
/PF_CE1 AR102 AUD_MASTER_CLK_0 AB19
PCMADR[9]/GPIO110 GPIO_PM[0]/GPIO6
H5
POWER_DET
R104 AL I/O3 PCM_A[3] OPT
56 PCM_A[10] AB20 K6
10K PF_ALE 17 32 PWM1 PCM_A[11] PCMADR[10]/GPIO114 PM_UART_TX/GPIO_PM[1]/GPIO7 PM_TXD
W I/O2 PCM_A[2] C112 AA16 K5
18 31 100pF PCM_A[12] PCMADR[11]/GPIO112 GPIO_PM[2]/GPIO8 INV_CTL
/PF_WE PWM0 AA19 J6
WP I/O1 PCM_A[1] 50V PCM_A[13] PCMADR[12]/GPIO104 GPIO_PM[3]/GPIO9 RL_ON
1K
1K
1K
1K
1K
19 30 AC21 K4
PCM_A[14] PCMADR[13]/GPIO107 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1
NON_OS
NC_11 I/O0 PCM_A[0] AA17 L6
C OS PCMADR[14]/GPIO106 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD
20 29 C2
R106
B 1K NC_12 NC_19 22 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
R116
R118
R121
R124
R153
/PF_WP 21 28 Y20 L5
OPT /PCM_REG PCMREG_N/GPIO123 GPIO_PM[7]/GPIO13 /FLASH_WP
NC_13 NC_18 M6
OS E Q101 22 27 GPIO_PM[8]/GPIO14 SIDE_HP_MUTE
MMBT3904(NXP) AB15 M5
R102 /PCM_OE PCMOE_N/GPIO113 GPIO_PM[9]/GPIO15 PANEL_CTL
NC_14 NC_17 AA22 C1
3.3K 23 26 /PCM_WE PCMWE_N/GPIO197 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 PM_MODEL_OPT_0
NC_15 NC_16 AD22 M4
24 25 +5V_Normal /PCM_IORD PCMIORD_N/GPIO111 GPIO_PM[11]/GPIO17 AMP_MUTE
AD20
/PCM_IOWR PCMIOWR_N/GPIO109
A2 R147 33
R132 PM_SPI_SCK/GPIO1 SPI_SCK
AD21 D3 R154 22 R146 33
10K /PCM_CE PCMCE_N/GPIO115 PM_SPI_CZ0/GPIO_PM[12]/GPIO0 /SPI_CS
AC20 B2 OPT
R133 /PCM_IRQA PCMIRQA_N/GPIO105 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
10K /PCM_CD PCMCD_N/GPIO130 PM_SPI_SDO/GPIO3 SPI_SDO
Y21 for SERIAL FLASH
/PCM_WAIT PCMWAIT_N/GPIO100
Y22
PCM_RST PCM_RESET/GPIO129
C108 C109
0.1uF 0.1uF CI_TS_CLK
Y14
OPT TS0CLK/GPIO87 CI_TS_VAL
NAND_FLASH_1G_SS NAND_FLASH_1G_TOSHIBA OPT U21 AA10
NAND_FLASH_1G_HYNIX USB1_OCD CI_TS_SYNC
EAN61857001 EAN61508001 PCM2_CE_N/GPIO131 TS0VALID/GPIO85
EAN35669102 R120 22 V21 Y12
IC102-*2 IC102-*3 /CI_CD1 USB1_CTL PCM2_IRQA_N/GPIO132 TS0SYNC/GPIO86 CI_TS_DATA[0-7]
IC102-*1 K9F1G08U0D-SCB0 TC58NVG0S3ETA0BBBH R122 22 R20
H27U1G8F2BTR-BC /CI_CD2 PCM2_CD_N/GPIO135 CI_TS_DATA[0]
OPT T20 Y13 from CI SLOT
PCM_5V_CTL PCM2_WAIT_N/GPIO133 TS0DATA_[0]/GPIO77 CI_TS_DATA[1]
U22 Y11
ERROR_OUT PCM2_RESET/GPIO134 TS0DATA_[1]/GPIO78 CI_TS_DATA[2]
NC_1 NC_29 NC_1 NC_29 AA12
NC_1 NC_29 1 48 1 48 to delete CI or gate for TS0DATA_[2]/GPIO79 CI_TS_DATA[3]
1 48 D4 AB12
NC_2 NC_28 NC_2 NC_28 USB2_OCD UART1_TX/GPIO43 TS0DATA_[3]/GPIO80 CI_TS_DATA[4]
NC_2 NC_28 2 47 2 47 E4 AA14
2 47
NC_3 NC_27 NC_3 NC_27 MSTAR (IC101) Multi package (11.11.18~) USB2_CTL
N25
UART1_RX/GPIO44 TS0DATA_[4]/GPIO81
AB14 CI_TS_DATA[5]
NC_3 NC_27 3 46 3 46 PM_TXD UART2_TX/GPIO65 TS0DATA_[5]/GPIO82 CI_TS_DATA[6]
3 46 N24 AA13
NC_4 NC_26 NC_4 NC_26 PM_RXD UART2_RX/GPIO64 TS0DATA_[6]/GPIO83 CI_TS_DATA[7]
NC_4 NC_26 4 45 4 45 TE(US)_Multi T8(EU)_Multi VD(CN)_Multi W1(KR)_Multi B8 AB11
4 45 IC101-*5 IC101-*6 IC101-*7 IC101-*8 MODEL_OPT_6 UART3_TX/GPIO47 TS0DATA_[7]/GPIO84
NC_5 I/O7 NC_5 I/O8 LGE2111A-TE LGE2111A-T8 LGE2111A-VD LGE2111A-W1 [MULTI] for SYSTEM EEPROM A8 FE_TS_CLK
NC_5 I/O7 5 44 5 44 MODEL_OPT_7 UART3_RX/GPIO48 FE_TS_VAL_ERR
5 44 (IC104) AC15
NC_6 I/O6 NC_6 I/O7 C7 AB25 C7 AB25 C7 AB25 C7 AB25 TS1CLK/GPIO98 FE_TS_SYNC
NC_6 I/O6 6 43 6 43 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 R136 22 P23 AD15
6 43 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 I2C_SCL I2C_SCKM2/DDCR_CK/GPIO72 TS1VALID/GPI96 FE_TS_DATA[0-7]
R/B I/O5 RY/BY I/O6 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 R137 22 P24 AC16
R/B I/O5 7 42 7 42 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 I2C_SDA I2C_SDAM2/DDCR_DA/GPIO71 TS1SYNC/GPIO97
7 42 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24
RE I/O4 RE I/O5 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 FE_TS_DATA[0] Internal demod out
RE I/O4 8 41 8 41 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 D2 AD16
8 41 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 RGB_DDC_SDA DDCA_DA/UART0_TX TS1DATA_[0]/GPIO88 FE_TS_DATA[1]
CE NC_25 CE NC_25 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 D1 AE15
CE NC_25 9 40 9 40 AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO89 FE_TS_DATA[2]
9 40 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 AE14
NC_7 NC_24 NC_7 NC_24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 TS1DATA_[2]/GPIO90 FE_TS_DATA[3]
NC_7 NC_24 10 39 10 39 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AC13
10 39 N6
I2C_SCKM0/GPIO53 LVB1P
V24 N6
V24 N6
V24 N6
V24 TS1DATA_[3]/GPIO91 FE_TS_DATA[4]
NC_8 NC_23 NC_8 NC_23 AB2
I2C_SDAM0/GPIO54 LVB1N
W25 AB2
W25 AB2
W25 AB2
W25 P21 AC14
NC_8 NC_23 11 38 11 38 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 PWM0 PWM0/GPIO66 TS1DATA_[4]/GPIO92 FE_TS_DATA[5]
11 38 GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23 N23 AD12
VCC_1 VCC_2 VCC_1 VCC_2 LVB3P
Y24
LVB3P
Y24
LVB3P
Y24
LVB3P
Y24 PWM1 PWM1/GPIO67 TS1DATA_[5]/GPIO93 FE_TS_DATA[6]
VCC_1 VCC_2 12 37 12 37 LVB3N
AA25
LVB3N
AA25
LVB3N
AA25
LVB3N
AA25 P22 AD13
12 37 LVB4P
AA24
LVB4P
AA24
LVB4P
AA24
LVB4P
AA24 +3.5V_ST PWM2 PWM2/GPIO68 TS1DATA_[6]/GPIO94 FE_TS_DATA[7]
VSS_1 VSS_2 VSS_1 VSS_2 LVB4N LVB4N LVB4N LVB4N R21 AD14
VSS_1 VSS_2 13 36 13 36 AE24 AE24 AE24 AE24 LED_B/LG_LOGO PWM3/GPIO69 TS1DATA_[7]/GPIO95
13 36 LVACKP
AD24
LVACKP
AD24
LVACKP
AD24
LVACKP
AD24 P20
NC_9 NC_22 NC_9 NC_22 LVACKN
Y23
LVACKN
Y23
LVACKN
Y23
LVACKN
Y23 PWM4/GPIO70
NC_9 NC_22 14 35 14 35 LVBCKP
W24
LVBCKP
W24
LVBCKP
W24
LVBCKP
W24 F6
14 35 LVBCKN LVBCKN LVBCKN LVBCKN
LED_R/BUZZ PWM_PM/GPIO199
NC_10 NC_21 NC_10 NC_21 T25 T25 T25 T25
NC_10 NC_21 15 34 15 34 GPIO196
U23
GPIO196
U23
GPIO196
U23
GPIO196
U23
15 34 GPIO193
T24
GPIO193
T24
GPIO193
T24
GPIO193
T24
CLE NC_20 CLE NC_20 GPIO194
T23
GPIO194
T23
GPIO194
T23
GPIO194
T23 R149 R143
CLE NC_20 16 33 16 33 GPIO195 GPIO195 GPIO195 GPIO195
4.7K 4.7K H6
16 33 11_SUB 11_SUB KEY1 SAR0/GPIO31
ALE I/O3 ALE I/O4 G5
ALE I/O3 17 32 17 32 KEY2 SAR1/GPIO32
17 32 R101 22 G4
WE I/O2 WE I/O3 S/T_SDA SAR2/GPIO33
WE I/O2 18 31 18 31 R163 11_SUB 22 J5
18 31 S/T_SCL SAR3/GPIO34
WP I/O1 WP I/O2 R164 11_SUB 22 J4
WP I/O1 19 30 19 30 SCART1_MUTE SAR4/GPIO35
19 30 EU_OPT
NC_11 I/O0 NC_11 I/O1 S7LR2_DIVX_AT_ASE S7LR2_DIVX_AT_SPIL S7LR2_DIVX_DTS_AT S7LR2_DIVX_CN
NC_11 I/O0 20 29 20 29 IC101-*1 IC101-*2 IC101-*3 IC101-*4 LOCAL DIMMING
20 29 LGE2111A-TE LGE2111A-TE SPIL LGE2111A-W1 LGE2111A-VD
NC_12 NC_19 NC_12 NC_19 R23
NC_12 NC_19 21 28 21 28 L/DIM_VS VSYNC_LIKE/GPIO145
21 28 C7 AB25 C7 AB25 C7 AB25 C7 AB25
NC_13 NC_18 NC_13 NC_18 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23
NC_13 NC_18 22 27 22 27 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 R24
22 27 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 L/DIM_SCLK SPI1_CK/GPIO201
NC_14 NC_17 NC_14 NC_17 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 R25
NC_14 NC_17 23 26 23 26 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 L/DIM_MOSI SPI1_DI/GPIO202
23 26 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 T21
NC_15 NC_16 NC_15 NC_16 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 SENSOR_SCL SPI2_CK/GPIO203
NC_15 NC_16 24 25 24 25 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 T22
24 25 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 SENSOR_SDA SPI2_DI/GPIO204
GPIO49 LVA4N GPIO49 LVA4N GPIO49 LVA4N GPIO49 LVA4N
AB3 AB3 AB3 AB3
GPIO50 GPIO50 GPIO50 GPIO50
A9 V23 A9 V23 A9 V23 A9 V23
GPIO51 LVB0P GPIO51 LVB0P GPIO51 LVB0P GPIO51 LVB0P
F4 U24 F4 U24 F4 U24 F4 U24
GPIO52 LVB0N GPIO52 LVB0N GPIO52 LVB0N GPIO52 LVB0N
AB1 V25 AB1 V25 AB1 V25 AB1 V25
I2C_SCKM0/GPIO53 LVB1P I2C_SCKM0/GPIO53 LVB1P I2C_SCKM0/GPIO53 LVB1P I2C_SCKM0/GPIO53 LVB1P
N6 V24 N6 V24 N6 V24 N6 V24
I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N
AB2 W25 AB2 W25 AB2 W25 AB2 W25
GPIO73 LVB2P GPIO73 LVB2P GPIO73 LVB2P GPIO73 LVB2P
AC2 W23 AC2 W23 AC2 W23 AC2 W23
GPIO74 LVB2N GPIO74 LVB2N GPIO74 LVB2N GPIO74 LVB2N
AA23 AA23 AA23 AA23
LVB3P LVB3P LVB3P LVB3P
Y24 Y24 Y24 Y24
LVB3N LVB3N LVB3N LVB3N
AA25 AA25 AA25 AA25
LVB4P LVB4P LVB4P LVB4P
AA24 AA24 AA24 AA24
DIMMING I2C LVB4N LVB4N LVB4N LVB4N
+3.3V_Normal LVACKP
AE24
LVACKP
AE24
LVACKP
AE24
LVACKP
AE24
AD24 AD24 AD24 AD24
LVACKN LVACKN LVACKN LVACKN
Y23 Y23 Y23 Y23
LVBCKP LVBCKP LVBCKP LVBCKP
W24 W24 W24 W24
LVBCKN
T25
LVBCKN
T25
LVBCKN
T25
LVBCKN
T25
S7LR2_DIVX_MS10
A_DIM GPIO196
GPIO193
U23
T24
GPIO196
GPIO193
U23
T24
GPIO196
GPIO193
U23
T24
GPIO196
GPIO193
U23
T24
IC101
R156 10K GPIO194
T23
GPIO194
T23
GPIO194
T23
GPIO194
T23 LGE2111A-T8
A_DIM PWM0 GPIO195 GPIO195 GPIO195 GPIO195
R140 R141 R160 R161 R144 R145

R157 100 1K 1K 1K 1K 2.2K 2.2K
PWM_DIM PWM2
C7 AB25
A_DIM AMP_RESET GPIO36 LVA0P RXA0+
E6 AB23
C111 AMP_SDA 5V_DET_HDMI_1 GPIO37 LVA0N RXA0-
2.2uF F5 AC25
AMP_SCL NON_OS_512k_ST NON_OS_512k_ATMEL 5V_DET_HDMI_2 GPIO38 LVA1P RXA1+
B6 AB24
IC104-*3 IC104-*4 5V_DET_HDMI_4 GPIO39 LVA1N RXA1-
I2C_SDA E5 AD25
M24512-RMN6TP AT24C512C-SSHD-T AV_CVBS_DET GPIO40 LVA2P RXA2+
I2C_SCL +3.3V_Normal D5 AC24
DSUB_DET GPIO41 LVA2N RXA2-
B7 AE23
URSA5_RESET
SENSOR_SDA E0 VCC A0 VCC SC1/COMP1_DET GPIO42 LVA3P RXA3+
1 8 1 8 E7 AC23
SENSOR_SCL HP_DET GPIO45 LVA3N RXA3-
F7 AC22
E1 WC A1 WP OLP RXA4+
4.7K
R182
2 7 2 7 GPIO46 LVA4P
applied on only SMALL PCB AB5 AD23
TUNER_RESET GPIO49 LVA4N RXA4-
AB3
E2 SCL A2 SCL MODEL_OPT_0 GPIO50
3 6 3 6 A9 V23
URSA5_RESET R171 100 RXB0+
HDCP EEPROM +3.3V_Normal GPIO51 LVB0P
EEPROM URSA5_RESET F4 U24
Addr:10101-- +3.3V_Normal
VSS
4 5
SDA GND
4 5
SDA MODEL_OPT_1
AB1
GPIO52 LVB0N
V25
RXB0-
R172 0
PM MODEL OPTION AMP_SCL I2C_SCKM0/GPIO53 LVB1P RXB1+
+3.5V_ST R173 OPT 0 N6 V24
URSA5_RESET AMP_SDA I2C_SDAM0/GPIO54 LVB1N RXB1-
OPT AB2 W25
HDCP_EEPROM EAN43349003 EAN43349004 MODEL_OPT_2 GPIO73 LVB2P RXB2+
IC104 AC2 W23
IC103 HDCP_EEPROM DEMOD_RESET GPIO74 LVB2N RXB2-
HDCP_EEPROM CAT24WC08W-T C107 AT24C256C-SSHL-T C105 AA23
R113 LVB3P RXB3+
4.7K 0.1uF NVRAM_ATMEL 0.1uF NVRAM_ST NVRAM_RENESAS Y24
A0 VCC LVB3N RXB3-
1 8 R174 R177 AA25
IC104-*1 IC104-*2 10K 10K
LVB4P RXB4+
A1 WP TOUCH_KEY 11_SUB AA24
2 7 R127 4.7K A0 VCC M24256-BRMN6TP R1EX24256BSAS0A
1 8 R178 100 OPT LVB4N RXB4-
HDCP_EEPROM HDCP_EEPROM I2C_SCL
A2 SCL R128 22 PM_MODEL_OPT_0
3 6 AE24
A1 WP E0 VCC A0 VCC LVACKP RXACK+
VSS 4 SDA 2 7 1 8 1 8 R179 100 OPT AD24
5 RXACK-
R129 22 I2C_SDA
A0h PM_MODEL_OPT_1 LVACKN
Y23
A2 SCL E1 WC A1 WP LVBCKP RXBCK+
3 6 R111 22 I2C_SCL 2 7 2 7
HDCP_EEPROM R175 R176 W24
10K 10K LVBCKN RXBCK-
GND SDA E2 SCL A2 SCL TACT_KEY 12_SUB
4 5 R112 22 3 6 3 6
I2C_SDA T25
GPIO196 MODEL_OPT_3
C104 C106 U23
VSS SDA VSS SDA GPIO193 MODEL_OPT_4
8pF 8pF 4 5 4 5 T24
EAN61133501 OPT OPT GPIO194 MODEL_OPT_5
T23
GPIO195 S2_RESET
EAN61548301 EAN62389501
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011.12.01
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 1
Copyright 2012 LG Electronics. Inc. All right reserved.

Only for training and service purposes LGE Internal Use Only
MODEL OPTION
+3.3V_Normal +2.5V_Normal +3.3V_Normal

PIN NAME PIN NO. LOW HIGH
MODEL OPTION
+1.10V_VDDC
MODEL_OPT_0 AB3 FHD HD VDDC 1.05V +1.10V_VDDC
1K
1K
1K
1K
1K
1K
1K
1K
VDDC : 2026mA
PHM_ON
MODEL_OPT_1 F4 PHM_OFF PHM_ON
DVB_T2
120HZ
DVB_S
OS(not use) / NonOS_Non_ErrorOut

OLED
3D
HD
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
MODEL_OPT_2 AB2
10uF
NON_DVB_T2 DVB_T2
1uF
1uF
R4028
R4027
OPT OPT
R291
R211
R290
R206
R208
R226
MODEL_OPT_3 T25 NON_3D 3D
C275
C276
C228
OPT OPT
C4006
C4011
C4013
C4019
C4024
OPT OPT OPT OPT
OPT 100
C277
C280
C283
C292
C299
R201
IF_AGC_SEL MODEL_OPT_0 MODEL_OPT_4 U23 NON_OLED OLED
R202 BOOSTER_OPT100
LNA2_CTL MODEL_OPT_1
R203 RF_SW_OPT 100 MODEL_OPT_5 T24 NON_DVB_S DVB_S
RF_SWITCH_CTL MODEL_OPT_2
R204 OPT 100
MODEL_OPT_3
R4031 OPT 100 MODEL_OPT_4 MODEL_OPT_6 B8 NON_120HZ 120HZ
R4032 OPT 100 MODEL_OPT_5 HALF_NIM/ASIA HALF_NIM/ASIA
R4040 OPT 100 MODEL_OPT_6 MODEL_OPT_7 A8 READY READY C4068-*1 C4069-*1 IC101
OPC&SCANNING_CTRL R4039 100 MODEL_OPT_7 68pF 68pF LGE2111A-T8
+1.10V_VDDC
OPT
S7LR2_DIVX_MS10
1K
1K
1K
1K
1K
1K
1K
1K
NON_DVB_T2
Close to MSTAR
NON_120HZ
NON_DVB_S
DTV_IF
NON_OLED
Normal Power 3.3V

PHM_OFF
NON_3D
R288 100 C257 0.1uF K12 G10

IF_P_MSTAR
FHD
AVDDLV_USB GND_32
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 +3.3V_Normal VDD33 G11
OS(use) / NonOS_ErrorOut C4067 HALF_NIM/EU_NON_T2 GND_33
R4030
R4029
C4068 G9 G12
R294
R212
R293
R207
R209
R227
OPT 100pF VDDC_1 GND_34

H9 G13
R289 100 C258 0.1uF L204 VDDC_2 GND_35
IF_N_MSTAR BLM18PG121SN1D K10 G14
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 VDDC_3 GND_36
HALF_NIM/EU_NON_T2 K11 G17
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
VDDC_4 GND_37
0.1uF
C4069
0.1uF
L10 G18
10uF
10uF
C4001 10uF
100pF
IC101 OPT OPT OPT M12
VDDC_5 GND_38
G19
OPT
LGE2111A-T8 M13
VDDC_6 GND_39
G24
C4025
C4007
C4012
C4014
C4020
C4031
VDDC_7 GND_40
C284
C293
C4043
C4044
C265
C267
C232
C250 0.1uF R4002 47 TU_SIF OPT N12 H11
OPT VDDC_8 GND_41
C251 0.1uF R4003 47 OPT P14 H12
S7LR2_DIVX_MS10 VDDC_9 GND_42
J2 AC4 C264 P15 H13
CK+_HDMI1 RXACKP 1000pF
VIFP VDDC_10 GND_43
J3 AD3 ANALOG SIF OPT R10 H14
CK-_HDMI1 RXACKN VIFM VDDC_11 GND_44
K3 Close to MSTAR FB_CORE R14 H15
D0+_HDMI1 RXA0P VDDC_12 GND_45
J1 AC3 AVDD_AU33 R15 H16
D0-_HDMI1 RXA0N IP +3.3V_Normal VDDC_13 GND_46
K2 AE3 T10 H17
D1+_HDMI1 RXA1P IM VDDC_14 GND_47
K1 L227 L208 H18
D1-_HDMI1 RXA1N BLM18PG121SN1D BLM18PG121SN1D GND_48
L2 AD4 HALF_NIM/EU_NON_T2 H19
D2+_HDMI1 RXA2P SIFP GND_49
L3 AC5 C241 P10 J9
D2-_HDMI1 RXA2N SIFM C240 AVDD1P0 GND_50
T5 HALF_NIM/EU_NON_T2 0.1uF 0.1uF P19 J10
DDC_SDA_1 DDCDA_DA/GPIO24 FB_CORE FB_CORE GND_51
T4 C4064 HALF_NIM/EU_NON_T2 R16 J11
DDC_SCL_1 0.1uF R4019
DDCDA_CK/GPIO23 10K AVDDL_MOD GND_52
V5 L11 J12
HPD1 HOTPLUGA/GPIO19 HALF_NIM/EU_NON_T2 AVDD10_LAN GND_53
R4004 M14 J13
0 MIUVDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C4065 GND_56
OPT 0.047uF W9 J16
R4001 AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C 0
HALF_NIM/EU_NON_T2 AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO75 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO76 TU_SDA AVDD25_REF GND_60
Close to MSTAR K9
GND_61
Y17 K13
C261 22pF AVDD25_LAN GND_62
AD1 K14
XIN GND_63
AC1 V18 H10
R287
X201 AVDD2P5_MOD
XOUT AVDD_MOD_1 GND_64
1M
R5 24MHz C262 22pF U19 K18

PM_MODEL_OPT_1 HOTPLUGB/GPIO20 AVDD_MOD_2 GND_65
HDMI
K19
GND_66
AE9 D7 OPT R297 0 K22
CK+_HDMI4 RXCCKP SPDIF_IN/GPIO152 CI_DET GND_67
AC9 D6 W14 L8
CK-_HDMI4 RXCCKN SPDIF_OUT/GPIO153 SPDIF_OUT AVDD25_PGA AVDD25_PGA GND_68
AC10 R296 100 W15 L9
D0+_HDMI4 SIDE USB AVSS_PGA
D0-_HDMI4
AD9
RXC0P
RXC0N
SPDIF_OPTIC Normal 2.5V AVSS_PGA GND_69
GND_70
J8
AC11 E3 U7 L12
D1+_HDMI4 RXC1P USB0_DM SIDE_USB2_DM AVDD_NODIE AVDD_NODIE GND_71
AD10 E2 +2.5V_Normal AVDD2P5 L13
D1-_HDMI4 RXC1N USB0_DP SIDE_USB2_DP GND_72
AE11 L7 L18
D2+_HDMI4 RXC2P VDD33 AVDD_DVI_USB_1 GND_73
AD11 AC12 L211 AVDD2P5:172mA M7 L19
D2-_HDMI4 RXC2N USB1_DM SIDE_USB1_DM BLM18PG121SN1D AVDD_DVI_USB_2 GND_74
AE8 AE12 P7 M8
DDC_SDA_4 DDCDC_DA/GPIO28 USB1_DP SIDE_USB1_DP AVDD3P3_MPLL GND_75
AD8 R7 K8
DDC_SCL_4 DDCDC_CK/GPIO27 AMP_SCL OPT OPT AVDD_DMPLL GND_76
AC8 M10
HPD4 HOTPLUGC/GPIO21 AMP_SDA C269 C270 C271 C273 C274 GND_77
C8 R213 22 DVB_S 10uF 0.1uF 0.1uF 0.1uF 0.1uF C4045 1uF M19 M11
I2S_IN_BCK/GPIO150 DEMOD_SCL DVDD_NODIE GND_78
F2 D8 R214 22 DVB_S L14
CK+_HDMI2 RXDCKP I2S_IN_SD/GPIO151 DEMOD_SDA GND_79
F3 D9 V7 M15
CK-_HDMI2 RXDCKN I2S_IN_WS/GPIO149 COMP2_DET AVDD_AU33 AVDD_AU33 GND_80
G3 W7 M16
D0+_HDMI2 RXD0P AVDD2P5_MOD AVDD_EAR33 GND_81
F1 B10 M18
D0-_HDMI2 RXD0N I2S_OUT_BCK/GPIO156 AUD_SCK AVDD25_PGA:13mA GND_82
G2 C9 R19 M25
D1+_HDMI2 RXD1P I2S_OUT_MCK/GPIO154 AUD_MASTER_CLK_0 L229 VDD33 VDDP_1 GND_83
G1 B9 BLM18PG121SN1D T19 N10
D1-_HDMI2 RXD1N I2S_OUT_SD/GPIO157 AUD_LRCH VDDP_2 GND_84
H2 N11
D2+_HDMI2 RXD2P GND_85
H3 W18 N13
D2-_HDMI2 RXD2N I2S_I/F C4070 AVDD_LPLL_1 GND_86
R6 0.1uF W19 N14
DDC_SDA_2 DDCDD_DA/GPIO30 AVDD_LPLL_2 GND_87
U6 C10 16V N15
DDC_SCL_2 DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO155 AUD_LRCK GND_88
P5 V19 N16
HPD2 HOTPLUGD/GPIO22 VDD33 VDDP_NAND GND_89
R4 N17
CEC_REMOTE_S7 CEC/GPIO5 GND_90
AB9 C236 2.2uF COMP2 N19
AUL0 SC1/COMP1_L_IN AVDD25_PGA GND_91
AA11 C237 2.2uF COMP2 J17 K7
AUR0 SC1/COMP1_R_IN AVDD_MIU AVDD_DDR0_D_1 GND_92
RGB_PC R4024 510 P2 Y9 L219 K15 P8
DSUB_HSYNC HSYNC0 AUL1 BLM18PG121SN1D AVDD_DDR0_D_2 GND_93
RGB_PC R4025 510 R3 AA9 K16 P9
DSUB_VSYNC VSYNC0 AUR1 AVDD_DDR0_D_3 GND_94
RGB_PC
RGB_PC R228 33 C204 0.047uF N2 AA7 L15 M9

DSUB_R+ RIN0P AUL2 AVDD_DDR0_C GND_95
DSUB
RGB_PC
RGB_PC R229 68 C205 0.047uF P3 AB8 P11

RIN0M AUR2 C4027 GND_96
RGB_PC
RGB_PC R230 33 C206 0.047uF N3 Y8 C242 2.2uF 0.1uF K17 P13

DSUB_G+ GIN0P AUL3 COMP2_L_IN AVDD_DDR1_D_1 GND_97
RGB_PC
RGB_PC R231 68 C207 0.047uF N1 Y10 C243 2.2uF L223 L17 P16
GIN0M AUR3 COMP2_R_IN AVDD_DDR1_D_2 GND_98
RGB_PC
RGB_PC R232 33 C208 0.047uF M3 AC7 C244 2.2uF PC_AUDIO AVSS_PGA M17 P17
DSUB_B+ BIN0P AUL4 PC_L_IN AVDD_DDR1_D_3 GND_99
RGB_PC
RGB_PC R233 68 C209 0.047uF M2 AD7 C245 2.2uF PC_AUDIO BLM18SG121TN1D L16 P18
BIN0M AUR4 PC_R_IN AVDD_DDR1_C GND_100
RGB_PC
2.4K
C210 1000pF M1 P12

10K
R4026
R4023
SOGIN0 Close to IC with width trace GND_101

RGB_PC
RGB_PC
AUDIO IN R8
SCART1_RGB/COMP1 E9
GND_102
R9
GND_EFUSE GND_103
V2 R11
SC1_ID HSYNC1 GND_104
V3 W6 AUDIO OUT R12
SC1_FB VSYNC1 AUOUTL0 GND_105
R253 33 C211 0.047uF U3 V6 A23 R13
COMP2
COMP2 SCART1_Lout
SC1_R+/COMP1_Pr+ RIN1P AUOUTL2 GND_1 GND_106
R254 68 C212 0.047uF U2 V4 B17 R17
COMP2
COMP2 TP207
RIN1M AUOUTL3 GND_2 GND_107
R255 C213 T1 Y7 C23 T8
DDR3 1.5V
COMP2
COMP2 33 0.047uF TP208

SC1_G+/COMP1_Y+ GIN1P AUOUTR0 GND_3 GND_108
R256 C214 T2 W5 A5 T9
COMP2
COMP2 68 0.047uF
GIN1M AUOUTR2 SCART1_Rout GND_4 GND_109
R257 33 0.047uF R2 U5 C11 N7
COMP2
COMP2 C215 TP209

SC1_B+/COMP1_Pb+ BIN1P AUOUTR3 GND_5 GND_110
R258 68 0.047uF R1 C19 T11
COMP2
COMP2 C216
BIN1M GND_6 GND_111
T3 C22 T12
COMP2
C217 1000pF
SC1_SOG_IN SOGIN1 GND_7 GND_112
R236 0 AVDD_DDR0:55mA D14 T13
+1.5V_DDR GND_8 GND_113
NON_EU AVDD_MIU D18 T14
GND_9 GND_114
COMP2 AA2 D19 T15
HSYNC2 L209 GND_10 GND_115
R237 33 C218 0.047uF Y2 E17 T16
COMP2_Pr+ RIN2P L202 BLM18PG121SN1D GND_11 GND_116
R238 68 C219 0.047uF AA3 E18 T17
RIN2M BLM18SG121TN1D GND_12 GND_117
R239 33 C220 0.047uF W2 AD5 E19 U8
10uF OPT
0.1uF OPT
COMP2_Y+/AV_CVBS_IN GIN2P AUVRM GND_13 GND_118
R240 Y3 C249 C253 C256 E22 U9
C4036
0.1uF
C4038
0.1uF
C4009
0.1uF
C4042
68 C221 0.047uF C263
C278
10uF
C281
C290
C4046
0.1uF
1uF
GIN2M 4.7uF 1uF 0.1uF 10uF GND_14 GND_119
R241 33 C222 0.047uF V1 AE5 F8 U10
COMP2_Pb+ BIN2P AUVAG GND_15 GND_120
R242 68 C223 0.047uF W3 AC6 F17 U11
BIN2M AUVRP OPT GND_16 GND_121
C224 1000pF W1 F18 U12
SOGIN2 H/P OUT GND_17 GND_122
AA6 L203 5.6uH HEAD_PHONE F19 U13
EARPHONE_OUTL HP_LOUT GND_18 GND_123
CVBS In/OUT AB6 L205 5.6uH HEAD_PHONE AVDD_DDR1:55mA G8 U14
EARPHONE_OUTR HP_ROUT GND_19 GND_124
R244 33 C225 0.047uF AA8 H8 U15
TU_CVBS CVBS0 GND_20 GND_125
R245 33 C226 0.047uF Y4 C268 C272 N22 U16
SC1_CVBS_IN CVBS1 4.7uF 4.7uF GND_21 GND_126
R246 33 C227 0.047uF W4 C6 N21 U17
COMP2_Y+/AV_CVBS_IN CVBS2 ET_RXD[0]/RP/GPIO60 EPHY_RP 10V 10V GND_22 GND_127
AA5 C5 HEAD_PHONE HEAD_PHONE N20 R18
CVBS3 ET_TXD[0]/TP/GPIO57 EPHY_TP GND_23 GND_128
Y5 M22 V9
CVBS4 GND_24 GND_129
R249 33 C230 0.047uF AA4 A6 M21 V10
AV_CVBS_IN2 CVBS5 ET_RXD[1]/RN/GPIO63 EPHY_RN GND_25 GND_130
OPT OPT Y6 C4 M20 V11
AA1
CVBSOUT0 ET_TXD[1]/LED1/GPIO56 SOC_RESET F10
GND_26 GND_131
V12
DTV/MNT_VOUT
CVBSOUT1 GND_27 GND_132
B5 SWICH V15 V14
C203 ET_TX_CLK/TN/GPIO59 EPHY_TN +3.5V_ST SW200 GND_28 GND_133
1000pF R252 68 C233 0.047uF AB4 C3 JTP-1127WEM W16 V17
VCOM ET_TX_EN/GPIO58 R264 R265 R262 R263 *H/W opt : GND_29 GND_134
2
OPT A3 49.9 49.9 49.9 49.9 V8 T7

ET_MDC/GPIO61 ETHERNET GND_30 GND_135
Close to MSTAR ET_MDIO/GPIO62
B3 T18
GND_31 GND_136
E8
B4
ET_COL/LED0/GPIO55 C294 C295 SWICH STby 3.5V +1.10V_VDDC
1
0.1uF 0.1uF R205 MIUVDDC

100
AV_CVBS_IN2 C200 AVDD_NODIE:7.362mA L228
BLM18PG121SN1D
4.7uF R217
N4 10V
IRIN/GPIO4 IR 10
T6 R210 33 C231 0.047uF SOC_RESET +3.5V_ST AVDD_NODIE
ARC0 HDMI_ARC L206 C4071 C4062
N5 HDMI1_ARC HDMI1_ARC D200
SOC_RESET BAW56 GEANDE BLM18PG121SN1D 10uF 0.1uF
HWRESET
R200 C201
0.1uF C286 C252
62K
0.1uF 0.1uF

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER,IN/OUT,H/W OPT 2

TP for NON-EU models(except EU and China)
TP for CI slot TP for SCART TP for Headphone

/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT
/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT
/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE
/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] SC1_SOG_IN HP_DET
/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT
/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout
/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout
/PCM_CD PCM_D[7] CI_TS_DATA[4] SC1_CVBS_IN
/PCM_WAIT CI_TS_DATA[5]
PCM_RST CI_TS_DATA[6]
/CI_CD1 CI_TS_DATA[7]
/CI_CD2
PCM_5V_CTL
CI_DET
TP for S2
S2_RESET

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4_S7LR2 2011.07.07
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EN 3

ST_3.5V--> 3.375V --> 3.46V
+12V/+15V 20V-->3.51V --> 3.76V (3.59V) +3.5V_ST -> 3.375V
+12V/+15V +3.5V_ST
PANEL_POWER 24V-->3.78V --> 3.92V (3.79V) +3.5V_ST
FROM LIPS & POWER B/D L412

12V -->3.58V --> 3.82V (3.68V)
18.5V-->3.5V --> 3.75V (3.59V)
R488
100K
PD_+3.5V
120 OPT
PD_+12V
R450
CIS21J121 R463
R448
2.7K
10K
5%
0
1%
OPT R405-*2 R407-*2 PWR_DET_ON_SEMI
0.015uF C442 4.7K 4.7K IC408
0.01uF C438 10uF NCP803SN293
C409 C436 New item
0.1uF 25V R402 POWER_DET
0.015uF 0.01uF PANEL_DISCHARGE_RES_4.7K 100
25V PANEL_DISCHARGE_RES_4.7K VCC 3 2 RESET
+3.5V_ST 50V 50V Q409
R450-*1
PD_KR_42_LIPS
MMBT3906(NXP) AO3407A IC408-*1
PD_+12V
1
1/16W
+3.5V_ST
R447
1.2K
Q402 R405-*1 R407-*1 C474 APX803D29
1%
100
3K 3K C411 GND
1%
0.1uF 0.1uF
C443 PANEL_DISCHARGE_RES_3K
R439 10uF PANEL_DISCHARGE_RES_3K 16V RESET VCC
R461 R406 1 3 33K 2 3
OPT 4.7K NORMAL_EXPEPT_32 NORMAL_32 25V G PANEL_VCC
10K R401 C +24V
P403 P404 1
R447-*1
RL_ON 10K 2 FW20020-24S FM20020-24 L407-*1 PD_+12V
PD_KR_42_LIPS
B Q401 OPT GND
1/16W
MLB-201209-0120P-N2 OPT +24V R404
5.1K
MMBT3904(NXP) R431 100K
22K R440 C451 PWR_DET_ON_DIODES
1%
L407 5.6K 0.1uF
E
PWR ON 1 24V 25V
R482
8.2K
R462 L404-*1 2 CIS21J121 IC409-*1
PD_+12V_PWR_DET_ON_SEMI
1%
10K MLB-201209-0120P-N2 24V 24V POWER_+24V IC409 APX803D29
3 4 C
+3.5V_ST OPT R430 NCP803SN293 PD_+12V
R610 GND 5 6 GND NON_CI_CAP R480
L404 C418 10K B Q407 C455 R405 R407
33K GND GND VCC RESET 100 RESET VCC
CIS21J121 7 8 0.1uF MMBT3904(NXP) 0.1uF 2.2K 2.2K 3 2 2 3
3.5V 3.5V 50V 25V
R403
1.5K
9 10 OPT C 1 1
1%
R429 OPT OPT E POWER_+24V
OPT 3.5V 11 12 3.5V R435 PD_+12V
47K B Q406 GND GND
C406 C408 GND GND PANEL_CTL 22K C412
13 14 MMBT3904(NXP)
0.1uF 0.1uF 0.1uF PD_+12V_PWR_DET_DIODES
GND 15 16 GND/V-sync 1:AK10 R489 PANEL_DISCHARGE_RES_2.2K
16V 16V 10K E 16V
+12V/+15V
L402
12V
12V
12V
17
19
21
18
20
22
INV ON
A.DIM
P.DIM1
+3.3V_Normal
PANEL_DISCHARGE_RES_2.2K
Power_DET
CIS21J121 GND/P.DIM2 Err OUT
23 24
+3.5V_ST
FOR 200HZ PWM_DIM2
R419
OPT 1K 780 mA
C404
0.1uF
C407 25 OPT R415
+3.3V_Normal
R408
16V
0.1uF
16V SLIM_32~52
P401
SMAW200-H24S2
R412
0
100 R426
10K +1.5V_DDR Max 1000mA
100
L402-*1 +3.5V_ST
MLB-201209-0120P-N2 OPT C
R476 R421 +3.3V_Normal
0 OPT
R418 B 10K INV_CTL Q403 L403
OPT 6.8K +3.5V_ST AO3407A BLM18SG700TN1D
R475
D
0 E OPT IC407
Q405 +1.5V_DDR
MMBT3904(NXP) R427 AP7173-SPG-13 HF(DIODES)
PWM1 10K L420
NON_CI_CAP C425 OPT C437
BLM18PG121SN1D [EP] G OPT
C435 R434 0.1uF C445 22uF
R438 16V R446
0.1uF C423 0.1uF 16V
16V 10K 22K 10K
4.7uF 16V
NON_PSU_T120_LGD A_DIM IN OUT
1 8 16V
R611
THERMAL
0 R1 R457
PWM_DIM PG FB 4.3K
9
2 7
OPT 1/16W
C416 R606
0.1uF 3.9K VCC SS 1% R445
PWM_PULL-DOWN_3.9K 3 C472
16V
+3.3V_Normal 1.5A6 R2 22uF
C476
0.1uF
100
R606-*1 R433 10V 16V
1K 10K EN GND C467 R456
PWM_PULL-DOWN_1K 4 5 560pF 4.7K C
NON_CI_CAP 1/16W R443
50V POWER_ON/OFF_1 10K
1% B Q400
ERROR_OUT is used for +3.3V_Normal
C461
C475
0.1uF
OPT
MMBT3904(NXP)
10uF 16V
lamp(CCFL/EEFL) models. OPT 10V R490
10K
E
In other words, ERROR_OUT

R420
R486
4.7K
100
LED models need not use. ERROR_OUT
Vout=0.8*(1+R1/R2)=1.5319
FOR LPB Download
[To LED DRIVER]
+2.5V/+1.8V +3.3V_Normal
+3.3V_Normal OPT
FOR LPB MODEL R615
IC402 +2.5V_Normal P407
12507WR-08L 10K
TJ3940S-2.5V-3L
OPT
VIN 3 2 VOUT 300 mA R616
Vd=550mV 1
1 10K
R473
NON_CI_CAP GND
C432 1
2
0.1uF FOR LPB MODEL_L/DIM
LOCAL DIMMING
16V R612
33
C403 C440 3
L/DIM_SCLK
10uF 0.1uF
10V 16V
4
FOR LPB MODEL_L/DIM
R613
33
5
L/DIM_MOSI FOR LPB MODEL
R183
33
6
I2C_SCL
7
I2C_SDA
FOR LPB MODEL_L/DIM
R614 FOR LPB MODEL
33 R184
8 33
L/DIM_VS
FOR LPB MODEL_L/DIM
9 R617
4.7K
S7LR core 1.2V volt

+3.3V_Normal C447
R428 0.33uF
+12V/+15V 10K 16V
L401
+5V_USB 2000 mA +3.5V_ST C441 +1.10V_VDDC
R410 0.1uF
16V
10K
EP[GND]
VIN_3
PWRGD
BOOT
C405 C4075 +5V_USB +5V_Normal L413

EN
10uF 10uF
25V 25V L415
OPT
16
15
14
13
IC401 L406 L425 3.6uH

VIN_1 1 12 PH_3 +3.3V_Normal
3.6uH BLM18PG121SN1D
AOZ1051PI [EP]LX THERMAL
NON_CI_CAP VIN_2 PH_2 NR8040T3R6N
C430 C431 2 17 11 C444
OPT OPT C453 C456
C420 C4074 10uF 0.1uF GND_1 PH_1 0.1uF OPT
PGND NC C492 10V 16V 3 IC403 10 22uF 22uF 16V
1 8 22uF 0.1uF R180 OPT
22uF TPS54319TRE 10V 10V 10K R181
16V 16V GND_2 SS/TR
THERMAL
16V 4 9 1K
OLP
VIN SS C488
9
OPT 2 7
5
C4073 3300pF R1 C439

0.1uF C493 50V
R1
AGND
VSENSE
COMP
RT/CLK
1%
1/16W
27K
R442
16V AGND EN 0.01uF R432 100pF Not used :

3 6 50V 1/16W 330K 5% only for small(ready)
R416 R609 R436 C448
56K 11K FB COMP 15K 3300pF
4 5
1% 1% 3A 50V
R2
R608
12K
OPT R423
C494
1%
1/16W
56K
R441
12K
C4072 R2 2200pF
1%
100pF 50V 3A $ 0.165
Vout=0.8*(1+R1/R2) Vout=0.827*(1+R1/R2)=1.225V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/11.22
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER_LARGE 4

IR/LED and control for normal models.
+3.5V_ST
R2404 R2405
10K 10K
1% 1% R2411
100 12_SUB 11_SUB OPT
SENSOR_SCL P2401 P2402 P2403
L2401 OPT
R2401 BLM18PG121SN1D OPT 12507WR-10L 12507WR-15L 12507WR-12L
C2408
100 D2403
KEY1 18pF
5.48VTO5.76V
50V
OPT 1
C2401 D2402 1 1
0.1uF 5.6V
R2402 L2402 AMOTECH CO., LTD. R2412
100 BLM18PG121SN1D 100 2
KEY2 SENSOR_SDA 2 2
OPT OPT
OPT C2409 D2404 3
C2402 D2401 18pF 5.48VTO5.76V 3 3
0.1uF 5.6V 50V
AMOTECH CO., LTD.
JP2407
4
4 4
+3.5V_ST +3.5V_ST JP2408

5
5 5
L2403
IR_OUT_EU +3.5V_ST BLM18PG121SN1D
6
6 6
R2425 OPT
IR_OUT 1K IR_OUT
R2410 R2413
22 R2429 1.5K 7
+3.5V_ST C2403 C2404 7 7
IR_OUT IR_OUT_EU 3.3K 0.1uF 1000pF LED_B/LG_LOGO
16V 50V 12_SUB
IR_OUT_EU R2430 R2432 OPT
Q2406 C 10K 1.5K C2410 JP2409
8
B R2426 LED_R/BUZZ 0.1uF 8 8
MMBT3904(NXP) IR_OUT 16V
E 3.3K
R2431
C 47K JP2410
9
B 9 9
IR_OUT
Q2405 E
C2407 OPT
MMBT3904(NXP) +3.3V_Normal D2405 10
100pF
50V 5.48VTO5.76V 10 10
11_SUB
L2404
11
BLM18PG121SN1D JP2411
11 11
IR_OUT_US OPT
R2409 R2414
0 11_SUB 11_SUB 1.5K
C2405 C2406 LED_R/BUZZ 12 12
0.1uF 1000pF
16V 50V OPT
R2416 13
IR 10K 13
14
15
16
S/T_SCL
OPT OPT
C906 D902
ADUC 5S 02 0R5L
18pF 5.5V
50V
S/T_SDA
OPT OPT
C907 D903
ADUC 5S 02 0R5L
18pF 5.5V
50V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/11/16
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL 6

USB (SIDE)
USB1_DIODES USB2_DIODES USB_2

EAN61849601 EAN61849601
IC1450 L1450-*1 IC1451
L1451-*1
AP2191DSG MLB-201209-0120P-N2 AP2191DSG
MLB-201209-0120P-N2
120-ohm
120-ohm +5V_USB
NC GND +5V_USB USB_2_BEAD_MAG NC GND
8 1 8 1
L1451 L1450
CIS21J121 $0.077 CIS21J121 $0.077
OUT_2 IN_1 OUT_2 IN_1
7 2 USB_2_BEAD_SS 7 2
OPT USB_2
R1458 OPT C1452 OPT OPT C1454 USB_2
C1453 C1455
2K R1459 OUT_1 IN_2 10uF R1450 R1452 OUT_1 IN_2 10uF
1/8W 2K C1451 6 3 10V 0.1uF 2K 2K 6 3 10V 0.1uF
5% 1/8W 1/8W 1/8W C1450
5% 22uF 5% 5%
22uF
16V FLG EN +3.3V_Normal FLG EN +3.3V_Normal
5 4 16V 5 4
USB_2
OPT
R1455 R1457
4.7K 4.7K
OPT
USB1_CTL USB2_CTL
USB_2
R1454 R1456
10K 10K
R1451 47 R1453 47
JK1450-*1 JK1450 USB1_OCD JK1451-*1 JK1451 USB2_OCD
USB_1_32LS3500 USB_1_NORMAL USB_2_32LS3500 USB_2_NORMAL USB_2
3AU04S-345-ZC-H-LG
3AU04S-305-ZC-(LG)
3AU04S-305-ZC-(LG)
1
3AU04S-345-ZC-H-LG
1
USB DOWN STREAM
USB DOWN STREAM
USB DOWN STREAM
USB DOWN STREAM

2
2
SIDE_USB1_DM SIDE_USB2_DM
3
3
SIDE_USB1_DP SIDE_USB2_DP
4
4
D1451 D1450
5
RCLAMP0502BA 5 RCLAMP0502BA
OPT OPT

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4_S7LR2 10/08/13
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_OCP_DIODE 7

HDMI
5V_HDMI_1 +5V_Normal 5V_HDMI_2 +5V_Normal 5V_HDMI_4 +5V_Normal

5V_HDMI_1 5V_DET_HDMI_1
HDMI_1
HDMI_SIDE
R806
A1
A2
A1
A2
A1
A2
HDMI_2
10K MMBD6100 MMBD6100
MMBD6100
D821 D822 D824
SHIELD
C
C
R896 C
20
1K NON_CI_CAP
Q802 B R830
C802 MMBT3904(NXP) HPD1
19
HDMI_SIDE
HDMI_SIDE
R804 0.1uF 10K
R885 R889
HDMI_2
HDMI_2
16V E R884 R888 R887 R891
3.3K
18 1.8K
2.7K 2.7K 2.7K 2.7K
R802
2.7K 2.7K
17
DDC_SDA_1 DDC_SDA_1 DDC_SDA_2 DDC_SDA_4
16
DDC_SCL_1
15
DDC_SCL_1 DDC_SCL_2 DDC_SCL_4
14
HDMI_CEC
EAG59023302
13
HDMI_1_Normal
CK-_HDMI1
12
11
CK+
10 CK+_HDMI1
D0-
9 D0-_HDMI1
D0_GND
8
D0+
7 D0+_HDMI1
D1-
6 D1-_HDMI1
D1_GND
5
D1+
4 D1+_HDMI1
D2-
3 D2-_HDMI1
D2_GND
2
D2+
1 D2+_HDMI1
OPT
D802
JK802 For CEC
R855
100
HDMI_CEC CEC_REMOTE_S7
For BDP In-Packing Model

- EMI Gasket Touch Jack
SIDE_HDMI5V_HDMI_4
HDMI_2 5V_HDMI_2 5V_DET_HDMI_2
HDMI_2 5V_DET_HDMI_4 HDMI_SIDE
R807 R808
10K 10K BODY_SHIELD SHIELD SHIELD
SHIELD BODY_SHIELD
HDMI_2 HDMI_SIDE 20 20 20
R895 HDMI_2 R897
20 20 C HDMI_SIDE
C HDMI_SIDE 19 19
1K NON_CI_CAP_HDMI_2 HDMI_2 R828 NON_CI_CAP_HDMI_SIDE R862 19
1K Q803 B HOT_PLUG_DETECT HPD HPD
C801 Q801 B 10K C803 HPD4
19 HPD2 19 MMBT3904(NXP) 18 18 18
0.1uF MMBT3904(NXP) R837 0.1uF 10K
R803 VDD[+5V] +5V_POWER +5V_POWER
HDMI_SIDE
16V 16V
18 E
HDMI_2
18 17 17
R835
3.3K
1.8K E 1.8K 17
R801
3.3K
HDMI_2 HDMI_SIDE DDC/CEC_GND DDC/CEC_GND DDC/CEC_GND

17 17 16 16 16
DDC_SDA_4 SDA SDA SDA
DDC_SDA_2 16
16 15 15 15
DDC_SCL_4 SCL SCL SCL
DDC_SCL_2 15
15 14 14 14
R805 0 RESERVED NC NC
HDMI_ARC 14
14 HDMI1_ARC 13 13 13
HDMI_CEC CEC CEC CEC
HDMI_CEC
13
EAG62611201
HDMI_2_Normal
13 12 12 12
EAG59023302
TMDS_CLK- CLK- CLK-

CK-_HDMI2 CK-_HDMI4
12 12 11 11 11
HDMI_SIDE
TMDS_CLK_SHIELD CLK_SHIELD CLK_SHIELD

11 11 10 10 10
CK+ CK+
10 TMDS_CLK+ CLK+ CLK+
10 CK+_HDMI2 CK+_HDMI4
D0- 9 9 9
D0- 9 TMDS_DATA0- DATA0- DATA0-
9 D0-_HDMI2 D0-_HDMI4
D0_GND 8 8 8
D0_GND 8 TMDS_DATA0_SHIELD DATA0_SHIELD DATA0_SHIELD
8
D0+ 7 7 7
D0+ 7 TMDS_DATA0+ DATA0+ DATA0+
7 D0+_HDMI2 D0+_HDMI4
D1- 6 6 6
D1_GND 5 5 5
5
D1+ 4 4 4
D2- 3 3 3
D2_GND 2 2 2
2
D2+ 1 1 1
OPT SIDE_HDMI_32LS3500 HDMI_2_BDP_Model HDMI_1_BDP_Model

OPT 51U019S-312HFN-E-R-E-LG
D801 YKF45-7054V YKF45-7054V
D811 JK803-*1
JK801 JK803 JK801-*1 JK802-*1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8

RGB-PC / SPDIF
PC AUDIO
SPDIF OPTIC JACK +3.3V_Normal

PC_AUDIO
JK1102
5.15 Mstar Circuit Application
PEJ027-04
SPDIF_OPTIC
JK1103 3 E_SPRING
2F01TC1-CLM97-4F
6A T_TERMINAL1
GND 1 PC_AUDIO
Fiber Optic
R1107
7A B_TERMINAL1 15K
AMOTECH CO., LTD.
VCC PC_R_IN
2 NON_CI_CAP_PC_AUDIO
OPT PC_AUDIO PC_AUDIO
4 R_SPRING D1101 C1107 R1110
100pF R1102
VIN 5.6V 470K 10K
3 50V
SPDIF_OUT 5 T_SPRING
4 PC_AUDIO
OPT SPDIF_OPTIC SPDIF_OPTIC R1108
OPT OPT C1131 B_TERMINAL2
C1109 C1110 C1121 7B AMOTECH CO., LTD. 15K
SHIELD
R1104 0.1uF PC_L_IN
10K 22uF 10uF 100pF
16V NON_CI_CAP_PC_AUDIO
16V 16V 50V T_TERMINAL2 OPT PC_AUDIO
6B D1102 PC_AUDIO
C1108
R1103 R1111
100pF 10K
5.6V 50V 470K
RGB PC
+5V_Normal
RGB_PC
D1115
MMBD6100
A2
C
A1
RGB_PC RGB_PC NON_CI_CAP_RGB_PC

C1129
R1140 0.1uF
R1139 16V
2.2K
2.2K
RGB_DDC_SCL
NON_CI_CAP_RGB_PC
RGB_DDC_SDA
NON_CI_CAP_RGB_PC
C1127 C1128
18pF 18pF
50V 50V
DSUB_VSYNC
DSUB_HSYNC
OPT OPT
OPT OPT OPT D1114
C1122 C1126
D1109 68pF D1113 5.6V
68pF 20V 20V
50V 50V
ADUC 20S 02 010L ADUC 20S 02 010L
OPT
D1116
5.6V
OPT
R1148
0
DSUB_B+ PM_RXD
ADUC 20S 02 010L
RGB_PC OPT OPT
R1133 D1110 R1149
75 20V 0
PM_TXD
R1150 R1151
0 0
DSUB_G+
ADUC 20S 02 010L
RGB_PC +3.3V_Normal
OPT
R1135 D1111
75 20V
RGB_PC
R1146
10K RGB_PC
R1147
1K
DSUB_DET
OPT
DSUB_R+
D1117
ADUC 20S 02 010L 5.6V
RGB_PC OPT ADMC 5M 02 200L
R1137 D1112
75 20V
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
DDC_GND
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
BLUE
RED
NC
SHILED
11
12
13
14
15
16
10
6
9
1
5
JK1104
SPG09-DB-010
RGB_PC

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RGB-PC/SPDIF 9

RS-232C
COMMERCIAL/NonOS MODEL OPTION
COMMERCIAL MODEL OPTION COMMERCIAL_RS232C_PHONEJACK 32LS3500_RS232C_PHONEJACK
JP1002
IR_OUT
R1003 M6 6 M6 6
100 JP1000
+3.5V_ST
M1 1 M1 1
R1002 M3_DETECT 3 M3_DETECT 3

100 JP1001
JP1004
M4 4 M4 4
C1000 M5_GND 5 M5_GND 5

0.33uF OPT OPT KJA-PH-1-0177 PEJ030-01
D1000 D1001 JK1001 JK1001-*1
ADUC 20S 02 010L ADUC 20S 02 010L
20V 20V
COMMERCIAL COMMERCIAL (H:7mm) ONLY 32LS3500 US MODEL(H:10mm)
COMMERCIAL C1005
IC1000 0.1uF
MAX3232CDR
COMMERCIAL C1+ VCC

1 16 OS_Debug(P1000)
C1001 +3.5V_ST P1000
0.1uF V+ GND
COMMERCIAL 2 15 12507WR-04L
C1002
0.1uF C1- DOUT1
JP1003
VCC
3 14 1
COMMERCIAL C2+ RIN1 RS-232C_IC_Bypass PM_RXD

4 13 2
C1003
0.1uF C2- ROUT1 R1000 R1001 GND
5 12 0 0 3
PM_RXD
RS-232C_IC_Bypass
COMMERCIAL V- DIN1 RM_TXD

6 11 PM_TXD
4
C1004
0.1uF DOUT2 DIN2 5
7 10
GND
RIN2 ROUT2
8 9
EAN41348201
For Comsumer model,

use 4PIN Wafer.

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_PHONE 10

LVDS for large inch
[51Pin LVDS Connector]

(For FHD 60Hz) FOR FHD REVERSE(10bit) [30Pin LVDS Connector]
FHD Change in S7LR (For HD 60Hz_Normal)
P703
FI-RE51S-HF-J-R1500
MIRROR Pol-change
LVDS_SEL HD
RXA4+ RXA0+ RXA0-
1 P705
+3.3V_Normal RXA4- RXA0- RXA0+ FF10001-30
2
RXA3+ RXA1+ RXA1-
3 OPT
R705 RXA3- RXA1- RXA1+ 1
4 3.3K
RXACK+ RXA2+ RXA2- 2
5
OPT
OPT SCANNING_EN RXACK- RXA2- RXA2+ 3 R713
6 R710 0
10K RXA2+ RXACK+ RXACK- 4
7 +3.3V_Normal
RXA2- RXACK- RXACK+ 5
8 PWM_DIM
PSU_T120_LGD OPT RXA1+ RXA3+ RXA3- 6
9 R703 RXA3+
R706
0 3.3K RXA1- RXA3- RXA3+ 7 RXA3-
10 OPC&SCANNING_CTRL
RXA0+ RXA4+ RXA4- 8
11 OPT
R704
RXA0- RXA4- RXA4+ 9
12 10K RXACK+
RXA4+
10 RXACK-
13 RXA4-
RXB4+ RXB0+ RXB0- 11
14 RXA3+
RXB4- RXB0- RXB0+ 12 RXA2+
15 RXA3-
RXB3+ RXB1+ RXB1- 13 RXA2-
16 RXACK+
RXB3- RXB1- RXB1+ 14
17 RXACK-
RXBCK+ RXB2+ RXB2- 15 RXA1+
18
RXBCK- RXB2- RXB2+ 16 RXA1-

19 RXA2+
RXB2+ RXBCK+ RXBCK- 17
20 RXA2- LVDS_SEL
RXB2- RXBCK- RXBCK+ 18 RXA0+
21
19 +3.3V_Normal
22 RXB1+ RXB3+ RXB3- RXA0-
RXA1+
23 RXA1- OPT
21 R712
24 RXB0+ RXB4+ RXB4- 3.3K
RXA0+
25 RXA0-
23 OPT
26 AUO_GND/LGD_NC R711
10K
24 PANEL_VCC
27
25
28 RXB4+ AUO_GND HD
R709 26 L701
29 RXB4- 10K 70-ohm
27 BLM18SG700TN1D
30 RXB3+
28
31 RXB3- FOR FHD REVERSE(8bit) OPT
C701
OPT
C702
HD
C703
29
32 RXBCK+ 10uF 1000pF 0.1uF
33 RXBCK-
Change in S7LR 30 16V 50V 16V
34 31
MIRROR Pol-change Shift
35 RXB2+
RXA4+ RXA4+ RXA4- RXA0-
36 RXB2-
RXA4- RXA4- RXA4+ RXA0+
37
38 RXB1+
RXA3- RXA0- RXA0+ RXA1+
39 RXB1-
RXACK+ RXA1+ RXA1- RXA2-
40 RXB0+
RXACK- RXA1- RXA1+ RXA2+
41 RXB0-
RXA2+ RXA2+ RXA2- RXACK-
42
RXA2- RXA2- RXA2+ RXACK+
43
RXA1+ RXACK+ RXACK- RXA3-
44 PANEL_VCC
RXA1- RXACK- RXACK+ RXA3+
45
46 FHD
L702 RXA0- RXA3- RXA3+ RXA4+
47 70-ohm
48
OPT OPT FHD
49 RXB4+ RXB4+ RXB4- RXB0-
C700 C709 C710
10uF 1000pF 0.1uF
50 RXB4- RXB4- RXB4+ RXB0+
16V 50V 16V
51 RXB3+ RXB0+ RXB0- RXB1-
RXB3- RXB0- RXB0+ RXB1+

52
RXBCK+ RXB1+ RXB1- RXB2-
RXBCK- RXB1- RXB1+ RXB2+
RXB2+ RXB2+ RXB2- RXBCK-
RXB2- RXB2- RXB2+ RXBCK+
RXB1+ RXBCK+ RXBCK- RXB3-
RXB1- RXBCK- RXBCK+ RXB3+
RXB0+ RXB3+ RXB3- RXB4-
RXB0- RXB3- RXB3+ RXB4+

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_LARGE 11

AVDD_DDR0 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0
+1.5V_DDR AVDD_DDR0
R1227
R1201
R1224
R1204
1K 1%
1K 1%
OS
OS
1K 1%
1K 1%
L1202
CIC21J501NE
A-MVREFDQ B-MVREFCA B-MVREFDQ
0.1uF
A-MVREFCA
OS 1000pF
0.1uF
1000pF
0.1uF
OS 1000pF
OPT
0.1uF
1000pF
1%
1%
1%
1%
C1250
R1228
C1217
C1218
C1219
C1238
C1241
R1202
R1225
0.1uF
0.1uF
0.1uF
R1205
C1206
C1239
C1220
10uF
C1247
C1248
C1249
C1251
1uF
1uF
1uF
1uF
1uF
OS
OS
C1202
C1201
C1204
1K
C1203
1K
1K
OS
OS
1K
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
IC1201-*1 IC1202-*1
K4B1G1646G-BCH9 K4B1G1646G-BCH9
DDR_1333_SS_NEW DDR_1333_SS_NEW
N3 M8 N3 M8
A0 VREFCA A0 VREFCA
P7 P7
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
A4 A4
P2 P2
A5 A5
R8 L8 R8 L8
A6 ZQ A6 ZQ
R2 R2
A7 A7
T8 T8
A8 A8
R3 B2 R3 B2
A9 VDD_1 A9 VDD_1
L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
EAN61828901 R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
EAN61828901 IC1202 N8
BA0 VDD_9
N8
BA0 VDD_9
IC1201 H5TQ1G63DFR-H9C M3
BA1
M3
BA1
H5TQ1G63DFR-H9C IC101 BA2

A1
BA2
A1
LGE2111A-T8 DDR_1333_HYNIX J7
VDDQ_1
A8 J7
VDDQ_1
A8
CK VDDQ_2 CK VDDQ_2
DDR_1333_HYNIX K7 C1 K7 C1
N3 M8 CK VDDQ_3 CK VDDQ_3
B-MA0 A0 VREFCA B-MVREFCA K9 C9 K9 C9
A-MVREFCA
M8
VREFCA A0
N3
P7
A-MA0
A11
S7LR2_DIVX_MS10 B23
B-MA1
P7
P3
A1
L2
CKE VDDQ_4
VDDQ_5
D2
E9 L2
CKE VDDQ_4
VDDQ_5
D2
E9
A1 A-MA1 A-MA0 A_DDR3_A[0] B_DDR3_A[0] B-MA0 B-MA2 A2 CS VDDQ_6 CS VDDQ_6
P3 C14 D25 N2 H1 K1 F1 K1 F1
A-MA2 A-MA1 B-MA1 B-MA3 B-MVREFDQ ODT VDDQ_7 ODT VDDQ_7
A2 A_DDR3_A[1] B_DDR3_A[1] A3 VREFDQ J3 H2 J3 H2
H1 N2 B11 F22 P8 RAS VDDQ_8 RAS VDDQ_8
A-MVREFDQ VREFDQ A3 A-MA3 A-MA2 A_DDR3_A[2] B_DDR3_A[2] B-MA2 B-MA4 A4 K3 H9 K3 H9
P8 F12 G22 P2 OS CAS VDDQ_9 CAS VDDQ_9
A-MA4 A-MA3 B-MA3 B-MA5 L3 L3
A4 A_DDR3_A[3] B_DDR3_A[3] A5 R1226 WE WE
P2 C15 E24 R8 L8 J1 J1
R1203 A5 A-MA5 A-MA4 A_DDR3_A[4] B_DDR3_A[4] B-MA4 B-MA6 A6 ZQ NC_1 NC_1
L8 R8 E12 F21 R2 T2 J9 T2 J9
A-MA6 A-MA5 B-MA5 B-MA7 240 RESET NC_2 RESET NC_2
ZQ A6 A_DDR3_A[5] B_DDR3_A[5] A7 L1 L1
240 R2 A14 E23 T8 1% AVDD_DDR0 NC_3 NC_3
A7 A-MA7 A-MA6 A_DDR3_A[6] B_DDR3_A[6] B-MA6 B-MA8 A8 L9 L9
AVDD_DDR0 1% T8 D11 D22 R3 B2 NC_4 NC_4
A-MA8 A-MA7 B-MA7 B-MA9 F3 T7 F3 T7
A8 A_DDR3_A[7] B_DDR3_A[7] A9 VDD_1 C1227 10uF DQSL NC_6 DQSL NC_6
B2 R3 B14 D24 L7 D9 G3 G3
VDD_1 A9 A-MA9 A-MA8 A_DDR3_A[8] B_DDR3_A[8] B-MA8 B-MA10 A10/AP VDD_2 DQSL DQSL
C1205 10uF D9 L7 D12 D21 R7 G7 OS C1228 0.1uF
VDD_2 A10/AP A-MA10 A-MA9 A_DDR3_A[9] B_DDR3_A[9] B-MA9 B-MA11 A11 VDD_3 C7 A9 C7 A9
C1207 0.1uF G7 R7 C16 C24 N7 K2 OS C1229 0.1uF DQSU VSS_1 DQSU VSS_1
VDD_3 A11 A-MA11 A-MA10 A_DDR3_A[10] B_DDR3_A[10] B-MA10 B-MA12 A12/BC VDD_4 B7 B3 B7 B3
C1208 0.1uF K2 N7 C13 C25 T3 K8 OS C1230 0.1uF DQSU VSS_2
E1
DQSU VSS_2
E1
VDD_4 A12/BC A-MA12 A-MA11 A_DDR3_A[11] B_DDR3_A[11] B-MA11 B-MA13 A13 VDD_5 VSS_3 VSS_3
C1210 0.1uF K8 T3 A15 F23 N1 OS C1231 0.1uF E7 G8 E7 G8
VDD_5 A13 A-MA13 A-MA12 A_DDR3_A[12] B_DDR3_A[12] B-MA12 VDD_6 DML VSS_4 DML VSS_4
C1211 0.1uF N1 E11 E21 M7 N9 OS C1232 0.1uF D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
VDD_6 A-MA13 A_DDR3_A[13] B_DDR3_A[13] B-MA13 NC_5 VDD_7 J8 J8
C1212 0.1uF N9 M7 B13 D23 R1 OS C1233 0.1uF VSS_6 VSS_6
VDD_7 NC_5 A-MA14 A_DDR3_A[14] B_DDR3_A[14] B-MA14 VDD_8 E3 M1 E3 M1
C1213 0.1uF R1 M2 R9 OS C1234 0.1uF
F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9
VDD_8 B-MBA0 BA0 VDD_9 DQL1 VSS_8 DQL1 VSS_8
C1214 0.1uF R9 M2 B-MCK N8 OS C1235 0.1uF F2 P1 F2 P1
VDD_9 BA0 A-MBA0 A-MCK B-MBA1 BA1 DQL2 VSS_9 DQL2 VSS_9
OS
R1235
N8 F13 G20 M3 OS C1236 0.1uF F8 P9 F8 P9
56
R1237
C1215 0.1uF A-MBA1 A-MBA0 B-MBA0 B-MBA2 DQL3 VSS_10 DQL3 VSS_10
1%
BA1 A_DDR3_BA[0] B_DDR3_BA[0] BA2
1%
H3 T1 H3 T1
M3 B15 F24 OS C1240 A1
56
C1216 0.1uF DQL4 VSS_11 DQL4 VSS_11

BA2 A-MBA2 A-MBA1 A_DDR3_BA[1] B_DDR3_BA[1] B-MBA1 VDDQ_1 H8 T9 H8 T9
OS A1 C1209 E13 F20 J7 A8 DQL5 VSS_12 DQL5 VSS_12
A-MBA2 B-MBA2 G2 G2
VDDQ_1 A_DDR3_BA[2] B_DDR3_BA[2] 0.01uF CK VDDQ_2 DQL6 DQL6
R1236
A8 J7 K7 C1
56
R1238
50V H7 H7
0.01uF
1%
VDDQ_2 CK CK VDDQ_3 DQL7 DQL7
1%
OS
C1 K7 50V C17 G25 K9 C9 B1 B1
56
A-MCK B-MCK B-MCKE VSSQ_1 VSSQ_1

VDDQ_3 CK A_DDR3_MCLK B_DDR3_MCLK CKE VDDQ_4 D7 B9 D7 B9
C9 K9 A17 G23 B-MCKB D2 DQU0 VSSQ_2 DQU0 VSSQ_2
VDDQ_4 CKE A-MCKE A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ B-MCKB VDDQ_5 C3 D1 C3 D1
D2 B16 F25 L2 E9 DQU1 VSSQ_3 DQU1 VSSQ_3
A-MCKB A-MCKE B-MCKE C8 D8 C8 D8
VDDQ_5 A_DDR3_MCLKE B_DDR3_MCLKE CS VDDQ_6 DQU2 VSSQ_4 DQU2 VSSQ_4
E9 L2 K1 F1 C2 E2 C2 E2
VDDQ_6 CS B-MODT ODT VDDQ_7 DQU3 VSSQ_5 DQU3 VSSQ_5
F1 K1 J3 H2 A7 E8 A7 E8
A-MODT AVDD_DDR0 B-MRASB DQU4 VSSQ_6 DQU4 VSSQ_6
VDDQ_7 ODT RAS VDDQ_8 A2 F9 A2 F9
H2 J3 E14 D20 K3 H9 DQU5 VSSQ_7 DQU5 VSSQ_7
VDDQ_8 RAS A-MRASB AVDD_DDR0 A-MODT A_DDR3_ODT B_DDR3_ODT B-MODT B-MCASB CAS VDDQ_9 B8 G1 B8 G1
H9 K3 B12 B25 L3 DQU6 VSSQ_8 DQU6 VSSQ_8
A-MCASB R1231 A-MRASB B-MRASB R1232 B-MWEB A3 G9 A3 G9
VDDQ_9 CAS A_DDR3_RASZ B_DDR3_RASZ WE DQU7 VSSQ_9 DQU7 VSSQ_9
L3 A12 B24 10K J1
WE A-MWEB 10K A-MCASB A_DDR3_CASZ B_DDR3_CASZ B-MCASB NC_1
J1 C12 A24 T2 J9
NC_1 A-MWEB A_DDR3_WEZ B_DDR3_WEZ B-MWEB OS B-MRESETB RESET NC_2
J9 T2 L1
NC_2 RESET A-MRESETB NC_3
L1 F11 E20 L9 IC1201-*2 IC1202-*2
NC_3 A-MRESETB A_DDR3_RESET B_DDR3_RESET B-MRESETB NC_4 NT5CB64M16DP-CF NT5CB64M16DP-CF
L9 F3 T7
NC_4 B-MDQSL DQSL NC_6 B-MA14
T7 F3 G3
A-MA14 NC_6 DQSL A-MDQSL B-MDQSLB DQSL DDR_1333_NANYA_NEW DDR_1333_NANYA_NEW
G3 B19 K24 N3 M8 N3 M8
DQSL A-MDQSLB A-MDQSL A_DDR3_DQSL B_DDR3_DQSL B-MDQSL A0 EAN61857201 VREFCA A0 EAN61857201 VREFCA
C18 K25 C7 A9 P7 P7
A-MDQSLB B-MDQSLB B-MDQSU A1 A1
A_DDR3_DQSLB B_DDR3_DQSLB DQSU VSS_1 P3 P3
A9 C7 B7 B3 A2 A2
VSS_1 DQSU A-MDQSU B-MDQSUB DQSU VSS_2 N2 H1 N2 H1
B3 B7 B18 J21 E1 A3 VREFDQ A3 VREFDQ
A-MDQSUB A-MDQSU B-MDQSU P8 P8
VSS_2 DQSU A_DDR3_DQSU B_DDR3_DQSU VSS_3 A4 A4
E1 A18 J20 E7 G8 P2 P2
VSS_3 A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB B-MDQSUB B-MDML DML VSS_4 A5 A5
G8 E7 D3 J2 R8 L8 R8 L8
A-MDML B-MDMU A6 ZQ A6 ZQ
VSS_4 DML DMU VSS_5 R2 R2
J2 D3 E15 H24 J8 A7 A7
VSS_5 DMU A-MDMU A-MDML A_DDR3_DQML B_DDR3_DQML B-MDML VSS_6 T8 T8
J8 A21 L20 E3 M1 A8 A8
A-MDMU B-MDMU B-MDQL0 R3 B2 R3 B2
VSS_6 A_DDR3_DQMU B_DDR3_DQMU DQL0 VSS_7 A9 VDD_1 A9 VDD_1
M1 E3 F7 M9 L7 D9 L7 D9
VSS_7 DQL0 A-MDQL0 B-MDQL1 DQL1 VSS_8 A10/AP VDD_2 A10/AP VDD_2
M9 F7 D17 L23 F2 P1 R7 G7 R7 G7
A-MDQL1 A-MDQL0 B-MDQL0 B-MDQL2 A11 VDD_3 A11 VDD_3
VSS_8 DQL1 A_DDR3_DQL[0] B_DDR3_DQL[0] DQL2 VSS_9 N7 K2 N7 K2
P1 F2 G15 J24 F8 P9 A12 VDD_4 A12 VDD_4
VSS_9 DQL2 A-MDQL2 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1] B-MDQL1 B-MDQL3 DQL3 VSS_10 T3 K8 T3 K8
P9 F8 B21 L24 H3 T1 NC_6 VDD_5 NC_6 VDD_5
A-MDQL3 A-MDQL2 B-MDQL2 B-MDQL4 N1 N1
VSS_10 DQL3 A_DDR3_DQL[2] B_DDR3_DQL[2] DQL4 VSS_11 VDD_6 VDD_6
T1 H3 F15 J23 H8 T9 M7 N9 M7 N9
VSS_11 DQL4 A-MDQL4 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3] B-MDQL3 B-MDQL5 DQL5 VSS_12 NC_5 VDD_7 NC_5 VDD_7
T9 H8 B22 M24 G2 R1 R1
A-MDQL5 A-MDQL4 B-MDQL4 B-MDQL6 VDD_8 VDD_8
VSS_12 DQL5 A_DDR3_DQL[4] B_DDR3_DQL[4] DQL6 M2 R9 M2 R9
G2 F14 H23 H7 BA0 VDD_9 BA0 VDD_9
DQL6 A-MDQL6 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5] B-MDQL5 B-MDQL7 DQL7 N8 N8
H7 A22 M23 B1 BA1 BA1
A-MDQL7 A-MDQL6 B-MDQL6 M3 M3
DQL7 A_DDR3_DQL[6] B_DDR3_DQL[6] VSSQ_1 BA2 BA2
B1 D15 K23 D7 B9 A1 A1
VSSQ_1 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7] B-MDQL7 B-MDQU0 DQU0 VSSQ_2 VDDQ_1 VDDQ_1
B9 D7 C3 D1 J7 A8 J7 A8
A-MDQU0 B-MDQU1 CK VDDQ_2 CK VDDQ_2
VSSQ_2 DQU0 DQU1 VSSQ_3 K7 C1 K7 C1
D1 C3 G16 G21 C8 D8 CK VDDQ_3 CK VDDQ_3
VSSQ_3 DQU1 A-MDQU1 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0] B-MDQU0 B-MDQU2 DQU2 VSSQ_4 K9 C9 K9 C9
D8 C8 B20 L22 C2 E2 CKE VDDQ_4 CKE VDDQ_4
A-MDQU2 A-MDQU1 B-MDQU1 B-MDQU3 D2 D2
VSSQ_4 DQU2 A_DDR3_DQU[1] B_DDR3_DQU[1] DQU3 VSSQ_5 VDDQ_5 VDDQ_5
E2 C2 F16 H22 A7 E8 L2 E9 L2 E9
VSSQ_5 DQU3 A-MDQU3 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2] B-MDQU2 B-MDQU4 DQU4 VSSQ_6 CS VDDQ_6 CS VDDQ_6
E8 A7 C21 K20 A2 F9 K1 F1 K1 F1
A-MDQU4 A-MDQU3 B-MDQU3 B-MDQU5 ODT VDDQ_7 ODT VDDQ_7
VSSQ_6 DQU4 A_DDR3_DQU[3] B_DDR3_DQU[3] DQU5 VSSQ_7 J3 H2 J3 H2
F9 A2 E16 H20 B8 G1 RAS VDDQ_8 RAS VDDQ_8
VSSQ_7 DQU5 A-MDQU5 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4] B-MDQU4 B-MDQU6 DQU6 VSSQ_8 K3 H9 K3 H9
G1 B8 A20 L21 A3 G9 CAS VDDQ_9 CAS VDDQ_9
A-MDQU6 A-MDQU5 B-MDQU5 B-MDQU7 L3 L3
VSSQ_8 DQU6 A_DDR3_DQU[5] B_DDR3_DQU[5] DQU7 VSSQ_9 WE WE
G9 A3 D16 H21 J1 J1
VSSQ_9 DQU7 A-MDQU7 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6] B-MDQU6 NC_1 NC_1
C20 K21 T2 J9 T2 J9
A-MDQU7 B-MDQU7 RESET NC_2 RESET NC_2
A_DDR3_DQU[7] B_DDR3_DQU[7] L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_7 DQSL NC_7
G3 G3
DQSL DQSL
C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DDR_1600_SS DDR_1600_SS DDR_1600_HYNIX DDR_1600_HYNIX DDR_DVB_T2_2G DDR_DVB_T2_2G DDR_1600_MICRON DDR_1600_MICRON DMU VSS_5 DMU VSS_5
J8 J8
IC1201-*5 IC1202-*5 IC1201-*4 IC1202-*4 IC1201-*3 IC1202-*3 IC1201-*6 IC1202-*6 VSS_6 VSS_6
K4B1G1646G-BCK0 K4B1G1646G-BCK0 H5TQ1G63DFR-PBC H5TQ1G63DFR-PBC K4B2G1646C K4B2G1646C MT41J64M16JT-125:G MT41J64M16JT-125:G E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 DQL1 VSS_8 DQL1 VSS_8
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
F2 P1 F2 P1
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 F8 P9 F8 P9
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
H3 T1 H3 T1
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 DQL4 VSS_11 DQL4 VSS_11
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
H8 T9 H8 T9
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 G2 G2
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 DQL6 DQL6
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 H7 H7
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 DQL7 DQL7
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
NC_6 VDD_5
K8 T3
NC_6 VDD_5
K8 B1 B1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 VSSQ_1 VSSQ_1
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 D7 B9 D7 B9
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1 DQU0 VSSQ_2 DQU0 VSSQ_2
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 C3 D1 C3 D1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
DQU1 VSSQ_3 DQU1 VSSQ_3
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
C8 D8 C8 D8
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1 DQU2 VSSQ_4 DQU2 VSSQ_4
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 C2 E2 C2 E2
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 DQU3 VSSQ_5 DQU3 VSSQ_5
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 A7 E8 A7 E8
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2 DQU4 VSSQ_6 DQU4 VSSQ_6
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 A2 F9 A2 F9
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 DQU5 VSSQ_7 DQU5 VSSQ_7
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 B8 G1 B8 G1
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 DQU6 VSSQ_8 DQU6 VSSQ_8
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
A3 G9 A3 G9
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1 DQU7 VSSQ_9 DQU7 VSSQ_9
T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
L1 L1 L1 L1 L1 L1 L1 L1
NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3
L9 L9 L9 L9 L9 L9 L9 L9
NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4
F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7
DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_5 DQSL NC_5
G3 G3 G3 G3 G3 G3 G3 G3
DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL
C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
E1 E1 E1 E1 E1 E1 E1 E1
VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3
E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8
DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4
D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5
J8 J8 J8 J8 J8 J8 J8 J8
VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6
E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQ0 VSS_7 DQ0 VSS_7
F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9
F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1
F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9
H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1
H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9
G2 G2 G2 G2 G2 G2 G2 G2
DQL6 DQL6 DQL6 DQL6 DQL6 DQL6 DQ6 DQ6
H7 H7 H7 H7 H7 H7 H7 H7
DQL7 DQL7 DQL7 DQL7 DQL7 DQL7 DQ7 DQ7
B1 B1 B1 B1 B1 B1 B1 B1
VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1
D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQ8 VSSQ_2
C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8
C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2
A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8
A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9
B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1
A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR_256 12

GLOBAL tuner block except EU and China
FE_AGC_SPEED_CTL
IF_AGC_SEL
DEMOD_RESET
FE_BOOSTER_CTL
LNA2_CTL
DEMOD_SCL
DEMOD_SDA
RF_SWITCH_CTL
Pull-up cant be applied
because of MODEL_OPT_2 R3741-*3
TU3704 TU3700 2.2K
TU_IIC_BR_2.2K
TU3703 TDSS-G201D
TDSH-T101F TDSN_B001F R3740-*3
SI2156_DVB_1INPUT_H 2.2K
TU_IIC_BR_2.2K
SI2176_TW_2INPUT_H SI2176_BR_2INPUT_H
R3741-*2
1.2K
+3.3V_TU TU_IIC_ATSC_1.2K
R3740-*2
1.2K
+3.3V_TU
C3711-*1 C3713-*1 +3.3V_TU TU_IIC_ATSC_1.2K
R3733 20pF 20pF
100K 50V 50V
close to TUNER R3732 TU_I2C_FILTER TU_I2C_FILTER R3740-*1
100 1K R3774
RF_S/W_CTL RF_S/W_CTL NC_1 TUNER_RESET
TU_I2C_FILTER TU_I2C_FILTER
TU_IIC_NON_ATSC_1K 470
TU_BUFFER
1 1 R3705 0 1 R3735-*1 R3736-*1
C3701 RF_SW_OPT R3741-*1 R3775 R3758
C3710 1K 0 82
RESET RESET 0.1uF RESET 0.1uF
16V R3740 R3741
TU_IIC_NON_ATSC_1K TU_SIF
2 2 16V 2 1.8K 1.8K TU_NON_BUFFER
E
TU_IIC_ATSC_1.8K TU_IIC_ATSC_1.8K
SCL SCL SCL TU_I2C_NON_FILTER Q3705
MMBT3906(NXP)
3 3 3 R3735 33
TU_SCL
B TU_BUFFER
C
SDA SDA SDA R3736 33
R3753
4.7K
4 4 4 TU_SDA TU_BUFFER
C3702-*1 TU_I2C_NON_FILTER TU_I2C_NON_FILTER TU_I2C_FILTER
0
+B1[3.3V] +B1[3.3V] +B1[3.3V] ASIA C3711
18pF
C3713
18pF
C3742
20pF
C3743
20pF
5 5 5 50V 50V 50V 50V
TU_I2C_NON_FILTER TU_I2C_FILTER
SIF SIF NC_2 close to TUNER +3.3V_TU
6 6 C3702 R3783 0
6
0.1uF 16V NON_ASIA
+B2[1.8V] +B2[1.8V] +B2[1.8V]NON_ASIA
7 7 7
R3751 R3752
CVBS CVBS NC_3 R3784 0 220 220
8 8 8 TU_BUFFER TU_BUFFER
NON_ASIA
IF_AGC NC_1 IF_AGC R3756 0
TU_CVBS
9 9 9 TU_NON_BUFFER
C3750 C3751 E
5pF 5pF R3780 R3781 Q3703
DIF[P] NC_2 DIF[P] 50V 50V 3.3
R3782
3.3 R3749 0 MMBT3906(NXP)
10 10 10 R3761 0
ASIA ASIA
ASIA
2K
ASIA
TU_BUFFER B
TU_BUFFER
HALF_NIM OPT
DIF[N] NC_3 DIF[N] R3750
C
11 11 11 R3760 0
R3785 R3786
1K
OPT
HALF_NIM 0 0
+B3[3.3V] ASIA ASIA
L3706
12
12 120 12 Close to the tuner
+B4[1.23V] FULL_NIM
13 C3718
0.1uF IF_P_MSTAR
16V
SHIELD NC_4 +1.23V_TU
FULL_NIM
SHIELD
14 IF_N_MSTAR
GND
15 1. should be guarded by ground
2. No via on both of them
ERROR 3. Signal Width >= 12mils
16 Signal to Signal Width = 12mils
Ground Width >= 24mils
SYNC
17 +3.3V_TU
VALID
18
MCLK
19 +1.8V_TU C3739 C3707 C3708
10uF 100pF 0.1uF
D0 6.3V 50V 16V
20 OPT
C3737 C3738 C3705

D1 100pF 0.1uF 100uF
21 50V 16V 16V close to the tuner pin, add,09029
OPT
D2
22
D3 R3704 100
23 IF_AGC_MAIN
HALF_NIM
D4 should be guarded by ground
C3716
24 0.1uF
16V
HALF_NIM
+3.3V_TU
D5 IC3703
25 AP1117E18G-13 +1.8V_TU
D6 OPT
R1
26 FE_TS_SYNC 3 IN ADJ/GND 1
OUT R3710
D7 200
27 FE_TS_VAL_ERR FE_TS_DATA[0-7] 2 1%
28
FE_TS_CLK R3766
Vo=VREF*(1+R2/R1) R3711 1
0
FE_TS_DATA[0]
VREF = 1.25V
SHIELD
R2
C3740 C3741
FE_TS_DATA[1] 0.1uF 10uF
16V
10V
FE_TS_DATA[2]
IC3701
AP2132MP-2.5TRG1
[EP]
TUNER MULTI-OPTION FE_TS_DATA[3]
+1.23V_TU
380mA
R3771 10K PG GND
TU3700-*1 FE_TS_DATA[4] 1 8
FULL_NIM_BCD FULL_NIM_BCD FULL_NIM_BCD
THERMAL
TDSS-H101F FULL_NIM_OPT
R3748 R3776
SI2176_ATSC_1INPUT_H C3717 EN ADJ 11K 10K
9
FE_TS_DATA[5] 0.1uF 2 7
16V
VIN VOUT R1
FE_TS_DATA[6] 3 6
10K
NC
FULL_NIM
1
RESET
VCTRL NC FULL_NIM_BCD
FE_TS_DATA[7] 4 5 C3729
2 +5V_Normal 0.1uF
C3730
SCL R3747 16V 10uF
3
R3769
SDA
20K FULL_NIM 10V
4 FULL_NIM
L3704
Close to the CI Slot 1005
FULL_NIM
+B1[3.3V] R2
5
SIF
6 R3713
+B2[1.8V]
+3.3V_TU +3.3V_Normal 0
7
CVBS FULL_NIM_BCD FULL_NIM_TJ
8 IC3701-*1 BCD Vo=0.6*(1+R1/R2)
IF_AGC TJ4220GDP-ADJ[EP]GND
9 Size change,0929 TJ Vo=0.8*(1+R1/R2)
DIF[P] L3703 NC_1
1 8
GND
10 60mA FULL_NIM FULL_NIM_TJ
CIS21J121
THERMAL
DIF[N] EN2 ADJ/SENSE R3748-*1 R3776-*1
9
2 7
11 5.1K 0
VIN3 VOUT
3 6
12 C3723 C3725 C3715 C3727 NC4 NC_2
22uF 0.1uF 22uF 0.1uF 4 5 FULL_NIM_TJ
SHIELD 10V 16V 10V 16V R3747-*1
9.1K
Add,0929

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_NON_EU 14

Headphone *Option : HEAD_PHONE
HEAD_PHONE
HP_LOUT
C1500 OPT C
HEAD_PHONE E
10uF C1502 R1501
16V 1000pF Q1502 B Q1504
1K MMBT3904(NXP) HEAD_PHONE
50V MMBT3904(NXP) B HEAD_PHONE_POP
+3.5V_ST
HEAD_PHONE_POP JK1500
E C +3.3V_Normal KJA-PH-0-0177
HEAD_PHONE
GND 5
E
HEAD_PHONE_POP
Q1501 R1504
10K L 4
MMBT3906(NXP)
C R1500 B
3.3K R1503
B HEAD_PHONE_POP C 1K DETECT 3
SIDE_HP_MUTE HP_DET
Q1500 HEAD_PHONE
MMBT3904(NXP) R 1
E
HEAD_PHONE_POP
HEAD_PHONE
HP_ROUT
C1501 OPT C
HEAD_PHONE E
10uF C1503 R1502
16V 1000pF Q1503 B Q1505
1K MMBT3904(NXP) MMBT3904(NXP)
50V HEAD_PHONE_POP B HEAD_PHONE_POP
HEAD_PHONE_32LS3500
E C JK1500-*1
PEJ031-01
GND 5
L 4
DETECT 3
R 1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HEADPHONE 15

Audio amp(NTP-7500)
+3.3V_Normal AMP_RESET
R521 C516
10K 1000pF
50V
50V
L502
+24V_AMP
22000pF
BLM18PG121SN1D
OPT
C517
AUD_MASTER_CLK R507
3.3
+24V_AMP OPT
+24V
C525
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C519 C521 C523
0.1uF 0.1uF 10uF 0.01uF
VDD_IO
GND_IO
/RESET
PGND1A
C514 C515 50V
10uF 50V 50V 35V
CLK_I
L501
0.1uF 10V
BST1A
[EP]
16V SPK_L+
CIS21J121
D501
AD
1N4148W R508 R515 L505

100V 12 12 R516
OPT 10.0uH C537
OPT C510 C512 OPT 0.1uF 4.7K
C501 C502 C506 C508 10uF 0.1uF C530 50V
0.1uF 0.1uF 4.7uF 0.1uF 10V 390pF L506
50V 50V 16V 16V 50V C535
16V 10.0uH 0.47uF
48
47
46
45
44
43
42
41
40
39
38
37
C504
1000pF
50V
50V
SPEAKER_L
C503 C531 C538
100pF R505 AGND_PLL 1 36 OUT1B_2 D502
390pF
50V 0.1uF
50V
R517
50V 3.3K 1N4148W R509 R513 4.7K
AVDD_PLL 2 35 OUT1B_1 100V
OPT 12 12
THERMAL SPK_L-
DVDD_PLL 3 34 PGND1B
49 C526
22000pF
LF 4 33 BST1B 50V WAFER-ANGLE
DGND_PLL IC501 VDR1

5 32 SPK_L+
OPT 4
C511
10uF
GND_1 6 NTP-7500L 31 VCC_5
C513
10V 0.1uF SPK_L-
16V DGND 7 30 AGND 3
DVDD 8 29 VDR2 SPK_R+

2
C528 C529 C534
SDATA 9 28 BST2A 1uF
25V
1uF
25V
1uF
25V SPK_R-
AUD_LRCH 1
WCK 10 27 PGND2A C527
P501
AUD_LRCK 22000pF
50V
BCK 11 26 OUT2A_2
AUD_SCK
R503 100 SDA 12 25 OUT2A_1

AMP_SDA
13
14
15
16
17
18
19
20
21
22
23
24
R504 100
AMP_SCL
C507 C509
+3.5V_ST 33pF 33pF
50V 50V SPK_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
+24V_AMP D503 R510 R514

NON_LIPS 1N4148W 12 12 L503
R502 100V
R520 10K 10.0uH C539 R518
R506 OPT
10K C532 0.1uF 4.7K
NON_LIPS
NON_LIPS C 100 390pF L504 C536 50V
C505 50V 0.47uF
R501 B Q501
1000pF C520 C522 C524
10.0uH 50V
SPEAKER_R
AMP_MUTE 50V C533
10K MMBT3904(NXP) 0.1uF 0.1uF 10uF 390pF
50V
NON_LIPS E NON_LIPS 50V 50V 35V D504 C540 R519
C518 1N4148W R511 R512 0.1uF 4.7K
22000pF 100V 12 12 50V
OPT
50V
SPK_R-
R522
0
POWER_DET
LIPS_ONLY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NTP-7500 16

COMPONENT1 & AV(COMMON), COMPONENT2
JK1601 JK1602
PPJ239-01 PPJ234-02
COMP2_NORMAL COMP1 JK1601-*1
6H [RD1]E-LUG 6E [RD]E-LUG R1632 PPJ239-05

10K
COMP2_R_IN 6H [RD1]E-LUG
D1617 [RD1]O-SPRING_2
5.6V C1617 5H
ZENER_COMP1_LR R1626 R1634
1000pF
5H [RD1]O-SPRING_2 5E [RD]O-SPRING_2 470K 50V

OPT
12K
4H [RD1]CONTACT_2
5G [WH1]O-SPRING_2
R1633
10K
COMP2_L_IN [RD1]CONTACT_1
4H [RD1]CONTACT_2 4E [RD]CONTACT_2 D1616

4F
5.6V C1616 R1636 [RD1]O-SPRING_1

ZENER_COMP1_LR R1625 1000pF 5F
470K 50V 12K
OPT
7F [RD1]E-LUG-S
+3.3V_Normal
5G [WH1]O-SPRING 5D [WH]O-SPRING R1612 5E [WH1]O-SPRING_1

10K
COMP2_DET [YL1]CONTACT
4F [RD1]CONTACT_1 4C [RD]CONTACT_1 D1613

R1615
1K
4D
5.6V [YL1]O-SPRING
OPT 5D
COMP1_NON_ADC_FILTER
6D [YL1]E-LUG
L1601-*1
5F [RD1]O-SPRING_1 5C [RD]O-SPRING_1 L1601

CM2012FR10KT
0
6N [RD2]E-LUG
COMP1_ADC_FILTER_L
COMP2_Pr+
C1620 C1621 5N [RD2]O-SPRING_2
D1615 47pF 47pF
COMP1_ADC_FILTER
20V COMP1_ADC_FILTER 50V
OPT R1621 50V [RD2]CONTACT
COMPONENT1 7F [RD1]E-LUG-S 7C [RD]E-LUG-S 75 4N
[WH2]O-SPRING
& COMP1_NON_ADC_FILTER
5M
[RD2]O-SPRING_1
AV [BL1]O-SPRING [BL]O-SPRING L1602
L1602-*1
0
5L
5E 5B CM2012FR10KT
COMP1_ADC_FILTER_L
7L [RD2]E-LUG-S
COMP2_Pb+
C1622 C1623 5K [BL2]O-SPRING
D1614 47pF 47pF
20V COMP1_ADC_FILTER COMP1_ADC_FILTER
OPT 50V 50V
R1620
7E [BL1]E-LUG-S 7B [BL]E-LUG-S 75
+3.3V_Normal 4J [GN2]CONTACT
5J [GN2]O-SPRING
R1660
4D [GN1]CONTACT 4A [GN]CONTACT 10K

6J [GN2]E-LUG
COMP2_LM4600-UA_ONLY
AV_CVBS_DET
R1666
1K
D1624 C1646
5.6V 0.1uF
5D [GN1]O-SPRING 5A [GN]O-SPRING OPT
16V COMP1_NON_ADC_FILTER
L1603-*1
L1603 0
CM2012FR10KT
COMP1_ADC_FILTER_L
COMP2_Y+/AV_CVBS_IN
6D [GN1]E-LUG 6A [GN]E-LUG D1612

C1624
47pF
C1625
20V COMP1_ADC_FILTER 47pF
COMP1_ADC_FILTER
OPT R1619 50V 50V
75
6N [RD2]E-LUG
5N [RD2]O-SPRING_2 R1618
10K
SC1/COMP1_R_IN
COMP2
D1609
5.6V R1607 C1612 R1631
ZENER_COMP2_LR 470K 1000pF 12K
4N [RD2]CONTACT COMP2 50V

OPT
COMP2
R1617
10K
SC1/COMP1_L_IN
5M [WH2]O-SPRING COMP2
D1607 R1606 C1611 R1630

5.6V 470K 1000pF 12K
ZENER_COMP2_LR COMP2 50V COMP2
OPT COMP2_NON_ADC_FILTER
L1604-*1
5L [RD2]O-SPRING_1 L1604
CM2012FR10KT
0
COMP2_ADC_FILTER_L
COMPONENT2 C1626
47pF
C1627
47pF
SC1_R+/COMP1_Pr+
D1604 R1608 COMP2_ADC_FILTER COMP2_ADC_FILTER

50V 50V
20V 75
7L [RD2]E-LUG-S OPT COMP2
L1605-*1
5K [BL2]O-SPRING L1605
CM2012FR10KT
0
COMP2_ADC_FILTER_L
SC1_B+/COMP1_Pb+
C1628 C1629
47pF 47pF
COMP2_ADC_FILTER
D1606 R1605 COMP2_ADC_FILTER 50V
20V 75 50V
7K [BL2]E-LUG-S OPT COMP2
+3.3V_Normal
R1613
10K
4J [GN2]CONTACT COMP2
R1614 1K
SC1/COMP1_DET
COMP2
D1611
5.6V
5J [GN2]O-SPRING OPT
L1606-*1
0
L1606
CM2012FR10KT
COMP2_ADC_FILTER_L
SC1_G+/COMP1_Y+
6J [GN2]E-LUG C1630
47pF
C1631
47pF
COMP2_ADC_FILTER
D1605 R1604 COMP2_ADC_FILTER 50V
20V 75 50V
OPT COMP2

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_NON_EU_L 17

ETHERNET
* H/W option : ETHERNET
+2.5V_Normal
ETHERNET
L3707
JK2100-*1 JK2100 BLM18PG121SN1D
BS-R430051 XRJV-01V-0-D12-080
ETHERNET_XMULTIPLE
1
1 1 EPHY_TP
ETHERNET_UDE
2 OPT
2 2 D2105
5.5V
ADLC 5S 02 015
3
3 3 EPHY_TN
4
4 4
EPHY_RP
5 OPT OPT
5 5 D2103 D2104
5.5V 5.5V
ADLC 5S 02 015 ADLC 5S 02 015
6
6 6
EPHY_RN
7 OPT
7 7 D2101
5.5V
ADLC 5S 02 015
8
8 8
9 9
9 9
ETHERNET
C2104
0.01uF
50V

ETHERNET 21
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Serial Flash for SPI boot_NON_OS and OS
S_FLASH_NON_OS_MACRONIX
IC5601
+3.5V_ST MX25L6406EMI-12G
S_FLASH_NON_OS
R5603 HOLD# SCLK
1 16 SPI_SCK
S_FLASH_NON_OS 10K
R5602 +3.5V_ST
0.1uF VCC SI/SIO0 33 +3.5V_ST
2 15 SPI_SDI
S_FLASH_NON_OS
C5601
NC_1 NC_8 S_FLASH_OS_MACRONIX
3 14
OPT IC1401
R1404
NC_2 NC_7 +3.5V_ST 4.7K MX25L8006EM2I-12G
4 13 S_FLASH_OS
C1401
NC_3 NC_6 CS# VCC 0.1uF
5 12 /SPI_CS 1 8
OPT
R1403
NC_4 NC_5 10K SO/SIO1 HOLD#
6 11 SPI_SDO 2 7
CS# GND WP# SCLK

/SPI_CS 7 10 /FLASH_WP 3 6 SPI_SCK
R1405
SO/SIO1 WP# GND SI/SIO0 33
SPI_SDO 8 9 4 5 SPI_SDI
OPT C S_FLASH_OS
R1401
0 OPT
B
Q1401
MMBT3904(NXP)
E
S_FLASH_NON_OS_WINBOND S_FLASH_OS_WINBOND
IC5601-*1 IC1401-*1
W25Q64BVSFIG W25Q80BVSSIG
HOLD[IO3] CLK CS VCC

1 16 1 8
VCC DIO[IO0] DO[IO1] HOLD[IO3]

2 15 2 7
NC_1 NC_8 %WP[IO2] CLK

3 14 3 6
NC_2 NC_7 GND DI[IO0]

4 13 4 5
NC_3 NC_6
5 12
NC_4 NC_5
6 11
CS GND
7 10
DO[IO1] WP[IO2]
8 9

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR 2011.08.29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Serial FLASH 56

MSTART DEBUG_4PIN
P1
12505WS-04A00
1 MSTAR_DEBUG_4P
3 RGB_DDC_SCL
4 RGB_DDC_SDA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MSTAR DEBUG_4PIN 58


Led LCD TV: Service Manual

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 32LS3400 32LS3400-DA

P/NO : MFL67362816 (1203-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

EXPLODED VIEW .................................................................................. 26

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 C5 C

5.3.2. DTV mode

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

The receiver must be operated for about 5 minutes prior to

(6) A djustment equipments : Color Analyzer (CA-210 or

Case2 : Function check at the assembly line (4)

(5) After updating is complete, The TV will restart automatically.

3.2.2. MAC Address

3.2.2.2 Download method

3.2.5.2. Method & notice

3.2.4. LAN PORT INSPECTION(PING TEST)

C heck the model name Instart menu -> Factory name

Connecting picture of the measuring instrument

After You finish all adjustments, Press In-start button and

No. Item Condition Hex Data

HDMI number is dependent on model.

- Analog (RGB) EDID table - HD

2) When 3D OSD appear automatically , then select OK button

4.8. Local Dimming Function Check

Check 24V, 12V, 3.5V Fail Check short of Main B/D

Check Output of Fail Check short of Fail Re-soldering or Change defect

Check P403 Connector

Check LED status Fail Repeat A PROCESS

Check Panel Link Cable Fail Change Panel Link Cable

Check Inverter Connector Fail Change Inverter Connector

Fail Change IC1401

Check LVDS Cable Fail Change LVDS Cable

Check Input source Cable And Jack

Repeat [A], & [B] Process

Check Input source

Check the Input/Output Fail Re-soldering or

Check the Input/Output Fail Re-soldering or

Check Input source Check Input source

Check The Input/Output Fail Re-soldering or

Check The Speaker Wire

Only for training and service purposes

DDR3 Add. DDR3 1Gb DDR3 1Gb

LG Electronics. Inc. All rights reserved.

Side TMDS I2S

LGE Internal Use Only

* Stand Base + Body

R140 R141 R160 R161 R144 R145

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2012 LG Electronics. Inc. All right reserved.

+3.3V_Normal +2.5V_Normal +3.3V_Normal

OS(not use) / NonOS_Non_ErrorOut

MODEL_OPT_3 T25 NON_3D 3D

Normal Power 3.3V

R288 100 C257 0.1uF K12 G10

OPT 100pF VDDC_1 GND_34

R5 24MHz C262 22pF U19 K18

(6) A djustment equipments : Color Analyzer (CA-210 or

(5) After updating is complete, The TV will restart automatically.

C heck the model name Instart menu -> Factory name

Connecting picture of the measuring instrument

After You finish all adjustments, Press In-start button and